Since some people disapprove of white space cleanups mixed in regular commits

while others dislike them being extra commits, let's clean them up once and
for all for the existing code. If it's ugly, let it only be ugly once :-)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

diff --git a/Makefile b/Makefile
index 0a30ddcc85381e205b3a127ebad27bda0c7427f1..dfa1d8ed0f2135c5d272e1e9d5ce44eddb085576 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -161,7 +161,7 @@ $(obj)/config.h:
 
 CBFSTOOL:=$(objutil)/cbfstool/cbfstool
 
 
 CBFSTOOL:=$(objutil)/cbfstool/cbfstool
 

-# needed objects that every mainboard uses 
+# needed objects that every mainboard uses

 # Creation of these is architecture and mainboard independent
 $(obj)/mainboard/$(MAINBOARDDIR)/static.c: $(src)/mainboard/$(MAINBOARDDIR)/devicetree.cb  $(objutil)/sconfig/sconfig
        @printf "    SCONFIG    $(subst $(src)/,,$(<))\n"
 # Creation of these is architecture and mainboard independent
 $(obj)/mainboard/$(MAINBOARDDIR)/static.c: $(src)/mainboard/$(MAINBOARDDIR)/devicetree.cb  $(objutil)/sconfig/sconfig
        @printf "    SCONFIG    $(subst $(src)/,,$(<))\n"


@@ -282,14 +282,14 @@ printcrt0s:
        @echo ldscripts=$(ldscripts)
 
 OBJS     := $(patsubst %,$(obj)/%,$(TARGETS-y))
        @echo ldscripts=$(ldscripts)
 
 OBJS     := $(patsubst %,$(obj)/%,$(TARGETS-y))

-INCLUDES := -Isrc -Isrc/include -I$(obj) -Isrc/arch/$(ARCHDIR-y)/include 
+INCLUDES := -Isrc -Isrc/include -I$(obj) -Isrc/arch/$(ARCHDIR-y)/include

 INCLUDES += -Isrc/devices/oprom/include
 # abspath is a workaround for romcc
 INCLUDES += -include $(abspath $(obj)/config.h)
 
 CFLAGS = $(INCLUDES) -Os -nostdinc -pipe
 CFLAGS += -nostdlib -Wall -Wundef -Wstrict-prototypes -Wmissing-prototypes
 INCLUDES += -Isrc/devices/oprom/include
 # abspath is a workaround for romcc
 INCLUDES += -include $(abspath $(obj)/config.h)
 
 CFLAGS = $(INCLUDES) -Os -nostdinc -pipe
 CFLAGS += -nostdlib -Wall -Wundef -Wstrict-prototypes -Wmissing-prototypes

-CFLAGS += -Wwrite-strings -Wredundant-decls -Wno-trigraphs 
+CFLAGS += -Wwrite-strings -Wredundant-decls -Wno-trigraphs

 CFLAGS += -Wstrict-aliasing -Wshadow
 ifeq ($(CONFIG_WARNINGS_ARE_ERRORS),y)
 CFLAGS += -Werror
 CFLAGS += -Wstrict-aliasing -Wshadow
 ifeq ($(CONFIG_WARNINGS_ARE_ERRORS),y)
 CFLAGS += -Werror

diff --git a/documentation/Kconfig.tex b/documentation/Kconfig.tex
index a21e7f243e44343cb53214ad1cf1568ce82f3e52..7254c5a5d231c2ddc273112b1af338bc525f9683 100644 (file)
--- a/documentation/Kconfig.tex
+++ b/documentation/Kconfig.tex
@@ -120,7 +120,7 @@ $(obj)/ssdt3.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci3.asl"
   iasl -p $(CURDIR)/pci3 -tc $(CONFIG_MAINBOARD)/
   perl -pi -e 's/AmlCode/AmlCode_ssdt3/g' pci3.hex
   mv pci3.hex ssdt3.c
   iasl -p $(CURDIR)/pci3 -tc $(CONFIG_MAINBOARD)/
   perl -pi -e 's/AmlCode/AmlCode_ssdt3/g' pci3.hex
   mv pci3.hex ssdt3.c

-  
+

 $(obj)/ssdt4.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci4.asl"
   iasl -p $(CURDIR)/pci4 -tc $(CONFIG_MAINBOARD)/dx/pci4.asl
   perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' pci4.hex
 $(obj)/ssdt4.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci4.asl"
   iasl -p $(CURDIR)/pci4 -tc $(CONFIG_MAINBOARD)/dx/pci4.asl
   perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' pci4.hex


@@ -470,7 +470,7 @@ we don't need to test for the chipset CONFIG variable. We
 can therefore test other variables (which is part of the reason
 we set up conditional inclusion of this file, instead
 of unconditionally including it). Here is an example from AMD 8111.
 can therefore test other variables (which is part of the reason
 we set up conditional inclusion of this file, instead
 of unconditionally including it). Here is an example from AMD 8111.

-No conditionals in this one yet. 
+No conditionals in this one yet.

 \begin{verbatim}
 driver-y += amd8111.o
 driver-y += amd8111_usb.o
 \begin{verbatim}
 driver-y += amd8111.o
 driver-y += amd8111_usb.o

diff --git a/documentation/LinuxBIOS-AMD64.tex b/documentation/LinuxBIOS-AMD64.tex
index c5fa8bf537f427f545aaa93cf2a35ba364eb4716..2ee057e42c1beee658b9d2c33a7db5d98b00c23e 100644 (file)
--- a/documentation/LinuxBIOS-AMD64.tex
+++ b/documentation/LinuxBIOS-AMD64.tex
@@ -1,7 +1,7 @@
 %
 % This document is released under the GPL
 % Initially written by Stefan Reinauer, <stepan@coresystems.de>
 %
 % This document is released under the GPL
 % Initially written by Stefan Reinauer, <stepan@coresystems.de>

-% 
+%

 
 \documentclass[titlepage,12pt]{article}
 \usepackage{a4}
 
 \documentclass[titlepage,12pt]{article}
 \usepackage{a4}


@@ -38,7 +38,7 @@
 
 \maketitle
 
 
 \maketitle
 

-\thispagestyle{empty}                                                           
+\thispagestyle{empty}

 
 \tableofcontents
 
 
 \tableofcontents
 


@@ -67,7 +67,7 @@ find errors in the following descriptions, contact
  \item 2009/04/19 replace LinuxBIOS with coreboot
  \item 2004/06/02 url and language fixes from Ken Fuchs $<$kfuchs@winternet.com$>$
  \item 2004/02/10 acpi and option rom updates
  \item 2009/04/19 replace LinuxBIOS with coreboot
  \item 2004/06/02 url and language fixes from Ken Fuchs $<$kfuchs@winternet.com$>$
  \item 2004/02/10 acpi and option rom updates

- \item 2003/11/18 initial release 
+ \item 2003/11/18 initial release

  \end{itemize}
 
 
  \end{itemize}
 
 


@@ -78,7 +78,7 @@ find errors in the following descriptions, contact
 
 \section{What is coreboot?}
 
 
 \section{What is coreboot?}
 

-coreboot aims to replace the normal BIOS found on x86, AMD64, PPC, 
+coreboot aims to replace the normal BIOS found on x86, AMD64, PPC,

 Alpha, and other machines with a Linux kernel that can boot Linux from a cold
 start. The startup code of an average coreboot port is about 500 lines of
 assembly and 5000 lines of C. It executes 16 instructions to get into 32bit
 Alpha, and other machines with a Linux kernel that can boot Linux from a cold
 start. The startup code of an average coreboot port is about 500 lines of
 assembly and 5000 lines of C. It executes 16 instructions to get into 32bit


@@ -131,7 +131,7 @@ $ cd coreboot
 
 You can get the entire source tree via SVN:
 
 
 You can get the entire source tree via SVN:
 

-{ \small 
+{ \small

 \begin{verbatim}
 $ svn co svn://coreboot.org/repos/trunk/coreboot-v2
 \end{verbatim}
 \begin{verbatim}
 $ svn co svn://coreboot.org/repos/trunk/coreboot-v2
 \end{verbatim}


@@ -151,7 +151,7 @@ is available at \url{http://qa.coreboot.org/}.
 Due to major structural enhancements to \hbox{coreboot}, AMD64 support
 is only available in the \texttt{coreboot-v2} tree. This tree reflects (as
 of November 2003) coreboot version 1.1.5 and will lead to coreboot 2.0
 Due to major structural enhancements to \hbox{coreboot}, AMD64 support
 is only available in the \texttt{coreboot-v2} tree. This tree reflects (as
 of November 2003) coreboot version 1.1.5 and will lead to coreboot 2.0

-when finished.  Most x86 hardware is currently only supported by the 
+when finished.  Most x86 hardware is currently only supported by the

 coreboot 1.0 tree.
 
 %
 coreboot 1.0 tree.
 
 %


@@ -163,7 +163,7 @@ To support a large variety of existing hardware coreboot allows for a
 lot of configuration options that can be tweaked in several ways:
 
 \begin{itemize}
 lot of configuration options that can be tweaked in several ways:
 
 \begin{itemize}

-\item 
+\item

 Firmware image specific configuration options can be set in the image
 configuration file which is usually found in
 \texttt{coreboot-v2/targets/$<$vendor$>$/$<$mainboard$>$/}.  Such
 Firmware image specific configuration options can be set in the image
 configuration file which is usually found in
 \texttt{coreboot-v2/targets/$<$vendor$>$/$<$mainboard$>$/}.  Such


@@ -217,7 +217,7 @@ instance for the AMD Solo Athlon64 mainboard enter:
 This will create a directory containing a Makefile and other software
 components needed for this build. The directory name is defined in the
 firmware image specific configuration file. In the case of AMD's Solo
 This will create a directory containing a Makefile and other software
 components needed for this build. The directory name is defined in the
 firmware image specific configuration file. In the case of AMD's Solo

-mainboard the default directory resides in 
+mainboard the default directory resides in

 \texttt{coreboot-v2/targets/amd/solo/solo}. To build the coreboot image, do
 
 \begin{verbatim}
 \texttt{coreboot-v2/targets/amd/solo/solo}. To build the coreboot image, do
 
 \begin{verbatim}


@@ -257,7 +257,7 @@ configuration files share some basic rules
 \begin{itemize}
 \item
 The default configuration file name in coreboot is \texttt{Config.lb}.
 \begin{itemize}
 \item
 The default configuration file name in coreboot is \texttt{Config.lb}.

-\item 
+\item

 All variables used in a configuration file have to be declared in this
 file with \texttt{uses VARNAME} before usage.
 \item
 All variables used in a configuration file have to be declared in this
 file with \texttt{uses VARNAME} before usage.
 \item


@@ -267,13 +267,13 @@ Comments can be added on a new line by using the comment identifier
 coreboot distinguishes between statements and options. Statements cause
 the coreboot configuration mechanism to act, whereas options set
 variables that are used by the build scripts or source code.
 coreboot distinguishes between statements and options. Statements cause
 the coreboot configuration mechanism to act, whereas options set
 variables that are used by the build scripts or source code.

-\item 
+\item

 Default configuration values can be set in the mainboard configuration
 files (keyword default)
 Default configuration values can be set in the mainboard configuration
 files (keyword default)

-\item 
+\item

 Option overrides to the default configuration can only be specified in
 the build target configuration file
 Option overrides to the default configuration can only be specified in
 the build target configuration file

-\texttt{coreboot-v2/targets/$<$vendor$>$/$<$mainboard$>$/Config.lb} 
+\texttt{coreboot-v2/targets/$<$vendor$>$/$<$mainboard$>$/Config.lb}

 (keyword option)
 \end{itemize}
 
 (keyword option)
 \end{itemize}
 


@@ -290,7 +290,7 @@ used. Example:
 \end{verbatim}
 
 \textbf{NOTE:} Only configuration variables known to the configuration
 \end{verbatim}
 
 \textbf{NOTE:} Only configuration variables known to the configuration

-system can be used in configuration files. coreboot checks 
+system can be used in configuration files. coreboot checks

 \texttt{coreboot-v2/src/config/Options.lb} to see whether a configuration
 variable is known.
 
 \texttt{coreboot-v2/src/config/Options.lb} to see whether a configuration
 variable is known.
 


@@ -298,7 +298,7 @@ variable is known.
 
 The \texttt{default} statement is used to set a configuration variable
 with an overridable default value. It is commonly used in mainboard
 
 The \texttt{default} statement is used to set a configuration variable
 with an overridable default value. It is commonly used in mainboard

-configuration files.  
+configuration files.

 
 Example:
 
 
 Example:
 


@@ -320,7 +320,7 @@ Also, simple expressions are allowed:
 \end{verbatim}
 
 If an option contains a string, this string has to be protected with
 \end{verbatim}
 
 If an option contains a string, this string has to be protected with

-quotation marks: 
+quotation marks:

 
 \begin{verbatim}
         default CC="gcc -m32"
 
 \begin{verbatim}
         default CC="gcc -m32"


@@ -400,7 +400,7 @@ option on how to set them.
 \item \begin{verbatim}CC\end{verbatim}
 
 Target C Compiler. Default is \texttt{\$(CROSS\_COMPILE)gcc}. Set to
 \item \begin{verbatim}CC\end{verbatim}
 
 Target C Compiler. Default is \texttt{\$(CROSS\_COMPILE)gcc}. Set to

-\texttt{gcc -m32} for compiling AMD64 coreboot images on an AMD64 
+\texttt{gcc -m32} for compiling AMD64 coreboot images on an AMD64

 machine.
 
 \item \begin{verbatim}CONFIG_CHIP_CONFIGURE \end{verbatim}
 machine.
 
 \item \begin{verbatim}CONFIG_CHIP_CONFIGURE \end{verbatim}


@@ -415,7 +415,7 @@ Errors or log messages up to this level can be printed. Default is
 
 \item \begin{verbatim}CONFIG_DEFAULT_CONSOLE_LOGLEVEL\end{verbatim}
 
 
 \item \begin{verbatim}CONFIG_DEFAULT_CONSOLE_LOGLEVEL\end{verbatim}
 

-Console will log at this level unless changed. Default is \texttt{7}, 
+Console will log at this level unless changed. Default is \texttt{7},

 minimum is \texttt{0}, maximum is \texttt{10}.
 
 \item \begin{verbatim}CONFIG_CONSOLE_SERIAL8250\end{verbatim}
 minimum is \texttt{0}, maximum is \texttt{10}.
 
 \item \begin{verbatim}CONFIG_CONSOLE_SERIAL8250\end{verbatim}


@@ -430,7 +430,7 @@ Size of final ROM image. This option has no default value.
 
 \item \begin{verbatim}CONFIG_FALLBACK_SIZE\end{verbatim}
 
 
 \item \begin{verbatim}CONFIG_FALLBACK_SIZE\end{verbatim}
 

-Fallback image size. Defaults to \texttt{65536} bytes. \textbf{NOTE:} 
+Fallback image size. Defaults to \texttt{65536} bytes. \textbf{NOTE:}

 This does not include the fallback payload.
 
 \item \begin{verbatim}CONFIG_HAVE_OPTION_TABLE\end{verbatim}
 This does not include the fallback payload.
 
 \item \begin{verbatim}CONFIG_HAVE_OPTION_TABLE\end{verbatim}


@@ -482,9 +482,9 @@ using romcc and/or the GNU assembler.  This code enables caches and
 registers, early mtrr settings, fallback mechanisms, dram init and
 possibly more.
 
 registers, early mtrr settings, fallback mechanisms, dram init and
 possibly more.
 

-\textbf{NOTE:} The \texttt{option} keyword can not be used in mainboard 
-specific configuration files.  Options shall instead be set using the 
-\texttt{default} keyword so that they can be overridden by the image 
+\textbf{NOTE:} The \texttt{option} keyword can not be used in mainboard
+specific configuration files.  Options shall instead be set using the
+\texttt{default} keyword so that they can be overridden by the image

 specific configuration files if needed.
 
 \subsubsection{Mainboard specific keywords}
 specific configuration files if needed.
 
 \subsubsection{Mainboard specific keywords}


@@ -539,7 +539,7 @@ during the build process. This is useful if external utilities have to
 be used for the build. coreboot on AMD64 uses romcc for it's early
 startup code placed in auto.c.
 
 be used for the build. coreboot on AMD64 uses romcc for it's early
 startup code placed in auto.c.
 

-To tell the configuration mechanism how to build \texttt{romcc} files, 
+To tell the configuration mechanism how to build \texttt{romcc} files,

 do:
 
 \begin{verbatim}
 do:
 
 \begin{verbatim}


@@ -556,7 +556,7 @@ end
 \end{verbatim}
 
 Each \texttt{makerule} section contains file dependencies (using the
 \end{verbatim}
 
 Each \texttt{makerule} section contains file dependencies (using the

-texttt{depends} keyword) and an action that is taken when the dependencies 
+texttt{depends} keyword) and an action that is taken when the dependencies

 are satisfied (using the \texttt{action} keyword).
 
 \item \begin{verbatim}mainboardinit\end{verbatim}
 are satisfied (using the \texttt{action} keyword).
 
 \item \begin{verbatim}mainboardinit\end{verbatim}


@@ -668,7 +668,7 @@ couple of \texttt{pci} keywords.
 The first occurrence of the \texttt{pci} keyword tells coreboot where
 the bridge devices start, relative to the PCI configuration space used
 by the bridge. The following occurences of the \texttt{pci} keyword
 The first occurrence of the \texttt{pci} keyword tells coreboot where
 the bridge devices start, relative to the PCI configuration space used
 by the bridge. The following occurences of the \texttt{pci} keyword

-describe the provided devices. 
+describe the provided devices.

 
 Adding the option \texttt{on} or \texttt{off} to a PCI device will
 enable or disable this device. This feature can be used if some bridge
 
 Adding the option \texttt{on} or \texttt{off} to a PCI device will
 enable or disable this device. This feature can be used if some bridge


@@ -820,7 +820,7 @@ decompression is needed).
 
 %
 % 10. Tweaking the source code
 
 %
 % 10. Tweaking the source code

-% 
+%

 
 \section{Tweaking the source code}
 Besides configuring the existing code it is sometimes necessary or
 
 \section{Tweaking the source code}
 Besides configuring the existing code it is sometimes necessary or


@@ -1083,7 +1083,7 @@ This will make coreboot look for the file \\
 \texttt{coreboot-v2/src/mainboard/<vendor>/<mainboard>/irq\_tables.c} which
 contains the source code definition of the IRQ table. coreboot corrects
 small inconsistencies in the IRQ table during startup (checksum and
 \texttt{coreboot-v2/src/mainboard/<vendor>/<mainboard>/irq\_tables.c} which
 contains the source code definition of the IRQ table. coreboot corrects
 small inconsistencies in the IRQ table during startup (checksum and

-number of entries), but it is not yet writing IRQ tables in a completely 
+number of entries), but it is not yet writing IRQ tables in a completely

 dynamic way.
 
 \textbf{NOTE:} To get Linux to understand and actually use the IRQ
 dynamic way.
 
 \textbf{NOTE:} To get Linux to understand and actually use the IRQ


@@ -1125,7 +1125,7 @@ revisions.
 
 There is initial ACPI support in coreboot now. Currently the only gain with
 this is the ability to use HPET timers in Linux. To achieve this, there is a
 
 There is initial ACPI support in coreboot now. Currently the only gain with
 this is the ability to use HPET timers in Linux. To achieve this, there is a

-framework that can generate the following tables: 
+framework that can generate the following tables:

 \begin{itemize}
 \item RSDP
 \item RSDT
 \begin{itemize}
 \item RSDP
 \item RSDT


@@ -1143,7 +1143,7 @@ option CONFIG_HAVE_ACPI_TABLES=1
 
 To keep Linux doing it's pci ressource allocation based on IRQ tables and MP
 tables, you have to specify the kernel parameter \texttt{pci=noacpi} otherwise
 
 To keep Linux doing it's pci ressource allocation based on IRQ tables and MP
 tables, you have to specify the kernel parameter \texttt{pci=noacpi} otherwise

-your PCI devices won't get interrupts. 
+your PCI devices won't get interrupts.

 It's likely that more ACPI support will follow, when there is need for certain
 features.
 
 It's likely that more ACPI support will follow, when there is need for certain
 features.
 


@@ -1162,7 +1162,7 @@ port 80 POST output, you need a POST expansion card for ISA or PCI. Port
 80 POST allows simple debugging without any other output method
 available (serial interface or VGA display)
 \item
 80 POST allows simple debugging without any other output method
 available (serial interface or VGA display)
 \item

-\emph{Serial POST}. 
+\emph{Serial POST}.

 This option allows to push POST messages to the serial interface instead
 of using IO ports. \textbf{NOTE:} The serial interface has to be
 initialized before serial POST can work. To use serial POST, set the
 This option allows to push POST messages to the serial interface instead
 of using IO ports. \textbf{NOTE:} The serial interface has to be
 initialized before serial POST can work. To use serial POST, set the


@@ -1244,7 +1244,7 @@ reset code in your mainboard specific configuration file
 \end{verbatim}
 
 The C source file \texttt{reset.c} (resulting in \texttt{reset.o}
 \end{verbatim}
 
 The C source file \texttt{reset.c} (resulting in \texttt{reset.o}

-during compilation) shall define the following function to take care 
+during compilation) shall define the following function to take care

 of the system reset:
 
 \begin{verbatim}
 of the system reset:
 
 \begin{verbatim}


@@ -1337,7 +1337,7 @@ position within the CMOS memory. The layout file looks as follows:
     [..]
            392      3      e        5    baud_rate
     [..]
     [..]
            392      3      e        5    baud_rate
     [..]

-    
+

     # configid value human readable description
       5        0     115200
       5        1      57600
     # configid value human readable description
       5        0     115200
       5        1      57600


@@ -1347,7 +1347,7 @@ position within the CMOS memory. The layout file looks as follows:
       5        5       4800
       5        6       2400
       5        7       1200
       5        5       4800
       5        6       2400
       5        7       1200

-    
+

 \end{verbatim}
 
 To change CMOS values from a running Linux system, use the
 \end{verbatim}
 
 To change CMOS values from a running Linux system, use the


@@ -1388,9 +1388,9 @@ network):
             range 192.168.1.0 192.168.1.31;
             option broadcastaddress 192.168.1.255;
     }
             range 192.168.1.0 192.168.1.31;
             option broadcastaddress 192.168.1.255;
     }

-    
+

     ddnsupdatestyle adhoc;
     ddnsupdatestyle adhoc;

-    
+

     host hammer12 {
             hardware ethernet 00:04:76:EA:64:31;
             fixedaddress 192.168.1.24;
     host hammer12 {
             hardware ethernet 00:04:76:EA:64:31;
             fixedaddress 192.168.1.24;


@@ -1522,11 +1522,11 @@ CONs:
 %
 
 \section{Image types}
 %
 
 \section{Image types}

-There used to be one image type for coreboot, as described above. Since this paper was written (2004) there have been many changes. First, the name 
+There used to be one image type for coreboot, as described above. Since this paper was written (2004) there have been many changes. First, the name

 was changed to coreboot, for many reasons. Second, Cache As Ram support (CAR)
 was changed to coreboot, for many reasons. Second, Cache As Ram support (CAR)

-was added for many AMD CPUs, which both simplified and complicated things. Simplification came with the removal of romcc; complication came with the addition of new ways to build. 
+was added for many AMD CPUs, which both simplified and complicated things. Simplification came with the removal of romcc; complication came with the addition of new ways to build.

 
 

-There are two big additions to the build process and, furthermore, more than two new CONFIG variables to control them. 
+There are two big additions to the build process and, furthermore, more than two new CONFIG variables to control them.

 
 \begin{itemize}
 \item \begin{verbatim}CONFIG_USE_DCACHE_RAM\end{verbatim}
 
 \begin{itemize}
 \item \begin{verbatim}CONFIG_USE_DCACHE_RAM\end{verbatim}


@@ -1544,19 +1544,19 @@ Set to \texttt{1} to use printk, instead of the primitive print functions, in CA
 \end{itemize}
 
 Before going over the new image types, derived from v3, we will quickly review the standard v2 image types. We are hoping this review will
 \end{itemize}
 
 Before going over the new image types, derived from v3, we will quickly review the standard v2 image types. We are hoping this review will

-aid comprehension. 
+aid comprehension.

 
 

-A coreboot rom file consists of one or more \textit{images}. All images consist of a part that runs in ROM, and a part that runs in RAM. The RAM can be in  compressed form and is decompressed when needed by the ROM code. The main function of the ROM code is to get memory working. Both ROM and RAM consist of a very small amount of assembly code and mostly C code. 
+A coreboot rom file consists of one or more \textit{images}. All images consist of a part that runs in ROM, and a part that runs in RAM. The RAM can be in  compressed form and is decompressed when needed by the ROM code. The main function of the ROM code is to get memory working. Both ROM and RAM consist of a very small amount of assembly code and mostly C code.

 
 \subsection{romcc images (from emulation/qemu)}
 
 \subsection{romcc images (from emulation/qemu)}

-ROMCC images are so-called because C code for the ROM part is compiled with romcc. romcc is an optimizing C compiler which compiles one, and only 
-one file; to get more than one file, one must include the C code via include statements. The main ROM code .c file is usually called auto.c. 
+ROMCC images are so-called because C code for the ROM part is compiled with romcc. romcc is an optimizing C compiler which compiles one, and only
+one file; to get more than one file, one must include the C code via include statements. The main ROM code .c file is usually called auto.c.

 \subsubsection{How it is built}
 \subsubsection{How it is built}

-Romcc compiles auto.c to produce auto.inc. auto.inc is included in the main crt0.S, which is then preprocessed to produce crt0.s. The inclusion of files into crt0.S is controlled by the CONFIG\_CRT0\_INCLUDES variable. crt0.s is then assembled. 
+Romcc compiles auto.c to produce auto.inc. auto.inc is included in the main crt0.S, which is then preprocessed to produce crt0.s. The inclusion of files into crt0.S is controlled by the CONFIG\_CRT0\_INCLUDES variable. crt0.s is then assembled.

 
 

-File for the ram part are compiled in a conventional manner. 
+File for the ram part are compiled in a conventional manner.

 
 

-The final step is linking. The use of named sections is used very heavily in coreboot to control where different bits of code go. The reset vector must go in the top 16 bytes. The start portion of the ROM code must go in the top 64K bytes, since most chipsets only enable this much ROM at startup time. Here is a quick look at a typical image: 
+The final step is linking. The use of named sections is used very heavily in coreboot to control where different bits of code go. The reset vector must go in the top 16 bytes. The start portion of the ROM code must go in the top 64K bytes, since most chipsets only enable this much ROM at startup time. Here is a quick look at a typical image:

 \begin{verbatim}
   [Nr] Name              Type            Addr     Off    Size   ES Flg Lk Inf Al
   [ 0]                   NULL            00000000 000000 000000 00      0   0  0
 \begin{verbatim}
   [Nr] Name              Type            Addr     Off    Size   ES Flg Lk Inf Al
   [ 0]                   NULL            00000000 000000 000000 00      0   0  0


@@ -1569,30 +1569,30 @@ The final step is linking. The use of named sections is used very heavily in cor
   [ 7] .strtab           STRTAB          00000000 007da0 000bfd 00      0   0  1
 \end{verbatim}
 
   [ 7] .strtab           STRTAB          00000000 007da0 000bfd 00      0   0  1
 \end{verbatim}
 

-The only sections that get loaded into a ROM are the Allocated ones. We can see the .ram, .rom, .reset and .id sections. 
+The only sections that get loaded into a ROM are the Allocated ones. We can see the .ram, .rom, .reset and .id sections.

 \subsubsection{layout}
 \subsubsection{layout}

-As we mentioned, the ROM file consists of multiple images. In the basic file, there are two full coreboot rom images. The build sequence for each is the same, and in fact the ldscript.ld files are almost identical. The only difference is in a few makefile variables, generated by the config tool. 
+As we mentioned, the ROM file consists of multiple images. In the basic file, there are two full coreboot rom images. The build sequence for each is the same, and in fact the ldscript.ld files are almost identical. The only difference is in a few makefile variables, generated by the config tool.

 
 \begin{itemize}
 
 \begin{itemize}

-\item CONFIG\_PAYLOAD\_SIZE. Each image may have a different payload size. 
-\item CONFIG\_ROMBASE Each image must have a different base in rom. 
-\item CONFIG\_RESET Unclear what this is used for. 
+\item CONFIG\_PAYLOAD\_SIZE. Each image may have a different payload size.
+\item CONFIG\_ROMBASE Each image must have a different base in rom.
+\item CONFIG\_RESET Unclear what this is used for.

 \item CONFIG\_EXCEPTION\_VECTORS where an optional IDT might go.
 \item CONFIG\_EXCEPTION\_VECTORS where an optional IDT might go.

-\item CONFIG\_USE\_OPTION\_TABLE if set, an option table section will be linked in. 
-\item CONFIG\_ROM\_PAYLOAD\_START This is the soon-to-be-deprecated way of locating a payload. cbfs eliminates this. 
+\item CONFIG\_USE\_OPTION\_TABLE if set, an option table section will be linked in.
+\item CONFIG\_ROM\_PAYLOAD\_START This is the soon-to-be-deprecated way of locating a payload. cbfs eliminates this.

 \item CONFIG\_USE\_FALLBACK\_IMAGE Whether this is a fallback or normal image
 \item CONFIG\_USE\_FALLBACK\_IMAGE Whether this is a fallback or normal image

-\item CONFIG\_ROM\_SECTION\_SIZE Essentially, the payload size. Soon to be deprecated. 
+\item CONFIG\_ROM\_SECTION\_SIZE Essentially, the payload size. Soon to be deprecated.

 \item CONFIG\_ROM\_IMAGE\_SIZE Size of this image (i.e. fallback or normal image)
 \item CONFIG\_ROM\_SIZE Total size of the ROM
 \item CONFIG\_ROM\_IMAGE\_SIZE Size of this image (i.e. fallback or normal image)
 \item CONFIG\_ROM\_SIZE Total size of the ROM

-\item CONFIG\_XIP\_RAM\_BASE The start of eXecute In Place code. XIP allows for not copying code to ram, but just running it from ROM. 
+\item CONFIG\_XIP\_RAM\_BASE The start of eXecute In Place code. XIP allows for not copying code to ram, but just running it from ROM.

 \end{itemize}
 
 \end{itemize}
 

-Each image (normal or fallback) is built completely independently and does not get linked to the other. They are assembled into one ROM image by the (soon to be deprecated) buildrom tool, or by the cbfs tool. 
+Each image (normal or fallback) is built completely independently and does not get linked to the other. They are assembled into one ROM image by the (soon to be deprecated) buildrom tool, or by the cbfs tool.

 
 \subsubsection{boot sequence}
 
 \subsubsection{boot sequence}

-We boot and start at fffffff0. We then jump to the entry point at \_start.  \_start does some machine init and an lgdt and jumps to \_\_protected\_start, at which point we are in protected mode. The code does a bit more machine setup and then starts executing the romcc code. 
+We boot and start at fffffff0. We then jump to the entry point at \_start.  \_start does some machine init and an lgdt and jumps to \_\_protected\_start, at which point we are in protected mode. The code does a bit more machine setup and then starts executing the romcc code.

 
 

-If fallback has been built in, some setup needs to be done. On some machines, it is extensive. Full rom decoding must be enabled. This may in turn require additional PCI setup to enable decoding to be enabled (!). To decided which image to use, hardware registers (cold boot on the Opteron) or CMOS are checked. Finally, once the image to use has been decided, a jmp is performed, viz: 
+If fallback has been built in, some setup needs to be done. On some machines, it is extensive. Full rom decoding must be enabled. This may in turn require additional PCI setup to enable decoding to be enabled (!). To decided which image to use, hardware registers (cold boot on the Opteron) or CMOS are checked. Finally, once the image to use has been decided, a jmp is performed, viz:

 \begin{verbatim}
         /* This is the primary cpu how should I boot? */
         else if (do_normal_boot()) {
 \begin{verbatim}
         /* This is the primary cpu how should I boot? */
         else if (do_normal_boot()) {


@@ -1616,8 +1616,8 @@ If fallback has been built in, some setup needs to be done. On some machines, it
 #endif
         ;
 \end{verbatim}
 #endif
         ;
 \end{verbatim}

-How does the fallback image get the symbol for normal entry? Via magic in the ldscript.ld -- remember, the images are not linked to each other. 
-Finally, we can see this in the Config.lb for most mainboards: 
+How does the fallback image get the symbol for normal entry? Via magic in the ldscript.ld -- remember, the images are not linked to each other.
+Finally, we can see this in the Config.lb for most mainboards:

 \begin{verbatim}
 if CONFIG_USE_FALLBACK_IMAGE
         mainboardinit cpu/x86/16bit/reset16.inc
 \begin{verbatim}
 if CONFIG_USE_FALLBACK_IMAGE
         mainboardinit cpu/x86/16bit/reset16.inc


@@ -1627,27 +1627,27 @@ else
         ldscript /cpu/x86/32bit/reset32.lds
 end
 \end{verbatim}
         ldscript /cpu/x86/32bit/reset32.lds
 end
 \end{verbatim}

-What does this mean? the non-fallback image has a 32-bit entry point; fallback has a 16-bit entry point. The reason for this is that some code from fallback always runs, so as to pick fallback or normal; but the normal is always called from 32-bit code. 
+What does this mean? the non-fallback image has a 32-bit entry point; fallback has a 16-bit entry point. The reason for this is that some code from fallback always runs, so as to pick fallback or normal; but the normal is always called from 32-bit code.

 \subsection{car images (from lippert/roadrunner-lx)}
 \subsection{car images (from lippert/roadrunner-lx)}

-CAR images in their simplest form are modified romcc images. The file is usually cache\_as\_ram\_auto.c. C inclusion is still used. The main difference is in the build sequence. The compiler command line is a very slight changed: instead of using romcc to generate an auto.inc include file, gcc us used. Then, two perl scripts are used to rename the .text and .data sections to .rom.text and .rom.data respectively. 
+CAR images in their simplest form are modified romcc images. The file is usually cache\_as\_ram\_auto.c. C inclusion is still used. The main difference is in the build sequence. The compiler command line is a very slight changed: instead of using romcc to generate an auto.inc include file, gcc us used. Then, two perl scripts are used to rename the .text and .data sections to .rom.text and .rom.data respectively.

 \subsubsection{How it is built}
 \subsubsection{How it is built}

-The build is almost identical to the romcc build. Since the auto.inc file exists, it can be included as before. The crt0\_includes.h file has one addition: a file that enables CAR, in this case it is \textit{src/cpu/amd/model\_lx/cache\_as\_ram.inc}. 
+The build is almost identical to the romcc build. Since the auto.inc file exists, it can be included as before. The crt0\_includes.h file has one addition: a file that enables CAR, in this case it is \textit{src/cpu/amd/model\_lx/cache\_as\_ram.inc}.

 \subsubsection{layout}
 \subsubsection{layout}

-No significant change from romcc code. 
+No significant change from romcc code.

 \subsubsection{boot sequence}
 \subsubsection{boot sequence}

-No significant change from romcc code, except that the CAR code has to set up a stack. 
+No significant change from romcc code, except that the CAR code has to set up a stack.

 
 \subsection{car + CONFIG\_USE\_INIT images (new emulation/qemu}
 
 \subsection{car + CONFIG\_USE\_INIT images (new emulation/qemu}

-This type of image makes more use of the C compiler. In this type of image, in fact, 
-seperate compilation is possible but is not always used. Oddly enough, this option is only used in PPC boards. That said, we need to move to this way of building. Including C code is poor style. 
+This type of image makes more use of the C compiler. In this type of image, in fact,
+seperate compilation is possible but is not always used. Oddly enough, this option is only used in PPC boards. That said, we need to move to this way of building. Including C code is poor style.

 \subsubsection{How it is built}
 There is a make variable, INIT-OBJECTS, that for all our other targets is empty. In this type of build, INIT-OBJECTS is a list of C files that are created from the config tool initobject command. Again, with INIT-OBJECTS we can finally stop including .c files and go with seperate compilation.
 \subsubsection{layout}
 \subsubsection{How it is built}
 There is a make variable, INIT-OBJECTS, that for all our other targets is empty. In this type of build, INIT-OBJECTS is a list of C files that are created from the config tool initobject command. Again, with INIT-OBJECTS we can finally stop including .c files and go with seperate compilation.
 \subsubsection{layout}

-No significant change from romcc code. 
+No significant change from romcc code.

 \subsubsection{boot sequence}
 \subsubsection{boot sequence}

-No significant change from romcc code, except that the CAR code has to set up a stack. 
+No significant change from romcc code, except that the CAR code has to set up a stack.

 \subsection{car + CONFIG\_USE\_PRINTK\_IN\_CAR images}
 \subsection{car + CONFIG\_USE\_PRINTK\_IN\_CAR images}

-When CONFIG\_USE\_PRINTK\_IN\_CAR is set, the CAR code can use printk instead of the primitive print functions. This config variable is used in one of two ways. If CONFIG\_USE\_INIT is 0, then different .c files just include other .c files, as in console.c: 
+When CONFIG\_USE\_PRINTK\_IN\_CAR is set, the CAR code can use printk instead of the primitive print functions. This config variable is used in one of two ways. If CONFIG\_USE\_INIT is 0, then different .c files just include other .c files, as in console.c:

 \begin{verbatim}
 #if CONFIG_USE_PRINTK_IN_CAR == 0
 static void __console_tx_byte(unsigned char byte)
 \begin{verbatim}
 #if CONFIG_USE_PRINTK_IN_CAR == 0
 static void __console_tx_byte(unsigned char byte)


@@ -1670,9 +1670,9 @@ static void __console_tx_byte(unsigned char byte)
 
 #endif /* CONFIG_USE_PRINTK_IN_CAR */
 
 
 #endif /* CONFIG_USE_PRINTK_IN_CAR */
 

-\end{verbatim}\footnote{yuck!} 
+\end{verbatim}\footnote{yuck!}

 
 

-If CONFIG\_USE\_INIT is 1, then the Config.lb is configured differently: 
+If CONFIG\_USE\_INIT is 1, then the Config.lb is configured differently:

 \begin{verbatim}
 if CONFIG_USE_INIT
         if CONFIG_USE_PRINTK_IN_CAR
 \begin{verbatim}
 if CONFIG_USE_INIT
         if CONFIG_USE_PRINTK_IN_CAR


@@ -1680,14 +1680,14 @@ if CONFIG_USE_INIT
         end
 end
 
         end
 end
 

-\end{verbatim}\footnote{see previous footnote} 
+\end{verbatim}\footnote{see previous footnote}

 
 \subsubsection{layout}
 
 \subsubsection{layout}

-No significant change from romcc code. 
+No significant change from romcc code.

 \subsubsection{boot sequence}
 \subsubsection{boot sequence}

-No significant change from romcc code, except that the CAR code has to set up a stack. 
+No significant change from romcc code, except that the CAR code has to set up a stack.

 \subsection{failover}
 \subsection{failover}

-Failover is the newest way to lay out a ROM. The choice of which image to run is removed from the fallback image and moved into a small, standalone piece of code. The code is simple enough to show here: 
+Failover is the newest way to lay out a ROM. The choice of which image to run is removed from the fallback image and moved into a small, standalone piece of code. The code is simple enough to show here:

 \begin{verbatim}
 static unsigned long main(unsigned long bist)
 {
 \begin{verbatim}
 static unsigned long main(unsigned long bist)
 {


@@ -1707,7 +1707,7 @@ fallback_image:
 }
 
 \end{verbatim}
 }
 
 \end{verbatim}

-Some motherboards have a more complex bus structure (e.g. Opteron). In those cases, the failover can be more complex, as it requires some hardware initialization to work correctly. As of this writing (April 2009), these boards have their own failover: 
+Some motherboards have a more complex bus structure (e.g. Opteron). In those cases, the failover can be more complex, as it requires some hardware initialization to work correctly. As of this writing (April 2009), these boards have their own failover:

 \begin{quote}
 ./src/mainboard/iei/nova4899r/failover.c
 ./src/mainboard/emulation/qemu-x86/failover.c
 \begin{quote}
 ./src/mainboard/iei/nova4899r/failover.c
 ./src/mainboard/emulation/qemu-x86/failover.c


@@ -1723,7 +1723,7 @@ Some motherboards have a more complex bus structure (e.g. Opteron). In those cas
 ./src/mainboard/olpc/rev\_a/failover.c
 ./src/mainboard/via/epia-m/failover.c
 \end{quote}
 ./src/mainboard/olpc/rev\_a/failover.c
 ./src/mainboard/via/epia-m/failover.c
 \end{quote}

-Here is one of the more complicated ones: 
+Here is one of the more complicated ones:

 \begin{verbatim}
 static unsigned long main(unsigned long bist)
 {
 \begin{verbatim}
 static unsigned long main(unsigned long bist)
 {


@@ -1760,15 +1760,15 @@ static unsigned long main(unsigned long bist)
 }
 
 \end{verbatim}
 }
 
 \end{verbatim}

-They're not that different, in fact. So why are there different copies all over the tree? Simple: code inclusion. Most of the failover.c are different because they include different bits of code. Here is a key reason for killing C code inclusion in the tree. 
+They're not that different, in fact. So why are there different copies all over the tree? Simple: code inclusion. Most of the failover.c are different because they include different bits of code. Here is a key reason for killing C code inclusion in the tree.

 \subsubsection{How it is built}
 \subsubsection{How it is built}

-There two additional config variables: 
+There two additional config variables:

 \begin{itemize}
 \begin{itemize}

-\item HAVE\_FAILOVER\_IMAGE Has to be defined when certain files are included. 
+\item HAVE\_FAILOVER\_IMAGE Has to be defined when certain files are included.

 \item USE\_FAILOVER\_IMAGE Enables the use of the failover image
 \end{itemize}
 \item USE\_FAILOVER\_IMAGE Enables the use of the failover image
 \end{itemize}

-Confusingly enough, almost all the uses of these two variables are either nested or both required to be set, e.g. 
-The fallback and normal builds are the same. The target config has a new clause that looks like this: 
+Confusingly enough, almost all the uses of these two variables are either nested or both required to be set, e.g.
+The fallback and normal builds are the same. The target config has a new clause that looks like this:

 \begin{verbatim}
 romimage "failover"
         option CONFIG_USE_FAILOVER_IMAGE=1
 \begin{verbatim}
 romimage "failover"
         option CONFIG_USE_FAILOVER_IMAGE=1


@@ -1778,36 +1778,36 @@ romimage "failover"
         option COREBOOT_EXTRA_VERSION="\$(shell cat ../../VERSION)\_Failover"
 end
 \end{verbatim}
         option COREBOOT_EXTRA_VERSION="\$(shell cat ../../VERSION)\_Failover"
 end
 \end{verbatim}

-This new section uses some constructs not yet discussed in detail. XIP\_ROM\_SIZE just refers to the 
-fact that the failover code is eXecute In Place, i.e. not copied to RAM. Of course, the ROM part of normal/fallback is as well, so the usage of XIP here is somewhat confusing. Finally, the USE\_FAILOVER\_IMAGE variable is set, which changes code compilation in a few places. If we just consider non-mainbard files, there are: 
+This new section uses some constructs not yet discussed in detail. XIP\_ROM\_SIZE just refers to the
+fact that the failover code is eXecute In Place, i.e. not copied to RAM. Of course, the ROM part of normal/fallback is as well, so the usage of XIP here is somewhat confusing. Finally, the USE\_FAILOVER\_IMAGE variable is set, which changes code compilation in a few places. If we just consider non-mainbard files, there are:

 \begin{verbatim}
 src/cpu/amd/car/cache_as_ram.inc
 src/arch/i386/Config.lb
 \end{verbatim}
 For the cache\_as\_ram.inc file, the changes relate to the fact that failover code sets up CAR, so that fallback code need not.
 
 \begin{verbatim}
 src/cpu/amd/car/cache_as_ram.inc
 src/arch/i386/Config.lb
 \end{verbatim}
 For the cache\_as\_ram.inc file, the changes relate to the fact that failover code sets up CAR, so that fallback code need not.
 

-For the Config.lb, several aspects of build change. 
-When USE\_FAILOVER\_IMAGE, entry into both normal and fallback bios images is via a 32-bit entry point (when not defined, entry into fallback is a 16-entry point at the power-on reset vector). 
+For the Config.lb, several aspects of build change.
+When USE\_FAILOVER\_IMAGE, entry into both normal and fallback bios images is via a 32-bit entry point (when not defined, entry into fallback is a 16-entry point at the power-on reset vector).

 \subsubsection{layout}
 \subsubsection{layout}

-Failover.c becomes the new bootblock at the top of memory. It calls either normal or fallback. The address of normal and fallback is determined by ldscript magic. 
+Failover.c becomes the new bootblock at the top of memory. It calls either normal or fallback. The address of normal and fallback is determined by ldscript magic.

 \subsubsection{boot sequence}
 \subsubsection{boot sequence}

-failover.c tests a few variables and the calls the normal or fallback payload depending on those variables; usually they are CMOS settings. 
+failover.c tests a few variables and the calls the normal or fallback payload depending on those variables; usually they are CMOS settings.

 \subsection{Proposed new image forat}
 \subsection{Proposed new image forat}

-The new image format will use seperate compilation -- no C code included! -- on all files. 
+The new image format will use seperate compilation -- no C code included! -- on all files.

 
 

-The new design has a few key goals: 
+The new design has a few key goals:

 \begin{itemize}
 \begin{itemize}

-\item Always use a bootblock (currently called failover). 
-The name failover.c, being utterly obscure, will not be used; instead, we will name the file bootblock.c. Instead of having a different copy for each mainboard, we can have just one copy. 
+\item Always use a bootblock (currently called failover).
+The name failover.c, being utterly obscure, will not be used; instead, we will name the file bootblock.c. Instead of having a different copy for each mainboard, we can have just one copy.

 \item Always use seperate compilation
 \item Always use printk etc. in the ROM code
 \item Always use seperate compilation
 \item Always use printk etc. in the ROM code

-\item (longer term) from the bootblock, always use cbfs to locate the normal/fallback etc. code. This code will be XIP. 
+\item (longer term) from the bootblock, always use cbfs to locate the normal/fallback etc. code. This code will be XIP.

 \end{itemize}
 
 \subsubsection{How it is built}
 \end{itemize}
 
 \subsubsection{How it is built}

-For now, since we are still using the config tool, we'll need a new command: bootblockobject, which creates a list of files to be included in the bootblock.   Not a lot else will have to change. We are going to move to using the v3 CAR code assembly code (one or two files at most, instead of many) and, instead of the thicket of little ldscript files, one ldscript file. This strategy is subject to modification as events dictate. 
+For now, since we are still using the config tool, we'll need a new command: bootblockobject, which creates a list of files to be included in the bootblock.   Not a lot else will have to change. We are going to move to using the v3 CAR code assembly code (one or two files at most, instead of many) and, instead of the thicket of little ldscript files, one ldscript file. This strategy is subject to modification as events dictate.

 \subsubsection{layout}
 \subsubsection{layout}

-Almost the same, for now, as the current failover code. 
+Almost the same, for now, as the current failover code.

 \subsubsection{boot sequence}
 %
 % 14 Glossary
 \subsubsection{boot sequence}
 %
 % 14 Glossary


@@ -1839,11 +1839,11 @@ ROMs they can be electronically erased and reprogrammed.
 \subsection{Additional Papers on coreboot}
 
 \begin{itemize}
 \subsection{Additional Papers on coreboot}
 
 \begin{itemize}

- \item 
+ \item

  \textit{\url{http://www.coreboot.org/Documentation}}
  \textit{\url{http://www.coreboot.org/Documentation}}

- \item 
+ \item

  \textit{\url{http://www.lysator.liu.se/upplysning/fa/linuxbios.pdf}}
  \textit{\url{http://www.lysator.liu.se/upplysning/fa/linuxbios.pdf}}

- \item 
+ \item

  \textit{\url{http://portal.acm.org/citation.cfm?id=512627}}
 \end{itemize}
 
  \textit{\url{http://portal.acm.org/citation.cfm?id=512627}}
 \end{itemize}
 

diff --git a/documentation/Makefile b/documentation/Makefile
index dad6ecc52c256ab7e6502dc11777459c7b631b53..84ac0b58f14b1cea89e64a5047a3639a7e39c798 100644 (file)
--- a/documentation/Makefile
+++ b/documentation/Makefile
@@ -31,7 +31,7 @@ else ifneq ($(strip $(CONVERT)),)
        convert $< $@
 endif
 
        convert $< $@
 endif
 

-LinuxBIOS-AMD64.toc: $(FIGS) LinuxBIOS-AMD64.tex 
+LinuxBIOS-AMD64.toc: $(FIGS) LinuxBIOS-AMD64.tex

        # 2 times to make sure we have a current toc.
        $(PDFLATEX) LinuxBIOS-AMD64.tex
        $(PDFLATEX) LinuxBIOS-AMD64.tex
        # 2 times to make sure we have a current toc.
        $(PDFLATEX) LinuxBIOS-AMD64.tex
        $(PDFLATEX) LinuxBIOS-AMD64.tex

diff --git a/documentation/RFC/chip.tex b/documentation/RFC/chip.tex
index 58fa613a0afa6ed4cecb81fc1d87fa2f6748b55a..5e366b8461f0c59b0c3833749cbb1881d02cf081 100644 (file)
--- a/documentation/RFC/chip.tex
+++ b/documentation/RFC/chip.tex
@@ -2,17 +2,17 @@
 
 \begin{abstract}
 At the end of this document is the original message that motivated the
 
 \begin{abstract}
 At the end of this document is the original message that motivated the

-change. 
+change.

 \end{abstract}
 
 \section{Scope}
 This document defines how LinuxBIOS programmers can specify chips that
 \end{abstract}
 
 \section{Scope}
 This document defines how LinuxBIOS programmers can specify chips that

-are used, specified, and initalized. The current scope is for superio 
-chips, but the architecture should allow for specification of other chips such 
-as southbridges. Multiple chips of same or different type are supported. 
+are used, specified, and initalized. The current scope is for superio
+chips, but the architecture should allow for specification of other chips such
+as southbridges. Multiple chips of same or different type are supported.

 
 \section{Goals}
 
 \section{Goals}

-The goals of the new chip architecture are these: 
+The goals of the new chip architecture are these:

 \begin{itemize}
 \item seperate implementation details from specification in the Config file
 (translation: no more C code in Config files)
 \begin{itemize}
 \item seperate implementation details from specification in the Config file
 (translation: no more C code in Config files)


@@ -27,33 +27,33 @@ The specification looks like this:
 \begin{verbatim}
 chip <name> [path=<path>] ["<configuration>"]
 \end{verbatim}
 \begin{verbatim}
 chip <name> [path=<path>] ["<configuration>"]
 \end{verbatim}

-The name is in the standard LinuxBIOS form of type/vendor/name, e.g. 
-"southbridge/intel/piix4e" or "superio/ite/it8671f". The class of the 
-chip is derived from the first pathname component of the name, and the chip 
-configuration is derived from the following components. 
+The name is in the standard LinuxBIOS form of type/vendor/name, e.g.
+"southbridge/intel/piix4e" or "superio/ite/it8671f". The class of the
+chip is derived from the first pathname component of the name, and the chip
+configuration is derived from the following components.

 
 

-The path defines the access mechanism to the chip. 
-It is optional. If present, it overrides the default path to the chip. 
+The path defines the access mechanism to the chip.
+It is optional. If present, it overrides the default path to the chip.

 
 The configuration defines chip-specific configuration details, and is also
 
 The configuration defines chip-specific configuration details, and is also

-optional. Note that an empty configuration will leave the chip with 
-no enabled resources. This may be desirable in some cases. 
+optional. Note that an empty configuration will leave the chip with
+no enabled resources. This may be desirable in some cases.

 
 \section{Results of specifying a chip}
 
 When one or more chips are specified, the data about the chips
 is saved until the entire file is parsed. At this point, the config tool
 creates a file in the build directory called chip.c This file contains
 
 \section{Results of specifying a chip}
 
 When one or more chips are specified, the data about the chips
 is saved until the entire file is parsed. At this point, the config tool
 creates a file in the build directory called chip.c This file contains

-a common struct containing information about 
-each individual chip and an array of pointers to these structures. 
+a common struct containing information about
+each individual chip and an array of pointers to these structures.

 
 

-For each chip, there are two structures. The structures contain control 
-information for the chip, and register initialization information. The 
-names of the structures are derived by ``flattening'' the chip name, 
-as in the current linuxbios. For example, superio/ite/xyz uses 
+For each chip, there are two structures. The structures contain control
+information for the chip, and register initialization information. The
+names of the structures are derived by ``flattening'' the chip name,
+as in the current linuxbios. For example, superio/ite/xyz uses

 two structs, one called superio_ite_xyz_control and one called
 two structs, one called superio_ite_xyz_control and one called

-superio_ite_xyz_init. The control struct is initialized from the 
-chip name and path information, and has a pointer to the 
+superio_ite_xyz_init. The control struct is initialized from the
+chip name and path information, and has a pointer to the

 config struct. The config struct is initialized from the quote string
 
 \begin{verbatim}
 config struct. The config struct is initialized from the quote string
 
 \begin{verbatim}


@@ -64,29 +64,29 @@ To: linuxbios@clustermatic.org
 Subject: RFC:new superio proposal
 
 Abstract:
 Subject: RFC:new superio proposal
 
 Abstract:

-       The superio architecture for linuxbios has worked for the last 2 
-years but is being stretched to the limit by the changes in superio chips. 
-The architecture depended on superio resources being relatively constant 
-between chips, but this assumption no longer holds. In this document we 
-propose several alternatives and solicit comments. 
+       The superio architecture for linuxbios has worked for the last 2
+years but is being stretched to the limit by the changes in superio chips.
+The architecture depended on superio resources being relatively constant
+between chips, but this assumption no longer holds. In this document we
+propose several alternatives and solicit comments.

 
 Overview:
 
 Overview:

-The superio architecture in linuxbios was developed over time, and 
-modified as circumstances required. In the beginning it was relatively 
-simple and assumed only one superio per mainboard. The latest version 
+The superio architecture in linuxbios was developed over time, and
+modified as circumstances required. In the beginning it was relatively
+simple and assumed only one superio per mainboard. The latest version

 allows an arbitrary number of superios per mainboard, and allows complete
 specification of the superio base I/O address along with the specification
 allows an arbitrary number of superios per mainboard, and allows complete
 specification of the superio base I/O address along with the specification

-of reasonable default valures for both the base I/O address and the 
-superio parameters such as serial enable, baud rate, and so on. 
+of reasonable default valures for both the base I/O address and the
+superio parameters such as serial enable, baud rate, and so on.

 
 

-Specification of superio control parameters is done by a configuration 
+Specification of superio control parameters is done by a configuration

 line such as:
 
 nsuperio sis/950 com1={1} floppy=1  lpt=1
 
 line such as:
 
 nsuperio sis/950 com1={1} floppy=1  lpt=1
 

-This fragment sets the superio type to sis/950; sets com1, floppy, and lpt 
-to enabled; and leaves the defaults to com1 (baud rate, etc.) to the 
-default values. 
+This fragment sets the superio type to sis/950; sets com1, floppy, and lpt
+to enabled; and leaves the defaults to com1 (baud rate, etc.) to the
+default values.

 
 While it is not obvious, these configuration parameters are fragments of a
 C initializer. The initializers are used to build a statically initialized
 
 While it is not obvious, these configuration parameters are fragments of a
 C initializer. The initializers are used to build a statically initialized


@@ -96,7 +96,7 @@ struct superio {
         struct superio_control *super; // the ops for the device.
         unsigned int port; // if non-zero, overrides the default port
         // com ports. This is not done as an array (yet).
         struct superio_control *super; // the ops for the device.
         unsigned int port; // if non-zero, overrides the default port
         // com ports. This is not done as an array (yet).

-        // We think it's easier to set up from python if it is not an 
+        // We think it's easier to set up from python if it is not an

        // array.
         struct com_ports com1, com2, com3, com4;
         // DMA, if it exists.
        // array.
         struct com_ports com1, com2, com3, com4;
         // DMA, if it exists.


@@ -114,14 +114,14 @@ struct superio {
 
 These structures are, in turn, created and statically initialized by a
 config-tool-generated structure that defines all the superios. This file
 
 These structures are, in turn, created and statically initialized by a
 config-tool-generated structure that defines all the superios. This file

-is called nsuperio.c, is created for each mainboard you build, only 
+is called nsuperio.c, is created for each mainboard you build, only

 appears in the build directory, and looks like this:
 
 ===
 appears in the build directory, and looks like this:
 
 ===

-extern struct superio_control superio_winbond_w83627hf_control; 
+extern struct superio_control superio_winbond_w83627hf_control;

 
 

-struct superio superio_winbond_w83627hf= { 
-  &superio_winbond_w83627hf_control, 
+struct superio superio_winbond_w83627hf= {
+  &superio_winbond_w83627hf_control,

   .com1={1}, .com2={1}, .floppy=1, .lpt=1, .keyboard=1, .hwmonitor=1};
 
 struct superio *all_superio[] = {&superio_winbond_w83627hf,
   .com1={1}, .com2={1}, .floppy=1, .lpt=1, .keyboard=1, .hwmonitor=1};
 
 struct superio *all_superio[] = {&superio_winbond_w83627hf,


@@ -131,12 +131,12 @@ unsigned long nsuperio = 1;
 ===
 
 This example shows a board with one superio (nsuperio). The superio
 ===
 
 This example shows a board with one superio (nsuperio). The superio

-consists of a winbond w83627hf, with com1, com2, floppy, lpt, keyboard, 
-and hwmonitor enabled. Note that this structure also allows for 
-over-riding the default superio base, although that capability is rarely 
-used. 
+consists of a winbond w83627hf, with com1, com2, floppy, lpt, keyboard,
+and hwmonitor enabled. Note that this structure also allows for
+over-riding the default superio base, although that capability is rarely
+used.

 
 

-The control structure is used to define how to access the superio for 
+The control structure is used to define how to access the superio for

 purposes of control. It looks like this:
 ===
 struct superio_control {
 purposes of control. It looks like this:
 ===
 struct superio_control {


@@ -151,13 +151,13 @@ struct superio_control {
 };
 ===
 
 };
 ===
 

-There are three methods for stages of hardwaremain. First is pre_pci_init 
-(for chips like the acer southbridge that require you to enable some 
-resources BEFORE pci scan); init, called during the 'middle' phase of 
-hardwaremain; and finishup, called before the payload is loaded. 
+There are three methods for stages of hardwaremain. First is pre_pci_init
+(for chips like the acer southbridge that require you to enable some
+resources BEFORE pci scan); init, called during the 'middle' phase of
+hardwaremain; and finishup, called before the payload is loaded.

 
 

-This approach was inspired by and borrows heavily on the Plan 9 kernel 
-configuration tools. 
+This approach was inspired by and borrows heavily on the Plan 9 kernel
+configuration tools.

 
 The problem:
 
 
 The problem:
 


@@ -166,22 +166,22 @@ smaller. It has grown and in the limit this structure is the union of all
 possibly superio chips. Obviously, in the long term, this is not
 practical: we can not anticipate all possible superio chips for all time.
 
 possibly superio chips. Obviously, in the long term, this is not
 practical: we can not anticipate all possible superio chips for all time.
 

-The common PC BIOS solution to this type of problem is to continue with 
-binary structures but add version numbers to them, so that all code that 
-uses a given structure has to check the version number. Personally, I find 
-this grotesque and would rather not work this way. 
+The common PC BIOS solution to this type of problem is to continue with
+binary structures but add version numbers to them, so that all code that
+uses a given structure has to check the version number. Personally, I find
+this grotesque and would rather not work this way.

 
 

-Using textual strings for configuration is something I find far more 
-attractive. Plan 9 has shown that this approach has no real limits and 
-suffices for configuration tasks. The Linux kernel does more limited use 
-of strings for configuration, but still depends on them. Strings are 
-easier to read and work with than binary structures, and more important, a 
-lot easier to deal with when things start going wrong. 
+Using textual strings for configuration is something I find far more
+attractive. Plan 9 has shown that this approach has no real limits and
+suffices for configuration tasks. The Linux kernel does more limited use
+of strings for configuration, but still depends on them. Strings are
+easier to read and work with than binary structures, and more important, a
+lot easier to deal with when things start going wrong.

 
 The proposed solution:
 
 
 The proposed solution:
 

-What follows are three possible ideas for specifying superio resources and 
-their settings. 
+What follows are three possible ideas for specifying superio resources and
+their settings.

 
 A common part of the new idea is to eliminate the common superio
 structure, due to the many variations in chips, and make it invisible
 
 A common part of the new idea is to eliminate the common superio
 structure, due to the many variations in chips, and make it invisible


@@ -203,9 +203,9 @@ struct superio_control {
   char *name;
 };
 
   char *name;
 };
 

-I.e. we add a new function for creating the superio. 
+I.e. we add a new function for creating the superio.

 
 

-Communication of superio settings from linuxbios to the superio would be 
+Communication of superio settings from linuxbios to the superio would be

 via textual strings. The superio structure becomes this:
 
 struct superio {
 via textual strings. The superio structure becomes this:
 
 struct superio {


@@ -215,7 +215,7 @@ struct superio {
 };
 
 
 };
 
 

-So now the question becomes, what is the configuration structure? 
+So now the question becomes, what is the configuration structure?

 There are several choices. The simplest, from my point of view, are
 keyword-value pairs:
 struct configuration {
 There are several choices. The simplest, from my point of view, are
 keyword-value pairs:
 struct configuration {


@@ -223,11 +223,11 @@ struct configuration {
        const char *value;
 };
 
        const char *value;
 };
 

-These get filled in by the config tool as before. The linuxbios libary can 
-then provide a generic parsing function for the superios to use. 
+These get filled in by the config tool as before. The linuxbios libary can
+then provide a generic parsing function for the superios to use.

 
 

-The remaining question is how should the superio command look in 
-freebios2? 
+The remaining question is how should the superio command look in
+freebios2?

 
 superio sis/950 "com1=115200,8n1 lpt=1 com2=9600"
 
 
 superio sis/950 "com1=115200,8n1 lpt=1 com2=9600"
 


@@ -242,22 +242,22 @@ superio sis/950 ((com1 115200 8n1) (lpt 1))
 So,  my questions:
 
 1. Does this new scheme look workable. If not, what needs to change?
 So,  my questions:
 
 1. Does this new scheme look workable. If not, what needs to change?

-2. What should the 'struct configuration' be? does keyword/value work? 
-3. what should the superio command look like? 
+2. What should the 'struct configuration' be? does keyword/value work?
+3. what should the superio command look like?

 
 Comments welcome.
 
 
 Comments welcome.
 

-I'd like to adopt this "RFC" approach for freebios2 as much as we can.  
+I'd like to adopt this "RFC" approach for freebios2 as much as we can.

 There was a lot of give-and-take in the early days of linuxbios about
 structure and it proved useful. There's a lot that will start happening in
 freebios2 now, and we need to try to make sure it will work for everyone.
 
 Those of you who are doing mainboards, please look at freebios2 and see
 how it looks for you. There's a lot of good work that has been done (not
 There was a lot of give-and-take in the early days of linuxbios about
 structure and it proved useful. There's a lot that will start happening in
 freebios2 now, and we need to try to make sure it will work for everyone.
 
 Those of you who are doing mainboards, please look at freebios2 and see
 how it looks for you. There's a lot of good work that has been done (not

-by me so far, thanks Eric and Stefan), and more that needs to be done. 
-Consider trying out romcc as an "assembly code killer". See how it fits 
-together and if you can work with it or need changes. Bring comments back 
-to this list. 
+by me so far, thanks Eric and Stefan), and more that needs to be done.
+Consider trying out romcc as an "assembly code killer". See how it fits
+together and if you can work with it or need changes. Bring comments back
+to this list.

 
 thanks
 
 
 thanks
 

diff --git a/documentation/RFC/config.tex b/documentation/RFC/config.tex
index 879083e9712c85171b1a5551076dba890c577ade..6d6c43302529eb20196e7284374677711d120bf7 100644 (file)
--- a/documentation/RFC/config.tex
+++ b/documentation/RFC/config.tex
@@ -8,7 +8,7 @@ We describe the new configuration language for LinuxBIOS.
 This document defines the new configuration language for LinuxBIOS.
 
 \section{Goals}
 This document defines the new configuration language for LinuxBIOS.
 
 \section{Goals}

-The goals of the new language are these: 
+The goals of the new language are these:

 \begin{itemize}
 \item Simplified Makefiles so people can see what is set
 \item Move from the regular-expression-based language to something
 \begin{itemize}
 \item Simplified Makefiles so people can see what is set
 \item Move from the regular-expression-based language to something


@@ -16,22 +16,22 @@ a bit more comprehensible and flexible
 \item make the specification easier for people to use and understand
 \item allow unique register-set-specifiers for each chip
 \item allow generic register-set-specifiers for each chip
 \item make the specification easier for people to use and understand
 \item allow unique register-set-specifiers for each chip
 \item allow generic register-set-specifiers for each chip

-\item generate static initialization code, as needed, for the 
-specifiers. 
+\item generate static initialization code, as needed, for the
+specifiers.

 \end{itemize}
 
 \section{Language}
 Here is the new language. It is very similar to the old one, differing
 \end{itemize}
 
 \section{Language}
 Here is the new language. It is very similar to the old one, differing

-in only a few respects. It borrows heavily from Greg Watson's suggestions. 
+in only a few respects. It borrows heavily from Greg Watson's suggestions.

 
 

-I am presenting it in a pseudo-BNF in the hopes it will be easier. Things 
-in '' are keywords; things in ``'' are strings in the actual text. 
+I am presenting it in a pseudo-BNF in the hopes it will be easier. Things
+in '' are keywords; things in ``'' are strings in the actual text.

 \begin{verbatim}
 #exprs are composed of factor or factor + factor etc.
 expr ::= factor ( ``+'' factor | ``-'' factor | )*
 #factors are term or term * term or term / term or ...
 factor ::=  term ( ``*'' term | ``/'' term | ... )*
 \begin{verbatim}
 #exprs are composed of factor or factor + factor etc.
 expr ::= factor ( ``+'' factor | ``-'' factor | )*
 #factors are term or term * term or term / term or ...
 factor ::=  term ( ``*'' term | ``/'' term | ... )*

-# 
+#

 unary-op ::= ``!'' ID
 # term is a number, hexnumber, ID, unary-op, or a full-blown expression
 term ::= NUM | XNUM | ID | unary-op | ``(`` expr ``)''
 unary-op ::= ``!'' ID
 # term is a number, hexnumber, ID, unary-op, or a full-blown expression
 term ::= NUM | XNUM | ID | unary-op | ``(`` expr ``)''


@@ -39,27 +39,27 @@ term ::= NUM | XNUM | ID | unary-op | ``(`` expr ``)''
 # Option command. Can be an expression or quote-string.
 # Options are used in the config tool itself (in expressions and 'if')
 # and are also passed to the C compiler when building linuxbios.
 # Option command. Can be an expression or quote-string.
 # Options are used in the config tool itself (in expressions and 'if')
 # and are also passed to the C compiler when building linuxbios.

-# It is an error to have two option commands in a file. 
+# It is an error to have two option commands in a file.

 # It is an error to have an option command after the ID has been used
 #   in an expression (i.e. 'set after used' is an error)
 option ::= 'option' ID '=' (``value'' | term)
 
 # Default command. The ID is set to this value if no option command
 # It is an error to have an option command after the ID has been used
 #   in an expression (i.e. 'set after used' is an error)
 option ::= 'option' ID '=' (``value'' | term)
 
 # Default command. The ID is set to this value if no option command

-# is scanned. 
-# Multiple defaults for an ID will produce warning, but not errors. 
+# is scanned.
+# Multiple defaults for an ID will produce warning, but not errors.

 # It is OK to scan a default command after use of an ID.
 # Options always over-ride defaults.
 default ::= 'default' ID '=' (``value'' | term)
 
 # the mainboard, southbridge, northbridge commands
 # cause sourcing of Config.lb files as in the old config tool
 # It is OK to scan a default command after use of an ID.
 # Options always over-ride defaults.
 default ::= 'default' ID '=' (``value'' | term)
 
 # the mainboard, southbridge, northbridge commands
 # cause sourcing of Config.lb files as in the old config tool

-# as parts are sourced, a device tree is built. The structure 
+# as parts are sourced, a device tree is built. The structure

 # of the tree is determined by the structure of the components
 # as they are specified. To attach a superio to a southbridge, for
 # example, one would do this:
 # of the tree is determined by the structure of the components
 # as they are specified. To attach a superio to a southbridge, for
 # example, one would do this:

-# southbridge acer/5432 
-#   superio nsc/123 
-#   end 
+# southbridge acer/5432
+#   superio nsc/123
+#   end

 # end
 # the tool generates static initializers for this hierarchy.
 
 # end
 # the tool generates static initializers for this hierarchy.
 


@@ -79,17 +79,17 @@ register ::= 'register' ``CODE''
 mainboard ::= 'mainboard' PATH (statements)* 'end'
 
 # standard linuxbios commands
 mainboard ::= 'mainboard' PATH (statements)* 'end'
 
 # standard linuxbios commands

-southbridge ::= 'southbridge' PATH (statemnts)* 'end'                  
-northbridge ::= 'northbridge' PATH (statemnts)* 'end'                  
-superio ::= 'superio PATH (statemnts)* 'end'                   
-cpu ::= 'cpu' PATH (statemnts)* 'end'                  
-arch ::= 'arch' PATH (statemnts)* 'end'                        
+southbridge ::= 'southbridge' PATH (statemnts)* 'end'
+northbridge ::= 'northbridge' PATH (statemnts)* 'end'
+superio ::= 'superio PATH (statemnts)* 'end'
+cpu ::= 'cpu' PATH (statemnts)* 'end'
+arch ::= 'arch' PATH (statemnts)* 'end'

 
 # files for building linuxbios
 
 # files for building linuxbios

-# include a file in crt0.S 
-mainboardinit ::= 'mainboardinit' PATH 
+# include a file in crt0.S
+mainboardinit ::= 'mainboardinit' PATH

 
 

-# object file 
+# object file

 object ::= 'object' PATH
 # driver objects are just built into the image in a different way
 driver ::= 'driver' PATH
 object ::= 'object' PATH
 # driver objects are just built into the image in a different way
 driver ::= 'driver' PATH


@@ -116,7 +116,7 @@ makedefine ::= 'makedefine' ``RAWTEXT''
 addaction ::= 'addaction' PATH ``ACTION''
 
 # statements
 addaction ::= 'addaction' PATH ``ACTION''
 
 # statements

-statement ::= 
+statement ::=

                  option
                | default
                | cpu
                  option
                | default
                | cpu


@@ -204,12 +204,12 @@ ldscript cpu/i386/entry32.lds
 ###
 ### Build our reset vector (This is where linuxBIOS is entered)
 ###
 ###
 ### Build our reset vector (This is where linuxBIOS is entered)
 ###

-if CONFIG_USE_FALLBACK_IMAGE 
-       mainboardinit cpu/i386/reset16.inc 
-       ldscript cpu/i386/reset16.lds 
+if CONFIG_USE_FALLBACK_IMAGE
+       mainboardinit cpu/i386/reset16.inc
+       ldscript cpu/i386/reset16.lds

 else
 else

-       mainboardinit cpu/i386/reset32.inc 
-       ldscript cpu/i386/reset32.lds 
+       mainboardinit cpu/i386/reset32.inc
+       ldscript cpu/i386/reset32.lds

 end
 .
 .
 end
 .
 .


@@ -227,7 +227,7 @@ makerule ./auto.inc dep "./romcc ./auto.E" act "./romcc -O ./auto.E > auto.inc"
 mainboardinit ./auto.inc
 #
 ###
 mainboardinit ./auto.inc
 #
 ###

-### Include the secondary Configuration files 
+### Include the secondary Configuration files

 ###
 northbridge amd/amdk8
 end
 ###
 northbridge amd/amdk8
 end


@@ -286,6 +286,6 @@ export CC:=$(CONFIG_CROSS_COMPILE)gcc
 
 \end{verbatim}
 
 
 \end{verbatim}
 

-In other words, instead of expressions, we see the values. It's easier to 
-deal with. 
+In other words, instead of expressions, we see the values. It's easier to
+deal with.

 
 

diff --git a/documentation/cbfs.txt b/documentation/cbfs.txt
index 8ab437de9aa9b94f3cc1bb590a9fde9d155cadb5..61f9f794e71859034081df454488f52a6d392730 100644 (file)
--- a/documentation/cbfs.txt
+++ b/documentation/cbfs.txt
@@ -4,71 +4,71 @@ Received: from www.crouse-house.com ([199.45.160.146]
 From: Jordan Crouse <jordan@cosmicpenguin.net>
 
 
 From: Jordan Crouse <jordan@cosmicpenguin.net>
 
 

-Greetings.  I apologize for the incompleteness of what I am about to 
-discuss.  I was planning on working on it leisurely, but my employment 
-circumstances changed and I've been trying to get it completed in a 
+Greetings.  I apologize for the incompleteness of what I am about to
+discuss.  I was planning on working on it leisurely, but my employment
+circumstances changed and I've been trying to get it completed in a

 hurry before I had to leave it behind.
 
 hurry before I had to leave it behind.
 

-I've been thinking a lot about LAR lately, and ways to make it more 
-extensible and robust.  Marc and I have been trading ideas back and 
-forth for a number of months, and over time a clear idea of what I 
+I've been thinking a lot about LAR lately, and ways to make it more
+extensible and robust.  Marc and I have been trading ideas back and
+forth for a number of months, and over time a clear idea of what I

 wanted to do started to take shape.
 
 wanted to do started to take shape.
 

-My goal was to add small things to LAR while retaining the overall 
-scheme.  Over time, the scheme evolved slightly, but I think you'll find 
-that it remains true to the original idea.  Below is the beginnings of 
-an architecture document - I did it in text form, but if met with 
-aclaim, it should be wikified.  This presents what I call CBFS - the 
-next generation LAR for next generation Coreboot.  Its easier to 
+My goal was to add small things to LAR while retaining the overall
+scheme.  Over time, the scheme evolved slightly, but I think you'll find
+that it remains true to the original idea.  Below is the beginnings of
+an architecture document - I did it in text form, but if met with
+aclaim, it should be wikified.  This presents what I call CBFS - the
+next generation LAR for next generation Coreboot.  Its easier to

 describe what it is by describing what changed:
 
 describe what it is by describing what changed:
 

-A header has been added somewhere in the bootblock similar to Carl 
-Daniel's scheme.  In addition to the coreboot information, the header 
-reports the size of the ROM, the alignment of the blocks, and the offset 
-of the first component in the CBFS.   The master header provides all 
+A header has been added somewhere in the bootblock similar to Carl
+Daniel's scheme.  In addition to the coreboot information, the header
+reports the size of the ROM, the alignment of the blocks, and the offset
+of the first component in the CBFS.   The master header provides all

 the information LAR needs plus the magic number information flashrom needs.
 
 the information LAR needs plus the magic number information flashrom needs.
 

-Each "file" (or component, as I style them) now has a type associated 
-with it. The type is used by coreboot to identify the type of file that 
-it is loading, and it can also be used by payloads to group items in the 
+Each "file" (or component, as I style them) now has a type associated
+with it. The type is used by coreboot to identify the type of file that
+it is loading, and it can also be used by payloads to group items in the

 CBFS by type (i.e - bayou can ask for all components that are payloads).
 
 CBFS by type (i.e - bayou can ask for all components that are payloads).
 

-The header on each "file" (or component, as I like to style them) has 
-been simplified - We now only store the length, the type, the checksum, 
-and the offset to the data.  The name scheme remains the same.  The 
-addtional information, which is component specific, has been moved to 
+The header on each "file" (or component, as I like to style them) has
+been simplified - We now only store the length, the type, the checksum,
+and the offset to the data.  The name scheme remains the same.  The
+addtional information, which is component specific, has been moved to

 the component itself (see below).
 
 the component itself (see below).
 

-The components are arranged in the ROM aligned along the specified 
+The components are arranged in the ROM aligned along the specified

 alignment from the master header - this is to facilitate partial re-write.
 
 Other then that, the LAR ideas remain pretty much the same.
 
 alignment from the master header - this is to facilitate partial re-write.
 
 Other then that, the LAR ideas remain pretty much the same.
 

-The plan for moving the metadata to the components is to allow many 
-different kinds of components, not all of which are groked by coreboot. 
-  However, there are three essential component types that are groked by 
+The plan for moving the metadata to the components is to allow many
+different kinds of components, not all of which are groked by coreboot.
+  However, there are three essential component types that are groked by

 coreboot, and they are defined:
 
 coreboot, and they are defined:
 

-stage - the stage is being parsed from the original ELF, and stored in 
-the ROM as a single blob of binary data.  The load address, start 
+stage - the stage is being parsed from the original ELF, and stored in
+the ROM as a single blob of binary data.  The load address, start

 address, compression type and length are stored in the component sub-header.
 
 address, compression type and length are stored in the component sub-header.
 

-payload - this is essentially SELF in different clothing - same idea as 
+payload - this is essentially SELF in different clothing - same idea as

 SELF, with the sub-header as above.
 
 SELF, with the sub-header as above.
 

-optionrom - This is in flux - right now, the optionrom is stored 
+optionrom - This is in flux - right now, the optionrom is stored

 unadulterated and uncompressed, but that is likely to be changed.
 
 unadulterated and uncompressed, but that is likely to be changed.
 

-Following this email are two replies containing the v3 code and a new 
-ROM tool to implement this respectively.  I told you that I was trying 
-to get this out before I disappear, and I'm not kidding - the code is 
-compile tested and not run-tested.  I hope that somebody will embrace 
-this code and take it the rest of the way, otherwise it will die a 
+Following this email are two replies containing the v3 code and a new
+ROM tool to implement this respectively.  I told you that I was trying
+to get this out before I disappear, and I'm not kidding - the code is
+compile tested and not run-tested.  I hope that somebody will embrace
+this code and take it the rest of the way, otherwise it will die a

 pretty short death.
 
 pretty short death.
 

-I realize that this will start an awesome flamewar, and I'm looking 
-forward to it.  Thanks for listening to me over the years - and good 
-luck with coreboot.  When you all make a million dollars, send me a few 
+I realize that this will start an awesome flamewar, and I'm looking
+forward to it.  Thanks for listening to me over the years - and good
+luck with coreboot.  When you all make a million dollars, send me a few

 bucks, will you?
 
 Jordan
 bucks, will you?
 
 Jordan


@@ -152,7 +152,7 @@ struct cbfs_header {
 
 The meaning of each member is as follows:
 
 
 The meaning of each member is as follows:
 

-'magic' is a 32 bit number that identifies the ROM as a CBFS type.  The 
+'magic' is a 32 bit number that identifies the ROM as a CBFS type.  The

 magic
 number is 0x4F524243, which is 'ORBC' in ASCII.
 
 magic
 number is 0x4F524243, which is 'ORBC' in ASCII.
 


@@ -160,7 +160,7 @@ number is 0x4F524243, which is 'ORBC' in ASCII.
 0xFFFFFFFF to locate the beginning of the ROM in memory.
 
 'align' is the number of bytes that each component is aligned to within the
 0xFFFFFFFF to locate the beginning of the ROM in memory.
 
 'align' is the number of bytes that each component is aligned to within the

-ROM.  This is used to make sure that each component is aligned correctly 
+ROM.  This is used to make sure that each component is aligned correctly

 with
 regards to the erase block sizes on the ROM - allowing one to replace a
 component at runtime without disturbing the others.
 with
 regards to the erase block sizes on the ROM - allowing one to replace a
 component at runtime without disturbing the others.


@@ -170,7 +170,7 @@ the ROM).  This is to allow for arbitrary space to be left at the beginning
 of the ROM for things like embedded controller firmware.
 
 = Bootblock =
 of the ROM for things like embedded controller firmware.
 
 = Bootblock =

-The bootblock is a mandatory component in the ROM.  It is located in the 
+The bootblock is a mandatory component in the ROM.  It is located in the

 last
 20k of the ROM space, and contains, among other things, the location of the
 master header and the entry point for the loader firmware.  The bootblock
 last
 20k of the ROM space, and contains, among other things, the location of the
 master header and the entry point for the loader firmware.  The bootblock


@@ -179,11 +179,11 @@ does not have a component header attached to it.
 = Components =
 
 CBFS components are placed in the ROM starting at 'offset' specified in
 = Components =
 
 CBFS components are placed in the ROM starting at 'offset' specified in

-the master header and ending at the bootblock.  Thus the total size 
+the master header and ending at the bootblock.  Thus the total size

 available
 for components in the ROM is (ROM size - 20k - 'offset').  Each CBFS
 component is to be aligned according to the 'align' value in the header.
 available
 for components in the ROM is (ROM size - 20k - 'offset').  Each CBFS
 component is to be aligned according to the 'align' value in the header.

-Thus, if a component of size 1052 is located at offset 0 with an 'align' 
+Thus, if a component of size 1052 is located at offset 0 with an 'align'

 value
 of 1024, the next component will be located at offset 2048.
 
 value
 of 1024, the next component will be located at offset 2048.
 


@@ -214,12 +214,12 @@ below.
 'checksum' is a 32bit checksum of the entire component, including the
 header and name.
 
 'checksum' is a 32bit checksum of the entire component, including the
 header and name.
 

-'offset' is the start of the component data, based off the start of the 
+'offset' is the start of the component data, based off the start of the

 header.
 The difference between the size of the header and offset is the size of the
 component name.
 
 header.
 The difference between the size of the header and offset is the size of the
 component name.
 

-Immediately following the header will be the name of the component, 
+Immediately following the header will be the name of the component,

 which will
 null terminated and 16 byte aligned.   The following picture shows the
 structure of the header:
 which will
 null terminated and 16 byte aligned.   The following picture shows the
 structure of the header:


@@ -248,7 +248,7 @@ component was found.
 Upon recognizing a component, the software then has to search for the
 specific name of the component.  This is accomplished by comparing the
 desired name with the string on the component located at
 Upon recognizing a component, the software then has to search for the
 specific name of the component.  This is accomplished by comparing the
 desired name with the string on the component located at

-offset + sizeof(struct cbfs_file).  If the string matches, then the 
+offset + sizeof(struct cbfs_file).  If the string matches, then the

 component
 has been located, otherwise the software should add 'offset' + 'len' to
 the offset and resume the search for the magic value.
 component
 has been located, otherwise the software should add 'offset' + 'len' to
 the offset and resume the search for the magic value.

diff --git a/documentation/codeflow.svg b/documentation/codeflow.svg
index eccf19dbb44c76eb3ead17b48044cc05e2bd9e7c..bed95997577d0032cef4629243145091a915512b 100644 (file)
--- a/documentation/codeflow.svg
+++ b/documentation/codeflow.svg
@@ -97,7 +97,7 @@
                                        <g>
                                                <g>
                                                        <g>
                                        <g>
                                                <g>
                                                        <g>

-                                                               <polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,31.246 130.359,46.62 132.854,44.7 
+                                                               <polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,31.246 130.359,46.62 132.854,44.7

                                                                        132.027,51.206 131.201,57.711 124.701,56.845 118.201,55.98 120.608,54.127 110.178,33.439                                                                "/>
                                                        </g>
                                                        <polygon fill="#231F20" points="131.101,57.636 132.228,59.101 133.828,45.178 133.062,44.181                                                     "/>
                                                                        132.027,51.206 131.201,57.711 124.701,56.845 118.201,55.98 120.608,54.127 110.178,33.439                                                                "/>
                                                        </g>
                                                        <polygon fill="#231F20" points="131.101,57.636 132.228,59.101 133.828,45.178 133.062,44.181                                                     "/>


@@ -117,7 +117,7 @@
                                        <g>
                                                <g>
                                                        <g>
                                        <g>
                                                <g>
                                                        <g>

-                                                               <polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,81.246 130.359,96.62 132.854,94.7 
+                                                               <polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,81.246 130.359,96.62 132.854,94.7

                                                                        132.027,101.206 131.201,107.711 124.701,106.845 118.201,105.98 120.608,104.127 110.178,83.439                                                           "/>
                                                        </g>
                                                        <polygon fill="#231F20" points="131.101,107.636 132.228,109.101 133.828,95.178 133.062,94.181                                                   "/>
                                                                        132.027,101.206 131.201,107.711 124.701,106.845 118.201,105.98 120.608,104.127 110.178,83.439                                                           "/>
                                                        </g>
                                                        <polygon fill="#231F20" points="131.101,107.636 132.228,109.101 133.828,95.178 133.062,94.181                                                   "/>


@@ -137,7 +137,7 @@
                                        <g>
                                                <g>
                                                        <g>
                                        <g>
                                                <g>
                                                        <g>

-                                                               <polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,151.586 130.359,166.961 132.854,165.041 
+                                                               <polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,151.586 130.359,166.961 132.854,165.041

                                                                        132.027,171.546 131.201,178.052 124.701,177.186 118.201,176.321 120.608,174.468 110.178,153.78                                                          "/>
                                                        </g>
                                                        <polygon fill="#231F20" points="131.101,177.977 132.228,179.442 133.828,165.519 133.062,164.522                                                         "/>
                                                                        132.027,171.546 131.201,178.052 124.701,177.186 118.201,176.321 120.608,174.468 110.178,153.78                                                          "/>
                                                        </g>
                                                        <polygon fill="#231F20" points="131.101,177.977 132.228,179.442 133.828,165.519 133.062,164.522                                                         "/>


@@ -157,7 +157,7 @@
                                        <g>
                                                <g>
                                                        <g>
                                        <g>
                                                <g>
                                                        <g>

-                                                               <polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,227.013 130.359,242.387 132.854,240.467 
+                                                               <polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,227.013 130.359,242.387 132.854,240.467

                                                                        132.027,246.973 131.201,253.478 124.701,252.612 118.201,251.747 120.608,249.894 110.178,229.207                                                                 "/>
                                                        </g>
                                                        <polygon fill="#231F20" points="131.101,253.403 132.228,254.868 133.828,240.945 133.062,239.948                                                         "/>
                                                                        132.027,246.973 131.201,253.478 124.701,252.612 118.201,251.747 120.608,249.894 110.178,229.207                                                                 "/>
                                                        </g>
                                                        <polygon fill="#231F20" points="131.101,253.403 132.228,254.868 133.828,240.945 133.062,239.948                                                         "/>


@@ -177,7 +177,7 @@
                                        <g>
                                                <g>
                                                        <g>
                                        <g>
                                                <g>
                                                        <g>

-                                                               <polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,303.013 130.359,318.388 132.854,316.468 
+                                                               <polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,303.013 130.359,318.388 132.854,316.468

                                                                        132.027,322.973 131.201,329.479 124.701,328.612 118.201,327.747 120.607,325.895 110.178,305.207                                                                 "/>
                                                        </g>
                                                        <polygon fill="#231F20" points="131.101,329.404 132.228,330.868 133.829,316.945 133.062,315.948                                                         "/>
                                                                        132.027,322.973 131.201,329.479 124.701,328.612 118.201,327.747 120.607,325.895 110.178,305.207                                                                 "/>
                                                        </g>
                                                        <polygon fill="#231F20" points="131.101,329.404 132.228,330.868 133.829,316.945 133.062,315.948                                                         "/>


@@ -197,7 +197,7 @@
                                        <g>
                                                <g>
                                                        <g>
                                        <g>
                                                <g>
                                                        <g>

-                                                               <polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,395.872 130.359,411.247 132.854,409.327 
+                                                               <polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,395.872 130.359,411.247 132.854,409.327

                                                                        132.027,415.833 131.201,422.338 124.701,421.473 118.201,420.606 120.608,418.754 110.178,398.066                                                                 "/>
                                                        </g>
                                                        <polygon fill="#231F20" points="131.101,422.264 132.228,423.728 133.828,409.805 133.062,408.808                                                         "/>
                                                                        132.027,415.833 131.201,422.338 124.701,421.473 118.201,420.606 120.608,418.754 110.178,398.066                                                                 "/>
                                                        </g>
                                                        <polygon fill="#231F20" points="131.101,422.264 132.228,423.728 133.828,409.805 133.062,408.808                                                         "/>


@@ -217,7 +217,7 @@
                                        <g>
                                                <g>
                                                        <g>
                                        <g>
                                                <g>
                                                        <g>

-                                                               <polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,452.152 130.359,467.528 132.854,465.608 
+                                                               <polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,452.152 130.359,467.528 132.854,465.608

                                                                        132.027,472.113 131.201,478.619 124.701,477.753 118.201,476.888 120.607,475.035 110.178,454.347                                                                 "/>
                                                        </g>
                                                        <polygon fill="#231F20" points="131.101,478.545 132.228,480.009 133.829,466.085 133.062,465.089                                                         "/>
                                                                        132.027,472.113 131.201,478.619 124.701,477.753 118.201,476.888 120.607,475.035 110.178,454.347                                                                 "/>
                                                        </g>
                                                        <polygon fill="#231F20" points="131.101,478.545 132.228,480.009 133.829,466.085 133.062,465.089                                                         "/>

diff --git a/payloads/bayou/bayou.xml.example b/payloads/bayou/bayou.xml.example
index 471ac35ce92217d6468e83781015494ad6752b3f..60fa78301040bbbe7a16610bba6449cc14023aa8 100644 (file)
--- a/payloads/bayou/bayou.xml.example
+++ b/payloads/bayou/bayou.xml.example
@@ -29,11 +29,11 @@
       <chain>
        <file>payloads/passwd.elf</file>
        <lar>passwd</lar>
       <chain>
        <file>payloads/passwd.elf</file>
        <lar>passwd</lar>

-      </chain>      
+      </chain>

       <chain>
        <file>payloads/coreinfo.elf</file>
       </chain>
       <chain>
        <file>payloads/coreinfo.elf</file>
       </chain>

-    </payload>    
+    </payload>

     <payload type="chooser">
       <file>payloads/coreinfo.elf</file>
     </payload>
     <payload type="chooser">
       <file>payloads/coreinfo.elf</file>
     </payload>

diff --git a/payloads/bayou/lzmadecode.c b/payloads/bayou/lzmadecode.c
index 1c96283fbbbb6cbccb20829533f149c8a74ee43d..b03415f35e7a0f35341ab40bc5b93208752801cf 100644 (file)
--- a/payloads/bayou/lzmadecode.c
+++ b/payloads/bayou/lzmadecode.c
@@ -1,21 +1,21 @@
 /*
   LzmaDecode.c
   LZMA Decoder (optimized for Speed version)
 /*
   LzmaDecode.c
   LZMA Decoder (optimized for Speed version)

-  
+

   LZMA SDK 4.40 Copyright (c) 1999-2006 Igor Pavlov (2006-05-01)
   http://www.7-zip.org/
 
   LZMA SDK is licensed under two licenses:
   1) GNU Lesser General Public License (GNU LGPL)
   2) Common Public License (CPL)
   LZMA SDK 4.40 Copyright (c) 1999-2006 Igor Pavlov (2006-05-01)
   http://www.7-zip.org/
 
   LZMA SDK is licensed under two licenses:
   1) GNU Lesser General Public License (GNU LGPL)
   2) Common Public License (CPL)

-  It means that you can select one of these two licenses and 
+  It means that you can select one of these two licenses and

   follow rules of that license.
 
   SPECIAL EXCEPTION:
   follow rules of that license.
 
   SPECIAL EXCEPTION:

-  Igor Pavlov, as the author of this Code, expressly permits you to 
-  statically or dynamically link your Code (or bind by name) to the 
-  interfaces of this file without subjecting your linked Code to the 
-  terms of the CPL or GNU LGPL. Any modifications or additions 
+  Igor Pavlov, as the author of this Code, expressly permits you to
+  statically or dynamically link your Code (or bind by name) to the
+  interfaces of this file without subjecting your linked Code to the
+  terms of the CPL or GNU LGPL. Any modifications or additions

   to this file, however, are subject to the LGPL or CPL terms.
 */
 
   to this file, however, are subject to the LGPL or CPL terms.
 */
 


@@ -37,7 +37,7 @@
 #define RC_TEST { if (Buffer == BufferLim) return LZMA_RESULT_DATA_ERROR; }
 
 #define RC_INIT(buffer, bufferSize) Buffer = buffer; BufferLim = buffer + bufferSize; RC_INIT2
 #define RC_TEST { if (Buffer == BufferLim) return LZMA_RESULT_DATA_ERROR; }
 
 #define RC_INIT(buffer, bufferSize) Buffer = buffer; BufferLim = buffer + bufferSize; RC_INIT2

- 
+

 
 #define RC_NORMALIZE if (Range < kTopValue) { RC_TEST; Range <<= 8; Code = (Code << 8) | RC_READ_BYTE; }
 
 
 #define RC_NORMALIZE if (Range < kTopValue) { RC_TEST; Range <<= 8; Code = (Code << 8) | RC_READ_BYTE; }
 


@@ -47,9 +47,9 @@
 
 #define RC_GET_BIT2(p, mi, A0, A1) IfBit0(p) \
   { UpdateBit0(p); mi <<= 1; A0; } else \
 
 #define RC_GET_BIT2(p, mi, A0, A1) IfBit0(p) \
   { UpdateBit0(p); mi <<= 1; A0; } else \

-  { UpdateBit1(p); mi = (mi + mi) + 1; A1; } 
-  
-#define RC_GET_BIT(p, mi) RC_GET_BIT2(p, mi, ; , ;)               
+  { UpdateBit1(p); mi = (mi + mi) + 1; A1; }
+
+#define RC_GET_BIT(p, mi) RC_GET_BIT2(p, mi, ; , ;)

 
 #define RangeDecoderBitTreeDecode(probs, numLevels, res) \
   { int i = numLevels; res = 1; \
 
 #define RangeDecoderBitTreeDecode(probs, numLevels, res) \
   { int i = numLevels; res = 1; \


@@ -72,7 +72,7 @@
 #define LenLow (LenChoice2 + 1)
 #define LenMid (LenLow + (kNumPosStatesMax << kLenNumLowBits))
 #define LenHigh (LenMid + (kNumPosStatesMax << kLenNumMidBits))
 #define LenLow (LenChoice2 + 1)
 #define LenMid (LenLow + (kNumPosStatesMax << kLenNumLowBits))
 #define LenHigh (LenMid + (kNumPosStatesMax << kLenNumMidBits))

-#define kNumLenProbs (LenHigh + kLenNumHighSymbols) 
+#define kNumLenProbs (LenHigh + kLenNumHighSymbols)

 
 
 #define kNumStates 12
 
 
 #define kNumStates 12


@@ -161,7 +161,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
     for (i = 0; i < numProbs; i++)
       p[i] = kBitModelTotal >> 1;
   }
     for (i = 0; i < numProbs; i++)
       p[i] = kBitModelTotal >> 1;
   }

-  
+

   RC_INIT(inStream, inSize);
 
 
   RC_INIT(inStream, inSize);
 
 


@@ -170,7 +170,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
     CProb *prob;
     UInt32 bound;
     int posState = (int)(
     CProb *prob;
     UInt32 bound;
     int posState = (int)(

-        (nowPos 
+        (nowPos

         )
         & posStateMask);
 
         )
         & posStateMask);
 


@@ -179,9 +179,9 @@ int LzmaDecode(CLzmaDecoderState *vs,
     {
       int symbol = 1;
       UpdateBit0(prob)
     {
       int symbol = 1;
       UpdateBit0(prob)

-      prob = p + Literal + (LZMA_LIT_SIZE * 
+      prob = p + Literal + (LZMA_LIT_SIZE *

         (((
         (((

-        (nowPos 
+        (nowPos

         )
         & literalPosMask) << lc) + (previousByte >> (8 - lc))));
 
         )
         & literalPosMask) << lc) + (previousByte >> (8 - lc))));
 


@@ -212,7 +212,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
       else if (state < 10) state -= 3;
       else state -= 6;
     }
       else if (state < 10) state -= 3;
       else state -= 6;
     }

-    else             
+    else

     {
       UpdateBit1(prob);
       prob = p + IsRep + state;
     {
       UpdateBit1(prob);
       prob = p + IsRep + state;


@@ -236,10 +236,10 @@ int LzmaDecode(CLzmaDecoderState *vs,
           IfBit0(prob)
           {
             UpdateBit0(prob);
           IfBit0(prob)
           {
             UpdateBit0(prob);

-            
+

             if (nowPos == 0)
               return LZMA_RESULT_DATA_ERROR;
             if (nowPos == 0)
               return LZMA_RESULT_DATA_ERROR;

-            
+

             state = state < kNumLitStates ? 9 : 11;
             previousByte = outStream[nowPos - rep0];
             outStream[nowPos++] = previousByte;
             state = state < kNumLitStates ? 9 : 11;
             previousByte = outStream[nowPos - rep0];
             outStream[nowPos++] = previousByte;


@@ -261,7 +261,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
             UpdateBit0(prob);
             distance = rep1;
           }
             UpdateBit0(prob);
             distance = rep1;
           }

-          else 
+          else

           {
             UpdateBit1(prob);
             prob = p + IsRepG2 + state;
           {
             UpdateBit1(prob);
             prob = p + IsRepG2 + state;


@@ -322,7 +322,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
         int posSlot;
         state += kNumLitStates;
         prob = p + PosSlot +
         int posSlot;
         state += kNumLitStates;
         prob = p + PosSlot +

-            ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) << 
+            ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) <<

             kNumPosSlotBits);
         RangeDecoderBitTreeDecode(prob, kNumPosSlotBits, posSlot);
         if (posSlot >= kStartPosModelIndex)
             kNumPosSlotBits);
         RangeDecoderBitTreeDecode(prob, kNumPosSlotBits, posSlot);
         if (posSlot >= kStartPosModelIndex)

diff --git a/payloads/bayou/lzmadecode.h b/payloads/bayou/lzmadecode.h
index f885446ced145c32713a93ac59e5eb493e10e0ab..37712455e96ad02f5cda61aa8327eead1c269a77 100644 (file)
--- a/payloads/bayou/lzmadecode.h
+++ b/payloads/bayou/lzmadecode.h
@@ -1,4 +1,4 @@
-/* 
+/*

   LzmaDecode.h
   LZMA Decoder interface
 
   LzmaDecode.h
   LZMA Decoder interface
 


@@ -8,14 +8,14 @@
   LZMA SDK is licensed under two licenses:
   1) GNU Lesser General Public License (GNU LGPL)
   2) Common Public License (CPL)
   LZMA SDK is licensed under two licenses:
   1) GNU Lesser General Public License (GNU LGPL)
   2) Common Public License (CPL)

-  It means that you can select one of these two licenses and 
+  It means that you can select one of these two licenses and

   follow rules of that license.
 
   SPECIAL EXCEPTION:
   follow rules of that license.
 
   SPECIAL EXCEPTION:

-  Igor Pavlov, as the author of this code, expressly permits you to 
-  statically or dynamically link your code (or bind by name) to the 
-  interfaces of this file without subjecting your linked code to the 
-  terms of the CPL or GNU LGPL. Any modifications or additions 
+  Igor Pavlov, as the author of this code, expressly permits you to
+  statically or dynamically link your code (or bind by name) to the
+  interfaces of this file without subjecting your linked code to the
+  terms of the CPL or GNU LGPL. Any modifications or additions

   to this file, however, are subject to the LGPL or CPL terms.
 */
 
   to this file, however, are subject to the LGPL or CPL terms.
 */
 

diff --git a/payloads/bayou/nrv2b.c b/payloads/bayou/nrv2b.c
index 11f977e7e4166ff0b09ec9990b99a5a2826caa3b..dbfb91a9537a0e6849b864e4b4d15f96a146400d 100644 (file)
--- a/payloads/bayou/nrv2b.c
+++ b/payloads/bayou/nrv2b.c
@@ -1,6 +1,6 @@
 #include <libpayload.h>
 
 #include <libpayload.h>
 

-// This GETBIT is supposed to work on little endian 
+// This GETBIT is supposed to work on little endian

 // 32bit systems. The algorithm will definitely need
 // some fixing on other systems, but it might not be
 // a problem since the nrv2b binary behaves the same..
 // 32bit systems. The algorithm will definitely need
 // some fixing on other systems, but it might not be
 // a problem since the nrv2b binary behaves the same..


@@ -40,7 +40,7 @@ unsigned long unrv2b(u8 *src, u8 *dst, unsigned long *ilen_p)
 
        // skip length
        src += 4;
 
        // skip length
        src += 4;

-       /* FIXME: check olen with the length stored in first 4 bytes */ 
+       /* FIXME: check olen with the length stored in first 4 bytes */

 
        for (;;) {
                unsigned int m_off, m_len;
 
        for (;;) {
                unsigned int m_off, m_len;

diff --git a/payloads/bayou/util/pbuilder/lzma/C/7zip/Decompress/LzmaDecode.c b/payloads/bayou/util/pbuilder/lzma/C/7zip/Decompress/LzmaDecode.c
index 21bf40bde0655a6ca133f3ca51b64864ae8202ff..83508436df170f48332996e1abcab7a1b42b1b67 100644 (file)
--- a/payloads/bayou/util/pbuilder/lzma/C/7zip/Decompress/LzmaDecode.c
+++ b/payloads/bayou/util/pbuilder/lzma/C/7zip/Decompress/LzmaDecode.c
@@ -1,21 +1,21 @@
 /*
   LzmaDecode.c
   LZMA Decoder (optimized for Speed version)
 /*
   LzmaDecode.c
   LZMA Decoder (optimized for Speed version)

-  
+

   LZMA SDK 4.22 Copyright (c) 1999-2005 Igor Pavlov (2005-06-10)
   http://www.7-zip.org/
 
   LZMA SDK is licensed under two licenses:
   1) GNU Lesser General Public License (GNU LGPL)
   2) Common Public License (CPL)
   LZMA SDK 4.22 Copyright (c) 1999-2005 Igor Pavlov (2005-06-10)
   http://www.7-zip.org/
 
   LZMA SDK is licensed under two licenses:
   1) GNU Lesser General Public License (GNU LGPL)
   2) Common Public License (CPL)

-  It means that you can select one of these two licenses and 
+  It means that you can select one of these two licenses and

   follow rules of that license.
 
   SPECIAL EXCEPTION:
   follow rules of that license.
 
   SPECIAL EXCEPTION:

-  Igor Pavlov, as the author of this Code, expressly permits you to 
-  statically or dynamically link your Code (or bind by name) to the 
-  interfaces of this file without subjecting your linked Code to the 
-  terms of the CPL or GNU LGPL. Any modifications or additions 
+  Igor Pavlov, as the author of this Code, expressly permits you to
+  statically or dynamically link your Code (or bind by name) to the
+  interfaces of this file without subjecting your linked Code to the
+  terms of the CPL or GNU LGPL. Any modifications or additions

   to this file, however, are subject to the LGPL or CPL terms.
 */
 
   to this file, however, are subject to the LGPL or CPL terms.
 */
 


@@ -50,7 +50,7 @@
 #define RC_TEST { if (Buffer == BufferLim) return LZMA_RESULT_DATA_ERROR; }
 
 #define RC_INIT(buffer, bufferSize) Buffer = buffer; BufferLim = buffer + bufferSize; RC_INIT2
 #define RC_TEST { if (Buffer == BufferLim) return LZMA_RESULT_DATA_ERROR; }
 
 #define RC_INIT(buffer, bufferSize) Buffer = buffer; BufferLim = buffer + bufferSize; RC_INIT2

- 
+

 #endif
 
 #define RC_NORMALIZE if (Range < kTopValue) { RC_TEST; Range <<= 8; Code = (Code << 8) | RC_READ_BYTE; }
 #endif
 
 #define RC_NORMALIZE if (Range < kTopValue) { RC_TEST; Range <<= 8; Code = (Code << 8) | RC_READ_BYTE; }


@@ -61,9 +61,9 @@
 
 #define RC_GET_BIT2(p, mi, A0, A1) IfBit0(p) \
   { UpdateBit0(p); mi <<= 1; A0; } else \
 
 #define RC_GET_BIT2(p, mi, A0, A1) IfBit0(p) \
   { UpdateBit0(p); mi <<= 1; A0; } else \

-  { UpdateBit1(p); mi = (mi + mi) + 1; A1; } 
-  
-#define RC_GET_BIT(p, mi) RC_GET_BIT2(p, mi, ; , ;)               
+  { UpdateBit1(p); mi = (mi + mi) + 1; A1; }
+
+#define RC_GET_BIT(p, mi) RC_GET_BIT2(p, mi, ; , ;)

 
 #define RangeDecoderBitTreeDecode(probs, numLevels, res) \
   { int i = numLevels; res = 1; \
 
 #define RangeDecoderBitTreeDecode(probs, numLevels, res) \
   { int i = numLevels; res = 1; \


@@ -86,7 +86,7 @@
 #define LenLow (LenChoice2 + 1)
 #define LenMid (LenLow + (kNumPosStatesMax << kLenNumLowBits))
 #define LenHigh (LenMid + (kNumPosStatesMax << kLenNumMidBits))
 #define LenLow (LenChoice2 + 1)
 #define LenMid (LenLow + (kNumPosStatesMax << kLenNumLowBits))
 #define LenHigh (LenMid + (kNumPosStatesMax << kLenNumMidBits))

-#define kNumLenProbs (LenHigh + kLenNumHighSymbols) 
+#define kNumLenProbs (LenHigh + kLenNumHighSymbols)

 
 
 #define kNumStates 12
 
 
 #define kNumStates 12


@@ -172,7 +172,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
   int lc = vs->Properties.lc;
 
   #ifdef _LZMA_OUT_READ
   int lc = vs->Properties.lc;
 
   #ifdef _LZMA_OUT_READ

-  
+

   UInt32 Range = vs->Range;
   UInt32 Code = vs->Code;
   #ifdef _LZMA_IN_CB
   UInt32 Range = vs->Range;
   UInt32 Code = vs->Code;
   #ifdef _LZMA_IN_CB


@@ -214,7 +214,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
       UInt32 numProbs = Literal + ((UInt32)LZMA_LIT_SIZE << (lc + vs->Properties.lp));
       UInt32 i;
       for (i = 0; i < numProbs; i++)
       UInt32 numProbs = Literal + ((UInt32)LZMA_LIT_SIZE << (lc + vs->Properties.lp));
       UInt32 i;
       for (i = 0; i < numProbs; i++)

-        p[i] = kBitModelTotal >> 1; 
+        p[i] = kBitModelTotal >> 1;

       rep0 = rep1 = rep2 = rep3 = 1;
       state = 0;
       globalPos = 0;
       rep0 = rep1 = rep2 = rep3 = 1;
       state = 0;
       globalPos = 0;


@@ -265,7 +265,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
     for (i = 0; i < numProbs; i++)
       p[i] = kBitModelTotal >> 1;
   }
     for (i = 0; i < numProbs; i++)
       p[i] = kBitModelTotal >> 1;
   }

-  
+

   #ifdef _LZMA_IN_CB
   RC_INIT;
   #else
   #ifdef _LZMA_IN_CB
   RC_INIT;
   #else


@@ -279,7 +279,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
     CProb *prob;
     UInt32 bound;
     int posState = (int)(
     CProb *prob;
     UInt32 bound;
     int posState = (int)(

-        (nowPos 
+        (nowPos

         #ifdef _LZMA_OUT_READ
         + globalPos
         #endif
         #ifdef _LZMA_OUT_READ
         + globalPos
         #endif


@@ -291,9 +291,9 @@ int LzmaDecode(CLzmaDecoderState *vs,
     {
       int symbol = 1;
       UpdateBit0(prob)
     {
       int symbol = 1;
       UpdateBit0(prob)

-      prob = p + Literal + (LZMA_LIT_SIZE * 
+      prob = p + Literal + (LZMA_LIT_SIZE *

         (((
         (((

-        (nowPos 
+        (nowPos

         #ifdef _LZMA_OUT_READ
         + globalPos
         #endif
         #ifdef _LZMA_OUT_READ
         + globalPos
         #endif


@@ -342,7 +342,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
       else if (state < 10) state -= 3;
       else state -= 6;
     }
       else if (state < 10) state -= 3;
       else state -= 6;
     }

-    else             
+    else

     {
       UpdateBit1(prob);
       prob = p + IsRep + state;
     {
       UpdateBit1(prob);
       prob = p + IsRep + state;


@@ -369,14 +369,14 @@ int LzmaDecode(CLzmaDecoderState *vs,
             UInt32 pos;
             #endif
             UpdateBit0(prob);
             UInt32 pos;
             #endif
             UpdateBit0(prob);

-            
+

             #ifdef _LZMA_OUT_READ
             if (distanceLimit == 0)
             #else
             if (nowPos == 0)
             #endif
               return LZMA_RESULT_DATA_ERROR;
             #ifdef _LZMA_OUT_READ
             if (distanceLimit == 0)
             #else
             if (nowPos == 0)
             #endif
               return LZMA_RESULT_DATA_ERROR;

-            
+

             state = state < kNumLitStates ? 9 : 11;
             #ifdef _LZMA_OUT_READ
             pos = dictionaryPos - rep0;
             state = state < kNumLitStates ? 9 : 11;
             #ifdef _LZMA_OUT_READ
             pos = dictionaryPos - rep0;


@@ -412,7 +412,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
             UpdateBit0(prob);
             distance = rep1;
           }
             UpdateBit0(prob);
             distance = rep1;
           }

-          else 
+          else

           {
             UpdateBit1(prob);
             prob = p + IsRepG2 + state;
           {
             UpdateBit1(prob);
             prob = p + IsRepG2 + state;


@@ -473,7 +473,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
         int posSlot;
         state += kNumLitStates;
         prob = p + PosSlot +
         int posSlot;
         state += kNumLitStates;
         prob = p + PosSlot +

-            ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) << 
+            ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) <<

             kNumPosSlotBits);
         RangeDecoderBitTreeDecode(prob, kNumPosSlotBits, posSlot);
         if (posSlot >= kStartPosModelIndex)
             kNumPosSlotBits);
         RangeDecoderBitTreeDecode(prob, kNumPosSlotBits, posSlot);
         if (posSlot >= kStartPosModelIndex)


@@ -528,7 +528,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
 
       len += kMatchMinLen;
       #ifdef _LZMA_OUT_READ
 
       len += kMatchMinLen;
       #ifdef _LZMA_OUT_READ

-      if (rep0 > distanceLimit) 
+      if (rep0 > distanceLimit)

       #else
       if (rep0 > nowPos)
       #endif
       #else
       if (rep0 > nowPos)
       #endif

diff --git a/payloads/bayou/util/pbuilder/lzma/C/7zip/Decompress/LzmaDecode.h b/payloads/bayou/util/pbuilder/lzma/C/7zip/Decompress/LzmaDecode.h
index 213062af12c34319ad900473b2186dfb097af23b..abc02d7edf3664429963d1b61e9d8879c70e9c72 100644 (file)
--- a/payloads/bayou/util/pbuilder/lzma/C/7zip/Decompress/LzmaDecode.h
+++ b/payloads/bayou/util/pbuilder/lzma/C/7zip/Decompress/LzmaDecode.h
@@ -1,4 +1,4 @@
-/* 
+/*

   LzmaDecode.h
   LZMA Decoder interface
 
   LzmaDecode.h
   LZMA Decoder interface
 


@@ -8,14 +8,14 @@
   LZMA SDK is licensed under two licenses:
   1) GNU Lesser General Public License (GNU LGPL)
   2) Common Public License (CPL)
   LZMA SDK is licensed under two licenses:
   1) GNU Lesser General Public License (GNU LGPL)
   2) Common Public License (CPL)

-  It means that you can select one of these two licenses and 
+  It means that you can select one of these two licenses and

   follow rules of that license.
 
   SPECIAL EXCEPTION:
   follow rules of that license.
 
   SPECIAL EXCEPTION:

-  Igor Pavlov, as the author of this code, expressly permits you to 
-  statically or dynamically link your code (or bind by name) to the 
-  interfaces of this file without subjecting your linked code to the 
-  terms of the CPL or GNU LGPL. Any modifications or additions 
+  Igor Pavlov, as the author of this code, expressly permits you to
+  statically or dynamically link your code (or bind by name) to the
+  interfaces of this file without subjecting your linked code to the
+  terms of the CPL or GNU LGPL. Any modifications or additions

   to this file, however, are subject to the LGPL or CPL terms.
 */
 
   to this file, however, are subject to the LGPL or CPL terms.
 */
 


@@ -29,7 +29,7 @@
 /* Use read function for output data */
 
 /* #define _LZMA_PROB32 */
 /* Use read function for output data */
 
 /* #define _LZMA_PROB32 */

-/* It can increase speed on some 32-bit CPUs, 
+/* It can increase speed on some 32-bit CPUs,

    but memory usage will be doubled in that case */
 
 /* #define _LZMA_LOC_OPT */
    but memory usage will be doubled in that case */
 
 /* #define _LZMA_LOC_OPT */

diff --git a/payloads/bayou/util/pbuilder/lzma/minilzma.cc b/payloads/bayou/util/pbuilder/lzma/minilzma.cc
index 7610910a19d172ca2630e4e8a689414d3529297a..441c28835f9c28c6f439b39f60f80c968830d8f1 100644 (file)
--- a/payloads/bayou/util/pbuilder/lzma/minilzma.cc
+++ b/payloads/bayou/util/pbuilder/lzma/minilzma.cc
@@ -89,7 +89,7 @@ static UInt32 SelectDictionarySizeFor(unsigned datasize)
     if(datasize <= 512) return 512;
     if(datasize <= 1024) return 1024;
     if(datasize <= 4096) return 4096;
     if(datasize <= 512) return 512;
     if(datasize <= 1024) return 1024;
     if(datasize <= 4096) return 4096;

-    if(datasize <= 16384) return 32768; 
+    if(datasize <= 16384) return 32768;

     if(datasize <= 65536) return 528288;
     if(datasize <= 528288) return 1048576*4;
     if(datasize <= 786432) reutrn 1048576*16;
     if(datasize <= 65536) return 528288;
     if(datasize <= 528288) return 1048576*4;
     if(datasize <= 786432) reutrn 1048576*16;


@@ -105,12 +105,12 @@ class CInStreamRam: public ISequentialInStream, public CMyUnknownImp
     size_t Pos;
 public:
     MY_UNKNOWN_IMP
     size_t Pos;
 public:
     MY_UNKNOWN_IMP

-  
+

     CInStreamRam(const std::vector<unsigned char>& buf) : input(buf), Pos(0)
     {
     }
     virtual ~CInStreamRam() {}
     CInStreamRam(const std::vector<unsigned char>& buf) : input(buf), Pos(0)
     {
     }
     virtual ~CInStreamRam() {}

-  
+

     STDMETHOD(Read)(void *data, UInt32 size, UInt32 *processedSize);
 };
 
     STDMETHOD(Read)(void *data, UInt32 size, UInt32 *processedSize);
 };
 


@@ -118,12 +118,12 @@ STDMETHODIMP CInStreamRam::Read(void *data, UInt32 size, UInt32 *processedSize)
 {
     UInt32 remain = input.size() - Pos;
     if (size > remain) size = remain;
 {
     UInt32 remain = input.size() - Pos;
     if (size > remain) size = remain;

-  
+

     std::memcpy(data, &input[Pos], size);
     Pos += size;
     std::memcpy(data, &input[Pos], size);
     Pos += size;

-    
+

     if(processedSize != NULL) *processedSize = size;
     if(processedSize != NULL) *processedSize = size;

-    
+

     return S_OK;
 }
 
     return S_OK;
 }
 


@@ -133,27 +133,27 @@ class COutStreamRam: public ISequentialOutStream, public CMyUnknownImp
     size_t Pos;
 public:
     MY_UNKNOWN_IMP
     size_t Pos;
 public:
     MY_UNKNOWN_IMP

-    
+

     COutStreamRam(): result(), Pos(0) { }
     virtual ~COutStreamRam() { }
     COutStreamRam(): result(), Pos(0) { }
     virtual ~COutStreamRam() { }

-    
+

     void Reserve(unsigned n) { result.reserve(n); }
     const std::vector<Byte>& Get() const { return result; }
     void Reserve(unsigned n) { result.reserve(n); }
     const std::vector<Byte>& Get() const { return result; }

-  
+

     HRESULT WriteByte(Byte b)
     {
         if(Pos >= result.size()) result.resize(Pos+1);
         result[Pos++] = b;
         return S_OK;
     }
     HRESULT WriteByte(Byte b)
     {
         if(Pos >= result.size()) result.resize(Pos+1);
         result[Pos++] = b;
         return S_OK;
     }

-  
+

     STDMETHOD(Write)(const void *data, UInt32 size, UInt32 *processedSize);
 };
 
 STDMETHODIMP COutStreamRam::Write(const void *data, UInt32 size, UInt32 *processedSize)
 {
     if(Pos+size > result.size()) result.resize(Pos+size);
     STDMETHOD(Write)(const void *data, UInt32 size, UInt32 *processedSize);
 };
 
 STDMETHODIMP COutStreamRam::Write(const void *data, UInt32 size, UInt32 *processedSize)
 {
     if(Pos+size > result.size()) result.resize(Pos+size);

-    
+

     std::memcpy(&result[Pos], data, size);
     if(processedSize != NULL) *processedSize = size;
     Pos += size;
     std::memcpy(&result[Pos], data, size);
     if(processedSize != NULL) *processedSize = size;
     Pos += size;


@@ -163,15 +163,15 @@ STDMETHODIMP COutStreamRam::Write(const void *data, UInt32 size, UInt32 *process
 const std::vector<unsigned char> LZMACompress(const std::vector<unsigned char>& buf)
 {
     if(buf.empty()) return buf;
 const std::vector<unsigned char> LZMACompress(const std::vector<unsigned char>& buf)
 {
     if(buf.empty()) return buf;

-    
+

     const UInt32 dictionarysize = SelectDictionarySizeFor(buf.size());
     const UInt32 dictionarysize = SelectDictionarySizeFor(buf.size());

-    
+

     NCompress::NLZMA::CEncoder *encoderSpec = new NCompress::NLZMA::CEncoder;
     CMyComPtr<ICompressCoder> encoder = encoderSpec;
     NCompress::NLZMA::CEncoder *encoderSpec = new NCompress::NLZMA::CEncoder;
     CMyComPtr<ICompressCoder> encoder = encoderSpec;

-    const PROPID propIDs[] = 
+    const PROPID propIDs[] =

     {
         NCoderPropID::kAlgorithm,
     {
         NCoderPropID::kAlgorithm,

-        NCoderPropID::kDictionarySize,  
+        NCoderPropID::kDictionarySize,

         NCoderPropID::kNumFastBytes,
     };
     const unsigned kNumProps = sizeof(propIDs) / sizeof(propIDs[0]);
         NCoderPropID::kNumFastBytes,
     };
     const unsigned kNumProps = sizeof(propIDs) / sizeof(propIDs[0]);


@@ -185,16 +185,16 @@ const std::vector<unsigned char> LZMACompress(const std::vector<unsigned char>&
     Error:
         return std::vector<unsigned char> ();
     }
     Error:
         return std::vector<unsigned char> ();
     }

-    
+

     COutStreamRam *const outStreamSpec = new COutStreamRam;
     CMyComPtr<ISequentialOutStream> outStream = outStreamSpec;
     CInStreamRam *const inStreamSpec = new CInStreamRam(buf);
     CMyComPtr<ISequentialInStream> inStream = inStreamSpec;
     COutStreamRam *const outStreamSpec = new COutStreamRam;
     CMyComPtr<ISequentialOutStream> outStream = outStreamSpec;
     CInStreamRam *const inStreamSpec = new CInStreamRam(buf);
     CMyComPtr<ISequentialInStream> inStream = inStreamSpec;

-    
+

     outStreamSpec->Reserve(buf.size());
 
     if (encoderSpec->WriteCoderProperties(outStream) != S_OK) goto Error;
     outStreamSpec->Reserve(buf.size());
 
     if (encoderSpec->WriteCoderProperties(outStream) != S_OK) goto Error;

-    
+

     for (unsigned i = 0; i < 8; i++)
     {
         UInt64 t = (UInt64)buf.size();
     for (unsigned i = 0; i < 8; i++)
     {
         UInt64 t = (UInt64)buf.size();


@@ -203,7 +203,7 @@ const std::vector<unsigned char> LZMACompress(const std::vector<unsigned char>&
 
     HRESULT lzmaResult = encoder->Code(inStream, outStream, 0, 0, 0);
     if (lzmaResult != S_OK) goto Error;
 
     HRESULT lzmaResult = encoder->Code(inStream, outStream, 0, 0, 0);
     if (lzmaResult != S_OK) goto Error;

-    
+

     return outStreamSpec->Get();
 }
 
     return outStreamSpec->Get();
 }
 


@@ -216,22 +216,22 @@ const std::vector<unsigned char> LZMADeCompress
     (const std::vector<unsigned char>& buf)
 {
     if(buf.size() <= 5+8) return std::vector<unsigned char> ();
     (const std::vector<unsigned char>& buf)
 {
     if(buf.size() <= 5+8) return std::vector<unsigned char> ();

-    
+

     uint_least64_t out_sizemax = R64(&buf[5]);
     uint_least64_t out_sizemax = R64(&buf[5]);

-    
+

     std::vector<unsigned char> result(out_sizemax);
     std::vector<unsigned char> result(out_sizemax);

-    
+

     CLzmaDecoderState state;
     LzmaDecodeProperties(&state.Properties, &buf[0], LZMA_PROPERTIES_SIZE);
     state.Probs = new CProb[LzmaGetNumProbs(&state.Properties)];
     CLzmaDecoderState state;
     LzmaDecodeProperties(&state.Properties, &buf[0], LZMA_PROPERTIES_SIZE);
     state.Probs = new CProb[LzmaGetNumProbs(&state.Properties)];

-    
+

     SizeT in_done;
     SizeT out_done;
     LzmaDecode(&state, &buf[13], buf.size()-13, &in_done,
                &result[0], result.size(), &out_done);
     SizeT in_done;
     SizeT out_done;
     LzmaDecode(&state, &buf[13], buf.size()-13, &in_done,
                &result[0], result.size(), &out_done);

-    
+

     delete[] state.Probs;
     delete[] state.Probs;

-    
+

     result.resize(out_done);
     return result;
 }
     result.resize(out_done);
     return result;
 }


@@ -242,7 +242,7 @@ int main(int argc, char *argv[])
        char  *s;
        FILE  *f, *infile, *outfile;
        int    c;
        char  *s;
        FILE  *f, *infile, *outfile;
        int    c;

-       
+

        if (argc != 4) {
                std::fprintf(stderr, "'lzma e file1 file2' encodes file1 into file2.\n"
                        "'lzma d file2 file1' decodes file2 into file1.\n");
        if (argc != 4) {
                std::fprintf(stderr, "'lzma e file1 file2' encodes file1 into file2.\n"
                        "'lzma d file2 file1' decodes file2 into file1.\n");


@@ -270,9 +270,9 @@ int main(int argc, char *argv[])
        fread(Buf,si, 1, infile);
 
        std::vector<unsigned char> result;
        fread(Buf,si, 1, infile);
 
        std::vector<unsigned char> result;

-       if (toupper(*argv[1]) == 'E') 
+       if (toupper(*argv[1]) == 'E')

                result = LZMACompress(std::vector<unsigned char>(Buf,Buf+si));
                result = LZMACompress(std::vector<unsigned char>(Buf,Buf+si));

-       else    
+       else

                result = LZMADeCompress(std::vector<unsigned char>(Buf,Buf+si));
 
        fwrite(&result[0], result.size(), 1, outfile);
                result = LZMADeCompress(std::vector<unsigned char>(Buf,Buf+si));
 
        fwrite(&result[0], result.size(), 1, outfile);


@@ -289,7 +289,7 @@ extern "C" {
  * @param in a pointer to the buffer
  * @param in_len the length in bytes
  * @param out a pointer to a buffer of at least size in_len
  * @param in a pointer to the buffer
  * @param in_len the length in bytes
  * @param out a pointer to a buffer of at least size in_len

- * @param out_len a pointer to the compressed length of in 
+ * @param out_len a pointer to the compressed length of in

  */
 
 void do_lzma_compress(char *in, int in_len, char *out, int *out_len) {
  */
 
 void do_lzma_compress(char *in, int in_len, char *out, int *out_len) {

diff --git a/payloads/coreinfo/cpuid.S b/payloads/coreinfo/cpuid.S
index 9b1d13448fe915f1269fd5089a6094facf86e873..97dbb0c877be8dcf7667f781fd60be26bb6b675c 100644 (file)
--- a/payloads/coreinfo/cpuid.S
+++ b/payloads/coreinfo/cpuid.S
@@ -20,7 +20,7 @@
  */
 
 /* calling syntax:  docpuid(idx,eax,ebx,ecx,edx) */
  */
 
 /* calling syntax:  docpuid(idx,eax,ebx,ecx,edx) */

-       
+

 .align 4
 .text
 
 .align 4
 .text
 

diff --git a/payloads/coreinfo/pci_module.c b/payloads/coreinfo/pci_module.c
index 5b1a9d8785f4f9184b39f2ef857cdfb5cf3507db..6af3a74156ba1d04351a874f3dea268c7099f1b9 100644 (file)
--- a/payloads/coreinfo/pci_module.c
+++ b/payloads/coreinfo/pci_module.c
@@ -194,7 +194,7 @@ static void pci_scan_bus(int bus)
                        if (devices_index >= MAX_PCI_DEVICES)
                                return;
 
                        if (devices_index >= MAX_PCI_DEVICES)
                                return;
 

-                       devices[devices_index].device = 
+                       devices[devices_index].device =

                            PCI_DEV(bus, slot, func);
 
                        devices[devices_index++].id = val;
                            PCI_DEV(bus, slot, func);
 
                        devices[devices_index++].id = val;

diff --git a/payloads/coreinfo/util/kconfig/lex.zconf.c_shipped b/payloads/coreinfo/util/kconfig/lex.zconf.c_shipped
index 1911092521bd4a8ff5bf55fca31c0d5854567632..6897092b94f745bca3fe86d62f1dcce809a079e6 100644 (file)
--- a/payloads/coreinfo/util/kconfig/lex.zconf.c_shipped
+++ b/payloads/coreinfo/util/kconfig/lex.zconf.c_shipped
@@ -52,7 +52,7 @@
 #if __STDC_VERSION__ >= 199901L
 
 /* C99 says to define __STDC_LIMIT_MACROS before including stdint.h,
 #if __STDC_VERSION__ >= 199901L
 
 /* C99 says to define __STDC_LIMIT_MACROS before including stdint.h,

- * if you want the limit (max/min) macros for int types. 
+ * if you want the limit (max/min) macros for int types.

  */
 #ifndef __STDC_LIMIT_MACROS
 #define __STDC_LIMIT_MACROS 1
  */
 #ifndef __STDC_LIMIT_MACROS
 #define __STDC_LIMIT_MACROS 1


@@ -69,7 +69,7 @@ typedef uint32_t flex_uint32_t;
 typedef signed char flex_int8_t;
 typedef short int flex_int16_t;
 typedef int flex_int32_t;
 typedef signed char flex_int8_t;
 typedef short int flex_int16_t;
 typedef int flex_int32_t;

-typedef unsigned char flex_uint8_t; 
+typedef unsigned char flex_uint8_t;

 typedef unsigned short int flex_uint16_t;
 typedef unsigned int flex_uint32_t;
 #endif /* ! C99 */
 typedef unsigned short int flex_uint16_t;
 typedef unsigned int flex_uint32_t;
 #endif /* ! C99 */


@@ -179,7 +179,7 @@ extern FILE *zconfin, *zconfout;
 #define EOB_ACT_LAST_MATCH 2
 
     #define YY_LESS_LINENO(n)
 #define EOB_ACT_LAST_MATCH 2
 
     #define YY_LESS_LINENO(n)

-    
+

 /* Return all but the first "n" matched characters back to the input stream. */
 #define yyless(n) \
        do \
 /* Return all but the first "n" matched characters back to the input stream. */
 #define yyless(n) \
        do \


@@ -246,7 +246,7 @@ struct yy_buffer_state
 
     int yy_bs_lineno; /**< The line count. */
     int yy_bs_column; /**< The column count. */
 
     int yy_bs_lineno; /**< The line count. */
     int yy_bs_column; /**< The column count. */

-    
+

        /* Whether to try to fill the input buffer when we reach the
         * end of it.
         */
        /* Whether to try to fill the input buffer when we reach the
         * end of it.
         */


@@ -866,7 +866,7 @@ extern int zconfwrap (void );
 #endif
 
     static void yyunput (int c,char *buf_ptr  );
 #endif
 
     static void yyunput (int c,char *buf_ptr  );

-    
+

 #ifndef yytext_ptr
 static void yy_flex_strncpy (char *,yyconst char *,int );
 #endif
 #ifndef yytext_ptr
 static void yy_flex_strncpy (char *,yyconst char *,int );
 #endif


@@ -971,7 +971,7 @@ YY_DECL
        register yy_state_type yy_current_state;
        register char *yy_cp, *yy_bp;
        register int yy_act;
        register yy_state_type yy_current_state;
        register char *yy_cp, *yy_bp;
        register int yy_act;

-    
+

        int str = 0;
        int ts, i;
 
        int str = 0;
        int ts, i;
 


@@ -1574,7 +1574,7 @@ static int yy_get_next_buffer (void)
 {
        register yy_state_type yy_current_state;
        register char *yy_cp;
 {
        register yy_state_type yy_current_state;
        register char *yy_cp;

-    
+

        yy_current_state = (yy_start);
 
        for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp )
        yy_current_state = (yy_start);
 
        for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp )


@@ -1593,7 +1593,7 @@ static int yy_get_next_buffer (void)
     static yy_state_type yy_try_NUL_trans  (yy_state_type yy_current_state )
 {
        register int yy_is_jam;
     static yy_state_type yy_try_NUL_trans  (yy_state_type yy_current_state )
 {
        register int yy_is_jam;

-    
+

        yy_current_state = yy_nxt[yy_current_state][1];
        yy_is_jam = (yy_current_state <= 0);
 
        yy_current_state = yy_nxt[yy_current_state][1];
        yy_is_jam = (yy_current_state <= 0);
 


@@ -1603,7 +1603,7 @@ static int yy_get_next_buffer (void)
     static void yyunput (int c, register char * yy_bp )
 {
        register char *yy_cp;
     static void yyunput (int c, register char * yy_bp )
 {
        register char *yy_cp;

-    
+

     yy_cp = (yy_c_buf_p);
 
        /* undo effects of setting up zconftext */
     yy_cp = (yy_c_buf_p);
 
        /* undo effects of setting up zconftext */


@@ -1646,7 +1646,7 @@ static int yy_get_next_buffer (void)
 
 {
        int c;
 
 {
        int c;

-    
+

        *(yy_c_buf_p) = (yy_hold_char);
 
        if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR )
        *(yy_c_buf_p) = (yy_hold_char);
 
        if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR )


@@ -1713,12 +1713,12 @@ static int yy_get_next_buffer (void)
 
 /** Immediately switch to a different input stream.
  * @param input_file A readable stream.
 
 /** Immediately switch to a different input stream.
  * @param input_file A readable stream.

- * 
+ *

  * @note This function does not reset the start condition to @c INITIAL .
  */
     void zconfrestart  (FILE * input_file )
 {
  * @note This function does not reset the start condition to @c INITIAL .
  */
     void zconfrestart  (FILE * input_file )
 {

-    
+

        if ( ! YY_CURRENT_BUFFER ){
         zconfensure_buffer_stack ();
                YY_CURRENT_BUFFER_LVALUE =
        if ( ! YY_CURRENT_BUFFER ){
         zconfensure_buffer_stack ();
                YY_CURRENT_BUFFER_LVALUE =


@@ -1731,11 +1731,11 @@ static int yy_get_next_buffer (void)
 
 /** Switch to a different input buffer.
  * @param new_buffer The new input buffer.
 
 /** Switch to a different input buffer.
  * @param new_buffer The new input buffer.

- * 
+ *

  */
     void zconf_switch_to_buffer  (YY_BUFFER_STATE  new_buffer )
 {
  */
     void zconf_switch_to_buffer  (YY_BUFFER_STATE  new_buffer )
 {

-    
+

        /* TODO. We should be able to replace this entire function body
         * with
         *              zconfpop_buffer_state();
        /* TODO. We should be able to replace this entire function body
         * with
         *              zconfpop_buffer_state();


@@ -1775,13 +1775,13 @@ static void zconf_load_buffer_state  (void)
 /** Allocate and initialize an input buffer state.
  * @param file A readable stream.
  * @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE.
 /** Allocate and initialize an input buffer state.
  * @param file A readable stream.
  * @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE.

- * 
+ *

  * @return the allocated buffer state.
  */
     YY_BUFFER_STATE zconf_create_buffer  (FILE * file, int  size )
 {
        YY_BUFFER_STATE b;
  * @return the allocated buffer state.
  */
     YY_BUFFER_STATE zconf_create_buffer  (FILE * file, int  size )
 {
        YY_BUFFER_STATE b;

-    
+

        b = (YY_BUFFER_STATE) zconfalloc(sizeof( struct yy_buffer_state )  );
        if ( ! b )
                YY_FATAL_ERROR( "out of dynamic memory in zconf_create_buffer()" );
        b = (YY_BUFFER_STATE) zconfalloc(sizeof( struct yy_buffer_state )  );
        if ( ! b )
                YY_FATAL_ERROR( "out of dynamic memory in zconf_create_buffer()" );


@@ -1804,11 +1804,11 @@ static void zconf_load_buffer_state  (void)
 
 /** Destroy the buffer.
  * @param b a buffer created with zconf_create_buffer()
 
 /** Destroy the buffer.
  * @param b a buffer created with zconf_create_buffer()

- * 
+ *

  */
     void zconf_delete_buffer (YY_BUFFER_STATE  b )
 {
  */
     void zconf_delete_buffer (YY_BUFFER_STATE  b )
 {

-    
+

        if ( ! b )
                return;
 
        if ( ! b )
                return;
 


@@ -1829,7 +1829,7 @@ static void zconf_load_buffer_state  (void)
 
 {
        int oerrno = errno;
 
 {
        int oerrno = errno;

-    
+

        zconf_flush_buffer(b );
 
        b->yy_input_file = file;
        zconf_flush_buffer(b );
 
        b->yy_input_file = file;


@@ -1845,13 +1845,13 @@ static void zconf_load_buffer_state  (void)
     }
 
         b->yy_is_interactive = 0;
     }
 
         b->yy_is_interactive = 0;

-    
+

        errno = oerrno;
 }
 
 /** Discard all buffered characters. On the next scan, YY_INPUT will be called.
  * @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER.
        errno = oerrno;
 }
 
 /** Discard all buffered characters. On the next scan, YY_INPUT will be called.
  * @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER.

- * 
+ *

  */
     void zconf_flush_buffer (YY_BUFFER_STATE  b )
 {
  */
     void zconf_flush_buffer (YY_BUFFER_STATE  b )
 {


@@ -1880,7 +1880,7 @@ static void zconf_load_buffer_state  (void)
  *  the current state. This function will allocate the stack
  *  if necessary.
  *  @param new_buffer The new state.
  *  the current state. This function will allocate the stack
  *  if necessary.
  *  @param new_buffer The new state.

- *  
+ *

  */
 void zconfpush_buffer_state (YY_BUFFER_STATE new_buffer )
 {
  */
 void zconfpush_buffer_state (YY_BUFFER_STATE new_buffer )
 {


@@ -1910,7 +1910,7 @@ void zconfpush_buffer_state (YY_BUFFER_STATE new_buffer )
 
 /** Removes and deletes the top of the stack, if present.
  *  The next element becomes the new top.
 
 /** Removes and deletes the top of the stack, if present.
  *  The next element becomes the new top.

- *  
+ *

  */
 void zconfpop_buffer_state (void)
 {
  */
 void zconfpop_buffer_state (void)
 {


@@ -1934,7 +1934,7 @@ void zconfpop_buffer_state (void)
 static void zconfensure_buffer_stack (void)
 {
        int num_to_alloc;
 static void zconfensure_buffer_stack (void)
 {
        int num_to_alloc;

-    
+

        if (!(yy_buffer_stack)) {
 
                /* First allocation is just for 2 elements, since we don't know if this
        if (!(yy_buffer_stack)) {
 
                /* First allocation is just for 2 elements, since we don't know if this


@@ -1945,9 +1945,9 @@ static void zconfensure_buffer_stack (void)
                (yy_buffer_stack) = (struct yy_buffer_state**)zconfalloc
                                                                (num_to_alloc * sizeof(struct yy_buffer_state*)
                                                                );
                (yy_buffer_stack) = (struct yy_buffer_state**)zconfalloc
                                                                (num_to_alloc * sizeof(struct yy_buffer_state*)
                                                                );

-               
+

                memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*));
                memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*));

-                               
+

                (yy_buffer_stack_max) = num_to_alloc;
                (yy_buffer_stack_top) = 0;
                return;
                (yy_buffer_stack_max) = num_to_alloc;
                (yy_buffer_stack_top) = 0;
                return;


@@ -1973,13 +1973,13 @@ static void zconfensure_buffer_stack (void)
 /** Setup the input buffer state to scan directly from a user-specified character buffer.
  * @param base the character buffer
  * @param size the size in bytes of the character buffer
 /** Setup the input buffer state to scan directly from a user-specified character buffer.
  * @param base the character buffer
  * @param size the size in bytes of the character buffer

- * 
- * @return the newly allocated buffer state object. 
+ *
+ * @return the newly allocated buffer state object.

  */
 YY_BUFFER_STATE zconf_scan_buffer  (char * base, yy_size_t  size )
 {
        YY_BUFFER_STATE b;
  */
 YY_BUFFER_STATE zconf_scan_buffer  (char * base, yy_size_t  size )
 {
        YY_BUFFER_STATE b;

-    
+

        if ( size < 2 ||
             base[size-2] != YY_END_OF_BUFFER_CHAR ||
             base[size-1] != YY_END_OF_BUFFER_CHAR )
        if ( size < 2 ||
             base[size-2] != YY_END_OF_BUFFER_CHAR ||
             base[size-1] != YY_END_OF_BUFFER_CHAR )


@@ -2008,14 +2008,14 @@ YY_BUFFER_STATE zconf_scan_buffer  (char * base, yy_size_t  size )
 /** Setup the input buffer state to scan a string. The next call to zconflex() will
  * scan from a @e copy of @a str.
  * @param str a NUL-terminated string to scan
 /** Setup the input buffer state to scan a string. The next call to zconflex() will
  * scan from a @e copy of @a str.
  * @param str a NUL-terminated string to scan

- * 
+ *

  * @return the newly allocated buffer state object.
  * @note If you want to scan bytes that may contain NUL values, then use
  *       zconf_scan_bytes() instead.
  */
 YY_BUFFER_STATE zconf_scan_string (yyconst char * yystr )
 {
  * @return the newly allocated buffer state object.
  * @note If you want to scan bytes that may contain NUL values, then use
  *       zconf_scan_bytes() instead.
  */
 YY_BUFFER_STATE zconf_scan_string (yyconst char * yystr )
 {

-    
+

        return zconf_scan_bytes(yystr,strlen(yystr) );
 }
 
        return zconf_scan_bytes(yystr,strlen(yystr) );
 }
 


@@ -2023,7 +2023,7 @@ YY_BUFFER_STATE zconf_scan_string (yyconst char * yystr )
  * scan from a @e copy of @a bytes.
  * @param bytes the byte buffer to scan
  * @param len the number of bytes in the buffer pointed to by @a bytes.
  * scan from a @e copy of @a bytes.
  * @param bytes the byte buffer to scan
  * @param len the number of bytes in the buffer pointed to by @a bytes.

- * 
+ *

  * @return the newly allocated buffer state object.
  */
 YY_BUFFER_STATE zconf_scan_bytes  (yyconst char * yybytes, int  _yybytes_len )
  * @return the newly allocated buffer state object.
  */
 YY_BUFFER_STATE zconf_scan_bytes  (yyconst char * yybytes, int  _yybytes_len )


@@ -2032,7 +2032,7 @@ YY_BUFFER_STATE zconf_scan_bytes  (yyconst char * yybytes, int  _yybytes_len )
        char *buf;
        yy_size_t n;
        int i;
        char *buf;
        yy_size_t n;
        int i;

-    
+

        /* Get memory for full buffer, including space for trailing EOB's. */
        n = _yybytes_len + 2;
        buf = (char *) zconfalloc(n  );
        /* Get memory for full buffer, including space for trailing EOB's. */
        n = _yybytes_len + 2;
        buf = (char *) zconfalloc(n  );


@@ -2086,16 +2086,16 @@ static void yy_fatal_error (yyconst char* msg )
 /* Accessor  methods (get/set functions) to struct members. */
 
 /** Get the current line number.
 /* Accessor  methods (get/set functions) to struct members. */
 
 /** Get the current line number.

- * 
+ *

  */
 int zconfget_lineno  (void)
 {
  */
 int zconfget_lineno  (void)
 {

-        
+

     return zconflineno;
 }
 
 /** Get the input stream.
     return zconflineno;
 }
 
 /** Get the input stream.

- * 
+ *

  */
 FILE *zconfget_in  (void)
 {
  */
 FILE *zconfget_in  (void)
 {


@@ -2103,7 +2103,7 @@ FILE *zconfget_in  (void)
 }
 
 /** Get the output stream.
 }
 
 /** Get the output stream.

- * 
+ *

  */
 FILE *zconfget_out  (void)
 {
  */
 FILE *zconfget_out  (void)
 {


@@ -2111,7 +2111,7 @@ FILE *zconfget_out  (void)
 }
 
 /** Get the length of the current token.
 }
 
 /** Get the length of the current token.

- * 
+ *

  */
 int zconfget_leng  (void)
 {
  */
 int zconfget_leng  (void)
 {


@@ -2119,7 +2119,7 @@ int zconfget_leng  (void)
 }
 
 /** Get the current token.
 }
 
 /** Get the current token.

- * 
+ *

  */
 
 char *zconfget_text  (void)
  */
 
 char *zconfget_text  (void)


@@ -2129,18 +2129,18 @@ char *zconfget_text  (void)
 
 /** Set the current line number.
  * @param line_number
 
 /** Set the current line number.
  * @param line_number

- * 
+ *

  */
 void zconfset_lineno (int  line_number )
 {
  */
 void zconfset_lineno (int  line_number )
 {

-    
+

     zconflineno = line_number;
 }
 
 /** Set the input stream. This does not discard the current
  * input buffer.
  * @param in_str A readable stream.
     zconflineno = line_number;
 }
 
 /** Set the input stream. This does not discard the current
  * input buffer.
  * @param in_str A readable stream.

- * 
+ *

  * @see zconf_switch_to_buffer
  */
 void zconfset_in (FILE *  in_str )
  * @see zconf_switch_to_buffer
  */
 void zconfset_in (FILE *  in_str )


@@ -2194,7 +2194,7 @@ static int yy_init_globals (void)
 /* zconflex_destroy is for both reentrant and non-reentrant scanners. */
 int zconflex_destroy  (void)
 {
 /* zconflex_destroy is for both reentrant and non-reentrant scanners. */
 int zconflex_destroy  (void)
 {

-    
+

     /* Pop the buffer stack, destroying each element. */
        while(YY_CURRENT_BUFFER){
                zconf_delete_buffer(YY_CURRENT_BUFFER  );
     /* Pop the buffer stack, destroying each element. */
        while(YY_CURRENT_BUFFER){
                zconf_delete_buffer(YY_CURRENT_BUFFER  );

diff --git a/payloads/coreinfo/util/kconfig/lxdialog/BIG.FAT.WARNING b/payloads/coreinfo/util/kconfig/lxdialog/BIG.FAT.WARNING
index a8999d82bdb3b5c00a9668de8f5da89b91c0cc08..7cb5a7ec93d27ec6c98b2565e6399d3f342a813a 100644 (file)
--- a/payloads/coreinfo/util/kconfig/lxdialog/BIG.FAT.WARNING
+++ b/payloads/coreinfo/util/kconfig/lxdialog/BIG.FAT.WARNING
@@ -1,4 +1,4 @@
 This is NOT the official version of dialog.  This version has been
 significantly modified from the original.  It is for use by the Linux
 This is NOT the official version of dialog.  This version has been
 significantly modified from the original.  It is for use by the Linux

-kernel configuration script.  Please do not bother Savio Lam with 
+kernel configuration script.  Please do not bother Savio Lam with

 questions about this program.
 questions about this program.

diff --git a/payloads/coreinfo/util/kconfig/lxdialog/menubox.c b/payloads/coreinfo/util/kconfig/lxdialog/menubox.c
index fa9d633f293c7c3a107b956e15774afd27560b12..c689fc03b56b01160779159696b45dae52ecf25c 100644 (file)
--- a/payloads/coreinfo/util/kconfig/lxdialog/menubox.c
+++ b/payloads/coreinfo/util/kconfig/lxdialog/menubox.c
@@ -26,7 +26,7 @@
  *
  *    *)  A bugfix for the Page-Down problem
  *
  *
  *    *)  A bugfix for the Page-Down problem
  *

- *    *)  Formerly when I used Page Down and Page Up, the cursor would be set 
+ *    *)  Formerly when I used Page Down and Page Up, the cursor would be set

  *        to the first position in the menu box.  Now lxdialog is a bit
  *        smarter and works more like other menu systems (just have a look at
  *        it).
  *        to the first position in the menu box.  Now lxdialog is a bit
  *        smarter and works more like other menu systems (just have a look at
  *        it).

diff --git a/payloads/coreinfo/util/kconfig/zconf.tab.c_shipped b/payloads/coreinfo/util/kconfig/zconf.tab.c_shipped
index acc0818c9b8e7704fadeebd6e11dfe22fbbd5414..bdd5ffd2c7b4bffbc1d09f1eb40c9af8f4790a6a 100644 (file)
--- a/payloads/coreinfo/util/kconfig/zconf.tab.c_shipped
+++ b/payloads/coreinfo/util/kconfig/zconf.tab.c_shipped
@@ -1394,7 +1394,7 @@ yyparse ()
 #endif
 #endif
 {
 #endif
 #endif
 {

-  
+

   int yystate;
   int yyn;
   int yyresult;
   int yystate;
   int yyn;
   int yyresult;

diff --git a/payloads/external/tint/libpayload_tint.patch b/payloads/external/tint/libpayload_tint.patch
index 0eca9c53cf2a14ccf17de92a865825226260a60b..be9d8f071d59ca7ac5b2e747c5b493c42fbbf316 100644 (file)
--- a/payloads/external/tint/libpayload_tint.patch
+++ b/payloads/external/tint/libpayload_tint.patch
@@ -9,7 +9,7 @@ diff -Naur tint-0.03b.orig/config.h tint-0.03b/config.h
 @@ -29,7 +29,16 @@
   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   */
 @@ -29,7 +29,16 @@
   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   */

- 
+

 +#include <libpayload.h>
 +#include <curses.h>
 +#define random(x) rand(x)
 +#include <libpayload.h>
 +#include <curses.h>
 +#define random(x) rand(x)


@@ -21,7 +21,7 @@ diff -Naur tint-0.03b.orig/config.h tint-0.03b/config.h
 +#if 0
  const char scorefile[] = SCOREFILE;
 +#endif
 +#if 0
  const char scorefile[] = SCOREFILE;
 +#endif

- 
+

  #endif        /* #ifndef CONFIG_H */
 diff -Naur tint-0.03b.orig/engine.c tint-0.03b/engine.c
 --- tint-0.03b.orig/engine.c   2005-07-17 13:26:22.000000000 +0200
  #endif        /* #ifndef CONFIG_H */
 diff -Naur tint-0.03b.orig/engine.c tint-0.03b/engine.c
 --- tint-0.03b.orig/engine.c   2005-07-17 13:26:22.000000000 +0200


@@ -29,14 +29,14 @@ diff -Naur tint-0.03b.orig/engine.c tint-0.03b/engine.c
 @@ -27,8 +27,12 @@
   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   */
 @@ -27,8 +27,12 @@
   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   */

- 
+

 +#include "config.h"
 +
 +#if 0
  #include <stdlib.h>
  #include <string.h>
 +#endif
 +#include "config.h"
 +
 +#if 0
  #include <stdlib.h>
  #include <string.h>
 +#endif

- 
+

  #include "typedefs.h"
  #include "utils.h"
 diff -Naur tint-0.03b.orig/io.c tint-0.03b/io.c
  #include "typedefs.h"
  #include "utils.h"
 diff -Naur tint-0.03b.orig/io.c tint-0.03b/io.c


@@ -45,7 +45,7 @@ diff -Naur tint-0.03b.orig/io.c tint-0.03b/io.c
 @@ -27,9 +27,13 @@
   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   */
 @@ -27,9 +27,13 @@
   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   */

- 
+

 +#include "config.h"
 +
 +#if 0
 +#include "config.h"
 +
 +#if 0


@@ -53,9 +53,9 @@ diff -Naur tint-0.03b.orig/io.c tint-0.03b/io.c
  #include <sys/time.h> /* gettimeofday() */
  #include <unistd.h>           /* gettimeofday() */
 +#endif
  #include <sys/time.h> /* gettimeofday() */
  #include <unistd.h>           /* gettimeofday() */
 +#endif

- 
+

  #include <curses.h>
  #include <curses.h>

- 
+

 @@ -70,7 +74,11 @@
  /* Initialize screen */
  void io_init ()
 @@ -70,7 +74,11 @@
  /* Initialize screen */
  void io_init ()


@@ -93,14 +93,14 @@ diff -Naur tint-0.03b.orig/io.c tint-0.03b/io.c
 +#endif
     return ch;
  }
 +#endif
     return ch;
  }

- 
+

 diff -Naur tint-0.03b.orig/Makefile tint-0.03b/Makefile
 --- tint-0.03b.orig/Makefile   2005-07-17 13:30:54.000000000 +0200
 +++ tint-0.03b/Makefile        2008-04-11 22:19:35.000000000 +0200
 @@ -28,6 +28,36 @@
  #  OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  #  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 diff -Naur tint-0.03b.orig/Makefile tint-0.03b/Makefile
 --- tint-0.03b.orig/Makefile   2005-07-17 13:30:54.000000000 +0200
 +++ tint-0.03b/Makefile        2008-04-11 22:19:35.000000000 +0200
 @@ -28,6 +28,36 @@
  #  OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  #  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

- 
+

 +LIBPAYLOAD_DIR := ../libpayload
 +CC := $(LIBPAYLOAD_DIR)/bin/lpgcc
 +AS := $(LIBPAYLOAD_DIR)/bin/lpas
 +LIBPAYLOAD_DIR := ../libpayload
 +CC := $(LIBPAYLOAD_DIR)/bin/lpgcc
 +AS := $(LIBPAYLOAD_DIR)/bin/lpas


@@ -132,12 +132,12 @@ diff -Naur tint-0.03b.orig/Makefile tint-0.03b/Makefile
 +ifdef $(UNUSED)
 +
  #CROSS = arm-linux-
 +ifdef $(UNUSED)
 +
  #CROSS = arm-linux-

- 
+

  bindir = $(DESTDIR)/usr/games
 @@ -110,3 +140,4 @@
  distclean: clean
        $(MAKE) -C debian clean
  bindir = $(DESTDIR)/usr/games
 @@ -110,3 +140,4 @@
  distclean: clean
        $(MAKE) -C debian clean

- 
+

 +endif
 diff -Naur tint-0.03b.orig/tint.c tint-0.03b/tint.c
 --- tint-0.03b.orig/tint.c     2005-07-17 13:26:43.000000000 +0200
 +endif
 diff -Naur tint-0.03b.orig/tint.c tint-0.03b/tint.c
 --- tint-0.03b.orig/tint.c     2005-07-17 13:26:43.000000000 +0200


@@ -145,7 +145,7 @@ diff -Naur tint-0.03b.orig/tint.c tint-0.03b/tint.c
 @@ -27,6 +27,7 @@
   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   */
 @@ -27,6 +27,7 @@
   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   */

- 
+

 +#if 0
  #include <stdlib.h>
  #include <stdio.h>
 +#if 0
  #include <stdlib.h>
  #include <stdio.h>


@@ -155,13 +155,13 @@ diff -Naur tint-0.03b.orig/tint.c tint-0.03b/tint.c
  #include <sys/types.h>
  #include <unistd.h>
 +#endif
  #include <sys/types.h>
  #include <unistd.h>
 +#endif

- 
+

  #include "typedefs.h"
  #include "utils.h"
 @@ -321,6 +323,7 @@
     time_t timestamp;
  } score_t;
  #include "typedefs.h"
  #include "utils.h"
 @@ -321,6 +323,7 @@
     time_t timestamp;
  } score_t;

- 
+

 +#if 0
  static void getname (char *name)
  {
 +#if 0
  static void getname (char *name)
  {


@@ -171,7 +171,7 @@ diff -Naur tint-0.03b.orig/tint.c tint-0.03b/tint.c
         }
  }
 +#endif
         }
  }
 +#endif

- 
+

 +#if 0
  static void err1 ()
  {
 +#if 0
  static void err1 ()
  {


@@ -181,7 +181,7 @@ diff -Naur tint-0.03b.orig/tint.c tint-0.03b/tint.c
     exit (EXIT_FAILURE);
  }
 +#endif
     exit (EXIT_FAILURE);
  }
 +#endif

- 
+

  void showplayerstats (engine_t *engine)
  {
 -   fprintf (stderr,
  void showplayerstats (engine_t *engine)
  {
 -   fprintf (stderr,


@@ -192,7 +192,7 @@ diff -Naur tint-0.03b.orig/tint.c tint-0.03b/tint.c
 @@ -360,6 +366,7 @@
                        GETSCORE (engine->score),engine->status.efficiency,GETSCORE (engine->score) / getsum ());
  }
 @@ -360,6 +366,7 @@
                        GETSCORE (engine->score),engine->status.efficiency,GETSCORE (engine->score) / getsum ());
  }

- 
+

 +#if 0
  static void createscores (int score)
  {
 +#if 0
  static void createscores (int score)
  {


@@ -202,7 +202,7 @@ diff -Naur tint-0.03b.orig/tint.c tint-0.03b/tint.c
     fprintf (stderr,"\t  1* %7d        %s\n\n",score,scores[0].name);
  }
 +#endif
     fprintf (stderr,"\t  1* %7d        %s\n\n",score,scores[0].name);
  }
 +#endif

- 
+

 +#if 0
  static int cmpscores (const void *a,const void *b)
  {
 +#if 0
  static int cmpscores (const void *a,const void *b)
  {


@@ -212,7 +212,7 @@ diff -Naur tint-0.03b.orig/tint.c tint-0.03b/tint.c
     return 0;
  }
 +#endif
     return 0;
  }
 +#endif

- 
+

 +#if 0
  static void savescores (int score)
  {
 +#if 0
  static void savescores (int score)
  {


@@ -222,11 +222,11 @@ diff -Naur tint-0.03b.orig/tint.c tint-0.03b/tint.c
     fprintf (stderr,"\n");
  }
 +#endif
     fprintf (stderr,"\n");
  }
 +#endif

- 
+

            /***************************************************************************/
            /***************************************************************************/
            /***************************************************************************/
            /***************************************************************************/
            /***************************************************************************/
            /***************************************************************************/

- 
+

 +#if 0
  static void showhelp ()
  {
 +#if 0
  static void showhelp ()
  {


@@ -236,7 +236,7 @@ diff -Naur tint-0.03b.orig/tint.c tint-0.03b/tint.c
     exit (EXIT_FAILURE);
  }
 +#endif
     exit (EXIT_FAILURE);
  }
 +#endif

- 
+

  static void parse_options (int argc,char *argv[])
  {
 +#if 0
  static void parse_options (int argc,char *argv[])
  {
 +#if 0


@@ -249,12 +249,12 @@ diff -Naur tint-0.03b.orig/tint.c tint-0.03b/tint.c
         }
 +#endif
  }
         }
 +#endif
  }

- 
+

  static void choose_level ()
  {
 +#if 0
     char buf[NAMELEN];
  static void choose_level ()
  {
 +#if 0
     char buf[NAMELEN];

- 
+

     do
 @@ -549,6 +566,8 @@
                buf[strlen (buf) - 1] = '\0';
     do
 @@ -549,6 +566,8 @@
                buf[strlen (buf) - 1] = '\0';


@@ -263,7 +263,7 @@ diff -Naur tint-0.03b.orig/tint.c tint-0.03b/tint.c
 +#endif
 +      level = 1;
  }
 +#endif
 +      level = 1;
  }

- 
+

            /***************************************************************************/
 @@ -663,8 +682,15 @@
     if (ch != 'q')
            /***************************************************************************/
 @@ -663,8 +682,15 @@
     if (ch != 'q')


@@ -280,14 +280,14 @@ diff -Naur tint-0.03b.orig/tint.c tint-0.03b/tint.c
     exit (EXIT_SUCCESS);
 +#endif
  }
     exit (EXIT_SUCCESS);
 +#endif
  }

- 
+

 diff -Naur tint-0.03b.orig/utils.c tint-0.03b/utils.c
 --- tint-0.03b.orig/utils.c    2001-12-07 16:49:19.000000000 +0100
 +++ tint-0.03b/utils.c 2008-04-11 22:19:35.000000000 +0200
 @@ -27,9 +27,13 @@
   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   */
 diff -Naur tint-0.03b.orig/utils.c tint-0.03b/utils.c
 --- tint-0.03b.orig/utils.c    2001-12-07 16:49:19.000000000 +0100
 +++ tint-0.03b/utils.c 2008-04-11 22:19:35.000000000 +0200
 @@ -27,9 +27,13 @@
   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   */

- 
+

 +#include "config.h"
 +
 +#if 0
 +#include "config.h"
 +
 +#if 0


@@ -295,9 +295,9 @@ diff -Naur tint-0.03b.orig/utils.c tint-0.03b/utils.c
  #include <time.h>
  #include <limits.h>
 +#endif
  #include <time.h>
  #include <limits.h>
 +#endif

- 
+

  #include "typedefs.h"
  #include "typedefs.h"

- 
+

 @@ -41,8 +45,11 @@
  #ifdef USE_RAND
     srand (time (NULL));
 @@ -41,8 +45,11 @@
  #ifdef USE_RAND
     srand (time (NULL));


@@ -308,7 +308,7 @@ diff -Naur tint-0.03b.orig/utils.c tint-0.03b/utils.c
 +   srandom (123);
 +#endif
  }
 +   srandom (123);
 +#endif
  }

- 
+

  /*
 @@ -61,6 +68,7 @@
   * Convert an str to long. Returns TRUE if successful,
  /*
 @@ -61,6 +68,7 @@
   * Convert an str to long. Returns TRUE if successful,


@@ -321,5 +321,5 @@ diff -Naur tint-0.03b.orig/utils.c tint-0.03b/utils.c
 @@ -69,3 +77,4 @@
     return TRUE;
  }
 @@ -69,3 +77,4 @@
     return TRUE;
  }

- 
+

 +#endif
 +#endif

diff --git a/payloads/libpayload/Config.in b/payloads/libpayload/Config.in
index f3606ae5757beeb221b2ffb12c66e1bce2132c66..0cd0438fe463ceba85923622ce6523a2639c60de 100644 (file)
--- a/payloads/libpayload/Config.in
+++ b/payloads/libpayload/Config.in
@@ -134,9 +134,9 @@ config SERIAL_ACS_FALLBACK
          displaying a couple of other special graphics characters.  The
          ACS characters generally look good on screen, but can be difficult
          to cut and paste from a terminal window to a text editor.
          displaying a couple of other special graphics characters.  The
          ACS characters generally look good on screen, but can be difficult
          to cut and paste from a terminal window to a text editor.

-       
+

          Say 'y' here if you want to always use plain ASCII characters to
          Say 'y' here if you want to always use plain ASCII characters to

-         approximate the appearance of ACS characters on the serial port 
+         approximate the appearance of ACS characters on the serial port

          console.
 
 config VIDEO_CONSOLE
          console.
 
 config VIDEO_CONSOLE


@@ -194,12 +194,12 @@ config RTC_PORT_EXTENDED_VIA
          For recent chipsets with 256 NVRAM bytes, you have to access the
          upper 128 bytes (128-255) using two different I/O ports,
          usually 0x72/0x73.
          For recent chipsets with 256 NVRAM bytes, you have to access the
          upper 128 bytes (128-255) using two different I/O ports,
          usually 0x72/0x73.

-       
+

          On some chipsets this can be a different set of ports, though.
          The VIA VT8237R for example only recognizes the ports 0x74/0x75
          for accessing the high 128 NVRAM bytes (as seems to be the case for
          multiple VIA chipsets).
          On some chipsets this can be a different set of ports, though.
          The VIA VT8237R for example only recognizes the ports 0x74/0x75
          for accessing the high 128 NVRAM bytes (as seems to be the case for
          multiple VIA chipsets).

-       
+

          If you want to read or write CMOS bytes on computers with one of
          these chipsets, say 'y' here.
 
          If you want to read or write CMOS bytes on computers with one of
          these chipsets, say 'y' here.
 

diff --git a/payloads/libpayload/Doxyfile b/payloads/libpayload/Doxyfile
index 86b605f28dc0286ea320502cfd5ed5dc19f2d558..b5e5d57d8beaea61a3186140cfcb45d4b7c7542d 100644 (file)
--- a/payloads/libpayload/Doxyfile
+++ b/payloads/libpayload/Doxyfile
@@ -14,211 +14,211 @@
 # Project related configuration options
 #---------------------------------------------------------------------------
 
 # Project related configuration options
 #---------------------------------------------------------------------------
 

-# This tag specifies the encoding used for all characters in the config file 
-# that follow. The default is UTF-8 which is also the encoding used for all 
-# text before the first occurrence of this tag. Doxygen uses libiconv (or the 
-# iconv built into libc) for the transcoding. See 
+# This tag specifies the encoding used for all characters in the config file
+# that follow. The default is UTF-8 which is also the encoding used for all
+# text before the first occurrence of this tag. Doxygen uses libiconv (or the
+# iconv built into libc) for the transcoding. See

 # http://www.gnu.org/software/libiconv for the list of possible encodings.
 
 DOXYFILE_ENCODING      = UTF-8
 
 # http://www.gnu.org/software/libiconv for the list of possible encodings.
 
 DOXYFILE_ENCODING      = UTF-8
 

-# The PROJECT_NAME tag is a single word (or a sequence of words surrounded 
+# The PROJECT_NAME tag is a single word (or a sequence of words surrounded

 # by quotes) that should identify the project.
 
 PROJECT_NAME           = libpayload
 
 # by quotes) that should identify the project.
 
 PROJECT_NAME           = libpayload
 

-# The PROJECT_NUMBER tag can be used to enter a project or revision number. 
-# This could be handy for archiving the generated documentation or 
+# The PROJECT_NUMBER tag can be used to enter a project or revision number.
+# This could be handy for archiving the generated documentation or

 # if some version control system is used.
 
 # if some version control system is used.
 

-PROJECT_NUMBER         = 
+PROJECT_NUMBER         =

 
 

-# The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute) 
-# base path where the generated documentation will be put. 
-# If a relative path is entered, it will be relative to the location 
+# The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute)
+# base path where the generated documentation will be put.
+# If a relative path is entered, it will be relative to the location

 # where doxygen was started. If left blank the current directory will be used.
 
 OUTPUT_DIRECTORY       = doxygen
 
 # where doxygen was started. If left blank the current directory will be used.
 
 OUTPUT_DIRECTORY       = doxygen
 

-# If the CREATE_SUBDIRS tag is set to YES, then doxygen will create 
-# 4096 sub-directories (in 2 levels) under the output directory of each output 
-# format and will distribute the generated files over these directories. 
-# Enabling this option can be useful when feeding doxygen a huge amount of 
-# source files, where putting all generated files in the same directory would 
+# If the CREATE_SUBDIRS tag is set to YES, then doxygen will create
+# 4096 sub-directories (in 2 levels) under the output directory of each output
+# format and will distribute the generated files over these directories.
+# Enabling this option can be useful when feeding doxygen a huge amount of
+# source files, where putting all generated files in the same directory would

 # otherwise cause performance problems for the file system.
 
 CREATE_SUBDIRS         = NO
 
 # otherwise cause performance problems for the file system.
 
 CREATE_SUBDIRS         = NO
 

-# The OUTPUT_LANGUAGE tag is used to specify the language in which all 
-# documentation generated by doxygen is written. Doxygen will use this 
-# information to generate all constant output in the proper language. 
-# The default language is English, other supported languages are: 
-# Afrikaans, Arabic, Brazilian, Catalan, Chinese, Chinese-Traditional, 
-# Croatian, Czech, Danish, Dutch, Farsi, Finnish, French, German, Greek, 
-# Hungarian, Italian, Japanese, Japanese-en (Japanese with English messages), 
-# Korean, Korean-en, Lithuanian, Norwegian, Macedonian, Persian, Polish, 
-# Portuguese, Romanian, Russian, Serbian, Slovak, Slovene, Spanish, Swedish, 
+# The OUTPUT_LANGUAGE tag is used to specify the language in which all
+# documentation generated by doxygen is written. Doxygen will use this
+# information to generate all constant output in the proper language.
+# The default language is English, other supported languages are:
+# Afrikaans, Arabic, Brazilian, Catalan, Chinese, Chinese-Traditional,
+# Croatian, Czech, Danish, Dutch, Farsi, Finnish, French, German, Greek,
+# Hungarian, Italian, Japanese, Japanese-en (Japanese with English messages),
+# Korean, Korean-en, Lithuanian, Norwegian, Macedonian, Persian, Polish,
+# Portuguese, Romanian, Russian, Serbian, Slovak, Slovene, Spanish, Swedish,

 # and Ukrainian.
 
 OUTPUT_LANGUAGE        = English
 
 # and Ukrainian.
 
 OUTPUT_LANGUAGE        = English
 

-# If the BRIEF_MEMBER_DESC tag is set to YES (the default) Doxygen will 
-# include brief member descriptions after the members that are listed in 
-# the file and class documentation (similar to JavaDoc). 
+# If the BRIEF_MEMBER_DESC tag is set to YES (the default) Doxygen will
+# include brief member descriptions after the members that are listed in
+# the file and class documentation (similar to JavaDoc).

 # Set to NO to disable this.
 
 BRIEF_MEMBER_DESC      = YES
 
 # Set to NO to disable this.
 
 BRIEF_MEMBER_DESC      = YES
 

-# If the REPEAT_BRIEF tag is set to YES (the default) Doxygen will prepend 
-# the brief description of a member or function before the detailed description. 
-# Note: if both HIDE_UNDOC_MEMBERS and BRIEF_MEMBER_DESC are set to NO, the 
+# If the REPEAT_BRIEF tag is set to YES (the default) Doxygen will prepend
+# the brief description of a member or function before the detailed description.
+# Note: if both HIDE_UNDOC_MEMBERS and BRIEF_MEMBER_DESC are set to NO, the

 # brief descriptions will be completely suppressed.
 
 REPEAT_BRIEF           = YES
 
 # brief descriptions will be completely suppressed.
 
 REPEAT_BRIEF           = YES
 

-# This tag implements a quasi-intelligent brief description abbreviator 
-# that is used to form the text in various listings. Each string 
-# in this list, if found as the leading text of the brief description, will be 
-# stripped from the text and the result after processing the whole list, is 
-# used as the annotated text. Otherwise, the brief description is used as-is. 
-# If left blank, the following values are used ("$name" is automatically 
-# replaced with the name of the entity): "The $name class" "The $name widget" 
-# "The $name file" "is" "provides" "specifies" "contains" 
+# This tag implements a quasi-intelligent brief description abbreviator
+# that is used to form the text in various listings. Each string
+# in this list, if found as the leading text of the brief description, will be
+# stripped from the text and the result after processing the whole list, is
+# used as the annotated text. Otherwise, the brief description is used as-is.
+# If left blank, the following values are used ("$name" is automatically
+# replaced with the name of the entity): "The $name class" "The $name widget"
+# "The $name file" "is" "provides" "specifies" "contains"

 # "represents" "a" "an" "the"
 
 # "represents" "a" "an" "the"
 

-ABBREVIATE_BRIEF       = 
+ABBREVIATE_BRIEF       =

 
 

-# If the ALWAYS_DETAILED_SEC and REPEAT_BRIEF tags are both set to YES then 
-# Doxygen will generate a detailed section even if there is only a brief 
+# If the ALWAYS_DETAILED_SEC and REPEAT_BRIEF tags are both set to YES then
+# Doxygen will generate a detailed section even if there is only a brief

 # description.
 
 ALWAYS_DETAILED_SEC    = YES
 
 # description.
 
 ALWAYS_DETAILED_SEC    = YES
 

-# If the INLINE_INHERITED_MEMB tag is set to YES, doxygen will show all 
-# inherited members of a class in the documentation of that class as if those 
-# members were ordinary class members. Constructors, destructors and assignment 
+# If the INLINE_INHERITED_MEMB tag is set to YES, doxygen will show all
+# inherited members of a class in the documentation of that class as if those
+# members were ordinary class members. Constructors, destructors and assignment

 # operators of the base classes will not be shown.
 
 INLINE_INHERITED_MEMB  = NO
 
 # operators of the base classes will not be shown.
 
 INLINE_INHERITED_MEMB  = NO
 

-# If the FULL_PATH_NAMES tag is set to YES then Doxygen will prepend the full 
-# path before files name in the file list and in the header files. If set 
+# If the FULL_PATH_NAMES tag is set to YES then Doxygen will prepend the full
+# path before files name in the file list and in the header files. If set

 # to NO the shortest path that makes the file name unique will be used.
 
 FULL_PATH_NAMES        = YES
 
 # to NO the shortest path that makes the file name unique will be used.
 
 FULL_PATH_NAMES        = YES
 

-# If the FULL_PATH_NAMES tag is set to YES then the STRIP_FROM_PATH tag 
-# can be used to strip a user-defined part of the path. Stripping is 
-# only done if one of the specified strings matches the left-hand part of 
-# the path. The tag can be used to show relative paths in the file list. 
-# If left blank the directory from which doxygen is run is used as the 
+# If the FULL_PATH_NAMES tag is set to YES then the STRIP_FROM_PATH tag
+# can be used to strip a user-defined part of the path. Stripping is
+# only done if one of the specified strings matches the left-hand part of
+# the path. The tag can be used to show relative paths in the file list.
+# If left blank the directory from which doxygen is run is used as the

 # path to strip.
 
 # path to strip.
 

-STRIP_FROM_PATH        = 
+STRIP_FROM_PATH        =

 
 

-# The STRIP_FROM_INC_PATH tag can be used to strip a user-defined part of 
-# the path mentioned in the documentation of a class, which tells 
-# the reader which header file to include in order to use a class. 
-# If left blank only the name of the header file containing the class 
-# definition is used. Otherwise one should specify the include paths that 
+# The STRIP_FROM_INC_PATH tag can be used to strip a user-defined part of
+# the path mentioned in the documentation of a class, which tells
+# the reader which header file to include in order to use a class.
+# If left blank only the name of the header file containing the class
+# definition is used. Otherwise one should specify the include paths that

 # are normally passed to the compiler using the -I flag.
 
 # are normally passed to the compiler using the -I flag.
 

-STRIP_FROM_INC_PATH    = 
+STRIP_FROM_INC_PATH    =

 
 

-# If the SHORT_NAMES tag is set to YES, doxygen will generate much shorter 
-# (but less readable) file names. This can be useful is your file systems 
+# If the SHORT_NAMES tag is set to YES, doxygen will generate much shorter
+# (but less readable) file names. This can be useful is your file systems

 # doesn't support long names like on DOS, Mac, or CD-ROM.
 
 SHORT_NAMES            = NO
 
 # doesn't support long names like on DOS, Mac, or CD-ROM.
 
 SHORT_NAMES            = NO
 

-# If the JAVADOC_AUTOBRIEF tag is set to YES then Doxygen 
-# will interpret the first line (until the first dot) of a JavaDoc-style 
-# comment as the brief description. If set to NO, the JavaDoc 
-# comments will behave just like regular Qt-style comments 
+# If the JAVADOC_AUTOBRIEF tag is set to YES then Doxygen
+# will interpret the first line (until the first dot) of a JavaDoc-style
+# comment as the brief description. If set to NO, the JavaDoc
+# comments will behave just like regular Qt-style comments

 # (thus requiring an explicit @brief command for a brief description.)
 
 JAVADOC_AUTOBRIEF      = YES
 
 # (thus requiring an explicit @brief command for a brief description.)
 
 JAVADOC_AUTOBRIEF      = YES
 

-# If the QT_AUTOBRIEF tag is set to YES then Doxygen will 
-# interpret the first line (until the first dot) of a Qt-style 
-# comment as the brief description. If set to NO, the comments 
-# will behave just like regular Qt-style comments (thus requiring 
+# If the QT_AUTOBRIEF tag is set to YES then Doxygen will
+# interpret the first line (until the first dot) of a Qt-style
+# comment as the brief description. If set to NO, the comments
+# will behave just like regular Qt-style comments (thus requiring

 # an explicit \brief command for a brief description.)
 
 QT_AUTOBRIEF           = NO
 
 # an explicit \brief command for a brief description.)
 
 QT_AUTOBRIEF           = NO
 

-# The MULTILINE_CPP_IS_BRIEF tag can be set to YES to make Doxygen 
-# treat a multi-line C++ special comment block (i.e. a block of //! or /// 
-# comments) as a brief description. This used to be the default behaviour. 
-# The new default is to treat a multi-line C++ comment block as a detailed 
+# The MULTILINE_CPP_IS_BRIEF tag can be set to YES to make Doxygen
+# treat a multi-line C++ special comment block (i.e. a block of //! or ///
+# comments) as a brief description. This used to be the default behaviour.
+# The new default is to treat a multi-line C++ comment block as a detailed

 # description. Set this tag to YES if you prefer the old behaviour instead.
 
 MULTILINE_CPP_IS_BRIEF = NO
 
 # description. Set this tag to YES if you prefer the old behaviour instead.
 
 MULTILINE_CPP_IS_BRIEF = NO
 

-# If the DETAILS_AT_TOP tag is set to YES then Doxygen 
+# If the DETAILS_AT_TOP tag is set to YES then Doxygen

 # will output the detailed description near the top, like JavaDoc.
 # will output the detailed description near the top, like JavaDoc.

-# If set to NO, the detailed description appears after the member 
+# If set to NO, the detailed description appears after the member

 # documentation.
 
 DETAILS_AT_TOP         = NO
 
 # documentation.
 
 DETAILS_AT_TOP         = NO
 

-# If the INHERIT_DOCS tag is set to YES (the default) then an undocumented 
-# member inherits the documentation from any documented member that it 
+# If the INHERIT_DOCS tag is set to YES (the default) then an undocumented
+# member inherits the documentation from any documented member that it

 # re-implements.
 
 INHERIT_DOCS           = YES
 
 # re-implements.
 
 INHERIT_DOCS           = YES
 

-# If the SEPARATE_MEMBER_PAGES tag is set to YES, then doxygen will produce 
-# a new page for each member. If set to NO, the documentation of a member will 
+# If the SEPARATE_MEMBER_PAGES tag is set to YES, then doxygen will produce
+# a new page for each member. If set to NO, the documentation of a member will

 # be part of the file/class/namespace that contains it.
 
 SEPARATE_MEMBER_PAGES  = NO
 
 # be part of the file/class/namespace that contains it.
 
 SEPARATE_MEMBER_PAGES  = NO
 

-# The TAB_SIZE tag can be used to set the number of spaces in a tab. 
+# The TAB_SIZE tag can be used to set the number of spaces in a tab.

 # Doxygen uses this value to replace tabs by spaces in code fragments.
 
 TAB_SIZE               = 8
 
 # Doxygen uses this value to replace tabs by spaces in code fragments.
 
 TAB_SIZE               = 8
 

-# This tag can be used to specify a number of aliases that acts 
-# as commands in the documentation. An alias has the form "name=value". 
-# For example adding "sideeffect=\par Side Effects:\n" will allow you to 
-# put the command \sideeffect (or @sideeffect) in the documentation, which 
-# will result in a user-defined paragraph with heading "Side Effects:". 
+# This tag can be used to specify a number of aliases that acts
+# as commands in the documentation. An alias has the form "name=value".
+# For example adding "sideeffect=\par Side Effects:\n" will allow you to
+# put the command \sideeffect (or @sideeffect) in the documentation, which
+# will result in a user-defined paragraph with heading "Side Effects:".

 # You can put \n's in the value part of an alias to insert newlines.
 
 # You can put \n's in the value part of an alias to insert newlines.
 

-ALIASES                = 
+ALIASES                =

 
 

-# Set the OPTIMIZE_OUTPUT_FOR_C tag to YES if your project consists of C 
-# sources only. Doxygen will then generate output that is more tailored for C. 
-# For instance, some of the names that are used will be different. The list 
+# Set the OPTIMIZE_OUTPUT_FOR_C tag to YES if your project consists of C
+# sources only. Doxygen will then generate output that is more tailored for C.
+# For instance, some of the names that are used will be different. The list

 # of all members will be omitted, etc.
 
 OPTIMIZE_OUTPUT_FOR_C  = YES
 
 # of all members will be omitted, etc.
 
 OPTIMIZE_OUTPUT_FOR_C  = YES
 

-# Set the OPTIMIZE_OUTPUT_JAVA tag to YES if your project consists of Java 
-# sources only. Doxygen will then generate output that is more tailored for 
-# Java. For instance, namespaces will be presented as packages, qualified 
+# Set the OPTIMIZE_OUTPUT_JAVA tag to YES if your project consists of Java
+# sources only. Doxygen will then generate output that is more tailored for
+# Java. For instance, namespaces will be presented as packages, qualified

 # scopes will look different, etc.
 
 OPTIMIZE_OUTPUT_JAVA   = NO
 
 # scopes will look different, etc.
 
 OPTIMIZE_OUTPUT_JAVA   = NO
 

-# Set the OPTIMIZE_FOR_FORTRAN tag to YES if your project consists of Fortran 
-# sources only. Doxygen will then generate output that is more tailored for 
+# Set the OPTIMIZE_FOR_FORTRAN tag to YES if your project consists of Fortran
+# sources only. Doxygen will then generate output that is more tailored for

 # Fortran.
 
 OPTIMIZE_FOR_FORTRAN   = NO
 
 # Fortran.
 
 OPTIMIZE_FOR_FORTRAN   = NO
 

-# Set the OPTIMIZE_OUTPUT_VHDL tag to YES if your project consists of VHDL 
-# sources. Doxygen will then generate output that is tailored for 
+# Set the OPTIMIZE_OUTPUT_VHDL tag to YES if your project consists of VHDL
+# sources. Doxygen will then generate output that is tailored for

 # VHDL.
 
 OPTIMIZE_OUTPUT_VHDL   = NO
 
 # VHDL.
 
 OPTIMIZE_OUTPUT_VHDL   = NO
 

-# If you use STL classes (i.e. std::string, std::vector, etc.) but do not want 
-# to include (a tag file for) the STL sources as input, then you should 
-# set this tag to YES in order to let doxygen match functions declarations and 
-# definitions whose arguments contain STL classes (e.g. func(std::string); v.s. 
-# func(std::string) {}). This also make the inheritance and collaboration 
+# If you use STL classes (i.e. std::string, std::vector, etc.) but do not want
+# to include (a tag file for) the STL sources as input, then you should
+# set this tag to YES in order to let doxygen match functions declarations and
+# definitions whose arguments contain STL classes (e.g. func(std::string); v.s.
+# func(std::string) {}). This also make the inheritance and collaboration

 # diagrams that involve STL classes more complete and accurate.
 
 BUILTIN_STL_SUPPORT    = NO
 # diagrams that involve STL classes more complete and accurate.
 
 BUILTIN_STL_SUPPORT    = NO


@@ -228,42 +228,42 @@ BUILTIN_STL_SUPPORT    = NO
 
 CPP_CLI_SUPPORT        = NO
 
 
 CPP_CLI_SUPPORT        = NO
 

-# Set the SIP_SUPPORT tag to YES if your project consists of sip sources only. 
-# Doxygen will parse them like normal C++ but will assume all classes use public 
+# Set the SIP_SUPPORT tag to YES if your project consists of sip sources only.
+# Doxygen will parse them like normal C++ but will assume all classes use public

 # instead of private inheritance when no explicit protection keyword is present.
 
 SIP_SUPPORT            = NO
 
 # instead of private inheritance when no explicit protection keyword is present.
 
 SIP_SUPPORT            = NO
 

-# For Microsoft's IDL there are propget and propput attributes to indicate getter 
-# and setter methods for a property. Setting this option to YES (the default) 
-# will make doxygen to replace the get and set methods by a property in the 
-# documentation. This will only work if the methods are indeed getting or 
-# setting a simple type. If this is not the case, or you want to show the 
+# For Microsoft's IDL there are propget and propput attributes to indicate getter
+# and setter methods for a property. Setting this option to YES (the default)
+# will make doxygen to replace the get and set methods by a property in the
+# documentation. This will only work if the methods are indeed getting or
+# setting a simple type. If this is not the case, or you want to show the

 # methods anyway, you should set this option to NO.
 
 IDL_PROPERTY_SUPPORT   = YES
 
 # methods anyway, you should set this option to NO.
 
 IDL_PROPERTY_SUPPORT   = YES
 

-# If member grouping is used in the documentation and the DISTRIBUTE_GROUP_DOC 
-# tag is set to YES, then doxygen will reuse the documentation of the first 
-# member in the group (if any) for the other members of the group. By default 
+# If member grouping is used in the documentation and the DISTRIBUTE_GROUP_DOC
+# tag is set to YES, then doxygen will reuse the documentation of the first
+# member in the group (if any) for the other members of the group. By default

 # all members of a group must be documented explicitly.
 
 DISTRIBUTE_GROUP_DOC   = NO
 
 # all members of a group must be documented explicitly.
 
 DISTRIBUTE_GROUP_DOC   = NO
 

-# Set the SUBGROUPING tag to YES (the default) to allow class member groups of 
-# the same type (for instance a group of public functions) to be put as a 
-# subgroup of that type (e.g. under the Public Functions section). Set it to 
-# NO to prevent subgrouping. Alternatively, this can be done per class using 
+# Set the SUBGROUPING tag to YES (the default) to allow class member groups of
+# the same type (for instance a group of public functions) to be put as a
+# subgroup of that type (e.g. under the Public Functions section). Set it to
+# NO to prevent subgrouping. Alternatively, this can be done per class using

 # the \nosubgrouping command.
 
 SUBGROUPING            = YES
 
 # the \nosubgrouping command.
 
 SUBGROUPING            = YES
 

-# When TYPEDEF_HIDES_STRUCT is enabled, a typedef of a struct, union, or enum 
-# is documented as struct, union, or enum with the name of the typedef. So 
-# typedef struct TypeS {} TypeT, will appear in the documentation as a struct 
-# with name TypeT. When disabled the typedef will appear as a member of a file, 
-# namespace, or class. And the struct will be named TypeS. This can typically 
-# be useful for C code in case the coding convention dictates that all compound 
+# When TYPEDEF_HIDES_STRUCT is enabled, a typedef of a struct, union, or enum
+# is documented as struct, union, or enum with the name of the typedef. So
+# typedef struct TypeS {} TypeT, will appear in the documentation as a struct
+# with name TypeT. When disabled the typedef will appear as a member of a file,
+# namespace, or class. And the struct will be named TypeS. This can typically
+# be useful for C code in case the coding convention dictates that all compound

 # types are typedef'ed and only the typedef is referenced, never the tag name.
 
 TYPEDEF_HIDES_STRUCT   = NO
 # types are typedef'ed and only the typedef is referenced, never the tag name.
 
 TYPEDEF_HIDES_STRUCT   = NO


@@ -272,368 +272,368 @@ TYPEDEF_HIDES_STRUCT   = NO
 # Build related configuration options
 #---------------------------------------------------------------------------
 
 # Build related configuration options
 #---------------------------------------------------------------------------
 

-# If the EXTRACT_ALL tag is set to YES doxygen will assume all entities in 
-# documentation are documented, even if no documentation was available. 
-# Private class members and static file members will be hidden unless 
+# If the EXTRACT_ALL tag is set to YES doxygen will assume all entities in
+# documentation are documented, even if no documentation was available.
+# Private class members and static file members will be hidden unless

 # the EXTRACT_PRIVATE and EXTRACT_STATIC tags are set to YES
 
 EXTRACT_ALL            = YES
 
 # the EXTRACT_PRIVATE and EXTRACT_STATIC tags are set to YES
 
 EXTRACT_ALL            = YES
 

-# If the EXTRACT_PRIVATE tag is set to YES all private members of a class 
+# If the EXTRACT_PRIVATE tag is set to YES all private members of a class

 # will be included in the documentation.
 
 EXTRACT_PRIVATE        = NO
 
 # will be included in the documentation.
 
 EXTRACT_PRIVATE        = NO
 

-# If the EXTRACT_STATIC tag is set to YES all static members of a file 
+# If the EXTRACT_STATIC tag is set to YES all static members of a file

 # will be included in the documentation.
 
 EXTRACT_STATIC         = NO
 
 # will be included in the documentation.
 
 EXTRACT_STATIC         = NO
 

-# If the EXTRACT_LOCAL_CLASSES tag is set to YES classes (and structs) 
-# defined locally in source files will be included in the documentation. 
+# If the EXTRACT_LOCAL_CLASSES tag is set to YES classes (and structs)
+# defined locally in source files will be included in the documentation.

 # If set to NO only classes defined in header files are included.
 
 EXTRACT_LOCAL_CLASSES  = YES
 
 # If set to NO only classes defined in header files are included.
 
 EXTRACT_LOCAL_CLASSES  = YES
 

-# This flag is only useful for Objective-C code. When set to YES local 
-# methods, which are defined in the implementation section but not in 
-# the interface are included in the documentation. 
+# This flag is only useful for Objective-C code. When set to YES local
+# methods, which are defined in the implementation section but not in
+# the interface are included in the documentation.

 # If set to NO (the default) only methods in the interface are included.
 
 EXTRACT_LOCAL_METHODS  = NO
 
 # If set to NO (the default) only methods in the interface are included.
 
 EXTRACT_LOCAL_METHODS  = NO
 

-# If this flag is set to YES, the members of anonymous namespaces will be 
-# extracted and appear in the documentation as a namespace called 
-# 'anonymous_namespace{file}', where file will be replaced with the base 
-# name of the file that contains the anonymous namespace. By default 
+# If this flag is set to YES, the members of anonymous namespaces will be
+# extracted and appear in the documentation as a namespace called
+# 'anonymous_namespace{file}', where file will be replaced with the base
+# name of the file that contains the anonymous namespace. By default

 # anonymous namespace are hidden.
 
 EXTRACT_ANON_NSPACES   = NO
 
 # anonymous namespace are hidden.
 
 EXTRACT_ANON_NSPACES   = NO
 

-# If the HIDE_UNDOC_MEMBERS tag is set to YES, Doxygen will hide all 
-# undocumented members of documented classes, files or namespaces. 
-# If set to NO (the default) these members will be included in the 
-# various overviews, but no documentation section is generated. 
+# If the HIDE_UNDOC_MEMBERS tag is set to YES, Doxygen will hide all
+# undocumented members of documented classes, files or namespaces.
+# If set to NO (the default) these members will be included in the
+# various overviews, but no documentation section is generated.

 # This option has no effect if EXTRACT_ALL is enabled.
 
 HIDE_UNDOC_MEMBERS     = NO
 
 # This option has no effect if EXTRACT_ALL is enabled.
 
 HIDE_UNDOC_MEMBERS     = NO
 

-# If the HIDE_UNDOC_CLASSES tag is set to YES, Doxygen will hide all 
-# undocumented classes that are normally visible in the class hierarchy. 
-# If set to NO (the default) these classes will be included in the various 
+# If the HIDE_UNDOC_CLASSES tag is set to YES, Doxygen will hide all
+# undocumented classes that are normally visible in the class hierarchy.
+# If set to NO (the default) these classes will be included in the various

 # overviews. This option has no effect if EXTRACT_ALL is enabled.
 
 HIDE_UNDOC_CLASSES     = NO
 
 # overviews. This option has no effect if EXTRACT_ALL is enabled.
 
 HIDE_UNDOC_CLASSES     = NO
 

-# If the HIDE_FRIEND_COMPOUNDS tag is set to YES, Doxygen will hide all 
-# friend (class|struct|union) declarations. 
-# If set to NO (the default) these declarations will be included in the 
+# If the HIDE_FRIEND_COMPOUNDS tag is set to YES, Doxygen will hide all
+# friend (class|struct|union) declarations.
+# If set to NO (the default) these declarations will be included in the

 # documentation.
 
 HIDE_FRIEND_COMPOUNDS  = NO
 
 # documentation.
 
 HIDE_FRIEND_COMPOUNDS  = NO
 

-# If the HIDE_IN_BODY_DOCS tag is set to YES, Doxygen will hide any 
-# documentation blocks found inside the body of a function. 
-# If set to NO (the default) these blocks will be appended to the 
+# If the HIDE_IN_BODY_DOCS tag is set to YES, Doxygen will hide any
+# documentation blocks found inside the body of a function.
+# If set to NO (the default) these blocks will be appended to the

 # function's detailed documentation block.
 
 HIDE_IN_BODY_DOCS      = NO
 
 # function's detailed documentation block.
 
 HIDE_IN_BODY_DOCS      = NO
 

-# The INTERNAL_DOCS tag determines if documentation 
-# that is typed after a \internal command is included. If the tag is set 
-# to NO (the default) then the documentation will be excluded. 
+# The INTERNAL_DOCS tag determines if documentation
+# that is typed after a \internal command is included. If the tag is set
+# to NO (the default) then the documentation will be excluded.

 # Set it to YES to include the internal documentation.
 
 INTERNAL_DOCS          = NO
 
 # Set it to YES to include the internal documentation.
 
 INTERNAL_DOCS          = NO
 

-# If the CASE_SENSE_NAMES tag is set to NO then Doxygen will only generate 
-# file names in lower-case letters. If set to YES upper-case letters are also 
-# allowed. This is useful if you have classes or files whose names only differ 
-# in case and if your file system supports case sensitive file names. Windows 
+# If the CASE_SENSE_NAMES tag is set to NO then Doxygen will only generate
+# file names in lower-case letters. If set to YES upper-case letters are also
+# allowed. This is useful if you have classes or files whose names only differ
+# in case and if your file system supports case sensitive file names. Windows

 # and Mac users are advised to set this option to NO.
 
 CASE_SENSE_NAMES       = YES
 
 # and Mac users are advised to set this option to NO.
 
 CASE_SENSE_NAMES       = YES
 

-# If the HIDE_SCOPE_NAMES tag is set to NO (the default) then Doxygen 
-# will show members with their full class and namespace scopes in the 
+# If the HIDE_SCOPE_NAMES tag is set to NO (the default) then Doxygen
+# will show members with their full class and namespace scopes in the

 # documentation. If set to YES the scope will be hidden.
 
 HIDE_SCOPE_NAMES       = NO
 
 # documentation. If set to YES the scope will be hidden.
 
 HIDE_SCOPE_NAMES       = NO
 

-# If the SHOW_INCLUDE_FILES tag is set to YES (the default) then Doxygen 
-# will put a list of the files that are included by a file in the documentation 
+# If the SHOW_INCLUDE_FILES tag is set to YES (the default) then Doxygen
+# will put a list of the files that are included by a file in the documentation

 # of that file.
 
 SHOW_INCLUDE_FILES     = YES
 
 # of that file.
 
 SHOW_INCLUDE_FILES     = YES
 

-# If the INLINE_INFO tag is set to YES (the default) then a tag [inline] 
+# If the INLINE_INFO tag is set to YES (the default) then a tag [inline]

 # is inserted in the documentation for inline members.
 
 INLINE_INFO            = YES
 
 # is inserted in the documentation for inline members.
 
 INLINE_INFO            = YES
 

-# If the SORT_MEMBER_DOCS tag is set to YES (the default) then doxygen 
-# will sort the (detailed) documentation of file and class members 
-# alphabetically by member name. If set to NO the members will appear in 
+# If the SORT_MEMBER_DOCS tag is set to YES (the default) then doxygen
+# will sort the (detailed) documentation of file and class members
+# alphabetically by member name. If set to NO the members will appear in

 # declaration order.
 
 SORT_MEMBER_DOCS       = YES
 
 # declaration order.
 
 SORT_MEMBER_DOCS       = YES
 

-# If the SORT_BRIEF_DOCS tag is set to YES then doxygen will sort the 
-# brief documentation of file, namespace and class members alphabetically 
-# by member name. If set to NO (the default) the members will appear in 
+# If the SORT_BRIEF_DOCS tag is set to YES then doxygen will sort the
+# brief documentation of file, namespace and class members alphabetically
+# by member name. If set to NO (the default) the members will appear in

 # declaration order.
 
 SORT_BRIEF_DOCS        = NO
 
 # declaration order.
 
 SORT_BRIEF_DOCS        = NO
 

-# If the SORT_GROUP_NAMES tag is set to YES then doxygen will sort the 
-# hierarchy of group names into alphabetical order. If set to NO (the default) 
+# If the SORT_GROUP_NAMES tag is set to YES then doxygen will sort the
+# hierarchy of group names into alphabetical order. If set to NO (the default)

 # the group names will appear in their defined order.
 
 SORT_GROUP_NAMES       = NO
 
 # the group names will appear in their defined order.
 
 SORT_GROUP_NAMES       = NO
 

-# If the SORT_BY_SCOPE_NAME tag is set to YES, the class list will be 
-# sorted by fully-qualified names, including namespaces. If set to 
-# NO (the default), the class list will be sorted only by class name, 
-# not including the namespace part. 
+# If the SORT_BY_SCOPE_NAME tag is set to YES, the class list will be
+# sorted by fully-qualified names, including namespaces. If set to
+# NO (the default), the class list will be sorted only by class name,
+# not including the namespace part.

 # Note: This option is not very useful if HIDE_SCOPE_NAMES is set to YES.
 # Note: This option is not very useful if HIDE_SCOPE_NAMES is set to YES.

-# Note: This option applies only to the class list, not to the 
+# Note: This option applies only to the class list, not to the

 # alphabetical list.
 
 SORT_BY_SCOPE_NAME     = NO
 
 # alphabetical list.
 
 SORT_BY_SCOPE_NAME     = NO
 

-# The GENERATE_TODOLIST tag can be used to enable (YES) or 
-# disable (NO) the todo list. This list is created by putting \todo 
+# The GENERATE_TODOLIST tag can be used to enable (YES) or
+# disable (NO) the todo list. This list is created by putting \todo

 # commands in the documentation.
 
 GENERATE_TODOLIST      = YES
 
 # commands in the documentation.
 
 GENERATE_TODOLIST      = YES
 

-# The GENERATE_TESTLIST tag can be used to enable (YES) or 
-# disable (NO) the test list. This list is created by putting \test 
+# The GENERATE_TESTLIST tag can be used to enable (YES) or
+# disable (NO) the test list. This list is created by putting \test

 # commands in the documentation.
 
 GENERATE_TESTLIST      = YES
 
 # commands in the documentation.
 
 GENERATE_TESTLIST      = YES
 

-# The GENERATE_BUGLIST tag can be used to enable (YES) or 
-# disable (NO) the bug list. This list is created by putting \bug 
+# The GENERATE_BUGLIST tag can be used to enable (YES) or
+# disable (NO) the bug list. This list is created by putting \bug

 # commands in the documentation.
 
 GENERATE_BUGLIST       = YES
 
 # commands in the documentation.
 
 GENERATE_BUGLIST       = YES
 

-# The GENERATE_DEPRECATEDLIST tag can be used to enable (YES) or 
-# disable (NO) the deprecated list. This list is created by putting 
+# The GENERATE_DEPRECATEDLIST tag can be used to enable (YES) or
+# disable (NO) the deprecated list. This list is created by putting

 # \deprecated commands in the documentation.
 
 GENERATE_DEPRECATEDLIST= YES
 
 # \deprecated commands in the documentation.
 
 GENERATE_DEPRECATEDLIST= YES
 

-# The ENABLED_SECTIONS tag can be used to enable conditional 
+# The ENABLED_SECTIONS tag can be used to enable conditional

 # documentation sections, marked by \if sectionname ... \endif.
 
 # documentation sections, marked by \if sectionname ... \endif.
 

-ENABLED_SECTIONS       = 
+ENABLED_SECTIONS       =

 
 

-# The MAX_INITIALIZER_LINES tag determines the maximum number of lines 
-# the initial value of a variable or define consists of for it to appear in 
-# the documentation. If the initializer consists of more lines than specified 
-# here it will be hidden. Use a value of 0 to hide initializers completely. 
-# The appearance of the initializer of individual variables and defines in the 
-# documentation can be controlled using \showinitializer or \hideinitializer 
+# The MAX_INITIALIZER_LINES tag determines the maximum number of lines
+# the initial value of a variable or define consists of for it to appear in
+# the documentation. If the initializer consists of more lines than specified
+# here it will be hidden. Use a value of 0 to hide initializers completely.
+# The appearance of the initializer of individual variables and defines in the
+# documentation can be controlled using \showinitializer or \hideinitializer

 # command in the documentation regardless of this setting.
 
 MAX_INITIALIZER_LINES  = 30
 
 # command in the documentation regardless of this setting.
 
 MAX_INITIALIZER_LINES  = 30
 

-# Set the SHOW_USED_FILES tag to NO to disable the list of files generated 
-# at the bottom of the documentation of classes and structs. If set to YES the 
+# Set the SHOW_USED_FILES tag to NO to disable the list of files generated
+# at the bottom of the documentation of classes and structs. If set to YES the

 # list will mention the files that were used to generate the documentation.
 
 SHOW_USED_FILES        = YES
 
 # list will mention the files that were used to generate the documentation.
 
 SHOW_USED_FILES        = YES
 

-# If the sources in your project are distributed over multiple directories 
-# then setting the SHOW_DIRECTORIES tag to YES will show the directory hierarchy 
+# If the sources in your project are distributed over multiple directories
+# then setting the SHOW_DIRECTORIES tag to YES will show the directory hierarchy

 # in the documentation. The default is NO.
 
 SHOW_DIRECTORIES       = NO
 
 # Set the SHOW_FILES tag to NO to disable the generation of the Files page.
 # in the documentation. The default is NO.
 
 SHOW_DIRECTORIES       = NO
 
 # Set the SHOW_FILES tag to NO to disable the generation of the Files page.

-# This will remove the Files entry from the Quick Index and from the 
+# This will remove the Files entry from the Quick Index and from the

 # Folder Tree View (if specified). The default is YES.
 
 SHOW_FILES             = YES
 
 # Folder Tree View (if specified). The default is YES.
 
 SHOW_FILES             = YES
 

-# Set the SHOW_NAMESPACES tag to NO to disable the generation of the 
+# Set the SHOW_NAMESPACES tag to NO to disable the generation of the

 # Namespaces page.  This will remove the Namespaces entry from the Quick Index
 # and from the Folder Tree View (if specified). The default is YES.
 
 SHOW_NAMESPACES        = YES
 
 # Namespaces page.  This will remove the Namespaces entry from the Quick Index
 # and from the Folder Tree View (if specified). The default is YES.
 
 SHOW_NAMESPACES        = YES
 

-# The FILE_VERSION_FILTER tag can be used to specify a program or script that 
-# doxygen should invoke to get the current version for each file (typically from 
-# the version control system). Doxygen will invoke the program by executing (via 
-# popen()) the command <command> <input-file>, where <command> is the value of 
-# the FILE_VERSION_FILTER tag, and <input-file> is the name of an input file 
-# provided by doxygen. Whatever the program writes to standard output 
+# The FILE_VERSION_FILTER tag can be used to specify a program or script that
+# doxygen should invoke to get the current version for each file (typically from
+# the version control system). Doxygen will invoke the program by executing (via
+# popen()) the command <command> <input-file>, where <command> is the value of
+# the FILE_VERSION_FILTER tag, and <input-file> is the name of an input file
+# provided by doxygen. Whatever the program writes to standard output

 # is used as the file version. See the manual for examples.
 
 # is used as the file version. See the manual for examples.
 

-FILE_VERSION_FILTER    = 
+FILE_VERSION_FILTER    =

 
 #---------------------------------------------------------------------------
 # configuration options related to warning and progress messages
 #---------------------------------------------------------------------------
 
 
 #---------------------------------------------------------------------------
 # configuration options related to warning and progress messages
 #---------------------------------------------------------------------------
 

-# The QUIET tag can be used to turn on/off the messages that are generated 
+# The QUIET tag can be used to turn on/off the messages that are generated

 # by doxygen. Possible values are YES and NO. If left blank NO is used.
 
 QUIET                  = NO
 
 # by doxygen. Possible values are YES and NO. If left blank NO is used.
 
 QUIET                  = NO
 

-# The WARNINGS tag can be used to turn on/off the warning messages that are 
-# generated by doxygen. Possible values are YES and NO. If left blank 
+# The WARNINGS tag can be used to turn on/off the warning messages that are
+# generated by doxygen. Possible values are YES and NO. If left blank

 # NO is used.
 
 WARNINGS               = YES
 
 # NO is used.
 
 WARNINGS               = YES
 

-# If WARN_IF_UNDOCUMENTED is set to YES, then doxygen will generate warnings 
-# for undocumented members. If EXTRACT_ALL is set to YES then this flag will 
+# If WARN_IF_UNDOCUMENTED is set to YES, then doxygen will generate warnings
+# for undocumented members. If EXTRACT_ALL is set to YES then this flag will

 # automatically be disabled.
 
 WARN_IF_UNDOCUMENTED   = YES
 
 # automatically be disabled.
 
 WARN_IF_UNDOCUMENTED   = YES
 

-# If WARN_IF_DOC_ERROR is set to YES, doxygen will generate warnings for 
-# potential errors in the documentation, such as not documenting some 
-# parameters in a documented function, or documenting parameters that 
+# If WARN_IF_DOC_ERROR is set to YES, doxygen will generate warnings for
+# potential errors in the documentation, such as not documenting some
+# parameters in a documented function, or documenting parameters that

 # don't exist or using markup commands wrongly.
 
 WARN_IF_DOC_ERROR      = YES
 
 # don't exist or using markup commands wrongly.
 
 WARN_IF_DOC_ERROR      = YES
 

-# This WARN_NO_PARAMDOC option can be abled to get warnings for 
-# functions that are documented, but have no documentation for their parameters 
-# or return value. If set to NO (the default) doxygen will only warn about 
-# wrong or incomplete parameter documentation, but not about the absence of 
+# This WARN_NO_PARAMDOC option can be abled to get warnings for
+# functions that are documented, but have no documentation for their parameters
+# or return value. If set to NO (the default) doxygen will only warn about
+# wrong or incomplete parameter documentation, but not about the absence of

 # documentation.
 
 WARN_NO_PARAMDOC       = YES
 
 # documentation.
 
 WARN_NO_PARAMDOC       = YES
 

-# The WARN_FORMAT tag determines the format of the warning messages that 
-# doxygen can produce. The string should contain the $file, $line, and $text 
-# tags, which will be replaced by the file and line number from which the 
-# warning originated and the warning text. Optionally the format may contain 
-# $version, which will be replaced by the version of the file (if it could 
+# The WARN_FORMAT tag determines the format of the warning messages that
+# doxygen can produce. The string should contain the $file, $line, and $text
+# tags, which will be replaced by the file and line number from which the
+# warning originated and the warning text. Optionally the format may contain
+# $version, which will be replaced by the version of the file (if it could

 # be obtained via FILE_VERSION_FILTER)
 
 WARN_FORMAT            = "$file:$line: $text"
 
 # be obtained via FILE_VERSION_FILTER)
 
 WARN_FORMAT            = "$file:$line: $text"
 

-# The WARN_LOGFILE tag can be used to specify a file to which warning 
-# and error messages should be written. If left blank the output is written 
+# The WARN_LOGFILE tag can be used to specify a file to which warning
+# and error messages should be written. If left blank the output is written

 # to stderr.
 
 # to stderr.
 

-WARN_LOGFILE           = 
+WARN_LOGFILE           =

 
 #---------------------------------------------------------------------------
 # configuration options related to the input files
 #---------------------------------------------------------------------------
 
 
 #---------------------------------------------------------------------------
 # configuration options related to the input files
 #---------------------------------------------------------------------------
 

-# The INPUT tag can be used to specify the files and/or directories that contain 
-# documented source files. You may enter file names like "myfile.cpp" or 
-# directories like "/usr/src/myproject". Separate the files or directories 
+# The INPUT tag can be used to specify the files and/or directories that contain
+# documented source files. You may enter file names like "myfile.cpp" or
+# directories like "/usr/src/myproject". Separate the files or directories

 # with spaces.
 
 INPUT                  = crypto curses drivers i386 include libc
 
 # with spaces.
 
 INPUT                  = crypto curses drivers i386 include libc
 

-# This tag can be used to specify the character encoding of the source files 
-# that doxygen parses. Internally doxygen uses the UTF-8 encoding, which is 
-# also the default input encoding. Doxygen uses libiconv (or the iconv built 
-# into libc) for the transcoding. See http://www.gnu.org/software/libiconv for 
+# This tag can be used to specify the character encoding of the source files
+# that doxygen parses. Internally doxygen uses the UTF-8 encoding, which is
+# also the default input encoding. Doxygen uses libiconv (or the iconv built
+# into libc) for the transcoding. See http://www.gnu.org/software/libiconv for

 # the list of possible encodings.
 
 INPUT_ENCODING         = UTF-8
 
 # the list of possible encodings.
 
 INPUT_ENCODING         = UTF-8
 

-# If the value of the INPUT tag contains directories, you can use the 
-# FILE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp 
-# and *.h) to filter out the source-files in the directories. If left 
-# blank the following patterns are tested: 
-# *.c *.cc *.cxx *.cpp *.c++ *.java *.ii *.ixx *.ipp *.i++ *.inl *.h *.hh *.hxx 
+# If the value of the INPUT tag contains directories, you can use the
+# FILE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp
+# and *.h) to filter out the source-files in the directories. If left
+# blank the following patterns are tested:
+# *.c *.cc *.cxx *.cpp *.c++ *.java *.ii *.ixx *.ipp *.i++ *.inl *.h *.hh *.hxx

 # *.hpp *.h++ *.idl *.odl *.cs *.php *.php3 *.inc *.m *.mm *.py *.f90
 
 FILE_PATTERNS          = *.c *.h
 
 # *.hpp *.h++ *.idl *.odl *.cs *.php *.php3 *.inc *.m *.mm *.py *.f90
 
 FILE_PATTERNS          = *.c *.h
 

-# The RECURSIVE tag can be used to turn specify whether or not subdirectories 
-# should be searched for input files as well. Possible values are YES and NO. 
+# The RECURSIVE tag can be used to turn specify whether or not subdirectories
+# should be searched for input files as well. Possible values are YES and NO.

 # If left blank NO is used.
 
 RECURSIVE              = YES
 
 # If left blank NO is used.
 
 RECURSIVE              = YES
 

-# The EXCLUDE tag can be used to specify files and/or directories that should 
-# excluded from the INPUT source files. This way you can easily exclude a 
+# The EXCLUDE tag can be used to specify files and/or directories that should
+# excluded from the INPUT source files. This way you can easily exclude a

 # subdirectory from a directory tree whose root is specified with the INPUT tag.
 
 EXCLUDE                =
 
 # subdirectory from a directory tree whose root is specified with the INPUT tag.
 
 EXCLUDE                =
 

-# The EXCLUDE_SYMLINKS tag can be used select whether or not files or 
-# directories that are symbolic links (a Unix filesystem feature) are excluded 
+# The EXCLUDE_SYMLINKS tag can be used select whether or not files or
+# directories that are symbolic links (a Unix filesystem feature) are excluded

 # from the input.
 
 EXCLUDE_SYMLINKS       = NO
 
 # from the input.
 
 EXCLUDE_SYMLINKS       = NO
 

-# If the value of the INPUT tag contains directories, you can use the 
-# EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude 
-# certain files from those directories. Note that the wildcards are matched 
-# against the file with absolute path, so to exclude all test directories 
+# If the value of the INPUT tag contains directories, you can use the
+# EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude
+# certain files from those directories. Note that the wildcards are matched
+# against the file with absolute path, so to exclude all test directories

 # for example use the pattern */test/*
 
 EXCLUDE_PATTERNS       = */.svn*
 
 # for example use the pattern */test/*
 
 EXCLUDE_PATTERNS       = */.svn*
 

-# The EXCLUDE_SYMBOLS tag can be used to specify one or more symbol names 
-# (namespaces, classes, functions, etc.) that should be excluded from the 
-# output. The symbol name can be a fully qualified name, a word, or if the 
-# wildcard * is used, a substring. Examples: ANamespace, AClass, 
+# The EXCLUDE_SYMBOLS tag can be used to specify one or more symbol names
+# (namespaces, classes, functions, etc.) that should be excluded from the
+# output. The symbol name can be a fully qualified name, a word, or if the
+# wildcard * is used, a substring. Examples: ANamespace, AClass,

 # AClass::ANamespace, ANamespace::*Test
 
 # AClass::ANamespace, ANamespace::*Test
 

-EXCLUDE_SYMBOLS        = 
+EXCLUDE_SYMBOLS        =

 
 

-# The EXAMPLE_PATH tag can be used to specify one or more files or 
-# directories that contain example code fragments that are included (see 
+# The EXAMPLE_PATH tag can be used to specify one or more files or
+# directories that contain example code fragments that are included (see

 # the \include command).
 
 EXAMPLE_PATH           = sample
 
 # the \include command).
 
 EXAMPLE_PATH           = sample
 

-# If the value of the EXAMPLE_PATH tag contains directories, you can use the 
-# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp 
-# and *.h) to filter out the source-files in the directories. If left 
+# If the value of the EXAMPLE_PATH tag contains directories, you can use the
+# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp
+# and *.h) to filter out the source-files in the directories. If left

 # blank all files are included.
 
 # blank all files are included.
 

-EXAMPLE_PATTERNS       = 
+EXAMPLE_PATTERNS       =

 
 

-# If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be 
-# searched for input files to be used with the \include or \dontinclude 
-# commands irrespective of the value of the RECURSIVE tag. 
+# If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be
+# searched for input files to be used with the \include or \dontinclude
+# commands irrespective of the value of the RECURSIVE tag.

 # Possible values are YES and NO. If left blank NO is used.
 
 EXAMPLE_RECURSIVE      = NO
 
 # Possible values are YES and NO. If left blank NO is used.
 
 EXAMPLE_RECURSIVE      = NO
 

-# The IMAGE_PATH tag can be used to specify one or more files or 
-# directories that contain image that are included in the documentation (see 
+# The IMAGE_PATH tag can be used to specify one or more files or
+# directories that contain image that are included in the documentation (see

 # the \image command).
 
 # the \image command).
 

-IMAGE_PATH             = 
+IMAGE_PATH             =

 
 

-# The INPUT_FILTER tag can be used to specify a program that doxygen should 
-# invoke to filter for each input file. Doxygen will invoke the filter program 
-# by executing (via popen()) the command <filter> <input-file>, where <filter> 
-# is the value of the INPUT_FILTER tag, and <input-file> is the name of an 
-# input file. Doxygen will then use the output that the filter program writes 
-# to standard output.  If FILTER_PATTERNS is specified, this tag will be 
+# The INPUT_FILTER tag can be used to specify a program that doxygen should
+# invoke to filter for each input file. Doxygen will invoke the filter program
+# by executing (via popen()) the command <filter> <input-file>, where <filter>
+# is the value of the INPUT_FILTER tag, and <input-file> is the name of an
+# input file. Doxygen will then use the output that the filter program writes
+# to standard output.  If FILTER_PATTERNS is specified, this tag will be

 # ignored.
 
 # ignored.
 

-INPUT_FILTER           = 
+INPUT_FILTER           =

 
 

-# The FILTER_PATTERNS tag can be used to specify filters on a per file pattern 
-# basis.  Doxygen will compare the file name with each pattern and apply the 
-# filter if there is a match.  The filters are a list of the form: 
-# pattern=filter (like *.cpp=my_cpp_filter). See INPUT_FILTER for further 
-# info on how filters are used. If FILTER_PATTERNS is empty, INPUT_FILTER 
+# The FILTER_PATTERNS tag can be used to specify filters on a per file pattern
+# basis.  Doxygen will compare the file name with each pattern and apply the
+# filter if there is a match.  The filters are a list of the form:
+# pattern=filter (like *.cpp=my_cpp_filter). See INPUT_FILTER for further
+# info on how filters are used. If FILTER_PATTERNS is empty, INPUT_FILTER

 # is applied to all files.
 
 # is applied to all files.
 

-FILTER_PATTERNS        = 
+FILTER_PATTERNS        =

 
 

-# If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using 
-# INPUT_FILTER) will be used to filter the input files when producing source 
+# If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using
+# INPUT_FILTER) will be used to filter the input files when producing source

 # files to browse (i.e. when SOURCE_BROWSER is set to YES).
 
 FILTER_SOURCE_FILES    = NO
 # files to browse (i.e. when SOURCE_BROWSER is set to YES).
 
 FILTER_SOURCE_FILES    = NO


@@ -642,32 +642,32 @@ FILTER_SOURCE_FILES    = NO
 # configuration options related to source browsing
 #---------------------------------------------------------------------------
 
 # configuration options related to source browsing
 #---------------------------------------------------------------------------
 

-# If the SOURCE_BROWSER tag is set to YES then a list of source files will 
-# be generated. Documented entities will be cross-referenced with these sources. 
-# Note: To get rid of all source code in the generated output, make sure also 
+# If the SOURCE_BROWSER tag is set to YES then a list of source files will
+# be generated. Documented entities will be cross-referenced with these sources.
+# Note: To get rid of all source code in the generated output, make sure also

 # VERBATIM_HEADERS is set to NO.
 
 SOURCE_BROWSER         = YES
 
 # VERBATIM_HEADERS is set to NO.
 
 SOURCE_BROWSER         = YES
 

-# Setting the INLINE_SOURCES tag to YES will include the body 
+# Setting the INLINE_SOURCES tag to YES will include the body

 # of functions and classes directly in the documentation.
 
 INLINE_SOURCES         = NO
 
 # of functions and classes directly in the documentation.
 
 INLINE_SOURCES         = NO
 

-# Setting the STRIP_CODE_COMMENTS tag to YES (the default) will instruct 
-# doxygen to hide any special comment blocks from generated source code 
+# Setting the STRIP_CODE_COMMENTS tag to YES (the default) will instruct
+# doxygen to hide any special comment blocks from generated source code

 # fragments. Normal C and C++ comments will always remain visible.
 
 STRIP_CODE_COMMENTS    = NO
 
 # fragments. Normal C and C++ comments will always remain visible.
 
 STRIP_CODE_COMMENTS    = NO
 

-# If the REFERENCED_BY_RELATION tag is set to YES 
-# then for each documented function all documented 
+# If the REFERENCED_BY_RELATION tag is set to YES
+# then for each documented function all documented

 # functions referencing it will be listed.
 
 REFERENCED_BY_RELATION = YES
 
 # functions referencing it will be listed.
 
 REFERENCED_BY_RELATION = YES
 

-# If the REFERENCES_RELATION tag is set to YES 
-# then for each documented function all documented entities 
+# If the REFERENCES_RELATION tag is set to YES
+# then for each documented function all documented entities

 # called/used by that function will be listed.
 
 REFERENCES_RELATION    = YES
 # called/used by that function will be listed.
 
 REFERENCES_RELATION    = YES


@@ -679,16 +679,16 @@ REFERENCES_RELATION    = YES
 
 REFERENCES_LINK_SOURCE = YES
 
 
 REFERENCES_LINK_SOURCE = YES
 

-# If the USE_HTAGS tag is set to YES then the references to source code 
-# will point to the HTML generated by the htags(1) tool instead of doxygen 
-# built-in source browser. The htags tool is part of GNU's global source 
-# tagging system (see http://www.gnu.org/software/global/global.html). You 
+# If the USE_HTAGS tag is set to YES then the references to source code
+# will point to the HTML generated by the htags(1) tool instead of doxygen
+# built-in source browser. The htags tool is part of GNU's global source
+# tagging system (see http://www.gnu.org/software/global/global.html). You

 # will need version 4.8.6 or higher.
 
 USE_HTAGS              = NO
 
 # will need version 4.8.6 or higher.
 
 USE_HTAGS              = NO
 

-# If the VERBATIM_HEADERS tag is set to YES (the default) then Doxygen 
-# will generate a verbatim copy of the header file for each class for 
+# If the VERBATIM_HEADERS tag is set to YES (the default) then Doxygen
+# will generate a verbatim copy of the header file for each class for

 # which an include is specified. Set to NO to disable this.
 
 VERBATIM_HEADERS       = YES
 # which an include is specified. Set to NO to disable this.
 
 VERBATIM_HEADERS       = YES


@@ -697,129 +697,129 @@ VERBATIM_HEADERS       = YES
 # configuration options related to the alphabetical class index
 #---------------------------------------------------------------------------
 
 # configuration options related to the alphabetical class index
 #---------------------------------------------------------------------------
 

-# If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index 
-# of all compounds will be generated. Enable this if the project 
+# If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index
+# of all compounds will be generated. Enable this if the project

 # contains a lot of classes, structs, unions or interfaces.
 
 ALPHABETICAL_INDEX     = YES
 
 # contains a lot of classes, structs, unions or interfaces.
 
 ALPHABETICAL_INDEX     = YES
 

-# If the alphabetical index is enabled (see ALPHABETICAL_INDEX) then 
-# the COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns 
+# If the alphabetical index is enabled (see ALPHABETICAL_INDEX) then
+# the COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns

 # in which this list will be split (can be a number in the range [1..20])
 
 COLS_IN_ALPHA_INDEX    = 5
 
 # in which this list will be split (can be a number in the range [1..20])
 
 COLS_IN_ALPHA_INDEX    = 5
 

-# In case all classes in a project start with a common prefix, all 
-# classes will be put under the same header in the alphabetical index. 
-# The IGNORE_PREFIX tag can be used to specify one or more prefixes that 
+# In case all classes in a project start with a common prefix, all
+# classes will be put under the same header in the alphabetical index.
+# The IGNORE_PREFIX tag can be used to specify one or more prefixes that

 # should be ignored while generating the index headers.
 
 # should be ignored while generating the index headers.
 

-IGNORE_PREFIX          = 
+IGNORE_PREFIX          =

 
 #---------------------------------------------------------------------------
 # configuration options related to the HTML output
 #---------------------------------------------------------------------------
 
 
 #---------------------------------------------------------------------------
 # configuration options related to the HTML output
 #---------------------------------------------------------------------------
 

-# If the GENERATE_HTML tag is set to YES (the default) Doxygen will 
+# If the GENERATE_HTML tag is set to YES (the default) Doxygen will

 # generate HTML output.
 
 GENERATE_HTML          = YES
 
 # generate HTML output.
 
 GENERATE_HTML          = YES
 

-# The HTML_OUTPUT tag is used to specify where the HTML docs will be put. 
-# If a relative path is entered the value of OUTPUT_DIRECTORY will be 
+# The HTML_OUTPUT tag is used to specify where the HTML docs will be put.
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be

 # put in front of it. If left blank `html' will be used as the default path.
 
 HTML_OUTPUT            = html
 
 # put in front of it. If left blank `html' will be used as the default path.
 
 HTML_OUTPUT            = html
 

-# The HTML_FILE_EXTENSION tag can be used to specify the file extension for 
-# each generated HTML page (for example: .htm,.php,.asp). If it is left blank 
+# The HTML_FILE_EXTENSION tag can be used to specify the file extension for
+# each generated HTML page (for example: .htm,.php,.asp). If it is left blank

 # doxygen will generate files with .html extension.
 
 HTML_FILE_EXTENSION    = .html
 
 # doxygen will generate files with .html extension.
 
 HTML_FILE_EXTENSION    = .html
 

-# The HTML_HEADER tag can be used to specify a personal HTML header for 
-# each generated HTML page. If it is left blank doxygen will generate a 
+# The HTML_HEADER tag can be used to specify a personal HTML header for
+# each generated HTML page. If it is left blank doxygen will generate a

 # standard header.
 
 # standard header.
 

-HTML_HEADER            = 
+HTML_HEADER            =

 
 

-# The HTML_FOOTER tag can be used to specify a personal HTML footer for 
-# each generated HTML page. If it is left blank doxygen will generate a 
+# The HTML_FOOTER tag can be used to specify a personal HTML footer for
+# each generated HTML page. If it is left blank doxygen will generate a

 # standard footer.
 
 # standard footer.
 

-HTML_FOOTER            = 
+HTML_FOOTER            =

 
 

-# The HTML_STYLESHEET tag can be used to specify a user-defined cascading 
-# style sheet that is used by each HTML page. It can be used to 
-# fine-tune the look of the HTML output. If the tag is left blank doxygen 
-# will generate a default style sheet. Note that doxygen will try to copy 
-# the style sheet file to the HTML output directory, so don't put your own 
+# The HTML_STYLESHEET tag can be used to specify a user-defined cascading
+# style sheet that is used by each HTML page. It can be used to
+# fine-tune the look of the HTML output. If the tag is left blank doxygen
+# will generate a default style sheet. Note that doxygen will try to copy
+# the style sheet file to the HTML output directory, so don't put your own

 # stylesheet in the HTML output directory as well, or it will be erased!
 
 # stylesheet in the HTML output directory as well, or it will be erased!
 

-HTML_STYLESHEET        = 
+HTML_STYLESHEET        =

 
 

-# If the HTML_ALIGN_MEMBERS tag is set to YES, the members of classes, 
-# files or namespaces will be aligned in HTML using tables. If set to 
+# If the HTML_ALIGN_MEMBERS tag is set to YES, the members of classes,
+# files or namespaces will be aligned in HTML using tables. If set to

 # NO a bullet list will be used.
 
 HTML_ALIGN_MEMBERS     = YES
 
 # NO a bullet list will be used.
 
 HTML_ALIGN_MEMBERS     = YES
 

-# If the GENERATE_HTMLHELP tag is set to YES, additional index files 
-# will be generated that can be used as input for tools like the 
-# Microsoft HTML help workshop to generate a compiled HTML help file (.chm) 
+# If the GENERATE_HTMLHELP tag is set to YES, additional index files
+# will be generated that can be used as input for tools like the
+# Microsoft HTML help workshop to generate a compiled HTML help file (.chm)

 # of the generated HTML documentation.
 
 GENERATE_HTMLHELP      = NO
 
 # of the generated HTML documentation.
 
 GENERATE_HTMLHELP      = NO
 

-# If the GENERATE_DOCSET tag is set to YES, additional index files 
-# will be generated that can be used as input for Apple's Xcode 3 
-# integrated development environment, introduced with OSX 10.5 (Leopard). 
-# To create a documentation set, doxygen will generate a Makefile in the 
-# HTML output directory. Running make will produce the docset in that 
-# directory and running "make install" will install the docset in 
-# ~/Library/Developer/Shared/Documentation/DocSets so that Xcode will find 
+# If the GENERATE_DOCSET tag is set to YES, additional index files
+# will be generated that can be used as input for Apple's Xcode 3
+# integrated development environment, introduced with OSX 10.5 (Leopard).
+# To create a documentation set, doxygen will generate a Makefile in the
+# HTML output directory. Running make will produce the docset in that
+# directory and running "make install" will install the docset in
+# ~/Library/Developer/Shared/Documentation/DocSets so that Xcode will find

 # it at startup.
 
 GENERATE_DOCSET        = NO
 
 # it at startup.
 
 GENERATE_DOCSET        = NO
 

-# When GENERATE_DOCSET tag is set to YES, this tag determines the name of the 
-# feed. A documentation feed provides an umbrella under which multiple 
-# documentation sets from a single provider (such as a company or product suite) 
+# When GENERATE_DOCSET tag is set to YES, this tag determines the name of the
+# feed. A documentation feed provides an umbrella under which multiple
+# documentation sets from a single provider (such as a company or product suite)

 # can be grouped.
 
 DOCSET_FEEDNAME        = "Doxygen generated docs"
 
 # can be grouped.
 
 DOCSET_FEEDNAME        = "Doxygen generated docs"
 

-# When GENERATE_DOCSET tag is set to YES, this tag specifies a string that 
-# should uniquely identify the documentation set bundle. This should be a 
-# reverse domain-name style string, e.g. com.mycompany.MyDocSet. Doxygen 
+# When GENERATE_DOCSET tag is set to YES, this tag specifies a string that
+# should uniquely identify the documentation set bundle. This should be a
+# reverse domain-name style string, e.g. com.mycompany.MyDocSet. Doxygen

 # will append .docset to the name.
 
 DOCSET_BUNDLE_ID       = org.doxygen.Project
 
 # will append .docset to the name.
 
 DOCSET_BUNDLE_ID       = org.doxygen.Project
 

-# If the HTML_DYNAMIC_SECTIONS tag is set to YES then the generated HTML 
-# documentation will contain sections that can be hidden and shown after the 
-# page has loaded. For this to work a browser that supports 
-# JavaScript and DHTML is required (for instance Mozilla 1.0+, Firefox 
+# If the HTML_DYNAMIC_SECTIONS tag is set to YES then the generated HTML
+# documentation will contain sections that can be hidden and shown after the
+# page has loaded. For this to work a browser that supports
+# JavaScript and DHTML is required (for instance Mozilla 1.0+, Firefox

 # Netscape 6.0+, Internet explorer 5.0+, Konqueror, or Safari).
 
 HTML_DYNAMIC_SECTIONS  = NO
 
 # Netscape 6.0+, Internet explorer 5.0+, Konqueror, or Safari).
 
 HTML_DYNAMIC_SECTIONS  = NO
 

-# If the GENERATE_HTMLHELP tag is set to YES, the CHM_FILE tag can 
-# be used to specify the file name of the resulting .chm file. You 
-# can add a path in front of the file if the result should not be 
+# If the GENERATE_HTMLHELP tag is set to YES, the CHM_FILE tag can
+# be used to specify the file name of the resulting .chm file. You
+# can add a path in front of the file if the result should not be

 # written to the html output directory.
 
 # written to the html output directory.
 

-CHM_FILE               = 
+CHM_FILE               =

 
 

-# If the GENERATE_HTMLHELP tag is set to YES, the HHC_LOCATION tag can 
-# be used to specify the location (absolute path including file name) of 
-# the HTML help compiler (hhc.exe). If non-empty doxygen will try to run 
+# If the GENERATE_HTMLHELP tag is set to YES, the HHC_LOCATION tag can
+# be used to specify the location (absolute path including file name) of
+# the HTML help compiler (hhc.exe). If non-empty doxygen will try to run

 # the HTML help compiler on the generated index.hhp.
 
 # the HTML help compiler on the generated index.hhp.
 

-HHC_LOCATION           = 
+HHC_LOCATION           =

 
 

-# If the GENERATE_HTMLHELP tag is set to YES, the GENERATE_CHI flag 
-# controls if a separate .chi index file is generated (YES) or that 
+# If the GENERATE_HTMLHELP tag is set to YES, the GENERATE_CHI flag
+# controls if a separate .chi index file is generated (YES) or that

 # it should be included in the master .chm file (NO).
 
 GENERATE_CHI           = NO
 # it should be included in the master .chm file (NO).
 
 GENERATE_CHI           = NO


@@ -828,26 +828,26 @@ GENERATE_CHI           = NO
 # is used to encode HtmlHelp index (hhk), content (hhc) and project file
 # content.
 
 # is used to encode HtmlHelp index (hhk), content (hhc) and project file
 # content.
 

-CHM_INDEX_ENCODING     = 
+CHM_INDEX_ENCODING     =

 
 

-# If the GENERATE_HTMLHELP tag is set to YES, the BINARY_TOC flag 
-# controls whether a binary table of contents is generated (YES) or a 
+# If the GENERATE_HTMLHELP tag is set to YES, the BINARY_TOC flag
+# controls whether a binary table of contents is generated (YES) or a

 # normal table of contents (NO) in the .chm file.
 
 BINARY_TOC             = NO
 
 # normal table of contents (NO) in the .chm file.
 
 BINARY_TOC             = NO
 

-# The TOC_EXPAND flag can be set to YES to add extra items for group members 
+# The TOC_EXPAND flag can be set to YES to add extra items for group members

 # to the contents of the HTML help documentation and to the tree view.
 
 TOC_EXPAND             = NO
 
 # to the contents of the HTML help documentation and to the tree view.
 
 TOC_EXPAND             = NO
 

-# The DISABLE_INDEX tag can be used to turn on/off the condensed index at 
-# top of each HTML page. The value NO (the default) enables the index and 
+# The DISABLE_INDEX tag can be used to turn on/off the condensed index at
+# top of each HTML page. The value NO (the default) enables the index and

 # the value YES disables it.
 
 DISABLE_INDEX          = NO
 
 # the value YES disables it.
 
 DISABLE_INDEX          = NO
 

-# This tag can be used to set the number of enum values (range [1..20]) 
+# This tag can be used to set the number of enum values (range [1..20])

 # that doxygen will group on one line in the generated HTML documentation.
 
 ENUM_VALUES_PER_LINE   = 4
 # that doxygen will group on one line in the generated HTML documentation.
 
 ENUM_VALUES_PER_LINE   = 4


@@ -855,11 +855,11 @@ ENUM_VALUES_PER_LINE   = 4
 # The GENERATE_TREEVIEW tag is used to specify whether a tree-like index
 # structure should be generated to display hierarchical information.
 # If the tag value is set to FRAME, a side panel will be generated
 # The GENERATE_TREEVIEW tag is used to specify whether a tree-like index
 # structure should be generated to display hierarchical information.
 # If the tag value is set to FRAME, a side panel will be generated

-# containing a tree-like index structure (just like the one that 
-# is generated for HTML Help). For this to work a browser that supports 
-# JavaScript, DHTML, CSS and frames is required (for instance Mozilla 1.0+, 
-# Netscape 6.0+, Internet explorer 5.0+, or Konqueror). Windows users are 
-# probably better off using the HTML help feature. Other possible values 
+# containing a tree-like index structure (just like the one that
+# is generated for HTML Help). For this to work a browser that supports
+# JavaScript, DHTML, CSS and frames is required (for instance Mozilla 1.0+,
+# Netscape 6.0+, Internet explorer 5.0+, or Konqueror). Windows users are
+# probably better off using the HTML help feature. Other possible values

 # for this tag are: HIERARCHIES, which will generate the Groups, Directories,
 # and Class Hiererachy pages using a tree view instead of an ordered list;
 # ALL, which combines the behavior of FRAME and HIERARCHIES; and NONE, which
 # for this tag are: HIERARCHIES, which will generate the Groups, Directories,
 # and Class Hiererachy pages using a tree view instead of an ordered list;
 # ALL, which combines the behavior of FRAME and HIERARCHIES; and NONE, which


@@ -869,16 +869,16 @@ ENUM_VALUES_PER_LINE   = 4
 
 GENERATE_TREEVIEW      = ALL
 
 
 GENERATE_TREEVIEW      = ALL
 

-# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be 
-# used to set the initial width (in pixels) of the frame in which the tree 
+# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be
+# used to set the initial width (in pixels) of the frame in which the tree

 # is shown.
 
 TREEVIEW_WIDTH         = 250
 
 # is shown.
 
 TREEVIEW_WIDTH         = 250
 

-# Use this tag to change the font size of Latex formulas included 
-# as images in the HTML documentation. The default is 10. Note that 
-# when you change the font size after a successful doxygen run you need 
-# to manually remove any form_*.png images from the HTML output directory 
+# Use this tag to change the font size of Latex formulas included
+# as images in the HTML documentation. The default is 10. Note that
+# when you change the font size after a successful doxygen run you need
+# to manually remove any form_*.png images from the HTML output directory

 # to force them to be regenerated.
 
 FORMULA_FONTSIZE       = 10
 # to force them to be regenerated.
 
 FORMULA_FONTSIZE       = 10


@@ -887,74 +887,74 @@ FORMULA_FONTSIZE       = 10
 # configuration options related to the LaTeX output
 #---------------------------------------------------------------------------
 
 # configuration options related to the LaTeX output
 #---------------------------------------------------------------------------
 

-# If the GENERATE_LATEX tag is set to YES (the default) Doxygen will 
+# If the GENERATE_LATEX tag is set to YES (the default) Doxygen will

 # generate Latex output.
 
 GENERATE_LATEX         = NO
 
 # generate Latex output.
 
 GENERATE_LATEX         = NO
 

-# The LATEX_OUTPUT tag is used to specify where the LaTeX docs will be put. 
-# If a relative path is entered the value of OUTPUT_DIRECTORY will be 
+# The LATEX_OUTPUT tag is used to specify where the LaTeX docs will be put.
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be

 # put in front of it. If left blank `latex' will be used as the default path.
 
 LATEX_OUTPUT           = latex
 
 # put in front of it. If left blank `latex' will be used as the default path.
 
 LATEX_OUTPUT           = latex
 

-# The LATEX_CMD_NAME tag can be used to specify the LaTeX command name to be 
+# The LATEX_CMD_NAME tag can be used to specify the LaTeX command name to be

 # invoked. If left blank `latex' will be used as the default command name.
 
 LATEX_CMD_NAME         = latex
 
 # invoked. If left blank `latex' will be used as the default command name.
 
 LATEX_CMD_NAME         = latex
 

-# The MAKEINDEX_CMD_NAME tag can be used to specify the command name to 
-# generate index for LaTeX. If left blank `makeindex' will be used as the 
+# The MAKEINDEX_CMD_NAME tag can be used to specify the command name to
+# generate index for LaTeX. If left blank `makeindex' will be used as the

 # default command name.
 
 MAKEINDEX_CMD_NAME     = makeindex
 
 # default command name.
 
 MAKEINDEX_CMD_NAME     = makeindex
 

-# If the COMPACT_LATEX tag is set to YES Doxygen generates more compact 
-# LaTeX documents. This may be useful for small projects and may help to 
+# If the COMPACT_LATEX tag is set to YES Doxygen generates more compact
+# LaTeX documents. This may be useful for small projects and may help to

 # save some trees in general.
 
 COMPACT_LATEX          = NO
 
 # save some trees in general.
 
 COMPACT_LATEX          = NO
 

-# The PAPER_TYPE tag can be used to set the paper type that is used 
-# by the printer. Possible values are: a4, a4wide, letter, legal and 
+# The PAPER_TYPE tag can be used to set the paper type that is used
+# by the printer. Possible values are: a4, a4wide, letter, legal and

 # executive. If left blank a4wide will be used.
 
 PAPER_TYPE             = a4wide
 
 # executive. If left blank a4wide will be used.
 
 PAPER_TYPE             = a4wide
 

-# The EXTRA_PACKAGES tag can be to specify one or more names of LaTeX 
+# The EXTRA_PACKAGES tag can be to specify one or more names of LaTeX

 # packages that should be included in the LaTeX output.
 
 # packages that should be included in the LaTeX output.
 

-EXTRA_PACKAGES         = 
+EXTRA_PACKAGES         =

 
 

-# The LATEX_HEADER tag can be used to specify a personal LaTeX header for 
-# the generated latex document. The header should contain everything until 
-# the first chapter. If it is left blank doxygen will generate a 
+# The LATEX_HEADER tag can be used to specify a personal LaTeX header for
+# the generated latex document. The header should contain everything until
+# the first chapter. If it is left blank doxygen will generate a

 # standard header. Notice: only use this tag if you know what you are doing!
 
 # standard header. Notice: only use this tag if you know what you are doing!
 

-LATEX_HEADER           = 
+LATEX_HEADER           =

 
 

-# If the PDF_HYPERLINKS tag is set to YES, the LaTeX that is generated 
-# is prepared for conversion to pdf (using ps2pdf). The pdf file will 
-# contain links (just like the HTML output) instead of page references 
+# If the PDF_HYPERLINKS tag is set to YES, the LaTeX that is generated
+# is prepared for conversion to pdf (using ps2pdf). The pdf file will
+# contain links (just like the HTML output) instead of page references

 # This makes the output suitable for online browsing using a pdf viewer.
 
 PDF_HYPERLINKS         = YES
 
 # This makes the output suitable for online browsing using a pdf viewer.
 
 PDF_HYPERLINKS         = YES
 

-# If the USE_PDFLATEX tag is set to YES, pdflatex will be used instead of 
-# plain latex in the generated Makefile. Set this option to YES to get a 
+# If the USE_PDFLATEX tag is set to YES, pdflatex will be used instead of
+# plain latex in the generated Makefile. Set this option to YES to get a

 # higher quality PDF documentation.
 
 USE_PDFLATEX           = YES
 
 # higher quality PDF documentation.
 
 USE_PDFLATEX           = YES
 

-# If the LATEX_BATCHMODE tag is set to YES, doxygen will add the \\batchmode. 
-# command to the generated LaTeX files. This will instruct LaTeX to keep 
-# running if errors occur, instead of asking the user for help. 
+# If the LATEX_BATCHMODE tag is set to YES, doxygen will add the \\batchmode.
+# command to the generated LaTeX files. This will instruct LaTeX to keep
+# running if errors occur, instead of asking the user for help.

 # This option is also used when generating formulas in HTML.
 
 LATEX_BATCHMODE        = NO
 
 # This option is also used when generating formulas in HTML.
 
 LATEX_BATCHMODE        = NO
 

-# If LATEX_HIDE_INDICES is set to YES then doxygen will not 
-# include the index chapters (such as File Index, Compound Index, etc.) 
+# If LATEX_HIDE_INDICES is set to YES then doxygen will not
+# include the index chapters (such as File Index, Compound Index, etc.)

 # in the output.
 
 LATEX_HIDE_INDICES     = NO
 # in the output.
 
 LATEX_HIDE_INDICES     = NO


@@ -963,68 +963,68 @@ LATEX_HIDE_INDICES     = NO
 # configuration options related to the RTF output
 #---------------------------------------------------------------------------
 
 # configuration options related to the RTF output
 #---------------------------------------------------------------------------
 

-# If the GENERATE_RTF tag is set to YES Doxygen will generate RTF output 
-# The RTF output is optimized for Word 97 and may not look very pretty with 
+# If the GENERATE_RTF tag is set to YES Doxygen will generate RTF output
+# The RTF output is optimized for Word 97 and may not look very pretty with

 # other RTF readers or editors.
 
 GENERATE_RTF           = NO
 
 # other RTF readers or editors.
 
 GENERATE_RTF           = NO
 

-# The RTF_OUTPUT tag is used to specify where the RTF docs will be put. 
-# If a relative path is entered the value of OUTPUT_DIRECTORY will be 
+# The RTF_OUTPUT tag is used to specify where the RTF docs will be put.
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be

 # put in front of it. If left blank `rtf' will be used as the default path.
 
 RTF_OUTPUT             = rtf
 
 # put in front of it. If left blank `rtf' will be used as the default path.
 
 RTF_OUTPUT             = rtf
 

-# If the COMPACT_RTF tag is set to YES Doxygen generates more compact 
-# RTF documents. This may be useful for small projects and may help to 
+# If the COMPACT_RTF tag is set to YES Doxygen generates more compact
+# RTF documents. This may be useful for small projects and may help to

 # save some trees in general.
 
 COMPACT_RTF            = NO
 
 # save some trees in general.
 
 COMPACT_RTF            = NO
 

-# If the RTF_HYPERLINKS tag is set to YES, the RTF that is generated 
-# will contain hyperlink fields. The RTF file will 
-# contain links (just like the HTML output) instead of page references. 
-# This makes the output suitable for online browsing using WORD or other 
-# programs which support those fields. 
+# If the RTF_HYPERLINKS tag is set to YES, the RTF that is generated
+# will contain hyperlink fields. The RTF file will
+# contain links (just like the HTML output) instead of page references.
+# This makes the output suitable for online browsing using WORD or other
+# programs which support those fields.

 # Note: wordpad (write) and others do not support links.
 
 RTF_HYPERLINKS         = NO
 
 # Note: wordpad (write) and others do not support links.
 
 RTF_HYPERLINKS         = NO
 

-# Load stylesheet definitions from file. Syntax is similar to doxygen's 
-# config file, i.e. a series of assignments. You only have to provide 
+# Load stylesheet definitions from file. Syntax is similar to doxygen's
+# config file, i.e. a series of assignments. You only have to provide

 # replacements, missing definitions are set to their default value.
 
 # replacements, missing definitions are set to their default value.
 

-RTF_STYLESHEET_FILE    = 
+RTF_STYLESHEET_FILE    =

 
 

-# Set optional variables used in the generation of an rtf document. 
+# Set optional variables used in the generation of an rtf document.

 # Syntax is similar to doxygen's config file.
 
 # Syntax is similar to doxygen's config file.
 

-RTF_EXTENSIONS_FILE    = 
+RTF_EXTENSIONS_FILE    =

 
 #---------------------------------------------------------------------------
 # configuration options related to the man page output
 #---------------------------------------------------------------------------
 
 
 #---------------------------------------------------------------------------
 # configuration options related to the man page output
 #---------------------------------------------------------------------------
 

-# If the GENERATE_MAN tag is set to YES (the default) Doxygen will 
+# If the GENERATE_MAN tag is set to YES (the default) Doxygen will

 # generate man pages
 
 GENERATE_MAN           = NO
 
 # generate man pages
 
 GENERATE_MAN           = NO
 

-# The MAN_OUTPUT tag is used to specify where the man pages will be put. 
-# If a relative path is entered the value of OUTPUT_DIRECTORY will be 
+# The MAN_OUTPUT tag is used to specify where the man pages will be put.
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be

 # put in front of it. If left blank `man' will be used as the default path.
 
 MAN_OUTPUT             = man
 
 # put in front of it. If left blank `man' will be used as the default path.
 
 MAN_OUTPUT             = man
 

-# The MAN_EXTENSION tag determines the extension that is added to 
+# The MAN_EXTENSION tag determines the extension that is added to

 # the generated man pages (default is the subroutine's section .3)
 
 MAN_EXTENSION          = .3
 
 # the generated man pages (default is the subroutine's section .3)
 
 MAN_EXTENSION          = .3
 

-# If the MAN_LINKS tag is set to YES and Doxygen generates man output, 
-# then it will generate one additional man file for each entity 
-# documented in the real man page(s). These additional files 
-# only source the real man page, but without them the man command 
+# If the MAN_LINKS tag is set to YES and Doxygen generates man output,
+# then it will generate one additional man file for each entity
+# documented in the real man page(s). These additional files
+# only source the real man page, but without them the man command

 # would be unable to find the correct page. The default is NO.
 
 MAN_LINKS              = NO
 # would be unable to find the correct page. The default is NO.
 
 MAN_LINKS              = NO


@@ -1033,33 +1033,33 @@ MAN_LINKS              = NO
 # configuration options related to the XML output
 #---------------------------------------------------------------------------
 
 # configuration options related to the XML output
 #---------------------------------------------------------------------------
 

-# If the GENERATE_XML tag is set to YES Doxygen will 
-# generate an XML file that captures the structure of 
+# If the GENERATE_XML tag is set to YES Doxygen will
+# generate an XML file that captures the structure of

 # the code including all documentation.
 
 GENERATE_XML           = NO
 
 # the code including all documentation.
 
 GENERATE_XML           = NO
 

-# The XML_OUTPUT tag is used to specify where the XML pages will be put. 
-# If a relative path is entered the value of OUTPUT_DIRECTORY will be 
+# The XML_OUTPUT tag is used to specify where the XML pages will be put.
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be

 # put in front of it. If left blank `xml' will be used as the default path.
 
 XML_OUTPUT             = xml
 
 # put in front of it. If left blank `xml' will be used as the default path.
 
 XML_OUTPUT             = xml
 

-# The XML_SCHEMA tag can be used to specify an XML schema, 
-# which can be used by a validating XML parser to check the 
+# The XML_SCHEMA tag can be used to specify an XML schema,
+# which can be used by a validating XML parser to check the

 # syntax of the XML files.
 
 # syntax of the XML files.
 

-XML_SCHEMA             = 
+XML_SCHEMA             =

 
 

-# The XML_DTD tag can be used to specify an XML DTD, 
-# which can be used by a validating XML parser to check the 
+# The XML_DTD tag can be used to specify an XML DTD,
+# which can be used by a validating XML parser to check the

 # syntax of the XML files.
 
 # syntax of the XML files.
 

-XML_DTD                = 
+XML_DTD                =

 
 

-# If the XML_PROGRAMLISTING tag is set to YES Doxygen will 
-# dump the program listings (including syntax highlighting 
-# and cross-referencing information) to the XML output. Note that 
+# If the XML_PROGRAMLISTING tag is set to YES Doxygen will
+# dump the program listings (including syntax highlighting
+# and cross-referencing information) to the XML output. Note that

 # enabling this will significantly increase the size of the XML output.
 
 XML_PROGRAMLISTING     = YES
 # enabling this will significantly increase the size of the XML output.
 
 XML_PROGRAMLISTING     = YES


@@ -1068,10 +1068,10 @@ XML_PROGRAMLISTING     = YES
 # configuration options for the AutoGen Definitions output
 #---------------------------------------------------------------------------
 
 # configuration options for the AutoGen Definitions output
 #---------------------------------------------------------------------------
 

-# If the GENERATE_AUTOGEN_DEF tag is set to YES Doxygen will 
-# generate an AutoGen Definitions (see autogen.sf.net) file 
-# that captures the structure of the code including all 
-# documentation. Note that this feature is still experimental 
+# If the GENERATE_AUTOGEN_DEF tag is set to YES Doxygen will
+# generate an AutoGen Definitions (see autogen.sf.net) file
+# that captures the structure of the code including all
+# documentation. Note that this feature is still experimental

 # and incomplete at the moment.
 
 GENERATE_AUTOGEN_DEF   = NO
 # and incomplete at the moment.
 
 GENERATE_AUTOGEN_DEF   = NO


@@ -1080,338 +1080,338 @@ GENERATE_AUTOGEN_DEF   = NO
 # configuration options related to the Perl module output
 #---------------------------------------------------------------------------
 
 # configuration options related to the Perl module output
 #---------------------------------------------------------------------------
 

-# If the GENERATE_PERLMOD tag is set to YES Doxygen will 
-# generate a Perl module file that captures the structure of 
-# the code including all documentation. Note that this 
-# feature is still experimental and incomplete at the 
+# If the GENERATE_PERLMOD tag is set to YES Doxygen will
+# generate a Perl module file that captures the structure of
+# the code including all documentation. Note that this
+# feature is still experimental and incomplete at the

 # moment.
 
 GENERATE_PERLMOD       = NO
 
 # moment.
 
 GENERATE_PERLMOD       = NO
 

-# If the PERLMOD_LATEX tag is set to YES Doxygen will generate 
-# the necessary Makefile rules, Perl scripts and LaTeX code to be able 
+# If the PERLMOD_LATEX tag is set to YES Doxygen will generate
+# the necessary Makefile rules, Perl scripts and LaTeX code to be able

 # to generate PDF and DVI output from the Perl module output.
 
 PERLMOD_LATEX          = NO
 
 # to generate PDF and DVI output from the Perl module output.
 
 PERLMOD_LATEX          = NO
 

-# If the PERLMOD_PRETTY tag is set to YES the Perl module output will be 
-# nicely formatted so it can be parsed by a human reader.  This is useful 
-# if you want to understand what is going on.  On the other hand, if this 
-# tag is set to NO the size of the Perl module output will be much smaller 
+# If the PERLMOD_PRETTY tag is set to YES the Perl module output will be
+# nicely formatted so it can be parsed by a human reader.  This is useful
+# if you want to understand what is going on.  On the other hand, if this
+# tag is set to NO the size of the Perl module output will be much smaller

 # and Perl will parse it just the same.
 
 PERLMOD_PRETTY         = YES
 
 # and Perl will parse it just the same.
 
 PERLMOD_PRETTY         = YES
 

-# The names of the make variables in the generated doxyrules.make file 
-# are prefixed with the string contained in PERLMOD_MAKEVAR_PREFIX. 
-# This is useful so different doxyrules.make files included by the same 
+# The names of the make variables in the generated doxyrules.make file
+# are prefixed with the string contained in PERLMOD_MAKEVAR_PREFIX.
+# This is useful so different doxyrules.make files included by the same

 # Makefile don't overwrite each other's variables.
 
 # Makefile don't overwrite each other's variables.
 

-PERLMOD_MAKEVAR_PREFIX = 
+PERLMOD_MAKEVAR_PREFIX =

 
 #---------------------------------------------------------------------------
 
 #---------------------------------------------------------------------------

-# Configuration options related to the preprocessor   
+# Configuration options related to the preprocessor

 #---------------------------------------------------------------------------
 
 #---------------------------------------------------------------------------
 

-# If the ENABLE_PREPROCESSING tag is set to YES (the default) Doxygen will 
-# evaluate all C-preprocessor directives found in the sources and include 
+# If the ENABLE_PREPROCESSING tag is set to YES (the default) Doxygen will
+# evaluate all C-preprocessor directives found in the sources and include

 # files.
 
 ENABLE_PREPROCESSING   = YES
 
 # files.
 
 ENABLE_PREPROCESSING   = YES
 

-# If the MACRO_EXPANSION tag is set to YES Doxygen will expand all macro 
-# names in the source code. If set to NO (the default) only conditional 
-# compilation will be performed. Macro expansion can be done in a controlled 
+# If the MACRO_EXPANSION tag is set to YES Doxygen will expand all macro
+# names in the source code. If set to NO (the default) only conditional
+# compilation will be performed. Macro expansion can be done in a controlled

 # way by setting EXPAND_ONLY_PREDEF to YES.
 
 MACRO_EXPANSION        = NO
 
 # way by setting EXPAND_ONLY_PREDEF to YES.
 
 MACRO_EXPANSION        = NO
 

-# If the EXPAND_ONLY_PREDEF and MACRO_EXPANSION tags are both set to YES 
-# then the macro expansion is limited to the macros specified with the 
+# If the EXPAND_ONLY_PREDEF and MACRO_EXPANSION tags are both set to YES
+# then the macro expansion is limited to the macros specified with the

 # PREDEFINED and EXPAND_AS_DEFINED tags.
 
 EXPAND_ONLY_PREDEF     = NO
 
 # PREDEFINED and EXPAND_AS_DEFINED tags.
 
 EXPAND_ONLY_PREDEF     = NO
 

-# If the SEARCH_INCLUDES tag is set to YES (the default) the includes files 
+# If the SEARCH_INCLUDES tag is set to YES (the default) the includes files

 # in the INCLUDE_PATH (see below) will be search if a #include is found.
 
 SEARCH_INCLUDES        = YES
 
 # in the INCLUDE_PATH (see below) will be search if a #include is found.
 
 SEARCH_INCLUDES        = YES
 

-# The INCLUDE_PATH tag can be used to specify one or more directories that 
-# contain include files that are not input files but should be processed by 
+# The INCLUDE_PATH tag can be used to specify one or more directories that
+# contain include files that are not input files but should be processed by

 # the preprocessor.
 
 # the preprocessor.
 

-INCLUDE_PATH           = 
+INCLUDE_PATH           =

 
 

-# You can use the INCLUDE_FILE_PATTERNS tag to specify one or more wildcard 
-# patterns (like *.h and *.hpp) to filter out the header-files in the 
-# directories. If left blank, the patterns specified with FILE_PATTERNS will 
+# You can use the INCLUDE_FILE_PATTERNS tag to specify one or more wildcard
+# patterns (like *.h and *.hpp) to filter out the header-files in the
+# directories. If left blank, the patterns specified with FILE_PATTERNS will

 # be used.
 
 # be used.
 

-INCLUDE_FILE_PATTERNS  = 
+INCLUDE_FILE_PATTERNS  =

 
 

-# The PREDEFINED tag can be used to specify one or more macro names that 
-# are defined before the preprocessor is started (similar to the -D option of 
-# gcc). The argument of the tag is a list of macros of the form: name 
-# or name=definition (no spaces). If the definition and the = are 
-# omitted =1 is assumed. To prevent a macro definition from being 
-# undefined via #undef or recursively expanded use the := operator 
+# The PREDEFINED tag can be used to specify one or more macro names that
+# are defined before the preprocessor is started (similar to the -D option of
+# gcc). The argument of the tag is a list of macros of the form: name
+# or name=definition (no spaces). If the definition and the = are
+# omitted =1 is assumed. To prevent a macro definition from being
+# undefined via #undef or recursively expanded use the := operator

 # instead of the = operator.
 
 # instead of the = operator.
 

-PREDEFINED             = 
+PREDEFINED             =

 
 

-# If the MACRO_EXPANSION and EXPAND_ONLY_PREDEF tags are set to YES then 
-# this tag can be used to specify a list of macro names that should be expanded. 
-# The macro definition that is found in the sources will be used. 
+# If the MACRO_EXPANSION and EXPAND_ONLY_PREDEF tags are set to YES then
+# this tag can be used to specify a list of macro names that should be expanded.
+# The macro definition that is found in the sources will be used.

 # Use the PREDEFINED tag if you want to use a different macro definition.
 
 # Use the PREDEFINED tag if you want to use a different macro definition.
 

-EXPAND_AS_DEFINED      = 
+EXPAND_AS_DEFINED      =

 
 

-# If the SKIP_FUNCTION_MACROS tag is set to YES (the default) then 
-# doxygen's preprocessor will remove all function-like macros that are alone 
-# on a line, have an all uppercase name, and do not end with a semicolon. Such 
-# function macros are typically used for boiler-plate code, and will confuse 
+# If the SKIP_FUNCTION_MACROS tag is set to YES (the default) then
+# doxygen's preprocessor will remove all function-like macros that are alone
+# on a line, have an all uppercase name, and do not end with a semicolon. Such
+# function macros are typically used for boiler-plate code, and will confuse

 # the parser if not removed.
 
 SKIP_FUNCTION_MACROS   = YES
 
 #---------------------------------------------------------------------------
 # the parser if not removed.
 
 SKIP_FUNCTION_MACROS   = YES
 
 #---------------------------------------------------------------------------

-# Configuration::additions related to external references   
+# Configuration::additions related to external references

 #---------------------------------------------------------------------------
 
 #---------------------------------------------------------------------------
 

-# The TAGFILES option can be used to specify one or more tagfiles. 
-# Optionally an initial location of the external documentation 
-# can be added for each tagfile. The format of a tag file without 
-# this location is as follows: 
-#   TAGFILES = file1 file2 ... 
-# Adding location for the tag files is done as follows: 
-#   TAGFILES = file1=loc1 "file2 = loc2" ... 
-# where "loc1" and "loc2" can be relative or absolute paths or 
-# URLs. If a location is present for each tag, the installdox tool 
+# The TAGFILES option can be used to specify one or more tagfiles.
+# Optionally an initial location of the external documentation
+# can be added for each tagfile. The format of a tag file without
+# this location is as follows:
+#   TAGFILES = file1 file2 ...
+# Adding location for the tag files is done as follows:
+#   TAGFILES = file1=loc1 "file2 = loc2" ...
+# where "loc1" and "loc2" can be relative or absolute paths or
+# URLs. If a location is present for each tag, the installdox tool

 # does not have to be run to correct the links.
 # Note that each tag file must have a unique name
 # (where the name does NOT include the path)
 # does not have to be run to correct the links.
 # Note that each tag file must have a unique name
 # (where the name does NOT include the path)

-# If a tag file is not located in the directory in which doxygen 
+# If a tag file is not located in the directory in which doxygen

 # is run, you must also specify the path to the tagfile here.
 
 # is run, you must also specify the path to the tagfile here.
 

-TAGFILES               = 
+TAGFILES               =

 
 

-# When a file name is specified after GENERATE_TAGFILE, doxygen will create 
+# When a file name is specified after GENERATE_TAGFILE, doxygen will create

 # a tag file that is based on the input files it reads.
 
 # a tag file that is based on the input files it reads.
 

-GENERATE_TAGFILE       = 
+GENERATE_TAGFILE       =

 
 

-# If the ALLEXTERNALS tag is set to YES all external classes will be listed 
-# in the class index. If set to NO only the inherited external classes 
+# If the ALLEXTERNALS tag is set to YES all external classes will be listed
+# in the class index. If set to NO only the inherited external classes

 # will be listed.
 
 ALLEXTERNALS           = NO
 
 # will be listed.
 
 ALLEXTERNALS           = NO
 

-# If the EXTERNAL_GROUPS tag is set to YES all external groups will be listed 
-# in the modules index. If set to NO, only the current project's groups will 
+# If the EXTERNAL_GROUPS tag is set to YES all external groups will be listed
+# in the modules index. If set to NO, only the current project's groups will

 # be listed.
 
 EXTERNAL_GROUPS        = YES
 
 # be listed.
 
 EXTERNAL_GROUPS        = YES
 

-# The PERL_PATH should be the absolute path and name of the perl script 
+# The PERL_PATH should be the absolute path and name of the perl script

 # interpreter (i.e. the result of `which perl').
 
 PERL_PATH              = /usr/bin/perl
 
 #---------------------------------------------------------------------------
 # interpreter (i.e. the result of `which perl').
 
 PERL_PATH              = /usr/bin/perl
 
 #---------------------------------------------------------------------------

-# Configuration options related to the dot tool   
+# Configuration options related to the dot tool

 #---------------------------------------------------------------------------
 
 #---------------------------------------------------------------------------
 

-# If the CLASS_DIAGRAMS tag is set to YES (the default) Doxygen will 
-# generate a inheritance diagram (in HTML, RTF and LaTeX) for classes with base 
-# or super classes. Setting the tag to NO turns the diagrams off. Note that 
-# this option is superseded by the HAVE_DOT option below. This is only a 
-# fallback. It is recommended to install and use dot, since it yields more 
+# If the CLASS_DIAGRAMS tag is set to YES (the default) Doxygen will
+# generate a inheritance diagram (in HTML, RTF and LaTeX) for classes with base
+# or super classes. Setting the tag to NO turns the diagrams off. Note that
+# this option is superseded by the HAVE_DOT option below. This is only a
+# fallback. It is recommended to install and use dot, since it yields more

 # powerful graphs.
 
 CLASS_DIAGRAMS         = YES
 
 # powerful graphs.
 
 CLASS_DIAGRAMS         = YES
 

-# You can define message sequence charts within doxygen comments using the \msc 
-# command. Doxygen will then run the mscgen tool (see 
-# http://www.mcternan.me.uk/mscgen/) to produce the chart and insert it in the 
-# documentation. The MSCGEN_PATH tag allows you to specify the directory where 
-# the mscgen tool resides. If left empty the tool is assumed to be found in the 
+# You can define message sequence charts within doxygen comments using the \msc
+# command. Doxygen will then run the mscgen tool (see
+# http://www.mcternan.me.uk/mscgen/) to produce the chart and insert it in the
+# documentation. The MSCGEN_PATH tag allows you to specify the directory where
+# the mscgen tool resides. If left empty the tool is assumed to be found in the

 # default search path.
 
 # default search path.
 

-MSCGEN_PATH            = 
+MSCGEN_PATH            =

 
 

-# If set to YES, the inheritance and collaboration graphs will hide 
-# inheritance and usage relations if the target is undocumented 
+# If set to YES, the inheritance and collaboration graphs will hide
+# inheritance and usage relations if the target is undocumented

 # or is not a class.
 
 HIDE_UNDOC_RELATIONS   = YES
 
 # or is not a class.
 
 HIDE_UNDOC_RELATIONS   = YES
 

-# If you set the HAVE_DOT tag to YES then doxygen will assume the dot tool is 
-# available from the path. This tool is part of Graphviz, a graph visualization 
-# toolkit from AT&T and Lucent Bell Labs. The other options in this section 
+# If you set the HAVE_DOT tag to YES then doxygen will assume the dot tool is
+# available from the path. This tool is part of Graphviz, a graph visualization
+# toolkit from AT&T and Lucent Bell Labs. The other options in this section

 # have no effect if this option is set to NO (the default)
 
 HAVE_DOT               = YES
 
 # have no effect if this option is set to NO (the default)
 
 HAVE_DOT               = YES
 

-# By default doxygen will write a font called FreeSans.ttf to the output 
-# directory and reference it in all dot files that doxygen generates. This 
-# font does not include all possible unicode characters however, so when you need 
-# these (or just want a differently looking font) you can specify the font name 
-# using DOT_FONTNAME. You need need to make sure dot is able to find the font, 
-# which can be done by putting it in a standard location or by setting the 
-# DOTFONTPATH environment variable or by setting DOT_FONTPATH to the directory 
+# By default doxygen will write a font called FreeSans.ttf to the output
+# directory and reference it in all dot files that doxygen generates. This
+# font does not include all possible unicode characters however, so when you need
+# these (or just want a differently looking font) you can specify the font name
+# using DOT_FONTNAME. You need need to make sure dot is able to find the font,
+# which can be done by putting it in a standard location or by setting the
+# DOTFONTPATH environment variable or by setting DOT_FONTPATH to the directory

 # containing the font.
 
 DOT_FONTNAME           = FreeSans
 
 # containing the font.
 
 DOT_FONTNAME           = FreeSans
 

-# By default doxygen will tell dot to use the output directory to look for the 
-# FreeSans.ttf font (which doxygen will put there itself). If you specify a 
-# different font using DOT_FONTNAME you can set the path where dot 
+# By default doxygen will tell dot to use the output directory to look for the
+# FreeSans.ttf font (which doxygen will put there itself). If you specify a
+# different font using DOT_FONTNAME you can set the path where dot

 # can find it using this tag.
 
 # can find it using this tag.
 

-DOT_FONTPATH           = 
+DOT_FONTPATH           =

 
 

-# If the CLASS_GRAPH and HAVE_DOT tags are set to YES then doxygen 
-# will generate a graph for each documented class showing the direct and 
-# indirect inheritance relations. Setting this tag to YES will force the 
+# If the CLASS_GRAPH and HAVE_DOT tags are set to YES then doxygen
+# will generate a graph for each documented class showing the direct and
+# indirect inheritance relations. Setting this tag to YES will force the

 # the CLASS_DIAGRAMS tag to NO.
 
 CLASS_GRAPH            = YES
 
 # the CLASS_DIAGRAMS tag to NO.
 
 CLASS_GRAPH            = YES
 

-# If the COLLABORATION_GRAPH and HAVE_DOT tags are set to YES then doxygen 
-# will generate a graph for each documented class showing the direct and 
-# indirect implementation dependencies (inheritance, containment, and 
+# If the COLLABORATION_GRAPH and HAVE_DOT tags are set to YES then doxygen
+# will generate a graph for each documented class showing the direct and
+# indirect implementation dependencies (inheritance, containment, and

 # class references variables) of the class with other documented classes.
 
 COLLABORATION_GRAPH    = YES
 
 # class references variables) of the class with other documented classes.
 
 COLLABORATION_GRAPH    = YES
 

-# If the GROUP_GRAPHS and HAVE_DOT tags are set to YES then doxygen 
+# If the GROUP_GRAPHS and HAVE_DOT tags are set to YES then doxygen

 # will generate a graph for groups, showing the direct groups dependencies
 
 GROUP_GRAPHS           = YES
 
 # will generate a graph for groups, showing the direct groups dependencies
 
 GROUP_GRAPHS           = YES
 

-# If the UML_LOOK tag is set to YES doxygen will generate inheritance and 
-# collaboration diagrams in a style similar to the OMG's Unified Modeling 
+# If the UML_LOOK tag is set to YES doxygen will generate inheritance and
+# collaboration diagrams in a style similar to the OMG's Unified Modeling

 # Language.
 
 UML_LOOK               = YES
 
 # Language.
 
 UML_LOOK               = YES
 

-# If set to YES, the inheritance and collaboration graphs will show the 
+# If set to YES, the inheritance and collaboration graphs will show the

 # relations between templates and their instances.
 
 TEMPLATE_RELATIONS     = NO
 
 # relations between templates and their instances.
 
 TEMPLATE_RELATIONS     = NO
 

-# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDE_GRAPH, and HAVE_DOT 
-# tags are set to YES then doxygen will generate a graph for each documented 
-# file showing the direct and indirect include dependencies of the file with 
+# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDE_GRAPH, and HAVE_DOT
+# tags are set to YES then doxygen will generate a graph for each documented
+# file showing the direct and indirect include dependencies of the file with

 # other documented files.
 
 INCLUDE_GRAPH          = YES
 
 # other documented files.
 
 INCLUDE_GRAPH          = YES
 

-# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDED_BY_GRAPH, and 
-# HAVE_DOT tags are set to YES then doxygen will generate a graph for each 
-# documented header file showing the documented files that directly or 
+# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDED_BY_GRAPH, and
+# HAVE_DOT tags are set to YES then doxygen will generate a graph for each
+# documented header file showing the documented files that directly or

 # indirectly include this file.
 
 INCLUDED_BY_GRAPH      = YES
 
 # indirectly include this file.
 
 INCLUDED_BY_GRAPH      = YES
 

-# If the CALL_GRAPH and HAVE_DOT options are set to YES then 
-# doxygen will generate a call dependency graph for every global function 
-# or class method. Note that enabling this option will significantly increase 
-# the time of a run. So in most cases it will be better to enable call graphs 
+# If the CALL_GRAPH and HAVE_DOT options are set to YES then
+# doxygen will generate a call dependency graph for every global function
+# or class method. Note that enabling this option will significantly increase
+# the time of a run. So in most cases it will be better to enable call graphs

 # for selected functions only using the \callgraph command.
 
 CALL_GRAPH             = YES
 
 # for selected functions only using the \callgraph command.
 
 CALL_GRAPH             = YES
 

-# If the CALLER_GRAPH and HAVE_DOT tags are set to YES then 
-# doxygen will generate a caller dependency graph for every global function 
-# or class method. Note that enabling this option will significantly increase 
-# the time of a run. So in most cases it will be better to enable caller 
+# If the CALLER_GRAPH and HAVE_DOT tags are set to YES then
+# doxygen will generate a caller dependency graph for every global function
+# or class method. Note that enabling this option will significantly increase
+# the time of a run. So in most cases it will be better to enable caller

 # graphs for selected functions only using the \callergraph command.
 
 CALLER_GRAPH           = YES
 
 # graphs for selected functions only using the \callergraph command.
 
 CALLER_GRAPH           = YES
 

-# If the GRAPHICAL_HIERARCHY and HAVE_DOT tags are set to YES then doxygen 
+# If the GRAPHICAL_HIERARCHY and HAVE_DOT tags are set to YES then doxygen

 # will graphical hierarchy of all classes instead of a textual one.
 
 GRAPHICAL_HIERARCHY    = YES
 
 # will graphical hierarchy of all classes instead of a textual one.
 
 GRAPHICAL_HIERARCHY    = YES
 

-# If the DIRECTORY_GRAPH, SHOW_DIRECTORIES and HAVE_DOT tags are set to YES 
-# then doxygen will show the dependencies a directory has on other directories 
+# If the DIRECTORY_GRAPH, SHOW_DIRECTORIES and HAVE_DOT tags are set to YES
+# then doxygen will show the dependencies a directory has on other directories

 # in a graphical way. The dependency relations are determined by the #include
 # relations between the files in the directories.
 
 DIRECTORY_GRAPH        = YES
 
 # in a graphical way. The dependency relations are determined by the #include
 # relations between the files in the directories.
 
 DIRECTORY_GRAPH        = YES
 

-# The DOT_IMAGE_FORMAT tag can be used to set the image format of the images 
+# The DOT_IMAGE_FORMAT tag can be used to set the image format of the images

 # generated by dot. Possible values are png, jpg, or gif
 # If left blank png will be used.
 
 DOT_IMAGE_FORMAT       = png
 
 # generated by dot. Possible values are png, jpg, or gif
 # If left blank png will be used.
 
 DOT_IMAGE_FORMAT       = png
 

-# The tag DOT_PATH can be used to specify the path where the dot tool can be 
+# The tag DOT_PATH can be used to specify the path where the dot tool can be

 # found. If left blank, it is assumed the dot tool can be found in the path.
 
 # found. If left blank, it is assumed the dot tool can be found in the path.
 

-DOT_PATH               = 
+DOT_PATH               =

 
 

-# The DOTFILE_DIRS tag can be used to specify one or more directories that 
-# contain dot files that are included in the documentation (see the 
+# The DOTFILE_DIRS tag can be used to specify one or more directories that
+# contain dot files that are included in the documentation (see the

 # \dotfile command).
 
 # \dotfile command).
 

-DOTFILE_DIRS           = 
+DOTFILE_DIRS           =

 
 

-# The DOT_GRAPH_MAX_NODES tag can be used to set the maximum number of 
-# nodes that will be shown in the graph. If the number of nodes in a graph 
-# becomes larger than this value, doxygen will truncate the graph, which is 
-# visualized by representing a node as a red box. Note that doxygen if the 
-# number of direct children of the root node in a graph is already larger than 
-# DOT_GRAPH_MAX_NODES then the graph will not be shown at all. Also note 
+# The DOT_GRAPH_MAX_NODES tag can be used to set the maximum number of
+# nodes that will be shown in the graph. If the number of nodes in a graph
+# becomes larger than this value, doxygen will truncate the graph, which is
+# visualized by representing a node as a red box. Note that doxygen if the
+# number of direct children of the root node in a graph is already larger than
+# DOT_GRAPH_MAX_NODES then the graph will not be shown at all. Also note

 # that the size of a graph can be further restricted by MAX_DOT_GRAPH_DEPTH.
 
 DOT_GRAPH_MAX_NODES    = 50
 
 # that the size of a graph can be further restricted by MAX_DOT_GRAPH_DEPTH.
 
 DOT_GRAPH_MAX_NODES    = 50
 

-# The MAX_DOT_GRAPH_DEPTH tag can be used to set the maximum depth of the 
-# graphs generated by dot. A depth value of 3 means that only nodes reachable 
-# from the root by following a path via at most 3 edges will be shown. Nodes 
-# that lay further from the root node will be omitted. Note that setting this 
-# option to 1 or 2 may greatly reduce the computation time needed for large 
-# code bases. Also note that the size of a graph can be further restricted by 
+# The MAX_DOT_GRAPH_DEPTH tag can be used to set the maximum depth of the
+# graphs generated by dot. A depth value of 3 means that only nodes reachable
+# from the root by following a path via at most 3 edges will be shown. Nodes
+# that lay further from the root node will be omitted. Note that setting this
+# option to 1 or 2 may greatly reduce the computation time needed for large
+# code bases. Also note that the size of a graph can be further restricted by

 # DOT_GRAPH_MAX_NODES. Using a depth of 0 means no depth restriction.
 
 MAX_DOT_GRAPH_DEPTH    = 0
 
 # DOT_GRAPH_MAX_NODES. Using a depth of 0 means no depth restriction.
 
 MAX_DOT_GRAPH_DEPTH    = 0
 

-# Set the DOT_TRANSPARENT tag to YES to generate images with a transparent 
-# background. This is enabled by default, which results in a transparent 
-# background. Warning: Depending on the platform used, enabling this option 
-# may lead to badly anti-aliased labels on the edges of a graph (i.e. they 
+# Set the DOT_TRANSPARENT tag to YES to generate images with a transparent
+# background. This is enabled by default, which results in a transparent
+# background. Warning: Depending on the platform used, enabling this option
+# may lead to badly anti-aliased labels on the edges of a graph (i.e. they

 # become hard to read).
 
 DOT_TRANSPARENT        = YES
 
 # become hard to read).
 
 DOT_TRANSPARENT        = YES
 

-# Set the DOT_MULTI_TARGETS tag to YES allow dot to generate multiple output 
-# files in one run (i.e. multiple -o and -T options on the command line). This 
-# makes dot run faster, but since only newer versions of dot (>1.8.10) 
+# Set the DOT_MULTI_TARGETS tag to YES allow dot to generate multiple output
+# files in one run (i.e. multiple -o and -T options on the command line). This
+# makes dot run faster, but since only newer versions of dot (>1.8.10)

 # support this, this feature is disabled by default.
 
 DOT_MULTI_TARGETS      = YES
 
 # support this, this feature is disabled by default.
 
 DOT_MULTI_TARGETS      = YES
 

-# If the GENERATE_LEGEND tag is set to YES (the default) Doxygen will 
-# generate a legend page explaining the meaning of the various boxes and 
+# If the GENERATE_LEGEND tag is set to YES (the default) Doxygen will
+# generate a legend page explaining the meaning of the various boxes and

 # arrows in the dot generated graphs.
 
 GENERATE_LEGEND        = YES
 
 # arrows in the dot generated graphs.
 
 GENERATE_LEGEND        = YES
 

-# If the DOT_CLEANUP tag is set to YES (the default) Doxygen will 
-# remove the intermediate dot files that are used to generate 
+# If the DOT_CLEANUP tag is set to YES (the default) Doxygen will
+# remove the intermediate dot files that are used to generate

 # the various graphs.
 
 DOT_CLEANUP            = YES
 
 #---------------------------------------------------------------------------
 # the various graphs.
 
 DOT_CLEANUP            = YES
 
 #---------------------------------------------------------------------------

-# Configuration::additions related to the search engine   
+# Configuration::additions related to the search engine

 #---------------------------------------------------------------------------
 
 #---------------------------------------------------------------------------
 

-# The SEARCHENGINE tag specifies whether or not a search engine should be 
+# The SEARCHENGINE tag specifies whether or not a search engine should be

 # used. If set to NO the values of all tags below this one will be ignored.
 
 SEARCHENGINE           = YES
 # used. If set to NO the values of all tags below this one will be ignored.
 
 SEARCHENGINE           = YES

diff --git a/payloads/libpayload/LICENSES b/payloads/libpayload/LICENSES
index 9e8276d62ef601843e4add281cd2cd7e9af95ec2..49388923b962a5aa4b8a4770ece0567cf3bd9ed2 100644 (file)
--- a/payloads/libpayload/LICENSES
+++ b/payloads/libpayload/LICENSES
@@ -109,4 +109,4 @@ holders, and the exact license terms that apply.
           http://www.openbsd.org/cgi-bin/cvsweb/src/lib/libc/hash/sha1.c
   Original files: src/lib/libc/hash/sha1.c
   Current version we use: CVS revision 1.20 2005/08/08
           http://www.openbsd.org/cgi-bin/cvsweb/src/lib/libc/hash/sha1.c
   Original files: src/lib/libc/hash/sha1.c
   Current version we use: CVS revision 1.20 2005/08/08

-  
+

diff --git a/payloads/libpayload/Makefile b/payloads/libpayload/Makefile
index 54b4a5f159c7c2cd99c1b766e19b8598b9d7a24f..5167b90a20b6831a5ba816441f03a1dcc1e38514 100644 (file)
--- a/payloads/libpayload/Makefile
+++ b/payloads/libpayload/Makefile
@@ -145,7 +145,7 @@ prepare:
        $(Q)mkdir -p $(obj)/util/kconfig/lxdialog
        $(Q)mkdir -p $(obj)/crypto $(obj)/curses $(obj)/drivers/video
        $(Q)mkdir -p $(obj)/drivers/usb
        $(Q)mkdir -p $(obj)/util/kconfig/lxdialog
        $(Q)mkdir -p $(obj)/crypto $(obj)/curses $(obj)/drivers/video
        $(Q)mkdir -p $(obj)/drivers/usb

-       $(Q)mkdir -p $(obj)/arch/$(ARCHDIR-y) $(obj)/lib/$(ARCHDIR-y) $(obj)/libc 
+       $(Q)mkdir -p $(obj)/arch/$(ARCHDIR-y) $(obj)/lib/$(ARCHDIR-y) $(obj)/libc

        $(Q)mkdir -p $(obj)/lib/$(ARCHDIR-y)
        $(Q)mkdir -p $(obj)/include
 
        $(Q)mkdir -p $(obj)/lib/$(ARCHDIR-y)
        $(Q)mkdir -p $(obj)/include
 


@@ -159,7 +159,7 @@ doxygen-clean:
 
 clean: doxygen-clean
        $(Q)rm -rf $(obj)/crypto $(obj)/curses $(obj)/drivers
 
 clean: doxygen-clean
        $(Q)rm -rf $(obj)/crypto $(obj)/curses $(obj)/drivers

-       $(Q)rm -rf $(obj)/i386 $(obj)/powerpc $(obj)/lib $(obj)/libc 
+       $(Q)rm -rf $(obj)/i386 $(obj)/powerpc $(obj)/lib $(obj)/libc

 
 distclean: clean
        $(Q)rm -rf build # should be $(obj) ?
 
 distclean: clean
        $(Q)rm -rf build # should be $(obj) ?

diff --git a/payloads/libpayload/bin/lpgcc b/payloads/libpayload/bin/lpgcc
index 9e4cafb3cbcab6268bbeb931feaa2aefa16fb774..448557c0b9e2a7ca480cee0fd1dadb306ec8f4c9 100755 (executable)
--- a/payloads/libpayload/bin/lpgcc
+++ b/payloads/libpayload/bin/lpgcc
@@ -27,9 +27,9 @@
 ## SUCH DAMAGE.
 
 # GCC wrapper for libpayload
 ## SUCH DAMAGE.
 
 # GCC wrapper for libpayload

-# let's not recurse. 
+# let's not recurse.

 # This is a hack, I know, but it makes sure that really simple user errors
 # This is a hack, I know, but it makes sure that really simple user errors

-# don't fork-bomb your machine. 
+# don't fork-bomb your machine.

 b=`basename $CC`
 if [ "$b" = "lpgcc" ]; then
 CC=""
 b=`basename $CC`
 if [ "$b" = "lpgcc" ]; then
 CC=""

diff --git a/payloads/libpayload/curses/keyboard.c b/payloads/libpayload/curses/keyboard.c
index 2bfddd5af76f97b54d115dc21bd3531fac9341ba..a7506759959ba2a929563fd65daa01036ecbaa18 100644 (file)
--- a/payloads/libpayload/curses/keyboard.c
+++ b/payloads/libpayload/curses/keyboard.c
@@ -197,7 +197,7 @@ int wgetch(WINDOW *win)
 
        if (_halfdelay)
                delay = _halfdelay;
 
        if (_halfdelay)
                delay = _halfdelay;

-       else 
+       else

                delay = win->_delay;
 
        return curses_getchar(delay);
                delay = win->_delay;
 
        return curses_getchar(delay);

diff --git a/payloads/libpayload/curses/tinycurses.c b/payloads/libpayload/curses/tinycurses.c
index b4c9213ece52c1f07196969d9f97282943f136c8..6e0ab3cfdd5af9c78f77d71808d11fe0159bc4d8 100644 (file)
--- a/payloads/libpayload/curses/tinycurses.c
+++ b/payloads/libpayload/curses/tinycurses.c
@@ -499,7 +499,7 @@ int waddch(WINDOW *win, const chtype ch)
        // NCURSES_CH_T wch;
        // SetChar2(wch, ch);
 
        // NCURSES_CH_T wch;
        // SetChar2(wch, ch);
 

-       if (win->_line[win->_cury].firstchar == _NOCHANGE || 
+       if (win->_line[win->_cury].firstchar == _NOCHANGE ||

                        win->_line[win->_cury].firstchar > win->_curx)
                win->_line[win->_cury].firstchar = win->_curx;
 
                        win->_line[win->_cury].firstchar > win->_curx)
                win->_line[win->_cury].firstchar = win->_curx;
 


@@ -510,7 +510,7 @@ int waddch(WINDOW *win, const chtype ch)
        win->_line[win->_cury].text[win->_curx].attr |=
                ((ch) & (chtype)A_ATTRIBUTES);
 
        win->_line[win->_cury].text[win->_curx].attr |=
                ((ch) & (chtype)A_ATTRIBUTES);
 

-       if (win->_line[win->_cury].lastchar == _NOCHANGE || 
+       if (win->_line[win->_cury].lastchar == _NOCHANGE ||

                        win->_line[win->_cury].lastchar < win->_curx)
                win->_line[win->_cury].lastchar = win->_curx;
 
                        win->_line[win->_cury].lastchar < win->_curx)
                win->_line[win->_cury].lastchar = win->_curx;
 


@@ -535,7 +535,7 @@ int waddnstr(WINDOW *win, const char *astr, int n)
        if (n < 0)
                n = strlen(astr);
 
        if (n < 0)
                n = strlen(astr);
 

-       if (win->_line[win->_cury].firstchar == _NOCHANGE || 
+       if (win->_line[win->_cury].firstchar == _NOCHANGE ||

                        win->_line[win->_cury].firstchar > win->_curx)
                win->_line[win->_cury].firstchar = win->_curx;
 
                        win->_line[win->_cury].firstchar > win->_curx)
                win->_line[win->_cury].firstchar = win->_curx;
 


@@ -554,7 +554,7 @@ int waddnstr(WINDOW *win, const char *astr, int n)
                // }
        }
 
                // }
        }
 

-       if (win->_line[win->_cury].lastchar == _NOCHANGE || 
+       if (win->_line[win->_cury].lastchar == _NOCHANGE ||

                        win->_line[win->_cury].lastchar < win->_curx)
                win->_line[win->_cury].lastchar = win->_curx;
 
                        win->_line[win->_cury].lastchar < win->_curx)
                win->_line[win->_cury].lastchar = win->_curx;
 


@@ -924,7 +924,7 @@ int wscrl(WINDOW *win, int n)
                win->_line[y].firstchar = win->_line[y + n].firstchar;
                win->_line[y].lastchar = win->_line[y + n].lastchar;
                for (x = 0; x <= win->_maxx; x++) {
                win->_line[y].firstchar = win->_line[y + n].firstchar;
                win->_line[y].lastchar = win->_line[y + n].lastchar;
                for (x = 0; x <= win->_maxx; x++) {

-                       if ((win->_line[y].text[x].chars[0] != win->_line[y + n].text[x].chars[0]) || 
+                       if ((win->_line[y].text[x].chars[0] != win->_line[y + n].text[x].chars[0]) ||

                                        (win->_line[y].text[x].attr != win->_line[y + n].text[x].attr)) {
                                if (win->_line[y].firstchar == _NOCHANGE)
                                        win->_line[y].firstchar = x;
                                        (win->_line[y].text[x].attr != win->_line[y + n].text[x].attr)) {
                                if (win->_line[y].firstchar == _NOCHANGE)
                                        win->_line[y].firstchar = x;


@@ -939,7 +939,7 @@ int wscrl(WINDOW *win, int n)
 
        for (y = (win->_maxy+1 - n); y <= win->_maxy; y++) {
                for (x = 0; x <= win->_maxx; x++) {
 
        for (y = (win->_maxy+1 - n); y <= win->_maxy; y++) {
                for (x = 0; x <= win->_maxx; x++) {

-                       if ((win->_line[y].text[x].chars[0] != ' ') || 
+                       if ((win->_line[y].text[x].chars[0] != ' ') ||

                                        (win->_line[y].text[x].attr != A_NORMAL)) {
                                if (win->_line[y].firstchar == _NOCHANGE)
                                        win->_line[y].firstchar = x;
                                        (win->_line[y].text[x].attr != A_NORMAL)) {
                                if (win->_line[y].firstchar == _NOCHANGE)
                                        win->_line[y].firstchar = x;

diff --git a/payloads/libpayload/drivers/keyboard.c b/payloads/libpayload/drivers/keyboard.c
index 7bdcb6013f1e2efac11578165730dbf13a0658c8..2b2ac2685db259bd735ac9a5a2d3c23d659e92cb 100644 (file)
--- a/payloads/libpayload/drivers/keyboard.c
+++ b/payloads/libpayload/drivers/keyboard.c
@@ -295,7 +295,7 @@ static void keyboard_set_mode(unsigned char mode)
 
 /**
  * Set keyboard layout
 
 /**
  * Set keyboard layout

- * @param country string describing the keyboard layout language. 
+ * @param country string describing the keyboard layout language.

  * Valid values are "us", "de".
  */
 
  * Valid values are "us", "de".
  */
 

diff --git a/payloads/libpayload/drivers/nvram.c b/payloads/libpayload/drivers/nvram.c
index 502cf6e5875fa426980647cb96e42f2ee3497244..86ff6704256bc00a0b46e66649d1f800c89031b2 100644 (file)
--- a/payloads/libpayload/drivers/nvram.c
+++ b/payloads/libpayload/drivers/nvram.c
@@ -68,7 +68,7 @@
 
 /**
  * Read a byte from the specified NVRAM address.
 
 /**
  * Read a byte from the specified NVRAM address.

- * 
+ *

  * @param addr The NVRAM address to read a byte from.
  * @return The byte at the given NVRAM address.
  */
  * @param addr The NVRAM address to read a byte from.
  * @return The byte at the given NVRAM address.
  */


@@ -82,7 +82,7 @@ u8 nvram_read(u8 addr)
 
 /**
  * Write a byte to the specified NVRAM address.
 
 /**
  * Write a byte to the specified NVRAM address.

- * 
+ *

  * @param val The byte to write to NVRAM.
  * @param addr The NVRAM address to write to.
  */
  * @param val The byte to write to NVRAM.
  * @param addr The NVRAM address to write to.
  */

diff --git a/payloads/libpayload/drivers/options.c b/payloads/libpayload/drivers/options.c
index a13b207a6d0521b834a38997719e64869fe1bbef..51173004271d078aa541868bea97c028082bf25c 100644 (file)
--- a/payloads/libpayload/drivers/options.c
+++ b/payloads/libpayload/drivers/options.c
@@ -81,7 +81,7 @@ int get_option(void *dest, char *name)
        struct cb_cmos_option_table *option_table = phys_to_virt(lib_sysinfo.option_table);
        struct cb_cmos_entries *cmos_entry;
        int len = strnlen(name, CMOS_MAX_NAME_LENGTH);
        struct cb_cmos_option_table *option_table = phys_to_virt(lib_sysinfo.option_table);
        struct cb_cmos_entries *cmos_entry;
        int len = strnlen(name, CMOS_MAX_NAME_LENGTH);

-       
+

        /* cmos entries are located right after the option table */
 
        for (   cmos_entry = (struct cb_cmos_entries*)((unsigned char *)option_table + option_table->header_length);
        /* cmos entries are located right after the option table */
 
        for (   cmos_entry = (struct cb_cmos_entries*)((unsigned char *)option_table + option_table->header_length);

diff --git a/payloads/libpayload/drivers/usb/TODO b/payloads/libpayload/drivers/usb/TODO
index 1dfc9d40abae6833b927494ff346d7e65fed0e35..f42ef78ac7eec913ebf3d81e79bb4d9e603c713e 100644 (file)
--- a/payloads/libpayload/drivers/usb/TODO
+++ b/payloads/libpayload/drivers/usb/TODO
@@ -14,7 +14,7 @@
   handled tds get reactivated as a ring structure
     - added as child of the oldest td
     - queue header already dropped the td, so no issue there
   handled tds get reactivated as a ring structure
     - added as child of the oldest td
     - queue header already dropped the td, so no issue there

-  
+

   this setup ensures that:
   - the max latency of the device is honored
   - the client knows the right order of the data
   this setup ensures that:
   - the max latency of the device is honored
   - the client knows the right order of the data

diff --git a/payloads/libpayload/drivers/usb/quirks.c b/payloads/libpayload/drivers/usb/quirks.c
index 87878b08ae39213aba06ed4e7ad8079e47e3d849..96acd082ea88f789a8091d757e0ba8246e89d710 100644 (file)
--- a/payloads/libpayload/drivers/usb/quirks.c
+++ b/payloads/libpayload/drivers/usb/quirks.c
@@ -43,14 +43,14 @@ typedef struct {
 
 usb_quirks_t usb_quirks[] = {
        /* Working chips,... remove before next release */
 
 usb_quirks_t usb_quirks[] = {
        /* Working chips,... remove before next release */

-       { 0x3538, 0x0054, USB_QUIRK_NONE, 0 },  // PQI 1GB 
+       { 0x3538, 0x0054, USB_QUIRK_NONE, 0 },  // PQI 1GB

        { 0x13fd, 0x0841, USB_QUIRK_NONE, 0 },  // Samsung SE-S084
 
        /* Silence the warning for known devices with more
         * than one interface
         */
        { 0x1267, 0x0103, USB_QUIRK_NONE, 1 },  // Keyboard Trust KB-1800S
        { 0x13fd, 0x0841, USB_QUIRK_NONE, 0 },  // Samsung SE-S084
 
        /* Silence the warning for known devices with more
         * than one interface
         */
        { 0x1267, 0x0103, USB_QUIRK_NONE, 1 },  // Keyboard Trust KB-1800S

-       { 0x0a12, 0x0001, USB_QUIRK_NONE, 1 },  // Bluetooth Allnet ALL1575 
+       { 0x0a12, 0x0001, USB_QUIRK_NONE, 1 },  // Bluetooth Allnet ALL1575

 
        /* Currently unsupported, possibly interesting devices:
         * FTDI serial: device 0x0403:0x6001 is USB 1.10 (class ff)
 
        /* Currently unsupported, possibly interesting devices:
         * FTDI serial: device 0x0403:0x6001 is USB 1.10 (class ff)

diff --git a/payloads/libpayload/drivers/usb/usb.c b/payloads/libpayload/drivers/usb/usb.c
index 421a80ec04906c7909aae02d65e913c0f8dcd495..d5f47e47b4698eff6705636da26829f9669f7fda 100644 (file)
--- a/payloads/libpayload/drivers/usb/usb.c
+++ b/payloads/libpayload/drivers/usb/usb.c
@@ -256,12 +256,12 @@ set_address (hci_t *controller, int speed)
        }
        mdelay (50);
        dev->address = adr;
        }
        mdelay (50);
        dev->address = adr;

-       dev->descriptor = get_descriptor (dev, gen_bmRequestType 
+       dev->descriptor = get_descriptor (dev, gen_bmRequestType

                (device_to_host, standard_type, dev_recp), 1, 0, 0);
        dd = (device_descriptor_t *) dev->descriptor;
 
        printf ("device 0x%04x:0x%04x is USB %x.%x ",
                (device_to_host, standard_type, dev_recp), 1, 0, 0);
        dd = (device_descriptor_t *) dev->descriptor;
 
        printf ("device 0x%04x:0x%04x is USB %x.%x ",

-                dd->idVendor, dd->idProduct,   
+                dd->idVendor, dd->idProduct,

                 dd->bcdUSB >> 8, dd->bcdUSB & 0xff);
        dev->quirks = usb_quirk_check(dd->idVendor, dd->idProduct);
 
                 dd->bcdUSB >> 8, dd->bcdUSB & 0xff);
        dev->quirks = usb_quirk_check(dd->idVendor, dd->idProduct);
 

diff --git a/payloads/libpayload/drivers/usb/usbhid.c b/payloads/libpayload/drivers/usb/usbhid.c
index 7c638298da8b0d94882e8ad956cbfbed134630bd..84de0c8afb7e84009a665cb3dbd5e188d9c1b47e 100644 (file)
--- a/payloads/libpayload/drivers/usb/usbhid.c
+++ b/payloads/libpayload/drivers/usb/usbhid.c
@@ -86,7 +86,7 @@ char *countries[36][2] = {
        { "Persian (Farsi)", "ir" },
        { "Poland", "pl" },
        { "Portuguese", "pt" },
        { "Persian (Farsi)", "ir" },
        { "Poland", "pl" },
        { "Portuguese", "pt" },

-       { "Russia", "ru" }, 
+       { "Russia", "ru" },

        { "Slovakia", "sl" },
        { "Spanish", "es" },
        { "Swedish", "se" },
        { "Slovakia", "sl" },
        { "Spanish", "es" },
        { "Swedish", "se" },


@@ -241,8 +241,8 @@ typedef union {
 #define INITIAL_REPEAT_DELAY   10
 #define REPEAT_DELAY            2
 
 #define INITIAL_REPEAT_DELAY   10
 #define REPEAT_DELAY            2
 

-static void 
-usb_hid_process_keyboard_event(usb_hid_keyboard_event_t *current, 
+static void
+usb_hid_process_keyboard_event(usb_hid_keyboard_event_t *current,

                usb_hid_keyboard_event_t *previous)
 {
        int i, keypress = 0, modifiers = 0;
                usb_hid_keyboard_event_t *previous)
 {
        int i, keypress = 0, modifiers = 0;


@@ -429,16 +429,16 @@ usb_hid_init (usbdev_t *dev)
                        usb_hid_set_idle(dev, interface, KEYBOARD_REPEAT_MS);
                        debug ("  activating...\n");
 
                        usb_hid_set_idle(dev, interface, KEYBOARD_REPEAT_MS);
                        debug ("  activating...\n");
 

-                       HID_INST (dev)->descriptor = 
+                       HID_INST (dev)->descriptor =

                                (hid_descriptor_t *)
                                        get_descriptor(dev, gen_bmRequestType
                                (hid_descriptor_t *)
                                        get_descriptor(dev, gen_bmRequestType

-                                       (device_to_host, standard_type, iface_recp), 
+                                       (device_to_host, standard_type, iface_recp),

                                        0x21, 0, 0);
                        countrycode = HID_INST(dev)->descriptor->bCountryCode;
                        /* 35 countries defined: */
                        if (countrycode > 35)
                                countrycode = 0;
                                        0x21, 0, 0);
                        countrycode = HID_INST(dev)->descriptor->bCountryCode;
                        /* 35 countries defined: */
                        if (countrycode > 35)
                                countrycode = 0;

-                       printf ("  Keyboard has %s layout (country code %02x)\n", 
+                       printf ("  Keyboard has %s layout (country code %02x)\n",

                                        countries[countrycode][0], countrycode);
 
                        /* Set keyboard layout accordingly */
                                        countries[countrycode][0], countrycode);
 
                        /* Set keyboard layout accordingly */

diff --git a/payloads/libpayload/drivers/usb/usbmsc.c b/payloads/libpayload/drivers/usb/usbmsc.c
index 5af3330b2f3f6c7087e1082a57c2e0691f6def43..6658f2ca5cebc90e70c84121e9f48846e9e8bc70 100644 (file)
--- a/payloads/libpayload/drivers/usb/usbmsc.c
+++ b/payloads/libpayload/drivers/usb/usbmsc.c
@@ -295,7 +295,7 @@ readwrite_blocks (usbdev_t *dev, int start, int n, cbw_direction dir, u8 *buf)
        }
        cb.block = htonl (start);
        cb.numblocks = htonw (n);
        }
        cb.block = htonl (start);
        cb.numblocks = htonw (n);

-               
+

        return execute_command (dev, dir, (u8 *) &cb, sizeof (cb), buf,
                                n * MSC_INST(dev)->blocksize);
 }
        return execute_command (dev, dir, (u8 *) &cb, sizeof (cb), buf,
                                n * MSC_INST(dev)->blocksize);
 }


@@ -310,7 +310,7 @@ request_sense (usbdev_t *dev)
        cmdblock6_t cb;
        memset (&cb, 0, sizeof (cb));
        cb.command = 0x3;
        cmdblock6_t cb;
        memset (&cb, 0, sizeof (cb));
        cb.command = 0x3;

-       
+

        return execute_command (dev, cbw_direction_data_in, (u8 *) &cb,
                                sizeof (cb), buf, 19);
 }
        return execute_command (dev, cbw_direction_data_in, (u8 *) &cb,
                                sizeof (cb), buf, 19);
 }


@@ -430,7 +430,7 @@ usb_msc_init (usbdev_t *dev)
        timeout = 30 * 10; /* SCSI/ATA specs say we have to wait up to 30s. Ugh */
        while (test_unit_ready (dev) && --timeout) {
                mdelay (100);
        timeout = 30 * 10; /* SCSI/ATA specs say we have to wait up to 30s. Ugh */
        while (test_unit_ready (dev) && --timeout) {
                mdelay (100);

-               if (!(timeout % 10)) 
+               if (!(timeout % 10))

                        printf (".");
        }
        if (test_unit_ready (dev)) {
                        printf (".");
        }
        if (test_unit_ready (dev)) {

diff --git a/payloads/libpayload/drivers/video/corebootfb.c b/payloads/libpayload/drivers/video/corebootfb.c
index 190d3f0d4b1ea87288ad6954a7b5c39e953ff81f..0fb1740785f5a4907fabb792a439ac559923f65b 100644 (file)
--- a/payloads/libpayload/drivers/video/corebootfb.c
+++ b/payloads/libpayload/drivers/video/corebootfb.c
@@ -150,7 +150,7 @@ static void corebootfb_putchar(u8 row, u8 col, unsigned int ch)
 
        for(y = 0; y < FONT_HEIGHT; y++) {
                for(x = FONT_WIDTH - 1; x >= 0; x--) {
 
        for(y = 0; y < FONT_HEIGHT; y++) {
                for(x = FONT_WIDTH - 1; x >= 0; x--) {

-       
+

                        switch (FI->bits_per_pixel) {
                        case 8: /* Indexed */
                                dst[(FONT_WIDTH - x) * (FI->bits_per_pixel >> 3)] = (*glyph & (1 << x)) ?  fg : bg;
                        switch (FI->bits_per_pixel) {
                        case 8: /* Indexed */
                                dst[(FONT_WIDTH - x) * (FI->bits_per_pixel >> 3)] = (*glyph & (1 << x)) ?  fg : bg;

diff --git a/payloads/libpayload/include/curses.priv.h b/payloads/libpayload/include/curses.priv.h
index 720e6789221d3852d32f8c43694f1100f3729289..1f51f2ed557af7d304f4b37e5624d4fbf5669ba5 100644 (file)
--- a/payloads/libpayload/include/curses.priv.h
+++ b/payloads/libpayload/include/curses.priv.h
@@ -66,24 +66,24 @@ extern "C" {
 //// #include <stdlib.h>
 //// #include <string.h>
 //// #include <sys/types.h>
 //// #include <stdlib.h>
 //// #include <string.h>
 //// #include <sys/types.h>

-//// 
+////

 //// #if HAVE_UNISTD_H
 //// #include <unistd.h>
 //// #endif
 //// #if HAVE_UNISTD_H
 //// #include <unistd.h>
 //// #endif

-//// 
+////

 //// #if HAVE_SYS_BSDTYPES_H
 //// #include <sys/bsdtypes.h> /* needed for ISC */
 //// #endif
 //// #if HAVE_SYS_BSDTYPES_H
 //// #include <sys/bsdtypes.h> /* needed for ISC */
 //// #endif

-//// 
+////

 //// #if HAVE_LIMITS_H
 //// # include <limits.h>
 //// #elif HAVE_SYS_PARAM_H
 //// # include <sys/param.h>
 //// #endif
 //// #if HAVE_LIMITS_H
 //// # include <limits.h>
 //// #elif HAVE_SYS_PARAM_H
 //// # include <sys/param.h>
 //// #endif

-//// 
+////

 //// #include <assert.h>
 //// #include <stdio.h>
 //// #include <assert.h>
 //// #include <stdio.h>

-//// 
+////

 //// #include <errno.h>
 
 #ifndef PATH_MAX
 //// #include <errno.h>
 
 #ifndef PATH_MAX


@@ -101,7 +101,7 @@ extern int errno;
 #endif
 
 //// #include <nc_panel.h>
 #endif
 
 //// #include <nc_panel.h>

-//// 
+////

 //// /* Some systems have a broken 'select()', but workable 'poll()'.  Use that */
 //// #if HAVE_WORKING_POLL
 //// #define USE_FUNC_POLL 1
 //// /* Some systems have a broken 'select()', but workable 'poll()'.  Use that */
 //// #if HAVE_WORKING_POLL
 //// #define USE_FUNC_POLL 1


@@ -113,10 +113,10 @@ extern int errno;
 //// #else
 //// #define USE_FUNC_POLL 0
 //// #endif
 //// #else
 //// #define USE_FUNC_POLL 0
 //// #endif

-//// 
+////

 //// /* include signal.h before curses.h to work-around defect in glibc 2.1.3 */
 //// #include <signal.h>
 //// /* include signal.h before curses.h to work-around defect in glibc 2.1.3 */
 //// #include <signal.h>

- 
+

 /* Alessandro Rubini's GPM (general-purpose mouse) */
 #if HAVE_LIBGPM && HAVE_GPM_H
 #define USE_GPM_SUPPORT 1
 /* Alessandro Rubini's GPM (general-purpose mouse) */
 #if HAVE_LIBGPM && HAVE_GPM_H
 #define USE_GPM_SUPPORT 1

diff --git a/payloads/libpayload/include/getopt.h b/payloads/libpayload/include/getopt.h
index d4d8135affa6f930ba607b8174aadd066a9bbf9d..25ee8731fe49cd6955054e95a90763e2c628bfbb 100644 (file)
--- a/payloads/libpayload/include/getopt.h
+++ b/payloads/libpayload/include/getopt.h
@@ -74,7 +74,7 @@ extern   int optreset;
 extern   char *suboptarg;               /* getsubopt(3) external variable */
 #endif
 //__END_DECLS
 extern   char *suboptarg;               /* getsubopt(3) external variable */
 #endif
 //__END_DECLS

- 
+

 #define MAX_ARGS        16
 extern char *string_argv[MAX_ARGS];
 extern int string_argc;
 #define MAX_ARGS        16
 extern char *string_argv[MAX_ARGS];
 extern int string_argc;

diff --git a/payloads/libpayload/include/i386/arch/endian.h b/payloads/libpayload/include/i386/arch/endian.h
index 3164376a1271c97fbf16359f8537527ba5ebecd9..e0114069fe17db5b74956c457f61a3be71cf48e4 100644 (file)
--- a/payloads/libpayload/include/i386/arch/endian.h
+++ b/payloads/libpayload/include/i386/arch/endian.h
@@ -37,7 +37,7 @@
 #define ntohl(in) ((( (in) & 0xFF) << 24) | (( (in) & 0xFF00) << 8) | \
                (( (in) & 0xFF0000) >> 8) | (( (in) & 0xFF000000) >> 24))
 
 #define ntohl(in) ((( (in) & 0xFF) << 24) | (( (in) & 0xFF00) << 8) | \
                (( (in) & 0xFF0000) >> 8) | (( (in) & 0xFF000000) >> 24))
 

-#define ntohll(in) (((u64) ntohl( (in) & 0xFFFFFFFF) << 32) | ((u64) ntohl( (in) >> 32))) 
+#define ntohll(in) (((u64) ntohl( (in) & 0xFFFFFFFF) << 32) | ((u64) ntohl( (in) >> 32)))

 
 #define htonw(in) ntohw(in)
 #define htonl(in) ntohl(in)
 
 #define htonw(in) ntohw(in)
 #define htonl(in) ntohl(in)

diff --git a/payloads/libpayload/include/libpayload.h b/payloads/libpayload/include/libpayload.h
index 12897872c92f5ca74e84caf7692c57a39f5a4ba4..51e42c7ea29689b2d1c7fdd3bbc6689e68c92d07 100644 (file)
--- a/payloads/libpayload/include/libpayload.h
+++ b/payloads/libpayload/include/libpayload.h
@@ -118,7 +118,7 @@ void rtc_read_clock(struct tm *tm);
  * @defgroup usb USB functions
  * @{
  */
  * @defgroup usb USB functions
  * @{
  */

-int usb_initialize(void);                                                      
+int usb_initialize(void);

 int usbhid_havechar(void);
 int usbhid_getchar(void);
 /** @} */
 int usbhid_havechar(void);
 int usbhid_getchar(void);
 /** @} */

diff --git a/payloads/libpayload/libc/args.c b/payloads/libpayload/libc/args.c
index 8242d60bba16d3e75f35a9ead5877f7b45f9b828..663d767dc56625e975f7e9aee4f39f9be3299270 100644 (file)
--- a/payloads/libpayload/libc/args.c
+++ b/payloads/libpayload/libc/args.c
@@ -35,8 +35,8 @@
 #include <libpayload.h>
 #include <getopt.h>
 
 #include <libpayload.h>
 #include <getopt.h>
 

-/* We don't want to waste malloc on this, so we live with a small 
- * fixed size array 
+/* We don't want to waste malloc on this, so we live with a small
+ * fixed size array

  */
 char *string_argv[MAX_ARGS];
 int string_argc;
  */
 char *string_argv[MAX_ARGS];
 int string_argc;

diff --git a/payloads/libpayload/libc/malloc.c b/payloads/libpayload/libc/malloc.c
index 9e1dd2e575ee470809fc61623d0779211f10bf3b..6389fc937936381aee709a337cdad63cad2eb698 100644 (file)
--- a/payloads/libpayload/libc/malloc.c
+++ b/payloads/libpayload/libc/malloc.c
@@ -286,10 +286,10 @@ static struct align_region_t *allocate_region(int alignment, int num_elements)
 {
        struct align_region_t *new_region;
 #ifdef CONFIG_DEBUG_MALLOC
 {
        struct align_region_t *new_region;
 #ifdef CONFIG_DEBUG_MALLOC

-       printf("%s(old align_regions=%p, alignment=%u, num_elements=%u)\n", 
+       printf("%s(old align_regions=%p, alignment=%u, num_elements=%u)\n",

                        __func__, align_regions, alignment, num_elements);
 #endif
                        __func__, align_regions, alignment, num_elements);
 #endif

-       
+

        new_region = malloc(sizeof(struct align_region_t));
 
        if (!new_region)
        new_region = malloc(sizeof(struct align_region_t));
 
        if (!new_region)


@@ -342,7 +342,7 @@ void *memalign(size_t align, size_t size)
                memset(align_regions, 0, sizeof(struct align_region_t));
        }
        struct align_region_t *reg = align_regions;
                memset(align_regions, 0, sizeof(struct align_region_t));
        }
        struct align_region_t *reg = align_regions;

-look_further:  
+look_further:

        while (reg != 0)
        {
                if ((reg->alignment == align) && (reg->free >= (size + align - 1)/align))
        while (reg != 0)
        {
                if ((reg->alignment == align) && (reg->free >= (size + align - 1)/align))

diff --git a/payloads/libpayload/libc/memory.c b/payloads/libpayload/libc/memory.c
index afc38cb26300df2a23a21b2df3a5234114d0c04e..4757b10596ed2f5c524d3c040401b604c934aded 100644 (file)
--- a/payloads/libpayload/libc/memory.c
+++ b/payloads/libpayload/libc/memory.c
@@ -72,7 +72,7 @@ void *memmove(void *dst, const void *src, size_t n)
        offs = n - (n % sizeof(unsigned long));
 
        for (i = (n % sizeof(unsigned long)) - 1; i >= 0; i--)
        offs = n - (n % sizeof(unsigned long));
 
        for (i = (n % sizeof(unsigned long)) - 1; i >= 0; i--)

-               ((unsigned char *)dst)[i + offs] = 
+               ((unsigned char *)dst)[i + offs] =

                        ((unsigned char *)src)[i + offs];
 
        for (i = n / sizeof(unsigned long) - 1; i >= 0; i--)
                        ((unsigned char *)src)[i + offs];
 
        for (i = n / sizeof(unsigned long) - 1; i >= 0; i--)

diff --git a/payloads/libpayload/libc/printf.c b/payloads/libpayload/libc/printf.c
index 3973e90f22b48ed7eedf2f9fac579c4d9b7cb90e..d53e99a8fe30dd52c48b884f5587ae4379f17f70 100644 (file)
--- a/payloads/libpayload/libc/printf.c
+++ b/payloads/libpayload/libc/printf.c
@@ -368,7 +368,7 @@ static int print_number(uint64_t num, int width, int precision, int base,
  *
  * Print string formatted according to the fmt parameter and variadic arguments.
  * Each formatting directive must have the following form:
  *
  * Print string formatted according to the fmt parameter and variadic arguments.
  * Each formatting directive must have the following form:

- * 
+ *

  *     \% [ FLAGS ] [ WIDTH ] [ .PRECISION ] [ TYPE ] CONVERSION
  *
  * FLAGS:@n
  *     \% [ FLAGS ] [ WIDTH ] [ .PRECISION ] [ TYPE ] CONVERSION
  *
  * FLAGS:@n


@@ -386,7 +386,7 @@ static int print_number(uint64_t num, int width, int precision, int base,
  *     - "0"   Print 0 as padding instead of spaces. Zeroes are placed between
  *             sign and the rest of the number. This flag is ignored if "-"
  *             flag is specified.
  *     - "0"   Print 0 as padding instead of spaces. Zeroes are placed between
  *             sign and the rest of the number. This flag is ignored if "-"
  *             flag is specified.

- * 
+ *

  * WIDTH:@n
  *     - Specify the minimal width of a printed argument. If it is bigger,
  *     width is ignored. If width is specified with a "*" character instead of
  * WIDTH:@n
  *     - Specify the minimal width of a printed argument. If it is bigger,
  *     width is ignored. If width is specified with a "*" character instead of


@@ -403,15 +403,15 @@ static int print_number(uint64_t num, int width, int precision, int base,
  *     value is then expected in parameters. When both width and precision are
  *     specified using "*", the first parameter is used for width and the
  *     second one for precision.
  *     value is then expected in parameters. When both width and precision are
  *     specified using "*", the first parameter is used for width and the
  *     second one for precision.

- * 
+ *

  * TYPE:@n
  *     - "hh"  Signed or unsigned char.@n
  *     - "h"   Signed or unsigned short.@n
  *     - ""    Signed or unsigned int (default value).@n
  *     - "l"   Signed or unsigned long int.@n
  *     - "ll"  Signed or unsigned long long int.@n
  * TYPE:@n
  *     - "hh"  Signed or unsigned char.@n
  *     - "h"   Signed or unsigned short.@n
  *     - ""    Signed or unsigned int (default value).@n
  *     - "l"   Signed or unsigned long int.@n
  *     - "ll"  Signed or unsigned long long int.@n

- * 
- * 
+ *
+ *

  * CONVERSION:@n
  *     - %     Print percentile character itself.
  *
  * CONVERSION:@n
  *     - %     Print percentile character itself.
  *


@@ -419,16 +419,16 @@ static int print_number(uint64_t num, int width, int precision, int base,
  *
  *     - s     Print zero terminated string. If a NULL value is passed as
  *             value, "(NULL)" is printed instead.
  *
  *     - s     Print zero terminated string. If a NULL value is passed as
  *             value, "(NULL)" is printed instead.

- * 
+ *

  *     - P, p  Print value of a pointer. Void * value is expected and it is
  *             printed in hexadecimal notation with prefix (as with \%#X / \%#x
  *             for 32-bit or \%#X / \%#x for 64-bit long pointers).
  *
  *     - b     Print value as unsigned binary number. Prefix is not printed by
  *             default. (Nonstandard extension.)
  *     - P, p  Print value of a pointer. Void * value is expected and it is
  *             printed in hexadecimal notation with prefix (as with \%#X / \%#x
  *             for 32-bit or \%#X / \%#x for 64-bit long pointers).
  *
  *     - b     Print value as unsigned binary number. Prefix is not printed by
  *             default. (Nonstandard extension.)

- * 
+ *

  *     - o     Print value as unsigned octal number. Prefix is not printed by
  *     - o     Print value as unsigned octal number. Prefix is not printed by

- *             default. 
+ *             default.

  *
  *     - d, i  Print signed decimal number. There is no difference between d
  *             and i conversion.
  *
  *     - d, i  Print signed decimal number. There is no difference between d
  *             and i conversion.


@@ -437,7 +437,7 @@ static int print_number(uint64_t num, int width, int precision, int base,
  *
  *     - X, x  Print hexadecimal number with upper- or lower-case. Prefix is
  *             not printed by default.
  *
  *     - X, x  Print hexadecimal number with upper- or lower-case. Prefix is
  *             not printed by default.

- * 
+ *

  * All other characters from fmt except the formatting directives are printed in
  * verbatim.
  *
  * All other characters from fmt except the formatting directives are printed in
  * verbatim.
  *

diff --git a/payloads/libpayload/util/kconfig/confdata.c b/payloads/libpayload/util/kconfig/confdata.c
index 81fa28bf97aea1c5e689e63a62a4c0674dd70a07..b1f31d8d5e8c6c98c3e0023deac705530a99fa28 100644 (file)
--- a/payloads/libpayload/util/kconfig/confdata.c
+++ b/payloads/libpayload/util/kconfig/confdata.c
@@ -19,7 +19,7 @@
 #define mkdir(x,y) mkdir(x)
 #define UNLINK_IF_NECESSARY(x) unlink(x)
 #else
 #define mkdir(x,y) mkdir(x)
 #define UNLINK_IF_NECESSARY(x) unlink(x)
 #else

-#define UNLINK_IF_NECESSARY(X) 
+#define UNLINK_IF_NECESSARY(X)

 #endif
 
 static void conf_warning(const char *fmt, ...)
 #endif
 
 static void conf_warning(const char *fmt, ...)

diff --git a/payloads/libpayload/util/kconfig/lex.zconf.c_shipped b/payloads/libpayload/util/kconfig/lex.zconf.c_shipped
index 1911092521bd4a8ff5bf55fca31c0d5854567632..6897092b94f745bca3fe86d62f1dcce809a079e6 100644 (file)
--- a/payloads/libpayload/util/kconfig/lex.zconf.c_shipped
+++ b/payloads/libpayload/util/kconfig/lex.zconf.c_shipped
@@ -52,7 +52,7 @@
 #if __STDC_VERSION__ >= 199901L
 
 /* C99 says to define __STDC_LIMIT_MACROS before including stdint.h,
 #if __STDC_VERSION__ >= 199901L
 
 /* C99 says to define __STDC_LIMIT_MACROS before including stdint.h,

- * if you want the limit (max/min) macros for int types. 
+ * if you want the limit (max/min) macros for int types.

  */
 #ifndef __STDC_LIMIT_MACROS
 #define __STDC_LIMIT_MACROS 1
  */
 #ifndef __STDC_LIMIT_MACROS
 #define __STDC_LIMIT_MACROS 1


@@ -69,7 +69,7 @@ typedef uint32_t flex_uint32_t;
 typedef signed char flex_int8_t;
 typedef short int flex_int16_t;
 typedef int flex_int32_t;
 typedef signed char flex_int8_t;
 typedef short int flex_int16_t;
 typedef int flex_int32_t;

-typedef unsigned char flex_uint8_t; 
+typedef unsigned char flex_uint8_t;

 typedef unsigned short int flex_uint16_t;
 typedef unsigned int flex_uint32_t;
 #endif /* ! C99 */
 typedef unsigned short int flex_uint16_t;
 typedef unsigned int flex_uint32_t;
 #endif /* ! C99 */


@@ -179,7 +179,7 @@ extern FILE *zconfin, *zconfout;
 #define EOB_ACT_LAST_MATCH 2
 
     #define YY_LESS_LINENO(n)
 #define EOB_ACT_LAST_MATCH 2
 
     #define YY_LESS_LINENO(n)

-    
+

 /* Return all but the first "n" matched characters back to the input stream. */
 #define yyless(n) \
        do \
 /* Return all but the first "n" matched characters back to the input stream. */
 #define yyless(n) \
        do \


@@ -246,7 +246,7 @@ struct yy_buffer_state
 
     int yy_bs_lineno; /**< The line count. */
     int yy_bs_column; /**< The column count. */
 
     int yy_bs_lineno; /**< The line count. */
     int yy_bs_column; /**< The column count. */

-    
+

        /* Whether to try to fill the input buffer when we reach the
         * end of it.
         */
        /* Whether to try to fill the input buffer when we reach the
         * end of it.
         */


@@ -866,7 +866,7 @@ extern int zconfwrap (void );
 #endif
 
     static void yyunput (int c,char *buf_ptr  );
 #endif
 
     static void yyunput (int c,char *buf_ptr  );

-    
+

 #ifndef yytext_ptr
 static void yy_flex_strncpy (char *,yyconst char *,int );
 #endif
 #ifndef yytext_ptr
 static void yy_flex_strncpy (char *,yyconst char *,int );
 #endif


@@ -971,7 +971,7 @@ YY_DECL
        register yy_state_type yy_current_state;
        register char *yy_cp, *yy_bp;
        register int yy_act;
        register yy_state_type yy_current_state;
        register char *yy_cp, *yy_bp;
        register int yy_act;

-    
+

        int str = 0;
        int ts, i;
 
        int str = 0;
        int ts, i;
 


@@ -1574,7 +1574,7 @@ static int yy_get_next_buffer (void)
 {
        register yy_state_type yy_current_state;
        register char *yy_cp;
 {
        register yy_state_type yy_current_state;
        register char *yy_cp;

-    
+

        yy_current_state = (yy_start);
 
        for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp )
        yy_current_state = (yy_start);
 
        for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp )


@@ -1593,7 +1593,7 @@ static int yy_get_next_buffer (void)
     static yy_state_type yy_try_NUL_trans  (yy_state_type yy_current_state )
 {
        register int yy_is_jam;
     static yy_state_type yy_try_NUL_trans  (yy_state_type yy_current_state )
 {
        register int yy_is_jam;

-    
+

        yy_current_state = yy_nxt[yy_current_state][1];
        yy_is_jam = (yy_current_state <= 0);
 
        yy_current_state = yy_nxt[yy_current_state][1];
        yy_is_jam = (yy_current_state <= 0);
 


@@ -1603,7 +1603,7 @@ static int yy_get_next_buffer (void)
     static void yyunput (int c, register char * yy_bp )
 {
        register char *yy_cp;
     static void yyunput (int c, register char * yy_bp )
 {
        register char *yy_cp;

-    
+

     yy_cp = (yy_c_buf_p);
 
        /* undo effects of setting up zconftext */
     yy_cp = (yy_c_buf_p);
 
        /* undo effects of setting up zconftext */


@@ -1646,7 +1646,7 @@ static int yy_get_next_buffer (void)
 
 {
        int c;
 
 {
        int c;

-    
+

        *(yy_c_buf_p) = (yy_hold_char);
 
        if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR )
        *(yy_c_buf_p) = (yy_hold_char);
 
        if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR )


@@ -1713,12 +1713,12 @@ static int yy_get_next_buffer (void)
 
 /** Immediately switch to a different input stream.
  * @param input_file A readable stream.
 
 /** Immediately switch to a different input stream.
  * @param input_file A readable stream.

- * 
+ *

  * @note This function does not reset the start condition to @c INITIAL .
  */
     void zconfrestart  (FILE * input_file )
 {
  * @note This function does not reset the start condition to @c INITIAL .
  */
     void zconfrestart  (FILE * input_file )
 {

-    
+

        if ( ! YY_CURRENT_BUFFER ){
         zconfensure_buffer_stack ();
                YY_CURRENT_BUFFER_LVALUE =
        if ( ! YY_CURRENT_BUFFER ){
         zconfensure_buffer_stack ();
                YY_CURRENT_BUFFER_LVALUE =


@@ -1731,11 +1731,11 @@ static int yy_get_next_buffer (void)
 
 /** Switch to a different input buffer.
  * @param new_buffer The new input buffer.
 
 /** Switch to a different input buffer.
  * @param new_buffer The new input buffer.

- * 
+ *

  */
     void zconf_switch_to_buffer  (YY_BUFFER_STATE  new_buffer )
 {
  */
     void zconf_switch_to_buffer  (YY_BUFFER_STATE  new_buffer )
 {

-    
+

        /* TODO. We should be able to replace this entire function body
         * with
         *              zconfpop_buffer_state();
        /* TODO. We should be able to replace this entire function body
         * with
         *              zconfpop_buffer_state();


@@ -1775,13 +1775,13 @@ static void zconf_load_buffer_state  (void)
 /** Allocate and initialize an input buffer state.
  * @param file A readable stream.
  * @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE.
 /** Allocate and initialize an input buffer state.
  * @param file A readable stream.
  * @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE.

- * 
+ *

  * @return the allocated buffer state.
  */
     YY_BUFFER_STATE zconf_create_buffer  (FILE * file, int  size )
 {
        YY_BUFFER_STATE b;
  * @return the allocated buffer state.
  */
     YY_BUFFER_STATE zconf_create_buffer  (FILE * file, int  size )
 {
        YY_BUFFER_STATE b;

-    
+

        b = (YY_BUFFER_STATE) zconfalloc(sizeof( struct yy_buffer_state )  );
        if ( ! b )
                YY_FATAL_ERROR( "out of dynamic memory in zconf_create_buffer()" );
        b = (YY_BUFFER_STATE) zconfalloc(sizeof( struct yy_buffer_state )  );
        if ( ! b )
                YY_FATAL_ERROR( "out of dynamic memory in zconf_create_buffer()" );


@@ -1804,11 +1804,11 @@ static void zconf_load_buffer_state  (void)
 
 /** Destroy the buffer.
  * @param b a buffer created with zconf_create_buffer()
 
 /** Destroy the buffer.
  * @param b a buffer created with zconf_create_buffer()

- * 
+ *

  */
     void zconf_delete_buffer (YY_BUFFER_STATE  b )
 {
  */
     void zconf_delete_buffer (YY_BUFFER_STATE  b )
 {

-    
+

        if ( ! b )
                return;
 
        if ( ! b )
                return;
 


@@ -1829,7 +1829,7 @@ static void zconf_load_buffer_state  (void)
 
 {
        int oerrno = errno;
 
 {
        int oerrno = errno;

-    
+

        zconf_flush_buffer(b );
 
        b->yy_input_file = file;
        zconf_flush_buffer(b );
 
        b->yy_input_file = file;


@@ -1845,13 +1845,13 @@ static void zconf_load_buffer_state  (void)
     }
 
         b->yy_is_interactive = 0;
     }
 
         b->yy_is_interactive = 0;

-    
+

        errno = oerrno;
 }
 
 /** Discard all buffered characters. On the next scan, YY_INPUT will be called.
  * @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER.
        errno = oerrno;
 }
 
 /** Discard all buffered characters. On the next scan, YY_INPUT will be called.
  * @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER.

- * 
+ *

  */
     void zconf_flush_buffer (YY_BUFFER_STATE  b )
 {
  */
     void zconf_flush_buffer (YY_BUFFER_STATE  b )
 {


@@ -1880,7 +1880,7 @@ static void zconf_load_buffer_state  (void)
  *  the current state. This function will allocate the stack
  *  if necessary.
  *  @param new_buffer The new state.
  *  the current state. This function will allocate the stack
  *  if necessary.
  *  @param new_buffer The new state.

- *  
+ *

  */
 void zconfpush_buffer_state (YY_BUFFER_STATE new_buffer )
 {
  */
 void zconfpush_buffer_state (YY_BUFFER_STATE new_buffer )
 {


@@ -1910,7 +1910,7 @@ void zconfpush_buffer_state (YY_BUFFER_STATE new_buffer )
 
 /** Removes and deletes the top of the stack, if present.
  *  The next element becomes the new top.
 
 /** Removes and deletes the top of the stack, if present.
  *  The next element becomes the new top.

- *  
+ *

  */
 void zconfpop_buffer_state (void)
 {
  */
 void zconfpop_buffer_state (void)
 {


@@ -1934,7 +1934,7 @@ void zconfpop_buffer_state (void)
 static void zconfensure_buffer_stack (void)
 {
        int num_to_alloc;
 static void zconfensure_buffer_stack (void)
 {
        int num_to_alloc;

-    
+

        if (!(yy_buffer_stack)) {
 
                /* First allocation is just for 2 elements, since we don't know if this
        if (!(yy_buffer_stack)) {
 
                /* First allocation is just for 2 elements, since we don't know if this


@@ -1945,9 +1945,9 @@ static void zconfensure_buffer_stack (void)
                (yy_buffer_stack) = (struct yy_buffer_state**)zconfalloc
                                                                (num_to_alloc * sizeof(struct yy_buffer_state*)
                                                                );
                (yy_buffer_stack) = (struct yy_buffer_state**)zconfalloc
                                                                (num_to_alloc * sizeof(struct yy_buffer_state*)
                                                                );

-               
+

                memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*));
                memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*));

-                               
+

                (yy_buffer_stack_max) = num_to_alloc;
                (yy_buffer_stack_top) = 0;
                return;
                (yy_buffer_stack_max) = num_to_alloc;
                (yy_buffer_stack_top) = 0;
                return;


@@ -1973,13 +1973,13 @@ static void zconfensure_buffer_stack (void)
 /** Setup the input buffer state to scan directly from a user-specified character buffer.
  * @param base the character buffer
  * @param size the size in bytes of the character buffer
 /** Setup the input buffer state to scan directly from a user-specified character buffer.
  * @param base the character buffer
  * @param size the size in bytes of the character buffer

- * 
- * @return the newly allocated buffer state object. 
+ *
+ * @return the newly allocated buffer state object.

  */
 YY_BUFFER_STATE zconf_scan_buffer  (char * base, yy_size_t  size )
 {
        YY_BUFFER_STATE b;
  */
 YY_BUFFER_STATE zconf_scan_buffer  (char * base, yy_size_t  size )
 {
        YY_BUFFER_STATE b;

-    
+

        if ( size < 2 ||
             base[size-2] != YY_END_OF_BUFFER_CHAR ||
             base[size-1] != YY_END_OF_BUFFER_CHAR )
        if ( size < 2 ||
             base[size-2] != YY_END_OF_BUFFER_CHAR ||
             base[size-1] != YY_END_OF_BUFFER_CHAR )


@@ -2008,14 +2008,14 @@ YY_BUFFER_STATE zconf_scan_buffer  (char * base, yy_size_t  size )
 /** Setup the input buffer state to scan a string. The next call to zconflex() will
  * scan from a @e copy of @a str.
  * @param str a NUL-terminated string to scan
 /** Setup the input buffer state to scan a string. The next call to zconflex() will
  * scan from a @e copy of @a str.
  * @param str a NUL-terminated string to scan

- * 
+ *

  * @return the newly allocated buffer state object.
  * @note If you want to scan bytes that may contain NUL values, then use
  *       zconf_scan_bytes() instead.
  */
 YY_BUFFER_STATE zconf_scan_string (yyconst char * yystr )
 {
  * @return the newly allocated buffer state object.
  * @note If you want to scan bytes that may contain NUL values, then use
  *       zconf_scan_bytes() instead.
  */
 YY_BUFFER_STATE zconf_scan_string (yyconst char * yystr )
 {

-    
+

        return zconf_scan_bytes(yystr,strlen(yystr) );
 }
 
        return zconf_scan_bytes(yystr,strlen(yystr) );
 }
 


@@ -2023,7 +2023,7 @@ YY_BUFFER_STATE zconf_scan_string (yyconst char * yystr )
  * scan from a @e copy of @a bytes.
  * @param bytes the byte buffer to scan
  * @param len the number of bytes in the buffer pointed to by @a bytes.
  * scan from a @e copy of @a bytes.
  * @param bytes the byte buffer to scan
  * @param len the number of bytes in the buffer pointed to by @a bytes.

- * 
+ *

  * @return the newly allocated buffer state object.
  */
 YY_BUFFER_STATE zconf_scan_bytes  (yyconst char * yybytes, int  _yybytes_len )
  * @return the newly allocated buffer state object.
  */
 YY_BUFFER_STATE zconf_scan_bytes  (yyconst char * yybytes, int  _yybytes_len )


@@ -2032,7 +2032,7 @@ YY_BUFFER_STATE zconf_scan_bytes  (yyconst char * yybytes, int  _yybytes_len )
        char *buf;
        yy_size_t n;
        int i;
        char *buf;
        yy_size_t n;
        int i;

-    
+

        /* Get memory for full buffer, including space for trailing EOB's. */
        n = _yybytes_len + 2;
        buf = (char *) zconfalloc(n  );
        /* Get memory for full buffer, including space for trailing EOB's. */
        n = _yybytes_len + 2;
        buf = (char *) zconfalloc(n  );


@@ -2086,16 +2086,16 @@ static void yy_fatal_error (yyconst char* msg )
 /* Accessor  methods (get/set functions) to struct members. */
 
 /** Get the current line number.
 /* Accessor  methods (get/set functions) to struct members. */
 
 /** Get the current line number.

- * 
+ *

  */
 int zconfget_lineno  (void)
 {
  */
 int zconfget_lineno  (void)
 {

-        
+

     return zconflineno;
 }
 
 /** Get the input stream.
     return zconflineno;
 }
 
 /** Get the input stream.

- * 
+ *

  */
 FILE *zconfget_in  (void)
 {
  */
 FILE *zconfget_in  (void)
 {


@@ -2103,7 +2103,7 @@ FILE *zconfget_in  (void)
 }
 
 /** Get the output stream.
 }
 
 /** Get the output stream.

- * 
+ *

  */
 FILE *zconfget_out  (void)
 {
  */
 FILE *zconfget_out  (void)
 {


@@ -2111,7 +2111,7 @@ FILE *zconfget_out  (void)
 }
 
 /** Get the length of the current token.
 }
 
 /** Get the length of the current token.

- * 
+ *

  */
 int zconfget_leng  (void)
 {
  */
 int zconfget_leng  (void)
 {


@@ -2119,7 +2119,7 @@ int zconfget_leng  (void)
 }
 
 /** Get the current token.
 }
 
 /** Get the current token.

- * 
+ *

  */
 
 char *zconfget_text  (void)
  */
 
 char *zconfget_text  (void)


@@ -2129,18 +2129,18 @@ char *zconfget_text  (void)
 
 /** Set the current line number.
  * @param line_number
 
 /** Set the current line number.
  * @param line_number

- * 
+ *

  */
 void zconfset_lineno (int  line_number )
 {
  */
 void zconfset_lineno (int  line_number )
 {

-    
+

     zconflineno = line_number;
 }
 
 /** Set the input stream. This does not discard the current
  * input buffer.
  * @param in_str A readable stream.
     zconflineno = line_number;
 }
 
 /** Set the input stream. This does not discard the current
  * input buffer.
  * @param in_str A readable stream.

- * 
+ *

  * @see zconf_switch_to_buffer
  */
 void zconfset_in (FILE *  in_str )
  * @see zconf_switch_to_buffer
  */
 void zconfset_in (FILE *  in_str )


@@ -2194,7 +2194,7 @@ static int yy_init_globals (void)
 /* zconflex_destroy is for both reentrant and non-reentrant scanners. */
 int zconflex_destroy  (void)
 {
 /* zconflex_destroy is for both reentrant and non-reentrant scanners. */
 int zconflex_destroy  (void)
 {

-    
+

     /* Pop the buffer stack, destroying each element. */
        while(YY_CURRENT_BUFFER){
                zconf_delete_buffer(YY_CURRENT_BUFFER  );
     /* Pop the buffer stack, destroying each element. */
        while(YY_CURRENT_BUFFER){
                zconf_delete_buffer(YY_CURRENT_BUFFER  );

diff --git a/payloads/libpayload/util/kconfig/lxdialog/BIG.FAT.WARNING b/payloads/libpayload/util/kconfig/lxdialog/BIG.FAT.WARNING
index a8999d82bdb3b5c00a9668de8f5da89b91c0cc08..7cb5a7ec93d27ec6c98b2565e6399d3f342a813a 100644 (file)
--- a/payloads/libpayload/util/kconfig/lxdialog/BIG.FAT.WARNING
+++ b/payloads/libpayload/util/kconfig/lxdialog/BIG.FAT.WARNING
@@ -1,4 +1,4 @@
 This is NOT the official version of dialog.  This version has been
 significantly modified from the original.  It is for use by the Linux
 This is NOT the official version of dialog.  This version has been
 significantly modified from the original.  It is for use by the Linux

-kernel configuration script.  Please do not bother Savio Lam with 
+kernel configuration script.  Please do not bother Savio Lam with

 questions about this program.
 questions about this program.

diff --git a/payloads/libpayload/util/kconfig/lxdialog/menubox.c b/payloads/libpayload/util/kconfig/lxdialog/menubox.c
index fa9d633f293c7c3a107b956e15774afd27560b12..c689fc03b56b01160779159696b45dae52ecf25c 100644 (file)
--- a/payloads/libpayload/util/kconfig/lxdialog/menubox.c
+++ b/payloads/libpayload/util/kconfig/lxdialog/menubox.c
@@ -26,7 +26,7 @@
  *
  *    *)  A bugfix for the Page-Down problem
  *
  *
  *    *)  A bugfix for the Page-Down problem
  *

- *    *)  Formerly when I used Page Down and Page Up, the cursor would be set 
+ *    *)  Formerly when I used Page Down and Page Up, the cursor would be set

  *        to the first position in the menu box.  Now lxdialog is a bit
  *        smarter and works more like other menu systems (just have a look at
  *        it).
  *        to the first position in the menu box.  Now lxdialog is a bit
  *        smarter and works more like other menu systems (just have a look at
  *        it).

diff --git a/payloads/libpayload/util/kconfig/regex.c b/payloads/libpayload/util/kconfig/regex.c
index 8169880d7e4f8cb201116d1a14d9d52f1a8427a5..e63c8148b34bf787b8985b82ef12d7cfaaf90d80 100644 (file)
--- a/payloads/libpayload/util/kconfig/regex.c
+++ b/payloads/libpayload/util/kconfig/regex.c
@@ -75,7 +75,7 @@ char *realloc ();
 
 /* This must be nonzero for the wordchar and notwordchar pattern
    commands in re_match_2.  */
 
 /* This must be nonzero for the wordchar and notwordchar pattern
    commands in re_match_2.  */

-#ifndef Sword 
+#ifndef Sword

 #define Sword 1
 #endif
 
 #define Sword 1
 #endif
 


@@ -173,8 +173,8 @@ init_syntax_once ()
    use `alloca' instead of `malloc'.  This is because using malloc in
    re_search* or re_match* could cause memory leaks when C-g is used in
    Emacs; also, malloc is slower and causes storage fragmentation.  On
    use `alloca' instead of `malloc'.  This is because using malloc in
    re_search* or re_match* could cause memory leaks when C-g is used in
    Emacs; also, malloc is slower and causes storage fragmentation.  On

-   the other hand, malloc is more portable, and easier to debug.  
-   
+   the other hand, malloc is more portable, and easier to debug.
+

    Because we sometimes use alloca, some routines have to be macros,
    not functions -- `alloca'-allocated space disappears at the end of the
    function it is called in.  */
    Because we sometimes use alloca, some routines have to be macros,
    not functions -- `alloca'-allocated space disappears at the end of the
    function it is called in.  */


@@ -199,7 +199,7 @@ init_syntax_once ()
 #ifndef _AIX /* Already did AIX, up at the top.  */
 char *alloca ();
 #endif /* not _AIX */
 #ifndef _AIX /* Already did AIX, up at the top.  */
 char *alloca ();
 #endif /* not _AIX */

-#endif /* not HAVE_ALLOCA_H */ 
+#endif /* not HAVE_ALLOCA_H */

 #endif /* not __GNUC__ */
 
 #endif /* not alloca */
 #endif /* not __GNUC__ */
 
 #endif /* not alloca */


@@ -302,9 +302,9 @@ typedef enum
 
         /* Analogously, for end of buffer/string.  */
   endbuf,
 
         /* Analogously, for end of buffer/string.  */
   endbuf,

- 
+

         /* Followed by two byte relative address to which to jump.  */
         /* Followed by two byte relative address to which to jump.  */

-  jump, 
+  jump,

 
        /* Same as jump, but marks the end of an alternative.  */
   jump_past_alt,
 
        /* Same as jump, but marks the end of an alternative.  */
   jump_past_alt,


@@ -312,11 +312,11 @@ typedef enum
         /* Followed by two-byte relative address of place to resume at
            in case of failure.  */
   on_failure_jump,
         /* Followed by two-byte relative address of place to resume at
            in case of failure.  */
   on_failure_jump,

-       
+

         /* Like on_failure_jump, but pushes a placeholder instead of the
            current string position when executed.  */
   on_failure_keep_string_jump,
         /* Like on_failure_jump, but pushes a placeholder instead of the
            current string position when executed.  */
   on_failure_keep_string_jump,

-  
+

         /* Throw away latest failure point and then jump to following
            two-byte relative address.  */
   pop_failure_jump,
         /* Throw away latest failure point and then jump to following
            two-byte relative address.  */
   pop_failure_jump,


@@ -412,7 +412,7 @@ extract_number (dest, source)
     int *dest;
     unsigned char *source;
 {
     int *dest;
     unsigned char *source;
 {

-  int temp = SIGN_EXTEND_CHAR (*(source + 1)); 
+  int temp = SIGN_EXTEND_CHAR (*(source + 1));

   *dest = *source & 0377;
   *dest += temp << 8;
 }
   *dest = *source & 0377;
   *dest += temp << 8;
 }


@@ -438,7 +438,7 @@ static void
 extract_number_and_incr (destination, source)
     int *destination;
     unsigned char **source;
 extract_number_and_incr (destination, source)
     int *destination;
     unsigned char **source;

-{ 
+{

   extract_number (destination, *source);
   *source += 2;
 }
   extract_number (destination, *source);
   *source += 2;
 }


@@ -487,8 +487,8 @@ print_fastmap (fastmap)
     char *fastmap;
 {
   unsigned was_a_range = 0;
     char *fastmap;
 {
   unsigned was_a_range = 0;

-  unsigned i = 0;  
-  
+  unsigned i = 0;
+

   while (i < (1 << BYTEWIDTH))
     {
       if (fastmap[i++])
   while (i < (1 << BYTEWIDTH))
     {
       if (fastmap[i++])


@@ -507,7 +507,7 @@ print_fastmap (fastmap)
             }
         }
     }
             }
         }
     }

-  putchar ('\n'); 
+  putchar ('\n');

 }
 
 
 }
 
 


@@ -528,7 +528,7 @@ print_partial_compiled_pattern (start, end)
       printf ("(null)\n");
       return;
     }
       printf ("(null)\n");
       return;
     }

-    
+

   /* Loop over pattern commands.  */
   while (p < pend)
     {
   /* Loop over pattern commands.  */
   while (p < pend)
     {


@@ -574,14 +574,14 @@ print_partial_compiled_pattern (start, end)
 
             printf ("/charset%s",
                    (re_opcode_t) *(p - 1) == charset_not ? "_not" : "");
 
             printf ("/charset%s",
                    (re_opcode_t) *(p - 1) == charset_not ? "_not" : "");

-            
+

             assert (p + *p < pend);
 
             for (c = 0; c < *p; c++)
               {
                 unsigned bit;
                 unsigned char map_byte = p[1 + c];
             assert (p + *p < pend);
 
             for (c = 0; c < *p; c++)
               {
                 unsigned bit;
                 unsigned char map_byte = p[1 + c];

-                
+

                 putchar ('/');
 
                for (bit = 0; bit < BYTEWIDTH; bit++)
                 putchar ('/');
 
                for (bit = 0; bit < BYTEWIDTH; bit++)


@@ -618,7 +618,7 @@ print_partial_compiled_pattern (start, end)
        case push_dummy_failure:
           printf ("/push_dummy_failure");
           break;
        case push_dummy_failure:
           printf ("/push_dummy_failure");
           break;

-          
+

         case maybe_pop_jump:
           extract_number_and_incr (&mcnt, &p);
          printf ("/maybe_pop_jump/0/%d", mcnt);
         case maybe_pop_jump:
           extract_number_and_incr (&mcnt, &p);
          printf ("/maybe_pop_jump/0/%d", mcnt);


@@ -627,36 +627,36 @@ print_partial_compiled_pattern (start, end)
         case pop_failure_jump:
          extract_number_and_incr (&mcnt, &p);
          printf ("/pop_failure_jump/0/%d", mcnt);
         case pop_failure_jump:
          extract_number_and_incr (&mcnt, &p);
          printf ("/pop_failure_jump/0/%d", mcnt);

-         break;          
-          
+         break;
+

         case jump_past_alt:
          extract_number_and_incr (&mcnt, &p);
          printf ("/jump_past_alt/0/%d", mcnt);
         case jump_past_alt:
          extract_number_and_incr (&mcnt, &p);
          printf ("/jump_past_alt/0/%d", mcnt);

-         break;          
-          
+         break;
+

         case jump:
          extract_number_and_incr (&mcnt, &p);
          printf ("/jump/0/%d", mcnt);
          break;
 
         case jump:
          extract_number_and_incr (&mcnt, &p);
          printf ("/jump/0/%d", mcnt);
          break;
 

-        case succeed_n: 
+        case succeed_n:

           extract_number_and_incr (&mcnt, &p);
           extract_number_and_incr (&mcnt2, &p);
          printf ("/succeed_n/0/%d/0/%d", mcnt, mcnt2);
           break;
           extract_number_and_incr (&mcnt, &p);
           extract_number_and_incr (&mcnt2, &p);
          printf ("/succeed_n/0/%d/0/%d", mcnt, mcnt2);
           break;

-        
-        case jump_n: 
+
+        case jump_n:

           extract_number_and_incr (&mcnt, &p);
           extract_number_and_incr (&mcnt2, &p);
          printf ("/jump_n/0/%d/0/%d", mcnt, mcnt2);
           break;
           extract_number_and_incr (&mcnt, &p);
           extract_number_and_incr (&mcnt2, &p);
          printf ("/jump_n/0/%d/0/%d", mcnt, mcnt2);
           break;

-        
-        case set_number_at: 
+
+        case set_number_at:

           extract_number_and_incr (&mcnt, &p);
           extract_number_and_incr (&mcnt2, &p);
          printf ("/set_number_at/0/%d/0/%d", mcnt, mcnt2);
           break;
           extract_number_and_incr (&mcnt, &p);
           extract_number_and_incr (&mcnt2, &p);
          printf ("/set_number_at/0/%d/0/%d", mcnt, mcnt2);
           break;

-        
+

         case wordbound:
          printf ("/wordbound");
          break;
         case wordbound:
          printf ("/wordbound");
          break;


@@ -668,10 +668,10 @@ print_partial_compiled_pattern (start, end)
        case wordbeg:
          printf ("/wordbeg");
          break;
        case wordbeg:
          printf ("/wordbeg");
          break;

-          
+

        case wordend:
          printf ("/wordend");
        case wordend:
          printf ("/wordend");

-          
+

 #ifdef emacs
        case before_dot:
          printf ("/before_dot");
 #ifdef emacs
        case before_dot:
          printf ("/before_dot");


@@ -690,7 +690,7 @@ print_partial_compiled_pattern (start, end)
          mcnt = *p++;
          printf ("/%d", mcnt);
           break;
          mcnt = *p++;
          printf ("/%d", mcnt);
           break;

-         
+

        case notsyntaxspec:
           printf ("/notsyntaxspec");
          mcnt = *p++;
        case notsyntaxspec:
           printf ("/notsyntaxspec");
          mcnt = *p++;


@@ -701,7 +701,7 @@ print_partial_compiled_pattern (start, end)
        case wordchar:
          printf ("/wordchar");
           break;
        case wordchar:
          printf ("/wordchar");
           break;

-         
+

        case notwordchar:
          printf ("/notwordchar");
           break;
        case notwordchar:
          printf ("/notwordchar");
           break;


@@ -758,7 +758,7 @@ print_double_string (where, string1, size1, string2, size2)
     int size2;
 {
   unsigned this_char;
     int size2;
 {
   unsigned this_char;

-  
+

   if (where == NULL)
     printf ("(null)");
   else
   if (where == NULL)
     printf ("(null)");
   else


@@ -768,7 +768,7 @@ print_double_string (where, string1, size1, string2, size2)
           for (this_char = where - string1; this_char < size1; this_char++)
             printchar (string1[this_char]);
 
           for (this_char = where - string1; this_char < size1; this_char++)
             printchar (string1[this_char]);
 

-          where = string2;    
+          where = string2;

         }
 
       for (this_char = where - string2; this_char < size2; this_char++)
         }
 
       for (this_char = where - string2; this_char < size2; this_char++)


@@ -809,7 +809,7 @@ re_set_syntax (syntax)
     reg_syntax_t syntax;
 {
   reg_syntax_t ret = re_syntax_options;
     reg_syntax_t syntax;
 {
   reg_syntax_t ret = re_syntax_options;

-  
+

   re_syntax_options = syntax;
   return ret;
 }
   re_syntax_options = syntax;
   return ret;
 }


@@ -845,7 +845,7 @@ static boolean at_begline_loc_p (), at_endline_loc_p ();
 static boolean group_in_compile_stack ();
 static reg_errcode_t compile_range ();
 
 static boolean group_in_compile_stack ();
 static reg_errcode_t compile_range ();
 

-/* Fetch the next character in the uncompiled pattern---translating it 
+/* Fetch the next character in the uncompiled pattern---translating it

    if necessary.  Also cast from a signed character in the constant
    string passed to us by the user to an unsigned char that we can use
    as an array index (in, e.g., `translate').  */
    if necessary.  Also cast from a signed character in the constant
    string passed to us by the user to an unsigned char that we can use
    as an array index (in, e.g., `translate').  */


@@ -985,7 +985,7 @@ typedef struct
   pattern_offset_t begalt_offset;
   pattern_offset_t fixup_alt_jump;
   pattern_offset_t inner_group_offset;
   pattern_offset_t begalt_offset;
   pattern_offset_t fixup_alt_jump;
   pattern_offset_t inner_group_offset;

-  pattern_offset_t laststart_offset;  
+  pattern_offset_t laststart_offset;

   regnum_t regnum;
 } compile_stack_elt_t;
 
   regnum_t regnum;
 } compile_stack_elt_t;
 


@@ -1028,7 +1028,7 @@ typedef struct
            PATFETCH (c);                                               \
          }                                                             \
        }                                                               \
            PATFETCH (c);                                               \
          }                                                             \
        }                                                               \

-    }          
+    }

 
 #define CHAR_CLASS_MAX_LENGTH  6 /* Namely, `xdigit'.  */
 
 
 #define CHAR_CLASS_MAX_LENGTH  6 /* Namely, `xdigit'.  */
 


@@ -1054,7 +1054,7 @@ typedef struct
      `fastmap_accurate' is zero;
      `re_nsub' is the number of subexpressions in PATTERN;
      `not_bol' and `not_eol' are zero;
      `fastmap_accurate' is zero;
      `re_nsub' is the number of subexpressions in PATTERN;
      `not_bol' and `not_eol' are zero;

-   
+

    The `fastmap' and `newline_anchor' fields are neither
    examined nor set.  */
 
    The `fastmap' and `newline_anchor' fields are neither
    examined nor set.  */
 


@@ -1069,20 +1069,20 @@ regex_compile (pattern, size, syntax, bufp)
      `char *' (i.e., signed), we declare these variables as unsigned, so
      they can be reliably used as array indices.  */
   register unsigned char c, c1;
      `char *' (i.e., signed), we declare these variables as unsigned, so
      they can be reliably used as array indices.  */
   register unsigned char c, c1;

-  
+

   /* A random tempory spot in PATTERN.  */
   const char *p1;
 
   /* Points to the end of the buffer, where we should append.  */
   register unsigned char *b;
   /* A random tempory spot in PATTERN.  */
   const char *p1;
 
   /* Points to the end of the buffer, where we should append.  */
   register unsigned char *b;

-  
+

   /* Keeps track of unclosed groups.  */
   compile_stack_type compile_stack;
 
   /* Points to the current (ending) position in the pattern.  */
   const char *p = pattern;
   const char *pend = pattern + size;
   /* Keeps track of unclosed groups.  */
   compile_stack_type compile_stack;
 
   /* Points to the current (ending) position in the pattern.  */
   const char *p = pattern;
   const char *pend = pattern + size;

-  
+

   /* How to translate the characters in the pattern.  */
   char *translate = bufp->translate;
 
   /* How to translate the characters in the pattern.  */
   char *translate = bufp->translate;
 


@@ -1103,7 +1103,7 @@ regex_compile (pattern, size, syntax, bufp)
   /* Place in the uncompiled pattern (i.e., the {) to
      which to go back if the interval is invalid.  */
   const char *beg_interval;
   /* Place in the uncompiled pattern (i.e., the {) to
      which to go back if the interval is invalid.  */
   const char *beg_interval;

-                
+

   /* Address of the place where a forward jump should go to the end of
      the containing expression.  Each alternative of an `or' -- except the
      last -- ends with a forward jump of this sort.  */
   /* Address of the place where a forward jump should go to the end of
      the containing expression.  Each alternative of an `or' -- except the
      last -- ends with a forward jump of this sort.  */


@@ -1119,7 +1119,7 @@ regex_compile (pattern, size, syntax, bufp)
   if (debug)
     {
       unsigned debug_count;
   if (debug)
     {
       unsigned debug_count;

-      
+

       for (debug_count = 0; debug_count < size; debug_count++)
         printchar (pattern[debug_count]);
       putchar ('\n');
       for (debug_count = 0; debug_count < size; debug_count++)
         printchar (pattern[debug_count]);
       putchar ('\n');


@@ -1143,9 +1143,9 @@ regex_compile (pattern, size, syntax, bufp)
      printer (for debugging) will think there's no pattern.  We reset it
      at the end.  */
   bufp->used = 0;
      printer (for debugging) will think there's no pattern.  We reset it
      at the end.  */
   bufp->used = 0;

-  
+

   /* Always count groups, whether or not bufp->no_sub is set.  */
   /* Always count groups, whether or not bufp->no_sub is set.  */

-  bufp->re_nsub = 0;                           
+  bufp->re_nsub = 0;

 
 #if !defined (emacs) && !defined (SYNTAX_TABLE)
   /* Initialize the syntax table.  */
 
 #if !defined (emacs) && !defined (SYNTAX_TABLE)
   /* Initialize the syntax table.  */


@@ -1196,7 +1196,7 @@ regex_compile (pattern, size, syntax, bufp)
         case '$':
           {
             if (   /* If at end of pattern, it's an operator.  */
         case '$':
           {
             if (   /* If at end of pattern, it's an operator.  */

-                   p == pend 
+                   p == pend

                    /* If context independent, it's an operator.  */
                 || syntax & RE_CONTEXT_INDEP_ANCHORS
                    /* Otherwise, depends on what's next.  */
                    /* If context independent, it's an operator.  */
                 || syntax & RE_CONTEXT_INDEP_ANCHORS
                    /* Otherwise, depends on what's next.  */


@@ -1227,7 +1227,7 @@ regex_compile (pattern, size, syntax, bufp)
           {
             /* Are we optimizing this jump?  */
             boolean keep_string_p = false;
           {
             /* Are we optimizing this jump?  */
             boolean keep_string_p = false;

-            
+

             /* 1 means zero (many) matches is allowed.  */
             char zero_times_ok = 0, many_times_ok = 0;
 
             /* 1 means zero (many) matches is allowed.  */
             char zero_times_ok = 0, many_times_ok = 0;
 


@@ -1275,7 +1275,7 @@ regex_compile (pattern, size, syntax, bufp)
 
             /* Star, etc. applied to an empty pattern is equivalent
                to an empty pattern.  */
 
             /* Star, etc. applied to an empty pattern is equivalent
                to an empty pattern.  */

-            if (!laststart)  
+            if (!laststart)

               break;
 
             /* Now we know whether or not zero matches is allowed
               break;
 
             /* Now we know whether or not zero matches is allowed


@@ -1284,7 +1284,7 @@ regex_compile (pattern, size, syntax, bufp)
               { /* More than one repetition is allowed, so put in at the
                    end a backward relative jump from `b' to before the next
                    jump we're going to put in below (which jumps from
               { /* More than one repetition is allowed, so put in at the
                    end a backward relative jump from `b' to before the next
                    jump we're going to put in below (which jumps from

-                   laststart to after this jump).  
+                   laststart to after this jump).

 
                    But if we are at the `*' in the exact sequence `.*\n',
                    insert an unconditional jump backwards to the .,
 
                    But if we are at the `*' in the exact sequence `.*\n',
                    insert an unconditional jump backwards to the .,


@@ -1361,7 +1361,7 @@ regex_compile (pattern, size, syntax, bufp)
 
             /* We test `*p == '^' twice, instead of using an if
                statement, so we only need one BUF_PUSH.  */
 
             /* We test `*p == '^' twice, instead of using an if
                statement, so we only need one BUF_PUSH.  */

-            BUF_PUSH (*p == '^' ? charset_not : charset); 
+            BUF_PUSH (*p == '^' ? charset_not : charset);

             if (*p == '^')
               p++;
 
             if (*p == '^')
               p++;
 


@@ -1411,8 +1411,8 @@ regex_compile (pattern, size, syntax, bufp)
                    was a character: if this is a hyphen not at the
                    beginning or the end of a list, then it's the range
                    operator.  */
                    was a character: if this is a hyphen not at the
                    beginning or the end of a list, then it's the range
                    operator.  */

-                if (c == '-' 
-                    && !(p - 2 >= pattern && p[-2] == '[') 
+                if (c == '-'
+                    && !(p - 2 >= pattern && p[-2] == '[')

                     && !(p - 3 >= pattern && p[-3] == '[' && p[-2] == '^')
                     && *p != ']')
                   {
                     && !(p - 3 >= pattern && p[-3] == '[' && p[-2] == '^')
                     && *p != ']')
                   {


@@ -1427,7 +1427,7 @@ regex_compile (pattern, size, syntax, bufp)
 
                    /* Move past the `-'.  */
                     PATFETCH (c1);
 
                    /* Move past the `-'.  */
                     PATFETCH (c1);

-                    
+

                     ret = compile_range (&p, pend, translate, syntax, b);
                     if (ret != REG_NOERROR) return ret;
                   }
                     ret = compile_range (&p, pend, translate, syntax, b);
                     if (ret != REG_NOERROR) return ret;
                   }


@@ -1456,7 +1456,7 @@ regex_compile (pattern, size, syntax, bufp)
                     str[c1] = '\0';
 
                     /* If isn't a word bracketed by `[:' and:`]':
                     str[c1] = '\0';
 
                     /* If isn't a word bracketed by `[:' and:`]':

-                       undo the ending character, the letters, and leave 
+                       undo the ending character, the letters, and leave

                        the leading `:' and `[' (but set bits for them).  */
                     if (c == ':' && *p == ']')
                       {
                        the leading `:' and `[' (but set bits for them).  */
                     if (c == ':' && *p == ']')
                       {


@@ -1473,12 +1473,12 @@ regex_compile (pattern, size, syntax, bufp)
                         boolean is_space = STREQ (str, "space");
                         boolean is_upper = STREQ (str, "upper");
                         boolean is_xdigit = STREQ (str, "xdigit");
                         boolean is_space = STREQ (str, "space");
                         boolean is_upper = STREQ (str, "upper");
                         boolean is_xdigit = STREQ (str, "xdigit");

-                        
+

                         if (!IS_CHAR_CLASS (str)) return REG_ECTYPE;
 
                         /* Throw away the ] at the end of the character
                            class.  */
                         if (!IS_CHAR_CLASS (str)) return REG_ECTYPE;
 
                         /* Throw away the ] at the end of the character
                            class.  */

-                        PATFETCH (c);                                  
+                        PATFETCH (c);

 
                         if (p == pend) return REG_EBRACK;
 
 
                         if (p == pend) return REG_EBRACK;
 


@@ -1503,7 +1503,7 @@ regex_compile (pattern, size, syntax, bufp)
                     else
                       {
                         c1++;
                     else
                       {
                         c1++;

-                        while (c1--)    
+                        while (c1--)

                           PATUNFETCH;
                         SET_LIST_BIT ('[');
                         SET_LIST_BIT (':');
                           PATUNFETCH;
                         SET_LIST_BIT ('[');
                         SET_LIST_BIT (':');


@@ -1519,8 +1519,8 @@ regex_compile (pattern, size, syntax, bufp)
 
             /* Discard any (non)matching list bytes that are all 0 at the
                end of the map.  Decrease the map-length byte too.  */
 
             /* Discard any (non)matching list bytes that are all 0 at the
                end of the map.  Decrease the map-length byte too.  */

-            while ((int) b[-1] > 0 && b[b[-1] - 1] == 0) 
-              b[-1]--; 
+            while ((int) b[-1] > 0 && b[b[-1] - 1] == 0)
+              b[-1]--;

             b += b[-1];
           }
           break;
             b += b[-1];
           }
           break;


@@ -1580,7 +1580,7 @@ regex_compile (pattern, size, syntax, bufp)
               regnum++;
 
               if (COMPILE_STACK_FULL)
               regnum++;
 
               if (COMPILE_STACK_FULL)

-                { 
+                {

                   RETALLOC (compile_stack.stack, compile_stack.size << 1,
                             compile_stack_elt_t);
                   if (compile_stack.stack == NULL) return REG_ESPACE;
                   RETALLOC (compile_stack.stack, compile_stack.size << 1,
                             compile_stack_elt_t);
                   if (compile_stack.stack == NULL) return REG_ESPACE;


@@ -1593,7 +1593,7 @@ regex_compile (pattern, size, syntax, bufp)
                  whole pattern moves because of realloc, they will still
                  be valid.  */
               COMPILE_STACK_TOP.begalt_offset = begalt - bufp->buffer;
                  whole pattern moves because of realloc, they will still
                  be valid.  */
               COMPILE_STACK_TOP.begalt_offset = begalt - bufp->buffer;

-              COMPILE_STACK_TOP.fixup_alt_jump 
+              COMPILE_STACK_TOP.fixup_alt_jump

                 = fixup_alt_jump ? fixup_alt_jump - bufp->buffer + 1 : 0;
               COMPILE_STACK_TOP.laststart_offset = b - bufp->buffer;
               COMPILE_STACK_TOP.regnum = regnum;
                 = fixup_alt_jump ? fixup_alt_jump - bufp->buffer + 1 : 0;
               COMPILE_STACK_TOP.laststart_offset = b - bufp->buffer;
               COMPILE_STACK_TOP.regnum = regnum;


@@ -1607,7 +1607,7 @@ regex_compile (pattern, size, syntax, bufp)
                   COMPILE_STACK_TOP.inner_group_offset = b - bufp->buffer + 2;
                   BUF_PUSH_3 (start_memory, regnum, 0);
                 }
                   COMPILE_STACK_TOP.inner_group_offset = b - bufp->buffer + 2;
                   BUF_PUSH_3 (start_memory, regnum, 0);
                 }

-                
+

               compile_stack.avail++;
 
               fixup_alt_jump = 0;
               compile_stack.avail++;
 
               fixup_alt_jump = 0;


@@ -1636,7 +1636,7 @@ regex_compile (pattern, size, syntax, bufp)
                      `pop_failure_jump' to pop.  See comments at
                      `push_dummy_failure' in `re_match_2'.  */
                   BUF_PUSH (push_dummy_failure);
                      `pop_failure_jump' to pop.  See comments at
                      `push_dummy_failure' in `re_match_2'.  */
                   BUF_PUSH (push_dummy_failure);

-                  
+

                   /* We allocated space for this jump when we assigned
                      to `fixup_alt_jump', in the `handle_alt' case below.  */
                   STORE_JUMP (jump_past_alt, fixup_alt_jump, b - 1);
                   /* We allocated space for this jump when we assigned
                      to `fixup_alt_jump', in the `handle_alt' case below.  */
                   STORE_JUMP (jump_past_alt, fixup_alt_jump, b - 1);


@@ -1658,11 +1658,11 @@ regex_compile (pattern, size, syntax, bufp)
                    as in `(ab)c(de)' -- the second group is #2.  */
                 regnum_t this_group_regnum;
 
                    as in `(ab)c(de)' -- the second group is #2.  */
                 regnum_t this_group_regnum;
 

-                compile_stack.avail--;         
+                compile_stack.avail--;

                 begalt = bufp->buffer + COMPILE_STACK_TOP.begalt_offset;
                 fixup_alt_jump
                   = COMPILE_STACK_TOP.fixup_alt_jump
                 begalt = bufp->buffer + COMPILE_STACK_TOP.begalt_offset;
                 fixup_alt_jump
                   = COMPILE_STACK_TOP.fixup_alt_jump

-                    ? bufp->buffer + COMPILE_STACK_TOP.fixup_alt_jump - 1 
+                    ? bufp->buffer + COMPILE_STACK_TOP.fixup_alt_jump - 1

                     : 0;
                 laststart = bufp->buffer + COMPILE_STACK_TOP.laststart_offset;
                 this_group_regnum = COMPILE_STACK_TOP.regnum;
                     : 0;
                 laststart = bufp->buffer + COMPILE_STACK_TOP.laststart_offset;
                 this_group_regnum = COMPILE_STACK_TOP.regnum;


@@ -1677,7 +1677,7 @@ regex_compile (pattern, size, syntax, bufp)
                   {
                     unsigned char *inner_group_loc
                       = bufp->buffer + COMPILE_STACK_TOP.inner_group_offset;
                   {
                     unsigned char *inner_group_loc
                       = bufp->buffer + COMPILE_STACK_TOP.inner_group_offset;

-                    
+

                     *inner_group_loc = regnum - this_group_regnum;
                     BUF_PUSH_3 (stop_memory, this_group_regnum,
                                 regnum - this_group_regnum);
                     *inner_group_loc = regnum - this_group_regnum;
                     BUF_PUSH_3 (stop_memory, this_group_regnum,
                                 regnum - this_group_regnum);


@@ -1706,10 +1706,10 @@ regex_compile (pattern, size, syntax, bufp)
                  jump (put in below, which in turn will jump to the next
                  (if any) alternative's such jump, etc.).  The last such
                  jump jumps to the correct final destination.  A picture:
                  jump (put in below, which in turn will jump to the next
                  (if any) alternative's such jump, etc.).  The last such
                  jump jumps to the correct final destination.  A picture:

-                          _____ _____ 
-                          |   | |   |   
-                          |   v |   v 
-                         a | b   | c   
+                          _____ _____
+                          |   | |   |
+                          |   v |   v
+                         a | b   | c

 
                  If we are at `b', then fixup_alt_jump right now points to a
                  three-byte space after `a'.  We'll put in the jump, set
 
                  If we are at `b', then fixup_alt_jump right now points to a
                  three-byte space after `a'.  We'll put in the jump, set


@@ -1731,10 +1731,10 @@ regex_compile (pattern, size, syntax, bufp)
               break;
 
 
               break;
 
 

-            case '{': 
+            case '{':

               /* If \{ is a literal.  */
               if (!(syntax & RE_INTERVALS)
               /* If \{ is a literal.  */
               if (!(syntax & RE_INTERVALS)

-                     /* If we're at `\{' and it's not the open-interval 
+                     /* If we're at `\{' and it's not the open-interval

                         operator.  */
                   || ((syntax & RE_INTERVALS) && (syntax & RE_NO_BK_BRACES))
                   || (p - 2 == pattern  &&  p == pend))
                         operator.  */
                   || ((syntax & RE_INTERVALS) && (syntax & RE_NO_BK_BRACES))
                   || (p - 2 == pattern  &&  p == pend))


@@ -1773,11 +1773,11 @@ regex_compile (pattern, size, syntax, bufp)
                   {
                     if (syntax & RE_NO_BK_BRACES)
                       goto unfetch_interval;
                   {
                     if (syntax & RE_NO_BK_BRACES)
                       goto unfetch_interval;

-                    else 
+                    else

                       return REG_BADBR;
                   }
 
                       return REG_BADBR;
                   }
 

-                if (!(syntax & RE_NO_BK_BRACES)) 
+                if (!(syntax & RE_NO_BK_BRACES))

                   {
                     if (c != '\\') return REG_EBRACE;
 
                   {
                     if (c != '\\') return REG_EBRACE;
 


@@ -1788,7 +1788,7 @@ regex_compile (pattern, size, syntax, bufp)
                   {
                     if (syntax & RE_NO_BK_BRACES)
                       goto unfetch_interval;
                   {
                     if (syntax & RE_NO_BK_BRACES)
                       goto unfetch_interval;

-                    else 
+                    else

                       return REG_BADBR;
                   }
 
                       return REG_BADBR;
                   }
 


@@ -1824,7 +1824,7 @@ regex_compile (pattern, size, syntax, bufp)
                       jump_n <succeed_n addr> <jump count>
                     (The upper bound and `jump_n' are omitted if
                     `upper_bound' is 1, though.)  */
                       jump_n <succeed_n addr> <jump count>
                     (The upper bound and `jump_n' are omitted if
                     `upper_bound' is 1, though.)  */

-                 else 
+                 else

                    { /* If the upper bound is > 1, we need to insert
                         more at the end of the loop.  */
                      unsigned nbytes = 10 + (upper_bound > 1) * 10;
                    { /* If the upper bound is > 1, we need to insert
                         more at the end of the loop.  */
                      unsigned nbytes = 10 + (upper_bound > 1) * 10;


@@ -1841,7 +1841,7 @@ regex_compile (pattern, size, syntax, bufp)
                                    lower_bound);
                      b += 5;
 
                                    lower_bound);
                      b += 5;
 

-                     /* Code to initialize the lower bound.  Insert 
+                     /* Code to initialize the lower bound.  Insert

                         before the `succeed_n'.  The `5' is the last two
                         bytes of this `set_number_at', plus 3 bytes of
                         the following `succeed_n'.  */
                         before the `succeed_n'.  The `5' is the last two
                         bytes of this `set_number_at', plus 3 bytes of
                         the following `succeed_n'.  */


@@ -1852,7 +1852,7 @@ regex_compile (pattern, size, syntax, bufp)
                        { /* More than one repetition is allowed, so
                             append a backward jump to the `succeed_n'
                             that starts this interval.
                        { /* More than one repetition is allowed, so
                             append a backward jump to the `succeed_n'
                             that starts this interval.

-                            
+

                             When we've reached this during matching,
                             we'll have matched the interval once, so
                             jump back only `upper_bound - 1' times.  */
                             When we've reached this during matching,
                             we'll have matched the interval once, so
                             jump back only `upper_bound - 1' times.  */


@@ -1870,7 +1870,7 @@ regex_compile (pattern, size, syntax, bufp)
                             so everything is getting moved up by 5.
                             Conclusion: (b - 2) - (laststart + 3) + 5,
                             i.e., b - laststart.
                             so everything is getting moved up by 5.
                             Conclusion: (b - 2) - (laststart + 3) + 5,
                             i.e., b - laststart.

-                            
+

                             We insert this at the beginning of the loop
                             so that if we fail during matching, we'll
                             reinitialize the bounds.  */
                             We insert this at the beginning of the loop
                             so that if we fail during matching, we'll
                             reinitialize the bounds.  */


@@ -1891,7 +1891,7 @@ regex_compile (pattern, size, syntax, bufp)
                beg_interval = NULL;
 
                /* normal_char and normal_backslash need `c'.  */
                beg_interval = NULL;
 
                /* normal_char and normal_backslash need `c'.  */

-               PATFETCH (c);   
+               PATFETCH (c);

 
                if (!(syntax & RE_NO_BK_BRACES))
                  {
 
                if (!(syntax & RE_NO_BK_BRACES))
                  {


@@ -1907,7 +1907,7 @@ regex_compile (pattern, size, syntax, bufp)
               BUF_PUSH (at_dot);
               break;
 
               BUF_PUSH (at_dot);
               break;
 

-            case 's':  
+            case 's':

               laststart = b;
               PATFETCH (c);
               BUF_PUSH_2 (syntaxspec, syntax_spec_code[c]);
               laststart = b;
               PATFETCH (c);
               BUF_PUSH_2 (syntaxspec, syntax_spec_code[c]);


@@ -1998,11 +1998,11 @@ regex_compile (pattern, size, syntax, bufp)
         /* Expects the character in `c'.  */
        normal_char:
              /* If no exactn currently being built.  */
         /* Expects the character in `c'.  */
        normal_char:
              /* If no exactn currently being built.  */

-          if (!pending_exact 
+          if (!pending_exact

 
               /* If last exactn not at current position.  */
               || pending_exact + *pending_exact + 1 != b
 
               /* If last exactn not at current position.  */
               || pending_exact + *pending_exact + 1 != b

-              
+

               /* We have only one byte following the exactn for the count.  */
              || *pending_exact == (1 << BYTEWIDTH) - 1
 
               /* We have only one byte following the exactn for the count.  */
              || *pending_exact == (1 << BYTEWIDTH) - 1
 


@@ -2017,26 +2017,26 @@ regex_compile (pattern, size, syntax, bufp)
                       : (p[0] == '\\' && p[1] == '{'))))
            {
              /* Start building a new exactn.  */
                       : (p[0] == '\\' && p[1] == '{'))))
            {
              /* Start building a new exactn.  */

-              
+

               laststart = b;
 
              BUF_PUSH_2 (exactn, 0);
              pending_exact = b - 1;
             }
               laststart = b;
 
              BUF_PUSH_2 (exactn, 0);
              pending_exact = b - 1;
             }

-            
+

          BUF_PUSH (c);
           (*pending_exact)++;
          break;
         } /* switch (c) */
     } /* while p != pend */
 
          BUF_PUSH (c);
           (*pending_exact)++;
          break;
         } /* switch (c) */
     } /* while p != pend */
 

-  
+

   /* Through the pattern now.  */
   /* Through the pattern now.  */

-  
+

   if (fixup_alt_jump)
     STORE_JUMP (jump_past_alt, fixup_alt_jump, b);
 
   if (fixup_alt_jump)
     STORE_JUMP (jump_past_alt, fixup_alt_jump, b);
 

-  if (!COMPILE_STACK_EMPTY) 
+  if (!COMPILE_STACK_EMPTY)

     return REG_EPAREN;
 
   free (compile_stack.stack);
     return REG_EPAREN;
 
   free (compile_stack.stack);


@@ -2092,14 +2092,14 @@ insert_op1 (op, loc, arg, end)
     re_opcode_t op;
     unsigned char *loc;
     int arg;
     re_opcode_t op;
     unsigned char *loc;
     int arg;

-    unsigned char *end;    
+    unsigned char *end;

 {
   register unsigned char *pfrom = end;
   register unsigned char *pto = end + 3;
 
   while (pfrom != loc)
     *--pto = *--pfrom;
 {
   register unsigned char *pfrom = end;
   register unsigned char *pto = end + 3;
 
   while (pfrom != loc)
     *--pto = *--pfrom;

-    
+

   store_op1 (op, loc, arg);
 }
 
   store_op1 (op, loc, arg);
 }
 


@@ -2111,14 +2111,14 @@ insert_op2 (op, loc, arg1, arg2, end)
     re_opcode_t op;
     unsigned char *loc;
     int arg1, arg2;
     re_opcode_t op;
     unsigned char *loc;
     int arg1, arg2;

-    unsigned char *end;    
+    unsigned char *end;

 {
   register unsigned char *pfrom = end;
   register unsigned char *pto = end + 5;
 
   while (pfrom != loc)
     *--pto = *--pfrom;
 {
   register unsigned char *pfrom = end;
   register unsigned char *pto = end + 5;
 
   while (pfrom != loc)
     *--pto = *--pfrom;

-    
+

   store_op2 (op, loc, arg1, arg2);
 }
 
   store_op2 (op, loc, arg1, arg2);
 }
 


@@ -2134,7 +2134,7 @@ at_begline_loc_p (pattern, p, syntax)
 {
   const char *prev = p - 2;
   boolean prev_prev_backslash = prev > pattern && prev[-1] == '\\';
 {
   const char *prev = p - 2;
   boolean prev_prev_backslash = prev > pattern && prev[-1] == '\\';

-  
+

   return
        /* After a subexpression?  */
        (*prev == '(' && (syntax & RE_NO_BK_PARENS || prev_prev_backslash))
   return
        /* After a subexpression?  */
        (*prev == '(' && (syntax & RE_NO_BK_PARENS || prev_prev_backslash))


@@ -2154,7 +2154,7 @@ at_endline_loc_p (p, pend, syntax)
   const char *next = p;
   boolean next_backslash = *next == '\\';
   const char *next_next = p + 1 < pend ? p + 1 : NULL;
   const char *next = p;
   boolean next_backslash = *next == '\\';
   const char *next_next = p + 1 < pend ? p + 1 : NULL;

-  
+

   return
        /* Before a subexpression?  */
        (syntax & RE_NO_BK_PARENS ? *next == ')'
   return
        /* Before a subexpression?  */
        (syntax & RE_NO_BK_PARENS ? *next == ')'


@@ -2165,7 +2165,7 @@ at_endline_loc_p (p, pend, syntax)
 }
 
 
 }
 
 

-/* Returns true if REGNUM is in one of COMPILE_STACK's elements and 
+/* Returns true if REGNUM is in one of COMPILE_STACK's elements and

    false if it's not.  */
 
 static boolean
    false if it's not.  */
 
 static boolean


@@ -2175,8 +2175,8 @@ group_in_compile_stack (compile_stack, regnum)
 {
   int this_element;
 
 {
   int this_element;
 

-  for (this_element = compile_stack.avail - 1;  
-       this_element >= 0; 
+  for (this_element = compile_stack.avail - 1;
+       this_element >= 0;

        this_element--)
     if (compile_stack.stack[this_element].regnum == regnum)
       return true;
        this_element--)
     if (compile_stack.stack[this_element].regnum == regnum)
       return true;


@@ -2190,9 +2190,9 @@ group_in_compile_stack (compile_stack, regnum)
    starting character is in `P[-2]'.  (`P[-1]' is the character `-'.)
    Then we set the translation of all bits between the starting and
    ending characters (inclusive) in the compiled pattern B.
    starting character is in `P[-2]'.  (`P[-1]' is the character `-'.)
    Then we set the translation of all bits between the starting and
    ending characters (inclusive) in the compiled pattern B.

-   
+

    Return an error code.
    Return an error code.

-   
+

    We use these short variable names so we can use the same macros as
    `regex_compile' itself.  */
 
    We use these short variable names so we can use the same macros as
    `regex_compile' itself.  */
 


@@ -2207,7 +2207,7 @@ compile_range (p_ptr, pend, translate, syntax, b)
 
   const char *p = *p_ptr;
   int range_start, range_end;
 
   const char *p = *p_ptr;
   int range_start, range_end;

-  
+

   if (p == pend)
     return REG_ERANGE;
 
   if (p == pend)
     return REG_ERANGE;
 


@@ -2216,7 +2216,7 @@ compile_range (p_ptr, pend, translate, syntax, b)
      is set, the range endpoints will be negative if we fetch using a
      signed char *.
 
      is set, the range endpoints will be negative if we fetch using a
      signed char *.
 

-     We also want to fetch the endpoints without translating them; the 
+     We also want to fetch the endpoints without translating them; the

      appropriate translation is done in the bit-setting loop below.  */
   range_start = ((unsigned char *) p)[-2];
   range_end   = ((unsigned char *) p)[0];
      appropriate translation is done in the bit-setting loop below.  */
   range_start = ((unsigned char *) p)[-2];
   range_end   = ((unsigned char *) p)[0];


@@ -2237,14 +2237,14 @@ compile_range (p_ptr, pend, translate, syntax, b)
     {
       SET_LIST_BIT (TRANSLATE (this_char));
     }
     {
       SET_LIST_BIT (TRANSLATE (this_char));
     }

-  
+

   return REG_NOERROR;
 }
 \f
 /* Failure stack declarations and macros; both re_compile_fastmap and
    re_match_2 use a failure stack.  These have to be macros because of
    REGEX_ALLOCATE.  */
   return REG_NOERROR;
 }
 \f
 /* Failure stack declarations and macros; both re_compile_fastmap and
    re_match_2 use a failure stack.  These have to be macros because of
    REGEX_ALLOCATE.  */

-   
+

 
 /* Number of failure points for which to initially allocate space
    when matching.  If this number is exceeded, we allocate more
 
 /* Number of failure points for which to initially allocate space
    when matching.  If this number is exceeded, we allocate more


@@ -2292,8 +2292,8 @@ typedef struct
 /* Double the size of FAIL_STACK, up to approximately `re_max_failures' items.
 
    Return 1 if succeeds, and 0 if either ran out of memory
 /* Double the size of FAIL_STACK, up to approximately `re_max_failures' items.
 
    Return 1 if succeeds, and 0 if either ran out of memory

-   allocating space for it or it was already too large.  
-   
+   allocating space for it or it was already too large.
+

    REGEX_REALLOCATE requires `destination' be declared.   */
 
 #define DOUBLE_FAIL_STACK(fail_stack)                                  \
    REGEX_REALLOCATE requires `destination' be declared.   */
 
 #define DOUBLE_FAIL_STACK(fail_stack)                                  \


@@ -2310,7 +2310,7 @@ typedef struct
          1)))
 
 
          1)))
 
 

-/* Push PATTERN_OP on FAIL_STACK. 
+/* Push PATTERN_OP on FAIL_STACK.

 
    Return 1 if was able to do so and 0 if ran out of memory allocating
    space to do so.  */
 
    Return 1 if was able to do so and 0 if ran out of memory allocating
    space to do so.  */


@@ -2341,12 +2341,12 @@ typedef struct
 
 
 /* Push the information about the state we will need
 
 
 /* Push the information about the state we will need

-   if we ever fail back to it.  
-   
+   if we ever fail back to it.
+

    Requires variables fail_stack, regstart, regend, reg_info, and
    num_regs be declared.  DOUBLE_FAIL_STACK requires `destination' be
    declared.
    Requires variables fail_stack, regstart, regend, reg_info, and
    num_regs be declared.  DOUBLE_FAIL_STACK requires `destination' be
    declared.

-   
+

    Does `return FAILURE_CODE' if runs out of memory.  */
 
 #define PUSH_FAILURE_POINT(pattern_place, string_place, failure_code)  \
    Does `return FAILURE_CODE' if runs out of memory.  */
 
 #define PUSH_FAILURE_POINT(pattern_place, string_place, failure_code)  \


@@ -2454,7 +2454,7 @@ typedef struct
      LOW_REG, HIGH_REG -- the highest and lowest active registers.
      REGSTART, REGEND -- arrays of string positions.
      REG_INFO -- array of information about each subexpression.
      LOW_REG, HIGH_REG -- the highest and lowest active registers.
      REGSTART, REGEND -- arrays of string positions.
      REG_INFO -- array of information about each subexpression.

-   
+

    Also assumes the variables `fail_stack' and (if debugging), `bufp',
    `pend', `string1', `size1', `string2', and `size2'.  */
 
    Also assumes the variables `fail_stack' and (if debugging), `bufp',
    `pend', `string1', `size1', `string2', and `size2'.  */
 


@@ -2522,7 +2522,7 @@ typedef struct
 
    The caller must supply the address of a (1 << BYTEWIDTH)-byte data
    area as BUFP->fastmap.
 
    The caller must supply the address of a (1 << BYTEWIDTH)-byte data
    area as BUFP->fastmap.

-   
+

    We set the `fastmap', `fastmap_accurate', and `can_be_null' fields in
    the pattern buffer.
 
    We set the `fastmap', `fastmap_accurate', and `can_be_null' fields in
    the pattern buffer.
 


@@ -2539,7 +2539,7 @@ re_compile_fastmap (bufp)
 #endif
   /* We don't push any register information onto the failure stack.  */
   unsigned num_regs = 0;
 #endif
   /* We don't push any register information onto the failure stack.  */
   unsigned num_regs = 0;

-  
+

   register char *fastmap = bufp->fastmap;
   unsigned char *pattern = bufp->buffer;
   unsigned long size = bufp->used;
   register char *fastmap = bufp->fastmap;
   unsigned char *pattern = bufp->buffer;
   unsigned long size = bufp->used;


@@ -2556,27 +2556,27 @@ re_compile_fastmap (bufp)
   boolean succeed_n_p = false;
 
   assert (fastmap != NULL && p != NULL);
   boolean succeed_n_p = false;
 
   assert (fastmap != NULL && p != NULL);

-  
+

   INIT_FAIL_STACK ();
   bzero (fastmap, 1 << BYTEWIDTH);  /* Assume nothing's valid.  */
   bufp->fastmap_accurate = 1;      /* It will be when we're done.  */
   bufp->can_be_null = 0;
   INIT_FAIL_STACK ();
   bzero (fastmap, 1 << BYTEWIDTH);  /* Assume nothing's valid.  */
   bufp->fastmap_accurate = 1;      /* It will be when we're done.  */
   bufp->can_be_null = 0;

-      
+

   while (p != pend || !FAIL_STACK_EMPTY ())
     {
       if (p == pend)
         {
           bufp->can_be_null |= path_can_be_null;
   while (p != pend || !FAIL_STACK_EMPTY ())
     {
       if (p == pend)
         {
           bufp->can_be_null |= path_can_be_null;

-          
+

           /* Reset for next path.  */
           path_can_be_null = true;
           /* Reset for next path.  */
           path_can_be_null = true;

-          
+

           p = fail_stack.stack[--fail_stack.avail];
        }
 
       /* We should never be about to go beyond the end of the pattern.  */
       assert (p < pend);
           p = fail_stack.stack[--fail_stack.avail];
        }
 
       /* We should never be about to go beyond the end of the pattern.  */
       assert (p < pend);

-      
+

 #ifdef SWITCH_ENUM_BUG
       switch ((int) ((re_opcode_t) *p++))
 #else
 #ifdef SWITCH_ENUM_BUG
       switch ((int) ((re_opcode_t) *p++))
 #else


@@ -2700,10 +2700,10 @@ re_compile_fastmap (bufp)
         case jump_past_alt:
        case dummy_failure_jump:
           EXTRACT_NUMBER_AND_INCR (j, p);
         case jump_past_alt:
        case dummy_failure_jump:
           EXTRACT_NUMBER_AND_INCR (j, p);

-         p += j;       
+         p += j;

          if (j > 0)
            continue;
          if (j > 0)
            continue;

-            
+

           /* Jump backward implies we just went through the body of a
              loop and matched nothing.  Opcode jumped to should be
              `on_failure_jump' or `succeed_n'.  Just treat it like an
           /* Jump backward implies we just went through the body of a
              loop and matched nothing.  Opcode jumped to should be
              `on_failure_jump' or `succeed_n'.  Just treat it like an


@@ -2715,10 +2715,10 @@ re_compile_fastmap (bufp)
 
           p++;
           EXTRACT_NUMBER_AND_INCR (j, p);
 
           p++;
           EXTRACT_NUMBER_AND_INCR (j, p);

-          p += j;              
-         
+          p += j;
+

           /* If what's on the stack is where we are now, pop it.  */
           /* If what's on the stack is where we are now, pop it.  */

-          if (!FAIL_STACK_EMPTY () 
+          if (!FAIL_STACK_EMPTY ()

              && fail_stack.stack[fail_stack.avail - 1] == p)
             fail_stack.avail--;
 
              && fail_stack.stack[fail_stack.avail - 1] == p)
             fail_stack.avail--;
 


@@ -2756,7 +2756,7 @@ re_compile_fastmap (bufp)
 
        case succeed_n:
           /* Get to the number of times to succeed.  */
 
        case succeed_n:
           /* Get to the number of times to succeed.  */

-          p += 2;              
+          p += 2;

 
           /* Increment p past the n for when k != 0.  */
           EXTRACT_NUMBER_AND_INCR (k, p);
 
           /* Increment p past the n for when k != 0.  */
           EXTRACT_NUMBER_AND_INCR (k, p);


@@ -2847,7 +2847,7 @@ re_search (bufp, string, size, startpos, range, regs)
      int size, startpos, range;
      struct re_registers *regs;
 {
      int size, startpos, range;
      struct re_registers *regs;
 {

-  return re_search_2 (bufp, NULL, 0, string, size, startpos, range, 
+  return re_search_2 (bufp, NULL, 0, string, size, startpos, range,

                      regs, size);
 }
 
                      regs, size);
 }
 


@@ -2855,17 +2855,17 @@ re_search (bufp, string, size, startpos, range, regs)
 /* Using the compiled pattern in BUFP->buffer, first tries to match the
    virtual concatenation of STRING1 and STRING2, starting first at index
    STARTPOS, then at STARTPOS + 1, and so on.
 /* Using the compiled pattern in BUFP->buffer, first tries to match the
    virtual concatenation of STRING1 and STRING2, starting first at index
    STARTPOS, then at STARTPOS + 1, and so on.

-   
+

    STRING1 and STRING2 have length SIZE1 and SIZE2, respectively.
    STRING1 and STRING2 have length SIZE1 and SIZE2, respectively.

-   
+

    RANGE is how far to scan while trying to match.  RANGE = 0 means try
    only at STARTPOS; in general, the last start tried is STARTPOS +
    RANGE.
    RANGE is how far to scan while trying to match.  RANGE = 0 means try
    only at STARTPOS; in general, the last start tried is STARTPOS +
    RANGE.

-   
+

    In REGS, return the indices of the virtual concatenation of STRING1
    and STRING2 that matched the entire BUFP->buffer and its contained
    subexpressions.
    In REGS, return the indices of the virtual concatenation of STRING1
    and STRING2 that matched the entire BUFP->buffer and its contained
    subexpressions.

-   
+

    Do not consider matching one past the index STOP in the virtual
    concatenation of STRING1 and STRING2.
 
    Do not consider matching one past the index STOP in the virtual
    concatenation of STRING1 and STRING2.
 


@@ -2892,7 +2892,7 @@ re_search_2 (bufp, string1, size1, string2, size2, startpos, range, regs, stop)
   /* Check for out-of-range STARTPOS.  */
   if (startpos < 0 || startpos > total_size)
     return -1;
   /* Check for out-of-range STARTPOS.  */
   if (startpos < 0 || startpos > total_size)
     return -1;

-    
+

   /* Fix up RANGE if it might eventually take us outside
      the virtual concatenation of STRING1 and STRING2.  */
   if (endpos < -1)
   /* Fix up RANGE if it might eventually take us outside
      the virtual concatenation of STRING1 and STRING2.  */
   if (endpos < -1)


@@ -2914,10 +2914,10 @@ re_search_2 (bufp, string1, size1, string2, size2, startpos, range, regs, stop)
   if (fastmap && !bufp->fastmap_accurate)
     if (re_compile_fastmap (bufp) == -2)
       return -2;
   if (fastmap && !bufp->fastmap_accurate)
     if (re_compile_fastmap (bufp) == -2)
       return -2;

-  
+

   /* Loop through the string, looking for a place to start matching.  */
   for (;;)
   /* Loop through the string, looking for a place to start matching.  */
   for (;;)

-    { 
+    {

       /* If a fastmap is supplied, skip quickly over characters that
          cannot be the start of a match.  If the pattern can match the
          null string, however, we don't need to skip characters; we want
       /* If a fastmap is supplied, skip quickly over characters that
          cannot be the start of a match.  If the pattern can match the
          null string, however, we don't need to skip characters; we want


@@ -2934,7 +2934,7 @@ re_search_2 (bufp, string1, size1, string2, size2, startpos, range, regs, stop)
                 lim = range - (size1 - startpos);
 
              d = (startpos >= size1 ? string2 - size1 : string1) + startpos;
                 lim = range - (size1 - startpos);
 
              d = (startpos >= size1 ? string2 - size1 : string1) + startpos;

-   
+

               /* Written out as an if-else to avoid testing `translate'
                  inside the loop.  */
              if (translate)
               /* Written out as an if-else to avoid testing `translate'
                  inside the loop.  */
              if (translate)


@@ -2951,7 +2951,7 @@ re_search_2 (bufp, string1, size1, string2, size2, startpos, range, regs, stop)
          else                          /* Searching backwards.  */
            {
              register char c = (size1 == 0 || startpos >= size1
          else                          /* Searching backwards.  */
            {
              register char c = (size1 == 0 || startpos >= size1

-                                 ? string2[startpos - size1] 
+                                 ? string2[startpos - size1]

                                  : string1[startpos]);
 
              if (!fastmap[(unsigned char) TRANSLATE (c)])
                                  : string1[startpos]);
 
              if (!fastmap[(unsigned char) TRANSLATE (c)])


@@ -2968,21 +2968,21 @@ re_search_2 (bufp, string1, size1, string2, size2, startpos, range, regs, stop)
                        startpos, regs, stop);
       if (val >= 0)
        return startpos;
                        startpos, regs, stop);
       if (val >= 0)
        return startpos;

-        
+

       if (val == -2)
        return -2;
 
     advance:
       if (val == -2)
        return -2;
 
     advance:

-      if (!range) 
+      if (!range)

         break;
         break;

-      else if (range > 0) 
+      else if (range > 0)

         {
         {

-          range--; 
+          range--;

           startpos++;
         }
       else
         {
           startpos++;
         }
       else
         {

-          range++; 
+          range++;

           startpos--;
         }
     }
           startpos--;
         }
     }


@@ -3001,8 +3001,8 @@ static boolean alt_match_null_string_p (),
    onto the failure stack.  Other register information, such as the
    starting and ending positions (which are addresses), and the list of
    inner groups (which is a bits list) are maintained in separate
    onto the failure stack.  Other register information, such as the
    starting and ending positions (which are addresses), and the list of
    inner groups (which is a bits list) are maintained in separate

-   variables.  
-   
+   variables.
+

    We are making a (strictly speaking) nonportable assumption here: that
    the compiler will pack our bit fields into something that fits into
    the type of `word', i.e., is something that fits into one item on the
    We are making a (strictly speaking) nonportable assumption here: that
    the compiler will pack our bit fields into something that fits into
    the type of `word', i.e., is something that fits into one item on the


@@ -3076,7 +3076,7 @@ typedef union
 /* Test if at very beginning or at very end of the virtual concatenation
    of `string1' and `string2'.  If only one string, it's `string2'.  */
 #define AT_STRINGS_BEG(d) ((d) == (size1 ? string1 : string2) || !size2)
 /* Test if at very beginning or at very end of the virtual concatenation
    of `string1' and `string2'.  If only one string, it's `string2'.  */
 #define AT_STRINGS_BEG(d) ((d) == (size1 ? string1 : string2) || !size2)

-#define AT_STRINGS_END(d) ((d) == end2)        
+#define AT_STRINGS_END(d) ((d) == end2)

 
 
 /* Test if D points to a character which is word-constituent.  We have
 
 
 /* Test if D points to a character which is word-constituent.  We have


@@ -3139,7 +3139,7 @@ re_match (bufp, string, size, pos, regs)
      int size, pos;
      struct re_registers *regs;
  {
      int size, pos;
      struct re_registers *regs;
  {

-  return re_match_2 (bufp, NULL, 0, string, size, pos, regs, size); 
+  return re_match_2 (bufp, NULL, 0, string, size, pos, regs, size);

 }
 #endif /* not emacs */
 
 }
 #endif /* not emacs */
 


@@ -3148,7 +3148,7 @@ re_match (bufp, string, size, pos, regs)
    the (virtual) concatenation of STRING1 and STRING2 (of length SIZE1
    and SIZE2, respectively).  We start matching at POS, and stop
    matching at STOP.
    the (virtual) concatenation of STRING1 and STRING2 (of length SIZE1
    and SIZE2, respectively).  We start matching at POS, and stop
    matching at STOP.

-   
+

    If REGS is non-null and the `no_sub' field of BUFP is nonzero, we
    store offsets for the substring each group matched in REGS.  See the
    documentation for exactly how many groups we fill.
    If REGS is non-null and the `no_sub' field of BUFP is nonzero, we
    store offsets for the substring each group matched in REGS.  See the
    documentation for exactly how many groups we fill.


@@ -3179,7 +3179,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
 
   /* Where we are in the data, and the end of the current string.  */
   const char *d, *dend;
 
   /* Where we are in the data, and the end of the current string.  */
   const char *d, *dend;

-  
+

   /* Where we are in the pattern, and the end of the pattern.  */
   unsigned char *p = bufp->buffer;
   register unsigned char *pend = p + bufp->used;
   /* Where we are in the pattern, and the end of the pattern.  */
   unsigned char *p = bufp->buffer;
   register unsigned char *pend = p + bufp->used;


@@ -3206,7 +3206,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
      return, for use in backreferences.  The number here includes
      an element for register zero.  */
   unsigned num_regs = bufp->re_nsub + 1;
      return, for use in backreferences.  The number here includes
      an element for register zero.  */
   unsigned num_regs = bufp->re_nsub + 1;

-  
+

   /* The currently active registers.  */
   unsigned lowest_active_reg = NO_LOWEST_ACTIVE_REG;
   unsigned highest_active_reg = NO_HIGHEST_ACTIVE_REG;
   /* The currently active registers.  */
   unsigned lowest_active_reg = NO_LOWEST_ACTIVE_REG;
   unsigned highest_active_reg = NO_HIGHEST_ACTIVE_REG;


@@ -3233,15 +3233,15 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
      matched any of the pattern so far this time through the reg_num-th
      subexpression.  These two fields get reset each time through any
      loop their register is in.  */
      matched any of the pattern so far this time through the reg_num-th
      subexpression.  These two fields get reset each time through any
      loop their register is in.  */

-  register_info_type *reg_info; 
+  register_info_type *reg_info;

 
   /* The following record the register info as found in the above
 
   /* The following record the register info as found in the above

-     variables when we find a match better than any we've seen before. 
+     variables when we find a match better than any we've seen before.

      This happens as we backtrack through the failure points, which in
      turn happens only if we have not yet matched the entire string. */
   unsigned best_regs_set = false;
   const char **best_regstart, **best_regend;
      This happens as we backtrack through the failure points, which in
      turn happens only if we have not yet matched the entire string. */
   unsigned best_regs_set = false;
   const char **best_regstart, **best_regend;

-  
+

   /* Logically, this is `best_regend[0]'.  But we don't want to have to
      allocate space for that if we're not allocating space for anything
      else (see below).  Also, we never need info about register 0 for
   /* Logically, this is `best_regend[0]'.  But we don't want to have to
      allocate space for that if we're not allocating space for anything
      else (see below).  Also, we never need info about register 0 for


@@ -3258,13 +3258,13 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
 
 #ifdef DEBUG
   /* Counts the total number of registers pushed.  */
 
 #ifdef DEBUG
   /* Counts the total number of registers pushed.  */

-  unsigned num_regs_pushed = 0;        
+  unsigned num_regs_pushed = 0;

 #endif
 
   DEBUG_PRINT1 ("\n\nEntering re_match_2.\n");
 #endif
 
   DEBUG_PRINT1 ("\n\nEntering re_match_2.\n");

-  
+

   INIT_FAIL_STACK ();
   INIT_FAIL_STACK ();

-  
+

   /* Do not bother to initialize all the register variables if there are
      no groups in the pattern, as it takes a fair amount of time.  If
      there are groups, we include space for register 0 (the whole
   /* Do not bother to initialize all the register variables if there are
      no groups in the pattern, as it takes a fair amount of time.  If
      there are groups, we include space for register 0 (the whole


@@ -3282,8 +3282,8 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
       reg_dummy = REGEX_TALLOC (num_regs, const char *);
       reg_info_dummy = REGEX_TALLOC (num_regs, register_info_type);
 
       reg_dummy = REGEX_TALLOC (num_regs, const char *);
       reg_info_dummy = REGEX_TALLOC (num_regs, register_info_type);
 

-      if (!(regstart && regend && old_regstart && old_regend && reg_info 
-            && best_regstart && best_regend && reg_dummy && reg_info_dummy)) 
+      if (!(regstart && regend && old_regstart && old_regend && reg_info
+            && best_regstart && best_regend && reg_dummy && reg_info_dummy))

         {
           FREE_VARIABLES ();
           return -2;
         {
           FREE_VARIABLES ();
           return -2;


@@ -3306,21 +3306,21 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
       FREE_VARIABLES ();
       return -1;
     }
       FREE_VARIABLES ();
       return -1;
     }

-    
+

   /* Initialize subexpression text positions to -1 to mark ones that no
      start_memory/stop_memory has been seen for. Also initialize the
      register information struct.  */
   for (mcnt = 1; mcnt < num_regs; mcnt++)
     {
   /* Initialize subexpression text positions to -1 to mark ones that no
      start_memory/stop_memory has been seen for. Also initialize the
      register information struct.  */
   for (mcnt = 1; mcnt < num_regs; mcnt++)
     {

-      regstart[mcnt] = regend[mcnt] 
+      regstart[mcnt] = regend[mcnt]

         = old_regstart[mcnt] = old_regend[mcnt] = REG_UNSET_VALUE;
         = old_regstart[mcnt] = old_regend[mcnt] = REG_UNSET_VALUE;

-        
+

       REG_MATCH_NULL_STRING_P (reg_info[mcnt]) = MATCH_NULL_UNSET_VALUE;
       IS_ACTIVE (reg_info[mcnt]) = 0;
       MATCHED_SOMETHING (reg_info[mcnt]) = 0;
       EVER_MATCHED_SOMETHING (reg_info[mcnt]) = 0;
     }
       REG_MATCH_NULL_STRING_P (reg_info[mcnt]) = MATCH_NULL_UNSET_VALUE;
       IS_ACTIVE (reg_info[mcnt]) = 0;
       MATCHED_SOMETHING (reg_info[mcnt]) = 0;
       EVER_MATCHED_SOMETHING (reg_info[mcnt]) = 0;
     }

-  
+

   /* We move `string1' into `string2' if the latter's empty -- but not if
      `string1' is null.  */
   if (size2 == 0 && string1 != NULL)
   /* We move `string1' into `string2' if the latter's empty -- but not if
      `string1' is null.  */
   if (size2 == 0 && string1 != NULL)


@@ -3345,7 +3345,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
       end_match_2 = string2 + stop - size1;
     }
 
       end_match_2 = string2 + stop - size1;
     }
 

-  /* `p' scans through the pattern as `d' scans through the data. 
+  /* `p' scans through the pattern as `d' scans through the data.

      `dend' is the end of the input string that `d' points within.  `d'
      is advanced into the following input string whenever necessary, but
      this happens before fetching; therefore, at the beginning of the
      `dend' is the end of the input string that `d' points within.  `d'
      is advanced into the following input string whenever necessary, but
      this happens before fetching; therefore, at the beginning of the


@@ -3367,7 +3367,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
   DEBUG_PRINT1 ("The string to match is: `");
   DEBUG_PRINT_DOUBLE_STRING (d, string1, size1, string2, size2);
   DEBUG_PRINT1 ("'\n");
   DEBUG_PRINT1 ("The string to match is: `");
   DEBUG_PRINT_DOUBLE_STRING (d, string1, size1, string2, size2);
   DEBUG_PRINT1 ("'\n");

-  
+

   /* This loops over pattern commands.  It exits by returning from the
      function if the match is complete, or it drops through if the match
      fails at this starting point in the input data.  */
   /* This loops over pattern commands.  It exits by returning from the
      function if the match is complete, or it drops through if the match
      fails at this starting point in the input data.  */


@@ -3378,16 +3378,16 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
       if (p == pend)
        { /* End of pattern means we might have succeeded.  */
           DEBUG_PRINT1 ("end of pattern ... ");
       if (p == pend)
        { /* End of pattern means we might have succeeded.  */
           DEBUG_PRINT1 ("end of pattern ... ");

-          
+

          /* If we haven't matched the entire string, and we want the
              longest match, try backtracking.  */
           if (d != end_match_2)
            {
               DEBUG_PRINT1 ("backtracking.\n");
          /* If we haven't matched the entire string, and we want the
              longest match, try backtracking.  */
           if (d != end_match_2)
            {
               DEBUG_PRINT1 ("backtracking.\n");

-              
+

               if (!FAIL_STACK_EMPTY ())
                 { /* More failure points to try.  */
               if (!FAIL_STACK_EMPTY ())
                 { /* More failure points to try.  */

-                  boolean same_str_p = (FIRST_STRING_P (match_end) 
+                  boolean same_str_p = (FIRST_STRING_P (match_end)

                                        == MATCHING_IN_FIRST_STRING);
 
                   /* If exceeds best match so far, save it.  */
                                        == MATCHING_IN_FIRST_STRING);
 
                   /* If exceeds best match so far, save it.  */


@@ -3397,20 +3397,20 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
                     {
                       best_regs_set = true;
                       match_end = d;
                     {
                       best_regs_set = true;
                       match_end = d;

-                      
+

                       DEBUG_PRINT1 ("\nSAVING match as best so far.\n");
                       DEBUG_PRINT1 ("\nSAVING match as best so far.\n");

-                      
+

                       for (mcnt = 1; mcnt < num_regs; mcnt++)
                         {
                           best_regstart[mcnt] = regstart[mcnt];
                           best_regend[mcnt] = regend[mcnt];
                         }
                     }
                       for (mcnt = 1; mcnt < num_regs; mcnt++)
                         {
                           best_regstart[mcnt] = regstart[mcnt];
                           best_regend[mcnt] = regend[mcnt];
                         }
                     }

-                  goto fail;          
+                  goto fail;

                 }
 
               /* If no failure points, don't restore garbage.  */
                 }
 
               /* If no failure points, don't restore garbage.  */

-              else if (best_regs_set)   
+              else if (best_regs_set)

                 {
                restore_best_regs:
                   /* Restore best match.  It may happen that `dend ==
                 {
                restore_best_regs:
                   /* Restore best match.  It may happen that `dend ==


@@ -3419,7 +3419,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
                      strings `x-' and `y-z-', if the two strings are
                      not consecutive in memory.  */
                   DEBUG_PRINT1 ("Restoring best registers.\n");
                      strings `x-' and `y-z-', if the two strings are
                      not consecutive in memory.  */
                   DEBUG_PRINT1 ("Restoring best registers.\n");

-                  
+

                   d = match_end;
                   dend = ((d >= string1 && d <= end1)
                           ? end_match_1 : end_match_2);
                   d = match_end;
                   dend = ((d >= string1 && d <= end1)
                           ? end_match_1 : end_match_2);


@@ -3474,7 +3474,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
                   regs->end[0] = (MATCHING_IN_FIRST_STRING ? d - string1
                                  : d - string2 + size1);
                 }
                   regs->end[0] = (MATCHING_IN_FIRST_STRING ? d - string1
                                  : d - string2 + size1);
                 }

-              
+

               /* Go through the first `min (num_regs, regs->num_regs)'
                  registers, since that is all we initialized.  */
              for (mcnt = 1; mcnt < MIN (num_regs, regs->num_regs); mcnt++)
               /* Go through the first `min (num_regs, regs->num_regs)'
                  registers, since that is all we initialized.  */
              for (mcnt = 1; mcnt < MIN (num_regs, regs->num_regs); mcnt++)


@@ -3487,7 +3487,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
                       regs->end[mcnt] = POINTER_TO_OFFSET (regend[mcnt]);
                     }
                }
                       regs->end[mcnt] = POINTER_TO_OFFSET (regend[mcnt]);
                     }
                }

-              
+

               /* If the regs structure we return has more elements than
                  were in the pattern, set the extra elements to -1.  If
                  we (re)allocated the registers, this is the case,
               /* If the regs structure we return has more elements than
                  were in the pattern, set the extra elements to -1.  If
                  we (re)allocated the registers, this is the case,


@@ -3503,8 +3503,8 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
                         nfailure_points_pushed - nfailure_points_popped);
           DEBUG_PRINT2 ("%u registers pushed.\n", num_regs_pushed);
 
                         nfailure_points_pushed - nfailure_points_popped);
           DEBUG_PRINT2 ("%u registers pushed.\n", num_regs_pushed);
 

-          mcnt = d - pos - (MATCHING_IN_FIRST_STRING 
-                           ? string1 
+          mcnt = d - pos - (MATCHING_IN_FIRST_STRING
+                           ? string1

                            : string2 - size1);
 
           DEBUG_PRINT2 ("Returning %d from re_match_2.\n", mcnt);
                            : string2 - size1);
 
           DEBUG_PRINT2 ("Returning %d from re_match_2.\n", mcnt);


@@ -3594,7 +3594,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
            p += 1 + *p;
 
            if (!not) goto fail;
            p += 1 + *p;
 
            if (!not) goto fail;

-            
+

            SET_REGS_MATCHED ();
             d++;
            break;
            SET_REGS_MATCHED ();
             d++;
            break;


@@ -3611,9 +3611,9 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
 
           /* Find out if this group can match the empty string.  */
          p1 = p;               /* To send to group_match_null_string_p.  */
 
           /* Find out if this group can match the empty string.  */
          p1 = p;               /* To send to group_match_null_string_p.  */

-          
+

           if (REG_MATCH_NULL_STRING_P (reg_info[*p]) == MATCH_NULL_UNSET_VALUE)
           if (REG_MATCH_NULL_STRING_P (reg_info[*p]) == MATCH_NULL_UNSET_VALUE)

-            REG_MATCH_NULL_STRING_P (reg_info[*p]) 
+            REG_MATCH_NULL_STRING_P (reg_info[*p])

               = group_match_null_string_p (&p1, pend, reg_info);
 
           /* Save the position in the string where we were the last time
               = group_match_null_string_p (&p1, pend, reg_info);
 
           /* Save the position in the string where we were the last time


@@ -3624,7 +3624,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
           old_regstart[*p] = REG_MATCH_NULL_STRING_P (reg_info[*p])
                              ? REG_UNSET (regstart[*p]) ? d : regstart[*p]
                              : regstart[*p];
           old_regstart[*p] = REG_MATCH_NULL_STRING_P (reg_info[*p])
                              ? REG_UNSET (regstart[*p]) ? d : regstart[*p]
                              : regstart[*p];

-         DEBUG_PRINT2 ("  old_regstart: %d\n", 
+         DEBUG_PRINT2 ("  old_regstart: %d\n",

                         POINTER_TO_OFFSET (old_regstart[*p]));
 
           regstart[*p] = d;
                         POINTER_TO_OFFSET (old_regstart[*p]));
 
           regstart[*p] = d;


@@ -3632,10 +3632,10 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
 
           IS_ACTIVE (reg_info[*p]) = 1;
           MATCHED_SOMETHING (reg_info[*p]) = 0;
 
           IS_ACTIVE (reg_info[*p]) = 1;
           MATCHED_SOMETHING (reg_info[*p]) = 0;

-          
+

           /* This is the new highest active register.  */
           highest_active_reg = *p;
           /* This is the new highest active register.  */
           highest_active_reg = *p;

-          
+

           /* If nothing was active before, this is the new lowest active
              register.  */
           if (lowest_active_reg == NO_LOWEST_ACTIVE_REG)
           /* If nothing was active before, this is the new lowest active
              register.  */
           if (lowest_active_reg == NO_LOWEST_ACTIVE_REG)


@@ -3651,7 +3651,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
            number, and the number of inner groups.  */
        case stop_memory:
          DEBUG_PRINT3 ("EXECUTING stop_memory %d (%d):\n", *p, p[1]);
            number, and the number of inner groups.  */
        case stop_memory:
          DEBUG_PRINT3 ("EXECUTING stop_memory %d (%d):\n", *p, p[1]);

-             
+

           /* We need to save the string position the last time we were at
              this close-group operator in case the group is operated
              upon by a repetition operator, e.g., with `((a*)*(b*)*)*'
           /* We need to save the string position the last time we were at
              this close-group operator in case the group is operated
              upon by a repetition operator, e.g., with `((a*)*(b*)*)*'


@@ -3660,7 +3660,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
           old_regend[*p] = REG_MATCH_NULL_STRING_P (reg_info[*p])
                            ? REG_UNSET (regend[*p]) ? d : regend[*p]
                           : regend[*p];
           old_regend[*p] = REG_MATCH_NULL_STRING_P (reg_info[*p])
                            ? REG_UNSET (regend[*p]) ? d : regend[*p]
                           : regend[*p];

-         DEBUG_PRINT2 ("      old_regend: %d\n", 
+         DEBUG_PRINT2 ("      old_regend: %d\n",

                         POINTER_TO_OFFSET (old_regend[*p]));
 
           regend[*p] = d;
                         POINTER_TO_OFFSET (old_regend[*p]));
 
           regend[*p] = d;


@@ -3668,7 +3668,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
 
           /* This register isn't active anymore.  */
           IS_ACTIVE (reg_info[*p]) = 0;
 
           /* This register isn't active anymore.  */
           IS_ACTIVE (reg_info[*p]) = 0;

-          
+

           /* If this was the only register active, nothing is active
              anymore.  */
           if (lowest_active_reg == highest_active_reg)
           /* If this was the only register active, nothing is active
              anymore.  */
           if (lowest_active_reg == highest_active_reg)


@@ -3684,7 +3684,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
               unsigned char r = *p - 1;
               while (r > 0 && !IS_ACTIVE (reg_info[r]))
                 r--;
               unsigned char r = *p - 1;
               while (r > 0 && !IS_ACTIVE (reg_info[r]))
                 r--;

-              
+

               /* If we end up at register zero, that means that we saved
                  the registers as the result of an `on_failure_jump', not
                  a `start_memory', and we jumped to past the innermost
               /* If we end up at register zero, that means that we saved
                  the registers as the result of an `on_failure_jump', not
                  a `start_memory', and we jumped to past the innermost


@@ -3700,7 +3700,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
               else
                 highest_active_reg = r;
             }
               else
                 highest_active_reg = r;
             }

-          
+

           /* If just failed to match something this time around with a
              group that's operated on by a repetition operator, try to
              force exit from the ``loop'', and restore the register
           /* If just failed to match something this time around with a
              group that's operated on by a repetition operator, try to
              force exit from the ``loop'', and restore the register


@@ -3708,10 +3708,10 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
              last match.  */
           if ((!MATCHED_SOMETHING (reg_info[*p])
                || (re_opcode_t) p[-3] == start_memory)
              last match.  */
           if ((!MATCHED_SOMETHING (reg_info[*p])
                || (re_opcode_t) p[-3] == start_memory)

-             && (p + 2) < pend)              
+             && (p + 2) < pend)

             {
               boolean is_a_jump_n = false;
             {
               boolean is_a_jump_n = false;

-              
+

               p1 = p + 2;
               mcnt = 0;
               switch ((re_opcode_t) *p1++)
               p1 = p + 2;
               mcnt = 0;
               switch ((re_opcode_t) *p1++)


@@ -3726,12 +3726,12 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
                    if (is_a_jump_n)
                      p1 += 2;
                     break;
                    if (is_a_jump_n)
                      p1 += 2;
                     break;

-                  
+

                   default:
                     /* do nothing */ ;
                 }
              p1 += mcnt;
                   default:
                     /* do nothing */ ;
                 }
              p1 += mcnt;

-        
+

               /* If the next operation is a jump backwards in the pattern
                 to an on_failure_jump right before the start_memory
                  corresponding to this stop_memory, exit from the loop
               /* If the next operation is a jump backwards in the pattern
                 to an on_failure_jump right before the start_memory
                  corresponding to this stop_memory, exit from the loop


@@ -3745,17 +3745,17 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
                      failed match, e.g., with `(a*)*b' against `ab' for
                      regstart[1], and, e.g., with `((a*)*(b*)*)*'
                      against `aba' for regend[3].
                      failed match, e.g., with `(a*)*b' against `ab' for
                      regstart[1], and, e.g., with `((a*)*(b*)*)*'
                      against `aba' for regend[3].

-                     
+

                      Also restore the registers for inner groups for,
                      e.g., `((a*)(b*))*' against `aba' (register 3 would
                      otherwise get trashed).  */
                      Also restore the registers for inner groups for,
                      e.g., `((a*)(b*))*' against `aba' (register 3 would
                      otherwise get trashed).  */

-                     
+

                   if (EVER_MATCHED_SOMETHING (reg_info[*p]))
                    {
                   if (EVER_MATCHED_SOMETHING (reg_info[*p]))
                    {

-                     unsigned r; 
-        
+                     unsigned r;
+

                       EVER_MATCHED_SOMETHING (reg_info[*p]) = 0;
                       EVER_MATCHED_SOMETHING (reg_info[*p]) = 0;

-                      
+

                      /* Restore this and inner groups' (if any) registers.  */
                       for (r = *p; r < *p + *(p + 1); r++)
                         {
                      /* Restore this and inner groups' (if any) registers.  */
                       for (r = *p; r < *p + *(p + 1); r++)
                         {


@@ -3764,7 +3764,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
                           /* xx why this test?  */
                           if ((int) old_regend[r] >= (int) regstart[r])
                             regend[r] = old_regend[r];
                           /* xx why this test?  */
                           if ((int) old_regend[r] >= (int) regstart[r])
                             regend[r] = old_regend[r];

-                        }     
+                        }

                     }
                  p1++;
                   EXTRACT_NUMBER_AND_INCR (mcnt, p1);
                     }
                  p1++;
                   EXTRACT_NUMBER_AND_INCR (mcnt, p1);


@@ -3773,7 +3773,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
                   goto fail;
                 }
             }
                   goto fail;
                 }
             }

-          
+

           /* Move past the register number and the inner group count.  */
           p += 2;
           break;
           /* Move past the register number and the inner group count.  */
           p += 2;
           break;


@@ -3790,16 +3790,16 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
            /* Can't back reference a group which we've never matched.  */
             if (REG_UNSET (regstart[regno]) || REG_UNSET (regend[regno]))
               goto fail;
            /* Can't back reference a group which we've never matched.  */
             if (REG_UNSET (regstart[regno]) || REG_UNSET (regend[regno]))
               goto fail;

-              
+

             /* Where in input to try to start matching.  */
             d2 = regstart[regno];
             /* Where in input to try to start matching.  */
             d2 = regstart[regno];

-            
+

             /* Where to stop matching; if both the place to start and
                the place to stop matching are in the same string, then
                set to the place to stop, otherwise, for now have to use
                the end of the first string.  */
 
             /* Where to stop matching; if both the place to start and
                the place to stop matching are in the same string, then
                set to the place to stop, otherwise, for now have to use
                the end of the first string.  */
 

-            dend2 = ((FIRST_STRING_P (regstart[regno]) 
+            dend2 = ((FIRST_STRING_P (regstart[regno])

                      == FIRST_STRING_P (regend[regno]))
                     ? regend[regno] : end_match_1);
            for (;;)
                      == FIRST_STRING_P (regend[regno]))
                     ? regend[regno] : end_match_1);
            for (;;)


@@ -3823,16 +3823,16 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
 
                /* How many characters left in this segment to match.  */
                mcnt = dend - d;
 
                /* How many characters left in this segment to match.  */
                mcnt = dend - d;

-                
+

                /* Want how many consecutive characters we can match in
                    one shot, so, if necessary, adjust the count.  */
                 if (mcnt > dend2 - d2)
                  mcnt = dend2 - d2;
                /* Want how many consecutive characters we can match in
                    one shot, so, if necessary, adjust the count.  */
                 if (mcnt > dend2 - d2)
                  mcnt = dend2 - d2;

-                  
+

                /* Compare that many; failure if mismatch, else move
                    past them.  */
                /* Compare that many; failure if mismatch, else move
                    past them.  */

-               if (translate 
-                    ? bcmp_translate (d, d2, mcnt, translate) 
+               if (translate
+                    ? bcmp_translate (d, d2, mcnt, translate)

                     : bcmp (d, d2, mcnt))
                  goto fail;
                d += mcnt, d2 += mcnt;
                     : bcmp (d, d2, mcnt))
                  goto fail;
                d += mcnt, d2 += mcnt;


@@ -3846,7 +3846,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
            `newline_anchor' is set, after newlines.  */
        case begline:
           DEBUG_PRINT1 ("EXECUTING begline.\n");
            `newline_anchor' is set, after newlines.  */
        case begline:
           DEBUG_PRINT1 ("EXECUTING begline.\n");

-          
+

           if (AT_STRINGS_BEG (d))
             {
               if (!bufp->not_bol) break;
           if (AT_STRINGS_BEG (d))
             {
               if (!bufp->not_bol) break;


@@ -3867,7 +3867,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
             {
               if (!bufp->not_eol) break;
             }
             {
               if (!bufp->not_eol) break;
             }

-          
+

           /* We have to ``prefetch'' the next character.  */
           else if ((d == end1 ? *string2 : *d) == '\n'
                    && bufp->newline_anchor)
           /* We have to ``prefetch'' the next character.  */
           else if ((d == end1 ? *string2 : *d) == '\n'
                    && bufp->newline_anchor)


@@ -3901,7 +3901,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
            then the . fails against the \n.  But the next thing we want
            to do is match the \n against the \n; if we restored the
            string value, we would be back at the foo.
            then the . fails against the \n.  But the next thing we want
            to do is match the \n against the \n; if we restored the
            string value, we would be back at the foo.

-           
+

            Because this is used only in specific cases, we don't need to
            check all the things that `on_failure_jump' does, to make
            sure the right things get saved on the stack.  Hence we don't
            Because this is used only in specific cases, we don't need to
            check all the things that `on_failure_jump' does, to make
            sure the right things get saved on the stack.  Hence we don't


@@ -3911,7 +3911,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
            case; that seems worse than this.  */
         case on_failure_keep_string_jump:
           DEBUG_PRINT1 ("EXECUTING on_failure_keep_string_jump");
            case; that seems worse than this.  */
         case on_failure_keep_string_jump:
           DEBUG_PRINT1 ("EXECUTING on_failure_keep_string_jump");

-          
+

           EXTRACT_NUMBER_AND_INCR (mcnt, p);
           DEBUG_PRINT3 (" %d (to 0x%x):\n", mcnt, p + mcnt);
 
           EXTRACT_NUMBER_AND_INCR (mcnt, p);
           DEBUG_PRINT3 (" %d (to 0x%x):\n", mcnt, p + mcnt);
 


@@ -3920,7 +3920,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
 
 
        /* Uses of on_failure_jump:
 
 
        /* Uses of on_failure_jump:

-        
+

            Each alternative starts with an on_failure_jump that points
            to the beginning of the next alternative.  Each alternative
            except the last ends with a jump that in effect jumps past
            Each alternative starts with an on_failure_jump that points
            to the beginning of the next alternative.  Each alternative
            except the last ends with a jump that in effect jumps past


@@ -3986,7 +3986,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
                would have to backtrack because of (as in, e.g., `a*a')
                then we can change to pop_failure_jump, because we'll
                never have to backtrack.
                would have to backtrack because of (as in, e.g., `a*a')
                then we can change to pop_failure_jump, because we'll
                never have to backtrack.

-               
+

                This is not true in the case of alternatives: in
                `(a|ab)*' we do need to backtrack to the `ab' alternative
                (e.g., if the string was `ab').  But instead of trying to
                This is not true in the case of alternatives: in
                `(a|ab)*' we do need to backtrack to the `ab' alternative
                (e.g., if the string was `ab').  But instead of trying to


@@ -4018,7 +4018,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
                p1 = p + mcnt;
 
                 /* p1[0] ... p1[2] are the `on_failure_jump' corresponding
                p1 = p + mcnt;
 
                 /* p1[0] ... p1[2] are the `on_failure_jump' corresponding

-                   to the `maybe_finalize_jump' of this case.  Examine what 
+                   to the `maybe_finalize_jump' of this case.  Examine what

                    follows.  */
                 if ((re_opcode_t) p1[3] == exactn && p1[5] != c)
                   {
                    follows.  */
                 if ((re_opcode_t) p1[3] == exactn && p1[5] != c)
                   {


@@ -4026,12 +4026,12 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
                     DEBUG_PRINT3 ("  %c != %c => pop_failure_jump.\n",
                                   c, p1[5]);
                   }
                     DEBUG_PRINT3 ("  %c != %c => pop_failure_jump.\n",
                                   c, p1[5]);
                   }

-                  
+

                else if ((re_opcode_t) p1[3] == charset
                         || (re_opcode_t) p1[3] == charset_not)
                  {
                    int not = (re_opcode_t) p1[3] == charset_not;
                else if ((re_opcode_t) p1[3] == charset
                         || (re_opcode_t) p1[3] == charset_not)
                  {
                    int not = (re_opcode_t) p1[3] == charset_not;

-                    
+

                    if (c < (unsigned char) (p1[4] * BYTEWIDTH)
                        && p1[5 + c / BYTEWIDTH] & (1 << (c % BYTEWIDTH)))
                      not = !not;
                    if (c < (unsigned char) (p1[4] * BYTEWIDTH)
                        && p1[5 + c / BYTEWIDTH] & (1 << (c % BYTEWIDTH)))
                      not = !not;


@@ -4080,7 +4080,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
           }
           /* Note fall through.  */
 
           }
           /* Note fall through.  */
 

-          
+

         /* Unconditionally jump (without popping any failure points).  */
         case jump:
        unconditional_jump:
         /* Unconditionally jump (without popping any failure points).  */
         case jump:
        unconditional_jump:


@@ -4090,7 +4090,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
           DEBUG_PRINT2 ("(to 0x%x).\n", p);
          break;
 
           DEBUG_PRINT2 ("(to 0x%x).\n", p);
          break;
 

-       
+

         /* We need this opcode so we can detect where alternatives end
            in `group_match_null_string_p' et al.  */
         case jump_past_alt:
         /* We need this opcode so we can detect where alternatives end
            in `group_match_null_string_p' et al.  */
         case jump_past_alt:


@@ -4125,7 +4125,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
 
         /* Have to succeed matching what follows at least n times.
            After that, handle like `on_failure_jump'.  */
 
         /* Have to succeed matching what follows at least n times.
            After that, handle like `on_failure_jump'.  */

-        case succeed_n: 
+        case succeed_n:

           EXTRACT_NUMBER (mcnt, p + 2);
           DEBUG_PRINT2 ("EXECUTING succeed_n %d.\n", mcnt);
 
           EXTRACT_NUMBER (mcnt, p + 2);
           DEBUG_PRINT2 ("EXECUTING succeed_n %d.\n", mcnt);
 


@@ -4146,8 +4146,8 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
               goto on_failure;
             }
           break;
               goto on_failure;
             }
           break;

-        
-        case jump_n: 
+
+        case jump_n:

           EXTRACT_NUMBER (mcnt, p + 2);
           DEBUG_PRINT2 ("EXECUTING jump_n %d.\n", mcnt);
 
           EXTRACT_NUMBER (mcnt, p + 2);
           DEBUG_PRINT2 ("EXECUTING jump_n %d.\n", mcnt);
 


@@ -4156,13 +4156,13 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
             {
                mcnt--;
                STORE_NUMBER (p + 2, mcnt);
             {
                mcnt--;
                STORE_NUMBER (p + 2, mcnt);

-              goto unconditional_jump;      
+              goto unconditional_jump;

             }
           /* If don't have to jump any more, skip over the rest of command.  */
             }
           /* If don't have to jump any more, skip over the rest of command.  */

-         else      
-           p += 4;                  
+         else
+           p += 4;

           break;
           break;

-        
+

        case set_number_at:
          {
             DEBUG_PRINT1 ("EXECUTING set_number_at.\n");
        case set_number_at:
          {
             DEBUG_PRINT1 ("EXECUTING set_number_at.\n");


@@ -4207,13 +4207,13 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
          if (PTR_CHAR_POS ((unsigned char *) d) >= point)
            goto fail;
          break;
          if (PTR_CHAR_POS ((unsigned char *) d) >= point)
            goto fail;
          break;

-  
+

        case at_dot:
           DEBUG_PRINT1 ("EXECUTING at_dot.\n");
          if (PTR_CHAR_POS ((unsigned char *) d) != point)
            goto fail;
          break;
        case at_dot:
           DEBUG_PRINT1 ("EXECUTING at_dot.\n");
          if (PTR_CHAR_POS ((unsigned char *) d) != point)
            goto fail;
          break;

-  
+

        case after_dot:
           DEBUG_PRINT1 ("EXECUTING after_dot.\n");
           if (PTR_CHAR_POS ((unsigned char *) d) <= point)
        case after_dot:
           DEBUG_PRINT1 ("EXECUTING after_dot.\n");
           if (PTR_CHAR_POS ((unsigned char *) d) <= point)


@@ -4266,7 +4266,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
          SET_REGS_MATCHED ();
           d++;
          break;
          SET_REGS_MATCHED ();
           d++;
          break;

-         
+

        case notwordchar:
           DEBUG_PRINT1 ("EXECUTING non-Emacs notwordchar.\n");
          PREFETCH ();
        case notwordchar:
           DEBUG_PRINT1 ("EXECUTING non-Emacs notwordchar.\n");
          PREFETCH ();


@@ -4276,7 +4276,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
           d++;
          break;
 #endif /* not emacs */
           d++;
          break;
 #endif /* not emacs */

-          
+

         default:
           abort ();
        }
         default:
           abort ();
        }


@@ -4301,7 +4301,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
           if (p < pend)
             {
               boolean is_a_jump_n = false;
           if (p < pend)
             {
               boolean is_a_jump_n = false;

-              
+

               /* If failed to a backwards jump that's part of a repetition
                  loop, need to pop this failure point and use the next one.  */
               switch ((re_opcode_t) *p)
               /* If failed to a backwards jump that's part of a repetition
                  loop, need to pop this failure point and use the next one.  */
               switch ((re_opcode_t) *p)


@@ -4313,7 +4313,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
                 case jump:
                   p1 = p + 1;
                   EXTRACT_NUMBER_AND_INCR (mcnt, p1);
                 case jump:
                   p1 = p + 1;
                   EXTRACT_NUMBER_AND_INCR (mcnt, p1);

-                  p1 += mcnt;  
+                  p1 += mcnt;

 
                   if ((is_a_jump_n && (re_opcode_t) *p1 == succeed_n)
                       || (!is_a_jump_n
 
                   if ((is_a_jump_n && (re_opcode_t) *p1 == succeed_n)
                       || (!is_a_jump_n


@@ -4344,10 +4344,10 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
 
 
 /* We are passed P pointing to a register number after a start_memory.
 
 
 /* We are passed P pointing to a register number after a start_memory.

-   
+

    Return true if the pattern up to the corresponding stop_memory can
    match the empty string, and false otherwise.
    Return true if the pattern up to the corresponding stop_memory can
    match the empty string, and false otherwise.

-   
+

    If we find the matching stop_memory, sets P to point to one past its number.
    Otherwise, sets P to an undefined byte less than or equal to END.
 
    If we find the matching stop_memory, sets P to point to one past its number.
    Otherwise, sets P to an undefined byte less than or equal to END.
 


@@ -4361,20 +4361,20 @@ group_match_null_string_p (p, end, reg_info)
   int mcnt;
   /* Point to after the args to the start_memory.  */
   unsigned char *p1 = *p + 2;
   int mcnt;
   /* Point to after the args to the start_memory.  */
   unsigned char *p1 = *p + 2;

-  
+

   while (p1 < end)
     {
       /* Skip over opcodes that can match nothing, and return true or
         false, as appropriate, when we get to one that can't, or to the
          matching stop_memory.  */
   while (p1 < end)
     {
       /* Skip over opcodes that can match nothing, and return true or
         false, as appropriate, when we get to one that can't, or to the
          matching stop_memory.  */

-      
+

       switch ((re_opcode_t) *p1)
         {
         /* Could be either a loop or a series of alternatives.  */
         case on_failure_jump:
           p1++;
           EXTRACT_NUMBER_AND_INCR (mcnt, p1);
       switch ((re_opcode_t) *p1)
         {
         /* Could be either a loop or a series of alternatives.  */
         case on_failure_jump:
           p1++;
           EXTRACT_NUMBER_AND_INCR (mcnt, p1);

-          
+

           /* If the next operation is not a jump backwards in the
             pattern.  */
 
           /* If the next operation is not a jump backwards in the
             pattern.  */
 


@@ -4388,7 +4388,7 @@ group_match_null_string_p (p, end, reg_info)
 
                  /on_failure_jump/0/6/exactn/1/a/jump_past_alt/0/6
                  /on_failure_jump/0/6/exactn/1/b/jump_past_alt/0/3
 
                  /on_failure_jump/0/6/exactn/1/a/jump_past_alt/0/6
                  /on_failure_jump/0/6/exactn/1/b/jump_past_alt/0/3

-                 /exactn/1/c                                           
+                 /exactn/1/c

 
                  So, we have to first go through the first (n-1)
                  alternatives and then deal with the last one separately.  */
 
                  So, we have to first go through the first (n-1)
                  alternatives and then deal with the last one separately.  */


@@ -4404,19 +4404,19 @@ group_match_null_string_p (p, end, reg_info)
                      is, including the ending `jump_past_alt' and
                      its number.  */
 
                      is, including the ending `jump_past_alt' and
                      its number.  */
 

-                  if (!alt_match_null_string_p (p1, p1 + mcnt - 3, 
+                  if (!alt_match_null_string_p (p1, p1 + mcnt - 3,

                                                      reg_info))
                     return false;
 
                   /* Move to right after this alternative, including the
                     jump_past_alt.  */
                                                      reg_info))
                     return false;
 
                   /* Move to right after this alternative, including the
                     jump_past_alt.  */

-                  p1 += mcnt;  
+                  p1 += mcnt;

 
                   /* Break if it's the beginning of an n-th alternative
                      that doesn't begin with an on_failure_jump.  */
                   if ((re_opcode_t) *p1 != on_failure_jump)
                     break;
 
                   /* Break if it's the beginning of an n-th alternative
                      that doesn't begin with an on_failure_jump.  */
                   if ((re_opcode_t) *p1 != on_failure_jump)
                     break;

-               
+

                  /* Still have to check that it's not an n-th
                     alternative that starts with an on_failure_jump.  */
                  p1++;
                  /* Still have to check that it's not an n-th
                     alternative that starts with an on_failure_jump.  */
                  p1++;


@@ -4441,14 +4441,14 @@ group_match_null_string_p (p, end, reg_info)
             } /* if mcnt > 0 */
           break;
 
             } /* if mcnt > 0 */
           break;
 

-          
+

         case stop_memory:
          assert (p1[1] == **p);
           *p = p1 + 2;
           return true;
 
         case stop_memory:
          assert (p1[1] == **p);
           *p = p1 + 2;
           return true;
 

-        
-        default: 
+
+        default:

           if (!common_op_match_null_string_p (&p1, end, reg_info))
             return false;
         }
           if (!common_op_match_null_string_p (&p1, end, reg_info))
             return false;
         }


@@ -4461,7 +4461,7 @@ group_match_null_string_p (p, end, reg_info)
 /* Similar to group_match_null_string_p, but doesn't deal with alternatives:
    It expects P to be the first byte of a single alternative and END one
    byte past the last. The alternative can contain groups.  */
 /* Similar to group_match_null_string_p, but doesn't deal with alternatives:
    It expects P to be the first byte of a single alternative and END one
    byte past the last. The alternative can contain groups.  */

-   
+

 static boolean
 alt_match_null_string_p (p, end, reg_info)
     unsigned char *p, *end;
 static boolean
 alt_match_null_string_p (p, end, reg_info)
     unsigned char *p, *end;


@@ -4469,12 +4469,12 @@ alt_match_null_string_p (p, end, reg_info)
 {
   int mcnt;
   unsigned char *p1 = p;
 {
   int mcnt;
   unsigned char *p1 = p;

-  
+

   while (p1 < end)
     {
   while (p1 < end)
     {

-      /* Skip over opcodes that can match nothing, and break when we get 
+      /* Skip over opcodes that can match nothing, and break when we get

          to one that can't.  */
          to one that can't.  */

-      
+

       switch ((re_opcode_t) *p1)
         {
        /* It's a loop.  */
       switch ((re_opcode_t) *p1)
         {
        /* It's a loop.  */


@@ -4483,8 +4483,8 @@ alt_match_null_string_p (p, end, reg_info)
           EXTRACT_NUMBER_AND_INCR (mcnt, p1);
           p1 += mcnt;
           break;
           EXTRACT_NUMBER_AND_INCR (mcnt, p1);
           p1 += mcnt;
           break;

-          
-       default: 
+
+       default:

           if (!common_op_match_null_string_p (&p1, end, reg_info))
             return false;
         }
           if (!common_op_match_null_string_p (&p1, end, reg_info))
             return false;
         }


@@ -4495,8 +4495,8 @@ alt_match_null_string_p (p, end, reg_info)
 
 
 /* Deals with the ops common to group_match_null_string_p and
 
 
 /* Deals with the ops common to group_match_null_string_p and

-   alt_match_null_string_p.  
-   
+   alt_match_null_string_p.
+

    Sets P to one after the op and its arguments, if any.  */
 
 static boolean
    Sets P to one after the op and its arguments, if any.  */
 
 static boolean


@@ -4531,7 +4531,7 @@ common_op_match_null_string_p (p, end, reg_info)
       reg_no = *p1;
       assert (reg_no > 0 && reg_no <= MAX_REGNUM);
       ret = group_match_null_string_p (&p1, end, reg_info);
       reg_no = *p1;
       assert (reg_no > 0 && reg_no <= MAX_REGNUM);
       ret = group_match_null_string_p (&p1, end, reg_info);

-      
+

       /* Have to set this here in case we're checking a group which
          contains a group and a back reference to it.  */
 
       /* Have to set this here in case we're checking a group which
          contains a group and a back reference to it.  */
 


@@ -4541,7 +4541,7 @@ common_op_match_null_string_p (p, end, reg_info)
       if (!ret)
         return false;
       break;
       if (!ret)
         return false;
       break;

-          
+

     /* If this is an optimized succeed_n for zero times, make the jump.  */
     case jump:
       EXTRACT_NUMBER_AND_INCR (mcnt, p1);
     /* If this is an optimized succeed_n for zero times, make the jump.  */
     case jump:
       EXTRACT_NUMBER_AND_INCR (mcnt, p1);


@@ -4553,7 +4553,7 @@ common_op_match_null_string_p (p, end, reg_info)
 
     case succeed_n:
       /* Get to the number of times to succeed.  */
 
     case succeed_n:
       /* Get to the number of times to succeed.  */

-      p1 += 2;         
+      p1 += 2;

       EXTRACT_NUMBER_AND_INCR (mcnt, p1);
 
       if (mcnt == 0)
       EXTRACT_NUMBER_AND_INCR (mcnt, p1);
 
       if (mcnt == 0)


@@ -4566,7 +4566,7 @@ common_op_match_null_string_p (p, end, reg_info)
         return false;
       break;
 
         return false;
       break;
 

-    case duplicate: 
+    case duplicate:

       if (!REG_MATCH_NULL_STRING_P (reg_info[*p1]))
         return false;
       break;
       if (!REG_MATCH_NULL_STRING_P (reg_info[*p1]))
         return false;
       break;


@@ -4586,7 +4586,7 @@ common_op_match_null_string_p (p, end, reg_info)
 
 /* Return zero if TRANSLATE[S1] and TRANSLATE[S2] are identical for LEN
    bytes; nonzero otherwise.  */
 
 /* Return zero if TRANSLATE[S1] and TRANSLATE[S2] are identical for LEN
    bytes; nonzero otherwise.  */

-   
+

 static int
 bcmp_translate (s1, s2, len, translate)
      unsigned char *s1, *s2;
 static int
 bcmp_translate (s1, s2, len, translate)
      unsigned char *s1, *s2;


@@ -4607,10 +4607,10 @@ bcmp_translate (s1, s2, len, translate)
 /* re_compile_pattern is the GNU regular expression compiler: it
    compiles PATTERN (of length SIZE) and puts the result in BUFP.
    Returns 0 if the pattern was valid, otherwise an error string.
 /* re_compile_pattern is the GNU regular expression compiler: it
    compiles PATTERN (of length SIZE) and puts the result in BUFP.
    Returns 0 if the pattern was valid, otherwise an error string.

-   
+

    Assumes the `allocated' (and perhaps `buffer') and `translate' fields
    are set in BUFP on entry.
    Assumes the `allocated' (and perhaps `buffer') and `translate' fields
    are set in BUFP on entry.

-   
+

    We call regex_compile to do the actual compilation.  */
 
 const char *
    We call regex_compile to do the actual compilation.  */
 
 const char *


@@ -4620,23 +4620,23 @@ re_compile_pattern (pattern, length, bufp)
      struct re_pattern_buffer *bufp;
 {
   reg_errcode_t ret;
      struct re_pattern_buffer *bufp;
 {
   reg_errcode_t ret;

-  
+

   /* GNU code is written to assume at least RE_NREGS registers will be set
      (and at least one extra will be -1).  */
   bufp->regs_allocated = REGS_UNALLOCATED;
   /* GNU code is written to assume at least RE_NREGS registers will be set
      (and at least one extra will be -1).  */
   bufp->regs_allocated = REGS_UNALLOCATED;

-  
+

   /* And GNU code determines whether or not to get register information
      by passing null for the REGS argument to re_match, etc., not by
      setting no_sub.  */
   bufp->no_sub = 0;
   /* And GNU code determines whether or not to get register information
      by passing null for the REGS argument to re_match, etc., not by
      setting no_sub.  */
   bufp->no_sub = 0;

-  
+

   /* Match anchors at newline.  */
   bufp->newline_anchor = 1;
   /* Match anchors at newline.  */
   bufp->newline_anchor = 1;

-  
+

   ret = regex_compile (pattern, length, re_syntax_options, bufp);
 
   return re_error_msg[(int) ret];
   ret = regex_compile (pattern, length, re_syntax_options, bufp);
 
   return re_error_msg[(int) ret];

-}     
+}

 \f
 /* Entry points compatible with 4.2 BSD regex library.  We don't define
    them if this is an Emacs or POSIX compilation.  */
 \f
 /* Entry points compatible with 4.2 BSD regex library.  We don't define
    them if this is an Emacs or POSIX compilation.  */


@@ -4651,7 +4651,7 @@ re_comp (s)
     const char *s;
 {
   reg_errcode_t ret;
     const char *s;
 {
   reg_errcode_t ret;

-  
+

   if (!s)
     {
       if (!re_comp_buf.buffer)
   if (!s)
     {
       if (!re_comp_buf.buffer)


@@ -4678,7 +4678,7 @@ re_comp (s)
   re_comp_buf.newline_anchor = 1;
 
   ret = regex_compile (s, strlen (s), re_syntax_options, &re_comp_buf);
   re_comp_buf.newline_anchor = 1;
 
   ret = regex_compile (s, strlen (s), re_syntax_options, &re_comp_buf);

-  
+

   /* Yes, we're discarding `const' here.  */
   return (char *) re_error_msg[(int) ret];
 }
   /* Yes, we're discarding `const' here.  */
   return (char *) re_error_msg[(int) ret];
 }


@@ -4735,7 +4735,7 @@ re_exec (s)
 int
 regcomp (preg, pattern, cflags)
     regex_t *preg;
 int
 regcomp (preg, pattern, cflags)
     regex_t *preg;

-    const char *pattern; 
+    const char *pattern;

     int cflags;
 {
   reg_errcode_t ret;
     int cflags;
 {
   reg_errcode_t ret;


@@ -4746,17 +4746,17 @@ regcomp (preg, pattern, cflags)
   /* regex_compile will allocate the space for the compiled pattern.  */
   preg->buffer = 0;
   preg->allocated = 0;
   /* regex_compile will allocate the space for the compiled pattern.  */
   preg->buffer = 0;
   preg->allocated = 0;

-  
+

   /* Don't bother to use a fastmap when searching.  This simplifies the
      REG_NEWLINE case: if we used a fastmap, we'd have to put all the
      characters after newlines into the fastmap.  This way, we just try
      every character.  */
   preg->fastmap = 0;
   /* Don't bother to use a fastmap when searching.  This simplifies the
      REG_NEWLINE case: if we used a fastmap, we'd have to put all the
      characters after newlines into the fastmap.  This way, we just try
      every character.  */
   preg->fastmap = 0;

-  
+

   if (cflags & REG_ICASE)
     {
       unsigned i;
   if (cflags & REG_ICASE)
     {
       unsigned i;

-      
+

       preg->translate = (char *) malloc (CHAR_SET_SIZE);
       if (preg->translate == NULL)
         return (int) REG_ESPACE;
       preg->translate = (char *) malloc (CHAR_SET_SIZE);
       if (preg->translate == NULL)
         return (int) REG_ESPACE;


@@ -4781,38 +4781,38 @@ regcomp (preg, pattern, cflags)
 
   preg->no_sub = !!(cflags & REG_NOSUB);
 
 
   preg->no_sub = !!(cflags & REG_NOSUB);
 

-  /* POSIX says a null character in the pattern terminates it, so we 
+  /* POSIX says a null character in the pattern terminates it, so we

      can use strlen here in compiling the pattern.  */
   ret = regex_compile (pattern, strlen (pattern), syntax, preg);
      can use strlen here in compiling the pattern.  */
   ret = regex_compile (pattern, strlen (pattern), syntax, preg);

-  
+

   /* POSIX doesn't distinguish between an unmatched open-group and an
      unmatched close-group: both are REG_EPAREN.  */
   if (ret == REG_ERPAREN) ret = REG_EPAREN;
   /* POSIX doesn't distinguish between an unmatched open-group and an
      unmatched close-group: both are REG_EPAREN.  */
   if (ret == REG_ERPAREN) ret = REG_EPAREN;

-  
+

   return (int) ret;
 }
 
 
 /* regexec searches for a given pattern, specified by PREG, in the
    string STRING.
   return (int) ret;
 }
 
 
 /* regexec searches for a given pattern, specified by PREG, in the
    string STRING.

-   
+

    If NMATCH is zero or REG_NOSUB was set in the cflags argument to
    `regcomp', we ignore PMATCH.  Otherwise, we assume PMATCH has at
    least NMATCH elements, and we set them to the offsets of the
    corresponding matched substrings.
    If NMATCH is zero or REG_NOSUB was set in the cflags argument to
    `regcomp', we ignore PMATCH.  Otherwise, we assume PMATCH has at
    least NMATCH elements, and we set them to the offsets of the
    corresponding matched substrings.

-   
+

    EFLAGS specifies `execution flags' which affect matching: if
    REG_NOTBOL is set, then ^ does not match at the beginning of the
    string; if REG_NOTEOL is set, then $ does not match at the end.
    EFLAGS specifies `execution flags' which affect matching: if
    REG_NOTBOL is set, then ^ does not match at the beginning of the
    string; if REG_NOTEOL is set, then $ does not match at the end.

-   
+

    We return 0 if we find a match and REG_NOMATCH if not.  */
 
 int
 regexec (preg, string, nmatch, pmatch, eflags)
     const regex_t *preg;
    We return 0 if we find a match and REG_NOMATCH if not.  */
 
 int
 regexec (preg, string, nmatch, pmatch, eflags)
     const regex_t *preg;

-    const char *string; 
-    size_t nmatch; 
-    regmatch_t pmatch[]; 
+    const char *string;
+    size_t nmatch;
+    regmatch_t pmatch[];

     int eflags;
 {
   int ret;
     int eflags;
 {
   int ret;


@@ -4822,15 +4822,15 @@ regexec (preg, string, nmatch, pmatch, eflags)
   boolean want_reg_info = !preg->no_sub && nmatch > 0;
 
   private_preg = *preg;
   boolean want_reg_info = !preg->no_sub && nmatch > 0;
 
   private_preg = *preg;

-  
+

   private_preg.not_bol = !!(eflags & REG_NOTBOL);
   private_preg.not_eol = !!(eflags & REG_NOTEOL);
   private_preg.not_bol = !!(eflags & REG_NOTBOL);
   private_preg.not_eol = !!(eflags & REG_NOTEOL);

-  
+

   /* The user has told us exactly how many registers to return
      information about, via `nmatch'.  We have to pass that on to the
      matching routines.  */
   private_preg.regs_allocated = REGS_FIXED;
   /* The user has told us exactly how many registers to return
      information about, via `nmatch'.  We have to pass that on to the
      matching routines.  */
   private_preg.regs_allocated = REGS_FIXED;

-  
+

   if (want_reg_info)
     {
       regs.num_regs = nmatch;
   if (want_reg_info)
     {
       regs.num_regs = nmatch;


@@ -4844,7 +4844,7 @@ regexec (preg, string, nmatch, pmatch, eflags)
   ret = re_search (&private_preg, string, len,
                    /* start: */ 0, /* range: */ len,
                    want_reg_info ? &regs : (struct re_registers *) 0);
   ret = re_search (&private_preg, string, len,
                    /* start: */ 0, /* range: */ len,
                    want_reg_info ? &regs : (struct re_registers *) 0);

-  
+

   /* Copy the register information to the POSIX structure.  */
   if (want_reg_info)
     {
   /* Copy the register information to the POSIX structure.  */
   if (want_reg_info)
     {


@@ -4884,7 +4884,7 @@ regerror (errcode, preg, errbuf, errbuf_size)
 
   if (errcode < 0
       || errcode >= (sizeof (re_error_msg) / sizeof (re_error_msg[0])))
 
   if (errcode < 0
       || errcode >= (sizeof (re_error_msg) / sizeof (re_error_msg[0])))

-    /* Only error codes returned by the rest of the code should be passed 
+    /* Only error codes returned by the rest of the code should be passed

        to this routine.  If we are given anything else, or if other regex
        code generates an invalid error code, then the program has a bug.
        Dump core so we can fix it.  */
        to this routine.  If we are given anything else, or if other regex
        code generates an invalid error code, then the program has a bug.
        Dump core so we can fix it.  */


@@ -4898,7 +4898,7 @@ regerror (errcode, preg, errbuf, errbuf_size)
     msg = "Success";
 
   msg_size = strlen (msg) + 1; /* Includes the null.  */
     msg = "Success";
 
   msg_size = strlen (msg) + 1; /* Includes the null.  */

-  
+

   if (errbuf_size != 0)
     {
       if (msg_size > errbuf_size)
   if (errbuf_size != 0)
     {
       if (msg_size > errbuf_size)


@@ -4923,7 +4923,7 @@ regfree (preg)
   if (preg->buffer != NULL)
     free (preg->buffer);
   preg->buffer = NULL;
   if (preg->buffer != NULL)
     free (preg->buffer);
   preg->buffer = NULL;

-  
+

   preg->allocated = 0;
   preg->used = 0;
 
   preg->allocated = 0;
   preg->used = 0;
 

diff --git a/payloads/libpayload/util/kconfig/regex.h b/payloads/libpayload/util/kconfig/regex.h
index 408dd210348f0fdbea5b19115130107daf496f19..91243971af0196cf854beec0d0b140487a76dd6d 100644 (file)
--- a/payloads/libpayload/util/kconfig/regex.h
+++ b/payloads/libpayload/util/kconfig/regex.h
@@ -42,7 +42,7 @@ typedef unsigned reg_syntax_t;
 #define RE_BACKSLASH_ESCAPE_IN_LISTS (1)
 
 /* If this bit is not set, then + and ? are operators, and \+ and \? are
 #define RE_BACKSLASH_ESCAPE_IN_LISTS (1)
 
 /* If this bit is not set, then + and ? are operators, and \+ and \? are

-     literals. 
+     literals.

    If set, then \+ and \? are operators and + and ? are literals.  */
 #define RE_BK_PLUS_QM (RE_BACKSLASH_ESCAPE_IN_LISTS << 1)
 
    If set, then \+ and \? are operators and + and ? are literals.  */
 #define RE_BK_PLUS_QM (RE_BACKSLASH_ESCAPE_IN_LISTS << 1)
 


@@ -58,7 +58,7 @@ typedef unsigned reg_syntax_t;
         ^  is an anchor if it is at the beginning of a regular
            expression or after an open-group or an alternation operator;
         $  is an anchor if it is at the end of a regular expression, or
         ^  is an anchor if it is at the beginning of a regular
            expression or after an open-group or an alternation operator;
         $  is an anchor if it is at the end of a regular expression, or

-           before a close-group or an alternation operator.  
+           before a close-group or an alternation operator.

 
    This bit could be (re)combined with RE_CONTEXT_INDEP_OPS, because
    POSIX draft 11.2 says that * etc. in leading positions is undefined.
 
    This bit could be (re)combined with RE_CONTEXT_INDEP_OPS, because
    POSIX draft 11.2 says that * etc. in leading positions is undefined.


@@ -69,7 +69,7 @@ typedef unsigned reg_syntax_t;
 /* If this bit is set, then special characters are always special
      regardless of where they are in the pattern.
    If this bit is not set, then special characters are special only in
 /* If this bit is set, then special characters are always special
      regardless of where they are in the pattern.
    If this bit is not set, then special characters are special only in

-     some contexts; otherwise they are ordinary.  Specifically, 
+     some contexts; otherwise they are ordinary.  Specifically,

      * + ? and intervals are only special when not after the beginning,
      open-group, or alternation operator.  */
 #define RE_CONTEXT_INDEP_OPS (RE_CONTEXT_INDEP_ANCHORS << 1)
      * + ? and intervals are only special when not after the beginning,
      open-group, or alternation operator.  */
 #define RE_CONTEXT_INDEP_OPS (RE_CONTEXT_INDEP_ANCHORS << 1)


@@ -91,7 +91,7 @@ typedef unsigned reg_syntax_t;
 #define RE_HAT_LISTS_NOT_NEWLINE (RE_DOT_NOT_NULL << 1)
 
 /* If this bit is set, either \{...\} or {...} defines an
 #define RE_HAT_LISTS_NOT_NEWLINE (RE_DOT_NOT_NULL << 1)
 
 /* If this bit is set, either \{...\} or {...} defines an

-     interval, depending on RE_NO_BK_BRACES. 
+     interval, depending on RE_NO_BK_BRACES.

    If not set, \{, \}, {, and } are literals.  */
 #define RE_INTERVALS (RE_HAT_LISTS_NOT_NEWLINE << 1)
 
    If not set, \{, \}, {, and } are literals.  */
 #define RE_INTERVALS (RE_HAT_LISTS_NOT_NEWLINE << 1)
 


@@ -116,7 +116,7 @@ typedef unsigned reg_syntax_t;
    If not set, then \<digit> is a back-reference.  */
 #define RE_NO_BK_REFS (RE_NO_BK_PARENS << 1)
 
    If not set, then \<digit> is a back-reference.  */
 #define RE_NO_BK_REFS (RE_NO_BK_PARENS << 1)
 

-/* If this bit is set, then | is an alternation operator, and \| is literal. 
+/* If this bit is set, then | is an alternation operator, and \| is literal.

    If not set, then \| is an alternation operator, and | is literal.  */
 #define RE_NO_BK_VBAR (RE_NO_BK_REFS << 1)
 
    If not set, then \| is an alternation operator, and | is literal.  */
 #define RE_NO_BK_VBAR (RE_NO_BK_REFS << 1)
 


@@ -138,7 +138,7 @@ extern reg_syntax_t re_syntax_options;
 \f
 /* Define combinations of the above bits for the standard possibilities.
    (The [[[ comments delimit what gets put into the Texinfo file, so
 \f
 /* Define combinations of the above bits for the standard possibilities.
    (The [[[ comments delimit what gets put into the Texinfo file, so

-   don't delete them!)  */ 
+   don't delete them!)  */

 /* [[[begin syntaxes]]] */
 #define RE_SYNTAX_EMACS 0
 
 /* [[[begin syntaxes]]] */
 #define RE_SYNTAX_EMACS 0
 


@@ -205,7 +205,7 @@ extern reg_syntax_t re_syntax_options;
 #ifdef RE_DUP_MAX
 #undef RE_DUP_MAX
 #endif
 #ifdef RE_DUP_MAX
 #undef RE_DUP_MAX
 #endif

-#define RE_DUP_MAX ((1 << 15) - 1) 
+#define RE_DUP_MAX ((1 << 15) - 1)

 
 
 /* POSIX `cflags' bits (i.e., information for `regcomp').  */
 
 
 /* POSIX `cflags' bits (i.e., information for `regcomp').  */


@@ -217,7 +217,7 @@ extern reg_syntax_t re_syntax_options;
 /* If this bit is set, then ignore case when matching.
    If not set, then case is significant.  */
 #define REG_ICASE (REG_EXTENDED << 1)
 /* If this bit is set, then ignore case when matching.
    If not set, then case is significant.  */
 #define REG_ICASE (REG_EXTENDED << 1)

- 
+

 /* If this bit is set, then anchors do not match at newline
      characters in the string.
    If not set, then anchors do match at newlines.  */
 /* If this bit is set, then anchors do not match at newline
      characters in the string.
    If not set, then anchors do match at newlines.  */


@@ -256,7 +256,7 @@ typedef enum
   REG_EESCAPE,         /* Trailing backslash.  */
   REG_ESUBREG,         /* Invalid back reference.  */
   REG_EBRACK,          /* Unmatched left bracket.  */
   REG_EESCAPE,         /* Trailing backslash.  */
   REG_ESUBREG,         /* Invalid back reference.  */
   REG_EBRACK,          /* Unmatched left bracket.  */

-  REG_EPAREN,          /* Parenthesis imbalance.  */ 
+  REG_EPAREN,          /* Parenthesis imbalance.  */

   REG_EBRACE,          /* Unmatched \{.  */
   REG_BADBR,           /* Invalid contents of \{\}.  */
   REG_ERANGE,          /* Invalid range end.  */
   REG_EBRACE,          /* Unmatched \{.  */
   REG_BADBR,           /* Invalid contents of \{\}.  */
   REG_ERANGE,          /* Invalid range end.  */


@@ -287,7 +287,7 @@ struct re_pattern_buffer
   unsigned long allocated;
 
        /* Number of bytes actually used in `buffer'.  */
   unsigned long allocated;
 
        /* Number of bytes actually used in `buffer'.  */

-  unsigned long used;  
+  unsigned long used;

 
         /* Syntax setting with which the pattern was compiled.  */
   reg_syntax_t syntax;
 
         /* Syntax setting with which the pattern was compiled.  */
   reg_syntax_t syntax;


@@ -331,7 +331,7 @@ struct re_pattern_buffer
   unsigned no_sub : 1;
 
         /* If set, a beginning-of-line anchor doesn't match at the
   unsigned no_sub : 1;
 
         /* If set, a beginning-of-line anchor doesn't match at the

-           beginning of the string.  */ 
+           beginning of the string.  */

   unsigned not_bol : 1;
 
         /* Similarly for an end-of-line anchor.  */
   unsigned not_bol : 1;
 
         /* Similarly for an end-of-line anchor.  */


@@ -443,7 +443,7 @@ extern int re_match
 
 
 /* Relates to `re_match' as `re_search_2' relates to `re_search'.  */
 
 
 /* Relates to `re_match' as `re_search_2' relates to `re_search'.  */

-extern int re_match_2 
+extern int re_match_2

   _RE_ARGS ((struct re_pattern_buffer *buffer, const char *string1,
              int length1, const char *string2, int length2,
              int start, struct re_registers *regs, int stop));
   _RE_ARGS ((struct re_pattern_buffer *buffer, const char *string1,
              int length1, const char *string2, int length2,
              int start, struct re_registers *regs, int stop));

diff --git a/payloads/libpayload/util/kconfig/zconf.tab.c_shipped b/payloads/libpayload/util/kconfig/zconf.tab.c_shipped
index fa47f37133155be452f816ce006ff52b20712bcf..5868fb8f78896630e8141061d25294cbdec00e9a 100644 (file)
--- a/payloads/libpayload/util/kconfig/zconf.tab.c_shipped
+++ b/payloads/libpayload/util/kconfig/zconf.tab.c_shipped
@@ -1393,7 +1393,7 @@ yyparse ()
 #endif
 #endif
 {
 #endif
 #endif
 {

-  
+

   int yystate;
   int yyn;
   int yyresult;
   int yystate;
   int yyn;
   int yyresult;

diff --git a/src/Kconfig b/src/Kconfig
index 026e99da78a14eb2e7cea15cf6c265071bb9931d..67ac5753a7f765ee55e801684879ced9372a198b 100644 (file)
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -454,8 +454,8 @@ config FALLBACK_BOOTSPLASH_FILE
        depends on BOOTSPLASH
        default "bootsplash.jpg"
        help
        depends on BOOTSPLASH
        default "bootsplash.jpg"
        help

-         The path and filename of the file to use as graphical bootsplash 
-         screen. The file format has to be jpg. 
+         The path and filename of the file to use as graphical bootsplash
+         screen. The file format has to be jpg.

 
 # TODO: Turn this into a "choice".
 config FRAMEBUFFER_VESA_MODE
 
 # TODO: Turn this into a "choice".
 config FRAMEBUFFER_VESA_MODE


@@ -568,7 +568,7 @@ config X86EMU_DEBUG_TRACE
        depends on X86EMU_DEBUG
        help
          Print _all_ opcodes that are executed by x86emu.
        depends on X86EMU_DEBUG
        help
          Print _all_ opcodes that are executed by x86emu.

-         
+

          WARNING: This will produce a LOT of output and take a long time.
 
          Note: This option will increase the size of the coreboot image.
          WARNING: This will produce a LOT of output and take a long time.
 
          Note: This option will increase the size of the coreboot image.

diff --git a/src/arch/i386/boot/acpi.c b/src/arch/i386/boot/acpi.c
index 9bab92831f5f248302e49994480445e97a004040..e5169eaf43306d43cfab6c9268401cfd42349f10 100644 (file)
--- a/src/arch/i386/boot/acpi.c
+++ b/src/arch/i386/boot/acpi.c
@@ -7,7 +7,7 @@
  * Copyright (C) 2004 SUSE LINUX AG
  * Copyright (C) 2005-2009 coresystems GmbH
  *
  * Copyright (C) 2004 SUSE LINUX AG
  * Copyright (C) 2005-2009 coresystems GmbH
  *

- * ACPI FADT, FACS, and DSDT table support added by 
+ * ACPI FADT, FACS, and DSDT table support added by

  * Nick Barker <nick.barker9@btinternet.com>, and those portions
  * Copyright (C) 2004 Nick Barker
  *
  * Nick Barker <nick.barker9@btinternet.com>, and those portions
  * Copyright (C) 2004 Nick Barker
  *


@@ -15,12 +15,12 @@
  * 2005.9 yhlu add SRAT table generation
  */
 
  * 2005.9 yhlu add SRAT table generation
  */
 

-/* 
+/*

  * Each system port implementing ACPI has to provide two functions:
  * Each system port implementing ACPI has to provide two functions:

- * 
+ *

  *   write_acpi_tables()
  *   acpi_dump_apics()
  *   write_acpi_tables()
  *   acpi_dump_apics()

- *   
+ *

  * See Kontron 986LCD-M port for a good example of an ACPI implementation
  * in coreboot.
  */
  * See Kontron 986LCD-M port for a good example of an ACPI implementation
  * in coreboot.
  */


@@ -59,10 +59,10 @@ void acpi_add_table(acpi_rsdp_t *rsdp, void *table)
        if (rsdp->xsdt_address) {
                xsdt = (acpi_xsdt_t *)((u32)rsdp->xsdt_address);
        }
        if (rsdp->xsdt_address) {
                xsdt = (acpi_xsdt_t *)((u32)rsdp->xsdt_address);
        }

-       
+

        /* This should always be MAX_ACPI_TABLES */
        entries_num = ARRAY_SIZE(rsdt->entry);
        /* This should always be MAX_ACPI_TABLES */
        entries_num = ARRAY_SIZE(rsdt->entry);

-       
+

        for (i = 0; i < entries_num; i++) {
                if(rsdt->entry[i] == 0)
                        break;
        for (i = 0; i < entries_num; i++) {
                if(rsdt->entry[i] == 0)
                        break;


@@ -120,10 +120,10 @@ int acpi_create_madt_lapic(acpi_madt_lapic_t *lapic, u8 cpu, u8 apic)
        lapic->type=0;
        lapic->length=sizeof(acpi_madt_lapic_t);
        lapic->flags=1;
        lapic->type=0;
        lapic->length=sizeof(acpi_madt_lapic_t);
        lapic->flags=1;

-       
+

        lapic->processor_id=cpu;
        lapic->apic_id=apic;
        lapic->processor_id=cpu;
        lapic->apic_id=apic;

-       
+

        return(lapic->length);
 }
 
        return(lapic->length);
 }
 


@@ -146,16 +146,16 @@ unsigned long acpi_create_madt_lapics(unsigned long current)
        return current;
 }
 
        return current;
 }
 

-int acpi_create_madt_ioapic(acpi_madt_ioapic_t *ioapic, u8 id, u32 addr,u32 gsi_base) 
+int acpi_create_madt_ioapic(acpi_madt_ioapic_t *ioapic, u8 id, u32 addr,u32 gsi_base)

 {
        ioapic->type=1;
        ioapic->length=sizeof(acpi_madt_ioapic_t);
        ioapic->reserved=0x00;
        ioapic->gsi_base=gsi_base;
 {
        ioapic->type=1;
        ioapic->length=sizeof(acpi_madt_ioapic_t);
        ioapic->reserved=0x00;
        ioapic->gsi_base=gsi_base;

-       
+

        ioapic->ioapic_id=id;
        ioapic->ioapic_addr=addr;
        ioapic->ioapic_id=id;
        ioapic->ioapic_addr=addr;

-       
+

        return(ioapic->length);
 }
 
        return(ioapic->length);
 }
 


@@ -168,7 +168,7 @@ int acpi_create_madt_irqoverride(acpi_madt_irqoverride_t *irqoverride,
        irqoverride->source=source;
        irqoverride->gsirq=gsirq;
        irqoverride->flags=flags;
        irqoverride->source=source;
        irqoverride->gsirq=gsirq;
        irqoverride->flags=flags;

-       
+

        return(irqoverride->length);
 }
 
        return(irqoverride->length);
 }
 


@@ -177,29 +177,29 @@ int acpi_create_madt_lapic_nmi(acpi_madt_lapic_nmi_t *lapic_nmi, u8 cpu,
 {
        lapic_nmi->type=4;
        lapic_nmi->length=sizeof(acpi_madt_lapic_nmi_t);
 {
        lapic_nmi->type=4;
        lapic_nmi->length=sizeof(acpi_madt_lapic_nmi_t);

-       
+

        lapic_nmi->flags=flags;
        lapic_nmi->processor_id=cpu;
        lapic_nmi->lint=lint;
        lapic_nmi->flags=flags;
        lapic_nmi->processor_id=cpu;
        lapic_nmi->lint=lint;

-       
+

        return(lapic_nmi->length);
 }
 
 void acpi_create_madt(acpi_madt_t *madt)
 {
 #define LOCAL_APIC_ADDR        0xfee00000ULL
        return(lapic_nmi->length);
 }
 
 void acpi_create_madt(acpi_madt_t *madt)
 {
 #define LOCAL_APIC_ADDR        0xfee00000ULL

-       
+

        acpi_header_t *header=&(madt->header);
        unsigned long current=(unsigned long)madt+sizeof(acpi_madt_t);
        acpi_header_t *header=&(madt->header);
        unsigned long current=(unsigned long)madt+sizeof(acpi_madt_t);

-       
+

        memset((void *)madt, 0, sizeof(acpi_madt_t));
        memset((void *)madt, 0, sizeof(acpi_madt_t));

-       
+

        /* fill out header fields */
        memcpy(header->signature, "APIC", 4);
        memcpy(header->oem_id, OEM_ID, 6);
        memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
        memcpy(header->asl_compiler_id, ASLC, 4);
        /* fill out header fields */
        memcpy(header->signature, "APIC", 4);
        memcpy(header->oem_id, OEM_ID, 6);
        memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
        memcpy(header->asl_compiler_id, ASLC, 4);

-       
+

        header->length = sizeof(acpi_madt_t);
        header->revision = 1;
 
        header->length = sizeof(acpi_madt_t);
        header->revision = 1;
 


@@ -207,10 +207,10 @@ void acpi_create_madt(acpi_madt_t *madt)
        madt->flags     = 0x1; /* PCAT_COMPAT */
 
        current = acpi_fill_madt(current);
        madt->flags     = 0x1; /* PCAT_COMPAT */
 
        current = acpi_fill_madt(current);

-       
+

        /* recalculate length */
        header->length= current - (unsigned long)madt;
        /* recalculate length */
        header->length= current - (unsigned long)madt;

-       
+

        header->checksum        = acpi_checksum((void *)madt, header->length);
 }
 
        header->checksum        = acpi_checksum((void *)madt, header->length);
 }
 


@@ -219,23 +219,23 @@ void acpi_create_mcfg(acpi_mcfg_t *mcfg)
 
        acpi_header_t *header=&(mcfg->header);
        unsigned long current=(unsigned long)mcfg+sizeof(acpi_mcfg_t);
 
        acpi_header_t *header=&(mcfg->header);
        unsigned long current=(unsigned long)mcfg+sizeof(acpi_mcfg_t);

-       
+

        memset((void *)mcfg, 0, sizeof(acpi_mcfg_t));
        memset((void *)mcfg, 0, sizeof(acpi_mcfg_t));

-       
+

        /* fill out header fields */
        memcpy(header->signature, "MCFG", 4);
        memcpy(header->oem_id, OEM_ID, 6);
        memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
        memcpy(header->asl_compiler_id, ASLC, 4);
        /* fill out header fields */
        memcpy(header->signature, "MCFG", 4);
        memcpy(header->oem_id, OEM_ID, 6);
        memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
        memcpy(header->asl_compiler_id, ASLC, 4);

-       
+

        header->length = sizeof(acpi_mcfg_t);
        header->revision = 1;
 
        current = acpi_fill_mcfg(current);
        header->length = sizeof(acpi_mcfg_t);
        header->revision = 1;
 
        current = acpi_fill_mcfg(current);

-       
+

        /* recalculate length */
        header->length= current - (unsigned long)mcfg;
        /* recalculate length */
        header->length= current - (unsigned long)mcfg;

-       
+

        header->checksum        = acpi_checksum((void *)mcfg, header->length);
 }
 
        header->checksum        = acpi_checksum((void *)mcfg, header->length);
 }
 


@@ -294,7 +294,7 @@ int acpi_create_srat_mem(acpi_srat_mem_t *mem, u8 node, u32 basek,u32 sizek, u32
 
         mem->proximity_domain = node;
 
 
         mem->proximity_domain = node;
 

-       mem->flags = flags; 
+       mem->flags = flags;

 
         return(mem->length);
 }
 
         return(mem->length);
 }


@@ -356,15 +356,15 @@ void acpi_create_hpet(acpi_hpet_t *hpet)
 #define HPET_ADDR  0xfed00000ULL
        acpi_header_t *header=&(hpet->header);
        acpi_addr_t *addr=&(hpet->addr);
 #define HPET_ADDR  0xfed00000ULL
        acpi_header_t *header=&(hpet->header);
        acpi_addr_t *addr=&(hpet->addr);

-       
+

        memset((void *)hpet, 0, sizeof(acpi_hpet_t));
        memset((void *)hpet, 0, sizeof(acpi_hpet_t));

-       
+

        /* fill out header fields */
        memcpy(header->signature, "HPET", 4);
        memcpy(header->oem_id, OEM_ID, 6);
        memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
        memcpy(header->asl_compiler_id, ASLC, 4);
        /* fill out header fields */
        memcpy(header->signature, "HPET", 4);
        memcpy(header->oem_id, OEM_ID, 6);
        memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
        memcpy(header->asl_compiler_id, ASLC, 4);

-       
+

        header->length = sizeof(acpi_hpet_t);
        header->revision = 1;
 
        header->length = sizeof(acpi_hpet_t);
        header->revision = 1;
 


@@ -378,12 +378,12 @@ void acpi_create_hpet(acpi_hpet_t *hpet)
        hpet->id        = 0x102282a0; /* AMD ? */
        hpet->number    = 0;
        hpet->min_tick  = 4096;
        hpet->id        = 0x102282a0; /* AMD ? */
        hpet->number    = 0;
        hpet->min_tick  = 4096;

-       
+

        header->checksum        = acpi_checksum((void *)hpet, sizeof(acpi_hpet_t));
 }
 void acpi_create_facs(acpi_facs_t *facs)
 {
        header->checksum        = acpi_checksum((void *)hpet, sizeof(acpi_hpet_t));
 }
 void acpi_create_facs(acpi_facs_t *facs)
 {

-       
+

        memset( (void *)facs,0, sizeof(acpi_facs_t));
 
        memcpy(facs->signature, "FACS", 4);
        memset( (void *)facs,0, sizeof(acpi_facs_t));
 
        memcpy(facs->signature, "FACS", 4);


@@ -398,46 +398,46 @@ void acpi_create_facs(acpi_facs_t *facs)
 }
 
 void acpi_write_rsdt(acpi_rsdt_t *rsdt)
 }
 
 void acpi_write_rsdt(acpi_rsdt_t *rsdt)

-{ 
+{

        acpi_header_t *header=&(rsdt->header);
        acpi_header_t *header=&(rsdt->header);

-       
+

        /* fill out header fields */
        memcpy(header->signature, "RSDT", 4);
        memcpy(header->oem_id, OEM_ID, 6);
        memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
        memcpy(header->asl_compiler_id, ASLC, 4);
        /* fill out header fields */
        memcpy(header->signature, "RSDT", 4);
        memcpy(header->oem_id, OEM_ID, 6);
        memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
        memcpy(header->asl_compiler_id, ASLC, 4);

-       
+

        header->length = sizeof(acpi_rsdt_t);
        header->revision = 1;
        header->length = sizeof(acpi_rsdt_t);
        header->revision = 1;

-       
+

        /* fill out entries */
 
        // entries are filled in later, we come with an empty set.
        /* fill out entries */
 
        // entries are filled in later, we come with an empty set.

-       
+

        /* fix checksum */
        /* fix checksum */

-       
+

        header->checksum = acpi_checksum((void *)rsdt, sizeof(acpi_rsdt_t));
 }
 
 void acpi_write_xsdt(acpi_xsdt_t *xsdt)
        header->checksum = acpi_checksum((void *)rsdt, sizeof(acpi_rsdt_t));
 }
 
 void acpi_write_xsdt(acpi_xsdt_t *xsdt)

-{ 
+{

        acpi_header_t *header=&(xsdt->header);
        acpi_header_t *header=&(xsdt->header);

-       
+

        /* fill out header fields */
        memcpy(header->signature, "XSDT", 4);
        memcpy(header->oem_id, OEM_ID, 6);
        memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
        memcpy(header->asl_compiler_id, ASLC, 4);
        /* fill out header fields */
        memcpy(header->signature, "XSDT", 4);
        memcpy(header->oem_id, OEM_ID, 6);
        memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
        memcpy(header->asl_compiler_id, ASLC, 4);

-       
+

        header->length = sizeof(acpi_xsdt_t);
        header->revision = 1;
        header->length = sizeof(acpi_xsdt_t);
        header->revision = 1;

-       
+

        /* fill out entries */
 
        // entries are filled in later, we come with an empty set.
        /* fill out entries */
 
        // entries are filled in later, we come with an empty set.

-       
+

        /* fix checksum */
        /* fix checksum */

-       
+

        header->checksum = acpi_checksum((void *)xsdt, sizeof(acpi_xsdt_t));
 }
 
        header->checksum = acpi_checksum((void *)xsdt, sizeof(acpi_xsdt_t));
 }
 


@@ -448,7 +448,7 @@ void acpi_write_rsdp(acpi_rsdp_t *rsdp, acpi_rsdt_t *rsdt, acpi_xsdt_t *xsdt)
        memcpy(rsdp->oem_id, OEM_ID, 6);
        rsdp->length            = sizeof(acpi_rsdp_t);
        rsdp->rsdt_address      = (u32)rsdt;
        memcpy(rsdp->oem_id, OEM_ID, 6);
        rsdp->length            = sizeof(acpi_rsdp_t);
        rsdp->rsdt_address      = (u32)rsdt;

-       /* Some OSes expect an XSDT to be present for RSD PTR 
+       /* Some OSes expect an XSDT to be present for RSD PTR

         * revisions >= 2. If we don't have an ACPI XSDT, force
         * ACPI 1.0 (and thus RSD PTR revision 0)
         */
         * revisions >= 2. If we don't have an ACPI XSDT, force
         * ACPI 1.0 (and thus RSD PTR revision 0)
         */


@@ -547,7 +547,7 @@ void *acpi_find_wakeup_vector(void)
 
        printk(BIOS_DEBUG, "RSDP found at %p\n", rsdp);
        rsdt = (acpi_rsdt_t *) rsdp->rsdt_address;
 
        printk(BIOS_DEBUG, "RSDP found at %p\n", rsdp);
        rsdt = (acpi_rsdt_t *) rsdp->rsdt_address;

-       
+

        end = (char *) rsdt + rsdt->header.length;
        printk(BIOS_DEBUG, "RSDT found at %p ends at %p\n", rsdt, end);
 
        end = (char *) rsdt + rsdt->header.length;
        printk(BIOS_DEBUG, "RSDT found at %p ends at %p\n", rsdt, end);
 

diff --git a/src/arch/i386/boot/acpigen.c b/src/arch/i386/boot/acpigen.c
index 3ed7a2f05dae862c449a57839adf7be885787d4b..2bd2ab56309eb2e0945a817a887cc41640de35c5 100644 (file)
--- a/src/arch/i386/boot/acpigen.c
+++ b/src/arch/i386/boot/acpigen.c
@@ -147,8 +147,8 @@ int acpigen_emit_stream(const char *data, int size)
        return size;
 }
 
        return size;
 }
 

-/* The NameString are bit tricky, each element can be 4 chars, if 
-   less its padded with underscore. Check 18.2.2 and 18.4 
+/* The NameString are bit tricky, each element can be 4 chars, if
+   less its padded with underscore. Check 18.2.2 and 18.4

    and 5.3 of ACPI specs 3.0 for details
 */
 
    and 5.3 of ACPI specs 3.0 for details
 */
 


@@ -160,14 +160,14 @@ static int acpigen_emit_simple_namestring(const char *name) {
                        len += acpigen_emit_stream(ud, 4 - i);
                        break;
                } else {
                        len += acpigen_emit_stream(ud, 4 - i);
                        break;
                } else {

-                       len += acpigen_emit_byte(name[i]);                              
+                       len += acpigen_emit_byte(name[i]);

                }
        }
        return len;
 }
 
 static int acpigen_emit_double_namestring(const char *name, int dotpos) {
                }
        }
        return len;
 }
 
 static int acpigen_emit_double_namestring(const char *name, int dotpos) {

-       int len = 0; 
+       int len = 0;

        /* mark dual name prefix */
        len += acpigen_emit_byte(0x2e);
        len += acpigen_emit_simple_namestring(name);
        /* mark dual name prefix */
        len += acpigen_emit_byte(0x2e);
        len += acpigen_emit_simple_namestring(name);


@@ -177,7 +177,7 @@ static int acpigen_emit_double_namestring(const char *name, int dotpos) {
 
 static int acpigen_emit_multi_namestring(const char *name) {
        int len = 0, count = 0;
 
 static int acpigen_emit_multi_namestring(const char *name) {
        int len = 0, count = 0;

-       unsigned char *pathlen; 
+       unsigned char *pathlen;

        /* mark multi name prefix */
        len += acpigen_emit_byte(0x2f);
        len += acpigen_emit_byte(0x0);
        /* mark multi name prefix */
        len += acpigen_emit_byte(0x2f);
        len += acpigen_emit_byte(0x0);


@@ -229,7 +229,7 @@ int acpigen_emit_namestring(const char *namepath) {
 
        if (dotcount == 0) {
                len += acpigen_emit_simple_namestring(namepath);
 
        if (dotcount == 0) {
                len += acpigen_emit_simple_namestring(namepath);

-       } else if (dotcount == 1) { 
+       } else if (dotcount == 1) {

                len += acpigen_emit_double_namestring(namepath, dotpos);
        } else {
                len += acpigen_emit_multi_namestring(namepath);
                len += acpigen_emit_double_namestring(namepath, dotpos);
        } else {
                len += acpigen_emit_multi_namestring(namepath);

diff --git a/src/arch/i386/boot/boot.c b/src/arch/i386/boot/boot.c
index 895065e64a14f726adc85687f9f572b808d68f2e..d9cb02e776c4f58d7b25f8c63e728334cc793aaa 100644 (file)
--- a/src/arch/i386/boot/boot.c
+++ b/src/arch/i386/boot/boot.c
@@ -63,9 +63,9 @@ int elf_check_arch(Elf_ehdr *ehdr)
        return (
                ((ehdr->e_machine == EM_386) || (ehdr->e_machine == EM_486)) &&
                (ehdr->e_ident[EI_CLASS] == ELFCLASS32) &&
        return (
                ((ehdr->e_machine == EM_386) || (ehdr->e_machine == EM_486)) &&
                (ehdr->e_ident[EI_CLASS] == ELFCLASS32) &&

-               (ehdr->e_ident[EI_DATA] == ELFDATA2LSB) 
+               (ehdr->e_ident[EI_DATA] == ELFDATA2LSB)

                );
                );

-       
+

 }
 
 void jmp_to_elf_entry(void *entry, unsigned long buffer, unsigned long size)
 }
 
 void jmp_to_elf_entry(void *entry, unsigned long buffer, unsigned long size)


@@ -74,7 +74,7 @@ void jmp_to_elf_entry(void *entry, unsigned long buffer, unsigned long size)
        unsigned long lb_start, lb_size;
        unsigned long adjust, adjusted_boot_notes;
 
        unsigned long lb_start, lb_size;
        unsigned long adjust, adjusted_boot_notes;
 

-       elf_boot_notes.hdr.b_checksum = 
+       elf_boot_notes.hdr.b_checksum =

                compute_ip_checksum(&elf_boot_notes, sizeof(elf_boot_notes));
 
        lb_start = (unsigned long)&_ram_seg;
                compute_ip_checksum(&elf_boot_notes, sizeof(elf_boot_notes));
 
        lb_start = (unsigned long)&_ram_seg;


@@ -82,7 +82,7 @@ void jmp_to_elf_entry(void *entry, unsigned long buffer, unsigned long size)
        adjust = buffer +  size - lb_start;
 
        adjusted_boot_notes = (unsigned long)&elf_boot_notes;
        adjust = buffer +  size - lb_start;
 
        adjusted_boot_notes = (unsigned long)&elf_boot_notes;

-       adjusted_boot_notes += adjust; 
+       adjusted_boot_notes += adjust;

 
        printk(BIOS_SPEW, "entry    = 0x%08lx\n", (unsigned long)entry);
        printk(BIOS_SPEW, "lb_start = 0x%08lx\n", lb_start);
 
        printk(BIOS_SPEW, "entry    = 0x%08lx\n", (unsigned long)entry);
        printk(BIOS_SPEW, "lb_start = 0x%08lx\n", lb_start);


@@ -91,7 +91,7 @@ void jmp_to_elf_entry(void *entry, unsigned long buffer, unsigned long size)
        printk(BIOS_SPEW, "buffer   = 0x%08lx\n", buffer);
        printk(BIOS_SPEW, "     elf_boot_notes = 0x%08lx\n", (unsigned long)&elf_boot_notes);
        printk(BIOS_SPEW, "adjusted_boot_notes = 0x%08lx\n", adjusted_boot_notes);
        printk(BIOS_SPEW, "buffer   = 0x%08lx\n", buffer);
        printk(BIOS_SPEW, "     elf_boot_notes = 0x%08lx\n", (unsigned long)&elf_boot_notes);
        printk(BIOS_SPEW, "adjusted_boot_notes = 0x%08lx\n", adjusted_boot_notes);

-       
+

        /* Jump to kernel */
        __asm__ __volatile__(
                "       cld     \n\t"
        /* Jump to kernel */
        __asm__ __volatile__(
                "       cld     \n\t"


@@ -172,7 +172,7 @@ void jmp_to_elf_entry(void *entry, unsigned long buffer, unsigned long size)
                "       popl    %%edi\n\t"
                "       popl    %%esi\n\t"
 
                "       popl    %%edi\n\t"
                "       popl    %%esi\n\t"
 

-               :: 
+               ::

                "ri" (lb_start), "ri" (buffer), "ri" (lb_size),
                "ri" (entry),
 #if CONFIG_MULTIBOOT
                "ri" (lb_start), "ri" (buffer), "ri" (lb_size),
                "ri" (entry),
 #if CONFIG_MULTIBOOT

diff --git a/src/arch/i386/boot/coreboot_table.c b/src/arch/i386/boot/coreboot_table.c
index b88ca1adbaca02a9bdadac63d2d276f976227e0e..bdf3b1bc6ace65ab98f40b908ffb9c3aeab0dde2 100644 (file)
--- a/src/arch/i386/boot/coreboot_table.c
+++ b/src/arch/i386/boot/coreboot_table.c
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
 /*
  * This file is part of the coreboot project.

- * 
+ *

  * Copyright (C) 2003-2004 Eric Biederman
  * Copyright (C) 2005-2010 coresystems GmbH
  *
  * Copyright (C) 2003-2004 Eric Biederman
  * Copyright (C) 2005-2010 coresystems GmbH
  *


@@ -71,7 +71,7 @@ static struct lb_record *lb_last_record(struct lb_header *header)
 #if 0
 static struct lb_record *lb_next_record(struct lb_record *rec)
 {
 #if 0
 static struct lb_record *lb_next_record(struct lb_record *rec)
 {

-       rec = (void *)(((char *)rec) + rec->size);      
+       rec = (void *)(((char *)rec) + rec->size);

        return rec;
 }
 #endif
        return rec;
 }
 #endif


@@ -173,7 +173,7 @@ static struct lb_mainboard *lb_mainboard(struct lb_header *header)
        mainboard->tag = LB_TAG_MAINBOARD;
 
        mainboard->size = (sizeof(*mainboard) +
        mainboard->tag = LB_TAG_MAINBOARD;
 
        mainboard->size = (sizeof(*mainboard) +

-               strlen(mainboard_vendor) + 1 + 
+               strlen(mainboard_vendor) + 1 +

                strlen(mainboard_part_number) + 1 +
                3) & ~3;
 
                strlen(mainboard_part_number) + 1 +
                3) & ~3;
 


@@ -203,7 +203,7 @@ static struct cmos_checksum *lb_cmos_checksum(struct lb_header *header)
        cmos_checksum->range_end = ( LB_CKS_RANGE_END * 8 ) + 7;
        cmos_checksum->location = LB_CKS_LOC * 8;
        cmos_checksum->type = CHECKSUM_PCBIOS;
        cmos_checksum->range_end = ( LB_CKS_RANGE_END * 8 ) + 7;
        cmos_checksum->location = LB_CKS_LOC * 8;
        cmos_checksum->type = CHECKSUM_PCBIOS;

-       
+

        return cmos_checksum;
 }
 #endif
        return cmos_checksum;
 }
 #endif


@@ -320,7 +320,7 @@ static void lb_cleanup_memory_ranges(struct lb_memory *mem)
        int entries;
        int i, j;
        entries = (mem->size - sizeof(*mem))/sizeof(mem->map[0]);
        int entries;
        int i, j;
        entries = (mem->size - sizeof(*mem))/sizeof(mem->map[0]);

-       
+

        /* Sort the lb memory ranges */
        for(i = 0; i < entries; i++) {
                uint64_t entry_start = unpack_lb64(mem->map[i].start);
        /* Sort the lb memory ranges */
        for(i = 0; i < entries; i++) {
                uint64_t entry_start = unpack_lb64(mem->map[i].start);


@@ -357,17 +357,17 @@ static void lb_cleanup_memory_ranges(struct lb_memory *mem)
                        mem->map[i].size  = pack_lb64(end - start);
 
                        /* Delete the entry I have merged with */
                        mem->map[i].size  = pack_lb64(end - start);
 
                        /* Delete the entry I have merged with */

-                       memmove(&mem->map[i + 1], &mem->map[i + 2], 
+                       memmove(&mem->map[i + 1], &mem->map[i + 2],

                                ((entries - i - 2) * sizeof(mem->map[0])));
                        mem->size -= sizeof(mem->map[0]);
                        entries -= 1;
                        /* See if I can merge with the next entry as well */
                                ((entries - i - 2) * sizeof(mem->map[0])));
                        mem->size -= sizeof(mem->map[0]);
                        entries -= 1;
                        /* See if I can merge with the next entry as well */

-                       i -= 1; 
+                       i -= 1;

                }
        }
 }
 
                }
        }
 }
 

-static void lb_remove_memory_range(struct lb_memory *mem, 
+static void lb_remove_memory_range(struct lb_memory *mem,

        uint64_t start, uint64_t size)
 {
        uint64_t end;
        uint64_t start, uint64_t size)
 {
        uint64_t end;


@@ -383,16 +383,16 @@ static void lb_remove_memory_range(struct lb_memory *mem,
                uint64_t map_end   = map_start + unpack_lb64(mem->map[i].size);
                if ((start <= map_start) && (end >= map_end)) {
                        /* Remove the completely covered range */
                uint64_t map_end   = map_start + unpack_lb64(mem->map[i].size);
                if ((start <= map_start) && (end >= map_end)) {
                        /* Remove the completely covered range */

-                       memmove(&mem->map[i], &mem->map[i + 1], 
+                       memmove(&mem->map[i], &mem->map[i + 1],

                                ((entries - i - 1) * sizeof(mem->map[0])));
                        mem->size -= sizeof(mem->map[0]);
                        entries -= 1;
                        /* Since the index will disappear revisit what will appear here */
                                ((entries - i - 1) * sizeof(mem->map[0])));
                        mem->size -= sizeof(mem->map[0]);
                        entries -= 1;
                        /* Since the index will disappear revisit what will appear here */

-                       i -= 1; 
+                       i -= 1;

                }
                else if ((start > map_start) && (end < map_end)) {
                        /* Split the memory range */
                }
                else if ((start > map_start) && (end < map_end)) {
                        /* Split the memory range */

-                       memmove(&mem->map[i + 1], &mem->map[i], 
+                       memmove(&mem->map[i + 1], &mem->map[i],

                                ((entries - i) * sizeof(mem->map[0])));
                        mem->size += sizeof(mem->map[0]);
                        entries += 1;
                                ((entries - i) * sizeof(mem->map[0])));
                        mem->size += sizeof(mem->map[0]);
                        entries += 1;


@@ -430,7 +430,7 @@ static void lb_dump_memory_ranges(struct lb_memory *mem)
        int entries;
        int i;
        entries = (mem->size - sizeof(*mem))/sizeof(mem->map[0]);
        int entries;
        int i;
        entries = (mem->size - sizeof(*mem))/sizeof(mem->map[0]);

-       
+

        printk(BIOS_DEBUG, "coreboot memory table:\n");
        for(i = 0; i < entries; i++) {
                uint64_t entry_start = unpack_lb64(mem->map[i].start);
        printk(BIOS_DEBUG, "coreboot memory table:\n");
        for(i = 0; i < entries; i++) {
                uint64_t entry_start = unpack_lb64(mem->map[i].start);


@@ -448,14 +448,14 @@ static void lb_dump_memory_ranges(struct lb_memory *mem)
                default: entry_type="UNKNOWN!"; break;
                }
 
                default: entry_type="UNKNOWN!"; break;
                }
 

-               printk(BIOS_DEBUG, "%2d. %016llx-%016llx: %s\n", 
+               printk(BIOS_DEBUG, "%2d. %016llx-%016llx: %s\n",

                        i, entry_start, entry_start+entry_size-1, entry_type);
                        i, entry_start, entry_start+entry_size-1, entry_type);

-               
+

        }
 }
 
 
        }
 }
 
 

-/* Routines to extract part so the coreboot table or 
+/* Routines to extract part so the coreboot table or

  * information from the coreboot table after we have written it.
  * Currently get_lb_mem relies on a global we can change the
  * implementaiton.
  * information from the coreboot table after we have written it.
  * Currently get_lb_mem relies on a global we can change the
  * implementaiton.


@@ -492,8 +492,8 @@ static struct lb_memory *build_lb_mem(struct lb_header *head)
 extern uint64_t high_tables_base, high_tables_size;
 #endif
 
 extern uint64_t high_tables_base, high_tables_size;
 #endif
 

-unsigned long write_coreboot_table( 
-       unsigned long low_table_start, unsigned long low_table_end, 
+unsigned long write_coreboot_table(
+       unsigned long low_table_start, unsigned long low_table_end,

        unsigned long rom_table_start, unsigned long rom_table_end)
 {
        struct lb_header *head;
        unsigned long rom_table_start, unsigned long rom_table_end)
 {
        struct lb_header *head;


@@ -509,7 +509,7 @@ unsigned long write_coreboot_table(
        printk(BIOS_DEBUG, "New low_table_end: 0x%08lx\n", low_table_end);
        printk(BIOS_DEBUG, "Now going to write high coreboot table at 0x%08lx\n",
                        rom_table_end);
        printk(BIOS_DEBUG, "New low_table_end: 0x%08lx\n", low_table_end);
        printk(BIOS_DEBUG, "Now going to write high coreboot table at 0x%08lx\n",
                        rom_table_end);

-       
+

        head = lb_table_init(rom_table_end);
        rom_table_end = (unsigned long)head;
        printk(BIOS_DEBUG, "rom_table_end = 0x%08lx\n", rom_table_end);
        head = lb_table_init(rom_table_end);
        rom_table_end = (unsigned long)head;
        printk(BIOS_DEBUG, "rom_table_end = 0x%08lx\n", rom_table_end);


@@ -523,7 +523,7 @@ unsigned long write_coreboot_table(
                low_table_end = (unsigned long)head;
        }
 #endif
                low_table_end = (unsigned long)head;
        }
 #endif

- 
+

        printk(BIOS_DEBUG, "Adjust low_table_end from 0x%08lx to ", low_table_end);
        low_table_end += 0xfff; // 4K aligned
        low_table_end &= ~0xfff;
        printk(BIOS_DEBUG, "Adjust low_table_end from 0x%08lx to ", low_table_end);
        low_table_end += 0xfff; // 4K aligned
        low_table_end &= ~0xfff;


@@ -535,7 +535,7 @@ unsigned long write_coreboot_table(
        rom_table_end &= ~0xffff;
        printk(BIOS_DEBUG, "0x%08lx \n", rom_table_end);
 
        rom_table_end &= ~0xffff;
        printk(BIOS_DEBUG, "0x%08lx \n", rom_table_end);
 

-#if (CONFIG_HAVE_OPTION_TABLE == 1) 
+#if (CONFIG_HAVE_OPTION_TABLE == 1)

        {
                struct lb_record *rec_dest = lb_new_record(head);
                /* Copy the option config table, it's already a lb_record... */
        {
                struct lb_record *rec_dest = lb_new_record(head);
                /* Copy the option config table, it's already a lb_record... */


@@ -546,9 +546,9 @@ unsigned long write_coreboot_table(
 #endif
        /* Record where RAM is located */
        mem = build_lb_mem(head);
 #endif
        /* Record where RAM is located */
        mem = build_lb_mem(head);

-       
+

        /* Record the mptable and the the lb_table (This will be adjusted later) */
        /* Record the mptable and the the lb_table (This will be adjusted later) */

-       lb_add_memory_range(mem, LB_MEM_TABLE, 
+       lb_add_memory_range(mem, LB_MEM_TABLE,

                low_table_start, low_table_end - low_table_start);
 
        /* Record the pirq table, acpi tables, and maybe the mptable */
                low_table_start, low_table_end - low_table_start);
 
        /* Record the pirq table, acpi tables, and maybe the mptable */


@@ -588,5 +588,5 @@ unsigned long write_coreboot_table(
 
        /* Remember where my valid memory ranges are */
        return lb_table_fini(head, 1);
 
        /* Remember where my valid memory ranges are */
        return lb_table_fini(head, 1);

-       
+

 }
 }

diff --git a/src/arch/i386/boot/mpspec.c b/src/arch/i386/boot/mpspec.c
index 1beba873ccbb86e8452a94d70bf4b67a6197dce4..47ad8ccb33ea2b5a60450f6dda632f76e0737a40 100644 (file)
--- a/src/arch/i386/boot/mpspec.c
+++ b/src/arch/i386/boot/mpspec.c
@@ -31,7 +31,7 @@ void *smp_write_floating_table_physaddr(unsigned long addr, unsigned long mpf_ph
 {
         struct intel_mp_floating *mf;
         void *v;
 {
         struct intel_mp_floating *mf;
         void *v;

-       
+

        v = (void *)addr;
         mf = v;
         mf->mpf_signature[0] = '_';
        v = (void *)addr;
         mf = v;
         mf->mpf_signature[0] = '_';


@@ -106,7 +106,7 @@ void smp_write_processors(struct mp_config_table *mc)
        unsigned cpu_feature_flags;
        struct cpuid_result result;
        device_t cpu;
        unsigned cpu_feature_flags;
        struct cpuid_result result;
        device_t cpu;

-       
+

        boot_apic_id = lapicid();
        apic_version = lapic_read(LAPIC_LVR) & 0xff;
        result = cpuid(1);
        boot_apic_id = lapicid();
        apic_version = lapic_read(LAPIC_LVR) & 0xff;
        result = cpuid(1);


@@ -114,7 +114,7 @@ void smp_write_processors(struct mp_config_table *mc)
        cpu_feature_flags = result.edx;
        for(cpu = all_devices; cpu; cpu = cpu->next) {
                unsigned long cpu_flag;
        cpu_feature_flags = result.edx;
        for(cpu = all_devices; cpu; cpu = cpu->next) {
                unsigned long cpu_flag;

-               if ((cpu->path.type != DEVICE_PATH_APIC) || 
+               if ((cpu->path.type != DEVICE_PATH_APIC) ||

                        (cpu->bus->dev->path.type != DEVICE_PATH_APIC_CLUSTER))
                {
                        continue;
                        (cpu->bus->dev->path.type != DEVICE_PATH_APIC_CLUSTER))
                {
                        continue;


@@ -126,7 +126,7 @@ void smp_write_processors(struct mp_config_table *mc)
                if (boot_apic_id == cpu->path.apic.apic_id) {
                        cpu_flag = MPC_CPU_ENABLED | MPC_CPU_BOOTPROCESSOR;
                }
                if (boot_apic_id == cpu->path.apic.apic_id) {
                        cpu_flag = MPC_CPU_ENABLED | MPC_CPU_BOOTPROCESSOR;
                }

-               smp_write_processor(mc, 
+               smp_write_processor(mc,

                        cpu->path.apic.apic_id, apic_version,
                        cpu_flag, cpu_features, cpu_feature_flags
                );
                        cpu->path.apic.apic_id, apic_version,
                        cpu_flag, cpu_features, cpu_feature_flags
                );


@@ -146,7 +146,7 @@ void smp_write_bus(struct mp_config_table *mc,
 }
 
 void smp_write_ioapic(struct mp_config_table *mc,
 }
 
 void smp_write_ioapic(struct mp_config_table *mc,

-       unsigned char id, unsigned char ver, 
+       unsigned char id, unsigned char ver,

        unsigned long apicaddr)
 {
        struct mpc_config_ioapic *mpc;
        unsigned long apicaddr)
 {
        struct mpc_config_ioapic *mpc;

diff --git a/src/arch/i386/boot/pirq_routing.c b/src/arch/i386/boot/pirq_routing.c
index 86a3500444c7c15b6159830d056adb6befdb5a9b..4873f6d751323574ba10cf363eff623a780a9434 100644 (file)
--- a/src/arch/i386/boot/pirq_routing.c
+++ b/src/arch/i386/boot/pirq_routing.c
@@ -26,7 +26,7 @@ static void check_pirq_routing_table(struct irq_routing_table *rt)
        printk(BIOS_DEBUG, "%s(): Interrupt Routing Table located at %p.\n",
                     __func__, addr);
 
        printk(BIOS_DEBUG, "%s(): Interrupt Routing Table located at %p.\n",
                     __func__, addr);
 

-       
+

        sum = rt->checksum - sum;
 
        if (sum != rt->checksum) {
        sum = rt->checksum - sum;
 
        if (sum != rt->checksum) {


@@ -72,9 +72,9 @@ static int verify_copy_pirq_routing_table(unsigned long addr)
                }
        }
        printk(BIOS_INFO, "done\n");
                }
        }
        printk(BIOS_INFO, "done\n");

-       
+

        check_pirq_routing_table((struct irq_routing_table *)addr);
        check_pirq_routing_table((struct irq_routing_table *)addr);

-       
+

        return 0;
 }
 #endif
        return 0;
 }
 #endif

diff --git a/src/arch/i386/boot/tables.c b/src/arch/i386/boot/tables.c
index 76a7bb21b189d005a59f0f61cd67a3d6c41a2e28..6ee7c2c87690a4ab501e818141a6f38aa7f1bc5d 100644 (file)
--- a/src/arch/i386/boot/tables.c
+++ b/src/arch/i386/boot/tables.c
@@ -60,12 +60,12 @@ struct lb_memory *write_tables(void)
 
        printk(BIOS_DEBUG, "High Tables Base is %llx.\n", high_tables_base);
 
 
        printk(BIOS_DEBUG, "High Tables Base is %llx.\n", high_tables_base);
 

-       rom_table_start = 0xf0000; 
+       rom_table_start = 0xf0000;

        rom_table_end =   0xf0000;
 
        /* Start low addr at 0x500, so we don't run into conflicts with the BDA
         * in case our data structures grow beyound 0x400. Only multiboot, GDT
        rom_table_end =   0xf0000;
 
        /* Start low addr at 0x500, so we don't run into conflicts with the BDA
         * in case our data structures grow beyound 0x400. Only multiboot, GDT

-        * and the coreboot table use low_tables. 
+        * and the coreboot table use low_tables.

         */
        low_table_start = 0;
        low_table_end = 0x500;
         */
        low_table_start = 0;
        low_table_end = 0x500;


@@ -126,7 +126,7 @@ struct lb_memory *write_tables(void)
        /* Write ACPI tables to F segment and high tables area */
 
        /* Ok, this is a bit hacky still, because some day we want to have this
        /* Write ACPI tables to F segment and high tables area */
 
        /* Ok, this is a bit hacky still, because some day we want to have this

-        * completely dynamic. But right now we are setting fixed sizes. 
+        * completely dynamic. But right now we are setting fixed sizes.

         * It's probably still better than the old high_table_base code because
         * now at least we know when we have an overflow in the area.
         *
         * It's probably still better than the old high_table_base code because
         * now at least we know when we have an overflow in the area.
         *


@@ -213,7 +213,7 @@ struct lb_memory *write_tables(void)
                write_coreboot_table(low_table_start, low_table_end,
                              rom_table_start, rom_table_end);
        }
                write_coreboot_table(low_table_start, low_table_end,
                              rom_table_start, rom_table_end);
        }

- 
+

        post_code(0x9e);
 
 #if CONFIG_HAVE_ACPI_RESUME
        post_code(0x9e);
 
 #if CONFIG_HAVE_ACPI_RESUME


@@ -223,7 +223,7 @@ struct lb_memory *write_tables(void)
         */
        cbmem_add(CBMEM_ID_RESUME, 1024 * (1024-64));
 #endif
         */
        cbmem_add(CBMEM_ID_RESUME, 1024 * (1024-64));
 #endif

-       
+

        // Remove before sending upstream
        cbmem_list();
 
        // Remove before sending upstream
        cbmem_list();
 

diff --git a/src/arch/i386/boot/wakeup.S b/src/arch/i386/boot/wakeup.S
index b348e95a71c33b9e3404a398db60c22af44cb814..a1df4d5597700ce8b0dd0d591f94a4ea42973232 100644 (file)
--- a/src/arch/i386/boot/wakeup.S
+++ b/src/arch/i386/boot/wakeup.S
@@ -68,11 +68,11 @@ __wakeup:
         * protected mode is turned off.
         */
        mov     $0x30, %ax
         * protected mode is turned off.
         */
        mov     $0x30, %ax

-       mov     %ax, %ds       
-       mov     %ax, %es       
-       mov     %ax, %fs       
-       mov     %ax, %gs       
-       mov     %ax, %ss       
+       mov     %ax, %ds
+       mov     %ax, %es
+       mov     %ax, %fs
+       mov     %ax, %gs
+       mov     %ax, %ss

 
        /* Turn off protection */
        movl    %cr0, %eax
 
        /* Turn off protection */
        movl    %cr0, %eax

diff --git a/src/arch/i386/coreboot_ram.ld b/src/arch/i386/coreboot_ram.ld
index 67c78cecbc71ecf4032bf5ef7884331896f7bae5..2e602205ddfcc0f2b4d179144a73b877fc5a558d 100644 (file)
--- a/src/arch/i386/coreboot_ram.ld
+++ b/src/arch/i386/coreboot_ram.ld
@@ -59,7 +59,7 @@ SECTIONS
                 . = ALIGN(4);
 
                _erodata = .;
                 . = ALIGN(4);
 
                _erodata = .;

-       }       
+       }

        /* After the code we place initialized data (typically initialized
         * global variables). This gets copied into ram by startup code.
         * __data_start and __data_end shows where in ram this should be placed,
        /* After the code we place initialized data (typically initialized
         * global variables). This gets copied into ram by startup code.
         * __data_start and __data_end shows where in ram this should be placed,


@@ -113,11 +113,11 @@ SECTIONS
        /* Avoid running into 0xa0000-0xfffff */
        _bogus = ASSERT(CONFIG_RAMBASE >= 0x100000 || _eheap < 0xa0000, "Please move RAMBASE to 1MB");
 
        /* Avoid running into 0xa0000-0xfffff */
        _bogus = ASSERT(CONFIG_RAMBASE >= 0x100000 || _eheap < 0xa0000, "Please move RAMBASE to 1MB");
 

-       /* The ram segment. This includes all memory used by the memory 
+       /* The ram segment. This includes all memory used by the memory

         * resident copy of coreboot, except the tables that are produced on
         * the fly, but including stack and heap.
         */
         * resident copy of coreboot, except the tables that are produced on
         * the fly, but including stack and heap.
         */

-       _ram_seg = _text; 
+       _ram_seg = _text;

        _eram_seg = _eheap;
 
        /* CONFIG_RAMTOP is the upper address of cached memory (among other
        _eram_seg = _eheap;
 
        /* CONFIG_RAMTOP is the upper address of cached memory (among other

diff --git a/src/arch/i386/include/arch/acpi.h b/src/arch/i386/include/arch/acpi.h
index ebab54ca42756d58fcabdf7043eea148fe150927..9b1e1a5d9e9251ec6d4fbaf8ceb9a14a501e4c76 100644 (file)
--- a/src/arch/i386/include/arch/acpi.h
+++ b/src/arch/i386/include/arch/acpi.h
@@ -30,7 +30,7 @@
 #if CONFIG_GENERATE_ACPI_TABLES==1
 
 #include <stdint.h>
 #if CONFIG_GENERATE_ACPI_TABLES==1
 
 #include <stdint.h>

- 
+

 #define RSDP_SIG               "RSD PTR "  /* RSDT Pointer signature */
 #define ACPI_TABLE_CREATOR     "COREBOOT"
 #define OEM_ID                 "CORE  "
 #define RSDP_SIG               "RSD PTR "  /* RSDT Pointer signature */
 #define ACPI_TABLE_CREATOR     "COREBOOT"
 #define OEM_ID                 "CORE  "

diff --git a/src/arch/i386/include/arch/coreboot_tables.h b/src/arch/i386/include/arch/coreboot_tables.h
index 91e6d6cbd53abbd30a33d7fc16148f81c9bb0133..3c9bf98f223a8484bfe38201efba95cfabb869f2 100644 (file)
--- a/src/arch/i386/include/arch/coreboot_tables.h
+++ b/src/arch/i386/include/arch/coreboot_tables.h
@@ -8,7 +8,7 @@ unsigned long write_coreboot_table(
        unsigned long low_table_start, unsigned long low_table_end,
        unsigned long rom_table_start, unsigned long rom_table_end);
 
        unsigned long low_table_start, unsigned long low_table_end,
        unsigned long rom_table_start, unsigned long rom_table_end);
 

-void lb_memory_range(struct lb_memory *mem, 
+void lb_memory_range(struct lb_memory *mem,

        uint32_t type, uint64_t start, uint64_t size);
 
 /* Routines to extract part so the coreboot table or information
        uint32_t type, uint64_t start, uint64_t size);
 
 /* Routines to extract part so the coreboot table or information

diff --git a/src/arch/i386/include/arch/cpu.h b/src/arch/i386/include/arch/cpu.h
index 30b6cc300bb533e9396b984207f14061cfb71266..3e799f014d5e0842bfbc0df3ce49a25cc0abaa89 100644 (file)
--- a/src/arch/i386/include/arch/cpu.h
+++ b/src/arch/i386/include/arch/cpu.h
@@ -102,7 +102,7 @@ static inline unsigned int cpuid_edx(unsigned int op)
 #define X86_VENDOR_RISE       7
 #define X86_VENDOR_TRANSMETA  8
 #define X86_VENDOR_NSC        9
 #define X86_VENDOR_RISE       7
 #define X86_VENDOR_TRANSMETA  8
 #define X86_VENDOR_NSC        9

-#define X86_VENDOR_SIS       10 
+#define X86_VENDOR_SIS       10

 #define X86_VENDOR_UNKNOWN 0xff
 
 #if !defined(__PRE_RAM__)
 #define X86_VENDOR_UNKNOWN 0xff
 
 #if !defined(__PRE_RAM__)


@@ -129,8 +129,8 @@ static inline struct cpu_info *cpu_info(void)
        struct cpu_info *ci;
        __asm__("andl %%esp,%0; "
                "orl  %2, %0 "
        struct cpu_info *ci;
        __asm__("andl %%esp,%0; "
                "orl  %2, %0 "

-               :"=r" (ci) 
-               : "0" (~(CONFIG_STACK_SIZE - 1)), 
+               :"=r" (ci)
+               : "0" (~(CONFIG_STACK_SIZE - 1)),

                "r" (CONFIG_STACK_SIZE - sizeof(struct cpu_info))
        );
        return ci;
                "r" (CONFIG_STACK_SIZE - sizeof(struct cpu_info))
        );
        return ci;

diff --git a/src/arch/i386/include/arch/io.h b/src/arch/i386/include/arch/io.h
index 3a76579fbc7cd207e79f148eab5296b9f8d77faa..dd8d64738049cd823fb93c096873dff9407e955d 100644 (file)
--- a/src/arch/i386/include/arch/io.h
+++ b/src/arch/i386/include/arch/io.h
@@ -82,7 +82,7 @@ static inline uint32_t inl(uint16_t port)
 static inline void outsb(uint16_t port, const void *addr, unsigned long count)
 {
        __asm__ __volatile__ (
 static inline void outsb(uint16_t port, const void *addr, unsigned long count)
 {
        __asm__ __volatile__ (

-               "cld ; rep ; outsb " 
+               "cld ; rep ; outsb "

                : "=S" (addr), "=c" (count)
                : "d"(port), "0"(addr), "1" (count)
                );
                : "=S" (addr), "=c" (count)
                : "d"(port), "0"(addr), "1" (count)
                );


@@ -91,7 +91,7 @@ static inline void outsb(uint16_t port, const void *addr, unsigned long count)
 static inline void outsw(uint16_t port, const void *addr, unsigned long count)
 {
        __asm__ __volatile__ (
 static inline void outsw(uint16_t port, const void *addr, unsigned long count)
 {
        __asm__ __volatile__ (

-               "cld ; rep ; outsw " 
+               "cld ; rep ; outsw "

                : "=S" (addr), "=c" (count)
                : "d"(port), "0"(addr), "1" (count)
                );
                : "=S" (addr), "=c" (count)
                : "d"(port), "0"(addr), "1" (count)
                );


@@ -100,7 +100,7 @@ static inline void outsw(uint16_t port, const void *addr, unsigned long count)
 static inline void outsl(uint16_t port, const void *addr, unsigned long count)
 {
        __asm__ __volatile__ (
 static inline void outsl(uint16_t port, const void *addr, unsigned long count)
 {
        __asm__ __volatile__ (

-               "cld ; rep ; outsl " 
+               "cld ; rep ; outsl "

                : "=S" (addr), "=c" (count)
                : "d"(port), "0"(addr), "1" (count)
                );
                : "=S" (addr), "=c" (count)
                : "d"(port), "0"(addr), "1" (count)
                );


@@ -110,7 +110,7 @@ static inline void outsl(uint16_t port, const void *addr, unsigned long count)
 static inline void insb(uint16_t port, void *addr, unsigned long count)
 {
        __asm__ __volatile__ (
 static inline void insb(uint16_t port, void *addr, unsigned long count)
 {
        __asm__ __volatile__ (

-               "cld ; rep ; insb " 
+               "cld ; rep ; insb "

                : "=D" (addr), "=c" (count)
                : "d"(port), "0"(addr), "1" (count)
                );
                : "=D" (addr), "=c" (count)
                : "d"(port), "0"(addr), "1" (count)
                );


@@ -119,7 +119,7 @@ static inline void insb(uint16_t port, void *addr, unsigned long count)
 static inline void insw(uint16_t port, void *addr, unsigned long count)
 {
        __asm__ __volatile__ (
 static inline void insw(uint16_t port, void *addr, unsigned long count)
 {
        __asm__ __volatile__ (

-               "cld ; rep ; insw " 
+               "cld ; rep ; insw "

                : "=D" (addr), "=c" (count)
                : "d"(port), "0"(addr), "1" (count)
                );
                : "=D" (addr), "=c" (count)
                : "d"(port), "0"(addr), "1" (count)
                );


@@ -128,7 +128,7 @@ static inline void insw(uint16_t port, void *addr, unsigned long count)
 static inline void insl(uint16_t port, void *addr, unsigned long count)
 {
        __asm__ __volatile__ (
 static inline void insl(uint16_t port, void *addr, unsigned long count)
 {
        __asm__ __volatile__ (

-               "cld ; rep ; insl " 
+               "cld ; rep ; insl "

                : "=D" (addr), "=c" (count)
                : "d"(port), "0"(addr), "1" (count)
                );
                : "=D" (addr), "=c" (count)
                : "d"(port), "0"(addr), "1" (count)
                );

diff --git a/src/arch/i386/include/arch/pciconf.h b/src/arch/i386/include/arch/pciconf.h
index 09133b556763210356b5335012f44b7dfbc8639a..a35693519e386deeaa3db5587f13c8d4ebc11e8c 100644 (file)
--- a/src/arch/i386/include/arch/pciconf.h
+++ b/src/arch/i386/include/arch/pciconf.h
@@ -1,7 +1,7 @@
 #ifndef PCI_CONF_REG_INDEX
 
 // These are defined in the PCI spec, and hence are theoretically
 #ifndef PCI_CONF_REG_INDEX
 
 // These are defined in the PCI spec, and hence are theoretically

-// inclusive of ANYTHING that uses a PCI bus. 
+// inclusive of ANYTHING that uses a PCI bus.

 #define        PCI_CONF_REG_INDEX      0xcf8
 #define        PCI_CONF_REG_DATA       0xcfc
 
 #define        PCI_CONF_REG_INDEX      0xcf8
 #define        PCI_CONF_REG_DATA       0xcfc
 

diff --git a/src/arch/i386/include/arch/registers.h b/src/arch/i386/include/arch/registers.h
index 63aeec826b08b701dfd776dfff5d918ddb34a3d8..bc1b6813392d2594d4a3612163c21213459c0d33 100644 (file)
--- a/src/arch/i386/include/arch/registers.h
+++ b/src/arch/i386/include/arch/registers.h
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
 /*
  * This file is part of the coreboot project.

- * 
+ *

  * Copyright (C) 2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or modify
  * Copyright (C) 2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or modify

diff --git a/src/arch/i386/include/arch/romcc_io.h b/src/arch/i386/include/arch/romcc_io.h
index d69d4541bcb743274ac41a6a70a495dbe11fb917..f1466273d8b16eba1dd40308f31f0f0105630d4c 100644 (file)
--- a/src/arch/i386/include/arch/romcc_io.h
+++ b/src/arch/i386/include/arch/romcc_io.h
@@ -85,7 +85,7 @@ static inline int log2f(int value)
 
 typedef unsigned device_t; /* pci and pci_mmio need to have different ways to have dev */
 
 
 typedef unsigned device_t; /* pci and pci_mmio need to have different ways to have dev */
 

-/* FIXME: We need to make the coreboot to run at 64bit mode, So when read/write memory above 4G, 
+/* FIXME: We need to make the coreboot to run at 64bit mode, So when read/write memory above 4G,

  * We don't need to set %fs, and %gs anymore
  * Before that We need to use %gs, and leave %fs to other RAM access
  */
  * We don't need to set %fs, and %gs anymore
  * Before that We need to use %gs, and leave %fs to other RAM access
  */


@@ -303,7 +303,7 @@ static inline device_t pci_locate_device_on_bus(unsigned pci_id, unsigned bus)
 
         dev = PCI_DEV(bus, 0, 0);
         last = PCI_DEV(bus, 31, 7);
 
         dev = PCI_DEV(bus, 0, 0);
         last = PCI_DEV(bus, 31, 7);

-       
+

         for(; dev <=last; dev += PCI_DEV(0,0,1)) {
                 unsigned int id;
                 id = pci_read_config32(dev, 0);
         for(; dev <=last; dev += PCI_DEV(0,0,1)) {
                 unsigned int id;
                 id = pci_read_config32(dev, 0);

diff --git a/src/arch/i386/include/arch/smp/atomic.h b/src/arch/i386/include/arch/smp/atomic.h
index 7061461d33affe6f344b05ac158a87954fd3318c..18bbae27cb192eec430ae03cb239f96b3ed08b7a 100644 (file)
--- a/src/arch/i386/include/arch/smp/atomic.h
+++ b/src/arch/i386/include/arch/smp/atomic.h
@@ -18,29 +18,29 @@ typedef struct { volatile int counter; } atomic_t;
 /**
  * atomic_read - read atomic variable
  * @v: pointer of type atomic_t
 /**
  * atomic_read - read atomic variable
  * @v: pointer of type atomic_t

- * 
+ *

  * Atomically reads the value of @v.  Note that the guaranteed
  * useful range of an atomic_t is only 24 bits.
  * Atomically reads the value of @v.  Note that the guaranteed
  * useful range of an atomic_t is only 24 bits.

- */ 
+ */

 #define atomic_read(v)         ((v)->counter)
 
 /**
  * atomic_set - set atomic variable
  * @v: pointer of type atomic_t
  * @i: required value
 #define atomic_read(v)         ((v)->counter)
 
 /**
  * atomic_set - set atomic variable
  * @v: pointer of type atomic_t
  * @i: required value

- * 
+ *

  * Atomically sets the value of @v to @i.  Note that the guaranteed
  * useful range of an atomic_t is only 24 bits.
  * Atomically sets the value of @v to @i.  Note that the guaranteed
  * useful range of an atomic_t is only 24 bits.

- */ 
+ */

 #define atomic_set(v,i)                (((v)->counter) = (i))
 
 /**
  * atomic_inc - increment atomic variable
  * @v: pointer of type atomic_t
 #define atomic_set(v,i)                (((v)->counter) = (i))
 
 /**
  * atomic_inc - increment atomic variable
  * @v: pointer of type atomic_t

- * 
+ *

  * Atomically increments @v by 1.  Note that the guaranteed
  * useful range of an atomic_t is only 24 bits.
  * Atomically increments @v by 1.  Note that the guaranteed
  * useful range of an atomic_t is only 24 bits.

- */ 
+ */

 static __inline__ __attribute__((always_inline)) void atomic_inc(atomic_t *v)
 {
        __asm__ __volatile__(
 static __inline__ __attribute__((always_inline)) void atomic_inc(atomic_t *v)
 {
        __asm__ __volatile__(


@@ -52,10 +52,10 @@ static __inline__ __attribute__((always_inline)) void atomic_inc(atomic_t *v)
 /**
  * atomic_dec - decrement atomic variable
  * @v: pointer of type atomic_t
 /**
  * atomic_dec - decrement atomic variable
  * @v: pointer of type atomic_t

- * 
+ *

  * Atomically decrements @v by 1.  Note that the guaranteed
  * useful range of an atomic_t is only 24 bits.
  * Atomically decrements @v by 1.  Note that the guaranteed
  * useful range of an atomic_t is only 24 bits.

- */ 
+ */

 static __inline__ __attribute__((always_inline)) void atomic_dec(atomic_t *v)
 {
        __asm__ __volatile__(
 static __inline__ __attribute__((always_inline)) void atomic_dec(atomic_t *v)
 {
        __asm__ __volatile__(

diff --git a/src/arch/i386/include/arch/smp/mpspec.h b/src/arch/i386/include/arch/smp/mpspec.h
index ab29f2a088f430bd167b5b653e665d66afe63d70..1645d3b38f07ba19bf98eca1527768e55b8f937e 100644 (file)
--- a/src/arch/i386/include/arch/smp/mpspec.h
+++ b/src/arch/i386/include/arch/smp/mpspec.h
@@ -9,9 +9,9 @@
 
 /*
  * This tag identifies where the SMP configuration
 
 /*
  * This tag identifies where the SMP configuration

- * information is. 
+ * information is.

  */
  */

- 
+

 #define SMP_MAGIC_IDENT        (('_'<<24)|('P'<<16)|('M'<<8)|'_')
 
 /*
 #define SMP_MAGIC_IDENT        (('_'<<24)|('P'<<16)|('M'<<8)|'_')
 
 /*


@@ -72,7 +72,7 @@ struct mpc_config_processor
        unsigned char mpc_cpuflag;
 #define MPC_CPU_ENABLED                1       /* Processor is available */
 #define MPC_CPU_BOOTPROCESSOR  2       /* Processor is the BP */
        unsigned char mpc_cpuflag;
 #define MPC_CPU_ENABLED                1       /* Processor is available */
 #define MPC_CPU_BOOTPROCESSOR  2       /* Processor is the BP */

-       unsigned long mpc_cpufeature;           
+       unsigned long mpc_cpufeature;

 #define MPC_CPU_STEPPING_MASK 0x0F
 #define MPC_CPU_MODEL_MASK     0xF0
 #define MPC_CPU_FAMILY_MASK    0xF00
 #define MPC_CPU_STEPPING_MASK 0x0F
 #define MPC_CPU_MODEL_MASK     0xF0
 #define MPC_CPU_FAMILY_MASK    0xF00


@@ -140,7 +140,7 @@ struct mpc_config_lintsrc
        unsigned short mpc_irqflag;
        unsigned char mpc_srcbusid;
        unsigned char mpc_srcbusirq;
        unsigned short mpc_irqflag;
        unsigned char mpc_srcbusid;
        unsigned char mpc_srcbusirq;

-       unsigned char mpc_destapic;     
+       unsigned char mpc_destapic;

 #define MP_APIC_ALL    0xFF
        unsigned char mpc_destapiclint;
 } __attribute__((packed));
 #define MP_APIC_ALL    0xFF
        unsigned char mpc_destapiclint;
 } __attribute__((packed));


@@ -211,7 +211,7 @@ struct mp_exten_compatibility_address_space {
 #define ADDRESS_RANGE_SUBTRACT 1
 #define ADDRESS_RANGE_ADD      0
        unsigned int  mpe_range_list;
 #define ADDRESS_RANGE_SUBTRACT 1
 #define ADDRESS_RANGE_ADD      0
        unsigned int  mpe_range_list;

-#define RANGE_LIST_IO_ISA      0       
+#define RANGE_LIST_IO_ISA      0

        /* X100 - X3FF
         * X500 - X7FF
         * X900 - XBFF
        /* X100 - X3FF
         * X500 - X7FF
         * X900 - XBFF


@@ -243,7 +243,7 @@ void smp_write_processors(struct mp_config_table *mc);
 void smp_write_bus(struct mp_config_table *mc,
        unsigned char id, const char *bustype);
 void smp_write_ioapic(struct mp_config_table *mc,
 void smp_write_bus(struct mp_config_table *mc,
        unsigned char id, const char *bustype);
 void smp_write_ioapic(struct mp_config_table *mc,

-       unsigned char id, unsigned char ver, 
+       unsigned char id, unsigned char ver,

        unsigned long apicaddr);
 void smp_write_intsrc(struct mp_config_table *mc,
        unsigned char irqtype, unsigned short irqflag,
        unsigned long apicaddr);
 void smp_write_intsrc(struct mp_config_table *mc,
        unsigned char irqtype, unsigned short irqflag,


@@ -269,7 +269,7 @@ void smp_write_compatibility_address_space(struct mp_config_table *mc,
        unsigned int range_list);
 unsigned char smp_compute_checksum(void *v, int len);
 void *smp_write_floating_table(unsigned long addr);
        unsigned int range_list);
 unsigned char smp_compute_checksum(void *v, int len);
 void *smp_write_floating_table(unsigned long addr);

-void *smp_write_floating_table_physaddr(unsigned long addr, 
+void *smp_write_floating_table_physaddr(unsigned long addr,

                unsigned long mpf_physptr);
 unsigned long write_smp_table(unsigned long addr);
 
                unsigned long mpf_physptr);
 unsigned long write_smp_table(unsigned long addr);
 

diff --git a/src/arch/i386/include/bitops.h b/src/arch/i386/include/bitops.h
index fae2045b9afcbc7fd7b97066e39e1d02c26c0d09..9206465c770079525d5663d3833026853b0ccee0 100644 (file)
--- a/src/arch/i386/include/bitops.h
+++ b/src/arch/i386/include/bitops.h
@@ -15,6 +15,6 @@ static inline unsigned long log2(unsigned long x)
                "1:\n\t"
                : "=r" (r) : "r" (x));
        return r;
                "1:\n\t"
                : "=r" (r) : "r" (x));
        return r;

-               
+

 }
 #endif /* I386_BITOPS_H */
 }
 #endif /* I386_BITOPS_H */

diff --git a/src/arch/i386/include/stdint.h b/src/arch/i386/include/stdint.h
index a015a84b2ae56a85f72fb1b4981e33a84f7cd22e..b393cc10e0c736d27d55a6231916ef6cb4f30f91 100644 (file)
--- a/src/arch/i386/include/stdint.h
+++ b/src/arch/i386/include/stdint.h
@@ -9,7 +9,7 @@
 
 /* Exact integral types */
 typedef unsigned char      uint8_t;
 
 /* Exact integral types */
 typedef unsigned char      uint8_t;

-typedef signed char        int8_t; 
+typedef signed char        int8_t;

 
 typedef unsigned short     uint16_t;
 typedef signed short       int16_t;
 
 typedef unsigned short     uint16_t;
 typedef signed short       int16_t;


@@ -24,7 +24,7 @@ typedef signed long long   int64_t;
 
 /* Small types */
 typedef unsigned char      uint_least8_t;
 
 /* Small types */
 typedef unsigned char      uint_least8_t;

-typedef signed char        int_least8_t; 
+typedef signed char        int_least8_t;

 
 typedef unsigned short     uint_least16_t;
 typedef signed short       int_least16_t;
 
 typedef unsigned short     uint_least16_t;
 typedef signed short       int_least16_t;


@@ -39,7 +39,7 @@ typedef signed long long   int_least64_t;
 
 /* Fast Types */
 typedef unsigned char      uint_fast8_t;
 
 /* Fast Types */
 typedef unsigned char      uint_fast8_t;

-typedef signed char        int_fast8_t; 
+typedef signed char        int_fast8_t;

 
 typedef unsigned int       uint_fast16_t;
 typedef signed int         int_fast16_t;
 
 typedef unsigned int       uint_fast16_t;
 typedef signed int         int_fast16_t;


@@ -50,7 +50,7 @@ typedef signed int         int_fast32_t;
 #if __HAVE_LONG_LONG__
 typedef unsigned long long uint_fast64_t;
 typedef signed long long   int_fast64_t;
 #if __HAVE_LONG_LONG__
 typedef unsigned long long uint_fast64_t;
 typedef signed long long   int_fast64_t;

-#endif 
+#endif

 
 /* Types for `void *' pointers.  */
 typedef int                intptr_t;
 
 /* Types for `void *' pointers.  */
 typedef int                intptr_t;

diff --git a/src/arch/i386/init/bootblock_prologue.c b/src/arch/i386/init/bootblock_prologue.c
index b07aec35243780c01d89d9e7d2dc08b3295aa1ac..25da7b769fd8c9de3f45ad6a363ada743363980b 100644 (file)
--- a/src/arch/i386/init/bootblock_prologue.c
+++ b/src/arch/i386/init/bootblock_prologue.c
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
 /*
  * This file is part of the coreboot project.

- * 
+ *

  * Copyright (C) 2002 Eric Biederman
  *
  * This program is free software; you can redistribute it and/or modify
  * Copyright (C) 2002 Eric Biederman
  *
  * This program is free software; you can redistribute it and/or modify

diff --git a/src/arch/i386/init/crt0_prologue.inc b/src/arch/i386/init/crt0_prologue.inc
index 225a003d8f6bb9efc50e4e99d12413029a22efcc..8947f20de321d7e52ea5b85cf7fb0843ca9d5470 100644 (file)
--- a/src/arch/i386/init/crt0_prologue.inc
+++ b/src/arch/i386/init/crt0_prologue.inc
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
 /*
  * This file is part of the coreboot project.

- * 
+ *

  * Copyright (C) 2002 Eric Biederman
  *
  * This program is free software; you can redistribute it and/or modify
  * Copyright (C) 2002 Eric Biederman
  *
  * This program is free software; you can redistribute it and/or modify

diff --git a/src/arch/i386/init/crt0_romcc_epilogue.inc b/src/arch/i386/init/crt0_romcc_epilogue.inc
index 73107c913b6b172a121a05e5724c2d9b900da4a4..3bd1b369924f6068fc0cd38224b8a52c90edb412 100644 (file)
--- a/src/arch/i386/init/crt0_romcc_epilogue.inc
+++ b/src/arch/i386/init/crt0_romcc_epilogue.inc
@@ -1,4 +1,4 @@
-/* 
+/*

  * Copyright 2002 Eric Biederman
  *
  * This file is free software; you can redistribute it and/or
  * Copyright 2002 Eric Biederman
  *
  * This file is free software; you can redistribute it and/or


@@ -11,7 +11,7 @@
 __main:
        post_code(0x11)
        cld                     /* clear direction flag */
 __main:
        post_code(0x11)
        cld                     /* clear direction flag */

-       
+

        movl    %ebp, %esi
 
        movl $ROMSTAGE_STACK, %esp
        movl    %ebp, %esi
 
        movl $ROMSTAGE_STACK, %esp


@@ -19,7 +19,7 @@ __main:
        pushl %esi
        call copy_and_run
 
        pushl %esi
        call copy_and_run
 

-.Lhlt: 
+.Lhlt:

        post_code(0xee)
        hlt
        jmp     .Lhlt
        post_code(0xee)
        hlt
        jmp     .Lhlt

diff --git a/src/arch/i386/init/ldscript.ld b/src/arch/i386/init/ldscript.ld
index e56f64403426b8421e5285c77fd8c824cfa67f8e..149f0486385df0f5e15c18e073d4080d8881e2de 100644 (file)
--- a/src/arch/i386/init/ldscript.ld
+++ b/src/arch/i386/init/ldscript.ld
@@ -35,6 +35,6 @@ SECTIONS {
                *(.reset)
                 . = 15 ;
                 BYTE(0x00);
                *(.reset)
                 . = 15 ;
                 BYTE(0x00);

-       } 
+       }

 }
 
 }
 

diff --git a/src/arch/i386/lib/cbfs_and_run.c b/src/arch/i386/lib/cbfs_and_run.c
index a6f19e50ee9b026a6e0e1c3884671c8c0fdd70fe..1b86f56371306883490bc4fc8fe0c52abf93465d 100644 (file)
--- a/src/arch/i386/lib/cbfs_and_run.c
+++ b/src/arch/i386/lib/cbfs_and_run.c
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
 /*
  * This file is part of the coreboot project.

- * 
+ *

  * Copyright (C) 2008-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or
  * Copyright (C) 2008-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or

diff --git a/src/arch/i386/lib/cpu.c b/src/arch/i386/lib/cpu.c
index 0e54b9a87d971ab319ab1dad1a5136b9c4ceb1a3..3732ae296e96d7f0573b572d497b0640d27c496c 100644 (file)
--- a/src/arch/i386/lib/cpu.c
+++ b/src/arch/i386/lib/cpu.c
@@ -43,7 +43,7 @@ static int have_cpuid_p(void)
  * by the fact that they preserve the flags across the division of 5/2.
  * PII and PPro exhibit this behavior too, but they have cpuid available.
  */
  * by the fact that they preserve the flags across the division of 5/2.
  * PII and PPro exhibit this behavior too, but they have cpuid available.
  */

- 
+

 /*
  * Perform the Cyrix 5/2 test. A Cyrix won't change
  * the flags, while other 486 chips will.
 /*
  * Perform the Cyrix 5/2 test. A Cyrix won't change
  * the flags, while other 486 chips will.


@@ -68,11 +68,11 @@ static inline int test_cyrix_52div(void)
  *     Detect a NexGen CPU running without BIOS hypercode new enough
  *     to have CPUID. (Thanks to Herbert Oppmann)
  */
  *     Detect a NexGen CPU running without BIOS hypercode new enough
  *     to have CPUID. (Thanks to Herbert Oppmann)
  */

- 
+

 static int deep_magic_nexgen_probe(void)
 {
        int ret;
 static int deep_magic_nexgen_probe(void)
 {
        int ret;

-       
+

        __asm__ __volatile__ (
                "       movw    $0x5555, %%ax\n"
                "       xorw    %%dx,%%dx\n"
        __asm__ __volatile__ (
                "       movw    $0x5555, %%ax\n"
                "       xorw    %%dx,%%dx\n"


@@ -81,7 +81,7 @@ static int deep_magic_nexgen_probe(void)
                "       movl    $0, %%eax\n"
                "       jnz     1f\n"
                "       movl    $1, %%eax\n"
                "       movl    $0, %%eax\n"
                "       jnz     1f\n"
                "       movl    $1, %%eax\n"

-               "1:\n" 
+               "1:\n"

                : "=a" (ret) : : "cx", "dx" );
        return  ret;
 }
                : "=a" (ret) : : "cx", "dx" );
        return  ret;
 }


@@ -95,7 +95,7 @@ static struct {
 } x86_vendors[] = {
        { X86_VENDOR_INTEL,     "GenuineIntel", },
        { X86_VENDOR_CYRIX,     "CyrixInstead", },
 } x86_vendors[] = {
        { X86_VENDOR_INTEL,     "GenuineIntel", },
        { X86_VENDOR_CYRIX,     "CyrixInstead", },

-       { X86_VENDOR_AMD,       "AuthenticAMD", },       
+       { X86_VENDOR_AMD,       "AuthenticAMD", },

        { X86_VENDOR_UMC,       "UMC UMC UMC ", },
        { X86_VENDOR_NEXGEN,    "NexGenDriven", },
        { X86_VENDOR_CENTAUR,   "CentaurHauls", },
        { X86_VENDOR_UMC,       "UMC UMC UMC ", },
        { X86_VENDOR_NEXGEN,    "NexGenDriven", },
        { X86_VENDOR_CENTAUR,   "CentaurHauls", },


@@ -124,7 +124,7 @@ static const char *cpu_vendor_name(int vendor)
        const char *name;
        name = "<invalid cpu vendor>";
        if ((vendor < (ARRAY_SIZE(x86_vendor_name))) &&
        const char *name;
        name = "<invalid cpu vendor>";
        if ((vendor < (ARRAY_SIZE(x86_vendor_name))) &&

-               (x86_vendor_name[vendor] != 0)) 
+               (x86_vendor_name[vendor] != 0))

        {
                name = x86_vendor_name[vendor];
        }
        {
                name = x86_vendor_name[vendor];
        }


@@ -173,7 +173,7 @@ static void identify_cpu(struct device *cpu)
                vendor_name[10] = (result.ecx >> 16) & 0xff;
                vendor_name[11] = (result.ecx >> 24) & 0xff;
                vendor_name[12] = '\0';
                vendor_name[10] = (result.ecx >> 16) & 0xff;
                vendor_name[11] = (result.ecx >> 24) & 0xff;
                vendor_name[12] = '\0';

-               
+

                /* Intel-defined flags: level 0x00000001 */
                if (cpuid_level >= 0x00000001) {
                        cpu->device = cpuid_eax(0x00000001);
                /* Intel-defined flags: level 0x00000001 */
                if (cpuid_level >= 0x00000001) {
                        cpu->device = cpuid_eax(0x00000001);


@@ -200,7 +200,7 @@ static void set_cpu_ops(struct device *cpu)
                struct cpu_device_id *id;
                for(id = driver->id_table; id->vendor != X86_VENDOR_INVALID; id++) {
                        if ((cpu->vendor == id->vendor) &&
                struct cpu_device_id *id;
                for(id = driver->id_table; id->vendor != X86_VENDOR_INVALID; id++) {
                        if ((cpu->vendor == id->vendor) &&

-                               (cpu->device == id->device)) 
+                               (cpu->device == id->device))

                        {
                                goto found;
                        }
                        {
                                goto found;
                        }


@@ -221,7 +221,7 @@ void cpu_initialize(void)
        struct device *cpu;
        struct cpu_info *info;
        struct cpuinfo_x86 c;
        struct device *cpu;
        struct cpu_info *info;
        struct cpuinfo_x86 c;

-       
+

        info = cpu_info();
 
        printk(BIOS_INFO, "Initializing CPU #%ld\n", info->index);
        info = cpu_info();
 
        printk(BIOS_INFO, "Initializing CPU #%ld\n", info->index);


@@ -240,11 +240,11 @@ void cpu_initialize(void)
 
        printk(BIOS_DEBUG, "CPU: family %02x, model %02x, stepping %02x\n",
                c.x86, c.x86_model, c.x86_mask);
 
        printk(BIOS_DEBUG, "CPU: family %02x, model %02x, stepping %02x\n",
                c.x86, c.x86_model, c.x86_mask);

-       
+

        /* Lookup the cpu's operations */
        set_cpu_ops(cpu);
 
        /* Lookup the cpu's operations */
        set_cpu_ops(cpu);
 

-       if(!cpu->ops) { 
+       if(!cpu->ops) {

                /* mask out the stepping and try again */
                cpu->device -= c.x86_mask;
                set_cpu_ops(cpu);
                /* mask out the stepping and try again */
                cpu->device -= c.x86_mask;
                set_cpu_ops(cpu);


@@ -252,7 +252,7 @@ void cpu_initialize(void)
                if(!cpu->ops) die("Unknown cpu");
                printk(BIOS_DEBUG, "Using generic cpu ops (good)\n");
        }
                if(!cpu->ops) die("Unknown cpu");
                printk(BIOS_DEBUG, "Using generic cpu ops (good)\n");
        }

-       
+

 
        /* Initialize the cpu */
        if (cpu->ops && cpu->ops->init) {
 
        /* Initialize the cpu */
        if (cpu->ops && cpu->ops->init) {

diff --git a/src/arch/i386/lib/exception.c b/src/arch/i386/lib/exception.c
index eb1df20e2611cca6e033bdf34653014c0d1c81cb..20917b6f4047a58cac6db63b7fc8afe2d92e18cd 100644 (file)
--- a/src/arch/i386/lib/exception.c
+++ b/src/arch/i386/lib/exception.c
@@ -4,7 +4,7 @@
 #if defined(CONFIG_GDB_STUB) && CONFIG_GDB_STUB == 1
 
 /* BUFMAX defines the maximum number of characters in inbound/outbound buffers.
 #if defined(CONFIG_GDB_STUB) && CONFIG_GDB_STUB == 1
 
 /* BUFMAX defines the maximum number of characters in inbound/outbound buffers.

- * At least NUM_REGBYTES*2 are needed for register packets 
+ * At least NUM_REGBYTES*2 are needed for register packets

  */
 #define BUFMAX 400
 enum regnames {
  */
 #define BUFMAX 400
 enum regnames {


@@ -62,7 +62,7 @@ static uint32_t gdb_stub_registers[NUM_REGS];
 #define GDB_SIGSOUND     42    /* Sound completed */
 #define GDB_SIGSAK       43    /* Secure attention */
 #define GDB_SIGPRIO      44    /* SIGPRIO */
 #define GDB_SIGSOUND     42    /* Sound completed */
 #define GDB_SIGSAK       43    /* Secure attention */
 #define GDB_SIGPRIO      44    /* SIGPRIO */

-                       
+

 #define GDB_SIG33        45    /* Real-time event 33 */
 #define GDB_SIG34        46    /* Real-time event 34 */
 #define GDB_SIG35        47    /* Real-time event 35 */
 #define GDB_SIG33        45    /* Real-time event 33 */
 #define GDB_SIG34        46    /* Real-time event 34 */
 #define GDB_SIG35        47    /* Real-time event 35 */


@@ -375,7 +375,7 @@ void x86_exception(struct eregs *info)
        if (info->vector < ARRAY_SIZE(exception_to_signal)) {
                signo = exception_to_signal[info->vector];
        }
        if (info->vector < ARRAY_SIZE(exception_to_signal)) {
                signo = exception_to_signal[info->vector];
        }

-       
+

        /* reply to the host that an exception has occured */
        out_buffer[0] = 'S';
        out_buffer[1] = hexchars[(signo>>4) & 0xf];
        /* reply to the host that an exception has occured */
        out_buffer[0] = 'S';
        out_buffer[1] = hexchars[(signo>>4) & 0xf];


@@ -412,7 +412,7 @@ void x86_exception(struct eregs *info)
                case 'm':
                        /* mAA..AA,LLLL  Read LLLL bytes at address AA..AA */
                        ptr = &in_buffer[1];
                case 'm':
                        /* mAA..AA,LLLL  Read LLLL bytes at address AA..AA */
                        ptr = &in_buffer[1];

-                       if (    parse_ulong(&ptr, &addr) && 
+                       if (    parse_ulong(&ptr, &addr) &&

                                (*ptr++ == ',') &&
                                parse_ulong(&ptr, &length)) {
                                copy_to_hex(out_buffer, (void *)addr, length);
                                (*ptr++ == ',') &&
                                parse_ulong(&ptr, &length)) {
                                copy_to_hex(out_buffer, (void *)addr, length);


@@ -423,7 +423,7 @@ void x86_exception(struct eregs *info)
                case 'M':
                        /* MAA..AA,LLLL: Write LLLL bytes at address AA.AA return OK */
                        ptr = &in_buffer[1];
                case 'M':
                        /* MAA..AA,LLLL: Write LLLL bytes at address AA.AA return OK */
                        ptr = &in_buffer[1];

-                       if (    parse_ulong(&ptr, &addr) && 
+                       if (    parse_ulong(&ptr, &addr) &&

                                (*(ptr++) == ',') &&
                                parse_ulong(&ptr, &length) &&
                                (*(ptr++) == ':')) {
                                (*(ptr++) == ',') &&
                                parse_ulong(&ptr, &length) &&
                                (*(ptr++) == ':')) {


@@ -475,7 +475,7 @@ void x86_exception(struct eregs *info)
                put_packet(out_buffer);
        }
 #else /* !CONFIG_GDB_STUB */
                put_packet(out_buffer);
        }
 #else /* !CONFIG_GDB_STUB */

-       printk(BIOS_EMERG, 
+       printk(BIOS_EMERG,

                "Unexpected Exception: %d @ %02x:%08x - Halting\n"
                "Code: %d eflags: %08x\n"
                "eax: %08x ebx: %08x ecx: %08x edx: %08x\n"
                "Unexpected Exception: %d @ %02x:%08x - Halting\n"
                "Code: %d eflags: %08x\n"
                "eax: %08x ebx: %08x ecx: %08x edx: %08x\n"

diff --git a/src/arch/i386/lib/id.inc b/src/arch/i386/lib/id.inc
index 9f402f85b06115ccc9daec250724c9b08d9c0a86..443dbad38a7cd551c95aa19e4e68791522620ddb 100644 (file)
--- a/src/arch/i386/lib/id.inc
+++ b/src/arch/i386/lib/id.inc
@@ -2,9 +2,9 @@
 
        .globl __id_start
 __id_start:
 
        .globl __id_start
 __id_start:

-vendor:        
+vendor:

        .asciz CONFIG_MAINBOARD_VENDOR
        .asciz CONFIG_MAINBOARD_VENDOR

-part:          
+part:

        .asciz CONFIG_MAINBOARD_PART_NUMBER
 .long __id_end + CONFIG_ID_SECTION_OFFSET - vendor  /* Reverse offset to the vendor id */
 .long __id_end + CONFIG_ID_SECTION_OFFSET - part    /* Reverse offset to the part number */
        .asciz CONFIG_MAINBOARD_PART_NUMBER
 .long __id_end + CONFIG_ID_SECTION_OFFSET - vendor  /* Reverse offset to the vendor id */
 .long __id_end + CONFIG_ID_SECTION_OFFSET - part    /* Reverse offset to the part number */

diff --git a/src/arch/i386/lib/ioapic.c b/src/arch/i386/lib/ioapic.c
index efc2ac52fc2512d33a54efe9dfd71079d9562ebe..d6616f5529274ea15e61b1358331109a68de3fe0 100644 (file)
--- a/src/arch/i386/lib/ioapic.c
+++ b/src/arch/i386/lib/ioapic.c
@@ -40,13 +40,13 @@ void clear_ioapic(u32 ioapic_base)
        u32 low, high;
        u32 i, ioapic_interrupts;
 
        u32 low, high;
        u32 i, ioapic_interrupts;
 

-       printk(BIOS_DEBUG, "IOAPIC: Clearing IOAPIC at 0x%08x\n", ioapic_base); 
+       printk(BIOS_DEBUG, "IOAPIC: Clearing IOAPIC at 0x%08x\n", ioapic_base);

 
        /* Read the available number of interrupts */
        ioapic_interrupts = (io_apic_read(ioapic_base, 1) >> 16) & 0xff;
        if (!ioapic_interrupts || ioapic_interrupts == 0xff)
                ioapic_interrupts = 24;
 
        /* Read the available number of interrupts */
        ioapic_interrupts = (io_apic_read(ioapic_base, 1) >> 16) & 0xff;
        if (!ioapic_interrupts || ioapic_interrupts == 0xff)
                ioapic_interrupts = 24;

-       printk(BIOS_DEBUG, "IOAPIC: %d interrupts\n", ioapic_interrupts); 
+       printk(BIOS_DEBUG, "IOAPIC: %d interrupts\n", ioapic_interrupts);

 
        low = DISABLED;
        high = NONE;
 
        low = DISABLED;
        high = NONE;


@@ -70,15 +70,15 @@ void setup_ioapic(u32 ioapic_base, u8 ioapic_id)
        u32 low, high;
        u32 i, ioapic_interrupts;
 
        u32 low, high;
        u32 i, ioapic_interrupts;
 

-       printk(BIOS_DEBUG, "IOAPIC: Initializing IOAPIC at 0x%08x\n", ioapic_base); 
+       printk(BIOS_DEBUG, "IOAPIC: Initializing IOAPIC at 0x%08x\n", ioapic_base);

        printk(BIOS_DEBUG, "IOAPIC: Bootstrap Processor Local APIC = %02x\n",
                        bsp_lapicid);
 
        if (ioapic_id) {
        printk(BIOS_DEBUG, "IOAPIC: Bootstrap Processor Local APIC = %02x\n",
                        bsp_lapicid);
 
        if (ioapic_id) {

-               printk(BIOS_DEBUG, "IOAPIC: ID = 0x%02x\n", ioapic_id); 
+               printk(BIOS_DEBUG, "IOAPIC: ID = 0x%02x\n", ioapic_id);

                /* Set IOAPIC ID if it has been specified */
                /* Set IOAPIC ID if it has been specified */

-               io_apic_write(ioapic_base, 0x00, 
-                       (io_apic_read(ioapic_base, 0x00) & 0xfff0ffff) | 
+               io_apic_write(ioapic_base, 0x00,
+                       (io_apic_read(ioapic_base, 0x00) & 0xfff0ffff) |

                                (ioapic_id << 24));
        }
 
                                (ioapic_id << 24));
        }
 


@@ -86,7 +86,7 @@ void setup_ioapic(u32 ioapic_base, u8 ioapic_id)
        ioapic_interrupts = (io_apic_read(ioapic_base, 1) >> 16) & 0xff;
        if (!ioapic_interrupts || ioapic_interrupts == 0xff)
                ioapic_interrupts = 24;
        ioapic_interrupts = (io_apic_read(ioapic_base, 1) >> 16) & 0xff;
        if (!ioapic_interrupts || ioapic_interrupts == 0xff)
                ioapic_interrupts = 24;

-       printk(BIOS_DEBUG, "IOAPIC: %d interrupts\n", ioapic_interrupts); 
+       printk(BIOS_DEBUG, "IOAPIC: %d interrupts\n", ioapic_interrupts);

 
 
 // XXX this decision should probably be made elsewhere, and
 
 
 // XXX this decision should probably be made elsewhere, and


@@ -101,11 +101,11 @@ void setup_ioapic(u32 ioapic_base, u8 ioapic_id)
        /* For the Pentium 4 and above APICs deliver their interrupts
         * on the front side bus, enable that.
         */
        /* For the Pentium 4 and above APICs deliver their interrupts
         * on the front side bus, enable that.
         */

-       printk(BIOS_DEBUG, "IOAPIC: Enabling interrupts on FSB\n"); 
+       printk(BIOS_DEBUG, "IOAPIC: Enabling interrupts on FSB\n");

        io_apic_write(ioapic_base, 0x03, io_apic_read(ioapic_base, 0x03) | (1 << 0));
 #endif
 #ifdef IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS
        io_apic_write(ioapic_base, 0x03, io_apic_read(ioapic_base, 0x03) | (1 << 0));
 #endif
 #ifdef IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS

-       printk(BIOS_DEBUG, "IOAPIC: Enabling interrupts on APIC serial bus\n"); 
+       printk(BIOS_DEBUG, "IOAPIC: Enabling interrupts on APIC serial bus\n");

        io_apic_write(ioapic_base, 0x03, 0);
 #endif
 
        io_apic_write(ioapic_base, 0x03, 0);
 #endif
 

diff --git a/src/arch/i386/lib/pci_ops_auto.c b/src/arch/i386/lib/pci_ops_auto.c
index 1f144381ee92bec01707ff0a8466a7cb930ca616..92eedd30fb560f7922d7aafec87dff6a2afe9b55 100644 (file)
--- a/src/arch/i386/lib/pci_ops_auto.c
+++ b/src/arch/i386/lib/pci_ops_auto.c
@@ -33,7 +33,7 @@ static int pci_sanity_check(const struct pci_bus_operations *o)
                vendor = o->read16(&pbus, bus, devfn, PCI_VENDOR_ID);
                if (((class == PCI_CLASS_BRIDGE_HOST) || (class == PCI_CLASS_DISPLAY_VGA)) ||
                        ((vendor == PCI_VENDOR_ID_INTEL) || (vendor == PCI_VENDOR_ID_COMPAQ) ||
                vendor = o->read16(&pbus, bus, devfn, PCI_VENDOR_ID);
                if (((class == PCI_CLASS_BRIDGE_HOST) || (class == PCI_CLASS_DISPLAY_VGA)) ||
                        ((vendor == PCI_VENDOR_ID_INTEL) || (vendor == PCI_VENDOR_ID_COMPAQ) ||

-                               (vendor == PCI_VENDOR_ID_MOTOROLA))) { 
+                               (vendor == PCI_VENDOR_ID_MOTOROLA))) {

                        return 1;
                }
        }
                        return 1;
                }
        }


@@ -54,8 +54,8 @@ static const struct pci_bus_operations *pci_check_direct(void)
                outb(0x01, 0xCFB);
                tmp = inl(0xCF8);
                outl(0x80000000, 0xCF8);
                outb(0x01, 0xCFB);
                tmp = inl(0xCF8);
                outl(0x80000000, 0xCF8);

-               if ((inl(0xCF8) == 0x80000000) && 
-                       pci_sanity_check(&pci_cf8_conf1)) 
+               if ((inl(0xCF8) == 0x80000000) &&
+                       pci_sanity_check(&pci_cf8_conf1))

                {
                        outl(tmp, 0xCF8);
                        printk(BIOS_DEBUG, "PCI: Using configuration type 1\n");
                {
                        outl(tmp, 0xCF8);
                        printk(BIOS_DEBUG, "PCI: Using configuration type 1\n");

diff --git a/src/arch/i386/lib/printk_init.c b/src/arch/i386/lib/printk_init.c
index d3064046f7b51bdc6c944a82ead7ac207b634422..f29ba667f1329b095864acf0a45f3512a2c662e9 100644 (file)
--- a/src/arch/i386/lib/printk_init.c
+++ b/src/arch/i386/lib/printk_init.c
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
 /*
  * This file is part of the coreboot project.

- * 
+ *

  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as
  * published by the Free Software Foundation; version 2 of
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as
  * published by the Free Software Foundation; version 2 of

diff --git a/src/arch/i386/lib/stages.c b/src/arch/i386/lib/stages.c
index 0605abf49b4561c79d4c5e5e36193b0d5c55f693..a6a232a04aa20f3b8e0f59480620382f9f160e7a 100644 (file)
--- a/src/arch/i386/lib/stages.c
+++ b/src/arch/i386/lib/stages.c
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
 /*
  * This file is part of the coreboot project.

- * 
+ *

  * Copyright (C) 2010 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or
  * Copyright (C) 2010 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or

diff --git a/src/arch/i386/llshell/console.inc b/src/arch/i386/llshell/console.inc
index 394d5c4f68422695dbb142ef29539e6ac0b0b691..84f62e3448504d9a1a2813706e6b9865af5e708f 100644 (file)
--- a/src/arch/i386/llshell/console.inc
+++ b/src/arch/i386/llshell/console.inc
@@ -149,7 +149,7 @@ jmp console0
        jz      11f             ; \
        __CONSOLE_INLINE_TX_AL  ; \
        jmp     10b             ; \
        jz      11f             ; \
        __CONSOLE_INLINE_TX_AL  ; \
        jmp     10b             ; \

-11:    
+11:

 
 
 #define CONSOLE_EMERG_TX_CHAR(byte)            __CONSOLE_TX_CHAR(byte)
 
 
 #define CONSOLE_EMERG_TX_CHAR(byte)            __CONSOLE_TX_CHAR(byte)


@@ -234,7 +234,7 @@ jmp console0
 #define CONSOLE_SPEW_INLINE_TX_STRING(string) __CONSOLE_INLINE_TX_STRING(string)
 
        /* uses:        esp, ax, dx */
 #define CONSOLE_SPEW_INLINE_TX_STRING(string) __CONSOLE_INLINE_TX_STRING(string)
 
        /* uses:        esp, ax, dx */

-console_tx_al: 
+console_tx_al:

        __CONSOLE_INLINE_TX_AL
        RETSP
 
        __CONSOLE_INLINE_TX_AL
        RETSP
 


@@ -333,7 +333,7 @@ console_tx_string:
        cmp     $0, %al
        jne     9f
        RETSP
        cmp     $0, %al
        jne     9f
        RETSP

-9:     
+9:

        __CONSOLE_INLINE_TX_AL
        jmp     console_tx_string
 
        __CONSOLE_INLINE_TX_AL
        jmp     console_tx_string
 

diff --git a/src/arch/i386/llshell/llshell.inc b/src/arch/i386/llshell/llshell.inc
index 6f8996717ab0cddedfc3ad5424296d27aeffed86..a66ac150b5fd4888065051e40192424ee141bfea 100644 (file)
--- a/src/arch/i386/llshell/llshell.inc
+++ b/src/arch/i386/llshell/llshell.inc
@@ -27,16 +27,16 @@ jmp llshell_out
 // Designed to be an interactive shell that operates with zero
 // system resources.  For example at initial boot.
 
 // Designed to be an interactive shell that operates with zero
 // system resources.  For example at initial boot.
 

-// to use, jump to label "low_level_shell" 
+// to use, jump to label "low_level_shell"

 // set %esp to the return address for exiting
 
 
 // set %esp to the return address for exiting
 
 

-#define UART_BASEADDR $0x3f8  
+#define UART_BASEADDR $0x3f8

 #define resultreg %esi
 #define subroutinereg %edi
 #define freqtime $2193  // 1.93 * freq
 #define timertime $6000
 #define resultreg %esi
 #define subroutinereg %edi
 #define freqtime $2193  // 1.93 * freq
 #define timertime $6000

-.equ   sys_IOPL, 110           
+.equ   sys_IOPL, 110

 
 // .data
 // .text
 
 // .data
 // .text


@@ -75,9 +75,9 @@ cmds:
 \r\nAll values in hex (0x prefixing ok)  \
 \r\n"
 
 \r\nAll values in hex (0x prefixing ok)  \
 \r\n"
 

-cr:     
+cr:

        .string "\r\n"
        .string "\r\n"

-spaces:     
+spaces:

        .string "   "
 
 // .globl _start
        .string "   "
 
 // .globl _start


@@ -187,7 +187,7 @@ jz  wmemw
 cmp $0x00776d6c,%eax
 jz  wmeml
 cmp $0x0000646d,%eax
 cmp $0x00776d6c,%eax
 jz  wmeml
 cmp $0x0000646d,%eax

-jz  dodmem  
+jz  dodmem

 cmp $0x6d656d74,%eax
 jz  memt                    // mem test
 cmp $0x00727374,%eax
 cmp $0x6d656d74,%eax
 jz  memt                    // mem test
 cmp $0x00727374,%eax


@@ -195,7 +195,7 @@ jz  rst                     // reset
 cmp $0x00525354,%eax
 jz  RST
 cmp $0x62656570,%eax
 cmp $0x00525354,%eax
 jz  RST
 cmp $0x62656570,%eax

-jz  beep   
+jz  beep

 cmp $0x0000646c,%eax
 jz  dodl                    // download to mem <loc> <size>
 cmp $0x006a6d70,%eax
 cmp $0x0000646c,%eax
 jz  dodl                    // download to mem <loc> <size>
 cmp $0x006a6d70,%eax


@@ -203,7 +203,7 @@ jz  jmpto                   // jump to location (eax holds return addr)
 cmp $0x62617564,%eax
 jz  baud                    // change baudrate
 cmp $0x00696e74,%eax
 cmp $0x62617564,%eax
 jz  baud                    // change baudrate
 cmp $0x00696e74,%eax

-jz  doint                   // trigger an interrupt 
+jz  doint                   // trigger an interrupt

 cmp $0x63616c6c,%eax
 jz  callto                  // call assumes memory
 cmp $0x70757368,%eax
 cmp $0x63616c6c,%eax
 jz  callto                  // call assumes memory
 cmp $0x70757368,%eax


@@ -270,7 +270,7 @@ processchar:
 cmp  $0x3A,%al
 jl   subnum
 cmp  $0x47,%al
 cmp  $0x3A,%al
 jl   subnum
 cmp  $0x47,%al

-jl   subcaps 
+jl   subcaps

 //sublc:
 sub  $0x57,%al
 jmp  additupn
 //sublc:
 sub  $0x57,%al
 jmp  additupn


@@ -370,7 +370,7 @@ jmp displaystring
 doneshow1:
 dec %cx
 cmp $0x0,%cx
 doneshow1:
 dec %cx
 cmp $0x0,%cx

-jz  exitdmem 
+jz  exitdmem

 add $0x04,%ebx
 jmp dmemloop
 exitdmem:
 add $0x04,%ebx
 jmp dmemloop
 exitdmem:


@@ -517,7 +517,7 @@ movl $int1a, subroutinereg
 jmp  readnibbles
 int1a:
 mov  resultreg,%eax
 jmp  readnibbles
 int1a:
 mov  resultreg,%eax

-// need to lookup int table? 
+// need to lookup int table?

 // int  %eax
 jmp  readcommand
 
 // int  %eax
 jmp  readcommand
 


@@ -560,7 +560,7 @@ jmp  *subroutinereg
 
 displayhexlinear:
 mov  resultreg,%eax
 
 displayhexlinear:
 mov  resultreg,%eax

-xchg %al,%ah     
+xchg %al,%ah

 rol  $0x10,%eax
 xchg %al,%ah
 mov  %eax,resultreg
 rol  $0x10,%eax
 xchg %al,%ah
 mov  %eax,resultreg


@@ -602,7 +602,7 @@ jmp  *subroutinereg
 
 displayasciilinear:
 mov  resultreg,%eax
 
 displayasciilinear:
 mov  resultreg,%eax

-xchg %al,%ah     
+xchg %al,%ah

 rol  $0x10,%eax
 xchg %al,%ah
 mov  %eax,resultreg
 rol  $0x10,%eax
 xchg %al,%ah
 mov  %eax,resultreg

diff --git a/src/arch/i386/llshell/pci.inc b/src/arch/i386/llshell/pci.inc
index eb4d3c3845437d00df8066637090b18381f3e6e9..7cb741008e083d43ff0be15c577c78d6c4c5505b 100644 (file)
--- a/src/arch/i386/llshell/pci.inc
+++ b/src/arch/i386/llshell/pci.inc
@@ -11,7 +11,7 @@
         *
         * Notes:       This routine is optimized for minimal register usage.
         *              And the tricks it does cannot scale beyond writing a single byte.
         *
         * Notes:       This routine is optimized for minimal register usage.
         *              And the tricks it does cannot scale beyond writing a single byte.

-        *               
+        *

         *              What it does is almost simple.
         *              It preserves %eax (baring special bits) until it is written
         *              out to the appropriate port.  And hides the data byte
         *              What it does is almost simple.
         *              It preserves %eax (baring special bits) until it is written
         *              out to the appropriate port.  And hides the data byte


@@ -52,7 +52,7 @@
         * Effects:     writes a single byte to pci config space
         *
         * Notes:       This routine is optimized for minimal register usage.
         * Effects:     writes a single byte to pci config space
         *
         * Notes:       This routine is optimized for minimal register usage.

-        *               
+        *

         *              What it does is almost simple.
         *              It preserves %eax (baring special bits) until it is written
         *              out to the appropriate port.  And hides the least significant
         *              What it does is almost simple.
         *              It preserves %eax (baring special bits) until it is written
         *              out to the appropriate port.  And hides the least significant


@@ -91,7 +91,7 @@
         * Effects:     writes a single byte to pci config space
         *
         * Notes:       This routine is optimized for minimal register usage.
         * Effects:     writes a single byte to pci config space
         *
         * Notes:       This routine is optimized for minimal register usage.

-        *               
+        *

         *              What it does is almost simple.
         *              It preserves %eax (baring special bits) until it is written
         *              out to the appropriate port.  And hides the least significant
         *              What it does is almost simple.
         *              It preserves %eax (baring special bits) until it is written
         *              out to the appropriate port.  And hides the least significant


@@ -118,7 +118,7 @@
 
 
 
 
 
 

-       
+

        /*
         * Macro:       PCI_READ_CONFIG_BYTE
         * Arguments:   %eax address to read from (includes bus, device, function, &offset)
        /*
         * Macro:       PCI_READ_CONFIG_BYTE
         * Arguments:   %eax address to read from (includes bus, device, function, &offset)


@@ -129,7 +129,7 @@
         * Effects:     reads a single byte from pci config space
         *
         * Notes:       This routine is optimized for minimal register usage.
         * Effects:     reads a single byte from pci config space
         *
         * Notes:       This routine is optimized for minimal register usage.

-        *               
+        *

         *              What it does is almost simple.
         *              It preserves %eax (baring special bits) until it is written
         *              out to the appropriate port.  And hides the least significant
         *              What it does is almost simple.
         *              It preserves %eax (baring special bits) until it is written
         *              out to the appropriate port.  And hides the least significant


@@ -165,7 +165,7 @@
         * Effects:     reads a 2 bytes from pci config space
         *
         * Notes:       This routine is optimized for minimal register usage.
         * Effects:     reads a 2 bytes from pci config space
         *
         * Notes:       This routine is optimized for minimal register usage.

-        *               
+        *

         *              What it does is almost simple.
         *              It preserves %eax (baring special bits) until it is written
         *              out to the appropriate port.  And hides the least significant
         *              What it does is almost simple.
         *              It preserves %eax (baring special bits) until it is written
         *              out to the appropriate port.  And hides the least significant


@@ -201,7 +201,7 @@
         * Effects:     reads 4 bytes from pci config space
         *
         * Notes:       This routine is optimized for minimal register usage.
         * Effects:     reads 4 bytes from pci config space
         *
         * Notes:       This routine is optimized for minimal register usage.

-        *               
+        *

         *              What it does is almost simple.
         *              It preserves %eax (baring special bits) until it is written
         *              out to the appropriate port.  And hides the least significant
         *              What it does is almost simple.
         *              It preserves %eax (baring special bits) until it is written
         *              out to the appropriate port.  And hides the least significant

diff --git a/src/arch/i386/llshell/ramtest.inc b/src/arch/i386/llshell/ramtest.inc
index 910f01608f03f8fc1219009c2f8f8fb90a2a6c29..c02cf451eceb06f100f109d30385b077d97275f3 100644 (file)
--- a/src/arch/i386/llshell/ramtest.inc
+++ b/src/arch/i386/llshell/ramtest.inc
@@ -6,7 +6,7 @@
 
        jmp     rt_skip
 #define RAMTEST 1
 
        jmp     rt_skip
 #define RAMTEST 1

-#if RAMTEST    
+#if RAMTEST

        .section ".rom.data"
 
 rt_test:       .string "Testing SDRAM : "
        .section ".rom.data"
 
 rt_test:       .string "Testing SDRAM : "


@@ -16,7 +16,7 @@ rt_toomany:   .string "Too many errors.\r\n"
 rt_done:       .string "Done.\r\n"
        .previous
 #endif
 rt_done:       .string "Done.\r\n"
        .previous
 #endif

-       
+

 ramtest:
 #if RAMTEST
        mov %eax, %esi
 ramtest:
 #if RAMTEST
        mov %eax, %esi


@@ -41,7 +41,7 @@ ramtest:
 
        /* Display address being filled */
        /* CONSOLE_INFO_TX_HEX32(arg) will overwrite %ebx with arg */
 
        /* Display address being filled */
        /* CONSOLE_INFO_TX_HEX32(arg) will overwrite %ebx with arg */

-       
+

        CONSOLE_INFO_TX_HEX32(%ebx)
        CONSOLE_INFO_TX_CHAR($'\r')
 2:
        CONSOLE_INFO_TX_HEX32(%ebx)
        CONSOLE_INFO_TX_CHAR($'\r')
 2:


@@ -110,7 +110,7 @@ ramtest:
        sub $1, %ecx
        jz 5f
        jmp 3b
        sub $1, %ecx
        jz 5f
        jmp 3b

-5:     
+5:

        CONSOLE_INFO_TX_STRING($rt_toomany)
        post_code(0xf1)
        jmp     .Lhlt
        CONSOLE_INFO_TX_STRING($rt_toomany)
        post_code(0xf1)
        jmp     .Lhlt

diff --git a/src/boot/hardwaremain.c b/src/boot/hardwaremain.c
index 686b09576fbec249cc96383de33b7ea454514037..061bffdad469a58b2e463b2b74a1014c95e61389 100644 (file)
--- a/src/boot/hardwaremain.c
+++ b/src/boot/hardwaremain.c
@@ -45,10 +45,10 @@ it with the version available from LANL.
 /**
  * @brief Main function of the RAM part of coreboot.
  *
 /**
  * @brief Main function of the RAM part of coreboot.
  *

- * Coreboot is divided into Pre-RAM part and RAM part. 
- * 
+ * Coreboot is divided into Pre-RAM part and RAM part.
+ *

  * Device Enumeration:
  * Device Enumeration:

- *     In the dev_enumerate() phase, 
+ *     In the dev_enumerate() phase,

  */
 
 void hardwaremain(int boot_complete);
  */
 
 void hardwaremain(int boot_complete);


@@ -61,10 +61,10 @@ void hardwaremain(int boot_complete)
 
        /* console_init() MUST PRECEDE ALL printk()! */
        console_init();
 
        /* console_init() MUST PRECEDE ALL printk()! */
        console_init();

-       
+

        post_code(0x39);
 
        post_code(0x39);
 

-       printk(BIOS_NOTICE, "coreboot-%s%s %s %s...\n", 
+       printk(BIOS_NOTICE, "coreboot-%s%s %s %s...\n",

                      coreboot_version, coreboot_extra_version, coreboot_build,
                      (boot_complete)?"rebooting":"booting");
 
                      coreboot_version, coreboot_extra_version, coreboot_build,
                      (boot_complete)?"rebooting":"booting");
 


@@ -76,7 +76,7 @@ void hardwaremain(int boot_complete)
        }
 
        /* FIXME: Is there a better way to handle this? */
        }
 
        /* FIXME: Is there a better way to handle this? */

-       init_timer(); 
+       init_timer();

 
        /* Find the devices we don't have hard coded knowledge about. */
        dev_enumerate();
 
        /* Find the devices we don't have hard coded knowledge about. */
        dev_enumerate();

diff --git a/src/console/Kconfig b/src/console/Kconfig
index 86d75754cde2afcfcd00b0d85aef4005761b4af8..b9d6f6925398307c45e70b39277e62ca6d48dbb7 100644 (file)
--- a/src/console/Kconfig
+++ b/src/console/Kconfig
@@ -98,7 +98,7 @@ config USBDEBUG_DIRECT
 
          It also requires a USB2 controller which supports the EHCI
          Debug Port capability. Controllers which are known to work:
 
          It also requires a USB2 controller which supports the EHCI
          Debug Port capability. Controllers which are known to work:

-       
+

            * 10b9:5239 ALi Corporation USB 2.0 (USB PCI card)
            * 8086:24cd Intel ICH4/ICH4-M
            * 8086:24dd Intel ICH5
            * 10b9:5239 ALi Corporation USB 2.0 (USB PCI card)
            * 8086:24cd Intel ICH4/ICH4-M
            * 8086:24dd Intel ICH5

diff --git a/src/console/btext_console.c b/src/console/btext_console.c
index b1b10e63cbbb885b4f9f7ee8f4a8f98363acec2f..56d893e36ebfb97ce8c451596936922bc546ccf3 100644 (file)
--- a/src/console/btext_console.c
+++ b/src/console/btext_console.c
@@ -62,8 +62,8 @@ u32 boot_text_mapped;
 
 boot_infos_t disp_bi;
 
 
 boot_infos_t disp_bi;
 

-#define BTEXT          
-#define BTDATA 
+#define BTEXT
+#define BTDATA

 
 
 /* This function will enable the early boot text when doing OF booting. This
 
 
 /* This function will enable the early boot text when doing OF booting. This


@@ -100,7 +100,7 @@ btext_setup_display(u32 width, u32 height, u32 depth, u32 pitch,
  *    changes.
  */
 
  *    changes.
  */
 

-void 
+void

 map_boot_text(void)
 {
 #if 0
 map_boot_text(void)
 {
 #if 0


@@ -111,9 +111,9 @@ map_boot_text(void)
                return;
        base = ((unsigned long) bi->dispDeviceBase) & 0xFFFFF000UL;
        offset = ((unsigned long) bi->dispDeviceBase) - base;
                return;
        base = ((unsigned long) bi->dispDeviceBase) & 0xFFFFF000UL;
        offset = ((unsigned long) bi->dispDeviceBase) - base;

-       size = bi->dispDeviceRowBytes * bi->dispDeviceRect[3] + offset 
+       size = bi->dispDeviceRowBytes * bi->dispDeviceRect[3] + offset

                + bi->dispDeviceRect[0];
                + bi->dispDeviceRect[0];

-       bi->logicalDisplayBase = ioremap(base,0x800000 ); 
+       bi->logicalDisplayBase = ioremap(base,0x800000 );

        if (bi->logicalDisplayBase == 0)
                return;
 //     bi->logicalDisplayBase += offset;
        if (bi->logicalDisplayBase == 0)
                return;
 //     bi->logicalDisplayBase += offset;


@@ -360,7 +360,7 @@ static u32 expand_bits_8[16] BTDATA = {
     0x0000ffff,0xff00ffff,0x00ffffff,0xffffffff
 #else
 #error FIXME: No endianness??
     0x0000ffff,0xff00ffff,0x00ffffff,0xffffffff
 #else
 #error FIXME: No endianness??

-#endif                      
+#endif

 };
 #if 0
 static const u32 expand_bits_16[4] BTDATA = {
 };
 #if 0
 static const u32 expand_bits_16[4] BTDATA = {

diff --git a/src/console/console.c b/src/console/console.c
index 327ad19017a5340b0f43e820051d418918bdf7c9..016c3b966431598a08efe1e2a321bb643965226f 100644 (file)
--- a/src/console/console.c
+++ b/src/console/console.c
@@ -1,5 +1,5 @@
 /*
 /*

- * Bootstrap code for the INTEL 
+ * Bootstrap code for the INTEL

  */
 
 #include <console/console.h>
  */
 
 #include <console/console.h>


@@ -18,7 +18,7 @@ void console_init(void)
        struct console_driver *driver;
        if(get_option(&console_loglevel, "debug_level"))
                console_loglevel=CONFIG_DEFAULT_CONSOLE_LOGLEVEL;
        struct console_driver *driver;
        if(get_option(&console_loglevel, "debug_level"))
                console_loglevel=CONFIG_DEFAULT_CONSOLE_LOGLEVEL;

-       
+

        for(driver = console_drivers; driver < econsole_drivers; driver++) {
                if (!driver->init)
                        continue;
        for(driver = console_drivers; driver < econsole_drivers; driver++) {
                if (!driver->init)
                        continue;


@@ -38,7 +38,7 @@ void console_tx_flush(void)
 {
        struct console_driver *driver;
        for(driver = console_drivers; driver < econsole_drivers; driver++) {
 {
        struct console_driver *driver;
        for(driver = console_drivers; driver < econsole_drivers; driver++) {

-               if (!driver->tx_flush) 
+               if (!driver->tx_flush)

                        continue;
                driver->tx_flush();
        }
                        continue;
                driver->tx_flush();
        }


@@ -99,7 +99,7 @@ void __attribute__((noreturn)) die(const char *msg)
 
 void console_init(void)
 {
 
 void console_init(void)
 {

-       static const char console_test[] = 
+       static const char console_test[] =

                "\n\ncoreboot-"
                COREBOOT_VERSION
                COREBOOT_EXTRA_VERSION
                "\n\ncoreboot-"
                COREBOOT_VERSION
                COREBOOT_EXTRA_VERSION

diff --git a/src/console/logbuf_console.c b/src/console/logbuf_console.c
index 3b6c7445035317b03b1d79bed3c476c67f583994..a76791d542fcc81ab8265dc51fe431327a22cf8c 100644 (file)
--- a/src/console/logbuf_console.c
+++ b/src/console/logbuf_console.c
@@ -2,7 +2,7 @@
 
 #define LOGBUF_SIZE  1024
 
 
 #define LOGBUF_SIZE  1024
 

-// KEEP THIS GLOBAL. 
+// KEEP THIS GLOBAL.

 // I need the address so I can watch it with the ARIUM hardware. RGM.
 char logbuf[LOGBUF_SIZE];
 int logbuf_offset = 0;
 // I need the address so I can watch it with the ARIUM hardware. RGM.
 char logbuf[LOGBUF_SIZE];
 int logbuf_offset = 0;

diff --git a/src/console/uart8250_console.c b/src/console/uart8250_console.c
index fd71ff7dc2253acae12c09b0546be68b5b53cbea..20deaa72e3f70ffe2b52cbd739ef81d2118e5496 100644 (file)
--- a/src/console/uart8250_console.c
+++ b/src/console/uart8250_console.c
@@ -38,17 +38,17 @@ static void ttyS0_init(void)
        uart8250_init(CONFIG_TTYS0_BASE, divisor, CONFIG_TTYS0_LCS);
 }
 
        uart8250_init(CONFIG_TTYS0_BASE, divisor, CONFIG_TTYS0_LCS);
 }
 

-static void ttyS0_tx_byte(unsigned char data) 
+static void ttyS0_tx_byte(unsigned char data)

 {
        uart8250_tx_byte(CONFIG_TTYS0_BASE, data);
 }
 
 {
        uart8250_tx_byte(CONFIG_TTYS0_BASE, data);
 }
 

-static unsigned char ttyS0_rx_byte(void) 
+static unsigned char ttyS0_rx_byte(void)

 {
        return uart8250_rx_byte(CONFIG_TTYS0_BASE);
 }
 
 {
        return uart8250_rx_byte(CONFIG_TTYS0_BASE);
 }
 

-static int ttyS0_tst_byte(void) 
+static int ttyS0_tst_byte(void)

 {
        return uart8250_can_rx_byte(CONFIG_TTYS0_BASE);
 }
 {
        return uart8250_can_rx_byte(CONFIG_TTYS0_BASE);
 }

diff --git a/src/console/vsprintf.c b/src/console/vsprintf.c
index 7407c420ab19823dec07923bf2002bc153a34642..4a745233b918257fc65fd589d42f0fd09a71d62e 100644 (file)
--- a/src/console/vsprintf.c
+++ b/src/console/vsprintf.c
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
 /*
  * This file is part of the coreboot project.

- * 
+ *

  * Copyright (C) 2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or
  * Copyright (C) 2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or

diff --git a/src/console/vtxprintf.c b/src/console/vtxprintf.c
index 3c75e3d7041d97bcbf5816fb52a05fb498627151..944fd5b96f348f9cf14d2065ff8730da04dae1ed 100644 (file)
--- a/src/console/vtxprintf.c
+++ b/src/console/vtxprintf.c
@@ -30,7 +30,7 @@ static int skip_atoi(const char **s)
 #define SPECIAL        32              /* 0x */
 #define LARGE  64              /* use 'ABCDEF' instead of 'abcdef' */
 
 #define SPECIAL        32              /* 0x */
 #define LARGE  64              /* use 'ABCDEF' instead of 'abcdef' */
 

-static int number(void (*tx_byte)(unsigned char byte), 
+static int number(void (*tx_byte)(unsigned char byte),

        unsigned long long num, int base, int size, int precision, int type)
 {
        char c,sign,tmp[66];
        unsigned long long num, int base, int size, int precision, int type)
 {
        char c,sign,tmp[66];


@@ -112,7 +112,7 @@ int vtxprintf(void (*tx_byte)(unsigned char byte), const char *fmt, va_list args
        int precision;          /* min. # of digits for integers; max
                                   number of chars for from string */
        int qualifier;          /* 'h', 'l', or 'L' for integer fields */
        int precision;          /* min. # of digits for integers; max
                                   number of chars for from string */
        int qualifier;          /* 'h', 'l', or 'L' for integer fields */

-       
+

        int count;
 
        for (count=0; *fmt ; ++fmt) {
        int count;
 
        for (count=0; *fmt ; ++fmt) {


@@ -120,7 +120,7 @@ int vtxprintf(void (*tx_byte)(unsigned char byte), const char *fmt, va_list args
                        tx_byte(*fmt), count++;
                        continue;
                }
                        tx_byte(*fmt), count++;
                        continue;
                }

-                       
+

                /* process flags */
                flags = 0;
                repeat:
                /* process flags */
                flags = 0;
                repeat:


@@ -132,7 +132,7 @@ int vtxprintf(void (*tx_byte)(unsigned char byte), const char *fmt, va_list args
                                case '#': flags |= SPECIAL; goto repeat;
                                case '0': flags |= ZEROPAD; goto repeat;
                                }
                                case '#': flags |= SPECIAL; goto repeat;
                                case '0': flags |= ZEROPAD; goto repeat;
                                }

-               
+

                /* get field width */
                field_width = -1;
                if (is_digit(*fmt))
                /* get field width */
                field_width = -1;
                if (is_digit(*fmt))


@@ -150,7 +150,7 @@ int vtxprintf(void (*tx_byte)(unsigned char byte), const char *fmt, va_list args
                /* get the precision */
                precision = -1;
                if (*fmt == '.') {
                /* get the precision */
                precision = -1;
                if (*fmt == '.') {

-                       ++fmt;  
+                       ++fmt;

                        if (is_digit(*fmt))
                                precision = skip_atoi(&fmt);
                        else if (*fmt == '*') {
                        if (is_digit(*fmt))
                                precision = skip_atoi(&fmt);
                        else if (*fmt == '*') {

diff --git a/src/cpu/amd/dualcore/Makefile.inc b/src/cpu/amd/dualcore/Makefile.inc
index ee2d93c9284779109325836dca9ea9dfd244babc..8b6d688300fcc4d3366f5b00d082f39005415873 100644 (file)
--- a/src/cpu/amd/dualcore/Makefile.inc
+++ b/src/cpu/amd/dualcore/Makefile.inc
@@ -1,2 +1,2 @@
-# This is a leaf Makefile, no conditionals. If it is included it will be used. 
+# This is a leaf Makefile, no conditionals. If it is included it will be used.

 obj-y += amd_sibling.o
 obj-y += amd_sibling.o

diff --git a/src/cpu/amd/dualcore/amd_sibling.c b/src/cpu/amd/dualcore/amd_sibling.c
index 28a813c6a56f4021df6099507b2da4b3de15381b..af96265d6c3dfd6e8a3093502f667e09e09c297b 100644 (file)
--- a/src/cpu/amd/dualcore/amd_sibling.c
+++ b/src/cpu/amd/dualcore/amd_sibling.c
@@ -27,12 +27,12 @@ static int get_max_siblings(int nodes)
        for(nodeid=0; nodeid<nodes; nodeid++){
                int j;
                dev = dev_find_slot(0, PCI_DEVFN(0x18+nodeid, 3));
        for(nodeid=0; nodeid<nodes; nodeid++){
                int j;
                dev = dev_find_slot(0, PCI_DEVFN(0x18+nodeid, 3));

-               j = (pci_read_config32(dev, 0xe8) >> 12) & 3; 
+               j = (pci_read_config32(dev, 0xe8) >> 12) & 3;

                if(siblings < j) {
                        siblings = j;
                }
        }
                if(siblings < j) {
                        siblings = j;
                }
        }

-       
+

        return siblings;
 }
 
        return siblings;
 }
 


@@ -47,7 +47,7 @@ static void enable_apic_ext_id(int nodes)
                 dev = dev_find_slot(0, PCI_DEVFN(0x18+nodeid, 0));
                 val = pci_read_config32(dev, 0x68);
                val |= (1<<17)|(1<<18);
                 dev = dev_find_slot(0, PCI_DEVFN(0x18+nodeid, 0));
                 val = pci_read_config32(dev, 0x68);
                val |= (1<<17)|(1<<18);

-               pci_write_config32(dev, 0x68, val); 
+               pci_write_config32(dev, 0x68, val);

         }
 }
 
         }
 }
 


@@ -70,9 +70,9 @@ unsigned get_apicid_base(unsigned ioapic_num)
        siblings = get_max_siblings(nodes);
 
        if(bsp_apic_id > 0) { // io apic could start from 0
        siblings = get_max_siblings(nodes);
 
        if(bsp_apic_id > 0) { // io apic could start from 0

-               return 0;  
+               return 0;

        } else if(pci_read_config32(dev, 0x68) & ( (1<<17) | (1<<18)) )  { // enabled ext id but bsp = 0
        } else if(pci_read_config32(dev, 0x68) & ( (1<<17) | (1<<18)) )  { // enabled ext id but bsp = 0

-               return 1; 
+               return 1;

        }
 
        nb_cfg_54 = read_nb_cfg_54();
        }
 
        nb_cfg_54 = read_nb_cfg_54();


@@ -100,7 +100,7 @@ unsigned get_apicid_base(unsigned ioapic_num)
 
                //4:10 for two way  8:12 for four way 16:16 for eight way
                //Use CONFIG_MAX_PHYSICAL_CPUS instead of nodes for better consistency?
 
                //4:10 for two way  8:12 for four way 16:16 for eight way
                //Use CONFIG_MAX_PHYSICAL_CPUS instead of nodes for better consistency?

-               apicid_base = nb_cfg_54 ? (siblings+1) * nodes :  8 * siblings + nodes; 
+               apicid_base = nb_cfg_54 ? (siblings+1) * nodes :  8 * siblings + nodes;

 
        }
        else {
 
        }
        else {


@@ -112,7 +112,7 @@ unsigned get_apicid_base(unsigned ioapic_num)
                printk(BIOS_INFO, "if the IO APIC device doesn't support 256 apic id, \n you need to set CONFIG_ENABLE_APIC_EXT_ID in romstage.c so you can spare 16 id for ioapic\n");
                enable_apic_ext_id(nodes);
        }
                printk(BIOS_INFO, "if the IO APIC device doesn't support 256 apic id, \n you need to set CONFIG_ENABLE_APIC_EXT_ID in romstage.c so you can spare 16 id for ioapic\n");
                enable_apic_ext_id(nodes);
        }

-       
+

        return apicid_base;
 }
 
        return apicid_base;
 }
 


@@ -145,7 +145,7 @@ void amd_sibling_init(device_t cpu)
                siblings);
 #endif
 
                siblings);
 #endif
 

-       nb_cfg_54 = read_nb_cfg_54(); 
+       nb_cfg_54 = read_nb_cfg_54();

 #if 1
        id = get_node_core_id(nb_cfg_54); // pre e0 nb_cfg_54 can not be set
 
 #if 1
        id = get_node_core_id(nb_cfg_54); // pre e0 nb_cfg_54 can not be set
 


@@ -159,7 +159,7 @@ void amd_sibling_init(device_t cpu)
                 return;
        }
 #endif
                 return;
        }
 #endif

-               
+

        /* I am the primary cpu start up my siblings */
 
        for(i = 1; i <= siblings; i++) {
        /* I am the primary cpu start up my siblings */
 
        for(i = 1; i <= siblings; i++) {


@@ -191,7 +191,7 @@ void amd_sibling_init(device_t cpu)
                 new->path.apic.core_id = i;
 
 #if 1
                 new->path.apic.core_id = i;
 
 #if 1

-               printk(BIOS_DEBUG, "CPU: %u has sibling %u\n", 
+               printk(BIOS_DEBUG, "CPU: %u has sibling %u\n",

                        cpu->path.apic.apic_id,
                        new->path.apic.apic_id);
 #endif
                        cpu->path.apic.apic_id,
                        new->path.apic.apic_id);
 #endif

diff --git a/src/cpu/amd/dualcore/dualcore_id.c b/src/cpu/amd/dualcore/dualcore_id.c
index a2b180b2b67630961eb5f448fc042ad9fe654e81..9a1a9c53d4040562e5d21a257c5c116f43ca5714 100644 (file)
--- a/src/cpu/amd/dualcore/dualcore_id.c
+++ b/src/cpu/amd/dualcore/dualcore_id.c
@@ -14,7 +14,7 @@ unsigned int read_nb_cfg_54(void)
         return ( ( msr.hi >> (54-32)) & 1);
 }
 
         return ( ( msr.hi >> (54-32)) & 1);
 }
 

-static inline unsigned get_initial_apicid(void) 
+static inline unsigned get_initial_apicid(void)

 {
        return ((cpuid_ebx(1) >> 24) & 0xf);
 }
 {
        return ((cpuid_ebx(1) >> 24) & 0xf);
 }


@@ -22,7 +22,7 @@ static inline unsigned get_initial_apicid(void)
 //called by amd_siblings too
 #define CORE_ID_BIT 1
 #define NODE_ID_BIT 3
 //called by amd_siblings too
 #define CORE_ID_BIT 1
 #define NODE_ID_BIT 3

-struct node_core_id get_node_core_id(unsigned nb_cfg_54) 
+struct node_core_id get_node_core_id(unsigned nb_cfg_54)

 {
        struct node_core_id id;
        //    get the apicid via cpuid(1) ebx[27:24]
 {
        struct node_core_id id;
        //    get the apicid via cpuid(1) ebx[27:24]


@@ -31,8 +31,8 @@ struct node_core_id get_node_core_id(unsigned nb_cfg_54)
                 id.coreid = (cpuid_ebx(1) >> 24) & 0xf;
                 id.nodeid = (id.coreid>>CORE_ID_BIT);
                 id.coreid &= ((1<<CORE_ID_BIT)-1);
                 id.coreid = (cpuid_ebx(1) >> 24) & 0xf;
                 id.nodeid = (id.coreid>>CORE_ID_BIT);
                 id.coreid &= ((1<<CORE_ID_BIT)-1);

-        } 
-       else 
+        }
+       else

        {
                 // when NB_CFG[54] is clear, nodeid = ebx[26:24], coreid = ebx[27]
                 id.nodeid = (cpuid_ebx(1) >> 24) & 0xf;
        {
                 // when NB_CFG[54] is clear, nodeid = ebx[26:24], coreid = ebx[27]
                 id.nodeid = (cpuid_ebx(1) >> 24) & 0xf;

diff --git a/src/cpu/amd/model_10xxx/Makefile.inc b/src/cpu/amd/model_10xxx/Makefile.inc
index d0beb04c98341503440dab219b14382b1f28f4ed..db3debce2e2ee071cba13c266177bacd3e917208 100644 (file)
--- a/src/cpu/amd/model_10xxx/Makefile.inc
+++ b/src/cpu/amd/model_10xxx/Makefile.inc
@@ -1,4 +1,4 @@
-# no conditionals here. If you include this file from a socket, then you get all the binaries. 
+# no conditionals here. If you include this file from a socket, then you get all the binaries.

 driver-y += model_10xxx_init.o
 obj-y += update_microcode.o
 obj-y += apic_timer.o
 driver-y += model_10xxx_init.o
 obj-y += update_microcode.o
 obj-y += apic_timer.o

diff --git a/src/cpu/amd/model_10xxx/mc_patch_01000095.h b/src/cpu/amd/model_10xxx/mc_patch_01000095.h
index 1227f310f1446e9dbad7b84abe55a84638da7158..bfb2e107f7dc9b844cb6ca759b2913e7f35250de 100644 (file)
--- a/src/cpu/amd/model_10xxx/mc_patch_01000095.h
+++ b/src/cpu/amd/model_10xxx/mc_patch_01000095.h
@@ -112,7 +112,7 @@
 0x0f, 0xe0, 0xdf, 0xf0, 0x23, 0x03, 0x00, 0x8e, 0x03, 0xff, 0x00, 0xfe,
 0x7f, 0x00, 0xff, 0x86, 0x0f, 0xfc, 0x03, 0xf8, 0xfe, 0x01, 0xfc, 0x1b,
 0x3f, 0xf0, 0x0f, 0xe0, 0xf8, 0x07, 0xf0, 0x6f, 0xff, 0xef, 0x01, 0x80,
 0x0f, 0xe0, 0xdf, 0xf0, 0x23, 0x03, 0x00, 0x8e, 0x03, 0xff, 0x00, 0xfe,
 0x7f, 0x00, 0xff, 0x86, 0x0f, 0xfc, 0x03, 0xf8, 0xfe, 0x01, 0xfc, 0x1b,
 0x3f, 0xf0, 0x0f, 0xe0, 0xf8, 0x07, 0xf0, 0x6f, 0xff, 0xef, 0x01, 0x80,

-    
+

 
 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 
 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,

diff --git a/src/cpu/amd/model_10xxx/model_10xxx_init.c b/src/cpu/amd/model_10xxx/model_10xxx_init.c
index 5a19547b4d89affea76f7cf3ae6b067a15db69f6..992c9579131f43192eb64786f7515a9b78c81c19 100644 (file)
--- a/src/cpu/amd/model_10xxx/model_10xxx_init.c
+++ b/src/cpu/amd/model_10xxx/model_10xxx_init.c
@@ -134,12 +134,12 @@ static struct cpu_device_id cpu_table[] = {
        { X86_VENDOR_AMD, 0x100f22 },
        { X86_VENDOR_AMD, 0x100f23 },
        { X86_VENDOR_AMD, 0x100f40 },           /* RB-C0 */
        { X86_VENDOR_AMD, 0x100f22 },
        { X86_VENDOR_AMD, 0x100f23 },
        { X86_VENDOR_AMD, 0x100f40 },           /* RB-C0 */

-       { X86_VENDOR_AMD, 0x100F42 },           /* RB-C2 */ 
-       { X86_VENDOR_AMD, 0x100F43 },           /* RB-C3 */ 
-       { X86_VENDOR_AMD, 0x100F52 },           /* BL-C2 */ 
-       { X86_VENDOR_AMD, 0x100F62 },           /* DA-C2 */ 
-       { X86_VENDOR_AMD, 0x100F63 },           /* DA-C3 */ 
-       { X86_VENDOR_AMD, 0x100F80 },           /* HY-D0 */ 
+       { X86_VENDOR_AMD, 0x100F42 },           /* RB-C2 */
+       { X86_VENDOR_AMD, 0x100F43 },           /* RB-C3 */
+       { X86_VENDOR_AMD, 0x100F52 },           /* BL-C2 */
+       { X86_VENDOR_AMD, 0x100F62 },           /* DA-C2 */
+       { X86_VENDOR_AMD, 0x100F63 },           /* DA-C3 */
+       { X86_VENDOR_AMD, 0x100F80 },           /* HY-D0 */

        { 0, 0 },
 };
 
        { 0, 0 },
 };
 

diff --git a/src/cpu/amd/model_fxx/Makefile.inc b/src/cpu/amd/model_fxx/Makefile.inc
index ea3088b46a2a1335b1a6915db3d15ac9b48df0cb..d7490e8fa9d26c472c34078c62c5618d0bb776bb 100644 (file)
--- a/src/cpu/amd/model_fxx/Makefile.inc
+++ b/src/cpu/amd/model_fxx/Makefile.inc
@@ -1,4 +1,4 @@
-# no conditionals here. If you include this file from a socket, then you get all the binaries. 
+# no conditionals here. If you include this file from a socket, then you get all the binaries.

 driver-y += model_fxx_init.o
 obj-y += apic_timer.o
 obj-y += model_fxx_update_microcode.o
 driver-y += model_fxx_init.o
 obj-y += apic_timer.o
 obj-y += model_fxx_update_microcode.o

diff --git a/src/cpu/amd/model_fxx/apic_timer.c b/src/cpu/amd/model_fxx/apic_timer.c
index 8eeb32fee960ca52102b63e6fba90a11ec31a7ad..6eb99a4ebadeb5f8b2a2fe7f7c3641a2804f8e93 100644 (file)
--- a/src/cpu/amd/model_fxx/apic_timer.c
+++ b/src/cpu/amd/model_fxx/apic_timer.c
@@ -25,5 +25,5 @@ void udelay(unsigned usecs)
        do {
                value = lapic_read(LAPIC_TMCCT);
        } while((start - value) < ticks);
        do {
                value = lapic_read(LAPIC_TMCCT);
        } while((start - value) < ticks);

-       
+

 }
 }

diff --git a/src/cpu/amd/model_fxx/fidvid.c b/src/cpu/amd/model_fxx/fidvid.c
index edc7ac909c20bcfe17878df3611808d865919ddd..bfbc93d577da1f7e03627ea20a51e2df7452e9fc 100644 (file)
--- a/src/cpu/amd/model_fxx/fidvid.c
+++ b/src/cpu/amd/model_fxx/fidvid.c
@@ -424,7 +424,7 @@ static void init_fidvid_ap(unsigned bsp_apicid, unsigned apicid)
 
 static u32 calc_common_fidvid(unsigned fidvid, unsigned fidvidx)
 {
 
 static u32 calc_common_fidvid(unsigned fidvid, unsigned fidvidx)
 {

-       /* FIXME: need to check the change path to verify if it is reachable 
+       /* FIXME: need to check the change path to verify if it is reachable

         * when common fid is small than 1.6G */
        if ((fidvid & 0xff00) <= (fidvidx & 0xff00)) {
                return fidvid;
         * when common fid is small than 1.6G */
        if ((fidvid & 0xff00) <= (fidvidx & 0xff00)) {
                return fidvid;


@@ -549,7 +549,7 @@ static void init_fidvid_bsp(unsigned bsp_apicid)
        /* let all ap trains to state 1 */
        lapic_write(LAPIC_MSG_REG, (bsp_apicid << 24) | 1);
 
        /* let all ap trains to state 1 */
        lapic_write(LAPIC_MSG_REG, (bsp_apicid << 24) | 1);
 

-       /* calculate the common max fid/vid that could be used for 
+       /* calculate the common max fid/vid that could be used for

         * all APs and BSP */
 #if SET_FIDVID_STORE_AP_APICID_AT_FIRST == 1
        ap_apicidx.num = 0;
         * all APs and BSP */
 #if SET_FIDVID_STORE_AP_APICID_AT_FIRST == 1
        ap_apicidx.num = 0;

diff --git a/src/cpu/amd/model_fxx/microcode_rev_c.h b/src/cpu/amd/model_fxx/microcode_rev_c.h
index f102d37d0f17b2c45d2a27f70236a9b9ff9eb7e9..980572439f1f263da7740bd07dc3918397d85e73 100644 (file)
--- a/src/cpu/amd/model_fxx/microcode_rev_c.h
+++ b/src/cpu/amd/model_fxx/microcode_rev_c.h
@@ -95,7 +95,7 @@
  0xfe, 0x01, 0xfc, 0x1b, 0x3f, 0xf0, 0x0f, 0xe0, 0xf8, 0x07, 0xf0, 0x6f, 0xff, 0xef, 0x01, 0x80,
 
 /* 1088=64 * 17 0 */
  0xfe, 0x01, 0xfc, 0x1b, 0x3f, 0xf0, 0x0f, 0xe0, 0xf8, 0x07, 0xf0, 0x6f, 0xff, 0xef, 0x01, 0x80,
 
 /* 1088=64 * 17 0 */

-0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
+0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,

 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 
 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 
 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,

diff --git a/src/cpu/amd/model_fxx/microcode_rev_d.h b/src/cpu/amd/model_fxx/microcode_rev_d.h
index 7fc0666de6d840edf727a00efedbe978a362db38..61a510c2b28f8173fdd51af1d9f7c9933327c996 100644 (file)
--- a/src/cpu/amd/model_fxx/microcode_rev_d.h
+++ b/src/cpu/amd/model_fxx/microcode_rev_d.h
@@ -94,7 +94,7 @@
  0xdf, 0x03, 0x00, 0xff, 0x03, 0xff, 0x00, 0xfe, 0x7f, 0x00, 0xff, 0x86, 0x0f, 0xfc, 0x03, 0xf8,
  0xfe, 0x01, 0xfc, 0x1b, 0x3f, 0xf0, 0x0f, 0xe0, 0xf8, 0x07, 0xf0, 0x6f, 0xff, 0xef, 0x01, 0x80,
  /* 1088=64 * 17 0 */
  0xdf, 0x03, 0x00, 0xff, 0x03, 0xff, 0x00, 0xfe, 0x7f, 0x00, 0xff, 0x86, 0x0f, 0xfc, 0x03, 0xf8,
  0xfe, 0x01, 0xfc, 0x1b, 0x3f, 0xf0, 0x0f, 0xe0, 0xf8, 0x07, 0xf0, 0x6f, 0xff, 0xef, 0x01, 0x80,
  /* 1088=64 * 17 0 */

-0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
+0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,

 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 
 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 
 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,

diff --git a/src/cpu/amd/model_fxx/microcode_rev_e.h b/src/cpu/amd/model_fxx/microcode_rev_e.h
index 8d9a5813d45b55945615619de3798f3e153b1b33..7cdeed0016d80039a2f1b27e4e6010aef8cb37f3 100644 (file)
--- a/src/cpu/amd/model_fxx/microcode_rev_e.h
+++ b/src/cpu/amd/model_fxx/microcode_rev_e.h
@@ -95,7 +95,7 @@
  0xfe, 0x01, 0xfc, 0x1b, 0x3f, 0xf0, 0x0f, 0xe0, 0xf8, 0x07, 0xf0, 0x6f, 0xff, 0xef, 0x01, 0x80,
 
 /* 1088=64 * 17 0 */
  0xfe, 0x01, 0xfc, 0x1b, 0x3f, 0xf0, 0x0f, 0xe0, 0xf8, 0x07, 0xf0, 0x6f, 0xff, 0xef, 0x01, 0x80,
 
 /* 1088=64 * 17 0 */

-0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
+0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,

 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 
 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 
 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,

diff --git a/src/cpu/amd/model_fxx/model_fxx_update_microcode.c b/src/cpu/amd/model_fxx/model_fxx_update_microcode.c
index 68a2cea070872fc285d704a448098e8363c4db99..976168102baa6f06a008aa16929e18a12137dde6 100644 (file)
--- a/src/cpu/amd/model_fxx/model_fxx_update_microcode.c
+++ b/src/cpu/amd/model_fxx/model_fxx_update_microcode.c
@@ -94,7 +94,7 @@ static unsigned get_equivalent_processor_rev_id(unsigned orig_id) {
        #endif
 
        #if CONFIG_K8_REV_F_SUPPORT == 1
        #endif
 
        #if CONFIG_K8_REV_F_SUPPORT == 1

-       
+

        #endif
 
        };
        #endif
 
        };


@@ -102,7 +102,7 @@ static unsigned get_equivalent_processor_rev_id(unsigned orig_id) {
 
        unsigned new_id;
        int i;
 
        unsigned new_id;
        int i;

-       
+

        new_id = 0;
 
        for(i=0; i<sizeof(id_mapping_table); i+=2 ) {
        new_id = 0;
 
        for(i=0; i<sizeof(id_mapping_table); i+=2 ) {


@@ -112,7 +112,7 @@ static unsigned get_equivalent_processor_rev_id(unsigned orig_id) {
                }
        }
 
                }
        }
 

-       return new_id;  
+       return new_id;

 
 }
 
 
 }
 

diff --git a/src/cpu/amd/model_fxx/processor_name.c b/src/cpu/amd/model_fxx/processor_name.c
index 4d86467632b62838b0e6066d9d44a64a09af5100..8465e3ce3453f40b17a5682d4e921711b0080a5f 100644 (file)
--- a/src/cpu/amd/model_fxx/processor_name.c
+++ b/src/cpu/amd/model_fxx/processor_name.c
@@ -77,7 +77,7 @@ static const char *processor_names[]={
        /* 0x24 */ "AMD Athlon(tm) 64 FX-ZZ Processor",
        /* 0x25 */ NULL,
        /* 0x26 */ "AMD Sempron(tm) Processor TT00+",
        /* 0x24 */ "AMD Athlon(tm) 64 FX-ZZ Processor",
        /* 0x25 */ NULL,
        /* 0x26 */ "AMD Sempron(tm) Processor TT00+",

-       /* 0x27-0x28 */ NULL, NULL, 
+       /* 0x27-0x28 */ NULL, NULL,

        /* 0x29 */ "Dual Core AMD Opteron(tm) Processor 1RR SE",
        /* 0x2A */ "Dual Core AMD Opteron(tm) Processor 2RR SE",
        /* 0x2B */ "Dual Core AMD Opteron(tm) Processor 8RR SE",
        /* 0x29 */ "Dual Core AMD Opteron(tm) Processor 1RR SE",
        /* 0x2A */ "Dual Core AMD Opteron(tm) Processor 2RR SE",
        /* 0x2B */ "Dual Core AMD Opteron(tm) Processor 8RR SE",


@@ -404,13 +404,13 @@ int init_processor_name(void)
 
        memset(program_string, 0, 48);
        strcpy(program_string, processor_name_string);
 
        memset(program_string, 0, 48);
        strcpy(program_string, processor_name_string);

-       
+

        /* Now create a model number - See Table 4. Model Number Calculation
        /* Now create a model number - See Table 4. Model Number Calculation

-        * in the Revision Guide. NOTE: #6, EE was changed to VV because 
+        * in the Revision Guide. NOTE: #6, EE was changed to VV because

         * otherwise it clashes with the brand names.
         */
         * otherwise it clashes with the brand names.
         */

-       
-       for (i=0; i<47; i++) { // 48 -1 
+
+       for (i=0; i<47; i++) { // 48 -1

                if(program_string[i] == program_string[i+1]) {
                        switch (program_string[i]) {
 #if CONFIG_K8_REV_F_SUPPORT == 0
                if(program_string[i] == program_string[i+1]) {
                        switch (program_string[i]) {
 #if CONFIG_K8_REV_F_SUPPORT == 0


@@ -430,11 +430,11 @@ int init_processor_name(void)
                        case 'Y': ModelNumber = 29 + NN; break;
 #endif
                        }
                        case 'Y': ModelNumber = 29 + NN; break;
 #endif
                        }

-                       
+

                        if(ModelNumber && ModelNumber < 100) {
                                // No idea what to do with RR=100. According
                                // to the revision guide this is possible.
                        if(ModelNumber && ModelNumber < 100) {
                                // No idea what to do with RR=100. According
                                // to the revision guide this is possible.

-                               // 
+                               //

                                // --> "AMD Opteron(tm) Processor 8100"?
                                program_string[i]=(ModelNumber/10)+'0';
                                program_string[i+1]=(ModelNumber%10)+'0';
                                // --> "AMD Opteron(tm) Processor 8100"?
                                program_string[i]=(ModelNumber/10)+'0';
                                program_string[i+1]=(ModelNumber%10)+'0';


@@ -442,7 +442,7 @@ int init_processor_name(void)
                        }
                }
        }
                        }
                }
        }

-       
+

        printk(BIOS_DEBUG, "CPU model %s\n", program_string);
 
        for (i=0; i<6; i++) {
        printk(BIOS_DEBUG, "CPU model %s\n", program_string);
 
        for (i=0; i<6; i++) {

diff --git a/src/cpu/amd/model_gx2/cpubug.c b/src/cpu/amd/model_gx2/cpubug.c
index 82570f5b0a26b3b68f7730db566d5bd16c6cf48e..f90066195954871d5f153c9b29e423f675c87301 100644 (file)
--- a/src/cpu/amd/model_gx2/cpubug.c
+++ b/src/cpu/amd/model_gx2/cpubug.c
@@ -50,8 +50,8 @@ pcideadlock(void)
        msr_t msr;
 
        /*
        msr_t msr;
 
        /*

-        * forces serialization of all load misses. Setting this bit prevents the 
-        * DM pipe from backing up if a read request has to be held up waiting 
+        * forces serialization of all load misses. Setting this bit prevents the
+        * DM pipe from backing up if a read request has to be held up waiting

         * for PCI writes to complete.
        */
        msr = rdmsr(CPU_DM_CONFIG0);
         * for PCI writes to complete.
        */
        msr = rdmsr(CPU_DM_CONFIG0);


@@ -61,14 +61,14 @@ pcideadlock(void)
        wrmsr(CPU_DM_CONFIG0, msr);
 
        /* interlock instruction fetches to WS regions with data accesses.
        wrmsr(CPU_DM_CONFIG0, msr);
 
        /* interlock instruction fetches to WS regions with data accesses.

-        * This prevents an instruction fetch from going out to PCI if the 
+        * This prevents an instruction fetch from going out to PCI if the

         * data side is about to make a request.
         */
        msr = rdmsr(CPU_IM_CONFIG);
        msr.lo |= IM_CONFIG_LOWER_QWT_SET;
        wrmsr(CPU_IM_CONFIG, msr);
         * data side is about to make a request.
         */
        msr = rdmsr(CPU_IM_CONFIG);
        msr.lo |= IM_CONFIG_LOWER_QWT_SET;
        wrmsr(CPU_IM_CONFIG, msr);

-       
-       /* write serialize memory hole to PCI. Need to unWS when something is 
+
+       /* write serialize memory hole to PCI. Need to unWS when something is

         * shadowed regardless of cachablility.
         */
        msr.lo = 0x021212121;
         * shadowed regardless of cachablility.
         */
        msr.lo = 0x021212121;


@@ -78,7 +78,7 @@ pcideadlock(void)
        wrmsr( CPU_RCONF_E0_FF, msr);
 }
 
        wrmsr( CPU_RCONF_E0_FF, msr);
 }
 

-/**************************************************************************** 
+/****************************************************************************

  *
  *     CPUbug784
  *
  *
  *     CPUbug784
  *


@@ -176,7 +176,7 @@ eng2900(void)
        wrmsr(0x3003, msr);
 
        /* change this value to zero if you need to disable this BTB SWAPSiF. */
        wrmsr(0x3003, msr);
 
        /* change this value to zero if you need to disable this BTB SWAPSiF. */

-       if (1) { 
+       if (1) {

 
                /* Disable enable_actions in DIAGCTL while setting up GLCP */
                msr.hi = 0;
 
                /* Disable enable_actions in DIAGCTL while setting up GLCP */
                msr.hi = 0;


@@ -192,16 +192,16 @@ eng2900(void)
                msr.lo = 2;
                wrmsr(MSR_GLCP + 0x0016, msr);
 
                msr.lo = 2;
                wrmsr(MSR_GLCP + 0x0016, msr);
 

-               /* The code below sets up the CPU to stall for 4 GeodeLink 
-                * clocks when CPU is snooped.  Because setting XSTATE to 0 
-                * overrides any other XSTATE action, the code will always 
-                * stall for 4 GeodeLink clocks after a snoop request goes 
-                * away even if it occured a clock or two later than a 
-                * different snoop; the stall signal will never 'glitch high' 
+               /* The code below sets up the CPU to stall for 4 GeodeLink
+                * clocks when CPU is snooped.  Because setting XSTATE to 0
+                * overrides any other XSTATE action, the code will always
+                * stall for 4 GeodeLink clocks after a snoop request goes
+                * away even if it occured a clock or two later than a
+                * different snoop; the stall signal will never 'glitch high'

                 * for only one or two CPU clocks with this code.
                 */
 
                 * for only one or two CPU clocks with this code.
                 */
 

-               /* Send mb0 port 3 requests to upper GeodeLink diag bits 
+               /* Send mb0 port 3 requests to upper GeodeLink diag bits

                   [63:32] */
                msr.hi = 0;
                msr.lo = 0x80338041;
                   [63:32] */
                msr.hi = 0;
                msr.lo = 0x80338041;


@@ -222,25 +222,25 @@ eng2900(void)
                msr.lo = 0;
                wrmsr(MSR_GLCP + 0x004D, msr);
 
                msr.lo = 0;
                wrmsr(MSR_GLCP + 0x004D, msr);
 

-               /* Writing action number 13: XSTATE=0 to occur when CPU is 
+               /* Writing action number 13: XSTATE=0 to occur when CPU is

                   snooped unless we're stalled */
                msr.hi = 0;
                msr.lo = 0x00400000;
                wrmsr(MSR_GLCP + 0x0075, msr);
 
                   snooped unless we're stalled */
                msr.hi = 0;
                msr.lo = 0x00400000;
                wrmsr(MSR_GLCP + 0x0075, msr);
 

-               /* Writing action number 11: inc XSTATE every GeodeLink clock 
+               /* Writing action number 11: inc XSTATE every GeodeLink clock

                   unless we're idle */
                msr.hi = 0;
                msr.lo = 0x30000;
                wrmsr(MSR_GLCP + 0x0073, msr);
 
                   unless we're idle */
                msr.hi = 0;
                msr.lo = 0x30000;
                wrmsr(MSR_GLCP + 0x0073, msr);
 

-               /* Writing action number 5: STALL_CPU_PIPE when exitting idle 
+               /* Writing action number 5: STALL_CPU_PIPE when exitting idle

                   state or not in idle state */
                msr.hi = 0;
                msr.lo = 0x00430000;
                wrmsr(MSR_GLCP + 0x006D, msr);
 
                   state or not in idle state */
                msr.hi = 0;
                msr.lo = 0x00430000;
                wrmsr(MSR_GLCP + 0x006D, msr);
 

-               /* Writing DIAGCTL Register to enable the stall action and to 
+               /* Writing DIAGCTL Register to enable the stall action and to

                   let set5m watch the upper GeodeLink diag bits. */
                msr.hi = 0;
                msr.lo = 0x80004000;
                   let set5m watch the upper GeodeLink diag bits. */
                msr.hi = 0;
                msr.lo = 0x80004000;


@@ -338,7 +338,7 @@ static void bug118339(void)
 /***/
 /****************************************************************************/
 static void disablememoryreadorder(void)
 /***/
 /****************************************************************************/
 static void disablememoryreadorder(void)

-{      
+{

        msr_t msr;
        msr = rdmsr(MC_CF8F_DATA);
 
        msr_t msr;
        msr = rdmsr(MC_CF8F_DATA);
 


@@ -365,7 +365,7 @@ cpubug(void)
                case 0x20:
                        pcideadlock();
                        eng1398();
                case 0x20:
                        pcideadlock();
                        eng1398();

-                       /* cs 5530 bug; ignore 
+                       /* cs 5530 bug; ignore

                        bug752();
                        */
                        break;
                        bug752();
                        */
                        break;


@@ -376,7 +376,7 @@ cpubug(void)
                        bug118339();
                        break;
                case 0x22:
                        bug118339();
                        break;
                case 0x22:

-               case 0x30: 
+               case 0x30:

                        break;
                default:
                        printk(BIOS_ERR, "unknown rev %x, bailing\n", rev);
                        break;
                default:
                        printk(BIOS_ERR, "unknown rev %x, bailing\n", rev);

diff --git a/src/cpu/amd/model_gx2/cpureginit.c b/src/cpu/amd/model_gx2/cpureginit.c
index 5e786910c5f4f819836ce0bab67a45ebb69296b9..3cb3cf1a58a549c09529f9d667d833a6e812aa9e 100644 (file)
--- a/src/cpu/amd/model_gx2/cpureginit.c
+++ b/src/cpu/amd/model_gx2/cpureginit.c
@@ -18,7 +18,7 @@ BIST(void){
        msr = rdmsr(msrnum);
        msr.lo |=  DM_CONFIG0_LOWER_DCDIS_SET;
        wrmsr(msrnum, msr);
        msr = rdmsr(msrnum);
        msr.lo |=  DM_CONFIG0_LOWER_DCDIS_SET;
        wrmsr(msrnum, msr);

-       
+

        msr.lo =  0x00000003F;
        msr.hi =  0x000000000;
        msrnum = CPU_DM_BIST;
        msr.lo =  0x00000003F;
        msr.hi =  0x000000000;
        msrnum = CPU_DM_BIST;


@@ -29,7 +29,7 @@ BIST(void){
        msr.lo &= 0x0F3FF0000;
        if (msr.lo != 0xfeff0000)
                goto BISTFail;
        msr.lo &= 0x0F3FF0000;
        if (msr.lo != 0xfeff0000)
                goto BISTFail;

- 
+

        msrnum = CPU_DM_CONFIG0;
        msr = rdmsr(msrnum);
        msr.lo &=  ~ DM_CONFIG0_LOWER_DCDIS_SET;
        msrnum = CPU_DM_CONFIG0;
        msr = rdmsr(msrnum);
        msr.lo &=  ~ DM_CONFIG0_LOWER_DCDIS_SET;


@@ -89,58 +89,58 @@ cpuRegInit (void){
                msr.hi =  0;
                msr.lo = DIAG_SEL1_SET | DIAG_SET0_SET;
                wrmsr(msrnum, msr);
                msr.hi =  0;
                msr.lo = DIAG_SEL1_SET | DIAG_SET0_SET;
                wrmsr(msrnum, msr);

-       
+

                /*  Set up GLCP to grab BTM data.*/
                msrnum = 0x04C00000C;           /*  GLCP_DBGOUT MSR*/
                msr.hi =  0x0;
                msr.lo =  0x08;                 /*  reset value (SCOPE_SEL = 0) causes FIFO toshift out,*/
                wrmsr(msrnum, msr);             /*  exchange it to anything else to prevent this*/
                /*  Set up GLCP to grab BTM data.*/
                msrnum = 0x04C00000C;           /*  GLCP_DBGOUT MSR*/
                msr.hi =  0x0;
                msr.lo =  0x08;                 /*  reset value (SCOPE_SEL = 0) causes FIFO toshift out,*/
                wrmsr(msrnum, msr);             /*  exchange it to anything else to prevent this*/

-       
+

                /* ;Turn off debug clock*/
                msrnum = 0x04C000016;           /* DBG_CLK_CTL*/
                msr.lo =  0x00;                 /* No clock*/
                msr.hi =  0x00;
                wrmsr(msrnum, msr);
                /* ;Turn off debug clock*/
                msrnum = 0x04C000016;           /* DBG_CLK_CTL*/
                msr.lo =  0x00;                 /* No clock*/
                msr.hi =  0x00;
                wrmsr(msrnum, msr);

-       
+

                /* ;Set debug clock to CPU*/
                msrnum = 0x04C000016;           /* DBG_CLK_CTL*/
                msr.lo =  0x01;                 /* CPU CLOCK*/
                msr.hi =  0x00;
                wrmsr(msrnum, msr);
                /* ;Set debug clock to CPU*/
                msrnum = 0x04C000016;           /* DBG_CLK_CTL*/
                msr.lo =  0x01;                 /* CPU CLOCK*/
                msr.hi =  0x00;
                wrmsr(msrnum, msr);

-       
+

                /* ;Set fifo ctl to BTM bits wide*/
                msrnum = 0x04C00005E;           /*  FIFO_CTL*/
                msr.lo =  0x003880000;          /*  Bit [25:24] are size (11=BTM, 10 = 64 bit, 01= 32 bit, 00 = 16bit)*/
                wrmsr(msrnum, msr);     /*  Bit [23:21] are position (100 = CPU downto0)*/
                                                        /*  Bit [19] sets it up in slow data mode.*/
                /* ;Set fifo ctl to BTM bits wide*/
                msrnum = 0x04C00005E;           /*  FIFO_CTL*/
                msr.lo =  0x003880000;          /*  Bit [25:24] are size (11=BTM, 10 = 64 bit, 01= 32 bit, 00 = 16bit)*/
                wrmsr(msrnum, msr);     /*  Bit [23:21] are position (100 = CPU downto0)*/
                                                        /*  Bit [19] sets it up in slow data mode.*/

-       
+

                /* ;enable fifo loading - BTM sizing will constrain*/
                /* ; only valid BTM packets to load - this action should always be on*/
                /* ;enable fifo loading - BTM sizing will constrain*/
                /* ; only valid BTM packets to load - this action should always be on*/

-       
+

                msrnum = 0x04C00006F;           /*  GLCP ACTION7 - load fifo*/
                msr.lo =  0x00000F000;          /*    Any nibble all 1's will always trigger*/
                msr.hi =  0x000000000;          /* */
                wrmsr(msrnum, msr);
                msrnum = 0x04C00006F;           /*  GLCP ACTION7 - load fifo*/
                msr.lo =  0x00000F000;          /*    Any nibble all 1's will always trigger*/
                msr.hi =  0x000000000;          /* */
                wrmsr(msrnum, msr);

-       
+

                /* ;start storing diag data in the fifo*/
                msrnum = 0x04C00005F;           /* DIAG CTL*/
                msr.lo =  0x080000000;          /*  enable actions*/
                msr.hi =  0x000000000;
                wrmsr(msrnum, msr);
                /* ;start storing diag data in the fifo*/
                msrnum = 0x04C00005F;           /* DIAG CTL*/
                msr.lo =  0x080000000;          /*  enable actions*/
                msr.hi =  0x000000000;
                wrmsr(msrnum, msr);

-       
+

                /*  Set up delay on data lines, so that the hold time*/
                /*  is 1 ns.*/
                msrnum = 0x04C00000D ;  /*  GLCP IO DELAY CONTROLS*/
                msr.lo =  0x082b5ad68;
                msr.hi =  0x080ad6b57;  /*  RGB delay = 0x07*/
                wrmsr(msrnum, msr);
                /*  Set up delay on data lines, so that the hold time*/
                /*  is 1 ns.*/
                msrnum = 0x04C00000D ;  /*  GLCP IO DELAY CONTROLS*/
                msr.lo =  0x082b5ad68;
                msr.hi =  0x080ad6b57;  /*  RGB delay = 0x07*/
                wrmsr(msrnum, msr);

-       
+

                /*  Set up DF to output diag information on DF pins.*/
                msrnum = DF_GLD_MSR_MASTER_CONF;
                msr.lo =  0x0220;
                msr.hi = 0;
                wrmsr(msrnum, msr);
                /*  Set up DF to output diag information on DF pins.*/
                msrnum = DF_GLD_MSR_MASTER_CONF;
                msr.lo =  0x0220;
                msr.hi = 0;
                wrmsr(msrnum, msr);

-       
+

                msrnum = 0x04C00000C ;  /*  GLCP_DBGOUT MSR*/
                msr.hi =  0x0;
                msr.lo =  0x0;                          /*  reset value (SCOPE_SEL = 0) causes FIFO to shift out,*/
                msrnum = 0x04C00000C ;  /*  GLCP_DBGOUT MSR*/
                msr.hi =  0x0;
                msr.lo =  0x0;                          /*  reset value (SCOPE_SEL = 0) causes FIFO to shift out,*/


@@ -237,7 +237,7 @@ cpuRegInit (void){
        /* */
        /* This code disables the data cache.  Don't execute this
         * unless you're testing something.
        /* */
        /* This code disables the data cache.  Don't execute this
         * unless you're testing something.

-        */ 
+        */

        /*  Allow NVRam to override DM Setup*/
        /*if (getnvram( TOKEN_CACHE_DM_MODE) != 1) {*/
        {
        /*  Allow NVRam to override DM Setup*/
        /*if (getnvram( TOKEN_CACHE_DM_MODE) != 1) {*/
        {


@@ -249,7 +249,7 @@ cpuRegInit (void){
        }
        /* This code disables the instruction cache.  Don't execute
         * this unless you're testing something.
        }
        /* This code disables the instruction cache.  Don't execute
         * this unless you're testing something.

-       */ 
+       */

        /*  Allow NVRam to override IM Setup*/
        /*if (getnvram( TOKEN_CACHE_IM_MODE) ==1) {*/
        {
        /*  Allow NVRam to override IM Setup*/
        /*if (getnvram( TOKEN_CACHE_IM_MODE) ==1) {*/
        {

diff --git a/src/cpu/amd/model_lx/cpubug.c b/src/cpu/amd/model_lx/cpubug.c
index 203d63b81e7025b98571f910eb0971cf12a1623d..e3b6e511eef417090329f114ef41d0df2072d119 100644 (file)
--- a/src/cpu/amd/model_lx/cpubug.c
+++ b/src/cpu/amd/model_lx/cpubug.c
@@ -44,15 +44,15 @@ static void pcideadlock(void)
        msr_t msr;
 
        /*
        msr_t msr;
 
        /*

-        * forces serialization of all load misses. Setting this bit prevents the 
-        * DM pipe from backing up if a read request has to be held up waiting 
+        * forces serialization of all load misses. Setting this bit prevents the
+        * DM pipe from backing up if a read request has to be held up waiting

         * for PCI writes to complete.
         */
        msr = rdmsr(CPU_DM_CONFIG0);
        msr.lo |= DM_CONFIG0_LOWER_MISSER_SET;
        wrmsr(CPU_DM_CONFIG0, msr);
 
         * for PCI writes to complete.
         */
        msr = rdmsr(CPU_DM_CONFIG0);
        msr.lo |= DM_CONFIG0_LOWER_MISSER_SET;
        wrmsr(CPU_DM_CONFIG0, msr);
 

-       /* write serialize memory hole to PCI. Need to unWS when something is 
+       /* write serialize memory hole to PCI. Need to unWS when something is

         * shadowed regardless of cachablility.
         */
        msr.lo = 0x021212121;
         * shadowed regardless of cachablility.
         */
        msr.lo = 0x021212121;

diff --git a/src/cpu/amd/model_lx/cpureginit.c b/src/cpu/amd/model_lx/cpureginit.c
index 492ee8fac0f74a25bd690406448825e4fd6a9d1a..62fa973a8c021f37a4ddaeb988de29c139333b58 100644 (file)
--- a/src/cpu/amd/model_lx/cpureginit.c
+++ b/src/cpu/amd/model_lx/cpureginit.c
@@ -248,8 +248,8 @@ void cpuRegInit(void)
        msr.hi |= ARB_UPPER_QUACK_EN_SET;
        wrmsr(msrnum, msr);
 
        msr.hi |= ARB_UPPER_QUACK_EN_SET;
        wrmsr(msrnum, msr);
 

-       /* GLIU port active enable, limit south pole masters 
-        * (AES and PCI) to one outstanding transaction. 
+       /* GLIU port active enable, limit south pole masters
+        * (AES and PCI) to one outstanding transaction.

         */
        print_debug(" GLIU port active enable\n");
        msrnum = GLIU1_PORT_ACTIVE;
         */
        print_debug(" GLIU port active enable\n");
        msrnum = GLIU1_PORT_ACTIVE;

diff --git a/src/cpu/amd/model_lx/msrinit.c b/src/cpu/amd/model_lx/msrinit.c
index c7b45470e6d07f3bc66504dc1fed7d0be6fef9a0..53c0a851dcba300224d371333c42803c8b1af030 100644 (file)
--- a/src/cpu/amd/model_lx/msrinit.c
+++ b/src/cpu/amd/model_lx/msrinit.c
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
 /*
  * This file is part of the coreboot project.

- * 
+ *

  * Copyright (C) 2010 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or modify
  * Copyright (C) 2010 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or modify


@@ -24,7 +24,7 @@ struct msrinit {
        msr_t msr;
 };
 
        msr_t msr;
 };
 

-static const struct msrinit msr_table[] = 
+static const struct msrinit msr_table[] =

 {
        {CPU_RCONF_DEFAULT, {.hi = 0x24fffc02,.lo = 0x1000A000}}, /* Setup access to cache under 1MB.
                                                                   * Rom Properties: Write Serialize, WriteProtect.
 {
        {CPU_RCONF_DEFAULT, {.hi = 0x24fffc02,.lo = 0x1000A000}}, /* Setup access to cache under 1MB.
                                                                   * Rom Properties: Write Serialize, WriteProtect.


@@ -35,7 +35,7 @@ static const struct msrinit msr_table[] =
        {CPU_RCONF_A0_BF,   {.hi = 0x00000000,.lo = 0x00000000}}, /* 0xA0000-0xBFFFF : (Write Back) */
        {CPU_RCONF_C0_DF,   {.hi = 0x00000000,.lo = 0x00000000}}, /* 0xC0000-0xDFFFF : (Write Back) */
        {CPU_RCONF_E0_FF,   {.hi = 0x00000000,.lo = 0x00000000}}, /* 0xE0000-0xFFFFF : (Write Back) */
        {CPU_RCONF_A0_BF,   {.hi = 0x00000000,.lo = 0x00000000}}, /* 0xA0000-0xBFFFF : (Write Back) */
        {CPU_RCONF_C0_DF,   {.hi = 0x00000000,.lo = 0x00000000}}, /* 0xC0000-0xDFFFF : (Write Back) */
        {CPU_RCONF_E0_FF,   {.hi = 0x00000000,.lo = 0x00000000}}, /* 0xE0000-0xFFFFF : (Write Back) */

-       
+

        /* Setup access to memory under 1MB. Note: VGA hole at 0xA0000-0xBFFFF */
        {MSR_GLIU0_BASE1,   {.hi = 0x20000000,.lo = 0x000fff80}}, // 0x00000-0x7FFFF
        {MSR_GLIU0_BASE2,   {.hi = 0x20000000,.lo = 0x080fffe0}}, // 0x80000-0x9FFFF
        /* Setup access to memory under 1MB. Note: VGA hole at 0xA0000-0xBFFFF */
        {MSR_GLIU0_BASE1,   {.hi = 0x20000000,.lo = 0x000fff80}}, // 0x00000-0x7FFFF
        {MSR_GLIU0_BASE2,   {.hi = 0x20000000,.lo = 0x080fffe0}}, // 0x80000-0x9FFFF

diff --git a/src/cpu/amd/mtrr/amd_mtrr.c b/src/cpu/amd/mtrr/amd_mtrr.c
index d5e8338cadfd9253fffe9a08e069f4c3c4dcdff0..c113f3f8fa831e7ce0a7aa62f6c8d7860831d954 100644 (file)
--- a/src/cpu/amd/mtrr/amd_mtrr.c
+++ b/src/cpu/amd/mtrr/amd_mtrr.c
@@ -5,7 +5,7 @@
 #include <cpu/x86/cache.h>
 #include <cpu/x86/msr.h>
 
 #include <cpu/x86/cache.h>
 #include <cpu/x86/msr.h>
 

-static unsigned long resk(uint64_t value) 
+static unsigned long resk(uint64_t value)

 {
        unsigned long resultk;
        if (value < (1ULL << 42)) {
 {
        unsigned long resultk;
        if (value < (1ULL << 42)) {


@@ -98,7 +98,7 @@ static void set_fixed_mtrr_resource(void *gp, struct device *dev, struct resourc
        printk(BIOS_DEBUG, "Setting fixed MTRRs(%d-%d) Type: WB, RdMEM, WrMEM\n",
                start_mtrr, last_mtrr);
        set_fixed_mtrrs(start_mtrr, last_mtrr, MTRR_TYPE_WRBACK | MTRR_READ_MEM | MTRR_WRITE_MEM);
        printk(BIOS_DEBUG, "Setting fixed MTRRs(%d-%d) Type: WB, RdMEM, WrMEM\n",
                start_mtrr, last_mtrr);
        set_fixed_mtrrs(start_mtrr, last_mtrr, MTRR_TYPE_WRBACK | MTRR_READ_MEM | MTRR_WRITE_MEM);

-       
+

 }
 
 void amd_setup_mtrrs(void)
 }
 
 void amd_setup_mtrrs(void)


@@ -118,7 +118,7 @@ void amd_setup_mtrrs(void)
 
        printk(BIOS_DEBUG, "\n");
        /* Initialized the fixed_mtrrs to uncached */
 
        printk(BIOS_DEBUG, "\n");
        /* Initialized the fixed_mtrrs to uncached */

-       printk(BIOS_DEBUG, "Setting fixed MTRRs(%d-%d) type: UC\n", 
+       printk(BIOS_DEBUG, "Setting fixed MTRRs(%d-%d) type: UC\n",

                0, NUM_FIXED_RANGES);
        set_fixed_mtrrs(0, NUM_FIXED_RANGES, MTRR_TYPE_UNCACHEABLE);
 
                0, NUM_FIXED_RANGES);
        set_fixed_mtrrs(0, NUM_FIXED_RANGES, MTRR_TYPE_UNCACHEABLE);
 


@@ -162,7 +162,7 @@ void amd_setup_mtrrs(void)
                wrmsr(i, msr);
        }
 
                wrmsr(i, msr);
        }
 

-       /* Enable Variable Mtrrs 
+       /* Enable Variable Mtrrs

         * Enable the RdMem and WrMem bits in the fixed mtrrs.
         * Disable access to the RdMem and WrMem in the fixed mtrr.
         */
         * Enable the RdMem and WrMem bits in the fixed mtrrs.
         * Disable access to the RdMem and WrMem in the fixed mtrr.
         */

diff --git a/src/cpu/amd/sc520/raminit.c b/src/cpu/amd/sc520/raminit.c
index c56117485a0d664cd4beeb3e16b6af8f12579e78..e6232a8eb4aeaaeb83c414de83940221e392cbaf 100644 (file)
--- a/src/cpu/amd/sc520/raminit.c
+++ b/src/cpu/amd/sc520/raminit.c
@@ -65,13 +65,13 @@ void setupsc520(void)
 
        /* do this to see if MMCR will start acting right. we suspect
         * you have to do SOMETHING to get things going. I'm really
 
        /* do this to see if MMCR will start acting right. we suspect
         * you have to do SOMETHING to get things going. I'm really

-        * starting to hate this processor. 
+        * starting to hate this processor.

         */
         */

-       
-       /* no, that did not help. I wonder what will?  
+
+       /* no, that did not help. I wonder what will?

         * outl(0x800df0cb, 0xfffc);
         */
         * outl(0x800df0cb, 0xfffc);
         */

-       
+

        /* well, this is special! You have to do SHORT writes to the
         * locations, even though they are CHAR in size and CHAR aligned
         * and technically, a SHORT write will result in -- yoo ha! --
        /* well, this is special! You have to do SHORT writes to the
         * locations, even though they are CHAR in size and CHAR aligned
         * and technically, a SHORT write will result in -- yoo ha! --


@@ -80,7 +80,7 @@ void setupsc520(void)
         * it now reliably comes up after power cycle with printk. Ah yi
         * yi.
         */
         * it now reliably comes up after power cycle with printk. Ah yi
         * yi.
         */

-       
+

        /* turn off the write buffer*/
        /* per the note above, make this a short? Let's try it. */
        sp = (unsigned short *)0xfffef040;
        /* turn off the write buffer*/
        /* per the note above, make this a short? Let's try it. */
        sp = (unsigned short *)0xfffef040;


@@ -92,7 +92,7 @@ void setupsc520(void)
        /*    moved to romstage.c by Stepan, Ron says: */
        /* NOTE: move this to mainboard.c ASAP */
        setup_pars();
        /*    moved to romstage.c by Stepan, Ron says: */
        /* NOTE: move this to mainboard.c ASAP */
        setup_pars();

-  
+

        /* CPCSF register */
        sp =  (unsigned short *)0xfffefc24;
        *sp = 0xfe;
        /* CPCSF register */
        sp =  (unsigned short *)0xfffefc24;
        *sp = 0xfe;


@@ -120,7 +120,7 @@ void setupsc520(void)
        /*set the GP RD offset */
        sp =  (unsigned short *)0xfffefc0c;
        *sp = 0x00001;
        /*set the GP RD offset */
        sp =  (unsigned short *)0xfffefc0c;
        *sp = 0x00001;

-       /*set the GP WR pulse width*/ 
+       /*set the GP WR pulse width*/

        sp =  (unsigned short *)0xfffefc0d;
        *sp = 0x00003;
        /*set the GP WR offset*/
        sp =  (unsigned short *)0xfffefc0d;
        *sp = 0x00003;
        /*set the GP WR offset*/


@@ -164,19 +164,19 @@ void setupsc520(void)
 /*; set the interrupt mapping registers.*/
        cp = (unsigned char *)0x0fffefd20;
        *cp = 0x01;
 /*; set the interrupt mapping registers.*/
        cp = (unsigned char *)0x0fffefd20;
        *cp = 0x01;

-       
+

        cp = (unsigned char *)0x0fffefd28;
        *cp = 0x0c;
        cp = (unsigned char *)0x0fffefd28;
        *cp = 0x0c;

-       
+

        cp = (unsigned char *)0x0fffefd29;
        *cp = 0x0b;
        cp = (unsigned char *)0x0fffefd29;
        *cp = 0x0b;

-       
+

        cp = (unsigned char *)0x0fffefd30;
        *cp = 0x07;
        cp = (unsigned char *)0x0fffefd30;
        *cp = 0x07;

-       
+

        cp = (unsigned char *)0x0fffefd43;
        *cp = 0x03;
        cp = (unsigned char *)0x0fffefd43;
        *cp = 0x03;

-       
+

        cp = (unsigned char *)0x0fffefd51;
        *cp = 0x02;
 #endif
        cp = (unsigned char *)0x0fffefd51;
        *cp = 0x02;
 #endif


@@ -186,8 +186,8 @@ void setupsc520(void)
        outl(0x08000683c, 0xcf8);
        outl(0xc, 0xcfc); /* set the interrupt line */
 
        outl(0x08000683c, 0xcf8);
        outl(0xc, 0xcfc); /* set the interrupt line */
 

-       
-       /* Set the SC520 PCI host bridge to target mode to 
+
+       /* Set the SC520 PCI host bridge to target mode to

         * allow external bus mastering events
         */
        /* index the status command register on device 0*/
         * allow external bus mastering events
         */
        /* index the status command register on device 0*/


@@ -195,7 +195,7 @@ void setupsc520(void)
        outl(0x2, 0xcfc);               /*set the memory access enable bit*/
        OUTC(0x0fffef072, 1);           /* enable req bits in SYSARBMENB */
 }
        outl(0x2, 0xcfc);               /*set the memory access enable bit*/
        OUTC(0x0fffef072, 1);           /* enable req bits in SYSARBMENB */
 }

-       
+

 
 /*
  *
 
 /*
  *


@@ -228,7 +228,7 @@ void setupsc520(void)
 #define ROW11_DATA 0x07070707  /*  11 row data/also bank switch (MASK)*/
 #define ROW10_DATA 0xaaaaaaaa  /*  10 row data/also bank switch (MASK)*/
 
 #define ROW11_DATA 0x07070707  /*  11 row data/also bank switch (MASK)*/
 #define ROW10_DATA 0xaaaaaaaa  /*  10 row data/also bank switch (MASK)*/
 

-void 
+void

 dummy_write(void){
   volatile unsigned short *ptr = (volatile unsigned short *)CACHELINESZ;
   *ptr = 0;
 dummy_write(void){
   volatile unsigned short *ptr = (volatile unsigned short *)CACHELINESZ;
   *ptr = 0;


@@ -247,16 +247,16 @@ static void dumpram(void){
   print_err("bendadr3"); print_err_hex8(*drcbendadr); print_err("\n");
 }
 
   print_err("bendadr3"); print_err_hex8(*drcbendadr); print_err("\n");
 }
 

-/* there is a lot of silliness in the amd code, and it is 
- * causing romcc real headaches, so we're going to be be a little 
+/* there is a lot of silliness in the amd code, and it is
+ * causing romcc real headaches, so we're going to be be a little

  * less silly.
  * less silly.

- * so, the order of ops is: 
+ * so, the order of ops is:

  * for i in 3 to 0
  * for i in 3 to 0

- * see if bank is there. 
+ * see if bank is there.

  * if we can write a word, and read it back, to hell with paranoia
  * if we can write a word, and read it back, to hell with paranoia

- * the bank is there. So write the magic byte, read it back, and 
- * use that to get size, etc. Try to keep things very simple, 
- * so people can actually follow the damned code. 
+ * the bank is there. So write the magic byte, read it back, and
+ * use that to get size, etc. Try to keep things very simple,
+ * so people can actually follow the damned code.

  */
 
 /* cache is assumed to be disabled */
  */
 
 /* cache is assumed to be disabled */


@@ -273,14 +273,14 @@ int sizemem(void)
        /* no ecc interrupts of any kind. */
        *eccctl = 0;
        /* Set SDRAM timing for slowest speed. */
        /* no ecc interrupts of any kind. */
        *eccctl = 0;
        /* Set SDRAM timing for slowest speed. */

-       *drcmctl = 0x1e; 
+       *drcmctl = 0x1e;

 
        /* setup dram register for all banks
         * with max cols and max banks
         * this is the oldest trick in the book. You are going to set up for max rows
 
        /* setup dram register for all banks
         * with max cols and max banks
         * this is the oldest trick in the book. You are going to set up for max rows

-        * and cols, then do a write, then see if the data is wrapped to low memory. 
-        * you can actually tell by which data gets to which low memory, 
-        * exactly how many rows and cols you have. 
+        * and cols, then do a write, then see if the data is wrapped to low memory.
+        * you can actually tell by which data gets to which low memory,
+        * exactly how many rows and cols you have.

         */
        *drccfg=0xbbbb;
 
         */
        *drccfg=0xbbbb;
 


@@ -339,24 +339,24 @@ int sizemem(void)
          *lp = 0xdeadbeef;
          print_err("assigned l ... \n");
          if (*lp != 0xdeadbeef) {
          *lp = 0xdeadbeef;
          print_err("assigned l ... \n");
          if (*lp != 0xdeadbeef) {

-           print_err(" no memory at bank "); 
-           // print_err_hex8(bank); 
+           print_err(" no memory at bank ");
+           // print_err_hex8(bank);

            //   print_err(" value "); print_err_hex32(*lp);
            //   print_err(" value "); print_err_hex32(*lp);

-           print_err("\n"); 
+           print_err("\n");

            //      continue;
          }
          *drcctl = 2;
          dummy_write();
          *drccfg = *drccfg >> 4;
          l = *drcbendadr;
            //      continue;
          }
          *drcctl = 2;
          dummy_write();
          *drccfg = *drccfg >> 4;
          l = *drcbendadr;

-         l >>= 8; 
+         l >>= 8;

          *drcbendadr = l;
          print_err("loop around\n");
          *drcctl = 0;
          dummy_write();
        }
 #if 0
          *drcbendadr = l;
          print_err("loop around\n");
          *drcctl = 0;
          dummy_write();
        }
 #if 0

-       /* enable last bank and setup ending address 
+       /* enable last bank and setup ending address

         * register for max ram in last bank
         */
        *drcbendadr=0x0ff000000;
         * register for max ram in last bank
         */
        *drcbendadr=0x0ff000000;


@@ -410,10 +410,10 @@ int sizemem(void)
        bank = 3;
 
 
        bank = 3;
 
 

-       /* this is really ugly, it is right from assembly code. 
+       /* this is really ugly, it is right from assembly code.

         * we need to clean it up later
         */
         * we need to clean it up later
         */

-       
+

 start:
        /* write col 11 wrap adr */
        COL11_ADR=COL11_DATA;
 start:
        /* write col 11 wrap adr */
        COL11_ADR=COL11_DATA;


@@ -519,7 +519,7 @@ print_err("4b\n");
        print_err("cols"); print_err_hex32(cols); print_err("\n");
        cols -= COL08_DATA;
 
        print_err("cols"); print_err_hex32(cols); print_err("\n");
        cols -= COL08_DATA;
 

-       /* cols now is in the range of 0 1 2 3 ... 
+       /* cols now is in the range of 0 1 2 3 ...

         */
        i = cols&3;
        //      i = cols + rows;
         */
        i = cols&3;
        //      i = cols + rows;


@@ -533,22 +533,22 @@ print_err("4b\n");
        /* what a fookin' mess this is */
        if(banks==4)
                i+=8; /* <-- i holds merged value */
        /* what a fookin' mess this is */
        if(banks==4)
                i+=8; /* <-- i holds merged value */

-       /* i now has the col width in bits 0-1 and the bank count (2 or 4) 
+       /* i now has the col width in bits 0-1 and the bank count (2 or 4)

         * in bit 3.
         * in bit 3.

-        * this is the format for the drccfg register 
+        * this is the format for the drccfg register

         */
         */

-       
+

        /* fix ending addr mask*/
        /*FIXME*/
        /* let's just go with this to start ... see if we can get ANYWHERE */
        /* need to get end addr. Need to do it with the bank in mind. */
 /*
        /* fix ending addr mask*/
        /*FIXME*/
        /* let's just go with this to start ... see if we can get ANYWHERE */
        /* need to get end addr. Need to do it with the bank in mind. */
 /*

-       al = 3; 
+       al = 3;

        al -= i&3;
        *drcbendaddr = rows >> al;
        al -= i&3;
        *drcbendaddr = rows >> al;

-       print_err("computed ending_adr = "); print_err_hex8(ending_adr); 
+       print_err("computed ending_adr = "); print_err_hex8(ending_adr);

        print_err("\n");
        print_err("\n");

-       
+

 */
 bad_reinit:
        /* issue all banks recharge */
 */
 bad_reinit:
        /* issue all banks recharge */


@@ -557,7 +557,7 @@ bad_reinit:
 
        /* update ending address register */
 //     *drcbendadr = ending_adr;
 
        /* update ending address register */
 //     *drcbendadr = ending_adr;

-       
+

        /* update config register */
        *drccfg &= ~(0xff << bank*4);
        if (ending_adr)
        /* update config register */
        *drccfg &= ~(0xff << bank*4);
        if (ending_adr)


@@ -579,11 +579,11 @@ bad_reinit:
        *drcctl=0x18;
        dummy_write();
        return bank;
        *drcctl=0x18;
        dummy_write();
        return bank;

-       
+

 bad_ram:
        print_info("bad ram!\n");
 bad_ram:
        print_info("bad ram!\n");

-       /* you are here because the read-after-write failed, 
-        * in most cases because: no ram in that bank! 
+       /* you are here because the read-after-write failed,
+        * in most cases because: no ram in that bank!

         * set badbank to 1 and go to reinit
         */
        ending_adr = 0;
         * set badbank to 1 and go to reinit
         */
        ending_adr = 0;


@@ -591,7 +591,7 @@ bad_ram:
        while(1)
        print_err("DONE NEXTBANK\n");
 #endif
        while(1)
        print_err("DONE NEXTBANK\n");
 #endif

-}      
+}

 
 /* note: based on AMD code*/
 /* This code is known to work on the digital logic board and on the technologic
 
 /* note: based on AMD code*/
 /* This code is known to work on the digital logic board and on the technologic


@@ -600,7 +600,7 @@ bad_ram:
 int staticmem(void)
 {
        volatile unsigned long *zero = (unsigned long *) CACHELINESZ;
 int staticmem(void)
 {
        volatile unsigned long *zero = (unsigned long *) CACHELINESZ;

-       
+

        /* set up 0x18 .. **/
        *drcbendadr = 0x88;
        *drcmctl = 0x1e;
        /* set up 0x18 .. **/
        *drcbendadr = 0x88;
        *drcmctl = 0x1e;


@@ -609,7 +609,7 @@ int staticmem(void)
        *drcctl = 0x1;
        /* do the dummy write */
        *zero = 0;
        *drcctl = 0x1;
        /* do the dummy write */
        *zero = 0;

-       
+

        /* precharge */
        *drcctl = 2;
        *zero = 0;
        /* precharge */
        *drcctl = 2;
        *zero = 0;


@@ -625,7 +625,7 @@ int staticmem(void)
        *drcctl = 3;
        *zero = 0;
        print_debug("DONE the load mode reg\n");
        *drcctl = 3;
        *zero = 0;
        print_debug("DONE the load mode reg\n");

-       
+

        /* normal mode */
        *drcctl = 0x0;
        *zero = 0;
        /* normal mode */
        *drcctl = 0x0;
        *zero = 0;


@@ -634,7 +634,7 @@ int staticmem(void)
        *zero = 0;
        print_debug("DONE the normal\n");
        *zero = 0xdeadbeef;
        *zero = 0;
        print_debug("DONE the normal\n");
        *zero = 0xdeadbeef;

-       if (*zero != 0xdeadbeef) 
+       if (*zero != 0xdeadbeef)

          print_debug("NO LUCK\n");
        else
          print_debug("did a store and load ...\n");
          print_debug("NO LUCK\n");
        else
          print_debug("did a store and load ...\n");

diff --git a/src/cpu/amd/sc520/sc520.c b/src/cpu/amd/sc520/sc520.c
index e867fae3d7772dbe2d96b9507d537ff7a837d545..4c93ebd29565a746038e9ccecdd416c95d015555 100644 (file)
--- a/src/cpu/amd/sc520/sc520.c
+++ b/src/cpu/amd/sc520/sc520.c
@@ -16,10 +16,10 @@
 #include "chip.h"
 
 /*
 #include "chip.h"
 
 /*

- * set up basic things ... 
- * PAR should NOT go here, as it might change with the mainboard. 
+ * set up basic things ...
+ * PAR should NOT go here, as it might change with the mainboard.

  */
  */

-static void cpu_init(device_t dev) 
+static void cpu_init(device_t dev)

 {
   unsigned long *l = (unsigned long *) 0xfffef088;
   int i;
 {
   unsigned long *l = (unsigned long *) 0xfffef088;
   int i;


@@ -30,9 +30,9 @@ static void cpu_init(device_t dev)
 }
 
 
 }
 
 

-/* Ollie says: make a northbridge/amd/sc520. Ron sez: 
- * there is no real northbridge, keep it here in cpu. 
- * Ron wins, he's writing the code. 
+/* Ollie says: make a northbridge/amd/sc520. Ron sez:
+ * there is no real northbridge, keep it here in cpu.
+ * Ron wins, he's writing the code.

  */
 static void sc520_enable_resources(struct device *dev) {
        unsigned char command;
  */
 static void sc520_enable_resources(struct device *dev) {
        unsigned char command;


@@ -141,16 +141,16 @@ static void pci_domain_set_resources(device_t dev)
                for(rambits = 0, i = 0; i < ARRAY_SIZE(ramregs); i++) {
                        unsigned char reg;
                        reg = pci_read_config8(mc_dev, ramregs[i]);
                for(rambits = 0, i = 0; i < ARRAY_SIZE(ramregs); i++) {
                        unsigned char reg;
                        reg = pci_read_config8(mc_dev, ramregs[i]);

-                       /* these are ENDING addresses, not sizes. 
+                       /* these are ENDING addresses, not sizes.

                         * if there is memory in this slot, then reg will be > rambits.
                         * if there is memory in this slot, then reg will be > rambits.

-                        * So we just take the max, that gives us total. 
+                        * So we just take the max, that gives us total.

                         * We take the highest one to cover for once and future coreboot
                         * bugs. We warn about bugs.
                         */
                        if (reg > rambits)
                                rambits = reg;
                        if (reg < rambits)
                         * We take the highest one to cover for once and future coreboot
                         * bugs. We warn about bugs.
                         */
                        if (reg > rambits)
                                rambits = reg;
                        if (reg < rambits)

-                               printk(BIOS_ERR, "ERROR! register 0x%x is not set!\n", 
+                               printk(BIOS_ERR, "ERROR! register 0x%x is not set!\n",

                                        ramregs[i]);
                }
                printk(BIOS_DEBUG, "I would set ram size to 0x%x Kbytes\n", (rambits)*8*1024);
                                        ramregs[i]);
                }
                printk(BIOS_DEBUG, "I would set ram size to 0x%x Kbytes\n", (rambits)*8*1024);


@@ -245,5 +245,5 @@ static void enable_dev(struct device *dev)
 
 struct chip_operations cpu_amd_sc520_ops = {
        CHIP_NAME("AMD Elan SC520 CPU")
 
 struct chip_operations cpu_amd_sc520_ops = {
        CHIP_NAME("AMD Elan SC520 CPU")

-       .enable_dev = enable_dev, 
+       .enable_dev = enable_dev,

 };
 };

diff --git a/src/cpu/intel/Makefile.inc b/src/cpu/intel/Makefile.inc
index 04c4d9ff58c0db60bd9e9402cad76ed89dd02c8d..870490c07d312f12867b5dee39f3098f867a80f5 100644 (file)
--- a/src/cpu/intel/Makefile.inc
+++ b/src/cpu/intel/Makefile.inc
@@ -1,5 +1,5 @@
 # Note: From here on down, we are socket-centric. Socket choice determines
 # Note: From here on down, we are socket-centric. Socket choice determines

-# what other cpu files are included. 
+# what other cpu files are included.

 #
 # Therefore: ONLY include Makefile.inc from socket directories!
 
 #
 # Therefore: ONLY include Makefile.inc from socket directories!
 

diff --git a/src/cpu/intel/car/cache_as_ram.inc b/src/cpu/intel/car/cache_as_ram.inc
index f6a7e12e0d1eee4cc2988965310d4b8ff717ef9c..41f3ce5b4d544032818fdf1c800cd4e6bd3c11fe 100644 (file)
--- a/src/cpu/intel/car/cache_as_ram.inc
+++ b/src/cpu/intel/car/cache_as_ram.inc
@@ -305,11 +305,11 @@ lout:
        pushl   %eax  /* bist */
        call    main
 
        pushl   %eax  /* bist */
        call    main
 

-       /* 
+       /*

        FIXME : backup stack in CACHE_AS_RAM into mmx and sse and after we get STACK up, we restore that.
                It is only needed if we want to go back
        */
        FIXME : backup stack in CACHE_AS_RAM into mmx and sse and after we get STACK up, we restore that.
                It is only needed if we want to go back
        */

-       
+

         /* We don't need cache as ram for now on */
         /* disable cache */
        movl    %cr0, %eax
         /* We don't need cache as ram for now on */
         /* disable cache */
        movl    %cr0, %eax


@@ -396,7 +396,7 @@ lout:
 __main:
        post_code(0x11)
        cld                     /* clear direction flag */
 __main:
        post_code(0x11)
        cld                     /* clear direction flag */

-       
+

        movl    %ebp, %esi
 
        movl $ROMSTAGE_STACK, %esp
        movl    %ebp, %esi
 
        movl $ROMSTAGE_STACK, %esp


@@ -404,7 +404,7 @@ __main:
        pushl %esi
        call copy_and_run
 
        pushl %esi
        call copy_and_run
 

-.Lhlt: 
+.Lhlt:

        post_code(0xee)
        hlt
        jmp     .Lhlt
        post_code(0xee)
        hlt
        jmp     .Lhlt

diff --git a/src/cpu/intel/hyperthreading/intel_sibling.c b/src/cpu/intel/hyperthreading/intel_sibling.c
index 5e77a765a82da7bc6b646ecb054edeae3cb004d6..823d77c3a35a6313269b6aa3db3a1188f72f4273 100644 (file)
--- a/src/cpu/intel/hyperthreading/intel_sibling.c
+++ b/src/cpu/intel/hyperthreading/intel_sibling.c
@@ -43,7 +43,7 @@ void intel_sibling_init(device_t cpu)
                }
                return;
        }
                }
                return;
        }

-       
+

        /* I am the primary cpu start up my siblings */
        for(i = 1; i < siblings; i++) {
                struct device_path cpu_path;
        /* I am the primary cpu start up my siblings */
        for(i = 1; i < siblings; i++) {
                struct device_path cpu_path;


@@ -61,7 +61,7 @@ void intel_sibling_init(device_t cpu)
                }
 
 #if 1
                }
 
 #if 1

-               printk(BIOS_DEBUG, "CPU: %u has sibling %u\n", 
+               printk(BIOS_DEBUG, "CPU: %u has sibling %u\n",

                        cpu->path.apic.apic_id,
                        new->path.apic.apic_id);
 #endif
                        cpu->path.apic.apic_id,
                        new->path.apic.apic_id);
 #endif


@@ -72,6 +72,6 @@ void intel_sibling_init(device_t cpu)
                                new->path.apic.apic_id);
                }
        }
                                new->path.apic.apic_id);
                }
        }

-       
+

 }
 
 }
 

diff --git a/src/cpu/intel/microcode/microcode.c b/src/cpu/intel/microcode/microcode.c
index 22c3a11503bd8cc50e9209f139fb32dd507763bd..93d2a687fbb0e7db36daa452bf4320f127fe0f0b 100644 (file)
--- a/src/cpu/intel/microcode/microcode.c
+++ b/src/cpu/intel/microcode/microcode.c
@@ -59,7 +59,7 @@ void intel_update_microcode(const void *microcode_updates)
        const struct microcode *m;
        const char *c;
        msr_t msr;
        const struct microcode *m;
        const char *c;
        msr_t msr;

-       
+

        /* cpuid sets msr 0x8B iff a microcode update has been loaded. */
        msr.lo = 0;
        msr.hi = 0;
        /* cpuid sets msr 0x8B iff a microcode update has been loaded. */
        msr.lo = 0;
        msr.hi = 0;

diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c
index fc20c6047fe7b8879ffb3fcccedae75265c9859d..81978988471f79293c6287199065ad0ab9edc54a 100644 (file)
--- a/src/cpu/intel/model_1067x/model_1067x_init.c
+++ b/src/cpu/intel/model_1067x/model_1067x_init.c
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
 /*
  * This file is part of the coreboot project.

- * 
+ *

  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or
  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or


@@ -40,7 +40,7 @@ static const uint32_t microcode_updates[] = {
         0x0, 0x0, 0x0, 0x0,
 };
 
         0x0, 0x0, 0x0, 0x0,
 };
 

-static inline void strcpy(char *dst, char *src) 
+static inline void strcpy(char *dst, char *src)

 {
        while (*src) *dst++ = *src++;
 }
 {
        while (*src) *dst++ = *src++;
 }


@@ -77,7 +77,7 @@ static void fill_processor_name(char *processor_name)
 
        /* Skip leading spaces */
        processor_name_start = temp_processor_name;
 
        /* Skip leading spaces */
        processor_name_start = temp_processor_name;

-       while (*processor_name_start == ' ') 
+       while (*processor_name_start == ' ')

                processor_name_start++;
 
        memset(processor_name, 0, 49);
                processor_name_start++;
 
        memset(processor_name, 0, 49);


@@ -197,7 +197,7 @@ static void configure_pic_thermal_sensors(void)
 #if CONFIG_USBDEBUG_DIRECT
 static unsigned ehci_debug_addr;
 #endif
 #if CONFIG_USBDEBUG_DIRECT
 static unsigned ehci_debug_addr;
 #endif

-               
+

 static void model_1067x_init(device_t cpu)
 {
        char processor_name[49];
 static void model_1067x_init(device_t cpu)
 {
        char processor_name[49];


@@ -214,7 +214,7 @@ static void model_1067x_init(device_t cpu)
 
 #if CONFIG_USBDEBUG_DIRECT
        // Is this caution really needed?
 
 #if CONFIG_USBDEBUG_DIRECT
        // Is this caution really needed?

-       if(!ehci_debug_addr) 
+       if(!ehci_debug_addr)

                ehci_debug_addr = get_ehci_debug();
        set_ehci_debug(0);
 #endif
                ehci_debug_addr = get_ehci_debug();
        set_ehci_debug(0);
 #endif

diff --git a/src/cpu/intel/model_106cx/cache_as_ram.inc b/src/cpu/intel/model_106cx/cache_as_ram.inc
index 767c488d4556cb52912b1f58e2406fc5b2781219..873c6e94791ac57bbf43c4177d03767bcb2dd8bf 100644 (file)
--- a/src/cpu/intel/model_106cx/cache_as_ram.inc
+++ b/src/cpu/intel/model_106cx/cache_as_ram.inc
@@ -1,18 +1,18 @@
-/* 
+/*

  * This file is part of the coreboot project.
  * This file is part of the coreboot project.

- * 
+ *

  * Copyright (C) 2000,2007 Ronald G. Minnich <rminnich@gmail.com>
  * Copyright (C) 2007-2008 coresystems GmbH
  * Copyright (C) 2000,2007 Ronald G. Minnich <rminnich@gmail.com>
  * Copyright (C) 2007-2008 coresystems GmbH

- * 
+ *

  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; version 2 of the License.
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; version 2 of the License.

- * 
+ *

  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.

- * 
+ *

  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA


@@ -206,7 +206,7 @@ clear_mtrrs:
        xorl    %eax, %eax
        movl    $((1024*1024) / 4), %ecx
        rep stosl
        xorl    %eax, %eax
        movl    $((1024*1024) / 4), %ecx
        rep stosl

-       
+

        post_code(0x37)
 #endif
 
        post_code(0x37)
 #endif
 


@@ -254,7 +254,7 @@ clear_mtrrs:
 __main:
        post_code(0x11)
        cld                     /* clear direction flag */
 __main:
        post_code(0x11)
        cld                     /* clear direction flag */

-       
+

        movl    %ebp, %esi
 
        movl $ROMSTAGE_STACK, %esp
        movl    %ebp, %esi
 
        movl $ROMSTAGE_STACK, %esp


@@ -262,7 +262,7 @@ __main:
        pushl %esi
        call copy_and_run
 
        pushl %esi
        call copy_and_run
 

-.Lhlt: 
+.Lhlt:

        post_code(0xee)
        hlt
        jmp     .Lhlt
        post_code(0xee)
        hlt
        jmp     .Lhlt

diff --git a/src/cpu/intel/model_106cx/model_106cx_init.c b/src/cpu/intel/model_106cx/model_106cx_init.c
index 143a6f473a6d6e1ceee853ce42b7da81099f3f77..65dfebba5b2ec8bccf890961e9c7ed3f0e273259 100644 (file)
--- a/src/cpu/intel/model_106cx/model_106cx_init.c
+++ b/src/cpu/intel/model_106cx/model_106cx_init.c
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
 /*
  * This file is part of the coreboot project.

- * 
+ *

  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or
  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or


@@ -39,7 +39,7 @@ static const uint32_t microcode_updates[] = {
         0x0, 0x0, 0x0, 0x0,
 };
 
         0x0, 0x0, 0x0, 0x0,
 };
 

-static inline void strcpy(char *dst, char *src) 
+static inline void strcpy(char *dst, char *src)

 {
        while (*src) *dst++ = *src++;
 }
 {
        while (*src) *dst++ = *src++;
 }


@@ -64,7 +64,7 @@ static void fill_processor_name(char *processor_name)
 
        /* Skip leading spaces */
        processor_name_start = temp_processor_name;
 
        /* Skip leading spaces */
        processor_name_start = temp_processor_name;

-       while (*processor_name_start == ' ') 
+       while (*processor_name_start == ' ')

                processor_name_start++;
 
        memset(processor_name, 0, 49);
                processor_name_start++;
 
        memset(processor_name, 0, 49);


@@ -175,7 +175,7 @@ static void model_106cx_init(device_t cpu)
 
 #if CONFIG_USBDEBUG_DIRECT
        // Is this caution really needed?
 
 #if CONFIG_USBDEBUG_DIRECT
        // Is this caution really needed?

-       if(!ehci_debug_addr) 
+       if(!ehci_debug_addr)

                ehci_debug_addr = get_ehci_debug();
        set_ehci_debug(0);
 #endif
                ehci_debug_addr = get_ehci_debug();
        set_ehci_debug(0);
 #endif

diff --git a/src/cpu/intel/model_69x/model_69x_init.c b/src/cpu/intel/model_69x/model_69x_init.c
index f2605ebd79be11307b847fa384073ca92badd52f..b6ea237366cc4df5793780cf788c09aeb3dc6f88 100644 (file)
--- a/src/cpu/intel/model_69x/model_69x_init.c
+++ b/src/cpu/intel/model_69x/model_69x_init.c
@@ -26,7 +26,7 @@ static void model_69x_init(device_t dev)
        x86_enable_cache();
        x86_setup_mtrrs(36);
        x86_mtrr_check();
        x86_enable_cache();
        x86_setup_mtrrs(36);
        x86_mtrr_check();

-       
+

        /* Update the microcode */
        intel_update_microcode(microcode_updates);
 
        /* Update the microcode */
        intel_update_microcode(microcode_updates);
 

diff --git a/src/cpu/intel/model_6bx/model_6bx_init.c b/src/cpu/intel/model_6bx/model_6bx_init.c
index a921fbd368af69401b08bfc2fbb276bc861d613a..783138ec836afec7ac8bf78c868503a22ff5e68f 100644 (file)
--- a/src/cpu/intel/model_6bx/model_6bx_init.c
+++ b/src/cpu/intel/model_6bx/model_6bx_init.c
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
 /*
  * This file is part of the coreboot project.

- * 
+ *

  * Copyright (C) 2007-2009 coresystems GmbH
  * Copyright (C) 2010 Joseph Smith <joe@settoplinux.org>
  *
  * Copyright (C) 2007-2009 coresystems GmbH
  * Copyright (C) 2010 Joseph Smith <joe@settoplinux.org>
  *


@@ -44,7 +44,7 @@ static const uint32_t microcode_updates[] = {
         0x0, 0x0, 0x0, 0x0,
 };
 
         0x0, 0x0, 0x0, 0x0,
 };
 

-static inline void strcpy(char *dst, char *src) 
+static inline void strcpy(char *dst, char *src)

 {
        while (*src) *dst++ = *src++;
 }
 {
        while (*src) *dst++ = *src++;
 }


@@ -69,7 +69,7 @@ static void fill_processor_name(char *processor_name)
 
        /* Skip leading spaces */
        processor_name_start = temp_processor_name;
 
        /* Skip leading spaces */
        processor_name_start = temp_processor_name;

-       while (*processor_name_start == ' ') 
+       while (*processor_name_start == ' ')

                processor_name_start++;
 
        memset(processor_name, 0, 49);
                processor_name_start++;
 
        memset(processor_name, 0, 49);


@@ -96,7 +96,7 @@ static void model_6bx_init(device_t cpu)
 
 #if CONFIG_USBDEBUG_DIRECT
        // Is this caution really needed?
 
 #if CONFIG_USBDEBUG_DIRECT
        // Is this caution really needed?

-       if(!ehci_debug_addr) 
+       if(!ehci_debug_addr)

                ehci_debug_addr = get_ehci_debug();
        set_ehci_debug(0);
 #endif
                ehci_debug_addr = get_ehci_debug();
        set_ehci_debug(0);
 #endif

diff --git a/src/cpu/intel/model_6dx/model_6dx_init.c b/src/cpu/intel/model_6dx/model_6dx_init.c
index 936c67afc94d43e6560cc54be61aba097c07460b..26c1b994994aee69b062355b500f46b8edbd9628 100644 (file)
--- a/src/cpu/intel/model_6dx/model_6dx_init.c
+++ b/src/cpu/intel/model_6dx/model_6dx_init.c
@@ -26,7 +26,7 @@ static void model_6dx_init(device_t dev)
        x86_enable_cache();
        x86_setup_mtrrs(36);
        x86_mtrr_check();
        x86_enable_cache();
        x86_setup_mtrrs(36);
        x86_mtrr_check();

-       
+

        /* Update the microcode */
        intel_update_microcode(microcode_updates);
 
        /* Update the microcode */
        intel_update_microcode(microcode_updates);
 

diff --git a/src/cpu/intel/model_6ex/cache_as_ram.inc b/src/cpu/intel/model_6ex/cache_as_ram.inc
index d4f5d8bf5ecd525f79a9eaad8bd32ef922d7bd75..623b0a30a1cd0e5d12d301419e566da7dfca3a93 100644 (file)
--- a/src/cpu/intel/model_6ex/cache_as_ram.inc
+++ b/src/cpu/intel/model_6ex/cache_as_ram.inc
@@ -1,18 +1,18 @@
-/* 
+/*

  * This file is part of the coreboot project.
  * This file is part of the coreboot project.

- * 
+ *

  * Copyright (C) 2000,2007 Ronald G. Minnich <rminnich@gmail.com>
  * Copyright (C) 2007-2008 coresystems GmbH
  * Copyright (C) 2000,2007 Ronald G. Minnich <rminnich@gmail.com>
  * Copyright (C) 2007-2008 coresystems GmbH

- * 
+ *

  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; version 2 of the License.
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; version 2 of the License.

- * 
+ *

  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.

- * 
+ *

  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA


@@ -206,7 +206,7 @@ clear_mtrrs:
        xorl    %eax, %eax
        movl    $((1024*1024) / 4), %ecx
        rep stosl
        xorl    %eax, %eax
        movl    $((1024*1024) / 4), %ecx
        rep stosl

-       
+

        post_code(0x37)
 #endif
 
        post_code(0x37)
 #endif
 


@@ -254,7 +254,7 @@ clear_mtrrs:
 __main:
        post_code(0x11)
        cld                     /* clear direction flag */
 __main:
        post_code(0x11)
        cld                     /* clear direction flag */

-       
+

        movl    %ebp, %esi
 
        movl $ROMSTAGE_STACK, %esp
        movl    %ebp, %esi
 
        movl $ROMSTAGE_STACK, %esp


@@ -262,7 +262,7 @@ __main:
        pushl %esi
        call copy_and_run
 
        pushl %esi
        call copy_and_run
 

-.Lhlt: 
+.Lhlt:

        post_code(0xee)
        hlt
        jmp     .Lhlt
        post_code(0xee)
        hlt
        jmp     .Lhlt

diff --git a/src/cpu/intel/model_6ex/model_6ex_init.c b/src/cpu/intel/model_6ex/model_6ex_init.c
index f879f348693c5df99414a90f3f0f02e572e85b0e..4f1d2043b6b86e43e04699963427d9df74032d49 100644 (file)
--- a/src/cpu/intel/model_6ex/model_6ex_init.c
+++ b/src/cpu/intel/model_6ex/model_6ex_init.c
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
 /*
  * This file is part of the coreboot project.

- * 
+ *

  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or
  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or


@@ -44,7 +44,7 @@ static const uint32_t microcode_updates[] = {
         0x0, 0x0, 0x0, 0x0,
 };
 
         0x0, 0x0, 0x0, 0x0,
 };
 

-static inline void strcpy(char *dst, char *src) 
+static inline void strcpy(char *dst, char *src)

 {
        while (*src) *dst++ = *src++;
 }
 {
        while (*src) *dst++ = *src++;
 }


@@ -69,7 +69,7 @@ static void fill_processor_name(char *processor_name)
 
        /* Skip leading spaces */
        processor_name_start = temp_processor_name;
 
        /* Skip leading spaces */
        processor_name_start = temp_processor_name;

-       while (*processor_name_start == ' ') 
+       while (*processor_name_start == ' ')

                processor_name_start++;
 
        memset(processor_name, 0, 49);
                processor_name_start++;
 
        memset(processor_name, 0, 49);


@@ -204,7 +204,7 @@ static void model_6ex_init(device_t cpu)
 
 #if CONFIG_USBDEBUG_DIRECT
        // Is this caution really needed?
 
 #if CONFIG_USBDEBUG_DIRECT
        // Is this caution really needed?

-       if(!ehci_debug_addr) 
+       if(!ehci_debug_addr)

                ehci_debug_addr = get_ehci_debug();
        set_ehci_debug(0);
 #endif
                ehci_debug_addr = get_ehci_debug();
        set_ehci_debug(0);
 #endif

diff --git a/src/cpu/intel/model_6fx/cache_as_ram.inc b/src/cpu/intel/model_6fx/cache_as_ram.inc
index f46e5bdc480c9e15dff48794234b1fb84d893ddb..0717116d0ab499780571196627ab075a2b2f83d5 100644 (file)
--- a/src/cpu/intel/model_6fx/cache_as_ram.inc
+++ b/src/cpu/intel/model_6fx/cache_as_ram.inc
@@ -1,18 +1,18 @@
-/* 
+/*

  * This file is part of the coreboot project.
  * This file is part of the coreboot project.

- * 
+ *

  * Copyright (C) 2000,2007 Ronald G. Minnich <rminnich@gmail.com>
  * Copyright (C) 2007-2008 coresystems GmbH
  * Copyright (C) 2000,2007 Ronald G. Minnich <rminnich@gmail.com>
  * Copyright (C) 2007-2008 coresystems GmbH

- * 
+ *

  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; version 2 of the License.
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; version 2 of the License.

- * 
+ *

  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.

- * 
+ *

  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA


@@ -213,7 +213,7 @@ clear_mtrrs:
        xorl    %eax, %eax
        movl    $((1024*1024) / 4), %ecx
        rep stosl
        xorl    %eax, %eax
        movl    $((1024*1024) / 4), %ecx
        rep stosl

-       
+

        post_code(0x37)
 #endif
 
        post_code(0x37)
 #endif
 


@@ -268,7 +268,7 @@ clear_mtrrs:
 __main:
        post_code(0x11)
        cld                     /* clear direction flag */
 __main:
        post_code(0x11)
        cld                     /* clear direction flag */

-       
+

        movl    %ebp, %esi
 
        movl $ROMSTAGE_STACK, %esp
        movl    %ebp, %esi
 
        movl $ROMSTAGE_STACK, %esp


@@ -276,7 +276,7 @@ __main:
        pushl %esi
        call copy_and_run
 
        pushl %esi
        call copy_and_run
 

-.Lhlt: 
+.Lhlt:

        post_code(0xee)
        hlt
        jmp     .Lhlt
        post_code(0xee)
        hlt
        jmp     .Lhlt

diff --git a/src/cpu/intel/model_6fx/model_6fx_init.c b/src/cpu/intel/model_6fx/model_6fx_init.c
index f00aba8e33fa153a887cf57e416806d398327dff..3d1e9ba9a34871e7fa939a6f337f3b65558d38d9 100644 (file)
--- a/src/cpu/intel/model_6fx/model_6fx_init.c
+++ b/src/cpu/intel/model_6fx/model_6fx_init.c
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
 /*
  * This file is part of the coreboot project.

- * 
+ *

  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or
  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or


@@ -58,7 +58,7 @@ static const uint32_t microcode_updates[] = {
         0x0, 0x0, 0x0, 0x0,
 };
 
         0x0, 0x0, 0x0, 0x0,
 };
 

-static inline void strcpy(char *dst, char *src) 
+static inline void strcpy(char *dst, char *src)

 {
        while (*src) *dst++ = *src++;
 }
 {
        while (*src) *dst++ = *src++;
 }


@@ -83,7 +83,7 @@ static void fill_processor_name(char *processor_name)
 
        /* Skip leading spaces */
        processor_name_start = temp_processor_name;
 
        /* Skip leading spaces */
        processor_name_start = temp_processor_name;

-       while (*processor_name_start == ' ') 
+       while (*processor_name_start == ' ')

                processor_name_start++;
 
        memset(processor_name, 0, 49);
                processor_name_start++;
 
        memset(processor_name, 0, 49);


@@ -214,7 +214,7 @@ static void configure_pic_thermal_sensors(void)
 #if CONFIG_USBDEBUG_DIRECT
 static unsigned ehci_debug_addr;
 #endif
 #if CONFIG_USBDEBUG_DIRECT
 static unsigned ehci_debug_addr;
 #endif

-               
+

 static void model_6fx_init(device_t cpu)
 {
        char processor_name[49];
 static void model_6fx_init(device_t cpu)
 {
        char processor_name[49];


@@ -231,7 +231,7 @@ static void model_6fx_init(device_t cpu)
 
 #if CONFIG_USBDEBUG_DIRECT
        // Is this caution really needed?
 
 #if CONFIG_USBDEBUG_DIRECT
        // Is this caution really needed?

-       if(!ehci_debug_addr) 
+       if(!ehci_debug_addr)

                ehci_debug_addr = get_ehci_debug();
        set_ehci_debug(0);
 #endif
                ehci_debug_addr = get_ehci_debug();
        set_ehci_debug(0);
 #endif

diff --git a/src/cpu/intel/model_6xx/microcode_MU16810d.h b/src/cpu/intel/model_6xx/microcode_MU16810d.h
index ce207efa769f6bba5b7243b80bdee148bced9bcd..ef1ff7dd1d6f7437cc14ddad6626c7e307fd76c6 100644 (file)
--- a/src/cpu/intel/model_6xx/microcode_MU16810d.h
+++ b/src/cpu/intel/model_6xx/microcode_MU16810d.h
@@ -1,12 +1,12 @@
        /*
        /*

-         Copyright  Intel Corporation, 1995, 96, 97, 98, 99, 2000. 
+         Copyright  Intel Corporation, 1995, 96, 97, 98, 99, 2000.

 
 

-         These microcode updates are distributed for the sole purpose of 
+         These microcode updates are distributed for the sole purpose of

          installation in the BIOS or Operating System of computer systems
          which include an Intel P6 family microprocessor sold or distributed
          to or by you.  You are authorized to copy and install this material
          on such systems.  You are not authorized to use this material for
          installation in the BIOS or Operating System of computer systems
          which include an Intel P6 family microprocessor sold or distributed
          to or by you.  You are authorized to copy and install this material
          on such systems.  You are not authorized to use this material for

-         any other purpose.  
+         any other purpose.

        */
 
 /*  MU16810d.inc  */
        */
 
 /*  MU16810d.inc  */

diff --git a/src/cpu/intel/model_6xx/microcode_MU16830c.h b/src/cpu/intel/model_6xx/microcode_MU16830c.h
index 2724e7bae4bf723af1ec6b36ee4eccbc1ff2d03a..602739c368a7c3e3250e3e24d29fa272170d3963 100644 (file)
--- a/src/cpu/intel/model_6xx/microcode_MU16830c.h
+++ b/src/cpu/intel/model_6xx/microcode_MU16830c.h
@@ -1,12 +1,12 @@
        /*
        /*

-         Copyright  Intel Corporation, 1995, 96, 97, 98, 99, 2000. 
+         Copyright  Intel Corporation, 1995, 96, 97, 98, 99, 2000.

 
 

-         These microcode updates are distributed for the sole purpose of 
+         These microcode updates are distributed for the sole purpose of

          installation in the BIOS or Operating System of computer systems
          which include an Intel P6 family microprocessor sold or distributed
          to or by you.  You are authorized to copy and install this material
          on such systems.  You are not authorized to use this material for
          installation in the BIOS or Operating System of computer systems
          which include an Intel P6 family microprocessor sold or distributed
          to or by you.  You are authorized to copy and install this material
          on such systems.  You are not authorized to use this material for

-         any other purpose.  
+         any other purpose.

        */
 
 /*  MU16830c.inc  */
        */
 
 /*  MU16830c.inc  */

diff --git a/src/cpu/intel/model_6xx/model_6xx_init.c b/src/cpu/intel/model_6xx/model_6xx_init.c
index 7efdf2119e9e452d80a17100ba3762b9fab99b35..6c795eab32752ce5bf2d49e3d28272412636356d 100644 (file)
--- a/src/cpu/intel/model_6xx/model_6xx_init.c
+++ b/src/cpu/intel/model_6xx/model_6xx_init.c
@@ -16,7 +16,7 @@ static uint32_t microcode_updates[] = {
         * microcode update lengths.  They are encoded in int 8 and 9.  A
         * dummy header of nulls must terminate the list.
         */
         * microcode update lengths.  They are encoded in int 8 and 9.  A
         * dummy header of nulls must terminate the list.
         */

-#include "microcode_MU16810d.h"        
+#include "microcode_MU16810d.h"

 #include "microcode_MU16830c.h"
        /*  Dummy terminator  */
         0x0, 0x0, 0x0, 0x0,
 #include "microcode_MU16830c.h"
        /*  Dummy terminator  */
         0x0, 0x0, 0x0, 0x0,


@@ -32,7 +32,7 @@ static void model_6xx_init(device_t dev)
        x86_enable_cache();
        x86_setup_mtrrs(36);
        x86_mtrr_check();
        x86_enable_cache();
        x86_setup_mtrrs(36);
        x86_mtrr_check();

-       
+

        /* Update the microcode */
        intel_update_microcode(microcode_updates);
 
        /* Update the microcode */
        intel_update_microcode(microcode_updates);
 

diff --git a/src/cpu/intel/model_f0x/model_f0x_init.c b/src/cpu/intel/model_f0x/model_f0x_init.c
index c4d1ef085ee23f1b042538583f360db8f7397952..568d4d70ee987dc0aa1b7479a5e98c173d8aebc1 100644 (file)
--- a/src/cpu/intel/model_f0x/model_f0x_init.c
+++ b/src/cpu/intel/model_f0x/model_f0x_init.c
@@ -17,7 +17,7 @@ static uint32_t microcode_updates[] = {
         * microcode update lengths.  They are encoded in int 8 and 9.  A
         * dummy header of nulls must terminate the list.
         */
         * microcode update lengths.  They are encoded in int 8 and 9.  A
         * dummy header of nulls must terminate the list.
         */

-       
+

        /*  Dummy terminator  */
         0x0, 0x0, 0x0, 0x0,
         0x0, 0x0, 0x0, 0x0,
        /*  Dummy terminator  */
         0x0, 0x0, 0x0, 0x0,
         0x0, 0x0, 0x0, 0x0,


@@ -32,7 +32,7 @@ static void model_f0x_init(device_t dev)
        x86_enable_cache();
        x86_setup_mtrrs(36);
        x86_mtrr_check();
        x86_enable_cache();
        x86_setup_mtrrs(36);
        x86_mtrr_check();

-       
+

        /* Update the microcode */
        intel_update_microcode(microcode_updates);
 
        /* Update the microcode */
        intel_update_microcode(microcode_updates);
 

diff --git a/src/cpu/intel/model_f0x/multiplier.h b/src/cpu/intel/model_f0x/multiplier.h
index e2f81362e837428b3b7570e37ea48117fe4bcd8c..a3b1fcb3090f76a42119d6919121306214126175 100644 (file)
--- a/src/cpu/intel/model_f0x/multiplier.h
+++ b/src/cpu/intel/model_f0x/multiplier.h
@@ -1,5 +1,5 @@
 
 

-/* 
+/*

  ** NMI A20M IGNNE INTR
  * X8  H H H H
  * X9  H H H L projected
  ** NMI A20M IGNNE INTR
  * X8  H H H H
  * X9  H H H L projected


@@ -8,7 +8,7 @@
  * X12 H L H H
  * X13 H L H L
  * X14 H L L H
  * X12 H L H H
  * X13 H L H L
  * X14 H L L H

- * X15 H L L L 
+ * X15 H L L L

  * X16 L H H H
  * X17 L H H L
  * X18 L H L H
  * X16 L H H H
  * X17 L H H L
  * X18 L H L H


@@ -18,7 +18,7 @@
  * X22 L L L H  projected
  * X23 L L L L  projected
  *
  * X22 L L L H  projected
  * X23 L L L L  projected
  *

- ** NMI INTR IGNNE A20M 
+ ** NMI INTR IGNNE A20M

  * X8  H H H H
  * X9  H L H H projected
  * X10 H H L H
  * X8  H H H H
  * X9  H L H H projected
  * X10 H H L H


@@ -26,7 +26,7 @@
  * X12 H H H L
  * X13 H L H L
  * X14 H H L L
  * X12 H H H L
  * X13 H L H L
  * X14 H H L L

- * X15 H L L L 
+ * X15 H L L L

  * X16 L H H H
  * X17 L L H H
  * X18 L H L H
  * X16 L H H H
  * X17 L L H H
  * X18 L H L H

diff --git a/src/cpu/intel/model_f1x/model_f1x_init.c b/src/cpu/intel/model_f1x/model_f1x_init.c
index a3a66783c4266a91b370e2f4733e95a7a6fba1ec..f8dd1d85f7514b9512d65004be4c9a94a8573b2d 100644 (file)
--- a/src/cpu/intel/model_f1x/model_f1x_init.c
+++ b/src/cpu/intel/model_f1x/model_f1x_init.c
@@ -17,7 +17,7 @@ static uint32_t microcode_updates[] = {
         * microcode update lengths.  They are encoded in int 8 and 9.  A
         * dummy header of nulls must terminate the list.
         */
         * microcode update lengths.  They are encoded in int 8 and 9.  A
         * dummy header of nulls must terminate the list.
         */

-       
+

        /*  Dummy terminator  */
         0x0, 0x0, 0x0, 0x0,
         0x0, 0x0, 0x0, 0x0,
        /*  Dummy terminator  */
         0x0, 0x0, 0x0, 0x0,
         0x0, 0x0, 0x0, 0x0,


@@ -32,7 +32,7 @@ static void model_f1x_init(device_t dev)
        x86_enable_cache();
        x86_setup_mtrrs(36);
        x86_mtrr_check();
        x86_enable_cache();
        x86_setup_mtrrs(36);
        x86_mtrr_check();

-       
+

        /* Update the microcode */
        intel_update_microcode(microcode_updates);
 
        /* Update the microcode */
        intel_update_microcode(microcode_updates);
 

diff --git a/src/cpu/intel/model_f1x/multiplier.h b/src/cpu/intel/model_f1x/multiplier.h
index e2f81362e837428b3b7570e37ea48117fe4bcd8c..a3b1fcb3090f76a42119d6919121306214126175 100644 (file)
--- a/src/cpu/intel/model_f1x/multiplier.h
+++ b/src/cpu/intel/model_f1x/multiplier.h
@@ -1,5 +1,5 @@
 
 

-/* 
+/*

  ** NMI A20M IGNNE INTR
  * X8  H H H H
  * X9  H H H L projected
  ** NMI A20M IGNNE INTR
  * X8  H H H H
  * X9  H H H L projected


@@ -8,7 +8,7 @@
  * X12 H L H H
  * X13 H L H L
  * X14 H L L H
  * X12 H L H H
  * X13 H L H L
  * X14 H L L H

- * X15 H L L L 
+ * X15 H L L L

  * X16 L H H H
  * X17 L H H L
  * X18 L H L H
  * X16 L H H H
  * X17 L H H L
  * X18 L H L H


@@ -18,7 +18,7 @@
  * X22 L L L H  projected
  * X23 L L L L  projected
  *
  * X22 L L L H  projected
  * X23 L L L L  projected
  *

- ** NMI INTR IGNNE A20M 
+ ** NMI INTR IGNNE A20M

  * X8  H H H H
  * X9  H L H H projected
  * X10 H H L H
  * X8  H H H H
  * X9  H L H H projected
  * X10 H H L H


@@ -26,7 +26,7 @@
  * X12 H H H L
  * X13 H L H L
  * X14 H H L L
  * X12 H H H L
  * X13 H L H L
  * X14 H H L L

- * X15 H L L L 
+ * X15 H L L L

  * X16 L H H H
  * X17 L L H H
  * X18 L H L H
  * X16 L H H H
  * X17 L L H H
  * X18 L H L H

diff --git a/src/cpu/intel/model_f2x/model_f2x_init.c b/src/cpu/intel/model_f2x/model_f2x_init.c
index d7b77efb726c67138d779eadfefc58ed606489be..9c7af78969405ff16f44b4f9a1d0a1be47daadaf 100644 (file)
--- a/src/cpu/intel/model_f2x/model_f2x_init.c
+++ b/src/cpu/intel/model_f2x/model_f2x_init.c
@@ -37,7 +37,7 @@ static void model_f2x_init(device_t cpu)
        x86_enable_cache();
        x86_setup_mtrrs(36);
        x86_mtrr_check();
        x86_enable_cache();
        x86_setup_mtrrs(36);
        x86_mtrr_check();

-       
+

        /* Update the microcode */
        intel_update_microcode(microcode_updates);
 
        /* Update the microcode */
        intel_update_microcode(microcode_updates);
 

diff --git a/src/cpu/intel/model_f3x/microcode_M1DF340E.h b/src/cpu/intel/model_f3x/microcode_M1DF340E.h
index a378fba8acdc18b86d4e2771115ab8d378e94ca0..55854b583a64b04fad5813a401be8be9b4989834 100644 (file)
--- a/src/cpu/intel/model_f3x/microcode_M1DF340E.h
+++ b/src/cpu/intel/model_f3x/microcode_M1DF340E.h
@@ -9,7 +9,7 @@
         */
 
        /*  M1DF340E.TXT - Noconoa D-0  */
         */
 
        /*  M1DF340E.TXT - Noconoa D-0  */

-       
+

 
        0x00000001, /* Header Version   */
        0x0000000e, /* Patch ID         */
 
        0x00000001, /* Header Version   */
        0x0000000e, /* Patch ID         */

diff --git a/src/cpu/intel/model_f3x/microcode_M1DF3413.h b/src/cpu/intel/model_f3x/microcode_M1DF3413.h
index f2a0a8f79d39155bc331de4b076d47a41a450886..676d67c06171e50f6fe52c5ed07c475e6a44a50e 100644 (file)
--- a/src/cpu/intel/model_f3x/microcode_M1DF3413.h
+++ b/src/cpu/intel/model_f3x/microcode_M1DF3413.h
@@ -2,7 +2,7 @@
  * microcode update lengths.  They are encoded in int 8 and 9.  A
  * dummy header of nulls must terminate the list.
  */
  * microcode update lengths.  They are encoded in int 8 and 9.  A
  * dummy header of nulls must terminate the list.
  */

-                                                                                
+

         /*
            Copyright  Intel Corporation, 1995, 96, 97, 98, 99, 2000.
            These microcode updates are distributed for the sole purpose of
         /*
            Copyright  Intel Corporation, 1995, 96, 97, 98, 99, 2000.
            These microcode updates are distributed for the sole purpose of


@@ -12,9 +12,9 @@
            on such systems.  You are not authorized to use this material for
            any other purpose.
         */
            on such systems.  You are not authorized to use this material for
            any other purpose.
         */

-                                                                                
+

         /*  M1DF3413.TXT - Noconoa D-0  */
         /*  M1DF3413.TXT - Noconoa D-0  */

-                                                                                
+

         0x00000001, /* Header Version   */
         0x00000013, /* Patch ID         */
         0x07302004, /* DATE             */
         0x00000001, /* Header Version   */
         0x00000013, /* Patch ID         */
         0x07302004, /* DATE             */


@@ -27,7 +27,7 @@
         0x00000000, /* reserved         */
         0x00000000, /* reserved         */
         0x00000000, /* reserved         */
         0x00000000, /* reserved         */
         0x00000000, /* reserved         */
         0x00000000, /* reserved         */

- 
+

        0x9fbf327a,
        0x2b41b451,
        0xb2abaca8,
        0x9fbf327a,
        0x2b41b451,
        0xb2abaca8,

diff --git a/src/cpu/intel/model_f3x/model_f3x_init.c b/src/cpu/intel/model_f3x/model_f3x_init.c
index cbdd50ac2f117f1ea40421b52597f44f6e6d4206..68b22c99a86b4cbcb2062655b43c6176afb8b054 100644 (file)
--- a/src/cpu/intel/model_f3x/model_f3x_init.c
+++ b/src/cpu/intel/model_f3x/model_f3x_init.c
@@ -17,7 +17,7 @@ static uint32_t microcode_updates[] = {
         * microcode update lengths.  They are encoded in int 8 and 9.  A
         * dummy header of nulls must terminate the list.
         */
         * microcode update lengths.  They are encoded in int 8 and 9.  A
         * dummy header of nulls must terminate the list.
         */

-       
+

 #include "microcode_M1DF3413.h"
        /*  Dummy terminator  */
         0x0, 0x0, 0x0, 0x0,
 #include "microcode_M1DF3413.h"
        /*  Dummy terminator  */
         0x0, 0x0, 0x0, 0x0,


@@ -33,7 +33,7 @@ static void model_f3x_init(device_t cpu)
        x86_enable_cache();
        x86_setup_mtrrs(36);
        x86_mtrr_check();
        x86_enable_cache();
        x86_setup_mtrrs(36);
        x86_mtrr_check();

-       
+

        /* Update the microcode */
        intel_update_microcode(microcode_updates);
 
        /* Update the microcode */
        intel_update_microcode(microcode_updates);
 

diff --git a/src/cpu/intel/model_f4x/model_f4x_init.c b/src/cpu/intel/model_f4x/model_f4x_init.c
index a48c7592ba3d57881e847aa04f6b4f11f6e9cb59..d6acddee09e4112c2b697c9f481cafef71fcbacb 100644 (file)
--- a/src/cpu/intel/model_f4x/model_f4x_init.c
+++ b/src/cpu/intel/model_f4x/model_f4x_init.c
@@ -17,7 +17,7 @@ static uint32_t microcode_updates[] = {
         * microcode update lengths.  They are encoded in int 8 and 9.  A
         * dummy header of nulls must terminate the list.
         */
         * microcode update lengths.  They are encoded in int 8 and 9.  A
         * dummy header of nulls must terminate the list.
         */

-       
+

 #include "microcode_MBDF410D.h"
        /*  Dummy terminator  */
         0x0, 0x0, 0x0, 0x0,
 #include "microcode_MBDF410D.h"
        /*  Dummy terminator  */
         0x0, 0x0, 0x0, 0x0,


@@ -33,7 +33,7 @@ static void model_f4x_init(device_t cpu)
        x86_enable_cache();
        x86_setup_mtrrs(36);
        x86_mtrr_check();
        x86_enable_cache();
        x86_setup_mtrrs(36);
        x86_mtrr_check();

-       
+

        /* Update the microcode */
        intel_update_microcode(microcode_updates);
 
        /* Update the microcode */
        intel_update_microcode(microcode_updates);
 

diff --git a/src/cpu/intel/socket_mPGA604/Kconfig b/src/cpu/intel/socket_mPGA604/Kconfig
index faa74d33902d9123c1d0b0b45e25d30a56d41bd2..2fc27cff782cc2dd009dd57e6891aeec6963a2fc 100644 (file)
--- a/src/cpu/intel/socket_mPGA604/Kconfig
+++ b/src/cpu/intel/socket_mPGA604/Kconfig
@@ -8,7 +8,7 @@ config CPU_INTEL_SOCKET_MPGA604
        select UDELAY_TSC
 
 # mPGA604 are usually Intel Netburst CPUs which should have SSE2
        select UDELAY_TSC
 
 # mPGA604 are usually Intel Netburst CPUs which should have SSE2

-# but the ramtest.c code on the Dell S1850 seems to choke on 
+# but the ramtest.c code on the Dell S1850 seems to choke on

 # enabling it, so disable it for now.
 config SSE2
        bool
 # enabling it, so disable it for now.
 config SSE2
        bool

diff --git a/src/cpu/intel/speedstep/acpi.c b/src/cpu/intel/speedstep/acpi.c
index 920984369e968361e221eb9c82a0b2af67b85168..33898e3280a04eb1d1c0116f323a9030576dd9ce 100644 (file)
--- a/src/cpu/intel/speedstep/acpi.c
+++ b/src/cpu/intel/speedstep/acpi.c
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
 /*
  * This file is part of the coreboot project.

- * 
+ *

  * Copyright (C) 2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or
  * Copyright (C) 2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or

diff --git a/src/cpu/via/car/cache_as_ram.inc b/src/cpu/via/car/cache_as_ram.inc
index 8a12c8fa485d4b2d57d4594d35dba68f0403ff50..8bc274b38135572b3f74115b4d40e672ca4e2077 100644 (file)
--- a/src/cpu/via/car/cache_as_ram.inc
+++ b/src/cpu/via/car/cache_as_ram.inc
@@ -179,12 +179,12 @@ testok:   movb $0x40,%al
        pushl   %eax  /* bist */
        call    main
 
        pushl   %eax  /* bist */
        call    main
 

-       /* 
+       /*

         * TODO: Backup stack in CACHE_AS_RAM into MMX and SSE and after we
         *       get STACK up, we restore that. It is only needed if we
         *       want to go back.
         */
         * TODO: Backup stack in CACHE_AS_RAM into MMX and SSE and after we
         *       get STACK up, we restore that. It is only needed if we
         *       want to go back.
         */

-       
+

        /* We don't need cache as ram for now on */
        /* disable cache */
        movl    %cr0, %eax
        /* We don't need cache as ram for now on */
        /* disable cache */
        movl    %cr0, %eax


@@ -207,7 +207,7 @@ testok:     movb $0x40,%al
        movl     $(0 | 6), %eax
        //movl     $(0 | MTRR_TYPE_WRBACK), %eax
        wrmsr
        movl     $(0 | 6), %eax
        //movl     $(0 | MTRR_TYPE_WRBACK), %eax
        wrmsr

- 
+

        /* enable cache for 0-7ffff, 80000-9ffff, e0000-fffff;
         * If 1M cacheable, then when S3 resume, there is stange color on
         * screen for 2 sec. suppose problem of a0000-dfffff and cache.
        /* enable cache for 0-7ffff, 80000-9ffff, e0000-fffff;
         * If 1M cacheable, then when S3 resume, there is stange color on
         * screen for 2 sec. suppose problem of a0000-dfffff and cache.


@@ -218,7 +218,7 @@ testok:     movb $0x40,%al
        movl    $0x0000000f, %edx /* AMD 40 bit 0xff*/
        movl    $((~(( 0 + 0x80000) - 1)) | 0x800), %eax
        wrmsr
        movl    $0x0000000f, %edx /* AMD 40 bit 0xff*/
        movl    $((~(( 0 + 0x80000) - 1)) | 0x800), %eax
        wrmsr

-       
+

        movl    $0x202, %ecx
        xorl    %edx, %edx
        movl     $(0x80000 | 6), %eax
        movl    $0x202, %ecx
        xorl    %edx, %edx
        movl     $(0x80000 | 6), %eax


@@ -229,7 +229,7 @@ testok:     movb $0x40,%al
        movl    $0x0000000f, %edx /* AMD 40 bit 0xff*/
        movl    $((~(( 0 + 0x20000) - 1)) | 0x800), %eax
        wrmsr
        movl    $0x0000000f, %edx /* AMD 40 bit 0xff*/
        movl    $((~(( 0 + 0x20000) - 1)) | 0x800), %eax
        wrmsr

-       
+

        movl    $0x204, %ecx
        xorl    %edx, %edx
        movl     $(0xc0000 | 6), %eax
        movl    $0x204, %ecx
        xorl    %edx, %edx
        movl     $(0xc0000 | 6), %eax


@@ -239,8 +239,8 @@ testok:     movb $0x40,%al
        movl    $0x205, %ecx
        movl    $0x0000000f, %edx /* AMD 40 bit 0xff*/
        movl    $((~(( 0 + 0x40000) - 1)) | 0x800), %eax
        movl    $0x205, %ecx
        movl    $0x0000000f, %edx /* AMD 40 bit 0xff*/
        movl    $((~(( 0 + 0x40000) - 1)) | 0x800), %eax

-       wrmsr        
-       
+       wrmsr
+

        /* cache XIP_ROM_BASE-SIZE to speedup coreboot code */
        movl    $0x206, %ecx
        xorl    %edx, %edx
        /* cache XIP_ROM_BASE-SIZE to speedup coreboot code */
        movl    $0x206, %ecx
        xorl    %edx, %edx


@@ -267,7 +267,7 @@ testok:     movb $0x40,%al
 __main:
        post_code(0x11)
        cld                     /* clear direction flag */
 __main:
        post_code(0x11)
        cld                     /* clear direction flag */

-       
+

        movl    %ebp, %esi
 
        movl $ROMSTAGE_STACK, %esp
        movl    %ebp, %esi
 
        movl $ROMSTAGE_STACK, %esp


@@ -275,7 +275,7 @@ __main:
        pushl %esi
        call copy_and_run
 
        pushl %esi
        call copy_and_run
 

-.Lhlt: 
+.Lhlt:

        post_code(0xee)
        hlt
        jmp     .Lhlt
        post_code(0xee)
        hlt
        jmp     .Lhlt

diff --git a/src/cpu/via/model_c3/model_c3_init.c b/src/cpu/via/model_c3/model_c3_init.c
index ef979198da714835de8bbdc84fb77f55b1510430..291e4afef9fd8eced2c0aa3f5fcec083c8359f13 100644 (file)
--- a/src/cpu/via/model_c3/model_c3_init.c
+++ b/src/cpu/via/model_c3/model_c3_init.c
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
 /*
  * This file is part of the coreboot project.

- * 
+ *

  * (C) 2007-2008 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or
  * (C) 2007-2008 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or

diff --git a/src/cpu/via/model_c7/model_c7_init.c b/src/cpu/via/model_c7/model_c7_init.c
index da946957c209e49a0358096e8c48d8cf2b008752..5474b8d6c788766697683592b12f16de61cef778 100644 (file)
--- a/src/cpu/via/model_c7/model_c7_init.c
+++ b/src/cpu/via/model_c7/model_c7_init.c
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
 /*
  * This file is part of the coreboot project.

- * 
+ *

  * (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or
  * (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or


@@ -36,7 +36,7 @@
 #define MSR_IA32_MISC_ENABLE   0x000001a0
 
 static int c7a_speed_translation[] = {
 #define MSR_IA32_MISC_ENABLE   0x000001a0
 
 static int c7a_speed_translation[] = {

-//      LFM     HFM             
+//      LFM     HFM

        0x0409, 0x0f13,         // 400MHz, 844mV --> 1500MHz, 1.004V    C7-M
        0x0409, 0x1018,         // 400MHz, 844mV --> 1600MHz, 1.084V
        0x0409, 0x0c18,         // 533MHz, 844mV --> 1600MHz, 1.084V
        0x0409, 0x0f13,         // 400MHz, 844mV --> 1500MHz, 1.004V    C7-M
        0x0409, 0x1018,         // 400MHz, 844mV --> 1600MHz, 1.084V
        0x0409, 0x0c18,         // 533MHz, 844mV --> 1600MHz, 1.084V


@@ -51,7 +51,7 @@ static int c7a_speed_translation[] = {
 };
 
 static int c7d_speed_translation[] = {
 };
 
 static int c7d_speed_translation[] = {

-//      LFM     HFM             
+//      LFM     HFM

        0x0409, 0x1018,         // 400MHz, 844mV --> 1600MHz, 1.084V    C7-M
        0x0409, 0x121f,         // 400MHz, 844mV --> 1800MHz, 1.196V
        0x0809, 0x121f,         // 800MHz, 844mV --> 1800MHz, 1.196V
        0x0409, 0x1018,         // 400MHz, 844mV --> 1600MHz, 1.084V    C7-M
        0x0409, 0x121f,         // 400MHz, 844mV --> 1800MHz, 1.196V
        0x0809, 0x121f,         // 800MHz, 844mV --> 1800MHz, 1.196V

diff --git a/src/cpu/x86/16bit/entry16.inc b/src/cpu/x86/16bit/entry16.inc
index 674315fbd27bb513b90ab28cc139470be593be18..1eb92c82d12bf6bcd15603bbf0f181f8dede4414 100644 (file)
--- a/src/cpu/x86/16bit/entry16.inc
+++ b/src/cpu/x86/16bit/entry16.inc
@@ -21,8 +21,8 @@ it with the version available from LANL.
  */
 
 
  */
 
 

-/** Start code to put an i386 or later processor into 32-bit 
- * protected mode. 
+/** Start code to put an i386 or later processor into 32-bit
+ * protected mode.

  */
 
 /* .section ".rom.text" */
  */
 
 /* .section ".rom.text" */


@@ -31,7 +31,7 @@ it with the version available from LANL.
 .globl _start
 .type _start, @function
 
 .globl _start
 .type _start, @function
 

-_start: 
+_start:

        cli
        /* Save the BIST result */
        movl    %eax, %ebp
        cli
        /* Save the BIST result */
        movl    %eax, %ebp


@@ -68,13 +68,13 @@ _start:
         * pratical problem of being able to write code that can
         * be relocated.
         *
         * pratical problem of being able to write code that can
         * be relocated.
         *

-        * An lgdt call before we have memory enabled cannot be 
+        * An lgdt call before we have memory enabled cannot be

         * position independent, as we cannot execute a call
         * instruction to get our current instruction pointer.
         * So while this code is relocateable it isn't arbitrarily
         * relocatable.
         *
         * position independent, as we cannot execute a call
         * instruction to get our current instruction pointer.
         * So while this code is relocateable it isn't arbitrarily
         * relocatable.
         *

-        * The criteria for relocation have been relaxed to their 
+        * The criteria for relocation have been relaxed to their

         * utmost, so that we can use the same code for both
         * our initial entry point and startup of the second cpu.
         * The code assumes when executing at _start that:
         * utmost, so that we can use the same code for both
         * our initial entry point and startup of the second cpu.
         * The code assumes when executing at _start that:

diff --git a/src/cpu/x86/16bit/reset16.lds b/src/cpu/x86/16bit/reset16.lds
index 929740bd4c90fdf1d5d14873a278ee6bc4a7027d..cec03d6bc6612fa4ddfa7a6c0a3d0949238f5f0c 100644 (file)
--- a/src/cpu/x86/16bit/reset16.lds
+++ b/src/cpu/x86/16bit/reset16.lds
@@ -12,5 +12,5 @@ SECTIONS {
                *(.reset)
                . = 15 ;
                BYTE(0x00);
                *(.reset)
                . = 15 ;
                BYTE(0x00);

-       } 
+       }

 }
 }

diff --git a/src/cpu/x86/32bit/entry32.inc b/src/cpu/x86/32bit/entry32.inc
index bc5e4436aeaa09a37c667d10e27ed5d8a5ca26fc..4e0f3b953a3b73b1de84bea8156c28c3b1481c8b 100644 (file)
--- a/src/cpu/x86/32bit/entry32.inc
+++ b/src/cpu/x86/32bit/entry32.inc
@@ -18,23 +18,23 @@ gdtptr:
        .word   0
 
        /* selgdt 0x08, flat code segment */
        .word   0
 
        /* selgdt 0x08, flat code segment */

-       .word   0xffff, 0x0000          
-       .byte   0x00, 0x9b, 0xcf, 0x00 /* G=1 and 0x0f, So we get 4Gbytes for limit */  
+       .word   0xffff, 0x0000
+       .byte   0x00, 0x9b, 0xcf, 0x00 /* G=1 and 0x0f, So we get 4Gbytes for limit */

 
        /* selgdt 0x10,flat data segment */
 
        /* selgdt 0x10,flat data segment */

-       .word   0xffff, 0x0000          
+       .word   0xffff, 0x0000

        .byte   0x00, 0x93, 0xcf, 0x00
 
 gdt_end:
        .byte   0x00, 0x93, 0xcf, 0x00
 
 gdt_end:

-       
+

 
 /*
 
 /*

- *     When we come here we are in protected mode. We expand 
+ *     When we come here we are in protected mode. We expand

  *     the stack and copies the data segment from ROM to the
  *     memory.
  *
  *     After that, we call the chipset bootstrap routine that
  *     the stack and copies the data segment from ROM to the
  *     memory.
  *
  *     After that, we call the chipset bootstrap routine that

- *     does what is left of the chipset initialization. 
+ *     does what is left of the chipset initialization.

  *
  *     NOTE aligned to 4 so that we are sure that the prefetch
  *     cache will be reloaded.
  *
  *     NOTE aligned to 4 so that we are sure that the prefetch
  *     cache will be reloaded.


@@ -45,7 +45,7 @@ protected_start:
 
        lgdt    %cs:gdtptr
        ljmp    $ROM_CODE_SEG, $__protected_start
 
        lgdt    %cs:gdtptr
        ljmp    $ROM_CODE_SEG, $__protected_start

-       
+

 __protected_start:
        /* Save the BIST value */
        movl    %eax, %ebp
 __protected_start:
        /* Save the BIST value */
        movl    %eax, %ebp

diff --git a/src/cpu/x86/lapic/lapic.c b/src/cpu/x86/lapic/lapic.c
index 555d74eecc4bed1b60db15c877bcac1f903f02e8..c8f83b0dd0b029190e78face2fa212837065bf38 100644 (file)
--- a/src/cpu/x86/lapic/lapic.c
+++ b/src/cpu/x86/lapic/lapic.c
@@ -5,11 +5,11 @@
 
 void setup_lapic(void)
 {
 
 void setup_lapic(void)
 {

-       /* this is so interrupts work. This is very limited scope -- 
+       /* this is so interrupts work. This is very limited scope --

         * linux will do better later, we hope ...
         */
         * linux will do better later, we hope ...
         */

-       /* this is the first way we learned to do it. It fails on real SMP 
-        * stuff. So we have to do things differently ... 
+       /* this is the first way we learned to do it. It fails on real SMP
+        * stuff. So we have to do things differently ...

         * see the Intel mp1.4 spec, page A-3
         */
 
         * see the Intel mp1.4 spec, page A-3
         */
 


@@ -33,25 +33,25 @@ void setup_lapic(void)
                lapic_read_around(LAPIC_TASKPRI) & ~LAPIC_TPRI_MASK);
 
        /* Put the local apic in virtual wire mode */
                lapic_read_around(LAPIC_TASKPRI) & ~LAPIC_TPRI_MASK);
 
        /* Put the local apic in virtual wire mode */

-       lapic_write_around(LAPIC_SPIV, 
+       lapic_write_around(LAPIC_SPIV,

                (lapic_read_around(LAPIC_SPIV) & ~(LAPIC_VECTOR_MASK))
                | LAPIC_SPIV_ENABLE);
                (lapic_read_around(LAPIC_SPIV) & ~(LAPIC_VECTOR_MASK))
                | LAPIC_SPIV_ENABLE);

-       lapic_write_around(LAPIC_LVT0, 
-               (lapic_read_around(LAPIC_LVT0) & 
-                       ~(LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER | 
-                               LAPIC_LVT_REMOTE_IRR | LAPIC_INPUT_POLARITY | 
+       lapic_write_around(LAPIC_LVT0,
+               (lapic_read_around(LAPIC_LVT0) &
+                       ~(LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER |
+                               LAPIC_LVT_REMOTE_IRR | LAPIC_INPUT_POLARITY |

                                LAPIC_SEND_PENDING |LAPIC_LVT_RESERVED_1 |
                                LAPIC_DELIVERY_MODE_MASK))
                                LAPIC_SEND_PENDING |LAPIC_LVT_RESERVED_1 |
                                LAPIC_DELIVERY_MODE_MASK))

-               | (LAPIC_LVT_REMOTE_IRR |LAPIC_SEND_PENDING | 
+               | (LAPIC_LVT_REMOTE_IRR |LAPIC_SEND_PENDING |

                        LAPIC_DELIVERY_MODE_EXTINT)
                );
                        LAPIC_DELIVERY_MODE_EXTINT)
                );

-       lapic_write_around(LAPIC_LVT1, 
-               (lapic_read_around(LAPIC_LVT1) & 
-                       ~(LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER | 
-                               LAPIC_LVT_REMOTE_IRR | LAPIC_INPUT_POLARITY | 
+       lapic_write_around(LAPIC_LVT1,
+               (lapic_read_around(LAPIC_LVT1) &
+                       ~(LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER |
+                               LAPIC_LVT_REMOTE_IRR | LAPIC_INPUT_POLARITY |

                                LAPIC_SEND_PENDING |LAPIC_LVT_RESERVED_1 |
                                LAPIC_DELIVERY_MODE_MASK))
                                LAPIC_SEND_PENDING |LAPIC_LVT_RESERVED_1 |
                                LAPIC_DELIVERY_MODE_MASK))

-               | (LAPIC_LVT_REMOTE_IRR |LAPIC_SEND_PENDING | 
+               | (LAPIC_LVT_REMOTE_IRR |LAPIC_SEND_PENDING |

                        LAPIC_DELIVERY_MODE_NMI)
                );
 
                        LAPIC_DELIVERY_MODE_NMI)
                );
 

diff --git a/src/cpu/x86/lapic/secondary.S b/src/cpu/x86/lapic/secondary.S
index dafc9a561cf656987d4a8479f2830e5fe3853a77..5c1e7607e8ff06437cb61313e3898195aecf2fdf 100644 (file)
--- a/src/cpu/x86/lapic/secondary.S
+++ b/src/cpu/x86/lapic/secondary.S
@@ -26,7 +26,7 @@ _secondary_start:
        movl    %eax, %cr0
 
        ljmpl   $0x10, $1f
        movl    %eax, %cr0
 
        ljmpl   $0x10, $1f

-1:     
+1:

        .code32
        movw    $0x18, %ax
        movw    %ax, %ds
        .code32
        movw    $0x18, %ax
        movw    %ax, %ds

diff --git a/src/cpu/x86/mtrr/earlymtrr.c b/src/cpu/x86/mtrr/earlymtrr.c
index d97cd93deb6f306d8652a41bafa8aeb79ca42901..1cbc5443504a05a602da3e66010e49478c743271 100644 (file)
--- a/src/cpu/x86/mtrr/earlymtrr.c
+++ b/src/cpu/x86/mtrr/earlymtrr.c
@@ -89,13 +89,13 @@ static void do_early_mtrr_init(const unsigned long *mtrr_msrs)
        set_var_mtrr(1, REAL_XIP_ROM_BASE, CONFIG_XIP_ROM_SIZE, MTRR_TYPE_WRBACK);
 #endif
 
        set_var_mtrr(1, REAL_XIP_ROM_BASE, CONFIG_XIP_ROM_SIZE, MTRR_TYPE_WRBACK);
 #endif
 

-       /* Set the default memory type and enable fixed and variable MTRRs 
+       /* Set the default memory type and enable fixed and variable MTRRs

         */
        /* Enable Variable MTRRs */
        msr.hi = 0x00000000;
        msr.lo = 0x00000800;
        wrmsr(MTRRdefType_MSR, msr);
         */
        /* Enable Variable MTRRs */
        msr.hi = 0x00000000;
        msr.lo = 0x00000800;
        wrmsr(MTRRdefType_MSR, msr);

-       
+

 }
 
 static inline void early_mtrr_init(void)
 }
 
 static inline void early_mtrr_init(void)

diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c
index 94d7ca7d35eb7900642bc3b94eca0950708a58ac..d44687a0e9602f7b54167d249ae6a4eeab690e1f 100644 (file)
--- a/src/cpu/x86/mtrr/mtrr.c
+++ b/src/cpu/x86/mtrr/mtrr.c
@@ -68,7 +68,7 @@ static void enable_var_mtrr(void)
 
 /* setting variable mtrr, comes from linux kernel source */
 static void set_var_mtrr(
 
 /* setting variable mtrr, comes from linux kernel source */
 static void set_var_mtrr(

-       unsigned int reg, unsigned long basek, unsigned long sizek, 
+       unsigned int reg, unsigned long basek, unsigned long sizek,

        unsigned char type, unsigned address_bits)
 {
        msr_t base, mask;
        unsigned char type, unsigned address_bits)
 {
        msr_t base, mask;


@@ -81,7 +81,7 @@ static void set_var_mtrr(
         // do this.
         if (sizek == 0) {
                disable_cache();
         // do this.
         if (sizek == 0) {
                disable_cache();

-       
+

                 msr_t zero;
                 zero.lo = zero.hi = 0;
                 /* The invalid bit is kept in the mask, so we simply clear the
                 msr_t zero;
                 zero.lo = zero.hi = 0;
                 /* The invalid bit is kept in the mask, so we simply clear the


@@ -109,8 +109,8 @@ static void set_var_mtrr(
                mask.lo = 0;
        }
 
                mask.lo = 0;
        }
 

-       // it is recommended that we disable and enable cache when we 
-       // do this. 
+       // it is recommended that we disable and enable cache when we
+       // do this.

        disable_cache();
 
        /* Bit 32-35 of MTRRphysMask should be set to 1 */
        disable_cache();
 
        /* Bit 32-35 of MTRRphysMask should be set to 1 */


@@ -228,7 +228,7 @@ static unsigned fixed_mtrr_index(unsigned long addrk)
        return index;
 }
 
        return index;
 }
 

-static unsigned int range_to_mtrr(unsigned int reg, 
+static unsigned int range_to_mtrr(unsigned int reg,

        unsigned long range_startk, unsigned long range_sizek,
        unsigned long next_range_startk, unsigned char type, unsigned address_bits)
 {
        unsigned long range_startk, unsigned long range_sizek,
        unsigned long next_range_startk, unsigned char type, unsigned address_bits)
 {


@@ -253,7 +253,7 @@ static unsigned int range_to_mtrr(unsigned int reg,
                unsigned long sizek;
                /* Compute the maximum size I can make a range */
                max_align = fls(range_startk);
                unsigned long sizek;
                /* Compute the maximum size I can make a range */
                max_align = fls(range_startk);

-               align = fms(range_sizek); 
+               align = fms(range_sizek);

                if (align > max_align) {
                        align = max_align;
                }
                if (align > max_align) {
                        align = max_align;
                }


@@ -274,7 +274,7 @@ static unsigned int range_to_mtrr(unsigned int reg,
        return reg;
 }
 
        return reg;
 }
 

-static unsigned long resk(uint64_t value) 
+static unsigned long resk(uint64_t value)

 {
        unsigned long resultk;
        if (value < (1ULL << 42)) {
 {
        unsigned long resultk;
        if (value < (1ULL << 42)) {


@@ -298,7 +298,7 @@ static void set_fixed_mtrr_resource(void *gp, struct device *dev, struct resourc
        printk(BIOS_DEBUG, "Setting fixed MTRRs(%d-%d) Type: WB\n",
                start_mtrr, last_mtrr);
        set_fixed_mtrrs(start_mtrr, last_mtrr, MTRR_TYPE_WRBACK);
        printk(BIOS_DEBUG, "Setting fixed MTRRs(%d-%d) Type: WB\n",
                start_mtrr, last_mtrr);
        set_fixed_mtrrs(start_mtrr, last_mtrr, MTRR_TYPE_WRBACK);

-       
+

 }
 
 #ifndef CONFIG_VAR_MTRR_HOLE
 }
 
 #ifndef CONFIG_VAR_MTRR_HOLE


@@ -343,10 +343,10 @@ void set_var_mtrr_resource(void *gp, struct device *dev, struct resource *res)
                        return;
                }
 #endif
                        return;
                }
 #endif

-               state->reg = range_to_mtrr(state->reg, state->range_startk, 
+               state->reg = range_to_mtrr(state->reg, state->range_startk,

                        state->range_sizek, basek, MTRR_TYPE_WRBACK, state->address_bits);
 #if CONFIG_VAR_MTRR_HOLE
                        state->range_sizek, basek, MTRR_TYPE_WRBACK, state->address_bits);
 #if CONFIG_VAR_MTRR_HOLE

-               state->reg = range_to_mtrr(state->reg, state->hole_startk, 
+               state->reg = range_to_mtrr(state->reg, state->hole_startk,

                        state->hole_sizek, basek,  MTRR_TYPE_UNCACHEABLE, state->address_bits);
 #endif
                state->range_startk = 0;
                        state->hole_sizek, basek,  MTRR_TYPE_UNCACHEABLE, state->address_bits);
 #endif
                state->range_startk = 0;


@@ -356,7 +356,7 @@ void set_var_mtrr_resource(void *gp, struct device *dev, struct resource *res)
                 state->hole_sizek = 0;
 #endif
        }
                 state->hole_sizek = 0;
 #endif
        }

-       /* Allocate an msr */  
+       /* Allocate an msr */

        printk(BIOS_SPEW, " Allocate an msr - basek = %08lx, sizek = %08lx,\n", basek, sizek);
        state->range_startk = basek;
        state->range_sizek  = sizek;
        printk(BIOS_SPEW, " Allocate an msr - basek = %08lx, sizek = %08lx,\n", basek, sizek);
        state->range_startk = basek;
        state->range_sizek  = sizek;


@@ -365,7 +365,7 @@ void set_var_mtrr_resource(void *gp, struct device *dev, struct resource *res)
 void x86_setup_fixed_mtrrs(void)
 {
         /* Try this the simple way of incrementally adding together
 void x86_setup_fixed_mtrrs(void)
 {
         /* Try this the simple way of incrementally adding together

-         * mtrrs.  If this doesn't work out we can get smart again 
+         * mtrrs.  If this doesn't work out we can get smart again

          * and clear out the mtrrs.
          */
 
          * and clear out the mtrrs.
          */
 


@@ -390,20 +390,20 @@ void x86_setup_fixed_mtrrs(void)
 
 void x86_setup_var_mtrrs(unsigned address_bits)
 /* this routine needs to know how many address bits a given processor
 
 void x86_setup_var_mtrrs(unsigned address_bits)
 /* this routine needs to know how many address bits a given processor

- * supports.  CPUs get grumpy when you set too many bits in 
+ * supports.  CPUs get grumpy when you set too many bits in

  * their mtrr registers :(  I would generically call cpuid here
  * and find out how many physically supported but some cpus are
  * buggy, and report more bits then they actually support.
  */
 {
        /* Try this the simple way of incrementally adding together
  * their mtrr registers :(  I would generically call cpuid here
  * and find out how many physically supported but some cpus are
  * buggy, and report more bits then they actually support.
  */
 {
        /* Try this the simple way of incrementally adding together

-        * mtrrs.  If this doesn't work out we can get smart again 
+        * mtrrs.  If this doesn't work out we can get smart again

         * and clear out the mtrrs.
         */
        struct var_mtrr_state var_state;
 
        /* Cache as many memory areas as possible */
         * and clear out the mtrrs.
         */
        struct var_mtrr_state var_state;
 
        /* Cache as many memory areas as possible */

-       /* FIXME is there an algorithm for computing the optimal set of mtrrs? 
+       /* FIXME is there an algorithm for computing the optimal set of mtrrs?

         * In some cases it is definitely possible to do better.
         */
        var_state.range_startk = 0;
         * In some cases it is definitely possible to do better.
         */
        var_state.range_startk = 0;


@@ -431,7 +431,7 @@ void x86_setup_var_mtrrs(unsigned address_bits)
        }
 #endif
        /* Write the last range */
        }
 #endif
        /* Write the last range */

-       var_state.reg = range_to_mtrr(var_state.reg, var_state.range_startk, 
+       var_state.reg = range_to_mtrr(var_state.reg, var_state.range_startk,

                var_state.range_sizek, 0, MTRR_TYPE_WRBACK, var_state.address_bits);
 #if CONFIG_VAR_MTRR_HOLE
        var_state.reg = range_to_mtrr(var_state.reg, var_state.hole_startk,
                var_state.range_sizek, 0, MTRR_TYPE_WRBACK, var_state.address_bits);
 #if CONFIG_VAR_MTRR_HOLE
        var_state.reg = range_to_mtrr(var_state.reg, var_state.hole_startk,

diff --git a/src/cpu/x86/pae/pgtbl.c b/src/cpu/x86/pae/pgtbl.c
index 4440d7bd8c579a280170c4b7a6648515ee168e74..0bec349444c9f7f380e858c3c4ec30cb590f0b3d 100644 (file)
--- a/src/cpu/x86/pae/pgtbl.c
+++ b/src/cpu/x86/pae/pgtbl.c
@@ -43,7 +43,7 @@ static void paging_on(void *pdp)
                );
 }
 
                );
 }
 

-void *map_2M_page(unsigned long page) 
+void *map_2M_page(unsigned long page)

 {
        struct pde {
                uint32_t addr_lo;
 {
        struct pde {
                uint32_t addr_lo;


@@ -56,7 +56,7 @@ void *map_2M_page(unsigned long page)
 
 #if (CONFIG_RAMTOP>0x100000) && (CONFIG_RAMBASE<0x100000) && ((CONFIG_CONSOLE_VGA==1) || (CONFIG_PCI_ROM_RUN == 1))
        /*
 
 #if (CONFIG_RAMTOP>0x100000) && (CONFIG_RAMBASE<0x100000) && ((CONFIG_CONSOLE_VGA==1) || (CONFIG_PCI_ROM_RUN == 1))
        /*

-        pgtbl is too big, so use last one 1M before CONFIG_LB_MEM_TOP, otherwise for 8 way dual core with vga support will push stack and heap cross 0xa0000, 
+        pgtbl is too big, so use last one 1M before CONFIG_LB_MEM_TOP, otherwise for 8 way dual core with vga support will push stack and heap cross 0xa0000,

         and that region need to be used as vga font buffer. Please make sure set CONFIG_RAMTOP=0x200000 in MB Config
        */
        struct pg_table *pgtbl = (struct pg_table*)0x100000; //1M
         and that region need to be used as vga font buffer. Please make sure set CONFIG_RAMTOP=0x200000 in MB Config
        */
        struct pg_table *pgtbl = (struct pg_table*)0x100000; //1M

diff --git a/src/cpu/x86/smm/smiutil.c b/src/cpu/x86/smm/smiutil.c
index 9a2dfa599e206c579435a5f8c1b8882184e889d2..980ea69f51d070c37ce99afa7402aaea46eb512f 100644 (file)
--- a/src/cpu/x86/smm/smiutil.c
+++ b/src/cpu/x86/smm/smiutil.c
@@ -72,14 +72,14 @@ static int uart_can_tx_byte(void)
 
 static void uart_wait_to_tx_byte(void)
 {
 
 static void uart_wait_to_tx_byte(void)
 {

-       while(!uart_can_tx_byte()) 
+       while(!uart_can_tx_byte())

        ;
 }
 
 static void uart_wait_until_sent(void)
 {
        while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
        ;
 }
 
 static void uart_wait_until_sent(void)
 {
        while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))

-       ; 
+       ;

 }
 
 static void uart_tx_byte(unsigned char data)
 }
 
 static void uart_tx_byte(unsigned char data)

diff --git a/src/cpu/x86/smm/smm.ld b/src/cpu/x86/smm/smm.ld
index 1b25c2d2f8c59ea1a45a036afa512be82eb51bd8..d5c7127a156bcb3f9f8fd37fbb0434d662b30dfc 100644 (file)
--- a/src/cpu/x86/smm/smm.ld
+++ b/src/cpu/x86/smm/smm.ld
@@ -4,7 +4,7 @@ CPUS = 4;
 
 SECTIONS
 {
 
 SECTIONS
 {

-       /* This is the actual SMM handler. 
+       /* This is the actual SMM handler.

         *
         * We just put code, rodata, data and bss all in a row.
         */
         *
         * We just put code, rodata, data and bss all in a row.
         */


@@ -43,7 +43,7 @@ SECTIONS
        . = 0xa8000 - (( CPUS - 1) * 0x400);
        .jumptable : {
                *(.jumptable)
        . = 0xa8000 - (( CPUS - 1) * 0x400);
        .jumptable : {
                *(.jumptable)

-       }       
+       }

 
        /DISCARD/ : {
                *(.comment)
 
        /DISCARD/ : {
                *(.comment)

diff --git a/src/cpu/x86/smm/smmhandler.S b/src/cpu/x86/smm/smmhandler.S
index b443e5c1fe34204ecb8de6f08702a35e2998afd8..3dd0b14c5a1b9fe0cbbe9aa209d3ad3890309dfe 100644 (file)
--- a/src/cpu/x86/smm/smmhandler.S
+++ b/src/cpu/x86/smm/smmhandler.S
@@ -38,11 +38,11 @@
  * |                                |
  * |                                |
  * +--------------------------------+ 0xa8400
  * |                                |
  * |                                |
  * +--------------------------------+ 0xa8400

- * | SMM Entry Node 0 (+ stack)     | 
+ * | SMM Entry Node 0 (+ stack)     |

  * +--------------------------------+ 0xa8000
  * +--------------------------------+ 0xa8000

- * | SMM Entry Node 1 (+ stack)     | 
- * | SMM Entry Node 2 (+ stack)     | 
- * | SMM Entry Node 3 (+ stack)     | 
+ * | SMM Entry Node 1 (+ stack)     |
+ * | SMM Entry Node 2 (+ stack)     |
+ * | SMM Entry Node 3 (+ stack)     |

  * | ...                            |
  * +--------------------------------+ 0xa7400
  * |                                |
  * | ...                            |
  * +--------------------------------+ 0xa7400
  * |                                |


@@ -56,7 +56,7 @@
 
 /* SMM_HANDLER_OFFSET is the 16bit offset within the ASEG
  * at which smm_handler_start lives. At the moment the handler
 
 /* SMM_HANDLER_OFFSET is the 16bit offset within the ASEG
  * at which smm_handler_start lives. At the moment the handler

- * lives right at 0xa0000, so the offset is 0. 
+ * lives right at 0xa0000, so the offset is 0.

  */
 
 #define SMM_HANDLER_OFFSET 0x0000
  */
 
 #define SMM_HANDLER_OFFSET 0x0000


@@ -101,15 +101,15 @@ smm_handler_start:
        movl $LAPIC_ID, %esi
        movl (%esi), %ecx
        shr  $24, %ecx
        movl $LAPIC_ID, %esi
        movl (%esi), %ecx
        shr  $24, %ecx

-       
+

        /* calculate stack offset by multiplying the APIC ID
         * by 1024 (0x400), and save that offset in ebp.
         */
        shl $10, %ecx
        movl %ecx, %ebp
 
        /* calculate stack offset by multiplying the APIC ID
         * by 1024 (0x400), and save that offset in ebp.
         */
        shl $10, %ecx
        movl %ecx, %ebp
 

-       /* We put the stack for each core right above 
-        * its SMM entry point. Core 0 starts at 0xa8000, 
+       /* We put the stack for each core right above
+        * its SMM entry point. Core 0 starts at 0xa8000,

         * we spare 0x10 bytes for the jump to be sure.
         */
        movl $0xa8010, %eax
         * we spare 0x10 bytes for the jump to be sure.
         */
        movl $0xa8010, %eax


@@ -155,11 +155,11 @@ smm_gdt:
        .long   0x00000000, 0x00000000
 
        /* gdt selector 0x08, flat code segment */
        .long   0x00000000, 0x00000000
 
        /* gdt selector 0x08, flat code segment */

-       .word   0xffff, 0x0000          
-       .byte   0x00, 0x9b, 0xcf, 0x00 /* G=1 and 0x0f, 4GB limit */    
+       .word   0xffff, 0x0000
+       .byte   0x00, 0x9b, 0xcf, 0x00 /* G=1 and 0x0f, 4GB limit */

 
        /* gdt selector 0x10, flat data segment */
 
        /* gdt selector 0x10, flat data segment */

-       .word   0xffff, 0x0000          
+       .word   0xffff, 0x0000

        .byte   0x00, 0x93, 0xcf, 0x00
 
 smm_gdt_end:
        .byte   0x00, 0x93, 0xcf, 0x00
 
 smm_gdt_end:


@@ -168,7 +168,7 @@ smm_gdt_end:
 .section ".jumptable", "a", @progbits
 
 /* This is the SMM jump table. All cores use the same SMM handler
 .section ".jumptable", "a", @progbits
 
 /* This is the SMM jump table. All cores use the same SMM handler

- * for simplicity. But SMM Entry needs to be different due to the 
+ * for simplicity. But SMM Entry needs to be different due to the

  * save state area. The jump table makes sure all CPUs jump into the
  * real handler on SMM entry.
  */
  * save state area. The jump table makes sure all CPUs jump into the
  * real handler on SMM entry.
  */


@@ -185,13 +185,13 @@ smm_gdt_end:
 .code16
 jumptable:
        /* core 3 */
 .code16
 jumptable:
        /* core 3 */

-       ljmp $0xa000, $SMM_HANDLER_OFFSET 
+       ljmp $0xa000, $SMM_HANDLER_OFFSET

 .align 1024, 0x00
        /* core 2 */
 .align 1024, 0x00
        /* core 2 */

-       ljmp $0xa000, $SMM_HANDLER_OFFSET 
+       ljmp $0xa000, $SMM_HANDLER_OFFSET

 .align 1024, 0x00
        /* core 1 */
 .align 1024, 0x00
        /* core 1 */

-       ljmp $0xa000, $SMM_HANDLER_OFFSET 
+       ljmp $0xa000, $SMM_HANDLER_OFFSET

 .align 1024, 0x00
        /* core 0 */
        ljmp $0xa000, $SMM_HANDLER_OFFSET
 .align 1024, 0x00
        /* core 0 */
        ljmp $0xa000, $SMM_HANDLER_OFFSET

diff --git a/src/cpu/x86/smm/smmrelocate.S b/src/cpu/x86/smm/smmrelocate.S
index 14fdc639bcec0aa464ca6e0e2701fe2c2cc73a46..50a8f28c3faa6d0f94dda7c191a30df75f884cfc 100644 (file)
--- a/src/cpu/x86/smm/smmrelocate.S
+++ b/src/cpu/x86/smm/smmrelocate.S
@@ -22,7 +22,7 @@
 // Make sure no stage 2 code is included:
 #define __PRE_RAM__
 
 // Make sure no stage 2 code is included:
 #define __PRE_RAM__
 

-// FIXME: Is this piece of code southbridge specific, or 
+// FIXME: Is this piece of code southbridge specific, or

 // can it be cleaned up so this include is not required?
 // It's needed right now because we get our PM_BASE from
 // here.
 // can it be cleaned up so this include is not required?
 // It's needed right now because we get our PM_BASE from
 // here.


@@ -73,7 +73,7 @@
  * 0xa0000-0xa0400 and the stub plus stack would need to go
  * at 0xa8000-0xa8100 (example for core 0). That is not enough.
  *
  * 0xa0000-0xa0400 and the stub plus stack would need to go
  * at 0xa8000-0xa8100 (example for core 0). That is not enough.
  *

- * This means we're basically limited to 16 cpu cores before 
+ * This means we're basically limited to 16 cpu cores before

  * we need to use the TSEG/HSEG for the actual SMM handler plus stack.
  * When we exceed 32 cores, we also need to put SMBASE to TSEG/HSEG.
  *
  * we need to use the TSEG/HSEG for the actual SMM handler plus stack.
  * When we exceed 32 cores, we also need to put SMBASE to TSEG/HSEG.
  *


@@ -101,7 +101,7 @@ smm_relocation_start:
        addr32 mov (%ebx), %al
        cmp $0x64, %al
        je 1f
        addr32 mov (%ebx), %al
        cmp $0x64, %al
        je 1f

- 
+

        mov $0x38000 + 0x7ef8, %ebx
        jmp smm_relocate
 1:
        mov $0x38000 + 0x7ef8, %ebx
        jmp smm_relocate
 1:


@@ -112,8 +112,8 @@ smm_relocate:
        movl $LAPIC_ID, %esi
        addr32 movl (%esi), %ecx
        shr  $24, %ecx
        movl $LAPIC_ID, %esi
        addr32 movl (%esi), %ecx
        shr  $24, %ecx

-       
-       /* calculate offset by multiplying the 
+
+       /* calculate offset by multiplying the

         * apic ID by 1024 (0x400)
         */
        movl %ecx, %edx
         * apic ID by 1024 (0x400)
         */
        movl %ecx, %edx


@@ -158,7 +158,7 @@ smm_relocate:
        outb %al, %dx
        /* calculate ascii of cpu number. More than 9 cores? -> FIXME */
        movb %cl, %al
        outb %al, %dx
        /* calculate ascii of cpu number. More than 9 cores? -> FIXME */
        movb %cl, %al

-       addb $'0', %al 
+       addb $'0', %al

        outb %al, %dx
        mov $']', %al
        outb %al, %dx
        outb %al, %dx
        mov $']', %al
        outb %al, %dx

diff --git a/src/cpu/x86/sse_disable.inc b/src/cpu/x86/sse_disable.inc
index a18ea18643fd14e14ba996185ca59559ac9989c1..a42cb412594f40a0ec8930577c6e085f71f94e1e 100644 (file)
--- a/src/cpu/x86/sse_disable.inc
+++ b/src/cpu/x86/sse_disable.inc
@@ -2,7 +2,7 @@
         * Put the processor back into a reset state
         * with respect to the xmm registers.
         */
         * Put the processor back into a reset state
         * with respect to the xmm registers.
         */

-       
+

        xorps %xmm0, %xmm0
        xorps %xmm1, %xmm1
        xorps %xmm2, %xmm2
        xorps %xmm0, %xmm0
        xorps %xmm1, %xmm1
        xorps %xmm2, %xmm2

diff --git a/src/cpu/x86/tsc/delay_tsc.c b/src/cpu/x86/tsc/delay_tsc.c
index 4a8fd5287e228ca8f8f1f668aff789d9764b6d62..27c89e3a94768eaa32eb41b53d96bb502266e31d 100644 (file)
--- a/src/cpu/x86/tsc/delay_tsc.c
+++ b/src/cpu/x86/tsc/delay_tsc.c
@@ -10,7 +10,7 @@ static unsigned long clocks_per_usec;
 #if (CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 == 1)
 #define CLOCK_TICK_RATE        1193180U /* Underlying HZ */
 
 #if (CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 == 1)
 #define CLOCK_TICK_RATE        1193180U /* Underlying HZ */
 

-/* ------ Calibrate the TSC ------- 
+/* ------ Calibrate the TSC -------

  * Too much 64-bit arithmetic here to do this cleanly in C, and for
  * accuracy's sake we want to keep the overhead on the CTC speaker (channel 2)
  * output busy loop as low as possible. We avoid reading the CTC registers
  * Too much 64-bit arithmetic here to do this cleanly in C, and for
  * accuracy's sake we want to keep the overhead on the CTC speaker (channel 2)
  * output busy loop as low as possible. We avoid reading the CTC registers


@@ -88,13 +88,13 @@ bad_ctc:
  * this is the "no timer2" version.
  * to calibrate tsc, we get a TSC reading, then do 1,000,000 outbs to port 0x80
  * then we read TSC again, and divide the difference by 1,000,000
  * this is the "no timer2" version.
  * to calibrate tsc, we get a TSC reading, then do 1,000,000 outbs to port 0x80
  * then we read TSC again, and divide the difference by 1,000,000

- * we have found on a wide range of machines that this gives us a a 
+ * we have found on a wide range of machines that this gives us a a

  * good microsecond value
  * to +- 10%. On a dual AMD 1.6 Ghz box, it gives us .97 microseconds, and on a
  * 267 Mhz. p5, it gives us 1.1 microseconds.
  * also, since gcc now supports long long, we use that.
  * also no unsigned long long / operator, so we play games.
  * good microsecond value
  * to +- 10%. On a dual AMD 1.6 Ghz box, it gives us .97 microseconds, and on a
  * 267 Mhz. p5, it gives us 1.1 microseconds.
  * also, since gcc now supports long long, we use that.
  * also no unsigned long long / operator, so we play games.

- * about the only thing you can do with long longs, it seems, 
+ * about the only thing you can do with long longs, it seems,

  *is return them and assign them.
  * (and do asm on them, yuck)
  * so avoid all ops on long longs.
  *is return them and assign them.
  * (and do asm on them, yuck)
  * so avoid all ops on long longs.


@@ -103,7 +103,7 @@ static unsigned long long calibrate_tsc(void)
 {
        unsigned long long start, end, delta;
        unsigned long result, count;
 {
        unsigned long long start, end, delta;
        unsigned long result, count;

-       
+

        printk(BIOS_SPEW, "Calibrating delay loop...\n");
        start = rdtscll();
        // no udivdi3 because we don't like libgcc. (only in x86emu)
        printk(BIOS_SPEW, "Calibrating delay loop...\n");
        start = rdtscll();
        // no udivdi3 because we don't like libgcc. (only in x86emu)


@@ -130,7 +130,7 @@ static unsigned long long calibrate_tsc(void)
        result = delta;
        printk(BIOS_SPEW, "end %llx, start %llx\n", end, start);
        printk(BIOS_SPEW, "32-bit delta %ld\n", (unsigned long) delta);
        result = delta;
        printk(BIOS_SPEW, "end %llx, start %llx\n", end, start);
        printk(BIOS_SPEW, "32-bit delta %ld\n", (unsigned long) delta);

-       
+

        printk(BIOS_SPEW, "%s 32-bit result is %ld\n",
                        __func__,
                        result);
        printk(BIOS_SPEW, "%s 32-bit result is %ld\n",
                        __func__,
                        result);

diff --git a/src/devices/cardbus_device.c b/src/devices/cardbus_device.c
index becdafd42f7efd1a7831b2c69ca9f8cb79ffe06c..044dfd274fcb4298f0cbb9d25b259f8311027f87 100644 (file)
--- a/src/devices/cardbus_device.c
+++ b/src/devices/cardbus_device.c
@@ -159,8 +159,8 @@ void cardbus_enable_resources(device_t dev)
        uint16_t ctrl;
        ctrl = pci_read_config16(dev, PCI_CB_BRIDGE_CONTROL);
        ctrl |= (dev->link[0].bridge_ctrl & (
        uint16_t ctrl;
        ctrl = pci_read_config16(dev, PCI_CB_BRIDGE_CONTROL);
        ctrl |= (dev->link[0].bridge_ctrl & (

-                       PCI_BRIDGE_CTL_PARITY | 
-                       PCI_BRIDGE_CTL_SERR | 
+                       PCI_BRIDGE_CTL_PARITY |
+                       PCI_BRIDGE_CTL_SERR |

                        PCI_BRIDGE_CTL_NO_ISA |
                        PCI_BRIDGE_CTL_VGA |
                        PCI_BRIDGE_CTL_MASTER_ABORT |
                        PCI_BRIDGE_CTL_NO_ISA |
                        PCI_BRIDGE_CTL_VGA |
                        PCI_BRIDGE_CTL_MASTER_ABORT |


@@ -174,8 +174,8 @@ void cardbus_enable_resources(device_t dev)
        enable_childrens_resources(dev);
 }
 
        enable_childrens_resources(dev);
 }
 

-unsigned int cardbus_scan_bus(struct bus *bus, 
-       unsigned min_devfn, unsigned max_devfn, 
+unsigned int cardbus_scan_bus(struct bus *bus,
+       unsigned min_devfn, unsigned max_devfn,

        unsigned int max)
 {
        return pci_scan_bus(bus, min_devfn, max_devfn, max);
        unsigned int max)
 {
        return pci_scan_bus(bus, min_devfn, max_devfn, max);


@@ -196,7 +196,7 @@ unsigned int cardbus_scan_bridge(device_t dev, unsigned int max)
 
        /* Set up the primary, secondary and subordinate bus numbers. We have
         * no idea how many buses are behind this bridge yet, so we set the
 
        /* Set up the primary, secondary and subordinate bus numbers. We have
         * no idea how many buses are behind this bridge yet, so we set the

-        * subordinate bus number to 0xff for the moment. 
+        * subordinate bus number to 0xff for the moment.

         */
        bus->secondary = ++max;
        bus->subordinate = 0xff;
         */
        bus->secondary = ++max;
        bus->subordinate = 0xff;


@@ -222,7 +222,7 @@ unsigned int cardbus_scan_bridge(device_t dev, unsigned int max)
                ((unsigned int) (bus->subordinate) << 16));
        pci_write_config32(dev, PCI_CB_PRIMARY_BUS, buses);
 
                ((unsigned int) (bus->subordinate) << 16));
        pci_write_config32(dev, PCI_CB_PRIMARY_BUS, buses);
 

-       /* Now we can scan all subordinate buses 
+       /* Now we can scan all subordinate buses

         * i.e. the bus behind the bridge.
         */
        max = cardbus_scan_bus(bus, 0x00, 0xff, max);
         * i.e. the bus behind the bridge.
         */
        max = cardbus_scan_bus(bus, 0x00, 0xff, max);


@@ -235,7 +235,7 @@ unsigned int cardbus_scan_bridge(device_t dev, unsigned int max)
                ((unsigned int) (bus->subordinate) << 16);
        pci_write_config32(dev, PCI_CB_PRIMARY_BUS, buses);
        pci_write_config16(dev, PCI_COMMAND, cr);
                ((unsigned int) (bus->subordinate) << 16);
        pci_write_config32(dev, PCI_CB_PRIMARY_BUS, buses);
        pci_write_config16(dev, PCI_COMMAND, cr);

-       
+

        printk(BIOS_SPEW, "%s returns max %d\n", __func__, max);
        return max;
 }
        printk(BIOS_SPEW, "%s returns max %d\n", __func__, max);
        return max;
 }

diff --git a/src/devices/device_util.c b/src/devices/device_util.c
index e44a02e428e51333ad073689a560f0dd3a201328..3e8cba2f9815d1fe14cca136492edaf5d127c263 100644 (file)
--- a/src/devices/device_util.c
+++ b/src/devices/device_util.c
@@ -79,7 +79,7 @@ struct device *dev_find_slot(unsigned int bus, unsigned int devfn)
        result = 0;
        for (dev = all_devices; dev; dev = dev->next) {
                if ((dev->path.type == DEVICE_PATH_PCI) &&
        result = 0;
        for (dev = all_devices; dev; dev = dev->next) {
                if ((dev->path.type == DEVICE_PATH_PCI) &&

-                       (dev->bus->secondary == bus) && 
+                       (dev->bus->secondary == bus) &&

                        (dev->path.pci.devfn == devfn)) {
                        result = dev;
                        break;
                        (dev->path.pci.devfn == devfn)) {
                        result = dev;
                        break;


@@ -92,32 +92,32 @@ struct device *dev_find_slot(unsigned int bus, unsigned int devfn)
  * @brief Given a smbus bus and a device number, find the device structure
  *
  * @param bus The bus number
  * @brief Given a smbus bus and a device number, find the device structure
  *
  * @param bus The bus number

- * @param addr a device number 
+ * @param addr a device number

  * @return pointer to the device structure
  */
 struct device *dev_find_slot_on_smbus(unsigned int bus, unsigned int addr)
 {
         struct device *dev, *result;
  * @return pointer to the device structure
  */
 struct device *dev_find_slot_on_smbus(unsigned int bus, unsigned int addr)
 {
         struct device *dev, *result;

-        
+

         result = 0;
         for (dev = all_devices; dev; dev = dev->next) {
                 if ((dev->path.type == DEVICE_PATH_I2C) &&
         result = 0;
         for (dev = all_devices; dev; dev = dev->next) {
                 if ((dev->path.type == DEVICE_PATH_I2C) &&

-                        (dev->bus->secondary == bus) && 
+                        (dev->bus->secondary == bus) &&

                         (dev->path.i2c.device == addr)) {
                         result = dev;
                         (dev->path.i2c.device == addr)) {
                         result = dev;

-                        break; 
-                }       
-        }       
+                        break;
+                }
+        }

         return result;
         return result;

-}    
+}

 
 /** Find a device of a given vendor and type
  * @param vendor Vendor ID (e.g. 0x8086 for Intel)
  * @param device Device ID
  * @param from Pointer to the device structure, used as a starting point
 
 /** Find a device of a given vendor and type
  * @param vendor Vendor ID (e.g. 0x8086 for Intel)
  * @param device Device ID
  * @param from Pointer to the device structure, used as a starting point

- *        in the linked list of all_devices, which can be 0 to start at the 
+ *        in the linked list of all_devices, which can be 0 to start at the

  *        head of the list (i.e. all_devices)
  *        head of the list (i.e. all_devices)

- * @return Pointer to the device struct 
+ * @return Pointer to the device struct

  */
 struct device *dev_find_device(unsigned int vendor, unsigned int device, struct device *from)
 {
  */
 struct device *dev_find_device(unsigned int vendor, unsigned int device, struct device *from)
 {


@@ -134,9 +134,9 @@ struct device *dev_find_device(unsigned int vendor, unsigned int device, struct
 /** Find a device of a given class
  * @param class Class of the device
  * @param from Pointer to the device structure, used as a starting point
 /** Find a device of a given class
  * @param class Class of the device
  * @param from Pointer to the device structure, used as a starting point

- *        in the linked list of all_devices, which can be 0 to start at the 
+ *        in the linked list of all_devices, which can be 0 to start at the

  *        head of the list (i.e. all_devices)
  *        head of the list (i.e. all_devices)

- * @return Pointer to the device struct 
+ * @return Pointer to the device struct

  */
 struct device *dev_find_class(unsigned int class, struct device *from)
 {
  */
 struct device *dev_find_class(unsigned int class, struct device *from)
 {


@@ -167,11 +167,11 @@ const char *dev_path(device_t dev)
                case DEVICE_PATH_PCI:
 #if CONFIG_PCI_BUS_SEGN_BITS
                        sprintf(buffer, "PCI: %04x:%02x:%02x.%01x",
                case DEVICE_PATH_PCI:
 #if CONFIG_PCI_BUS_SEGN_BITS
                        sprintf(buffer, "PCI: %04x:%02x:%02x.%01x",

-                               dev->bus->secondary>>8, dev->bus->secondary & 0xff, 
+                               dev->bus->secondary>>8, dev->bus->secondary & 0xff,

                                PCI_SLOT(dev->path.pci.devfn), PCI_FUNC(dev->path.pci.devfn));
 #else
                        sprintf(buffer, "PCI: %02x:%02x.%01x",
                                PCI_SLOT(dev->path.pci.devfn), PCI_FUNC(dev->path.pci.devfn));
 #else
                        sprintf(buffer, "PCI: %02x:%02x.%01x",

-                               dev->bus->secondary, 
+                               dev->bus->secondary,

                                PCI_SLOT(dev->path.pci.devfn), PCI_FUNC(dev->path.pci.devfn));
 #endif
                        break;
                                PCI_SLOT(dev->path.pci.devfn), PCI_FUNC(dev->path.pci.devfn));
 #endif
                        break;


@@ -408,7 +408,7 @@ resource_t resource_end(struct resource *resource)
         * the bridge.  While the granularity is simply how many low bits of the
         * address cannot be set.
         */
         * the bridge.  While the granularity is simply how many low bits of the
         * address cannot be set.
         */

-       
+

        /* Get the end (rounded up) */
        end = base + align_up(resource->size, resource->gran) - 1;
 
        /* Get the end (rounded up) */
        end = base + align_up(resource->size, resource->gran) - 1;
 


@@ -468,7 +468,7 @@ void report_resource_stored(device_t dev, struct resource *resource, const char
                        sprintf(buf, "bus %02x ", dev->link[0].secondary);
 #endif
                }
                        sprintf(buf, "bus %02x ", dev->link[0].secondary);
 #endif
                }

-               printk(BIOS_DEBUG, 
+               printk(BIOS_DEBUG,

                        "%s %02lx <- [0x%010Lx - 0x%010Lx] size 0x%08Lx gran 0x%02x %s%s%s\n",
                        dev_path(dev),
                        resource->index,
                        "%s %02lx <- [0x%010Lx - 0x%010Lx] size 0x%08Lx gran 0x%02x %s%s%s\n",
                        dev_path(dev),
                        resource->index,

diff --git a/src/devices/hypertransport.c b/src/devices/hypertransport.c
index bb912499082fe2dc00e6689f6a2a301087cc01ac..674971cb949a9499964647214a36b50f7c63773e 100644 (file)
--- a/src/devices/hypertransport.c
+++ b/src/devices/hypertransport.c
@@ -39,7 +39,7 @@
  * so don't do it again
  */
 #define OPT_HT_LINK 0
  * so don't do it again
  */
 #define OPT_HT_LINK 0

-        
+

 #if OPT_HT_LINK == 1
 #include <cpu/amd/model_fxx_rev.h>
 #endif
 #if OPT_HT_LINK == 1
 #include <cpu/amd/model_fxx_rev.h>
 #endif


@@ -52,9 +52,9 @@ static device_t ht_scan_get_devs(device_t *old_devices)
        /* Extract the chain of devices to (first through last)
         * for the next hypertransport device.
         */
        /* Extract the chain of devices to (first through last)
         * for the next hypertransport device.
         */

-       while(last && last->sibling && 
+       while(last && last->sibling &&

                (last->sibling->path.type == DEVICE_PATH_PCI) &&
                (last->sibling->path.type == DEVICE_PATH_PCI) &&

-               (last->sibling->path.pci.devfn > last->path.pci.devfn)) 
+               (last->sibling->path.pci.devfn > last->path.pci.devfn))

        {
                last = last->sibling;
        }
        {
                last = last->sibling;
        }


@@ -101,11 +101,11 @@ static unsigned ht_read_freq_cap(device_t dev, unsigned pos)
        }
        /* AMD K8 Unsupported 1Ghz? */
        if ((dev->vendor == PCI_VENDOR_ID_AMD) && (dev->device == 0x1100)) {
        }
        /* AMD K8 Unsupported 1Ghz? */
        if ((dev->vendor == PCI_VENDOR_ID_AMD) && (dev->device == 0x1100)) {

-#if CONFIG_K8_HT_FREQ_1G_SUPPORT == 1 
-       #if CONFIG_K8_REV_F_SUPPORT == 0 
+#if CONFIG_K8_HT_FREQ_1G_SUPPORT == 1
+       #if CONFIG_K8_REV_F_SUPPORT == 0

                if (is_cpu_pre_e0()) { // only e0 later suupport 1GHz HT
                        freq_cap &= ~(1 << HT_FREQ_1000Mhz);
                if (is_cpu_pre_e0()) { // only e0 later suupport 1GHz HT
                        freq_cap &= ~(1 << HT_FREQ_1000Mhz);

-               } 
+               }

        #endif
 #else
                freq_cap &= ~(1 << HT_FREQ_1000Mhz);
        #endif
 #else
                freq_cap &= ~(1 << HT_FREQ_1000Mhz);


@@ -129,7 +129,7 @@ static int ht_setup_link(struct ht_link *prev, device_t dev, unsigned pos)
        static const uint8_t pow2_to_link_width[] = { 0x7, 4, 5, 0, 1, 3 };
        unsigned present_width_cap,    upstream_width_cap;
        unsigned present_freq_cap,     upstream_freq_cap;
        static const uint8_t pow2_to_link_width[] = { 0x7, 4, 5, 0, 1, 3 };
        unsigned present_width_cap,    upstream_width_cap;
        unsigned present_freq_cap,     upstream_freq_cap;

-       unsigned ln_present_width_in,  ln_upstream_width_in; 
+       unsigned ln_present_width_in,  ln_upstream_width_in;

        unsigned ln_present_width_out, ln_upstream_width_out;
        unsigned freq, old_freq;
        unsigned present_width, upstream_width, old_width;
        unsigned ln_present_width_out, ln_upstream_width_out;
        unsigned freq, old_freq;
        unsigned present_width, upstream_width, old_width;


@@ -140,7 +140,7 @@ static int ht_setup_link(struct ht_link *prev, device_t dev, unsigned pos)
 
        /* Set the hypertransport link width and frequency */
        reset_needed = 0;
 
        /* Set the hypertransport link width and frequency */
        reset_needed = 0;

-       /* See which side of the device our previous write to 
+       /* See which side of the device our previous write to

         * set the unitid came from.
         */
        cur->dev = dev;
         * set the unitid came from.
         */
        cur->dev = dev;


@@ -164,7 +164,7 @@ static int ht_setup_link(struct ht_link *prev, device_t dev, unsigned pos)
        upstream_freq_cap  = ht_read_freq_cap(prev->dev, prev->pos + prev->freq_cap_off);
        present_width_cap  = pci_read_config8(cur->dev, cur->pos + cur->config_off);
        upstream_width_cap = pci_read_config8(prev->dev, prev->pos + prev->config_off);
        upstream_freq_cap  = ht_read_freq_cap(prev->dev, prev->pos + prev->freq_cap_off);
        present_width_cap  = pci_read_config8(cur->dev, cur->pos + cur->config_off);
        upstream_width_cap = pci_read_config8(prev->dev, prev->pos + prev->config_off);

-       
+

        /* Calculate the highest useable frequency */
        freq = log2(present_freq_cap & upstream_freq_cap);
 
        /* Calculate the highest useable frequency */
        freq = log2(present_freq_cap & upstream_freq_cap);
 


@@ -242,7 +242,7 @@ static int ht_setup_link(struct ht_link *prev, device_t dev, unsigned pos)
                }
        }
 #endif
                }
        }
 #endif

-       
+

        /* Remember the current link as the previous link,
         * But look at the other offsets.
         */
        /* Remember the current link as the previous link,
         * But look at the other offsets.
         */


@@ -261,7 +261,7 @@ static int ht_setup_link(struct ht_link *prev, device_t dev, unsigned pos)
        }
 
        return reset_needed;
        }
 
        return reset_needed;

-               
+

 }
 
 static unsigned ht_lookup_slave_capability(struct device *dev)
 }
 
 static unsigned ht_lookup_slave_capability(struct device *dev)


@@ -355,7 +355,7 @@ static void ht_collapse_early_enumeration(struct bus *bus, unsigned offset_uniti
                dummy.path.type        = DEVICE_PATH_PCI;
                dummy.path.pci.devfn = devfn;
                id = pci_read_config32(&dummy, PCI_VENDOR_ID);
                dummy.path.type        = DEVICE_PATH_PCI;
                dummy.path.pci.devfn = devfn;
                id = pci_read_config32(&dummy, PCI_VENDOR_ID);

-               if (    (id == 0xffffffff) || (id == 0x00000000) || 
+               if (    (id == 0xffffffff) || (id == 0x00000000) ||

                        (id == 0x0000ffff) || (id == 0xffff0000)) {
                        continue;
                }
                        (id == 0x0000ffff) || (id == 0xffff0000)) {
                        continue;
                }


@@ -371,12 +371,12 @@ static void ht_collapse_early_enumeration(struct bus *bus, unsigned offset_uniti
                flags = pci_read_config16(&dummy, pos + PCI_CAP_FLAGS);
                flags &= ~0x1f;
                pci_write_config16(&dummy, pos + PCI_CAP_FLAGS, flags);
                flags = pci_read_config16(&dummy, pos + PCI_CAP_FLAGS);
                flags &= ~0x1f;
                pci_write_config16(&dummy, pos + PCI_CAP_FLAGS, flags);

-               printk(BIOS_SPEW, "Collapsing %s [%04x/%04x]\n", 
+               printk(BIOS_SPEW, "Collapsing %s [%04x/%04x]\n",

                        dev_path(&dummy), dummy.vendor, dummy.device);
        }
 }
 
                        dev_path(&dummy), dummy.vendor, dummy.device);
        }
 }
 

-unsigned int hypertransport_scan_chain(struct bus *bus, 
+unsigned int hypertransport_scan_chain(struct bus *bus,

        unsigned min_devfn, unsigned max_devfn, unsigned int max, unsigned *ht_unitid_base, unsigned offset_unitid)
 {
        //even CONFIG_HT_CHAIN_UNITID_BASE == 0, we still can go through this function, because of end_of_chain check, also We need it to optimize link
        unsigned min_devfn, unsigned max_devfn, unsigned int max, unsigned *ht_unitid_base, unsigned offset_unitid)
 {
        //even CONFIG_HT_CHAIN_UNITID_BASE == 0, we still can go through this function, because of end_of_chain check, also We need it to optimize link


@@ -410,7 +410,7 @@ unsigned int hypertransport_scan_chain(struct bus *bus,
        prev.config_off   = PCI_HT_CAP_HOST_WIDTH;
        prev.freq_off     = PCI_HT_CAP_HOST_FREQ;
        prev.freq_cap_off = PCI_HT_CAP_HOST_FREQ_CAP;
        prev.config_off   = PCI_HT_CAP_HOST_WIDTH;
        prev.freq_off     = PCI_HT_CAP_HOST_FREQ;
        prev.freq_cap_off = PCI_HT_CAP_HOST_FREQ_CAP;

-       
+

        /* If present assign unitid to a hypertransport chain */
        last_unitid = min_unitid -1;
        max_unitid = next_unitid = min_unitid;
        /* If present assign unitid to a hypertransport chain */
        last_unitid = min_unitid -1;
        max_unitid = next_unitid = min_unitid;


@@ -446,7 +446,7 @@ unsigned int hypertransport_scan_chain(struct bus *bus,
                                }
                        }
                } while((ctrl & (1 << 5)) == 0);
                                }
                        }
                } while((ctrl & (1 << 5)) == 0);

-               
+

 
                /* Get and setup the device_structure */
                dev = ht_scan_get_devs(&old_devices);
 
                /* Get and setup the device_structure */
                dev = ht_scan_get_devs(&old_devices);


@@ -462,15 +462,15 @@ unsigned int hypertransport_scan_chain(struct bus *bus,
                /* Find the hypertransport link capability */
                pos = ht_lookup_slave_capability(dev);
                if (pos == 0) {
                /* Find the hypertransport link capability */
                pos = ht_lookup_slave_capability(dev);
                if (pos == 0) {

-                       printk(BIOS_ERR, "%s Hypertransport link capability not found", 
+                       printk(BIOS_ERR, "%s Hypertransport link capability not found",

                                dev_path(dev));
                        break;
                }
                                dev_path(dev));
                        break;
                }

-               
+

                /* Update the Unitid of the current device */
                flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS);
                /* Update the Unitid of the current device */
                flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS);

-        
-               /* If the devices has a unitid set and is at devfn 0 we are done. 
+
+               /* If the devices has a unitid set and is at devfn 0 we are done.

                 * This can happen with shadow hypertransport devices,
                 * or if we have reached the bottom of a
                 * hypertransport device chain.
                 * This can happen with shadow hypertransport devices,
                 * or if we have reached the bottom of a
                 * hypertransport device chain.


@@ -492,7 +492,7 @@ unsigned int hypertransport_scan_chain(struct bus *bus,
                                }
                        }
 
                                }
                        }
 

-               } 
+               }

 #endif
 
                 flags |= next_unitid & 0x1f;
 #endif
 
                 flags |= next_unitid & 0x1f;


@@ -502,12 +502,12 @@ unsigned int hypertransport_scan_chain(struct bus *bus,
                static_count = 1;
                for(func = dev; func; func = func->sibling) {
                        func->path.pci.devfn += (next_unitid << 3);
                static_count = 1;
                for(func = dev; func; func = func->sibling) {
                        func->path.pci.devfn += (next_unitid << 3);

-                       static_count = (func->path.pci.devfn >> 3) 
+                       static_count = (func->path.pci.devfn >> 3)

                                - (dev->path.pci.devfn >> 3) + 1;
                        last_func = func;
                }
                /* Compute the number of unitids consumed */
                                - (dev->path.pci.devfn >> 3) + 1;
                        last_func = func;
                }
                /* Compute the number of unitids consumed */

-               printk(BIOS_SPEW, "%s count: %04x static_count: %04x\n", 
+               printk(BIOS_SPEW, "%s count: %04x static_count: %04x\n",

                        dev_path(dev), count, static_count);
                if (count < static_count) {
                        count = static_count;
                        dev_path(dev), count, static_count);
                if (count < static_count) {
                        count = static_count;


@@ -534,7 +534,7 @@ unsigned int hypertransport_scan_chain(struct bus *bus,
 
                printk(BIOS_DEBUG, "%s [%04x/%04x] %s next_unitid: %04x\n",
                        dev_path(dev),
 
                printk(BIOS_DEBUG, "%s [%04x/%04x] %s next_unitid: %04x\n",
                        dev_path(dev),

-                       dev->vendor, dev->device, 
+                       dev->vendor, dev->device,

                        (dev->enabled? "enabled": "disabled"), next_unitid);
 
        } while (last_unitid != next_unitid);
                        (dev->enabled? "enabled": "disabled"), next_unitid);
 
        } while (last_unitid != next_unitid);


@@ -562,7 +562,7 @@ unsigned int hypertransport_scan_chain(struct bus *bus,
                 }
 
                ht_unitid_base[ht_dev_num-1] = CONFIG_HT_CHAIN_END_UNITID_BASE; // update last one
                 }
 
                ht_unitid_base[ht_dev_num-1] = CONFIG_HT_CHAIN_END_UNITID_BASE; // update last one

-               
+

                printk(BIOS_DEBUG, " unitid: %04x --> %04x\n",
                                real_last_unitid, CONFIG_HT_CHAIN_END_UNITID_BASE);
 
                printk(BIOS_DEBUG, " unitid: %04x --> %04x\n",
                                real_last_unitid, CONFIG_HT_CHAIN_END_UNITID_BASE);
 


@@ -573,11 +573,11 @@ unsigned int hypertransport_scan_chain(struct bus *bus,
        if (next_unitid > 0x20) {
                next_unitid = 0x20;
        }
        if (next_unitid > 0x20) {
                next_unitid = 0x20;
        }

-       if( (bus->secondary == 0) && (next_unitid > 0x18)) { 
+       if( (bus->secondary == 0) && (next_unitid > 0x18)) {

                next_unitid = 0x18; /* avoid K8 on bus 0 */
        }
 
                next_unitid = 0x18; /* avoid K8 on bus 0 */
        }
 

-       /* Die if any leftover Static devices are are found.  
+       /* Die if any leftover Static devices are are found.

         * There's probably a problem in the Config.lb.
         */
        if(old_devices) {
         * There's probably a problem in the Config.lb.
         */
        if(old_devices) {


@@ -587,14 +587,14 @@ unsigned int hypertransport_scan_chain(struct bus *bus,
                }
                printk(BIOS_ERR, "HT: Left over static devices.  Check your Config.lb\n");
                if(last_func  && !last_func->sibling) // put back the left over static device, and let pci_scan_bus disable it
                }
                printk(BIOS_ERR, "HT: Left over static devices.  Check your Config.lb\n");
                if(last_func  && !last_func->sibling) // put back the left over static device, and let pci_scan_bus disable it

-                       last_func->sibling = old_devices; 
+                       last_func->sibling = old_devices;

        }
 
        /* Now that nothing is overlapping it is safe to scan the
        }
 
        /* Now that nothing is overlapping it is safe to scan the

-        * children. 
+        * children.

         */
         */

-       max = pci_scan_bus(bus, 0x00, ((next_unitid-1) << 3)|7, max); 
-       return max; 
+       max = pci_scan_bus(bus, 0x00, ((next_unitid-1) << 3)|7, max);
+       return max;

 }
 
 /**
 }
 
 /**

diff --git a/src/devices/oprom/include/x86emu/regs.h b/src/devices/oprom/include/x86emu/regs.h
index 516b2ea836c0a037d38741d9f62ad82f9d5e7e41..d738974d4bf99378827e758436a81b8048e66dbe 100644 (file)
--- a/src/devices/oprom/include/x86emu/regs.h
+++ b/src/devices/oprom/include/x86emu/regs.h
@@ -106,7 +106,7 @@ struct i386_special_regs {
        u32 FLAGS;
        };
 
        u32 FLAGS;
        };
 

-/*  
+/*

  * Segment registers here represent the 16 bit quantities
  * CS, DS, ES, SS.
  */
  * Segment registers here represent the 16 bit quantities
  * CS, DS, ES, SS.
  */


@@ -184,8 +184,8 @@ struct i386_segment_regs {
 #define F_ALWAYS_ON  (0x0002)   /* flag bits always on */
 
 /*
 #define F_ALWAYS_ON  (0x0002)   /* flag bits always on */
 
 /*

- * Define a mask for only those flag bits we will ever pass back 
- * (via PUSHF) 
+ * Define a mask for only those flag bits we will ever pass back
+ * (via PUSHF)

  */
 #define F_MSK (FB_CF|FB_PF|FB_AF|FB_ZF|FB_SF|FB_TF|FB_IF|FB_DF|FB_OF)
 
  */
 #define F_MSK (FB_CF|FB_PF|FB_AF|FB_ZF|FB_SF|FB_TF|FB_IF|FB_DF|FB_OF)
 


@@ -271,8 +271,8 @@ typedef struct {
      *  Delayed flag set        3 bits  (zero, signed, parity)
      *  reserved                6 bits
      *  interrupt #             8 bits  instruction raised interrupt
      *  Delayed flag set        3 bits  (zero, signed, parity)
      *  reserved                6 bits
      *  interrupt #             8 bits  instruction raised interrupt

-     *  BIOS video segregs      4 bits  
-     *  Interrupt Pending       1 bits  
+     *  BIOS video segregs      4 bits
+     *  Interrupt Pending       1 bits

      *  Extern interrupt        1 bits
      *  Halted                  1 bits
      */
      *  Extern interrupt        1 bits
      *  Halted                  1 bits
      */

diff --git a/src/devices/oprom/include/x86emu/x86emu.h b/src/devices/oprom/include/x86emu/x86emu.h
index 493e494927b0cd140658c91e0c6ff71a509ef9f1..3ceee4985bcbc50981cec1e9c3e7e632a52cc1e1 100644 (file)
--- a/src/devices/oprom/include/x86emu/x86emu.h
+++ b/src/devices/oprom/include/x86emu/x86emu.h
@@ -128,7 +128,7 @@ extern u32 X86API rdl(u32 addr);
 extern void X86API wrb(u32 addr, u8 val);
 extern void X86API wrw(u32 addr, u16 val);
 extern void X86API wrl(u32 addr, u32 val);
 extern void X86API wrb(u32 addr, u8 val);
 extern void X86API wrw(u32 addr, u16 val);
 extern void X86API wrl(u32 addr, u32 val);

- 
+

 #pragma        pack()
 
 /*--------------------- type definitions -----------------------------------*/
 #pragma        pack()
 
 /*--------------------- type definitions -----------------------------------*/


@@ -175,10 +175,10 @@ void      X86EMU_halt_sys(void);
 #define DEBUG_SYSINT_F          0x000200 /* bios system interrupts. */
 #define DEBUG_TRACECALL_F       0x000400
 #define DEBUG_INSTRUMENT_F      0x000800
 #define DEBUG_SYSINT_F          0x000200 /* bios system interrupts. */
 #define DEBUG_TRACECALL_F       0x000400
 #define DEBUG_INSTRUMENT_F      0x000800

-#define DEBUG_MEM_TRACE_F       0x001000 
-#define DEBUG_IO_TRACE_F        0x002000 
+#define DEBUG_MEM_TRACE_F       0x001000
+#define DEBUG_IO_TRACE_F        0x002000

 #define DEBUG_TRACECALL_REGS_F  0x004000
 #define DEBUG_TRACECALL_REGS_F  0x004000

-#define DEBUG_DECODE_NOPRINT_F  0x008000 
+#define DEBUG_DECODE_NOPRINT_F  0x008000

 #define DEBUG_SAVE_IP_CS_F      0x010000
 #define DEBUG_TRACEJMP_F        0x020000
 #define DEBUG_TRACEJMP_REGS_F   0x040000
 #define DEBUG_SAVE_IP_CS_F      0x010000
 #define DEBUG_TRACEJMP_F        0x020000
 #define DEBUG_TRACEJMP_REGS_F   0x040000

diff --git a/src/devices/oprom/x86.c b/src/devices/oprom/x86.c
index 9e72a4a6a61c4cc52c29454eb01a193f5a112d82..4d9604a581982ebf786ee516f4703093169bdd8c 100644 (file)
--- a/src/devices/oprom/x86.c
+++ b/src/devices/oprom/x86.c
@@ -45,16 +45,16 @@ int (*intXX_handler[256])(struct eregs *regs) = { NULL };
 
 static int intXX_exception_handler(struct eregs *regs)
 {
 
 static int intXX_exception_handler(struct eregs *regs)
 {

-       printk(BIOS_INFO, "Oops, exception %d while executing option rom\n", 
+       printk(BIOS_INFO, "Oops, exception %d while executing option rom\n",

                        regs->vector);
                        regs->vector);

-       x86_exception(regs);    // Call coreboot exception handler 
+       x86_exception(regs);    // Call coreboot exception handler

 
        return 0;               // Never returns?
 }
 
 static int intXX_unknown_handler(struct eregs *regs)
 {
 
        return 0;               // Never returns?
 }
 
 static int intXX_unknown_handler(struct eregs *regs)
 {

-       printk(BIOS_INFO, "Unsupported software interrupt #0x%x\n", 
+       printk(BIOS_INFO, "Unsupported software interrupt #0x%x\n",

                        regs->vector);
 
        return -1;
                        regs->vector);
 
        return -1;


@@ -74,12 +74,12 @@ static void setup_interrupt_handlers(void)
 {
        int i;
 
 {
        int i;
 

-       /* The first 16 intXX functions are not BIOS services, 
+       /* The first 16 intXX functions are not BIOS services,

         * but the CPU-generated exceptions ("hardware interrupts")
         */
        for (i = 0; i < 0x10; i++)
                intXX_handler[i] = &intXX_exception_handler;
         * but the CPU-generated exceptions ("hardware interrupts")
         */
        for (i = 0; i < 0x10; i++)
                intXX_handler[i] = &intXX_exception_handler;

-       
+

        /* Mark all other intXX calls as unknown first */
        for (i = 0x10; i < 0x100; i++)
        {
        /* Mark all other intXX calls as unknown first */
        for (i = 0x10; i < 0x100; i++)
        {


@@ -133,14 +133,14 @@ static void setup_realmode_idt(void)
        }
 
        /* Many option ROMs use the hard coded interrupt entry points in the
        }
 
        /* Many option ROMs use the hard coded interrupt entry points in the

-        * system bios. So install them at the known locations. 
+        * system bios. So install them at the known locations.

         */
         */

-       
+

        /* int42 is the relocated int10 */
        write_idt_stub((void *)0xff065, 0x42);
 
        /* VIA's VBIOS calls f000:f859 instead of int15 */
        /* int42 is the relocated int10 */
        write_idt_stub((void *)0xff065, 0x42);
 
        /* VIA's VBIOS calls f000:f859 instead of int15 */

-       write_idt_stub((void *)0xff859, 0x15); 
+       write_idt_stub((void *)0xff859, 0x15);

 }
 
 void run_bios(struct device *dev, unsigned long addr)
 }
 
 void run_bios(struct device *dev, unsigned long addr)


@@ -187,7 +187,7 @@ static u32 VSA_vrRead(u16 classIndex)
                "outl   %%eax, %%dx\n"
                "addb   $2, %%dl\n"
                "inw    %%dx, %%ax\n"
                "outl   %%eax, %%dx\n"
                "addb   $2, %%dl\n"
                "inw    %%dx, %%ax\n"

-               : "=a" (eax), "=b"(ebx), "=c"(ecx), "=d"(edx) 
+               : "=a" (eax), "=b"(ebx), "=c"(ecx), "=d"(edx)

                : "a"(classIndex)
        );
 
                : "a"(classIndex)
        );
 


@@ -245,7 +245,7 @@ void do_vsmbios(void)
 }
 #endif
 
 }
 #endif
 

-/* interrupt_handler() is called from assembler code only, 
+/* interrupt_handler() is called from assembler code only,

  * so there is no use in putting the prototype into a header file.
  */
 int __attribute__((regparm(0))) interrupt_handler(u32 intnumber,
  * so there is no use in putting the prototype into a header file.
  */
 int __attribute__((regparm(0))) interrupt_handler(u32 intnumber,


@@ -308,7 +308,7 @@ int __attribute__((regparm(0))) interrupt_handler(u32 intnumber,
        // will later pop them.
        // What happens here is that we force (volatile!) changing
        // the values of the parameters of this function. We do this
        // will later pop them.
        // What happens here is that we force (volatile!) changing
        // the values of the parameters of this function. We do this

-       // because we know that they stay alive on the stack after 
+       // because we know that they stay alive on the stack after

        // we leave this function. Don't say this is bollocks.
        *(volatile u32 *)&eax = reg_info.eax;
        *(volatile u32 *)&ecx = reg_info.ecx;
        // we leave this function. Don't say this is bollocks.
        *(volatile u32 *)&eax = reg_info.eax;
        *(volatile u32 *)&ecx = reg_info.ecx;

diff --git a/src/devices/oprom/x86_asm.S b/src/devices/oprom/x86_asm.S
index 724fe02c0d15a3ccf41e6ee5726db8151e583777..469c42f90bdeb280bb6712afb596ac7f1e90e1ae 100644 (file)
--- a/src/devices/oprom/x86_asm.S
+++ b/src/devices/oprom/x86_asm.S
@@ -25,7 +25,7 @@
 
 /* This is the intXX interrupt handler stub code. It gets copied
  * to the IDT and to some fixed addresses in the F segment. Before
 
 /* This is the intXX interrupt handler stub code. It gets copied
  * to the IDT and to some fixed addresses in the F segment. Before

- * the code can used, it gets patched up by the C function copying 
+ * the code can used, it gets patched up by the C function copying

  * it: byte 3 (the $0 in movb $0, %al) is overwritten with the int#.
  */
 
  * it: byte 3 (the $0 in movb $0, %al) is overwritten with the int#.
  */
 


@@ -85,11 +85,11 @@ __run_optionrom = RELOCATED(.)
         * protected mode is turned off.
         */
        mov     $0x30, %ax
         * protected mode is turned off.
         */
        mov     $0x30, %ax

-       mov     %ax, %ds       
-       mov     %ax, %es       
-       mov     %ax, %fs       
-       mov     %ax, %gs       
-       mov     %ax, %ss       
+       mov     %ax, %ds
+       mov     %ax, %es
+       mov     %ax, %fs
+       mov     %ax, %gs
+       mov     %ax, %ss

 
        /* Turn off protection */
        movl    %cr0, %eax
 
        /* Turn off protection */
        movl    %cr0, %eax


@@ -114,9 +114,9 @@ __run_optionrom = RELOCATED(.)
        lidt    __realmode_idt
 
        /* Set all segments to 0x0000, ds to 0x0040 */
        lidt    __realmode_idt
 
        /* Set all segments to 0x0000, ds to 0x0040 */

-       mov     %ax, %es       
-       mov     %ax, %fs       
-       mov     %ax, %gs       
+       mov     %ax, %es
+       mov     %ax, %fs
+       mov     %ax, %gs

        mov     $0x40, %ax
        mov     %ax, %ds
 
        mov     $0x40, %ax
        mov     %ax, %ds
 


@@ -140,8 +140,8 @@ __run_optionrom = RELOCATED(.)
        data32  ljmp    $0x10, $RELOCATED(1f)
 1:
        .code32
        data32  ljmp    $0x10, $RELOCATED(1f)
 1:
        .code32

-       movw    $0x18, %ax     
-       mov     %ax, %ds       
+       movw    $0x18, %ax
+       mov     %ax, %ds

        mov     %ax, %es
        mov     %ax, %fs
        mov     %ax, %gs
        mov     %ax, %es
        mov     %ax, %fs
        mov     %ax, %gs


@@ -185,11 +185,11 @@ __run_vsa = RELOCATED(.)
         * protected mode is turned off.
         */
        mov     $0x30, %ax
         * protected mode is turned off.
         */
        mov     $0x30, %ax

-       mov     %ax, %ds       
-       mov     %ax, %es       
-       mov     %ax, %fs       
-       mov     %ax, %gs       
-       mov     %ax, %ss       
+       mov     %ax, %ds
+       mov     %ax, %es
+       mov     %ax, %fs
+       mov     %ax, %gs
+       mov     %ax, %ss

 
        /* Turn off protection */
        movl    %cr0, %eax
 
        /* Turn off protection */
        movl    %cr0, %eax


@@ -214,9 +214,9 @@ __run_vsa = RELOCATED(.)
        lidt    __realmode_idt
 
        /* Set all segments to 0x0000, ds to 0x0040 */
        lidt    __realmode_idt
 
        /* Set all segments to 0x0000, ds to 0x0040 */

-       mov     %ax, %es       
-       mov     %ax, %fs       
-       mov     %ax, %gs       
+       mov     %ax, %es
+       mov     %ax, %fs
+       mov     %ax, %gs

        mov     $0x40, %ax
        mov     %ax, %ds
        mov     %cx, %ax        // restore ax
        mov     $0x40, %ax
        mov     %ax, %ds
        mov     %cx, %ax        // restore ax


@@ -238,8 +238,8 @@ __run_vsa = RELOCATED(.)
        data32  ljmp    $0x10, $RELOCATED(1f)
 1:
        .code32
        data32  ljmp    $0x10, $RELOCATED(1f)
 1:
        .code32

-       movw    $0x18, %ax     
-       mov     %ax, %ds       
+       movw    $0x18, %ax
+       mov     %ax, %ds

        mov     %ax, %es
        mov     %ax, %fs
        mov     %ax, %gs
        mov     %ax, %es
        mov     %ax, %fs
        mov     %ax, %gs


@@ -275,17 +275,17 @@ __run_interrupt = RELOCATED(.)
         * descriptors.  They will retain these configurations (limits,
         * writability, etc.) once protected mode is turned off.
         */
         * descriptors.  They will retain these configurations (limits,
         * writability, etc.) once protected mode is turned off.
         */

-       mov     $0x30, %ax     
-       mov     %ax, %ds       
-       mov     %ax, %es       
-       mov     %ax, %fs       
-       mov     %ax, %gs       
-       mov     %ax, %ss       
+       mov     $0x30, %ax
+       mov     %ax, %ds
+       mov     %ax, %es
+       mov     %ax, %fs
+       mov     %ax, %gs
+       mov     %ax, %ss

 
        /* Turn off protected mode */
 
        /* Turn off protected mode */

-       movl    %cr0, %eax     
+       movl    %cr0, %eax

        andl    $~PE, %eax
        andl    $~PE, %eax

-       movl    %eax, %cr0     
+       movl    %eax, %cr0

 
        /* Now really going into real mode */
        data32 ljmp     $0, $RELOCATED(1f)
 
        /* Now really going into real mode */
        data32 ljmp     $0, $RELOCATED(1f)


@@ -302,7 +302,7 @@ __run_interrupt = RELOCATED(.)
        movl    %eax, %esp
 
        /* Load 16-bit intXX IDT */
        movl    %eax, %esp
 
        /* Load 16-bit intXX IDT */

-       xor     %ax, %ax       
+       xor     %ax, %ax

        mov     %ax, %ds
        lidt    __realmode_idt
 
        mov     %ax, %ds
        lidt    __realmode_idt
 

diff --git a/src/devices/oprom/x86_interrupts.c b/src/devices/oprom/x86_interrupts.c
index 90156334dc0c7965bff905735a2ff328297f958c..49d69ee3a7541bf221fead19b1fe53798c969edd 100644 (file)
--- a/src/devices/oprom/x86_interrupts.c
+++ b/src/devices/oprom/x86_interrupts.c
@@ -202,7 +202,7 @@ int int15_handler(struct eregs *regs)
                res = 0;
                break;
        default:
                res = 0;
                break;
        default:

-               printk(BIOS_DEBUG, "Unknown INT15 function %04x!\n", 
+               printk(BIOS_DEBUG, "Unknown INT15 function %04x!\n",

                                regs->eax & 0xffff);
        }
 
                                regs->eax & 0xffff);
        }
 

diff --git a/src/devices/oprom/x86emu/decode.c b/src/devices/oprom/x86emu/decode.c
index 3d2ba2356652aae02c5e00795a6a65720fce5862..ed96dc66e6f38dc51619c828c09962776ddc53a7 100644 (file)
--- a/src/devices/oprom/x86emu/decode.c
+++ b/src/devices/oprom/x86emu/decode.c
@@ -732,7 +732,7 @@ RETURNS:
 Value of scale * index
 
 REMARKS:
 Value of scale * index
 
 REMARKS:

-Decodes scale/index of SIB byte and returns relevant offset part of 
+Decodes scale/index of SIB byte and returns relevant offset part of

 effective address.
 ****************************************************************************/
 static unsigned decode_sib_si(
 effective address.
 ****************************************************************************/
 static unsigned decode_sib_si(

diff --git a/src/devices/oprom/x86emu/ops2.c b/src/devices/oprom/x86emu/ops2.c
index f5cb6498b1fb95042545efdc1eaf46a668b7d0c5..349a664f5010afc245c290a47374a2cb646d2b09 100644 (file)
--- a/src/devices/oprom/x86emu/ops2.c
+++ b/src/devices/oprom/x86emu/ops2.c
@@ -170,7 +170,7 @@ static void x86emuOp2_rdmsr(u8 op2)
   M.x86.R_EAX = 0;
   DECODE_CLEAR_SEGOVR();
   END_OF_INSTR();
   M.x86.R_EAX = 0;
   DECODE_CLEAR_SEGOVR();
   END_OF_INSTR();

-}  
+}

 
 #define xorl(a,b)   (((a) && !(b)) || (!(a) && (b)))
 
 
 #define xorl(a,b)   (((a) && !(b)) || (!(a) && (b)))
 

diff --git a/src/devices/oprom/x86emu/sys.c b/src/devices/oprom/x86emu/sys.c
index 957e0ca63b3e9c2495b681e4e9446de04a0beb8c..7a9e3921ec2394c89bf2b13727fe0a830ee030a4 100644 (file)
--- a/src/devices/oprom/x86emu/sys.c
+++ b/src/devices/oprom/x86emu/sys.c
@@ -85,7 +85,7 @@ RETURNS:
 Byte value read from emulator memory.
 
 REMARKS:
 Byte value read from emulator memory.
 
 REMARKS:

-Reads a byte value from the emulator memory. 
+Reads a byte value from the emulator memory.

 ****************************************************************************/
 u8 X86API rdb(u32 addr)
 {
 ****************************************************************************/
 u8 X86API rdb(u32 addr)
 {


@@ -130,7 +130,7 @@ addr        - Emulator memory address to read
 RETURNS:
 Long value read from emulator memory.
 REMARKS:
 RETURNS:
 Long value read from emulator memory.
 REMARKS:

-Reads a long value from the emulator memory. 
+Reads a long value from the emulator memory.

 ****************************************************************************/
 u32 X86API rdl(u32 addr)
 {
 ****************************************************************************/
 u32 X86API rdl(u32 addr)
 {


@@ -189,7 +189,7 @@ addr        - Emulator memory address to read
 val            - Value to store
 
 REMARKS:
 val            - Value to store
 
 REMARKS:

-Writes a long value to emulator memory. 
+Writes a long value to emulator memory.

 ****************************************************************************/
 void X86API wrl(u32 addr, u32 val)
 {
 ****************************************************************************/
 void X86API wrl(u32 addr, u32 val)
 {

diff --git a/src/devices/oprom/x86emu/x86emui.h b/src/devices/oprom/x86emu/x86emui.h
index d693e335f4d8b963fda9f756823ef95d282d13a7..8ad43bfa30e0723f7e44e14375bd46ada83d90b5 100644 (file)
--- a/src/devices/oprom/x86emu/x86emui.h
+++ b/src/devices/oprom/x86emu/x86emui.h
@@ -75,7 +75,7 @@
 #include <xf86_ansic.h>
 #else
 #include <string.h>
 #include <xf86_ansic.h>
 #else
 #include <string.h>

-#endif                                                                                           
+#endif

 /*--------------------------- Inline Functions ----------------------------*/
 
 #ifdef  __cplusplus
 /*--------------------------- Inline Functions ----------------------------*/
 
 #ifdef  __cplusplus

diff --git a/src/devices/oprom/yabel/biosemu.c b/src/devices/oprom/yabel/biosemu.c
index 294d81f27950bedb926d1b0adc1ef8ea77a103e9..9cdd0f279bc7343ec5bce07ebfd8c931f8f7a080 100644 (file)
--- a/src/devices/oprom/yabel/biosemu.c
+++ b/src/devices/oprom/yabel/biosemu.c
@@ -250,7 +250,7 @@ biosemu(u8 *biosmem, u32 biosmem_size, struct device * dev, unsigned long rom_ad
        X86EMU_setupMemFuncs(&my_mem_funcs);
 
        //setup PMM struct in BIOS_DATA_SEGMENT, offset 0x0
        X86EMU_setupMemFuncs(&my_mem_funcs);
 
        //setup PMM struct in BIOS_DATA_SEGMENT, offset 0x0

-       u8 pmm_length = pmm_setup(BIOS_DATA_SEGMENT, 0x0);      
+       u8 pmm_length = pmm_setup(BIOS_DATA_SEGMENT, 0x0);

        if (pmm_length <= 0) {
                printf ("\nYABEL: Warning: PMM Area could not be setup. PMM not available (%x)\n",
                     pmm_length);
        if (pmm_length <= 0) {
                printf ("\nYABEL: Warning: PMM Area could not be setup. PMM not available (%x)\n",
                     pmm_length);

diff --git a/src/devices/oprom/yabel/biosemu.h b/src/devices/oprom/yabel/biosemu.h
index 09ace729ec80215587505eaff6275e9a4ce770df..39cc0a9b0e47b18ba12d01af9e129491d94a6933 100644 (file)
--- a/src/devices/oprom/yabel/biosemu.h
+++ b/src/devices/oprom/yabel/biosemu.h
@@ -38,7 +38,7 @@
                                // Address, there will only be a call to this INT and a RETF
 #define PNP_INT_NUM 0xFD
 
                                // Address, there will only be a call to this INT and a RETF
 #define PNP_INT_NUM 0xFD
 

-/* array of funtion pointers to override generic interrupt handlers 
+/* array of funtion pointers to override generic interrupt handlers

  * a YABEL caller can add functions to this array before calling YABEL
  * if a interrupt occurs, YABEL checks wether a function is set in
  * this array and only runs the generic interrupt handler code, if
  * a YABEL caller can add functions to this array before calling YABEL
  * if a interrupt occurs, YABEL checks wether a function is set in
  * this array and only runs the generic interrupt handler code, if

diff --git a/src/devices/oprom/yabel/compat/functions.c b/src/devices/oprom/yabel/compat/functions.c
index 035c8bc86e3d9edf63b74fb99b97a9863b57f65a..c9ef0b7d7779c59d441c0248f67d8dc836b36bb8 100644 (file)
--- a/src/devices/oprom/yabel/compat/functions.c
+++ b/src/devices/oprom/yabel/compat/functions.c
@@ -61,6 +61,6 @@ u64 get_time(void)
        "rdtsc"
         : "=a"(eax), "=d"(edx)
         : /* no inputs, no clobber */);
        "rdtsc"
         : "=a"(eax), "=d"(edx)
         : /* no inputs, no clobber */);

-    act = ((u64) edx << 32) | eax; 
+    act = ((u64) edx << 32) | eax;

     return act;
 }
     return act;
 }

diff --git a/src/devices/oprom/yabel/compat/of.h b/src/devices/oprom/yabel/compat/of.h
index 907139951fd403ec9735faed45252a682cb47011..6a00f7a31639ed59802d2b03eff39e0d142bd836 100644 (file)
--- a/src/devices/oprom/yabel/compat/of.h
+++ b/src/devices/oprom/yabel/compat/of.h
@@ -19,7 +19,7 @@
 #define phandle_t p32
 #define ihandle_t p32
 
 #define phandle_t p32
 #define ihandle_t p32
 

-typedef struct 
+typedef struct

 {
     unsigned int serv;
     int nargs;
 {
     unsigned int serv;
     int nargs;

diff --git a/src/devices/oprom/yabel/compat/time.h b/src/devices/oprom/yabel/compat/time.h
index 6f7099bd867231f814794e3f88d81934fa26e6c9..18dba3aa85491fb944db349772d4a8b92f8c5e9b 100644 (file)
--- a/src/devices/oprom/yabel/compat/time.h
+++ b/src/devices/oprom/yabel/compat/time.h
@@ -15,4 +15,4 @@
 /* TODO: check how this works in x86 */
 extern unsigned long tb_freq;
 u64 get_time(void);
 /* TODO: check how this works in x86 */
 extern unsigned long tb_freq;
 u64 get_time(void);

-#endif 
+#endif

diff --git a/src/devices/oprom/yabel/debug.h b/src/devices/oprom/yabel/debug.h
index d02930809dea1eb5579dbd8d966c74ed3a9a8e4b..fea1fb7a3bfa8356cdbe2331d3e73e0065c48807 100644 (file)
--- a/src/devices/oprom/yabel/debug.h
+++ b/src/devices/oprom/yabel/debug.h
@@ -39,7 +39,7 @@ static inline void set_ci(void) {};
  * |||-Currently unused
  * ||||-Currently unused
  * |||||-Currently unused
  * |||-Currently unused
  * ||||-Currently unused
  * |||||-Currently unused

- * ||||||-DEBUG_PNP - Print Plug And Play access made by option rom 
+ * ||||||-DEBUG_PNP - Print Plug And Play access made by option rom

  * |||||||-DEBUG_DISK - Print Disk I/O related messages, currently unused
  * ||||||||-DEBUG_PMM - Print messages related to POST Memory Manager (PMM)
  * |||||||||-DEBUG_VBE - Print messages related to VESA BIOS Extension (VBE) functions
  * |||||||-DEBUG_DISK - Print Disk I/O related messages, currently unused
  * ||||||||-DEBUG_PMM - Print messages related to POST Memory Manager (PMM)
  * |||||||||-DEBUG_VBE - Print messages related to VESA BIOS Extension (VBE) functions


@@ -47,7 +47,7 @@ static inline void set_ci(void) {};
  * |||||||||||-DEBUG_INTR - Print messages related to interrupt handling
  * ||||||||||||-DEBUG_CHECK_VMEM_ACCESS - Print messages related to accesse to certain areas of the virtual Memory (e.g. BDA (BIOS Data Area) or Interrupt Vectors)
  * |||||||||||||-DEBUG_MEM - Print memory access made by option rom (NOTE: this also includes accesses to fetch instructions)
  * |||||||||||-DEBUG_INTR - Print messages related to interrupt handling
  * ||||||||||||-DEBUG_CHECK_VMEM_ACCESS - Print messages related to accesse to certain areas of the virtual Memory (e.g. BDA (BIOS Data Area) or Interrupt Vectors)
  * |||||||||||||-DEBUG_MEM - Print memory access made by option rom (NOTE: this also includes accesses to fetch instructions)

- * ||||||||||||||-DEBUG_IO - Print I/O access made by option rom 
+ * ||||||||||||||-DEBUG_IO - Print I/O access made by option rom

  * 11000111111111 - Max Binary Value, Debug All (WARNING: - This could run for hours)
  */
 
  * 11000111111111 - Max Binary Value, Debug All (WARNING: - This could run for hours)
  */
 

diff --git a/src/devices/oprom/yabel/interrupt.c b/src/devices/oprom/yabel/interrupt.c
index 9a796005bb97650d365d66bfd91994852c78a6f6..af79379f6747bf1cd67458d2a6456f29702b9121 100644 (file)
--- a/src/devices/oprom/yabel/interrupt.c
+++ b/src/devices/oprom/yabel/interrupt.c
@@ -410,7 +410,7 @@ handleInt1a(void)
                                M.x86.R_CL =
 #ifdef CONFIG_PCI_OPTION_ROM_RUN_YABEL
                                        pci_read_config8(dev, offs);
                                M.x86.R_CL =
 #ifdef CONFIG_PCI_OPTION_ROM_RUN_YABEL
                                        pci_read_config8(dev, offs);

-#else                                  
+#else

                                    (u8) rtas_pci_config_read(bios_device.
                                                                   puid, 1,
                                                                   bus, devfn,
                                    (u8) rtas_pci_config_read(bios_device.
                                                                   puid, 1,
                                                                   bus, devfn,


@@ -425,7 +425,7 @@ handleInt1a(void)
                                M.x86.R_CX =
 #ifdef CONFIG_PCI_OPTION_ROM_RUN_YABEL
                                        pci_read_config16(dev, offs);
                                M.x86.R_CX =
 #ifdef CONFIG_PCI_OPTION_ROM_RUN_YABEL
                                        pci_read_config16(dev, offs);

-#else                                  
+#else

                                    (u16) rtas_pci_config_read(bios_device.
                                                                    puid, 2,
                                                                    bus, devfn,
                                    (u16) rtas_pci_config_read(bios_device.
                                                                    puid, 2,
                                                                    bus, devfn,


@@ -440,7 +440,7 @@ handleInt1a(void)
                                M.x86.R_ECX =
 #ifdef CONFIG_PCI_OPTION_ROM_RUN_YABEL
                                        pci_read_config32(dev, offs);
                                M.x86.R_ECX =
 #ifdef CONFIG_PCI_OPTION_ROM_RUN_YABEL
                                        pci_read_config32(dev, offs);

-#else                                  
+#else

                                    (u32) rtas_pci_config_read(bios_device.
                                                                    puid, 4,
                                                                    bus, devfn,
                                    (u32) rtas_pci_config_read(bios_device.
                                                                    puid, 4,
                                                                    bus, devfn,


@@ -478,7 +478,7 @@ handleInt1a(void)
                        case 0xb10b:
 #ifdef CONFIG_PCI_OPTION_ROM_RUN_YABEL
                                        pci_write_config8(bios_device.dev, offs, M.x86.R_CL);
                        case 0xb10b:
 #ifdef CONFIG_PCI_OPTION_ROM_RUN_YABEL
                                        pci_write_config8(bios_device.dev, offs, M.x86.R_CL);

-#else                                  
+#else

                                rtas_pci_config_write(bios_device.puid, 1, bus,
                                                      devfn, offs, M.x86.R_CL);
 #endif
                                rtas_pci_config_write(bios_device.puid, 1, bus,
                                                      devfn, offs, M.x86.R_CL);
 #endif


@@ -490,7 +490,7 @@ handleInt1a(void)
                        case 0xb10c:
 #ifdef CONFIG_PCI_OPTION_ROM_RUN_YABEL
                                        pci_write_config16(bios_device.dev, offs, M.x86.R_CX);
                        case 0xb10c:
 #ifdef CONFIG_PCI_OPTION_ROM_RUN_YABEL
                                        pci_write_config16(bios_device.dev, offs, M.x86.R_CX);

-#else                                  
+#else

                                rtas_pci_config_write(bios_device.puid, 2, bus,
                                                      devfn, offs, M.x86.R_CX);
 #endif
                                rtas_pci_config_write(bios_device.puid, 2, bus,
                                                      devfn, offs, M.x86.R_CX);
 #endif


@@ -502,7 +502,7 @@ handleInt1a(void)
                        case 0xb10d:
 #ifdef CONFIG_PCI_OPTION_ROM_RUN_YABEL
                                        pci_write_config32(bios_device.dev, offs, M.x86.R_ECX);
                        case 0xb10d:
 #ifdef CONFIG_PCI_OPTION_ROM_RUN_YABEL
                                        pci_write_config32(bios_device.dev, offs, M.x86.R_ECX);

-#else                                  
+#else

                                rtas_pci_config_write(bios_device.puid, 4, bus,
                                                      devfn, offs, M.x86.R_ECX);
 #endif
                                rtas_pci_config_write(bios_device.puid, 4, bus,
                                                      devfn, offs, M.x86.R_ECX);
 #endif


@@ -576,7 +576,7 @@ handleInterrupt(int intNum)
                        int_handled = 1;
                        break;
                case PMM_INT_NUM:
                        int_handled = 1;
                        break;
                case PMM_INT_NUM:

-                       /* the selfdefined PMM INT number, this is called by the code in PMM struct, it 
+                       /* the selfdefined PMM INT number, this is called by the code in PMM struct, it

                         * is handled by pmm_handleInt()
                         */
                        pmm_handleInt();
                         * is handled by pmm_handleInt()
                         */
                        pmm_handleInt();

diff --git a/src/devices/oprom/yabel/pmm.c b/src/devices/oprom/yabel/pmm.c
index ad4dc6834c4c403a4bb3df0c036464bea76c096d..989bde4d278eca03a612d6186f07dff17ceb0815 100644 (file)
--- a/src/devices/oprom/yabel/pmm.c
+++ b/src/devices/oprom/yabel/pmm.c
@@ -19,8 +19,8 @@
 #include "device.h"
 
 /* this struct is used to remember which PMM spaces
 #include "device.h"
 
 /* this struct is used to remember which PMM spaces

- * have been assigned. MAX_PMM_AREAS defines how many 
- * PMM areas we can assign. 
+ * have been assigned. MAX_PMM_AREAS defines how many
+ * PMM areas we can assign.

  * All areas are assigned in PMM_CONV_SEGMENT
  */
 typedef struct {
  * All areas are assigned in PMM_CONV_SEGMENT
  */
 typedef struct {


@@ -37,7 +37,7 @@ static pmm_allocation_t pmm_allocation_array[MAX_PMM_AREAS];
 /* index into pmm_allocation_array */
 static u32 curr_pmm_allocation_index = 0;
 
 /* index into pmm_allocation_array */
 static u32 curr_pmm_allocation_index = 0;
 

-/* This function is used to setup the PMM struct in virtual memory 
+/* This function is used to setup the PMM struct in virtual memory

  * at a certain offset, the length of the PMM struct is returned */
 u8 pmm_setup(u16 segment, u16 offset)
 {
  * at a certain offset, the length of the PMM struct is returned */
 u8 pmm_setup(u16 segment, u16 offset)
 {


@@ -79,7 +79,7 @@ u8 pmm_setup(u16 segment, u16 offset)
        return sizeof(pmm_information_t);
 }
 
        return sizeof(pmm_information_t);
 }
 

-/* handle the selfdefined interrupt, this is executed, when the PMM Entry Point 
+/* handle the selfdefined interrupt, this is executed, when the PMM Entry Point

  * is executed, it must handle all PMM requests
  */
 void pmm_handleInt()
  * is executed, it must handle all PMM requests
  */
 void pmm_handleInt()


@@ -136,7 +136,7 @@ void pmm_handleInt()
                                         __func__, next_offset);
                        if (length == 0) {
                                /* largest possible block size requested, we have on segment
                                         __func__, next_offset);
                        if (length == 0) {
                                /* largest possible block size requested, we have on segment

-                                * to allocate, so largest possible is segment size (0xFFFF) 
+                                * to allocate, so largest possible is segment size (0xFFFF)

                                 * minus next_offset
                                 */
                                rval = 0xFFFF - next_offset;
                                 * minus next_offset
                                 */
                                rval = 0xFFFF - next_offset;


@@ -151,7 +151,7 @@ void pmm_handleInt()
                                }
                                align = 1 << lsb;
                        }
                                }
                                align = 1 << lsb;
                        }

-                       /* always align at least to paragraph (16byte) boundary 
+                       /* always align at least to paragraph (16byte) boundary

                         * hm... since the length is always in paragraphs, we cannot
                         * align outside of paragraphs anyway... so this check might
                         * be unnecessary...*/
                         * hm... since the length is always in paragraphs, we cannot
                         * align outside of paragraphs anyway... so this check might
                         * be unnecessary...*/

diff --git a/src/devices/oprom/yabel/pmm.h b/src/devices/oprom/yabel/pmm.h
index 95645dffdc7e6a0894581b4ecf8c458a94a90ea3..3cc3c17ac63e1acdd5d70ca96d4fffb1562235b7 100644 (file)
--- a/src/devices/oprom/yabel/pmm.h
+++ b/src/devices/oprom/yabel/pmm.h
@@ -34,7 +34,7 @@ typedef struct {
        u8 code[3];
 } __attribute__ ((__packed__)) pmm_information_t;
 
        u8 code[3];
 } __attribute__ ((__packed__)) pmm_information_t;
 

-/* This function is used to setup the PMM struct in virtual memory 
+/* This function is used to setup the PMM struct in virtual memory

  * at a certain offset */
 u8 pmm_setup(u16 segment, u16 offset);
 
  * at a certain offset */
 u8 pmm_setup(u16 segment, u16 offset);
 

diff --git a/src/devices/oprom/yabel/vbe.c b/src/devices/oprom/yabel/vbe.c
index d80a97acc6b9bcd565dcd9a99a47a35e053839ec..6ddeba613b359f64edf24f6c8960e61a9fd51fc9 100644 (file)
--- a/src/devices/oprom/yabel/vbe.c
+++ b/src/devices/oprom/yabel/vbe.c
@@ -796,7 +796,7 @@ void vbe_set_graphics(void)
 
        mode_info.video_mode = (1 << 14) | CONFIG_FRAMEBUFFER_VESA_MODE;
        vbe_get_mode_info(&mode_info);
 
        mode_info.video_mode = (1 << 14) | CONFIG_FRAMEBUFFER_VESA_MODE;
        vbe_get_mode_info(&mode_info);

-       unsigned char *framebuffer = 
+       unsigned char *framebuffer =

                (unsigned char *) le32_to_cpu(mode_info.vesa.phys_base_ptr);
        DEBUG_PRINTF_VBE("FRAMEBUFFER: 0x%08x\n", framebuffer);
        vbe_set_mode(&mode_info);
                (unsigned char *) le32_to_cpu(mode_info.vesa.phys_base_ptr);
        DEBUG_PRINTF_VBE("FRAMEBUFFER: 0x%08x\n", framebuffer);
        vbe_set_mode(&mode_info);


@@ -807,9 +807,9 @@ void vbe_set_graphics(void)
        /* Switching Intel IGD to 1MB video memory will break this. Who
         * cares. */
        // int imagesize = 1024*768*2;
        /* Switching Intel IGD to 1MB video memory will break this. Who
         * cares. */
        // int imagesize = 1024*768*2;

-       
+

        unsigned char *jpeg = cbfs_find_file("bootsplash.jpg", CBFS_TYPE_BOOTSPLASH);
        unsigned char *jpeg = cbfs_find_file("bootsplash.jpg", CBFS_TYPE_BOOTSPLASH);

-       if (!jpeg) { 
+       if (!jpeg) {

                DEBUG_PRINTF_VBE("Could not find bootsplash.jpg\n");
                return;
        }
                DEBUG_PRINTF_VBE("Could not find bootsplash.jpg\n");
                return;
        }

diff --git a/src/devices/pci_device.c b/src/devices/pci_device.c
index b85ee53a720742927481011c9ad729f80af0bf94..8863c237a4380eabd60302fc7187692c1d161806 100644 (file)
--- a/src/devices/pci_device.c
+++ b/src/devices/pci_device.c
@@ -1187,7 +1187,7 @@ unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
 
 #if CONFIG_PC80_SYSTEM == 1
 /**
 
 #if CONFIG_PC80_SYSTEM == 1
 /**

- * 
+ *

  * @brief Assign IRQ numbers
  *
  * This function assigns IRQs for all functions contained within the indicated
  * @brief Assign IRQ numbers
  *
  * This function assigns IRQs for all functions contained within the indicated


@@ -1199,8 +1199,8 @@ unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
  * @param bus
  * @param slot
  * @param pIntAtoD is an array of IRQ #s that are assigned to PINTA through
  * @param bus
  * @param slot
  * @param pIntAtoD is an array of IRQ #s that are assigned to PINTA through

- *        PINTD of this slot.  The particular irq #s that are passed in 
- *        depend on the routing inside your southbridge and on your 
+ *        PINTD of this slot.  The particular irq #s that are passed in
+ *        depend on the routing inside your southbridge and on your

  *        motherboard.
  */
 void pci_assign_irqs(unsigned bus, unsigned slot,
  *        motherboard.
  */
 void pci_assign_irqs(unsigned bus, unsigned slot,


@@ -1229,7 +1229,7 @@ void pci_assign_irqs(unsigned bus, unsigned slot,
                printk(BIOS_DEBUG, "Assigning IRQ %d to %d:%x.%d\n",
                        irq, bus, slot, funct);
 
                printk(BIOS_DEBUG, "Assigning IRQ %d to %d:%x.%d\n",
                        irq, bus, slot, funct);
 

-               pci_write_config8(pdev, PCI_INTERRUPT_LINE, 
+               pci_write_config8(pdev, PCI_INTERRUPT_LINE,

                        pIntAtoD[line - 1]);
 
 #ifdef PARANOID_IRQ_ASSIGNMENTS
                        pIntAtoD[line - 1]);
 
 #ifdef PARANOID_IRQ_ASSIGNMENTS

diff --git a/src/devices/pci_rom.c b/src/devices/pci_rom.c
index 0ed347b4e7a1d36651bdfbb67e9104caa09c108d..f13d9b67683cf8d911564a139cbfa0864f08df63 100644 (file)
--- a/src/devices/pci_rom.c
+++ b/src/devices/pci_rom.c
@@ -87,7 +87,7 @@ struct rom_header * pci_rom_probe(struct device *dev)
                    rom_data->class_hi, rom_data->class_lo,
                    rom_data->type);
        if (dev->class != ((rom_data->class_hi << 8) | rom_data->class_lo)) {
                    rom_data->class_hi, rom_data->class_lo,
                    rom_data->type);
        if (dev->class != ((rom_data->class_hi << 8) | rom_data->class_lo)) {

-               printk(BIOS_DEBUG, "Class Code mismatch ROM %08x, dev %08x\n", 
+               printk(BIOS_DEBUG, "Class Code mismatch ROM %08x, dev %08x\n",

                             (rom_data->class_hi << 8) | rom_data->class_lo,
                             dev->class);
                //return NULL;
                             (rom_data->class_hi << 8) | rom_data->class_lo,
                             dev->class);
                //return NULL;

diff --git a/src/devices/pciexp_device.c b/src/devices/pciexp_device.c
index a14f00426fa98f8ca46f416ce506610aa9b8bb9f..790029ef1ea7602aa8b46a4568dcec482a3fe87b 100644 (file)
--- a/src/devices/pciexp_device.c
+++ b/src/devices/pciexp_device.c
@@ -46,8 +46,8 @@ static void pciexp_tune_dev(device_t dev)
 #endif
 }
 
 #endif
 }
 

-unsigned int pciexp_scan_bus(struct bus *bus, 
-       unsigned min_devfn, unsigned max_devfn, 
+unsigned int pciexp_scan_bus(struct bus *bus,
+       unsigned min_devfn, unsigned max_devfn,

        unsigned int max)
 {
        device_t child;
        unsigned int max)
 {
        device_t child;

diff --git a/src/devices/pcix_device.c b/src/devices/pcix_device.c
index e6147c9ba89c01951d8c3bbb21f1f6fec0c3b9d9..d3af53eed0759c1d7bdebfa0d5304898aebd1e32 100644 (file)
--- a/src/devices/pcix_device.c
+++ b/src/devices/pcix_device.c
@@ -86,12 +86,12 @@ const char *pcix_speed(unsigned sstatus)
        static const char pcix_266mhz[] = "266MHz PCI-X";
        static const char pcix_533mhz[] = "533MHZ PCI-X";
        static const char unknown[] = "Unknown";
        static const char pcix_266mhz[] = "266MHz PCI-X";
        static const char pcix_533mhz[] = "533MHZ PCI-X";
        static const char unknown[] = "Unknown";

-               
+

        const char *result;
        result = unknown;
        switch(PCI_X_SSTATUS_MFREQ(sstatus)) {
        const char *result;
        result = unknown;
        switch(PCI_X_SSTATUS_MFREQ(sstatus)) {

-       case PCI_X_SSTATUS_CONVENTIONAL_PCI:    
-               result = conventional; 
+       case PCI_X_SSTATUS_CONVENTIONAL_PCI:
+               result = conventional;

                break;
        case PCI_X_SSTATUS_MODE1_66MHZ:
                result = pcix_66mhz;
                break;
        case PCI_X_SSTATUS_MODE1_66MHZ:
                result = pcix_66mhz;


@@ -99,17 +99,17 @@ const char *pcix_speed(unsigned sstatus)
        case PCI_X_SSTATUS_MODE1_100MHZ:
                result = pcix_100mhz;
                break;
        case PCI_X_SSTATUS_MODE1_100MHZ:
                result = pcix_100mhz;
                break;

-               
+

        case PCI_X_SSTATUS_MODE1_133MHZ:
                result = pcix_133mhz;
                break;
        case PCI_X_SSTATUS_MODE1_133MHZ:
                result = pcix_133mhz;
                break;

-               
+

        case PCI_X_SSTATUS_MODE2_266MHZ_REF_66MHZ:
        case PCI_X_SSTATUS_MODE2_266MHZ_REF_100MHZ:
        case PCI_X_SSTATUS_MODE2_266MHZ_REF_133MHZ:
                result = pcix_266mhz;
                break;
        case PCI_X_SSTATUS_MODE2_266MHZ_REF_66MHZ:
        case PCI_X_SSTATUS_MODE2_266MHZ_REF_100MHZ:
        case PCI_X_SSTATUS_MODE2_266MHZ_REF_133MHZ:
                result = pcix_266mhz;
                break;

-               
+

        case PCI_X_SSTATUS_MODE2_533MHZ_REF_66MHZ:
        case PCI_X_SSTATUS_MODE2_533MHZ_REF_100MHZ:
        case PCI_X_SSTATUS_MODE2_533MHZ_REF_133MHZ:
        case PCI_X_SSTATUS_MODE2_533MHZ_REF_66MHZ:
        case PCI_X_SSTATUS_MODE2_533MHZ_REF_100MHZ:
        case PCI_X_SSTATUS_MODE2_533MHZ_REF_133MHZ:

diff --git a/src/devices/pnp_device.c b/src/devices/pnp_device.c
index 721d1ce3dcef6dcc76d53ee5e727f899ebfee37a..469487d1d26f8007eaa7a2823e52c573c88bf976 100644 (file)
--- a/src/devices/pnp_device.c
+++ b/src/devices/pnp_device.c
@@ -172,11 +172,11 @@ static void pnp_get_ioresource(device_t dev, unsigned index, struct io_info *inf
        unsigned moving, gran, step;
 
        resource = new_resource(dev, index);
        unsigned moving, gran, step;
 
        resource = new_resource(dev, index);

-       
+

        /* Initilize the resource */
        resource->limit = 0xffff;
        resource->flags |= IORESOURCE_IO;
        /* Initilize the resource */
        resource->limit = 0xffff;
        resource->flags |= IORESOURCE_IO;

-       
+

        /* Get the resource size */
        moving = info->mask;
        gran = 15;
        /* Get the resource size */
        moving = info->mask;
        gran = 15;


@@ -259,9 +259,9 @@ static void get_resources(device_t dev, struct pnp_info *info)
                resource->size = 1;
                resource->flags |= IORESOURCE_IRQ;
        }
                resource->size = 1;
                resource->flags |= IORESOURCE_IRQ;
        }

-} 
+}

 
 

-void pnp_enable_devices(device_t base_dev, struct device_operations *ops, 
+void pnp_enable_devices(device_t base_dev, struct device_operations *ops,

        unsigned functions, struct pnp_info *info)
 {
        struct device_path path;
        unsigned functions, struct pnp_info *info)
 {
        struct device_path path;


@@ -270,7 +270,7 @@ void pnp_enable_devices(device_t base_dev, struct device_operations *ops,
 
        path.type       = DEVICE_PATH_PNP;
        path.pnp.port = base_dev->path.pnp.port;
 
        path.type       = DEVICE_PATH_PNP;
        path.pnp.port = base_dev->path.pnp.port;

-       
+

        /* Setup the ops and resources on the newly allocated devices */
        for(i = 0; i < functions; i++) {
                /* Skip logical devices this Super I/O doesn't have. */
        /* Setup the ops and resources on the newly allocated devices */
        for(i = 0; i < functions; i++) {
                /* Skip logical devices this Super I/O doesn't have. */


@@ -279,9 +279,9 @@ void pnp_enable_devices(device_t base_dev, struct device_operations *ops,
 
                path.pnp.device = info[i].function;
                dev = alloc_find_dev(base_dev->bus, &path);
 
                path.pnp.device = info[i].function;
                dev = alloc_find_dev(base_dev->bus, &path);

-               
+

                /* Don't initialize a device multiple times */
                /* Don't initialize a device multiple times */

-               if (dev->ops) 
+               if (dev->ops)

                        continue;
 
                if (info[i].ops == 0) {
                        continue;
 
                if (info[i].ops == 0) {

diff --git a/src/devices/root_device.c b/src/devices/root_device.c
index 3e3249e85e5c3d733c80a0a5839739aea3aac9a7..b9369bcd1d7955aa8b6bf4be2868a56d00bfea3c 100644 (file)
--- a/src/devices/root_device.c
+++ b/src/devices/root_device.c
@@ -27,7 +27,7 @@
 #include <device/pci.h>
 #include <reset.h>
 
 #include <device/pci.h>
 #include <reset.h>
 

-/** 
+/**

  * Read the resources for the root device,
  * that encompass the resources for the entire system.
  * @param root Pointer to the device structure for the system root device
  * Read the resources for the root device,
  * that encompass the resources for the entire system.
  * @param root Pointer to the device structure for the system root device


@@ -54,9 +54,9 @@ void root_dev_set_resources(device_t root)
  *
  * The enumeration of certain buses is purely static. The existence of
  * devices on those buses can be completely determined at compile time
  *
  * The enumeration of certain buses is purely static. The existence of
  * devices on those buses can be completely determined at compile time

- * and is specified in the config file. Typical examples are the 'PNP' 
- * devices on a legacy ISA/LPC bus. There is no need of probing of any kind, 
- * the only thing we have to do is to walk through the bus and 
+ * and is specified in the config file. Typical examples are the 'PNP'
+ * devices on a legacy ISA/LPC bus. There is no need of probing of any kind,
+ * the only thing we have to do is to walk through the bus and

  * enable or disable devices as indicated in the config file.
  *
  * On the other hand, some devices are virtual and their existence is
  * enable or disable devices as indicated in the config file.
  *
  * On the other hand, some devices are virtual and their existence is


@@ -93,7 +93,7 @@ unsigned int scan_static_bus(device_t bus, unsigned int max)
                                child->ops->enable(child);
                        }
                        if (child->path.type == DEVICE_PATH_I2C) {
                                child->ops->enable(child);
                        }
                        if (child->path.type == DEVICE_PATH_I2C) {

-                               printk(BIOS_DEBUG, "smbus: %s[%d]->",  
+                               printk(BIOS_DEBUG, "smbus: %s[%d]->",

                                        dev_path(child->bus->dev), child->bus->link );
                        }
                        printk(BIOS_DEBUG, "%s %s\n",
                                        dev_path(child->bus->dev), child->bus->link );
                        }
                        printk(BIOS_DEBUG, "%s %s\n",

diff --git a/src/drivers/ati/ragexl/atyfb.h b/src/drivers/ati/ragexl/atyfb.h
index 3d9a8c5aa1cef822935ad9a1a0ca2faf8643ba88..99a87b33711d7a78bc9057f8270c1422b7bfbbf3 100644 (file)
--- a/src/drivers/ati/ragexl/atyfb.h
+++ b/src/drivers/ati/ragexl/atyfb.h
@@ -1,7 +1,7 @@
 /*
  *  ATI Frame Buffer Device Driver Core Definitions
  */
 /*
  *  ATI Frame Buffer Device Driver Core Definitions
  */

-       
+

 #define PLL_CRTC_DECODE 0
 
 #define EINVAL -1
 #define PLL_CRTC_DECODE 0
 
 #define EINVAL -1

diff --git a/src/drivers/ati/ragexl/fb.h b/src/drivers/ati/ragexl/fb.h
index 01f28877076239331ee7688c39baaa35bf3cb647..48d0f0172f1dbba974eb4bc0276ab555b734c7f5 100644 (file)
--- a/src/drivers/ati/ragexl/fb.h
+++ b/src/drivers/ati/ragexl/fb.h
@@ -119,7 +119,7 @@ struct fb_fix_screeninfo {
        u32 smem_len;                   /* Length of frame buffer mem */
        u32 type;                       /* see FB_TYPE_*                */
        u32 type_aux;                   /* Interleave for interleaved Planes */
        u32 smem_len;                   /* Length of frame buffer mem */
        u32 type;                       /* see FB_TYPE_*                */
        u32 type_aux;                   /* Interleave for interleaved Planes */

-       u32 visual;                     /* see FB_VISUAL_*              */ 
+       u32 visual;                     /* see FB_VISUAL_*              */

        u16 xpanstep;                   /* zero if no hardware panning  */
        u16 ypanstep;                   /* zero if no hardware panning  */
        u16 ywrapstep;          /* zero if no hardware ywrap    */
        u16 xpanstep;                   /* zero if no hardware panning  */
        u16 ypanstep;                   /* zero if no hardware panning  */
        u16 ywrapstep;          /* zero if no hardware ywrap    */


@@ -142,8 +142,8 @@ struct fb_fix_screeninfo {
 struct fb_bitfield {
        u32 offset;                     /* beginning of bitfield        */
        u32 length;                     /* length of bitfield           */
 struct fb_bitfield {
        u32 offset;                     /* beginning of bitfield        */
        u32 length;                     /* length of bitfield           */

-       u32 msb_right;          /* != 0 : Most significant bit is */ 
-                                       /* right */ 
+       u32 msb_right;          /* != 0 : Most significant bit is */
+                                       /* right */

 };
 
 #define FB_NONSTD_HAM          1       /* Hold-And-Modify (HAM)        */
 };
 
 #define FB_NONSTD_HAM          1       /* Hold-And-Modify (HAM)        */


@@ -191,7 +191,7 @@ struct fb_var_screeninfo {
        struct fb_bitfield red;         /* bitfield in fb mem if true color, */
        struct fb_bitfield green;       /* else only length is significant */
        struct fb_bitfield blue;
        struct fb_bitfield red;         /* bitfield in fb mem if true color, */
        struct fb_bitfield green;       /* else only length is significant */
        struct fb_bitfield blue;

-       struct fb_bitfield transp;      /* transparency                 */      
+       struct fb_bitfield transp;      /* transparency                 */

 
        u32 nonstd;                     /* != 0 Non standard pixel format */
 
 
        u32 nonstd;                     /* != 0 Non standard pixel format */
 


@@ -326,7 +326,7 @@ struct fb_info {
    devfs_handle_t devfs_handle;         /* Devfs handle for new name         */
    devfs_handle_t devfs_lhandle;        /* Devfs handle for compat. symlink  */
    int (*changevar)(int);               /* tell console var has changed */
    devfs_handle_t devfs_handle;         /* Devfs handle for new name         */
    devfs_handle_t devfs_lhandle;        /* Devfs handle for compat. symlink  */
    int (*changevar)(int);               /* tell console var has changed */

-   int (*switch_con)(int, struct fb_info*); 
+   int (*switch_con)(int, struct fb_info*);

                                         /* tell fb to switch consoles */
    int (*updatevar)(int, struct fb_info*);
                                         /* tell fb to update the vars */
                                         /* tell fb to switch consoles */
    int (*updatevar)(int, struct fb_info*);
                                         /* tell fb to update the vars */


@@ -338,7 +338,7 @@ struct fb_info {
                                            the cursor's color for non
                                            palette mode */
    /* From here on everything is device dependent */
                                            the cursor's color for non
                                            palette mode */
    /* From here on everything is device dependent */

-   void *par;   
-};  
+   void *par;
+};

 
 #endif /* _LINUX_FB_H */
 
 #endif /* _LINUX_FB_H */

diff --git a/src/drivers/ati/ragexl/fbcon.h b/src/drivers/ati/ragexl/fbcon.h
index 974e373215ba31cb8ebd813a30147d54c6968acd..d6f122cbb071d00974006a7af9e2d3ff0e88d78a 100644 (file)
--- a/src/drivers/ati/ragexl/fbcon.h
+++ b/src/drivers/ati/ragexl/fbcon.h
@@ -16,7 +16,7 @@ struct display {
     struct fb_var_screeninfo var;   /* variable infos. yoffset and vmode */
                                     /* are updated by fbcon.c */
     struct fb_cmap cmap;            /* colormap */
     struct fb_var_screeninfo var;   /* variable infos. yoffset and vmode */
                                     /* are updated by fbcon.c */
     struct fb_cmap cmap;            /* colormap */

-    char *screen_base;              /* pointer to top of virtual screen */    
+    char *screen_base;              /* pointer to top of virtual screen */

                                     /* (virtual address) */
     int visual;
     int type;                       /* see FB_TYPE_* */
                                     /* (virtual address) */
     int visual;
     int type;                       /* see FB_TYPE_* */


@@ -96,11 +96,11 @@ struct display {
        ((s) & 0x400)
 #define attr_blink(p,s) \
        ((s) & 0x8000)
        ((s) & 0x400)
 #define attr_blink(p,s) \
        ((s) & 0x8000)

-       
+

     /*
      *  Scroll Method
      */
     /*
      *  Scroll Method
      */

-     
+

 /* Internal flags */
 #define __SCROLL_YPAN          0x001
 #define __SCROLL_YWRAP         0x002
 /* Internal flags */
 #define __SCROLL_YPAN          0x001
 #define __SCROLL_YWRAP         0x002

diff --git a/src/drivers/ati/ragexl/mach64.h b/src/drivers/ati/ragexl/mach64.h
index c3afff28aa32065efea1b70ffc9fd06ce429083d..e0dae0df283ce4e69c8fe3271d090e5722bd351b 100644 (file)
--- a/src/drivers/ati/ragexl/mach64.h
+++ b/src/drivers/ati/ragexl/mach64.h
@@ -5,7 +5,7 @@
  *  written with much help from Jon Howell
  *
  * Updated for 3D RAGE PRO and 3D RAGE Mobility by Geert Uytterhoeven
  *  written with much help from Jon Howell
  *
  * Updated for 3D RAGE PRO and 3D RAGE Mobility by Geert Uytterhoeven

- *     
+ *

  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License
  * as published by the Free Software Foundation; either version
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License
  * as published by the Free Software Foundation; either version

diff --git a/src/drivers/ati/ragexl/mach64_ct.c b/src/drivers/ati/ragexl/mach64_ct.c
index ca5283de27eb757e8ba4d315e514b0a28e550ee6..b34be821fbf0111e90a3c4b41d723b1acdaa1a2a 100644 (file)
--- a/src/drivers/ati/ragexl/mach64_ct.c
+++ b/src/drivers/ati/ragexl/mach64_ct.c
@@ -5,7 +5,7 @@
 #if 0
 #define FAIL(x) do { printk(BIOS_DEBUG, x); return -EINVAL; } while (0)
 #else
 #if 0
 #define FAIL(x) do { printk(BIOS_DEBUG, x); return -EINVAL; } while (0)
 #else

-#define FAIL(x) 
+#define FAIL(x)

 #endif
 
 static int aty_valid_pll_ct(const struct fb_info_aty *info, u32 vclk_per,
 #endif
 
 static int aty_valid_pll_ct(const struct fb_info_aty *info, u32 vclk_per,


@@ -34,7 +34,7 @@ static int aty_dsp_gt(const struct fb_info_aty *info, u32 bpp,
 #if DEBUG_PLL==1
     printk(BIOS_DEBUG, "aty_dsp_gt : mclk_fb_mult=%d\n", pll->mclk_fb_mult);
 #endif
 #if DEBUG_PLL==1
     printk(BIOS_DEBUG, "aty_dsp_gt : mclk_fb_mult=%d\n", pll->mclk_fb_mult);
 #endif

-    
+

     /* (64*xclk/vclk/bpp)<<11 = xclocks_per_row<<11 */
     xclks_per_row = ((u32)pll->mclk_fb_mult * (u32)pll->mclk_fb_div *
                     (u32)pll->vclk_post_div_real * 64) << 11;
     /* (64*xclk/vclk/bpp)<<11 = xclocks_per_row<<11 */
     xclks_per_row = ((u32)pll->mclk_fb_mult * (u32)pll->mclk_fb_div *
                     (u32)pll->vclk_post_div_real * 64) << 11;


@@ -98,11 +98,11 @@ static int aty_dsp_gt(const struct fb_info_aty *info, u32 bpp,
     t_rp  = ((memcntl >>  8) & 0x03) + 1;
     t_ras = ((memcntl >> 16) & 0x07) + 1;
     t_lat =  (memcntl >>  4) & 0x03;
     t_rp  = ((memcntl >>  8) & 0x03) + 1;
     t_ras = ((memcntl >> 16) & 0x07) + 1;
     t_lat =  (memcntl >>  4) & 0x03;

-    
+

     t_pfc = t_rp + t_rcd + t_crd;
 
     t_rcc = max(t_rp + t_ras, t_pfc + n);
     t_pfc = t_rp + t_rcd + t_crd;
 
     t_rcc = max(t_rp + t_ras, t_pfc + n);

-    
+

     /* fifo_on<<6 */
     fifo_on = (2 * t_rcc + t_pfc + n - 1) << 6;
 
     /* fifo_on<<6 */
     fifo_on = (2 * t_rcc + t_pfc + n - 1) << 6;
 


@@ -125,9 +125,9 @@ static int aty_valid_pll_ct(const struct fb_info_aty *info, u32 vclk_per,
     int pllmclk, pllsclk;
 #endif
     u32 q;
     int pllmclk, pllsclk;
 #endif
     u32 q;

-    
+

     pll->pll_ref_div = info->pll_per*2*255/info->ref_clk_per;
     pll->pll_ref_div = info->pll_per*2*255/info->ref_clk_per;

-    
+

     /* FIXME: use the VTB/GTB /3 post divider if it's better suited */
 
     /* actually 8*q */
     /* FIXME: use the VTB/GTB /3 post divider if it's better suited */
 
     /* actually 8*q */


@@ -145,14 +145,14 @@ static int aty_valid_pll_ct(const struct fb_info_aty *info, u32 vclk_per,
        pll->mclk_post_div_real = 1;
     pll->sclk_fb_div = q*pll->mclk_post_div_real/8;
 
        pll->mclk_post_div_real = 1;
     pll->sclk_fb_div = q*pll->mclk_post_div_real/8;
 

-#if DEBUG_PLL==1    
+#if DEBUG_PLL==1

     pllsclk = (1000000 * 2 * pll->sclk_fb_div) /
            (info->ref_clk_per * pll->pll_ref_div);
 
     printk(BIOS_DEBUG, "aty_valid_pll_ct: pllsclk=%d MHz, mclk=%d MHz\n",
           pllsclk, pllsclk / pll->mclk_post_div_real);
 #endif
     pllsclk = (1000000 * 2 * pll->sclk_fb_div) /
            (info->ref_clk_per * pll->pll_ref_div);
 
     printk(BIOS_DEBUG, "aty_valid_pll_ct: pllsclk=%d MHz, mclk=%d MHz\n",
           pllsclk, pllsclk / pll->mclk_post_div_real);
 #endif

-    
+

     pll->mclk_fb_mult = M64_HAS(MFB_TIMES_4) ? 4 : 2;
 
     /* actually 8*q */
     pll->mclk_fb_mult = M64_HAS(MFB_TIMES_4) ? 4 : 2;
 
     /* actually 8*q */


@@ -177,7 +177,7 @@ static int aty_valid_pll_ct(const struct fb_info_aty *info, u32 vclk_per,
     printk(BIOS_DEBUG, "aty_valid_pll_ct: pllmclk=%d MHz, xclk=%d MHz\n",
           pllmclk, pllmclk / pll->xclk_post_div_real);
 #endif
     printk(BIOS_DEBUG, "aty_valid_pll_ct: pllmclk=%d MHz, xclk=%d MHz\n",
           pllmclk, pllmclk / pll->xclk_post_div_real);
 #endif

-    
+

     /* FIXME: use the VTB/GTB /{3,6,12} post dividers if they're better suited */
     q = info->ref_clk_per*pll->pll_ref_div*4/vclk_per; /* actually 8*q */
     if (q < 16*8 || q > 255*8)
     /* FIXME: use the VTB/GTB /{3,6,12} post dividers if they're better suited */
     q = info->ref_clk_per*pll->pll_ref_div*4/vclk_per; /* actually 8*q */
     if (q < 16*8 || q > 255*8)


@@ -199,7 +199,7 @@ static void aty_calc_pll_ct(const struct fb_info_aty *info, struct pll_ct *pll)
     u8 xpostdiv = 0;
     u8 mpostdiv = 0;
     u8 vpostdiv = 0;
     u8 xpostdiv = 0;
     u8 mpostdiv = 0;
     u8 vpostdiv = 0;

-    
+

     if (M64_HAS(SDRAM_MAGIC_PLL) && (info->ram_type >= SDRAM))
            pll->pll_gen_cntl = 0x64; /* mclk = sclk */
     else
     if (M64_HAS(SDRAM_MAGIC_PLL) && (info->ram_type >= SDRAM))
            pll->pll_gen_cntl = 0x64; /* mclk = sclk */
     else


@@ -221,7 +221,7 @@ static void aty_calc_pll_ct(const struct fb_info_aty *info, struct pll_ct *pll)
     }
 
     pll->spll_cntl2 = mpostdiv << 4; /* sclk == pllsclk / mpostdiv */
     }
 
     pll->spll_cntl2 = mpostdiv << 4; /* sclk == pllsclk / mpostdiv */

-    
+

     switch (pll->xclk_post_div_real) {
        case 1:
            xpostdiv = 0;
     switch (pll->xclk_post_div_real) {
        case 1:
            xpostdiv = 0;


@@ -316,12 +316,12 @@ void aty_set_pll_ct(const struct fb_info_aty *info, const union aty_pll *pll)
 
     aty_st_pll(PLL_EXT_CNTL, pll->ct.pll_ext_cntl, info);
     aty_st_pll(MCLK_FB_DIV, pll->ct.mclk_fb_div, info); // for XCLK
 
     aty_st_pll(PLL_EXT_CNTL, pll->ct.pll_ext_cntl, info);
     aty_st_pll(MCLK_FB_DIV, pll->ct.mclk_fb_div, info); // for XCLK

-    
+

     aty_st_pll(SPLL_CNTL2, pll->ct.spll_cntl2, info);
     aty_st_pll(SCLK_FB_DIV, pll->ct.sclk_fb_div, info); // for MCLK
 
     aty_st_pll(PLL_GEN_CNTL, pll->ct.pll_gen_cntl, info);
     aty_st_pll(SPLL_CNTL2, pll->ct.spll_cntl2, info);
     aty_st_pll(SCLK_FB_DIV, pll->ct.sclk_fb_div, info); // for MCLK
 
     aty_st_pll(PLL_GEN_CNTL, pll->ct.pll_gen_cntl, info);

-    
+

     aty_st_pll(EXT_VPLL_CNTL, 0, info);
     aty_st_pll(PLL_VCLK_CNTL, pll->ct.pll_vclk_cntl, info);
     aty_st_pll(VCLK_POST_DIV, pll->ct.vclk_post_div, info);
     aty_st_pll(EXT_VPLL_CNTL, 0, info);
     aty_st_pll(PLL_VCLK_CNTL, pll->ct.pll_vclk_cntl, info);
     aty_st_pll(VCLK_POST_DIV, pll->ct.vclk_post_div, info);

diff --git a/src/drivers/ati/ragexl/xlinit.c b/src/drivers/ati/ragexl/xlinit.c
index d776c26a785738a5ddae19cf6242dd684bfd31b2..8b0223983396d24c63dfdaf6fa72d8de92d4d344 100644 (file)
--- a/src/drivers/ati/ragexl/xlinit.c
+++ b/src/drivers/ati/ragexl/xlinit.c
@@ -96,7 +96,7 @@ static const struct xl_card_cfg_t {
                0x10, 0x19
        }
 };
                0x10, 0x19
        }
 };

-         
+

 typedef struct {
        u8 lcd_reg;
        u32 val;
 typedef struct {
        u8 lcd_reg;
        u32 val;


@@ -202,7 +202,7 @@ static int atyfb_xl_init(struct fb_info_aty *info)
        u32 temp;
        union aty_pll pll;
        const struct xl_card_cfg_t * card = &card_cfg[xl_card];
        u32 temp;
        union aty_pll pll;
        const struct xl_card_cfg_t * card = &card_cfg[xl_card];

-       
+

        aty_st_8(CONFIG_STAT0, 0x85, info);
        mdelay(10);
 
        aty_st_8(CONFIG_STAT0, 0x85, info);
        mdelay(10);
 


@@ -222,7 +222,7 @@ static int atyfb_xl_init(struct fb_info_aty *info)
                info->features &= ~M64F_MFB_TIMES_4;
        }
 #endif
                info->features &= ~M64F_MFB_TIMES_4;
        }
 #endif

-       
+

        /*
         * Calculate mclk and xclk dividers, etc. The passed
         * pixclock and bpp values don't matter yet, the vclk
        /*
         * Calculate mclk and xclk dividers, etc. The passed
         * pixclock and bpp values don't matter yet, the vclk


@@ -243,7 +243,7 @@ static int atyfb_xl_init(struct fb_info_aty *info)
        aty_st_pll(PLL_EXT_CNTL, pll.ct.pll_ext_cntl, info);
        aty_st_pll(SPLL_CNTL2, 0x03, info);
        aty_st_pll(PLL_GEN_CNTL, 0x44, info);
        aty_st_pll(PLL_EXT_CNTL, pll.ct.pll_ext_cntl, info);
        aty_st_pll(SPLL_CNTL2, 0x03, info);
        aty_st_pll(PLL_GEN_CNTL, 0x44, info);

-       
+

        reset_clocks(info, &pll.ct, 0);
        mdelay(10);
 
        reset_clocks(info, &pll.ct, 0);
        mdelay(10);
 


@@ -302,7 +302,7 @@ static int atyfb_xl_init(struct fb_info_aty *info)
        aty_st_8(LCD_INDEX, 0x08, info);
        aty_st_8(LCD_DATA, 0x0B, info);
        mdelay(2);
        aty_st_8(LCD_INDEX, 0x08, info);
        aty_st_8(LCD_DATA, 0x0B, info);
        mdelay(2);

-       
+

        // enable display requests, enable CRTC
        aty_st_8(CRTC_GEN_CNTL+3, 0x02, info);
        // disable display
        // enable display requests, enable CRTC
        aty_st_8(CRTC_GEN_CNTL+3, 0x02, info);
        // disable display


@@ -482,7 +482,7 @@ static void aty_calc_mem_refresh(struct fb_info_aty *info, u16 id, int xclk)
         info->mem_refresh_rate = i;
 }
 #endif /*CONFIG_CONSOLE_BTEXT */
         info->mem_refresh_rate = i;
 }
 #endif /*CONFIG_CONSOLE_BTEXT */

-static void ati_ragexl_init(device_t dev) 
+static void ati_ragexl_init(device_t dev)

 {
         u32 chip_id;
        int j;
 {
         u32 chip_id;
        int j;


@@ -513,9 +513,9 @@ static void ati_ragexl_init(device_t dev)
 #endif /*CONFIG_CONSOLE_BTEXT==1 */
 
         struct fb_info_aty *info;
 #endif /*CONFIG_CONSOLE_BTEXT==1 */
 
         struct fb_info_aty *info;

-        struct fb_info_aty info_t; 
-        struct resource *res; 
-        info = &info_t; 
+        struct fb_info_aty info_t;
+        struct resource *res;
+        info = &info_t;

 
 #define USE_AUX_REG 1
 
 
 #define USE_AUX_REG 1
 


@@ -529,12 +529,12 @@ static void ati_ragexl_init(device_t dev)
        info->frame_buffer = res->base;
 #endif /* CONFIG_CONSOLE_BTEXT */
 
        info->frame_buffer = res->base;
 #endif /* CONFIG_CONSOLE_BTEXT */
 

-#if USE_AUX_REG==0   
+#if USE_AUX_REG==0

         info->ati_regbase = res->base+0x7ff000+0xc00;
         info->ati_regbase = res->base+0x7ff000+0xc00;

-#else 
+#else

         res = &dev->resource[2];
         if(res->flags & IORESOURCE_MEM) {
         res = &dev->resource[2];
         if(res->flags & IORESOURCE_MEM) {

-                info->ati_regbase = res->base+0x400; //using auxiliary register 
+                info->ati_regbase = res->base+0x400; //using auxiliary register

         }
 
 #endif
         }
 
 #endif


@@ -570,7 +570,7 @@ found:
                /* for many chips, the mclk is 67 MHz for SDRAM, 63 MHz otherwise */
                if (mclk == 67 && info->ram_type < SDRAM)
                        mclk = 63;
                /* for many chips, the mclk is 67 MHz for SDRAM, 63 MHz otherwise */
                if (mclk == 67 && info->ram_type < SDRAM)
                        mclk = 63;

-       }   
+       }

 #endif
 #if CONFIG_CONSOLE_BTEXT==1
         aty_calc_mem_refresh(info, type, xclk);
 #endif
 #if CONFIG_CONSOLE_BTEXT==1
         aty_calc_mem_refresh(info, type, xclk);


@@ -583,14 +583,14 @@ found:
 //        info->dac_ops = &aty_dac_ct;
 //        info->pll_ops = &aty_pll_ct;
         info->bus_type = PCI;
 //        info->dac_ops = &aty_dac_ct;
 //        info->pll_ops = &aty_pll_ct;
         info->bus_type = PCI;

-       
+

 
        atyfb_xl_init(info);
 
 #if CONFIG_CONSOLE_BTEXT==1
 
        info->ram_type = (aty_ld_le32(CONFIG_STAT0, info) & 0x07);
 
        atyfb_xl_init(info);
 
 #if CONFIG_CONSOLE_BTEXT==1
 
        info->ram_type = (aty_ld_le32(CONFIG_STAT0, info) & 0x07);

-       
+

         info->ref_clk_per = 1000000000000ULL/14318180;
        xtal = "14.31818";
 #if 0
         info->ref_clk_per = 1000000000000ULL/14318180;
        xtal = "14.31818";
 #if 0


@@ -719,7 +719,7 @@ found:
     }
 
     if (atyfb_decode_var(&var, &info->default_par, info)) {
     }
 
     if (atyfb_decode_var(&var, &info->default_par, info)) {

-#if 0  
+#if 0

         printk(BIOS_DEBUG, "atyfb: can't set default video mode\n");
 #endif
         return ;
         printk(BIOS_DEBUG, "atyfb: can't set default video mode\n");
 #endif
         return ;


@@ -779,7 +779,7 @@ found:
 #endif
 
  btext_clearscreen();
 #endif
 
  btext_clearscreen();

- 
+

  map_boot_text();
 
 #if 0
  map_boot_text();
 
 #if 0


@@ -791,7 +791,7 @@ found:
 #endif
 
 #endif /* CONFIG_CONSOLE_BTEXT */
 #endif
 
 #endif /* CONFIG_CONSOLE_BTEXT */

-       
+

 }
 
 #if CONFIG_CONSOLE_BTEXT==1
 }
 
 #if CONFIG_CONSOLE_BTEXT==1


@@ -856,13 +856,13 @@ static void aty_set_crtc(const struct fb_info_aty *info,
 static int aty_var_to_crtc(const struct fb_info_aty *info,
                            const struct fb_var_screeninfo *var,
                            struct crtc *crtc)
 static int aty_var_to_crtc(const struct fb_info_aty *info,
                            const struct fb_var_screeninfo *var,
                            struct crtc *crtc)

-{       
+{

     u32 xres, yres, vxres, vyres, xoffset, yoffset, bpp;
     u32 left, right, upper, lower, hslen, vslen, sync, vmode;
     u32 h_total, h_disp, h_sync_strt, h_sync_dly, h_sync_wid, h_sync_pol;
     u32 v_total, v_disp, v_sync_strt, v_sync_wid, v_sync_pol, c_sync;
     u32 pix_width, dp_pix_width, dp_chain_mask;
     u32 xres, yres, vxres, vyres, xoffset, yoffset, bpp;
     u32 left, right, upper, lower, hslen, vslen, sync, vmode;
     u32 h_total, h_disp, h_sync_strt, h_sync_dly, h_sync_wid, h_sync_pol;
     u32 v_total, v_disp, v_sync_strt, v_sync_wid, v_sync_pol, c_sync;
     u32 pix_width, dp_pix_width, dp_chain_mask;

-        
+

     /* input */
     xres = var->xres;
     yres = var->yres;
     /* input */
     xres = var->xres;
     yres = var->yres;


@@ -877,9 +877,9 @@ static int aty_var_to_crtc(const struct fb_info_aty *info,
     lower = var->lower_margin;
     hslen = var->hsync_len;
     vslen = var->vsync_len;
     lower = var->lower_margin;
     hslen = var->hsync_len;
     vslen = var->vsync_len;

-    sync = var->sync; 
+    sync = var->sync;

     vmode = var->vmode;
     vmode = var->vmode;

-        
+

     /* convert (and round up) and validate */
     xres = (xres+7) & ~7;
     xoffset = (xoffset+7) & ~7;
     /* convert (and round up) and validate */
     xres = (xres+7) & ~7;
     xoffset = (xoffset+7) & ~7;


@@ -887,7 +887,7 @@ static int aty_var_to_crtc(const struct fb_info_aty *info,
     if (vxres < xres+xoffset)
         vxres = xres+xoffset;
     h_disp = xres/8-1;
     if (vxres < xres+xoffset)
         vxres = xres+xoffset;
     h_disp = xres/8-1;

-    if (h_disp > 0xff) 
+    if (h_disp > 0xff)

         FAIL("h_disp too large");
     h_sync_strt = h_disp+(right/8);
     if (h_sync_strt > 0x1ff)
         FAIL("h_disp too large");
     h_sync_strt = h_disp+(right/8);
     if (h_sync_strt > 0x1ff)


@@ -924,7 +924,7 @@ static int aty_var_to_crtc(const struct fb_info_aty *info,
         pix_width = CRTC_PIX_WIDTH_8BPP;
         dp_pix_width = HOST_8BPP | SRC_8BPP | DST_8BPP | BYTE_ORDER_LSB_TO_MSB;
         dp_chain_mask = 0x8080;
         pix_width = CRTC_PIX_WIDTH_8BPP;
         dp_pix_width = HOST_8BPP | SRC_8BPP | DST_8BPP | BYTE_ORDER_LSB_TO_MSB;
         dp_chain_mask = 0x8080;

-    } 
+    }

 #if SUPPORT_8_BPP_ABOVE==1
    else if (bpp <= 16) {
         bpp = 16;
 #if SUPPORT_8_BPP_ABOVE==1
    else if (bpp <= 16) {
         bpp = 16;


@@ -943,7 +943,7 @@ static int aty_var_to_crtc(const struct fb_info_aty *info,
         dp_pix_width = HOST_32BPP | SRC_32BPP | DST_32BPP |
                        BYTE_ORDER_LSB_TO_MSB;
         dp_chain_mask = 0x8080;
         dp_pix_width = HOST_32BPP | SRC_32BPP | DST_32BPP |
                        BYTE_ORDER_LSB_TO_MSB;
         dp_chain_mask = 0x8080;

-    } 
+    }

 #endif
 else
         FAIL("invalid bpp");
 #endif
 else
         FAIL("invalid bpp");


@@ -1123,7 +1123,7 @@ static int encode_fix(struct fb_fix_screeninfo *fix,
     fix->smem_start = info->frame_buffer;
     fix->smem_len = (u32)info->total_vram;
 
     fix->smem_start = info->frame_buffer;
     fix->smem_len = (u32)info->total_vram;
 

-    /* 
+    /*

      *  Reg Block 0 (CT-compatible block) is at ati_regbase_phys
      *  Reg Block 1 (multimedia extensions) is at ati_regbase_phys-0x400
      */
      *  Reg Block 0 (CT-compatible block) is at ati_regbase_phys
      *  Reg Block 1 (multimedia extensions) is at ati_regbase_phys-0x400
      */


@@ -1158,11 +1158,11 @@ static int encode_fix(struct fb_fix_screeninfo *fix,
 #endif
    /*
      *  Set the User Defined Part of the Display
 #endif
    /*
      *  Set the User Defined Part of the Display

-     */ 
-#if PLL_CRTC_DECODE==1    
+     */
+#if PLL_CRTC_DECODE==1

 static int atyfb_set_var(struct fb_var_screeninfo *var, int con,
                          struct fb_info *fb)
 static int atyfb_set_var(struct fb_var_screeninfo *var, int con,
                          struct fb_info *fb)

-{                        
+{

     struct fb_info_aty *info = (struct fb_info_aty *)fb;
     struct atyfb_par par;
 #if 0
     struct fb_info_aty *info = (struct fb_info_aty *)fb;
     struct atyfb_par par;
 #if 0


@@ -1171,8 +1171,8 @@ static int atyfb_set_var(struct fb_var_screeninfo *var, int con,
 #endif
     int err;
     int activate = var->activate;
 #endif
     int err;
     int activate = var->activate;

-   
-#if 0 
+
+#if 0

     if (con >= 0)
         display = &fb_display[con];
     else
     if (con >= 0)
         display = &fb_display[con];
     else


@@ -1180,13 +1180,13 @@ static int atyfb_set_var(struct fb_var_screeninfo *var, int con,
 #if 0
         display = fb->disp;     /* used during initialization */
 #endif
 #if 0
         display = fb->disp;     /* used during initialization */
 #endif

-        
+

     if ((err = atyfb_decode_var(var, &par, info)))
         return err;
     if ((err = atyfb_decode_var(var, &par, info)))
         return err;

-        
+

     atyfb_encode_var(var, &par, (struct fb_info_aty *)info);
     atyfb_encode_var(var, &par, (struct fb_info_aty *)info);

-   
-#if 0 
+
+#if 0

     printk(BIOS_INFO, "atyfb_set_var: activate=%d\n", activate & FB_ACTIVATE_MASK);
 #endif
 
     printk(BIOS_INFO, "atyfb_set_var: activate=%d\n", activate & FB_ACTIVATE_MASK);
 #endif
 


@@ -1262,7 +1262,7 @@ static void atyfb_set_par(const struct atyfb_par *par,
 
 #if PLL_CRTC_DECODE==1
     info->current_par = *par;
 
 #if PLL_CRTC_DECODE==1
     info->current_par = *par;

-#endif 
+#endif

 
     if (info->blitter_may_be_busy)
         wait_for_idle(info);
 
     if (info->blitter_may_be_busy)
         wait_for_idle(info);


@@ -1344,7 +1344,7 @@ static void atyfb_set_par(const struct atyfb_par *par,
 
 }
 #if 0
 
 }
 #if 0

-static u16 red2[] = { 
+static u16 red2[] = {

     0x0000, 0xaaaa
 };
 static u16 green2[] = {
     0x0000, 0xaaaa
 };
 static u16 green2[] = {


@@ -1356,14 +1356,14 @@ static u16 blue2[] = {
 
 static u16 red4[] = {
     0x0000, 0xaaaa, 0x5555, 0xffff
 
 static u16 red4[] = {
     0x0000, 0xaaaa, 0x5555, 0xffff

-};      
+};

 static u16 green4[] = {
     0x0000, 0xaaaa, 0x5555, 0xffff
 static u16 green4[] = {
     0x0000, 0xaaaa, 0x5555, 0xffff

-};      
+};

 static u16 blue4[] = {
     0x0000, 0xaaaa, 0x5555, 0xffff
 static u16 blue4[] = {
     0x0000, 0xaaaa, 0x5555, 0xffff

-};      
- 
+};
+

 static u16 red8[] = {
     0x0000, 0x0000, 0x0000, 0x0000, 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa
 };
 static u16 red8[] = {
     0x0000, 0x0000, 0x0000, 0x0000, 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa
 };


@@ -1405,12 +1405,12 @@ static struct fb_cmap default_16_colors = {
 
 static int atyfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
                            u_int transp, struct fb_info_aty *info)
 
 static int atyfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
                            u_int transp, struct fb_info_aty *info)

-{                          
+{

     int i, scale;
     int i, scale;

-    
+

     if (regno > 255)
         return 1;
     if (regno > 255)
         return 1;

-    red >>= 8; 
+    red >>= 8;

     green >>= 8;
     blue >>= 8;
 #if 0
     green >>= 8;
     blue >>= 8;
 #if 0


@@ -1418,7 +1418,7 @@ static int atyfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
     info->palette[regno].red = red;
     info->palette[regno].green = green;
     info->palette[regno].blue = blue;
     info->palette[regno].red = red;
     info->palette[regno].green = green;
     info->palette[regno].blue = blue;

-#endif 
+#endif

     i = aty_ld_8(DAC_CNTL, info) & 0xfc;
     if (M64_HAS(EXTRA_BRIGHT))
         i |= 0x2;       /*DAC_CNTL|0x2 turns off the extra brightness for gt*/
     i = aty_ld_8(DAC_CNTL, info) & 0xfc;
     if (M64_HAS(EXTRA_BRIGHT))
         i |= 0x2;       /*DAC_CNTL|0x2 turns off the extra brightness for gt*/


@@ -1440,11 +1440,11 @@ int fb_set_cmap(struct fb_cmap *cmap, int kspc,
                 int (*setcolreg)(u_int, u_int, u_int, u_int, u_int,
                                  struct fb_info_aty *),
                 struct fb_info_aty *info)
                 int (*setcolreg)(u_int, u_int, u_int, u_int, u_int,
                                  struct fb_info_aty *),
                 struct fb_info_aty *info)

-{   
+{

     int i, start;
     u16 *red, *green, *blue, *transp;
     u_int hred, hgreen, hblue, htransp;
     int i, start;
     u16 *red, *green, *blue, *transp;
     u_int hred, hgreen, hblue, htransp;

-    
+

     red = cmap->red;
     green = cmap->green;
     blue = cmap->blue;
     red = cmap->red;
     green = cmap->green;
     blue = cmap->blue;


@@ -1480,13 +1480,13 @@ struct fb_cmap *fb_default_cmap(int len)
         return &default_8_colors;
 #endif
     return &default_16_colors;
         return &default_8_colors;
 #endif
     return &default_16_colors;

-}   
+}

 
 static void do_install_cmap(int con, struct fb_info_aty *info)
 {
 #if PLL_CRTC_DECODE==1
         int size = info->current_par.crtc.bpp == 16 ? 32 : 256;
 
 static void do_install_cmap(int con, struct fb_info_aty *info)
 {
 #if PLL_CRTC_DECODE==1
         int size = info->current_par.crtc.bpp == 16 ? 32 : 256;

-#else 
+#else

        int size = 256;
 #endif
         fb_set_cmap(fb_default_cmap(size), 1, atyfb_setcolreg, info);
        int size = 256;
 #endif
         fb_set_cmap(fb_default_cmap(size), 1, atyfb_setcolreg, info);

diff --git a/src/drivers/emulation/qemu/fb.h b/src/drivers/emulation/qemu/fb.h
index 01f28877076239331ee7688c39baaa35bf3cb647..48d0f0172f1dbba974eb4bc0276ab555b734c7f5 100644 (file)
--- a/src/drivers/emulation/qemu/fb.h
+++ b/src/drivers/emulation/qemu/fb.h
@@ -119,7 +119,7 @@ struct fb_fix_screeninfo {
        u32 smem_len;                   /* Length of frame buffer mem */
        u32 type;                       /* see FB_TYPE_*                */
        u32 type_aux;                   /* Interleave for interleaved Planes */
        u32 smem_len;                   /* Length of frame buffer mem */
        u32 type;                       /* see FB_TYPE_*                */
        u32 type_aux;                   /* Interleave for interleaved Planes */

-       u32 visual;                     /* see FB_VISUAL_*              */ 
+       u32 visual;                     /* see FB_VISUAL_*              */

        u16 xpanstep;                   /* zero if no hardware panning  */
        u16 ypanstep;                   /* zero if no hardware panning  */
        u16 ywrapstep;          /* zero if no hardware ywrap    */
        u16 xpanstep;                   /* zero if no hardware panning  */
        u16 ypanstep;                   /* zero if no hardware panning  */
        u16 ywrapstep;          /* zero if no hardware ywrap    */


@@ -142,8 +142,8 @@ struct fb_fix_screeninfo {
 struct fb_bitfield {
        u32 offset;                     /* beginning of bitfield        */
        u32 length;                     /* length of bitfield           */
 struct fb_bitfield {
        u32 offset;                     /* beginning of bitfield        */
        u32 length;                     /* length of bitfield           */

-       u32 msb_right;          /* != 0 : Most significant bit is */ 
-                                       /* right */ 
+       u32 msb_right;          /* != 0 : Most significant bit is */
+                                       /* right */

 };
 
 #define FB_NONSTD_HAM          1       /* Hold-And-Modify (HAM)        */
 };
 
 #define FB_NONSTD_HAM          1       /* Hold-And-Modify (HAM)        */


@@ -191,7 +191,7 @@ struct fb_var_screeninfo {
        struct fb_bitfield red;         /* bitfield in fb mem if true color, */
        struct fb_bitfield green;       /* else only length is significant */
        struct fb_bitfield blue;
        struct fb_bitfield red;         /* bitfield in fb mem if true color, */
        struct fb_bitfield green;       /* else only length is significant */
        struct fb_bitfield blue;

-       struct fb_bitfield transp;      /* transparency                 */      
+       struct fb_bitfield transp;      /* transparency                 */

 
        u32 nonstd;                     /* != 0 Non standard pixel format */
 
 
        u32 nonstd;                     /* != 0 Non standard pixel format */
 


@@ -326,7 +326,7 @@ struct fb_info {
    devfs_handle_t devfs_handle;         /* Devfs handle for new name         */
    devfs_handle_t devfs_lhandle;        /* Devfs handle for compat. symlink  */
    int (*changevar)(int);               /* tell console var has changed */
    devfs_handle_t devfs_handle;         /* Devfs handle for new name         */
    devfs_handle_t devfs_lhandle;        /* Devfs handle for compat. symlink  */
    int (*changevar)(int);               /* tell console var has changed */

-   int (*switch_con)(int, struct fb_info*); 
+   int (*switch_con)(int, struct fb_info*);

                                         /* tell fb to switch consoles */
    int (*updatevar)(int, struct fb_info*);
                                         /* tell fb to update the vars */
                                         /* tell fb to switch consoles */
    int (*updatevar)(int, struct fb_info*);
                                         /* tell fb to update the vars */


@@ -338,7 +338,7 @@ struct fb_info {
                                            the cursor's color for non
                                            palette mode */
    /* From here on everything is device dependent */
                                            the cursor's color for non
                                            palette mode */
    /* From here on everything is device dependent */

-   void *par;   
-};  
+   void *par;
+};

 
 #endif /* _LINUX_FB_H */
 
 #endif /* _LINUX_FB_H */

diff --git a/src/drivers/emulation/qemu/fbcon.h b/src/drivers/emulation/qemu/fbcon.h
index 8b83a3682bb36219b282a49f2e24214a46361d60..0656c6f4626e8a35f7340de79569f5fe13d2a33a 100644 (file)
--- a/src/drivers/emulation/qemu/fbcon.h
+++ b/src/drivers/emulation/qemu/fbcon.h
@@ -19,7 +19,7 @@ struct display {
     struct fb_var_screeninfo var;   /* variable infos. yoffset and vmode */
                                     /* are updated by fbcon.c */
     struct fb_cmap cmap;            /* colormap */
     struct fb_var_screeninfo var;   /* variable infos. yoffset and vmode */
                                     /* are updated by fbcon.c */
     struct fb_cmap cmap;            /* colormap */

-    char *screen_base;              /* pointer to top of virtual screen */    
+    char *screen_base;              /* pointer to top of virtual screen */

                                     /* (virtual address) */
     int visual;
     int type;                       /* see FB_TYPE_* */
                                     /* (virtual address) */
     int visual;
     int type;                       /* see FB_TYPE_* */


@@ -108,11 +108,11 @@ struct display {
        ((s) & 0x400)
 #define attr_blink(p,s) \
        ((s) & 0x8000)
        ((s) & 0x400)
 #define attr_blink(p,s) \
        ((s) & 0x8000)

-       
+

     /*
      *  Scroll Method
      */
     /*
      *  Scroll Method
      */

-     
+

 /* Internal flags */
 #define __SCROLL_YPAN          0x001
 #define __SCROLL_YWRAP         0x002
 /* Internal flags */
 #define __SCROLL_YPAN          0x001
 #define __SCROLL_YWRAP         0x002

diff --git a/src/drivers/emulation/qemu/init.c b/src/drivers/emulation/qemu/init.c
index 20e080b4f7a13600d98398cc497ddf16f180999c..ae38d2b9edc5fb618d9fdbe281b39f1726e69795 100644 (file)
--- a/src/drivers/emulation/qemu/init.c
+++ b/src/drivers/emulation/qemu/init.c
@@ -57,7 +57,7 @@ static void qemu_init(void)
     int width=640, height=480, depth=8;
 
     printk(BIOS_DEBUG, "Initializing VGA!\n");
     int width=640, height=480, depth=8;
 
     printk(BIOS_DEBUG, "Initializing VGA!\n");

-    
+

     vbe_outw(VBE_DISPI_INDEX_XRES, width);
     vbe_outw(VBE_DISPI_INDEX_YRES, height);
     vbe_outw(VBE_DISPI_INDEX_BPP, depth);
     vbe_outw(VBE_DISPI_INDEX_XRES, width);
     vbe_outw(VBE_DISPI_INDEX_YRES, height);
     vbe_outw(VBE_DISPI_INDEX_BPP, depth);

diff --git a/src/drivers/generic/debug/debug_dev.c b/src/drivers/generic/debug/debug_dev.c
index 6af53259263ee2badb7cd1eed3066ddee5f47b71..5c5dc8b16e59b5bf660253a16bef64e02034b0d0 100644 (file)
--- a/src/drivers/generic/debug/debug_dev.c
+++ b/src/drivers/generic/debug/debug_dev.c
@@ -16,7 +16,7 @@ static void print_pci_regs(struct device *dev)
 
       for(i=0;i<256;i++) {
              byte = pci_read_config8(dev, i);
 
       for(i=0;i<256;i++) {
              byte = pci_read_config8(dev, i);

-   
+

              if((i & 0xf)==0) printk(BIOS_DEBUG, "\n%02x:",i);
              printk(BIOS_DEBUG, " %02x",byte);
       }
              if((i & 0xf)==0) printk(BIOS_DEBUG, "\n%02x:",i);
              printk(BIOS_DEBUG, " %02x",byte);
       }


@@ -51,7 +51,7 @@ static void print_pci_regs_all(void)
                                if(!dev->enabled) {
                                        continue;
                                }
                                if(!dev->enabled) {
                                        continue;
                                }

-                               printk(BIOS_DEBUG, "\n%02x:%02x:%02x aka %s", 
+                               printk(BIOS_DEBUG, "\n%02x:%02x:%02x aka %s",

                                        bus, device, function, dev_path(dev));
                                print_pci_regs(dev);
                        }
                                        bus, device, function, dev_path(dev));
                                print_pci_regs(dev);
                        }


@@ -83,7 +83,7 @@ static void print_cpuid(void)
 
 }
 static void print_smbus_regs(struct device *dev)
 
 }
 static void print_smbus_regs(struct device *dev)

-{               
+{

        int j;
        printk(BIOS_DEBUG, "smbus: %s[%d]->", dev_path(dev->bus->dev), dev->bus->link);
        printk(BIOS_DEBUG, "%s", dev_path(dev));
        int j;
        printk(BIOS_DEBUG, "smbus: %s[%d]->", dev_path(dev->bus->dev), dev->bus->link);
        printk(BIOS_DEBUG, "%s", dev_path(dev));


@@ -97,7 +97,7 @@ static void print_smbus_regs(struct device *dev)
                }
                 if ((j & 0xf) == 0) {
                         printk(BIOS_DEBUG, "\n%02x: ", j);
                }
                 if ((j & 0xf) == 0) {
                         printk(BIOS_DEBUG, "\n%02x: ", j);

-                }  
+                }

                byte = status & 0xff;
                printk(BIOS_DEBUG, "%02x ", byte);
        }
                byte = status & 0xff;
                printk(BIOS_DEBUG, "%02x ", byte);
        }


@@ -113,12 +113,12 @@ static void print_smbus_regs_all(struct device *dev)
                // Here don't need to call smbus_set_link, because we scan it from top to down
                if( dev->bus->dev->path.type == DEVICE_PATH_I2C) { // it's under i2c MUX so set mux at first
                        if(ops_smbus_bus(get_pbus_smbus(dev->bus->dev))) {
                // Here don't need to call smbus_set_link, because we scan it from top to down
                if( dev->bus->dev->path.type == DEVICE_PATH_I2C) { // it's under i2c MUX so set mux at first
                        if(ops_smbus_bus(get_pbus_smbus(dev->bus->dev))) {

-                               if(dev->bus->dev->ops && dev->bus->dev->ops->set_link) 
+                               if(dev->bus->dev->ops && dev->bus->dev->ops->set_link)

                                        dev->bus->dev->ops->set_link(dev->bus->dev, dev->bus->link);
                        }
                }
                                        dev->bus->dev->ops->set_link(dev->bus->dev, dev->bus->link);
                        }
                }

-               
-               if(ops_smbus_bus(get_pbus_smbus(dev))) print_smbus_regs(dev);   
+
+               if(ops_smbus_bus(get_pbus_smbus(dev))) print_smbus_regs(dev);

        }
 
        for(i=0; i< dev->links; i++) {
        }
 
        for(i=0; i< dev->links; i++) {


@@ -142,7 +142,7 @@ static void print_msr_dualcore(void)
         printk(BIOS_DEBUG, "cpuid[%08x]: %08x %08x %08x %08x\n",
                 index, eax, ebx, ecx, edx);
 
         printk(BIOS_DEBUG, "cpuid[%08x]: %08x %08x %08x %08x\n",
                 index, eax, ebx, ecx, edx);
 

-        printk(BIOS_DEBUG, "core number %d\n", ecx & 0xff);   
+        printk(BIOS_DEBUG, "core number %d\n", ecx & 0xff);

 
         index = 0xc001001f;
         printk(BIOS_DEBUG, "Reading msr: 0x%08x\n", index);
 
         index = 0xc001001f;
         printk(BIOS_DEBUG, "Reading msr: 0x%08x\n", index);


@@ -217,7 +217,7 @@ static tsc_t rdtsc(void)
 }
 
 static void print_tsc(void) {
 }
 
 static void print_tsc(void) {

-       
+

        tsc_t tsc;
        tsc = rdtsc();
         printk(BIOS_DEBUG, "tsc: 0x%08x%08x\n",
        tsc_t tsc;
        tsc = rdtsc();
         printk(BIOS_DEBUG, "tsc: 0x%08x%08x\n",


@@ -245,29 +245,29 @@ static void debug_init(device_t dev)
                        printk(BIOS_DEBUG, "\n");
                }
                break;
                        printk(BIOS_DEBUG, "\n");
                }
                break;

-               
+

        case 1:
                print_pci_regs_all();
                break;
        case 1:
                print_pci_regs_all();
                break;

-       case 2: 
+       case 2:

                print_mem();
                break;
        case 3:
                print_cpuid();
                break;
                print_mem();
                break;
        case 3:
                print_cpuid();
                break;

-       case 4: 
+       case 4:

                print_smbus_regs_all(&dev_root);
                break;
                print_smbus_regs_all(&dev_root);
                break;

-        case 5: 
+        case 5:

                 print_msr_dualcore();
                 break;
                 print_msr_dualcore();
                 break;

-       case 6: 
+       case 6:

                print_cache_size();
                break;
        case 7:
                print_tsc();
                break;
                print_cache_size();
                break;
        case 7:
                print_tsc();
                break;

-       case 8: 
+       case 8:

                hard_reset();
                break;
        }
                hard_reset();
                break;
        }


@@ -291,5 +291,5 @@ static void enable_dev(struct device *dev)
 
 struct chip_operations drivers_generic_debug_ops = {
        CHIP_NAME("Debug device")
 
 struct chip_operations drivers_generic_debug_ops = {
        CHIP_NAME("Debug device")

-       .enable_dev = enable_dev, 
+       .enable_dev = enable_dev,

 };
 };

diff --git a/src/drivers/i2c/adm1026/adm1026.c b/src/drivers/i2c/adm1026/adm1026.c
index 8cf6281bda293893850aa39343b1118f601d11a2..14b07aa90caf87a8135023245feffc512e9fb3dc 100644 (file)
--- a/src/drivers/i2c/adm1026/adm1026.c
+++ b/src/drivers/i2c/adm1026/adm1026.c
@@ -27,10 +27,10 @@ static void adm1026_init(device_t dev)
        if (dev->enabled && dev->path.type == DEVICE_PATH_I2C)
        {
                if(ops_smbus_bus(get_pbus_smbus(dev))) {
        if (dev->enabled && dev->path.type == DEVICE_PATH_I2C)
        {
                if(ops_smbus_bus(get_pbus_smbus(dev))) {

-                       if( dev->bus->dev->path.type == DEVICE_PATH_I2C) smbus_set_link(dev); // it is under mux 
+                       if( dev->bus->dev->path.type == DEVICE_PATH_I2C) smbus_set_link(dev); // it is under mux

                        adm1026_enable_monitoring(dev);
                }
                        adm1026_enable_monitoring(dev);
                }

-               
+

        }
 
 }
        }
 
 }


@@ -65,5 +65,5 @@ static void enable_dev(struct device *dev)
 
 struct chip_operations drivers_i2c_adm1026_ops = {
        CHIP_NAME("adm1026")
 
 struct chip_operations drivers_i2c_adm1026_ops = {
        CHIP_NAME("adm1026")

-       .enable_dev = enable_dev, 
+       .enable_dev = enable_dev,

 };
 };

diff --git a/src/drivers/i2c/adm1027/adm1027.c b/src/drivers/i2c/adm1027/adm1027.c
index 8329f084140a68b8cb77256d5a651caa4a104086..bca2c0dbc835d67756d8af0576305f437ea28870 100644 (file)
--- a/src/drivers/i2c/adm1027/adm1027.c
+++ b/src/drivers/i2c/adm1027/adm1027.c
@@ -44,7 +44,7 @@ static void adm1027_init(device_t dev)
        if (dev->enabled && dev->path.type == DEVICE_PATH_I2C) {
                if (ops_smbus_bus(get_pbus_smbus(dev))) {
                        if (dev->bus->dev->path.type == DEVICE_PATH_I2C)
        if (dev->enabled && dev->path.type == DEVICE_PATH_I2C) {
                if (ops_smbus_bus(get_pbus_smbus(dev))) {
                        if (dev->bus->dev->path.type == DEVICE_PATH_I2C)

-                               smbus_set_link(dev);    // it is under mux 
+                               smbus_set_link(dev);    // it is under mux

                        adm1027_enable_monitoring(dev);
                }
 
                        adm1027_enable_monitoring(dev);
                }
 

diff --git a/src/drivers/i2c/i2cmux/i2cmux.c b/src/drivers/i2c/i2cmux/i2cmux.c
index 512b19f48aeba726f89254f126167df0a62f740f..cd68a01ebfd1db036bcdd3ea00cacb2ad45b5986 100644 (file)
--- a/src/drivers/i2c/i2cmux/i2cmux.c
+++ b/src/drivers/i2c/i2cmux/i2cmux.c
@@ -15,7 +15,7 @@ static void i2cmux_set_link(device_t dev, unsigned int link)
                        smbus_write_byte(dev, 0x01, 1<<link); // output value
                        smbus_write_byte(dev, 0x03, 0); // all output
                }
                        smbus_write_byte(dev, 0x01, 1<<link); // output value
                        smbus_write_byte(dev, 0x03, 0); // all output
                }

-               
+

        }
 
 }
        }
 
 }


@@ -40,5 +40,5 @@ static void enable_dev(struct device *dev)
 
 struct chip_operations drivers_i2c_i2cmux_ops = {
        CHIP_NAME("i2cmux")
 
 struct chip_operations drivers_i2c_i2cmux_ops = {
        CHIP_NAME("i2cmux")

-       .enable_dev = enable_dev, 
+       .enable_dev = enable_dev,

 };
 };

diff --git a/src/drivers/i2c/i2cmux2/i2cmux2.c b/src/drivers/i2c/i2cmux2/i2cmux2.c
index 30656eafcaa7828ebe0b6cf392c8fcdb26d58946..4d2eeb99e62e57a20cf4d903d7473e568e6f59ff 100644 (file)
--- a/src/drivers/i2c/i2cmux2/i2cmux2.c
+++ b/src/drivers/i2c/i2cmux2/i2cmux2.c
@@ -14,7 +14,7 @@ static void i2cmux2_set_link(device_t dev, unsigned int link)
                if(ops_smbus_bus(get_pbus_smbus(dev))) {
                        smbus_send_byte(dev, link); // output value
                }
                if(ops_smbus_bus(get_pbus_smbus(dev))) {
                        smbus_send_byte(dev, link); // output value
                }

-               
+

        }
 
 }
        }
 
 }


@@ -39,5 +39,5 @@ static void enable_dev(struct device *dev)
 
 struct chip_operations drivers_i2c_i2cmux2_ops = {
        CHIP_NAME("i2cmux2")
 
 struct chip_operations drivers_i2c_i2cmux2_ops = {
        CHIP_NAME("i2cmux2")

-       .enable_dev = enable_dev, 
+       .enable_dev = enable_dev,

 };
 };

diff --git a/src/drivers/i2c/lm63/lm63.c b/src/drivers/i2c/lm63/lm63.c
index e67409d01bc46e83492e5b70c09257c9d3fd1739..05302a68da712628b81406aab0c2c331e67752e5 100644 (file)
--- a/src/drivers/i2c/lm63/lm63.c
+++ b/src/drivers/i2c/lm63/lm63.c
@@ -14,13 +14,13 @@ static void lm63_init(device_t dev)
        if (dev->enabled && dev->path.type == DEVICE_PATH_I2C)
        {
                if(ops_smbus_bus(get_pbus_smbus(dev))) {
        if (dev->enabled && dev->path.type == DEVICE_PATH_I2C)
        {
                if(ops_smbus_bus(get_pbus_smbus(dev))) {

-                       if( dev->bus->dev->path.type == DEVICE_PATH_I2C) smbus_set_link(dev); // it is under mux 
+                       if( dev->bus->dev->path.type == DEVICE_PATH_I2C) smbus_set_link(dev); // it is under mux

                        result = smbus_read_byte(dev, 0x03);
 //                     result &= ~0x04;
                        result |= 0x04;
                        smbus_write_byte(dev, 0x03, result & 0xff); // config lm63
                }
                        result = smbus_read_byte(dev, 0x03);
 //                     result &= ~0x04;
                        result |= 0x04;
                        smbus_write_byte(dev, 0x03, result & 0xff); // config lm63
                }

-               
+

        }
 
 }
        }
 
 }


@@ -42,5 +42,5 @@ static void enable_dev(struct device *dev)
 
 struct chip_operations drivers_i2c_lm63_ops = {
        CHIP_NAME("National Semiconductor LM63")
 
 struct chip_operations drivers_i2c_lm63_ops = {
        CHIP_NAME("National Semiconductor LM63")

-       .enable_dev = enable_dev, 
+       .enable_dev = enable_dev,

 };
 };

diff --git a/src/drivers/si/3114/si_sata.c b/src/drivers/si/3114/si_sata.c
index 8d06fb6fbca0658ac559ec532f9d43d361115f1a..6661c2046d0eb58b3bb394eaeca0ad27eaa17ed5 100644 (file)
--- a/src/drivers/si/3114/si_sata.c
+++ b/src/drivers/si/3114/si_sata.c
@@ -29,10 +29,10 @@ static void si_sata_init(struct device *dev)
 
        /* some driver change class code to 0x104, but not change deviceid without reason*/
         /* restore it so we don't need to unplug AC power to restore it*/
 
        /* some driver change class code to 0x104, but not change deviceid without reason*/
         /* restore it so we don't need to unplug AC power to restore it*/

-       
+

        word = pci_read_config16(dev, 0x0a);
        if(word!=0x0180) {
        word = pci_read_config16(dev, 0x0a);
        if(word!=0x0180) {

-                /* enble change device id and class id*/       
+                /* enble change device id and class id*/

                dword = pci_read_config32(dev,0x40);
                dword |= (1<<0);
                pci_write_config32(dev, 0x40, dword);
                dword = pci_read_config32(dev,0x40);
                dword |= (1<<0);
                pci_write_config32(dev, 0x40, dword);


@@ -49,7 +49,7 @@ static void si_sata_init(struct device *dev)
 
        }
 
 
        }
 

-       
+

 }
 static struct device_operations si_sata_ops  = {
        .read_resources   = pci_dev_read_resources,
 }
 static struct device_operations si_sata_ops  = {
        .read_resources   = pci_dev_read_resources,


@@ -64,4 +64,4 @@ static const struct pci_driver si_sata_driver __pci_driver = {
         .vendor = 0x1095,
         .device = 0x3114,
 };
         .vendor = 0x1095,
         .device = 0x3114,
 };

- 
+

diff --git a/src/drivers/trident/blade3d/blade3d.c b/src/drivers/trident/blade3d/blade3d.c
index e50d40514b79632f8bb2f9c6bc2fd39a7218664f..1d79766b9cb075cae775f19d2ed68e7350c09e60 100644 (file)
--- a/src/drivers/trident/blade3d/blade3d.c
+++ b/src/drivers/trident/blade3d/blade3d.c
@@ -65,7 +65,7 @@ typedef struct Reg_struct {
        BYTE rMask;
 } Def_Reg_struct;
 
        BYTE rMask;
 } Def_Reg_struct;
 

-typedef Def_Reg_struct* lpDef_Reg_struct; 
+typedef Def_Reg_struct* lpDef_Reg_struct;

 // , *pDef_Reg_struct, far * lpDef_Reg_struct;
 
 static Def_Reg_struct Mode3_temp[] = { //mode3 temp
 // , *pDef_Reg_struct, far * lpDef_Reg_struct;
 
 static Def_Reg_struct Mode3_temp[] = { //mode3 temp


@@ -209,7 +209,7 @@ static Def_Reg_struct Init_reg[] = {
        {Port_GRX, 0x33, 0x20, 0x00},
        {Port_GRX, 0x30, 0x00, 0x00},
        //
        {Port_GRX, 0x33, 0x20, 0x00},
        {Port_GRX, 0x30, 0x00, 0x00},
        //

-       {Port_GRX, 0x28, 0x18, 0x00}, 
+       {Port_GRX, 0x28, 0x18, 0x00},

 
        {Port_CRX, 0x0F, 0x20, 0x40},
        {Port_CRX, 0x1F, 0x00, 0x00},
 
        {Port_CRX, 0x0F, 0x20, 0x40},
        {Port_CRX, 0x1F, 0x00, 0x00},


@@ -806,7 +806,7 @@ static void config_OEM_regs(void)
        lpInit_reg = &Init_reg[0];
 
        printk(BIOS_DEBUG, "blade3d: config_OEM_regs()\n");
        lpInit_reg = &Init_reg[0];
 
        printk(BIOS_DEBUG, "blade3d: config_OEM_regs()\n");

-       
+

        outp(Port_GRX, 0x24);
        outp(Port_GRX + 1, 0xe0);
        //MCLK VCLK to 16 bit
        outp(Port_GRX, 0x24);
        outp(Port_GRX + 1, 0xe0);
        //MCLK VCLK to 16 bit


@@ -1025,4 +1025,4 @@ static const struct pci_driver trident_blade3d_driver __pci_driver = {
         .vendor = 0x1023,
         .device = 0x9880,
 };
         .vendor = 0x1023,
         .device = 0x9880,
 };

- 
+

diff --git a/src/include/boot/coreboot_tables.h b/src/include/boot/coreboot_tables.h
index cec394e474d27b41a562607f7362a42452033506..19d2881f43641dd09d83c1bc7122f75f26a609f3 100644 (file)
--- a/src/include/boot/coreboot_tables.h
+++ b/src/include/boot/coreboot_tables.h
@@ -33,7 +33,7 @@
 
 /* Since coreboot is usually compiled 32bit, gcc will align 64bit
  * types to 32bit boundaries. If the coreboot table is dumped on a
 
 /* Since coreboot is usually compiled 32bit, gcc will align 64bit
  * types to 32bit boundaries. If the coreboot table is dumped on a

- * 64bit system, a uint64_t would be aligned to 64bit boundaries, 
+ * 64bit system, a uint64_t would be aligned to 64bit boundaries,

  * breaking the table format.
  *
  * lb_uint64 will keep 64bit coreboot table values aligned to 32bit
  * breaking the table format.
  *
  * lb_uint64 will keep 64bit coreboot table values aligned to 32bit


@@ -216,7 +216,7 @@ struct cmos_entries {
        uint32_t config;             /* e=enumeration, h=hex, r=reserved */
        uint32_t config_id;          /* a number linking to an enumeration record */
 #define CMOS_MAX_NAME_LENGTH 32
        uint32_t config;             /* e=enumeration, h=hex, r=reserved */
        uint32_t config_id;          /* a number linking to an enumeration record */
 #define CMOS_MAX_NAME_LENGTH 32

-       uint8_t name[CMOS_MAX_NAME_LENGTH]; /* name of entry in ascii, 
+       uint8_t name[CMOS_MAX_NAME_LENGTH]; /* name of entry in ascii,

                                               variable length int aligned */
 };
 
                                               variable length int aligned */
 };
 


@@ -232,7 +232,7 @@ struct cmos_enums {
        uint32_t config_id;          /* a number identifying the config id */
        uint32_t value;              /* the value associated with the text */
 #define CMOS_MAX_TEXT_LENGTH 32
        uint32_t config_id;          /* a number identifying the config id */
        uint32_t value;              /* the value associated with the text */
 #define CMOS_MAX_TEXT_LENGTH 32

-       uint8_t text[CMOS_MAX_TEXT_LENGTH]; /* enum description in ascii, 
+       uint8_t text[CMOS_MAX_TEXT_LENGTH]; /* enum description in ascii,

                                                variable length int aligned */
 };
 
                                                variable length int aligned */
 };
 

diff --git a/src/include/boot/elf_boot.h b/src/include/boot/elf_boot.h
index ee6750d293309a833e45f9cc6000a578d964e741..b119babc009f1f122e06b6994cc90ad6bb53be25 100644 (file)
--- a/src/include/boot/elf_boot.h
+++ b/src/include/boot/elf_boot.h
@@ -1,5 +1,5 @@
-#ifndef ELF_BOOT_H 
-#define ELF_BOOT_H 
+#ifndef ELF_BOOT_H
+#define ELF_BOOT_H

 
 #include <stdint.h>
 
 
 #include <stdint.h>
 


@@ -32,7 +32,7 @@ typedef struct
        Elf_Half b_records;
 } Elf_Bhdr;
 
        Elf_Half b_records;
 } Elf_Bhdr;
 

-typedef struct 
+typedef struct

 {
        Elf_Word n_namesz;              /* Length of the note's name.  */
        Elf_Word n_descsz;              /* Length of the note's descriptor.  */
 {
        Elf_Word n_namesz;              /* Length of the note's name.  */
        Elf_Word n_descsz;              /* Length of the note's descriptor.  */

diff --git a/src/include/cbfs.h b/src/include/cbfs.h
index 6eb706284c721e2f904d7dc8ddc8d6113b319969..c17d13f64f03a39ca14d21857dade788fa609121 100644 (file)
--- a/src/include/cbfs.h
+++ b/src/include/cbfs.h
@@ -84,7 +84,7 @@
 
 struct cbfs_header {
        u32 magic;
 
 struct cbfs_header {
        u32 magic;

-        u32 version; 
+        u32 version;

         u32 romsize;
         u32 bootblocksize;
        u32 align;
         u32 romsize;
         u32 bootblocksize;
        u32 align;

diff --git a/src/include/console/btext.h b/src/include/console/btext.h
index 88d93931b9dbb7f46a10ce2b9451e15521ca0ba6..1d2e37e1fc4458efda9c09ecfd1e8409e9e2fe1e 100644 (file)
--- a/src/include/console/btext.h
+++ b/src/include/console/btext.h
@@ -3,7 +3,7 @@
  * (for MacOS) when it is used to boot Linux.
  *
  * Written by Benjamin Herrenschmidt.
  * (for MacOS) when it is used to boot Linux.
  *
  * Written by Benjamin Herrenschmidt.

- *  
+ *

  * Move to coreboot by LYH  yhlu@tyan.com
  *
  */
  * Move to coreboot by LYH  yhlu@tyan.com
  *
  */

diff --git a/src/include/console/console.h b/src/include/console/console.h
index be919882919a3fbc53d5c8a19dc169a8c6a9a484..36661c25c7ffd670aa95b5f24573f830d2e5bcd9 100644 (file)
--- a/src/include/console/console.h
+++ b/src/include/console/console.h
@@ -30,7 +30,7 @@ extern struct console_driver econsole_drivers[];
 extern int console_loglevel;
 #else
 /* __PRE_RAM__ */
 extern int console_loglevel;
 #else
 /* __PRE_RAM__ */

-/* Using a global varible can cause problems when we reset the stack 
+/* Using a global varible can cause problems when we reset the stack

  * from cache as ram to ram. If we make this a define USE_SHARED_STACK
  * we could use the same code on all architectures.
  */
  * from cache as ram to ram. If we make this a define USE_SHARED_STACK
  * we could use the same code on all architectures.
  */

diff --git a/src/include/console/vtxprintf.h b/src/include/console/vtxprintf.h
index f7d58bbd6a7660d554508938df98952524e31de6..2cf44de7ea2d03176467676de308d687500a3013 100644 (file)
--- a/src/include/console/vtxprintf.h
+++ b/src/include/console/vtxprintf.h
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
 /*
  * This file is part of the coreboot project.

- * 
+ *

  * Copyright (C) 2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or modify
  * Copyright (C) 2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or modify

diff --git a/src/include/cpu/amd/amdk8_sysconf.h b/src/include/cpu/amd/amdk8_sysconf.h
index 28158a6c3809484057fff5936ffa4876dde5168c..3ae35fd17d0213448e45a260baf9bf904e474f4c 100644 (file)
--- a/src/include/cpu/amd/amdk8_sysconf.h
+++ b/src/include/cpu/amd/amdk8_sysconf.h
@@ -20,7 +20,7 @@ struct amdk8_sysconf_t {
        int apicid_offset;
 
        void *mb; // pointer for mb releated struct
        int apicid_offset;
 
        void *mb; // pointer for mb releated struct

-       
+

 };
 
 extern struct amdk8_sysconf_t sysconf;
 };
 
 extern struct amdk8_sysconf_t sysconf;

diff --git a/src/include/cpu/amd/gx2def.h b/src/include/cpu/amd/gx2def.h
index ec99b953956b646e7c8ed191a3a053c19e62ee60..681b90cca010f8c7b13d62b830a90442c2097a87 100644 (file)
--- a/src/include/cpu/amd/gx2def.h
+++ b/src/include/cpu/amd/gx2def.h
@@ -284,20 +284,20 @@
 #define                SMM_INST_EN_SET                                 (1<<3)
 #define                INTL_SMI_EN_SET                                 (1<<4)
 #define                EXTL_SMI_EN_SET                                 (1<<5)
 #define                SMM_INST_EN_SET                                 (1<<3)
 #define                INTL_SMI_EN_SET                                 (1<<4)
 #define                EXTL_SMI_EN_SET                                 (1<<5)

-       
+

 #define        CPU_FPU_MSR_MODE                                        0x1A00
 #define                FPU_IE_SET                                              (1<<0)
 #define        CPU_FPU_MSR_MODE                                        0x1A00
 #define                FPU_IE_SET                                              (1<<0)

-       
+

 #define        CPU_FP_UROM_BIST                                        0x1A03
 #define        CPU_FP_UROM_BIST                                        0x1A03

-       
+

 #define        CPU_BC_CONF_0                                           0x1900
 #define                TSC_SUSP_SET                             (1<<5)
 #define                SUSP_EN_SET                              (1<<12)
 #define        CPU_BC_CONF_0                                           0x1900
 #define                TSC_SUSP_SET                             (1<<5)
 #define                SUSP_EN_SET                              (1<<12)

-       
+

        /**/
        /*      VG GLIU0 port4*/
        /**/
        /**/
        /*      VG GLIU0 port4*/
        /**/

-       
+

 #define        VG_GLD_MSR_CAP                          (MSR_VG + 0x2000)
 #define        VG_GLD_MSR_CONFIG                       (MSR_VG + 0x2001)
 #define        VG_GLD_MSR_PM                           (MSR_VG + 0x2004)
 #define        VG_GLD_MSR_CAP                          (MSR_VG + 0x2000)
 #define        VG_GLD_MSR_CONFIG                       (MSR_VG + 0x2001)
 #define        VG_GLD_MSR_PM                           (MSR_VG + 0x2004)


@@ -332,7 +332,7 @@
 #define                RSTPLL_UPPER_MDIV_SHIFT                         9
 #define                RSTPLL_UPPER_VDIV_SHIFT                         6
 #define                RSTPLL_UPPER_FBDIV_SHIFT                        0
 #define                RSTPLL_UPPER_MDIV_SHIFT                         9
 #define                RSTPLL_UPPER_VDIV_SHIFT                         6
 #define                RSTPLL_UPPER_FBDIV_SHIFT                        0

-       
+

 #define                RSTPLL_LOWER_SWFLAGS_SHIFT                      26
 #define                RSTPLL_LOWER_SWFLAGS_MASK                       (0x3F<<RSTPLL_LOWER_SWFLAGS_SHIFT)
 
 #define                RSTPLL_LOWER_SWFLAGS_SHIFT                      26
 #define                RSTPLL_LOWER_SWFLAGS_MASK                       (0x3F<<RSTPLL_LOWER_SWFLAGS_SHIFT)
 

diff --git a/src/include/cpu/amd/lxdef.h b/src/include/cpu/amd/lxdef.h
index 161092248cd0af9f7284d153018a5e9a4784689b..d312c0e6da462994a5cbc9028182b690438142b1 100644 (file)
--- a/src/include/cpu/amd/lxdef.h
+++ b/src/include/cpu/amd/lxdef.h
@@ -285,11 +285,11 @@
 #define        CPU_L2TB_ENTRY                                          0x189E
 #define        CPU_L2TB_ENTRY_I                                        0x189F
 #define        CPU_DM_BIST                                                     0x18C0
 #define        CPU_L2TB_ENTRY                                          0x189E
 #define        CPU_L2TB_ENTRY_I                                        0x189F
 #define        CPU_DM_BIST                                                     0x18C0

-       
+

 #define        CPU_BC_CONF_0                                           0x1900
 #define                TSC_SUSP_SET                             (1<<5)
 #define                SUSP_EN_SET                              (1<<12)
 #define        CPU_BC_CONF_0                                           0x1900
 #define                TSC_SUSP_SET                             (1<<5)
 #define                SUSP_EN_SET                              (1<<12)

-       
+

 #define CPU_BC_CONF_1                                          0x1901
 #define CPU_BC_MSR_LOCK                                                0x1908
 #define CPU_BC_L2_CONF                                         0x1920
 #define CPU_BC_CONF_1                                          0x1901
 #define CPU_BC_MSR_LOCK                                                0x1908
 #define CPU_BC_L2_CONF                                         0x1920


@@ -342,11 +342,11 @@
 #define CPU_CPUID12                                                    0x3012
 #define CPU_CPUID13                                                    0x3013
 
 #define CPU_CPUID12                                                    0x3012
 #define CPU_CPUID13                                                    0x3013
 

-       
+

 
 
        /*      VG GLIU0 port4*/
 
 
        /*      VG GLIU0 port4*/

-       
+

 
 #define        VG_GLD_MSR_CAP                          (MSR_VG + 0x2000)
 #define        VG_GLD_MSR_CONFIG                       (MSR_VG + 0x2001)
 
 #define        VG_GLD_MSR_CAP                          (MSR_VG + 0x2000)
 #define        VG_GLD_MSR_CONFIG                       (MSR_VG + 0x2001)

diff --git a/src/include/cpu/amd/sc520.h b/src/include/cpu/amd/sc520.h
index b0fa5680b7407423fae39e8cd0576a864671f7f8..c79e99efac275b6ecf492214ddf36d28871aa92e 100644 (file)
--- a/src/include/cpu/amd/sc520.h
+++ b/src/include/cpu/amd/sc520.h
@@ -2,8 +2,8 @@
 /* default location of the MMCR */
 #define MMCR 0xfffef000
 
 /* default location of the MMCR */
 #define MMCR 0xfffef000
 

-/* the PAR register struct definition, the location in memory, 
-  * and a handy pointer for you to use 
+/* the PAR register struct definition, the location in memory,
+  * and a handy pointer for you to use

   */
 
 struct parreg {
   */
 
 struct parreg {


@@ -25,7 +25,7 @@ struct parreg {
 /* here is the real mmcr struct */
 
 struct memregs {
 /* here is the real mmcr struct */
 
 struct memregs {

-       /* make these shorts, we are lsb and the hardware seems to like it 
+       /* make these shorts, we are lsb and the hardware seems to like it

         * better
         */
        unsigned short drcctl;
         * better
         */
        unsigned short drcctl;


@@ -46,7 +46,7 @@ struct dbctl {
        unsigned char dbctl;
        unsigned char pad4[15];
 };
        unsigned char dbctl;
        unsigned char pad4[15];
 };

-       
+

 struct romregs {
        unsigned char bootcs;
        unsigned char pad5[3];
 struct romregs {
        unsigned char bootcs;
        unsigned char pad5[3];


@@ -55,7 +55,7 @@ struct romregs {
        unsigned char romcs2;
        unsigned char pad7[6];
 };
        unsigned char romcs2;
        unsigned char pad7[6];
 };

-       
+

 
 struct hostbridge {
        unsigned short ctl;
 
 struct hostbridge {
        unsigned short ctl;


@@ -169,7 +169,7 @@ struct ssi {
        unsigned char pad[0x2b];
 };
 
        unsigned char pad[0x2b];
 };
 

-       
+

 /* interrupt control registers */
 /* defined this way for portability. Shame we can't just use plan 9 c. */
 struct pic {
 /* interrupt control registers */
 /* defined this way for portability. Shame we can't just use plan 9 c. */
 struct pic {


@@ -225,7 +225,7 @@ struct pic {
        unsigned char gp9imap;
        unsigned char gp10imap;
        unsigned char padend[0x14];
        unsigned char gp9imap;
        unsigned char gp10imap;
        unsigned char padend[0x14];

-}; 
+};

 
 struct reset {
        unsigned char sysinfo;
 
 struct reset {
        unsigned char sysinfo;


@@ -282,7 +282,7 @@ struct dmacontrol {
 };
 
 
 };
 
 

-       
+

 
 struct mmcr {
        unsigned short revid;
 
 struct mmcr {
        unsigned short revid;

diff --git a/src/include/cpu/amd/vr.h b/src/include/cpu/amd/vr.h
index e98ac86409ad237a91d9d278c305014700c61264..805b977cd780794e1cd738079683e18430d5efac 100644 (file)
--- a/src/include/cpu/amd/vr.h
+++ b/src/include/cpu/amd/vr.h
@@ -7,7 +7,7 @@
 #ifndef CPU_AMD_VR_H
 #define CPU_AMD_VR_H
 
 #ifndef CPU_AMD_VR_H
 #define CPU_AMD_VR_H
 

-#define VRC_INDEX                              0xAC1C  // Index register 
+#define VRC_INDEX                              0xAC1C  // Index register

 #define VRC_DATA                               0xAC1E  // Data register
 #define VR_UNLOCK                              0xFC53  // Virtual register unlock code
 #define NO_VR                                  -1              // No virtual registers
 #define VRC_DATA                               0xAC1E  // Data register
 #define VR_UNLOCK                              0xFC53  // Virtual register unlock code
 #define NO_VR                                  -1              // No virtual registers


@@ -24,7 +24,7 @@
        #define GET_ERROR        0x05
        #define SET_VSM_TYPE     0x06
        #define SIGNATURE                       0x03
        #define GET_ERROR        0x05
        #define SET_VSM_TYPE     0x06
        #define SIGNATURE                       0x03

-       #define VSA2_SIGNATURE  0x56534132      // 'VSA2' returned in EAX 
+       #define VSA2_SIGNATURE  0x56534132      // 'VSA2' returned in EAX

 
     #define GET_HW_INFO                        0x04
     #define VSM_VERSION                        0x05
 
     #define GET_HW_INFO                        0x04
     #define VSM_VERSION                        0x05


@@ -32,7 +32,7 @@
     #define MSR_ACCESS          0x07
     #define GET_DESCR_INFO             0x08
     #define PCI_INT_AB                 0x09    // GPIO pins for INTA# and INTB#
     #define MSR_ACCESS          0x07
     #define GET_DESCR_INFO             0x08
     #define PCI_INT_AB                 0x09    // GPIO pins for INTA# and INTB#

-    #define PCI_INT_CD                 0x0A    // GPIO pins for INTC# and INTD#        
+    #define PCI_INT_CD                 0x0A    // GPIO pins for INTC# and INTD#

     #define WATCHDOG                   0x0B    // Watchdog timer
 
     #define MAX_MISC                   WATCHDOG
     #define WATCHDOG                   0x0B    // Watchdog timer
 
     #define MAX_MISC                   WATCHDOG


@@ -48,7 +48,7 @@
        #define CODEC_TYPE              0x05
        #define STATE_INDEX             0x06
        #define STATE_DATA              0x07
        #define CODEC_TYPE              0x05
        #define STATE_INDEX             0x06
        #define STATE_DATA              0x07

-       #define AUDIO_IRQ               0x08    // For use by native audio drivers 
+       #define AUDIO_IRQ               0x08    // For use by native audio drivers

        #define STATUS_PTR                      0x09    // For use by native audio drivers
        #define MAX_AUDIO           STATUS_PTR
 
        #define STATUS_PTR                      0x09    // For use by native audio drivers
        #define MAX_AUDIO           STATUS_PTR
 


@@ -86,7 +86,7 @@
                        #define VG_CFG_DPMS_V           0x0080  // VSYNC mask bit
                #define VG_VESA_SV_RST          0x0020  // VESA Save/Restore state flag
                        #define VG_VESA_RST                     0x0000  // VESA Restore state
                        #define VG_CFG_DPMS_V           0x0080  // VSYNC mask bit
                #define VG_VESA_SV_RST          0x0020  // VESA Save/Restore state flag
                        #define VG_VESA_RST                     0x0000  // VESA Restore state

-                       #define VG_VESA_SV                      0x0020  // VESA Save state 
+                       #define VG_VESA_SV                      0x0020  // VESA Save state

                #define VG_FRSH_MODE            0x0002  // Mode refresh flag
                #define VG_FRSH_TIMINGS         0x0001  // Timings only refresh flag
 
                #define VG_FRSH_MODE            0x0002  // Mode refresh flag
                #define VG_FRSH_TIMINGS         0x0001  // Timings only refresh flag
 


@@ -183,7 +183,7 @@
                        #define VG_TV_PAL                       0x0010  // PAL output format
                        #define VG_TV_HDTV                      0x0020  // HDTV output format
 
                        #define VG_TV_PAL                       0x0010  // PAL output format
                        #define VG_TV_HDTV                      0x0020  // HDTV output format
 

-               // The meaning of the VG_TV_RES field is dependent on the selected  
+               // The meaning of the VG_TV_RES field is dependent on the selected

                // encoder and output format.  The translations are:
                //              ADV7171 - Not Used
                //              SAA7127 - Not Used
                // encoder and output format.  The translations are:
                //              ADV7171 - Not Used
                //              SAA7127 - Not Used


@@ -191,7 +191,7 @@
                //                      LO  -> 720x480p
                //                      MED -> 1280x720p
                //                      HI  -> 1920x1080i
                //                      LO  -> 720x480p
                //                      MED -> 1280x720p
                //                      HI  -> 1920x1080i

-               //              FS454   - Both SD and HD resolutions    
+               //              FS454   - Both SD and HD resolutions

                //                      SD Resolutions - NTSC and PAL
                //                              LO  -> 640x480
                //                              MED -> 800x600
                //                      SD Resolutions - NTSC and PAL
                //                              LO  -> 640x480
                //                              MED -> 800x600


@@ -331,8 +331,8 @@
        #define RW_PIRQ                         0x06    // read/write PCI IRQ router regs in SB Func0 cfg space
        #define SLPB_CLEAR                      0x07    // clear sleep button GPIO status's
        #define PIRQ_ROUTING            0x08    // read the PCI IRQ routing based on BIOS setup
        #define RW_PIRQ                         0x06    // read/write PCI IRQ router regs in SB Func0 cfg space
        #define SLPB_CLEAR                      0x07    // clear sleep button GPIO status's
        #define PIRQ_ROUTING            0x08    // read the PCI IRQ routing based on BIOS setup

-       #define ACPI_UNUSED2            0x09    
-       #define ACPI_UNUSED3            0x0A    
+       #define ACPI_UNUSED2            0x09
+       #define ACPI_UNUSED3            0x0A

        #define PIC_INTERRUPT           0x0B
        #define ACPI_PRESENT            0x0C
        #define ACPI_GEN_COMMAND        0x0D
        #define PIC_INTERRUPT           0x0B
        #define ACPI_PRESENT            0x0C
        #define ACPI_GEN_COMMAND        0x0D


@@ -380,7 +380,7 @@
 
 #define VRC_DEBUGGER                   0x0E
        #define MAX_DEBUGGER        NO_VR
 
 #define VRC_DEBUGGER                   0x0E
        #define MAX_DEBUGGER        NO_VR

-                                                  
+

 
 #define        VRC_STR                                 0x0F            // Virtual Register class
        #define RESTORE_ADDR            0x00            // Physical address of MSR restore table
 
 #define        VRC_STR                                 0x0F            // Virtual Register class
        #define RESTORE_ADDR            0x00            // Physical address of MSR restore table


@@ -404,7 +404,7 @@
 
 #define        VRC_SYSINFO                             0x12            // Virtual Register class
        #define VRC_SI_VERSION                          0x00            // Sysinfo VSM version
 
 #define        VRC_SYSINFO                             0x12            // Virtual Register class
        #define VRC_SI_VERSION                          0x00            // Sysinfo VSM version

-       #define VRC_SI_CPU_MHZ                          0x01    // CPU speed in MHZ 
+       #define VRC_SI_CPU_MHZ                          0x01    // CPU speed in MHZ

        #define VRC_SI_CHIPSET_BASE_LOW         0x02
        #define VRC_SI_CHIPSET_BASE_HI          0x03
        #define VRC_SI_CHIPSET_ID                       0x04
        #define VRC_SI_CHIPSET_BASE_LOW         0x02
        #define VRC_SI_CHIPSET_BASE_HI          0x03
        #define VRC_SI_CHIPSET_ID                       0x04

diff --git a/src/include/cpu/x86/cache.h b/src/include/cpu/x86/cache.h
index be27f1d9eac60965f0b4ca4d25bd6d781e73ed52..f3ac2ed11f5da35e24fa5d9de712793937e943b1 100644 (file)
--- a/src/include/cpu/x86/cache.h
+++ b/src/include/cpu/x86/cache.h
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
 /*
  * This file is part of the coreboot project.

- * 
+ *

  * Copyright (C) 2004 Eric W. Biederman
  *
  * This program is free software; you can redistribute it and/or modify
  * Copyright (C) 2004 Eric W. Biederman
  *
  * This program is free software; you can redistribute it and/or modify

diff --git a/src/include/cpu/x86/msr.h b/src/include/cpu/x86/msr.h
index cbbd5cfd855a7a338365f13d69020eaacacc532e..daa7e184224fca2e03e51d74615fc154c2328945 100644 (file)
--- a/src/include/cpu/x86/msr.h
+++ b/src/include/cpu/x86/msr.h
@@ -17,7 +17,7 @@ static void wrmsr(unsigned long index, msr_t msr)
 
 #else
 
 
 #else
 

-typedef struct msr_struct 
+typedef struct msr_struct

 {
        unsigned lo;
        unsigned hi;
 {
        unsigned lo;
        unsigned hi;

diff --git a/src/include/cpu/x86/pae.h b/src/include/cpu/x86/pae.h
index c1eb022886ab5ba2085bc8e25b3358216a17abd6..eb8fa5a91cb840a6711c269ef30073b50480d43e 100644 (file)
--- a/src/include/cpu/x86/pae.h
+++ b/src/include/cpu/x86/pae.h
@@ -1,5 +1,5 @@
 #ifndef CPU_X86_PAE_H
 #ifndef CPU_X86_PAE_H

-#define CPU_X86_PAE_H 
+#define CPU_X86_PAE_H

 
 #define MAPPING_ERROR ((void *)0xffffffffUL)
 void *map_2M_page(unsigned long page);
 
 #define MAPPING_ERROR ((void *)0xffffffffUL)
 void *map_2M_page(unsigned long page);

diff --git a/src/include/cpu/x86/smm.h b/src/include/cpu/x86/smm.h
index 2954ecd1f7242ccdac0815a3d4e5ee4033bf779f..155f666b3c8e6f1ee5d322e150007d35b238e2ed 100644 (file)
--- a/src/include/cpu/x86/smm.h
+++ b/src/include/cpu/x86/smm.h
@@ -17,7 +17,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 

-/* AMD64 SMM State-Save Area 
+/* AMD64 SMM State-Save Area

  * starts @ 0x7e00
  */
 typedef struct {
  * starts @ 0x7e00
  */
 typedef struct {


@@ -115,7 +115,7 @@ typedef struct {
 } __attribute__((packed)) amd64_smm_state_save_area_t;
 
 
 } __attribute__((packed)) amd64_smm_state_save_area_t;
 
 

-/* Intel Core 2 (EM64T) SMM State-Save Area 
+/* Intel Core 2 (EM64T) SMM State-Save Area

  * starts @ 0x7d00
  */
 typedef struct {
  * starts @ 0x7d00
  */
 typedef struct {


@@ -193,7 +193,7 @@ typedef struct {
 } __attribute__((packed)) em64t_smm_state_save_area_t;
 
 
 } __attribute__((packed)) em64t_smm_state_save_area_t;
 
 

-/* Legacy x86 SMM State-Save Area 
+/* Legacy x86 SMM State-Save Area

  * starts @ 0x7e00
  */
 
  * starts @ 0x7e00
  */
 

diff --git a/src/include/cpu/x86/stack.h b/src/include/cpu/x86/stack.h
index d39764a7d68695d06caa1982bd0d3868e4e3e178..158b670251b5d0d751c779bca0e28c9c9ae59a31 100644 (file)
--- a/src/include/cpu/x86/stack.h
+++ b/src/include/cpu/x86/stack.h
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
 /*
  * This file is part of the coreboot project.

- * 
+ *

  * Copyright (C) 2010 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or modify
  * Copyright (C) 2010 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or modify

diff --git a/src/include/device/agp.h b/src/include/device/agp.h
index 073858ae10d8ed892519e1908d52899302470f75..564b0bb4e6f71427021719b1f296d70310d7ec5e 100644 (file)
--- a/src/include/device/agp.h
+++ b/src/include/device/agp.h
@@ -2,7 +2,7 @@
 #define DEVICE_AGP_H
 /* (c) 2005 Linux Networx GPL see COPYING for details */
 
 #define DEVICE_AGP_H
 /* (c) 2005 Linux Networx GPL see COPYING for details */
 

-unsigned int agp_scan_bus(struct bus *bus, 
+unsigned int agp_scan_bus(struct bus *bus,

        unsigned min_devfn, unsigned max_devfn, unsigned int max);
 unsigned int agp_scan_bridge(device_t dev, unsigned int max);
 
        unsigned min_devfn, unsigned max_devfn, unsigned int max);
 unsigned int agp_scan_bridge(device_t dev, unsigned int max);
 

diff --git a/src/include/device/cardbus.h b/src/include/device/cardbus.h
index 07cc46a54a7ccaa0a3d383ccb00dd24869c77270..5b003d321761738607c09fc8feac095fb7750e09 100644 (file)
--- a/src/include/device/cardbus.h
+++ b/src/include/device/cardbus.h
@@ -3,7 +3,7 @@
 /* (c) 2005 Linux Networx GPL see COPYING for details */
 
 void cardbus_read_resources(device_t dev);
 /* (c) 2005 Linux Networx GPL see COPYING for details */
 
 void cardbus_read_resources(device_t dev);

-unsigned int cardbus_scan_bus(struct bus *bus, 
+unsigned int cardbus_scan_bus(struct bus *bus,

        unsigned min_devfn, unsigned max_devfn, unsigned int max);
 unsigned int cardbus_scan_bridge(device_t dev, unsigned int max);
 void cardbus_enable_resources(device_t dev);
        unsigned min_devfn, unsigned max_devfn, unsigned int max);
 unsigned int cardbus_scan_bridge(device_t dev, unsigned int max);
 void cardbus_enable_resources(device_t dev);

diff --git a/src/include/device/device.h b/src/include/device/device.h
index df8fb5f6d5564e4d06bde07c46a040b2fcdb0a09..59dd0815e6e3f0bdb740728cb20de62118322843 100644 (file)
--- a/src/include/device/device.h
+++ b/src/include/device/device.h
@@ -49,8 +49,8 @@ struct bus {
        unsigned        disable_relaxed_ordering : 1;
 };
 
        unsigned        disable_relaxed_ordering : 1;
 };
 

-#define MAX_RESOURCES 24 
-#define MAX_LINKS    8 
+#define MAX_RESOURCES 24
+#define MAX_LINKS    8

 /*
  * There is one device structure for each slot-number/function-number
  * combination:
 /*
  * There is one device structure for each slot-number/function-number
  * combination:


@@ -78,7 +78,7 @@ struct device {
        unsigned int resources;
 
        /* links are (downstream) buses attached to the device, usually a leaf
        unsigned int resources;
 
        /* links are (downstream) buses attached to the device, usually a leaf

-        * device with no children have 0 buses attached and a bridge has 1 bus 
+        * device with no children have 0 buses attached and a bridge has 1 bus

         */
        struct bus link[MAX_LINKS];
        /* number of buses attached to the device */
         */
        struct bus link[MAX_LINKS];
        /* number of buses attached to the device */


@@ -139,10 +139,10 @@ void show_one_resource(int debug_level, struct device *dev,
                       struct resource *resource, const char *comment);
 void show_all_devs_resources(int debug_level, const char* msg);
 
                       struct resource *resource, const char *comment);
 void show_all_devs_resources(int debug_level, const char* msg);
 

-/* Rounding for boundaries. 
+/* Rounding for boundaries.

  * Due to some chip bugs, go ahead and round IO to 16
  */
  * Due to some chip bugs, go ahead and round IO to 16
  */

-#define DEVICE_IO_ALIGN 16 
+#define DEVICE_IO_ALIGN 16

 #define DEVICE_MEM_ALIGN 4096
 
 extern struct device_operations default_dev_ops_root;
 #define DEVICE_MEM_ALIGN 4096
 
 extern struct device_operations default_dev_ops_root;

diff --git a/src/include/device/hypertransport.h b/src/include/device/hypertransport.h
index 6a350f823279fbe1534cbb62de20b197a1c174c8..e927d617fdc80f8eb80a88000b5b6e66a9e479dc 100644 (file)
--- a/src/include/device/hypertransport.h
+++ b/src/include/device/hypertransport.h
@@ -3,7 +3,7 @@
 
 #include <device/hypertransport_def.h>
 
 
 #include <device/hypertransport_def.h>
 

-unsigned int hypertransport_scan_chain(struct bus *bus, 
+unsigned int hypertransport_scan_chain(struct bus *bus,

        unsigned min_devfn, unsigned max_devfn, unsigned int max, unsigned *ht_unit_base, unsigned offset_unitid);
 unsigned int ht_scan_bridge(struct device *dev, unsigned int max);
 extern struct device_operations default_ht_ops_bus;
        unsigned min_devfn, unsigned max_devfn, unsigned int max, unsigned *ht_unit_base, unsigned offset_unitid);
 unsigned int ht_scan_bridge(struct device *dev, unsigned int max);
 extern struct device_operations default_ht_ops_bus;

diff --git a/src/include/device/hypertransport_def.h b/src/include/device/hypertransport_def.h
index 6c12dcf39f360bae7b1c417b7fd377642d11e760..d6276ba003304d9db0b3706021637ec1ca545393 100644 (file)
--- a/src/include/device/hypertransport_def.h
+++ b/src/include/device/hypertransport_def.h
@@ -11,7 +11,7 @@
 #define HT_FREQ_1200Mhz  7
 #define HT_FREQ_1400Mhz  8
 #define HT_FREQ_1600Mhz  9
 #define HT_FREQ_1200Mhz  7
 #define HT_FREQ_1400Mhz  8
 #define HT_FREQ_1600Mhz  9

-#define HT_FREQ_1800Mhz 10 
+#define HT_FREQ_1800Mhz 10

 #define HT_FREQ_2000Mhz 11
 #define HT_FREQ_2200Mhz 12
 #define HT_FREQ_2400Mhz 13
 #define HT_FREQ_2000Mhz 11
 #define HT_FREQ_2200Mhz 12
 #define HT_FREQ_2400Mhz 13

diff --git a/src/include/device/pci.h b/src/include/device/pci.h
index 54856443931cbeb793bdbef1603ffcf502042f73..131564c8c586f3e37d59f2198e7e7dcdd8394812 100644 (file)
--- a/src/include/device/pci.h
+++ b/src/include/device/pci.h
@@ -61,7 +61,7 @@ void pci_bus_enable_resources(device_t dev);
 void pci_bus_reset(struct bus *bus);
 device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned devfn);
 unsigned int do_pci_scan_bridge(device_t bus, unsigned int max,
 void pci_bus_reset(struct bus *bus);
 device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned devfn);
 unsigned int do_pci_scan_bridge(device_t bus, unsigned int max,

-       unsigned int (*do_scan_bus)(struct bus *bus, 
+       unsigned int (*do_scan_bus)(struct bus *bus,

                unsigned min_devfn, unsigned max_devfn, unsigned int max));
 unsigned int pci_scan_bridge(device_t bus, unsigned int max);
 unsigned int pci_scan_bus(struct bus *bus, unsigned min_devfn, unsigned max_devfn, unsigned int max);
                unsigned min_devfn, unsigned max_devfn, unsigned int max));
 unsigned int pci_scan_bridge(device_t bus, unsigned int max);
 unsigned int pci_scan_bus(struct bus *bus, unsigned min_devfn, unsigned max_devfn, unsigned int max);

diff --git a/src/include/device/pci_def.h b/src/include/device/pci_def.h
index ba972547ea93f9f9f3c92f8a818069af7b62a85d..a5aa3a1c3b0232fd5e785fe4ef7e81e449fb189c 100644 (file)
--- a/src/include/device/pci_def.h
+++ b/src/include/device/pci_def.h
@@ -26,7 +26,7 @@
 #define  PCI_STATUS_FAST_BACK  0x80    /* Accept fast-back to back */
 #define  PCI_STATUS_PARITY     0x100   /* Detected parity error */
 #define  PCI_STATUS_DEVSEL_MASK        0x600   /* DEVSEL timing */
 #define  PCI_STATUS_FAST_BACK  0x80    /* Accept fast-back to back */
 #define  PCI_STATUS_PARITY     0x100   /* Detected parity error */
 #define  PCI_STATUS_DEVSEL_MASK        0x600   /* DEVSEL timing */

-#define  PCI_STATUS_DEVSEL_FAST        0x000   
+#define  PCI_STATUS_DEVSEL_FAST        0x000

 #define  PCI_STATUS_DEVSEL_MEDIUM 0x200
 #define  PCI_STATUS_DEVSEL_SLOW 0x400
 #define  PCI_STATUS_SIG_TARGET_ABORT 0x800 /* Set on target abort */
 #define  PCI_STATUS_DEVSEL_MEDIUM 0x200
 #define  PCI_STATUS_DEVSEL_SLOW 0x400
 #define  PCI_STATUS_SIG_TARGET_ABORT 0x800 /* Set on target abort */


@@ -55,8 +55,8 @@
 
 /*
  * Base addresses specify locations in memory or I/O space.
 
 /*
  * Base addresses specify locations in memory or I/O space.

- * Decoded size can be determined by writing a value of 
- * 0xffffffff to the register, and reading it back.  Only 
+ * Decoded size can be determined by writing a value of
+ * 0xffffffff to the register, and reading it back.  Only

  * 1 bits are decoded.
  */
 #define PCI_BASE_ADDRESS_0     0x10    /* 32 bits */
  * 1 bits are decoded.
  */
 #define PCI_BASE_ADDRESS_0     0x10    /* 32 bits */


@@ -80,7 +80,7 @@
 /* Header type 0 (normal devices) */
 #define PCI_CARDBUS_CIS                0x28
 #define PCI_SUBSYSTEM_VENDOR_ID        0x2c
 /* Header type 0 (normal devices) */
 #define PCI_CARDBUS_CIS                0x28
 #define PCI_SUBSYSTEM_VENDOR_ID        0x2c

-#define PCI_SUBSYSTEM_ID       0x2e  
+#define PCI_SUBSYSTEM_ID       0x2e

 #define PCI_ROM_ADDRESS                0x30    /* Bits 31..11 are address, 10..1 reserved */
 #define  PCI_ROM_ADDRESS_ENABLE        0x01
 #define PCI_ROM_ADDRESS_MASK   (~0x7ffUL)
 #define PCI_ROM_ADDRESS                0x30    /* Bits 31..11 are address, 10..1 reserved */
 #define  PCI_ROM_ADDRESS_ENABLE        0x01
 #define PCI_ROM_ADDRESS_MASK   (~0x7ffUL)


@@ -189,7 +189,7 @@
 
 /* Hypertransport Registers */
 #define PCI_HT_CAP_SIZEOF         4
 
 /* Hypertransport Registers */
 #define PCI_HT_CAP_SIZEOF         4

-#define PCI_HT_CAP_HOST_CTRL       4   /* Host link control */ 
+#define PCI_HT_CAP_HOST_CTRL       4   /* Host link control */

 #define PCI_HT_CAP_HOST_WIDTH     6    /* width value & capability  */
 #define PCI_HT_CAP_HOST_FREQ      0x09 /* Host frequency */
 #define PCI_HT_CAP_HOST_FREQ_CAP   0x0a        /* Host Frequency capability  */
 #define PCI_HT_CAP_HOST_WIDTH     6    /* width value & capability  */
 #define PCI_HT_CAP_HOST_FREQ      0x09 /* Host frequency */
 #define PCI_HT_CAP_HOST_FREQ_CAP   0x0a        /* Host Frequency capability  */

diff --git a/src/include/device/pciexp.h b/src/include/device/pciexp.h
index 9ea662d49052d71c0d4bcd675d57fb34aa0683c9..becc800934132f7fe08a79e29407f378c898f587 100644 (file)
--- a/src/include/device/pciexp.h
+++ b/src/include/device/pciexp.h
@@ -2,7 +2,7 @@
 #define DEVICE_PCIEXP_H
 /* (c) 2005 Linux Networx GPL see COPYING for details */
 
 #define DEVICE_PCIEXP_H
 /* (c) 2005 Linux Networx GPL see COPYING for details */
 

-unsigned int pciexp_scan_bus(struct bus *bus, 
+unsigned int pciexp_scan_bus(struct bus *bus,

        unsigned min_devfn, unsigned max_devfn, unsigned int max);
 unsigned int pciexp_scan_bridge(device_t dev, unsigned int max);
 
        unsigned min_devfn, unsigned max_devfn, unsigned int max);
 unsigned int pciexp_scan_bridge(device_t dev, unsigned int max);
 

diff --git a/src/include/device/pcix.h b/src/include/device/pcix.h
index 8bf193530a0bb892ecea41358518376b1544fde9..e017922ef1cdf4cccec225608bb136bdb4ac2735 100644 (file)
--- a/src/include/device/pcix.h
+++ b/src/include/device/pcix.h
@@ -2,7 +2,7 @@
 #define DEVICE_PCIX_H
 /* (c) 2005 Linux Networx GPL see COPYING for details */
 
 #define DEVICE_PCIX_H
 /* (c) 2005 Linux Networx GPL see COPYING for details */
 

-unsigned int pcix_scan_bus(struct bus *bus, 
+unsigned int pcix_scan_bus(struct bus *bus,

        unsigned min_devfn, unsigned max_devfn, unsigned int max);
 unsigned int pcix_scan_bridge(device_t dev, unsigned int max);
 const char *pcix_speed(unsigned sstatus);
        unsigned min_devfn, unsigned max_devfn, unsigned int max);
 unsigned int pcix_scan_bridge(device_t dev, unsigned int max);
 const char *pcix_speed(unsigned sstatus);

diff --git a/src/include/smp/atomic.h b/src/include/smp/atomic.h
index 09a77e72f196111695039686df5cea9a80f91182..8da08a2250b9724185518aa22cace60628e9ae8f 100644 (file)
--- a/src/include/smp/atomic.h
+++ b/src/include/smp/atomic.h
@@ -11,40 +11,40 @@ typedef struct { int counter; } atomic_t;
 /**
  * atomic_read - read atomic variable
  * @v: pointer of type atomic_t
 /**
  * atomic_read - read atomic variable
  * @v: pointer of type atomic_t

- * 
+ *

  * Atomically reads the value of @v.  Note that the guaranteed
  * useful range of an atomic_t is only 24 bits.
  * Atomically reads the value of @v.  Note that the guaranteed
  * useful range of an atomic_t is only 24 bits.

- */ 
+ */

 #define atomic_read(v)         ((v)->counter)
 
 /**
  * atomic_set - set atomic variable
  * @v: pointer of type atomic_t
  * @i: required value
 #define atomic_read(v)         ((v)->counter)
 
 /**
  * atomic_set - set atomic variable
  * @v: pointer of type atomic_t
  * @i: required value

- * 
+ *

  * Atomically sets the value of @v to @i.  Note that the guaranteed
  * useful range of an atomic_t is only 24 bits.
  * Atomically sets the value of @v to @i.  Note that the guaranteed
  * useful range of an atomic_t is only 24 bits.

- */ 
+ */

 #define atomic_set(v,i)                (((v)->counter) = (i))
 
 
 /**
  * atomic_inc - increment atomic variable
  * @v: pointer of type atomic_t
 #define atomic_set(v,i)                (((v)->counter) = (i))
 
 
 /**
  * atomic_inc - increment atomic variable
  * @v: pointer of type atomic_t

- * 
+ *

  * Atomically increments @v by 1.  Note that the guaranteed
  * useful range of an atomic_t is only 24 bits.
  * Atomically increments @v by 1.  Note that the guaranteed
  * useful range of an atomic_t is only 24 bits.

- */ 
+ */

 #define atomic_inc(v)  (((v)->counter)++)
 
 
 /**
  * atomic_dec - decrement atomic variable
  * @v: pointer of type atomic_t
 #define atomic_inc(v)  (((v)->counter)++)
 
 
 /**
  * atomic_dec - decrement atomic variable
  * @v: pointer of type atomic_t

- * 
+ *

  * Atomically decrements @v by 1.  Note that the guaranteed
  * useful range of an atomic_t is only 24 bits.
  * Atomically decrements @v by 1.  Note that the guaranteed
  * useful range of an atomic_t is only 24 bits.

- */ 
+ */

 #define atomic_dec(v)  (((v)->counter)--)
 
 
 #define atomic_dec(v)  (((v)->counter)--)
 
 

diff --git a/src/include/string.h b/src/include/string.h
index b4edf432ac613bc00fefdc9c35661de20aa225d7..04c3733f8be4fe8e861807cdfd4dbf575a48e1ae 100644 (file)
--- a/src/include/string.h
+++ b/src/include/string.h
@@ -12,10 +12,10 @@ int memcmp(const void *s1, const void *s2, size_t n);
 int sprintf(char * buf, const char *fmt, ...);
 #endif
 
 int sprintf(char * buf, const char *fmt, ...);
 #endif
 

-// simple string functions 
+// simple string functions

 
 

-static inline size_t strnlen(const char *src, size_t max) 
-{ 
+static inline size_t strnlen(const char *src, size_t max)
+{

        size_t i = 0;
        while((*src++) && (i < max)) {
                i++;
        size_t i = 0;
        while((*src++) && (i < max)) {
                i++;


@@ -37,13 +37,13 @@ static inline char *strchr(const char *s, int c)
        for (; *s; s++) {
                if (*s == c)
                        return (char *) s;
        for (; *s; s++) {
                if (*s == c)
                        return (char *) s;

-       }       
+       }

        return 0;
 }
 
 #if !defined(__PRE_RAM__)
 static inline char *strdup(const char *s)
        return 0;
 }
 
 #if !defined(__PRE_RAM__)
 static inline char *strdup(const char *s)

-{   
+{

        size_t sz = strlen(s) + 1;
        char *d = malloc(sz);
        memcpy(d, s, sz);
        size_t sz = strlen(s) + 1;
        char *d = malloc(sz);
        memcpy(d, s, sz);


@@ -69,7 +69,7 @@ static inline char *strncpy(char *to, const char *from, int count)
 }
 
 static inline int strcmp(const char *s1, const char *s2)
 }
 
 static inline int strcmp(const char *s1, const char *s2)

-{   
+{

        int r;
 
        while ((r = (*s1 - *s2)) == 0 && *s1) {
        int r;
 
        while ((r = (*s1 - *s2)) == 0 && *s1) {


@@ -77,7 +77,7 @@ static inline int strcmp(const char *s1, const char *s2)
                s2++;
        }
        return r;
                s2++;
        }
        return r;

-}  
+}

 
 static inline int strncmp(const char *s1, const char *s2, int maxlen)
 {
 
 static inline int strncmp(const char *s1, const char *s2, int maxlen)
 {

diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c
index 390e7796e80911f144942396891d9bfc81d9db6d..690033e6b037e1dd43079a6f082c05ef290bfdb9 100644 (file)
--- a/src/lib/cbfs.c
+++ b/src/lib/cbfs.c
@@ -160,11 +160,11 @@ void *cbfs_load_optionrom(u16 vendor, u16 device, void * dest)
        if (orom == NULL)
                return NULL;
 
        if (orom == NULL)
                return NULL;
 

-       /* They might have specified a dest address. If so, we can decompress. 
+       /* They might have specified a dest address. If so, we can decompress.

         * If not, there's not much hope of decompressing or relocating the rom.
         * in the common case, the expansion rom is uncompressed, we
         * If not, there's not much hope of decompressing or relocating the rom.
         * in the common case, the expansion rom is uncompressed, we

-        * pass 0 in for the dest, and all we have to do is find the rom and 
-        * return a pointer to it. 
+        * pass 0 in for the dest, and all we have to do is find the rom and
+        * return a pointer to it.

         */
 
        /* BUG: the cbfstool is (not yet) including a cbfs_optionrom header */
         */
 
        /* BUG: the cbfstool is (not yet) including a cbfs_optionrom header */


@@ -193,9 +193,9 @@ void * cbfs_load_stage(const char *name)
        if (stage == NULL)
                return (void *) -1;
 
        if (stage == NULL)
                return (void *) -1;
 

-       printk(BIOS_INFO, "Stage: loading %s @ 0x%x (%d bytes), entry @ 0x%llx\n", 
+       printk(BIOS_INFO, "Stage: loading %s @ 0x%x (%d bytes), entry @ 0x%llx\n",

                        name,
                        name,

-                       (u32) stage->load, stage->memlen, 
+                       (u32) stage->load, stage->memlen,

                        stage->entry);
        memset((void *) (u32) stage->load, 0, stage->memlen);
 
                        stage->entry);
        memset((void *) (u32) stage->load, 0, stage->memlen);
 


@@ -235,9 +235,9 @@ int cbfs_execute_stage(const char *name)
 
 /**
  * run_address is passed the address of a function taking no parameters and
 
 /**
  * run_address is passed the address of a function taking no parameters and

- * jumps to it, returning the result. 
- * @param f the address to call as a function. 
- * @return value returned by the function. 
+ * jumps to it, returning the result.
+ * @param f the address to call as a function.
+ * @return value returned by the function.

  */
 
 int run_address(void *f)
  */
 
 int run_address(void *f)

diff --git a/src/lib/cbmem.c b/src/lib/cbmem.c
index 9e8aff3e6723cb726e40477b768405288e7706c0..7e3e20123a543e8372b41d794d6a4d64ce695efb 100644 (file)
--- a/src/lib/cbmem.c
+++ b/src/lib/cbmem.c
@@ -67,7 +67,7 @@ void cbmem_init(u64 baseaddr, u64 size)
 #ifndef __PRE_RAM__
        bss_cbmem_toc = cbmem_toc;
 #endif
 #ifndef __PRE_RAM__
        bss_cbmem_toc = cbmem_toc;
 #endif

-       
+

        debug("Initializing CBMEM area to 0x%llx (%lld bytes)\n", baseaddr, size);
 
        if (size < (64 * 1024)) {
        debug("Initializing CBMEM area to 0x%llx (%lld bytes)\n", baseaddr, size);
 
        if (size < (64 * 1024)) {


@@ -103,7 +103,7 @@ void *cbmem_add(u32 id, u64 size)
        struct cbmem_entry *cbmem_toc;
        int i;
        cbmem_toc = get_cbmem_toc();
        struct cbmem_entry *cbmem_toc;
        int i;
        cbmem_toc = get_cbmem_toc();

-       
+

        if (cbmem_toc == NULL) {
                return NULL;
        }
        if (cbmem_toc == NULL) {
                return NULL;
        }


@@ -121,7 +121,7 @@ void *cbmem_add(u32 id, u64 size)
 
        /* Align size to 512 byte blocks */
 
 
        /* Align size to 512 byte blocks */
 

-       size = ALIGN(size, 512) < cbmem_toc[0].size ? 
+       size = ALIGN(size, 512) < cbmem_toc[0].size ?

                ALIGN(size, 512) : cbmem_toc[0].size;
 
        /* Now look for the first free/usable TOC entry */
                ALIGN(size, 512) : cbmem_toc[0].size;
 
        /* Now look for the first free/usable TOC entry */


@@ -155,7 +155,7 @@ void *cbmem_find(u32 id)
        struct cbmem_entry *cbmem_toc;
        int i;
        cbmem_toc = get_cbmem_toc();
        struct cbmem_entry *cbmem_toc;
        int i;
        cbmem_toc = get_cbmem_toc();

-       
+

        if (cbmem_toc == NULL)
                return NULL;
 
        if (cbmem_toc == NULL)
                return NULL;
 


@@ -197,7 +197,7 @@ void cbmem_list(void)
        struct cbmem_entry *cbmem_toc;
        int i;
        cbmem_toc = get_cbmem_toc();
        struct cbmem_entry *cbmem_toc;
        int i;
        cbmem_toc = get_cbmem_toc();

-       
+

        if (cbmem_toc == NULL)
                return;
 
        if (cbmem_toc == NULL)
                return;
 

diff --git a/src/lib/compute_ip_checksum.c b/src/lib/compute_ip_checksum.c
index 9306baf5d00e38dbd178bc15dbeb34ca44539fef..48f93d4699322184302032e9374da471f2803c20 100644 (file)
--- a/src/lib/compute_ip_checksum.c
+++ b/src/lib/compute_ip_checksum.c
@@ -39,7 +39,7 @@ unsigned long add_ip_checksums(unsigned long offset, unsigned long sum, unsigned
        sum = ~sum & 0xFFFF;
        new = ~new & 0xFFFF;
        if (offset & 1) {
        sum = ~sum & 0xFFFF;
        new = ~new & 0xFFFF;
        if (offset & 1) {

-               /* byte swap the sum if it came from an odd offset 
+               /* byte swap the sum if it came from an odd offset

                 * since the computation is endian independant this
                 * works.
                 */
                 * since the computation is endian independant this
                 * works.
                 */

diff --git a/src/lib/generic_dump_spd.c b/src/lib/generic_dump_spd.c
index 2fe1ea305b49132fc4592af958dc4c37a9b34cbf..32a572e44cae3ed8f69c1ee5f7edc8b4a679e2d1 100644 (file)
--- a/src/lib/generic_dump_spd.c
+++ b/src/lib/generic_dump_spd.c
@@ -12,8 +12,8 @@ static void dump_spd_registers(const struct mem_controller *ctrl)
                device = ctrl->channel0[i];
                if (device) {
                        int j;
                device = ctrl->channel0[i];
                if (device) {
                        int j;

-                       print_debug("dimm: "); 
-                       print_debug_hex8(i); 
+                       print_debug("dimm: ");
+                       print_debug_hex8(i);

                        print_debug(".0: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {
                        print_debug(".0: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {


@@ -38,8 +38,8 @@ static void dump_spd_registers(const struct mem_controller *ctrl)
                device = ctrl->channel1[i];
                if (device) {
                        int j;
                device = ctrl->channel1[i];
                if (device) {
                        int j;

-                       print_debug("dimm: "); 
-                       print_debug_hex8(i); 
+                       print_debug("dimm: ");
+                       print_debug_hex8(i);

                        print_debug(".1: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {
                        print_debug(".1: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {

diff --git a/src/lib/generic_sdram.c b/src/lib/generic_sdram.c
index edecc06850a683e6ce57342d2b4eb0b0a90fa5c9..8a06252170d541a5c262ca493f2d93767c1adad5 100644 (file)
--- a/src/lib/generic_sdram.c
+++ b/src/lib/generic_sdram.c
@@ -45,7 +45,7 @@ void sdram_initialize(int controllers, const struct mem_controller *ctrl)
        }
 
        /* Now that everything is setup enable the SDRAM.
        }
 
        /* Now that everything is setup enable the SDRAM.

-        * Some chipsets do the work for us while on others 
+        * Some chipsets do the work for us while on others

         * we need to it by hand.
         */
        print_debug("Ram3\n");
         * we need to it by hand.
         */
        print_debug("Ram3\n");

diff --git a/src/lib/jpeg.c b/src/lib/jpeg.c
index 1e917c2b40cd6a634ed7c246316012b8f18408e0..4297299ee5d183fe9b8e815dea1454efea1dcd28 100644 (file)
--- a/src/lib/jpeg.c
+++ b/src/lib/jpeg.c
@@ -270,7 +270,7 @@ int jpeg_check_size(unsigned char *buf, int width, int height)
         return 1;
 }
 
         return 1;
 }
 

-int jpeg_decode(unsigned char *buf, unsigned char *pic, 
+int jpeg_decode(unsigned char *buf, unsigned char *pic,

                int width, int height, int depth, struct jpeg_decdata *decdata)
 {
        int i, j, m, tac, tdc;
                int width, int height, int depth, struct jpeg_decdata *decdata)
 {
        int i, j, m, tac, tdc;

diff --git a/src/lib/lzma.c b/src/lib/lzma.c
index 532a2b2614589a4bd20d10202b3c34c9a5787583..be0f386bdfec82acbdef3260f6344e8d8e005dd9 100644 (file)
--- a/src/lib/lzma.c
+++ b/src/lib/lzma.c
@@ -1,4 +1,4 @@
-/* 
+/*

 
 Coreboot interface to memory-saving variant of LZMA decoder
 
 
 Coreboot interface to memory-saving variant of LZMA decoder
 

diff --git a/src/lib/lzmadecode.c b/src/lib/lzmadecode.c
index 65819b53cf2215c4df714d7814cfaad797046279..1cf647d27bcb18ade329d4224ff73c1e3340f5aa 100644 (file)
--- a/src/lib/lzmadecode.c
+++ b/src/lib/lzmadecode.c
@@ -1,21 +1,21 @@
 /*
   LzmaDecode.c
   LZMA Decoder (optimized for Speed version)
 /*
   LzmaDecode.c
   LZMA Decoder (optimized for Speed version)

-  
+

   LZMA SDK 4.40 Copyright (c) 1999-2006 Igor Pavlov (2006-05-01)
   http://www.7-zip.org/
 
   LZMA SDK is licensed under two licenses:
   1) GNU Lesser General Public License (GNU LGPL)
   2) Common Public License (CPL)
   LZMA SDK 4.40 Copyright (c) 1999-2006 Igor Pavlov (2006-05-01)
   http://www.7-zip.org/
 
   LZMA SDK is licensed under two licenses:
   1) GNU Lesser General Public License (GNU LGPL)
   2) Common Public License (CPL)

-  It means that you can select one of these two licenses and 
+  It means that you can select one of these two licenses and

   follow rules of that license.
 
   SPECIAL EXCEPTION:
   follow rules of that license.
 
   SPECIAL EXCEPTION:

-  Igor Pavlov, as the author of this Code, expressly permits you to 
-  statically or dynamically link your Code (or bind by name) to the 
-  interfaces of this file without subjecting your linked Code to the 
-  terms of the CPL or GNU LGPL. Any modifications or additions 
+  Igor Pavlov, as the author of this Code, expressly permits you to
+  statically or dynamically link your Code (or bind by name) to the
+  interfaces of this file without subjecting your linked Code to the
+  terms of the CPL or GNU LGPL. Any modifications or additions

   to this file, however, are subject to the LGPL or CPL terms.
 */
 
   to this file, however, are subject to the LGPL or CPL terms.
 */
 


@@ -37,7 +37,7 @@
 #define RC_TEST { if (Buffer == BufferLim) return LZMA_RESULT_DATA_ERROR; }
 
 #define RC_INIT(buffer, bufferSize) Buffer = buffer; BufferLim = buffer + bufferSize; RC_INIT2
 #define RC_TEST { if (Buffer == BufferLim) return LZMA_RESULT_DATA_ERROR; }
 
 #define RC_INIT(buffer, bufferSize) Buffer = buffer; BufferLim = buffer + bufferSize; RC_INIT2

- 
+

 
 #define RC_NORMALIZE if (Range < kTopValue) { RC_TEST; Range <<= 8; Code = (Code << 8) | RC_READ_BYTE; }
 
 
 #define RC_NORMALIZE if (Range < kTopValue) { RC_TEST; Range <<= 8; Code = (Code << 8) | RC_READ_BYTE; }
 


@@ -47,9 +47,9 @@
 
 #define RC_GET_BIT2(p, mi, A0, A1) IfBit0(p) \
   { UpdateBit0(p); mi <<= 1; A0; } else \
 
 #define RC_GET_BIT2(p, mi, A0, A1) IfBit0(p) \
   { UpdateBit0(p); mi <<= 1; A0; } else \

-  { UpdateBit1(p); mi = (mi + mi) + 1; A1; } 
-  
-#define RC_GET_BIT(p, mi) RC_GET_BIT2(p, mi, ; , ;)               
+  { UpdateBit1(p); mi = (mi + mi) + 1; A1; }
+
+#define RC_GET_BIT(p, mi) RC_GET_BIT2(p, mi, ; , ;)

 
 #define RangeDecoderBitTreeDecode(probs, numLevels, res) \
   { int i = numLevels; res = 1; \
 
 #define RangeDecoderBitTreeDecode(probs, numLevels, res) \
   { int i = numLevels; res = 1; \


@@ -72,7 +72,7 @@
 #define LenLow (LenChoice2 + 1)
 #define LenMid (LenLow + (kNumPosStatesMax << kLenNumLowBits))
 #define LenHigh (LenMid + (kNumPosStatesMax << kLenNumMidBits))
 #define LenLow (LenChoice2 + 1)
 #define LenMid (LenLow + (kNumPosStatesMax << kLenNumLowBits))
 #define LenHigh (LenMid + (kNumPosStatesMax << kLenNumMidBits))

-#define kNumLenProbs (LenHigh + kLenNumHighSymbols) 
+#define kNumLenProbs (LenHigh + kLenNumHighSymbols)

 
 
 #define kNumStates 12
 
 
 #define kNumStates 12


@@ -161,7 +161,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
     for (i = 0; i < numProbs; i++)
       p[i] = kBitModelTotal >> 1;
   }
     for (i = 0; i < numProbs; i++)
       p[i] = kBitModelTotal >> 1;
   }

-  
+

   RC_INIT(inStream, inSize);
 
 
   RC_INIT(inStream, inSize);
 
 


@@ -170,7 +170,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
     CProb *prob;
     UInt32 bound;
     int posState = (int)(
     CProb *prob;
     UInt32 bound;
     int posState = (int)(

-        (nowPos 
+        (nowPos

         )
         & posStateMask);
 
         )
         & posStateMask);
 


@@ -179,9 +179,9 @@ int LzmaDecode(CLzmaDecoderState *vs,
     {
       int symbol = 1;
       UpdateBit0(prob)
     {
       int symbol = 1;
       UpdateBit0(prob)

-      prob = p + Literal + (LZMA_LIT_SIZE * 
+      prob = p + Literal + (LZMA_LIT_SIZE *

         (((
         (((

-        (nowPos 
+        (nowPos

         )
         & literalPosMask) << lc) + (previousByte >> (8 - lc))));
 
         )
         & literalPosMask) << lc) + (previousByte >> (8 - lc))));
 


@@ -212,7 +212,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
       else if (state < 10) state -= 3;
       else state -= 6;
     }
       else if (state < 10) state -= 3;
       else state -= 6;
     }

-    else             
+    else

     {
       UpdateBit1(prob);
       prob = p + IsRep + state;
     {
       UpdateBit1(prob);
       prob = p + IsRep + state;


@@ -236,10 +236,10 @@ int LzmaDecode(CLzmaDecoderState *vs,
           IfBit0(prob)
           {
             UpdateBit0(prob);
           IfBit0(prob)
           {
             UpdateBit0(prob);

-            
+

             if (nowPos == 0)
               return LZMA_RESULT_DATA_ERROR;
             if (nowPos == 0)
               return LZMA_RESULT_DATA_ERROR;

-            
+

             state = state < kNumLitStates ? 9 : 11;
             previousByte = outStream[nowPos - rep0];
             outStream[nowPos++] = previousByte;
             state = state < kNumLitStates ? 9 : 11;
             previousByte = outStream[nowPos - rep0];
             outStream[nowPos++] = previousByte;


@@ -261,7 +261,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
             UpdateBit0(prob);
             distance = rep1;
           }
             UpdateBit0(prob);
             distance = rep1;
           }

-          else 
+          else

           {
             UpdateBit1(prob);
             prob = p + IsRepG2 + state;
           {
             UpdateBit1(prob);
             prob = p + IsRepG2 + state;


@@ -322,7 +322,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
         int posSlot;
         state += kNumLitStates;
         prob = p + PosSlot +
         int posSlot;
         state += kNumLitStates;
         prob = p + PosSlot +

-            ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) << 
+            ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) <<

             kNumPosSlotBits);
         RangeDecoderBitTreeDecode(prob, kNumPosSlotBits, posSlot);
         if (posSlot >= kStartPosModelIndex)
             kNumPosSlotBits);
         RangeDecoderBitTreeDecode(prob, kNumPosSlotBits, posSlot);
         if (posSlot >= kStartPosModelIndex)

diff --git a/src/lib/lzmadecode.h b/src/lib/lzmadecode.h
index dedde0de6756181a2a1a4741d787178131a7ea33..34c9f14c332b77d166a37dd410658ed008e3508f 100644 (file)
--- a/src/lib/lzmadecode.h
+++ b/src/lib/lzmadecode.h
@@ -1,4 +1,4 @@
-/* 
+/*

   LzmaDecode.h
   LZMA Decoder interface
 
   LzmaDecode.h
   LZMA Decoder interface
 


@@ -8,14 +8,14 @@
   LZMA SDK is licensed under two licenses:
   1) GNU Lesser General Public License (GNU LGPL)
   2) Common Public License (CPL)
   LZMA SDK is licensed under two licenses:
   1) GNU Lesser General Public License (GNU LGPL)
   2) Common Public License (CPL)

-  It means that you can select one of these two licenses and 
+  It means that you can select one of these two licenses and

   follow rules of that license.
 
   SPECIAL EXCEPTION:
   follow rules of that license.
 
   SPECIAL EXCEPTION:

-  Igor Pavlov, as the author of this code, expressly permits you to 
-  statically or dynamically link your code (or bind by name) to the 
-  interfaces of this file without subjecting your linked code to the 
-  terms of the CPL or GNU LGPL. Any modifications or additions 
+  Igor Pavlov, as the author of this code, expressly permits you to
+  statically or dynamically link your code (or bind by name) to the
+  interfaces of this file without subjecting your linked code to the
+  terms of the CPL or GNU LGPL. Any modifications or additions

   to this file, however, are subject to the LGPL or CPL terms.
 */
 
   to this file, however, are subject to the LGPL or CPL terms.
 */
 

diff --git a/src/lib/nrv2b.c b/src/lib/nrv2b.c
index c91eda50477729ed9b90ba96e46562aeedd91a73..d84e99ec0be41c18c74ca2f066ccd019fa8fd862 100644 (file)
--- a/src/lib/nrv2b.c
+++ b/src/lib/nrv2b.c
@@ -1,4 +1,4 @@
-// This GETBIT is supposed to work on little endian 
+// This GETBIT is supposed to work on little endian

 // 32bit systems. The algorithm will definitely need
 // some fixing on other systems, but it might not be
 // a problem since the nrv2b binary behaves the same..
 // 32bit systems. The algorithm will definitely need
 // some fixing on other systems, but it might not be
 // a problem since the nrv2b binary behaves the same..


@@ -37,7 +37,7 @@ static unsigned long unrv2b(uint8_t * src, uint8_t * dst, unsigned long *ilen_p)
 
        // skip length
        src += 4;
 
        // skip length
        src += 4;

-       /* FIXME: check olen with the length stored in first 4 bytes */ 
+       /* FIXME: check olen with the length stored in first 4 bytes */

 
        for (;;) {
                unsigned int m_off, m_len;
 
        for (;;) {
                unsigned int m_off, m_len;

diff --git a/src/lib/ramtest.c b/src/lib/ramtest.c
index 605d555e467527404024e85d68a46ef2b5aceec4..98872a47d7b160a9830e739de15e7284ce8e8eeb 100644 (file)
--- a/src/lib/ramtest.c
+++ b/src/lib/ramtest.c
@@ -48,7 +48,7 @@ static void phys_memory_barrier(void)
 static void ram_fill(unsigned long start, unsigned long stop)
 {
        unsigned long addr;
 static void ram_fill(unsigned long start, unsigned long stop)
 {
        unsigned long addr;

-       /* 
+       /*

         * Fill.
         */
 #if CONFIG_USE_PRINTK_IN_CAR
         * Fill.
         */
 #if CONFIG_USE_PRINTK_IN_CAR


@@ -85,7 +85,7 @@ static void ram_verify(unsigned long start, unsigned long stop)
 {
        unsigned long addr;
        int i = 0;
 {
        unsigned long addr;
        int i = 0;

-       /* 
+       /*

         * Verify.
         */
 #if CONFIG_USE_PRINTK_IN_CAR
         * Verify.
         */
 #if CONFIG_USE_PRINTK_IN_CAR


@@ -168,7 +168,7 @@ void ram_check(unsigned long start, unsigned long stop)
 #else
        print_debug("Testing DRAM : ");
        print_debug_hex32(start);
 #else
        print_debug("Testing DRAM : ");
        print_debug_hex32(start);

-       print_debug("-");       
+       print_debug("-");

        print_debug_hex32(stop);
        print_debug("\n");
 #endif
        print_debug_hex32(stop);
        print_debug("\n");
 #endif

diff --git a/src/lib/uart8250.c b/src/lib/uart8250.c
index 79eb1c51c19987610043480e43e6fdf57af3ab80..3dbee0b464f1f738f0bd4e49d332657e6aad4eb8 100644 (file)
--- a/src/lib/uart8250.c
+++ b/src/lib/uart8250.c
@@ -33,7 +33,7 @@ static inline void uart8250_wait_to_tx_byte(unsigned base_port)
 
 static inline void uart8250_wait_until_sent(unsigned base_port)
 {
 
 static inline void uart8250_wait_until_sent(unsigned base_port)
 {

-       while(!(inb(base_port + UART_LSR) & 0x40)) 
+       while(!(inb(base_port + UART_LSR) & 0x40))

                ;
 }
 
                ;
 }
 

diff --git a/src/lib/usbdebug_direct.c b/src/lib/usbdebug_direct.c
index cb70c625e27c7b2f3826b3fa192608da3cd652bc..d2e46729d104d5da0549489605401d4879c59a74 100644 (file)
--- a/src/lib/usbdebug_direct.c
+++ b/src/lib/usbdebug_direct.c
@@ -87,7 +87,7 @@ static int dbgp_wait_until_complete(struct ehci_dbg_port *ehci_debug)
                /* Stop when the transaction is finished */
                if (ctrl & DBGP_DONE)
                        break;
                /* Stop when the transaction is finished */
                if (ctrl & DBGP_DONE)
                        break;

-       } while(--loop>0); 
+       } while(--loop>0);

 
        if (!loop) return -1000;
 
 
        if (!loop) return -1000;
 


@@ -132,7 +132,7 @@ retry:
         */
        if ((lpid == USB_PID_NAK) || (lpid == USB_PID_NYET))
                dbgp_breath();
         */
        if ((lpid == USB_PID_NAK) || (lpid == USB_PID_NYET))
                dbgp_breath();

-       
+

        /* If I get a NACK reissue the transmission */
        if (lpid == USB_PID_NAK) {
                if (--loop > 0) goto retry;
        /* If I get a NACK reissue the transmission */
        if (lpid == USB_PID_NAK) {
                if (--loop > 0) goto retry;


@@ -179,7 +179,7 @@ static int dbgp_bulk_write(struct ehci_dbg_port *ehci_debug, unsigned devnum, un
 
        pids = read32(&ehci_debug->pids);
        pids = DBGP_PID_UPDATE(pids, USB_PID_OUT);
 
        pids = read32(&ehci_debug->pids);
        pids = DBGP_PID_UPDATE(pids, USB_PID_OUT);

-       
+

        ctrl = read32(&ehci_debug->control);
        ctrl = DBGP_LEN_UPDATE(ctrl, size);
        ctrl |= DBGP_OUT;
        ctrl = read32(&ehci_debug->control);
        ctrl = DBGP_LEN_UPDATE(ctrl, size);
        ctrl |= DBGP_OUT;


@@ -213,12 +213,12 @@ static int dbgp_bulk_read(struct ehci_dbg_port *ehci_debug, unsigned devnum, uns
 
        pids = read32(&ehci_debug->pids);
        pids = DBGP_PID_UPDATE(pids, USB_PID_IN);
 
        pids = read32(&ehci_debug->pids);
        pids = DBGP_PID_UPDATE(pids, USB_PID_IN);

-               
+

        ctrl = read32(&ehci_debug->control);
        ctrl = DBGP_LEN_UPDATE(ctrl, size);
        ctrl &= ~DBGP_OUT;
        ctrl |= DBGP_GO;
        ctrl = read32(&ehci_debug->control);
        ctrl = DBGP_LEN_UPDATE(ctrl, size);
        ctrl &= ~DBGP_OUT;
        ctrl |= DBGP_GO;

-               
+

        write32(&ehci_debug->address, addr);
        write32(&ehci_debug->pids, pids);
        ret = dbgp_wait_until_done(ehci_debug, ctrl);
        write32(&ehci_debug->address, addr);
        write32(&ehci_debug->pids, pids);
        ret = dbgp_wait_until_done(ehci_debug, ctrl);


@@ -234,7 +234,7 @@ int dbgp_bulk_read_x(struct ehci_debug_info *dbg_info, void *data, int size)
        return dbgp_bulk_read(dbg_info->ehci_debug, dbg_info->devnum, dbg_info->endpoint_in, data, size);
 }
 
        return dbgp_bulk_read(dbg_info->ehci_debug, dbg_info->devnum, dbg_info->endpoint_in, data, size);
 }
 

-static int dbgp_control_msg(struct ehci_dbg_port *ehci_debug, unsigned devnum, int requesttype, int request, 
+static int dbgp_control_msg(struct ehci_dbg_port *ehci_debug, unsigned devnum, int requesttype, int request,

        int value, int index, void *data, int size)
 {
        unsigned pids, addr, ctrl;
        int value, int index, void *data, int size)
 {
        unsigned pids, addr, ctrl;


@@ -245,7 +245,7 @@ static int dbgp_control_msg(struct ehci_dbg_port *ehci_debug, unsigned devnum, i
        read = (requesttype & USB_DIR_IN) != 0;
        if (size > (read?DBGP_MAX_PACKET:0))
                return -1;
        read = (requesttype & USB_DIR_IN) != 0;
        if (size > (read?DBGP_MAX_PACKET:0))
                return -1;

-       
+

        /* Compute the control message */
        req.bRequestType = requesttype;
        req.bRequest = request;
        /* Compute the control message */
        req.bRequestType = requesttype;
        req.bRequest = request;


@@ -298,7 +298,7 @@ static int ehci_reset_port(struct ehci_regs *ehci_regs, int port)
                        loop = 2;
                        write32(&ehci_regs->port_status[port - 1],
                                        portsc & ~(PORT_RWC_BITS | PORT_RESET));
                        loop = 2;
                        write32(&ehci_regs->port_status[port - 1],
                                        portsc & ~(PORT_RWC_BITS | PORT_RESET));

-                       do {    
+                       do {

                                dbgp_mdelay(delay);
                                portsc = read32(&ehci_regs->port_status[port - 1]);
                                delay_time += delay;
                                dbgp_mdelay(delay);
                                portsc = read32(&ehci_regs->port_status[port - 1]);
                                delay_time += delay;


@@ -395,7 +395,7 @@ try_next_port:
                        set_debug_port(debug_port);
                        goto try_next_time;
                }
                        set_debug_port(debug_port);
                        goto try_next_time;
                }

-               return; 
+               return;

        }
 
        /* Reset the EHCI controller */
        }
 
        /* Reset the EHCI controller */


@@ -492,7 +492,7 @@ try_next_port:
                        USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
                        USB_REQ_SET_ADDRESS, USB_DEBUG_DEVNUM, 0, (void *)0, 0);
                if (ret < 0) {
                        USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
                        USB_REQ_SET_ADDRESS, USB_DEBUG_DEVNUM, 0, (void *)0, 0);
                if (ret < 0) {

-                       dbgp_printk("Could not move attached device to %d.\n", 
+                       dbgp_printk("Could not move attached device to %d.\n",

                                USB_DEBUG_DEVNUM);
                        goto err;
                }
                                USB_DEBUG_DEVNUM);
                        goto err;
                }


@@ -525,7 +525,7 @@ try_next_port:
        info->devnum = devnum;
        info->endpoint_out = dbgp_endpoint_out;
        info->endpoint_in = dbgp_endpoint_in;
        info->devnum = devnum;
        info->endpoint_out = dbgp_endpoint_out;
        info->endpoint_in = dbgp_endpoint_in;

-       
+

        return;
 err:
        /* Things didn't work so remove my claim */
        return;
 err:
        /* Things didn't work so remove my claim */

diff --git a/src/lib/xmodem.c b/src/lib/xmodem.c
index 465d6670a3029f8e6401b1cdf1678c4189ab098d..2d553bed03a7a27016c357d5b53bf08ee44e046d 100644 (file)
--- a/src/lib/xmodem.c
+++ b/src/lib/xmodem.c
@@ -143,7 +143,7 @@ int xmodemReceive(unsigned char *dest, int destsz)
                        *p++ = c;
                }
 
                        *p++ = c;
                }
 

-               if (xbuff[1] == (unsigned char)(~xbuff[2]) && 
+               if (xbuff[1] == (unsigned char)(~xbuff[2]) &&

                        (xbuff[1] == packetno || xbuff[1] == (unsigned char)packetno-1) &&
                        check(crc, &xbuff[3], bufsz)) {
                        if (xbuff[1] == packetno)       {
                        (xbuff[1] == packetno || xbuff[1] == (unsigned char)packetno-1) &&
                        check(crc, &xbuff[3], bufsz)) {
                        if (xbuff[1] == packetno)       {

diff --git a/src/mainboard/a-trend/Kconfig b/src/mainboard/a-trend/Kconfig
index f5a379f84de362c64a467bc0819906e11ec6513b..7cb53924dd3ac4b9ad84ad242d06eeced2d7d008 100644 (file)
--- a/src/mainboard/a-trend/Kconfig
+++ b/src/mainboard/a-trend/Kconfig
@@ -21,7 +21,7 @@
 choice
        prompt "Mainboard model"
        depends on VENDOR_A_TREND
 choice
        prompt "Mainboard model"
        depends on VENDOR_A_TREND

-       
+

 source "src/mainboard/a-trend/atc-6220/Kconfig"
 source "src/mainboard/a-trend/atc-6240/Kconfig"
 
 source "src/mainboard/a-trend/atc-6220/Kconfig"
 source "src/mainboard/a-trend/atc-6240/Kconfig"
 

diff --git a/src/mainboard/abit/Kconfig b/src/mainboard/abit/Kconfig
index 982cc9eee7cbf2ee5799da4ea7f0e381893bf4d4..1f704b84c3774126d967c54da883c79fa04b1d02 100644 (file)
--- a/src/mainboard/abit/Kconfig
+++ b/src/mainboard/abit/Kconfig
@@ -21,7 +21,7 @@
 choice
        prompt "Mainboard model"
        depends on VENDOR_ABIT
 choice
        prompt "Mainboard model"
        depends on VENDOR_ABIT

-       
+

 source "src/mainboard/abit/be6-ii_v2_0/Kconfig"
 
 endchoice
 source "src/mainboard/abit/be6-ii_v2_0/Kconfig"
 
 endchoice

diff --git a/src/mainboard/amd/rumba/devicetree.cb b/src/mainboard/amd/rumba/devicetree.cb
index 0c0c8f0c31d18fc6ab05bc70cab2b0f2272fb664..bc84dc0373850e775827cb042d1b9135f6cb5dc8 100644 (file)
--- a/src/mainboard/amd/rumba/devicetree.cb
+++ b/src/mainboard/amd/rumba/devicetree.cb
@@ -6,7 +6,7 @@ chip northbridge/amd/gx2
                        device apic 0 on end
                end
        end
                        device apic 0 on end
                end
        end

-       device pci_domain 0 on 
+       device pci_domain 0 on

                device pci 1.0 on end
                device pci 1.1 on end
                chip southbridge/amd/cs5536
                device pci 1.0 on end
                device pci 1.1 on end
                chip southbridge/amd/cs5536

diff --git a/src/mainboard/amd/rumba/irq_tables.c b/src/mainboard/amd/rumba/irq_tables.c
index 598350b4b82c4624ab0f6ac37e737c2e127676c4..f751b481caa460bd622533b6579ecdd07ce7435d 100644 (file)
--- a/src/mainboard/amd/rumba/irq_tables.c
+++ b/src/mainboard/amd/rumba/irq_tables.c
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!

    (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
  *
    (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
  *

diff --git a/src/mainboard/amd/rumba/mainboard.c b/src/mainboard/amd/rumba/mainboard.c
index adb1786678c27d169a7353045c94e64b0bb8fa14..0e7bbb66e7a718c551fa035a40be1e0cf6ec22ab 100644 (file)
--- a/src/mainboard/amd/rumba/mainboard.c
+++ b/src/mainboard/amd/rumba/mainboard.c
@@ -19,7 +19,7 @@ static void init(struct device *dev) {
        printk(BIOS_DEBUG, "AMD RUMBA ENTER %s\n", __func__);
 
        if (nicirq) {
        printk(BIOS_DEBUG, "AMD RUMBA ENTER %s\n", __func__);
 
        if (nicirq) {

-               printk(BIOS_DEBUG, "%s (%x,%x)SET PCI interrupt line to %d\n", 
+               printk(BIOS_DEBUG, "%s (%x,%x)SET PCI interrupt line to %d\n",

                        __func__, bus, devfn, nicirq);
                nic = dev_find_slot(bus, devfn);
                if (! nic){
                        __func__, bus, devfn, nicirq);
                nic = dev_find_slot(bus, devfn);
                if (! nic){

diff --git a/src/mainboard/amd/rumba/romstage.c b/src/mainboard/amd/rumba/romstage.c
index 813b009471f34157992358e482b24c85932c242f..958cf3196cd4e3196a991df713f970f32a1ab115 100644 (file)
--- a/src/mainboard/amd/rumba/romstage.c
+++ b/src/mainboard/amd/rumba/romstage.c
@@ -35,7 +35,7 @@ static inline unsigned int fls(unsigned int x)
         return r;
 }
 
         return r;
 }
 

-static void sdram_set_spd_registers(const struct mem_controller *ctrl) 
+static void sdram_set_spd_registers(const struct mem_controller *ctrl)

 {
        /* Total size of DIMM = 2^row address (byte 3) * 2^col address (byte 4) *
         *                      component Banks (byte 17) * module banks, side (byte 5) *
 {
        /* Total size of DIMM = 2^row address (byte 3) * 2^col address (byte 4) *
         *                      component Banks (byte 17) * module banks, side (byte 5) *


@@ -86,7 +86,7 @@ static void sdram_set_spd_registers(const struct mem_controller *ctrl)
        msr = rdmsr(0x20000019);
        msr.hi = 0x18000108;
        msr.lo = 0x696332a3;
        msr = rdmsr(0x20000019);
        msr.hi = 0x18000108;
        msr.lo = 0x696332a3;

-       wrmsr(0x20000019, msr);         
+       wrmsr(0x20000019, msr);

 
 }
 
 
 }
 


@@ -122,7 +122,7 @@ static void main(unsigned long bist)
        };
 
        SystemPreInit();
        };
 
        SystemPreInit();

-       
+

 
        w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
        uart_init();
 
        w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
        uart_init();


@@ -134,7 +134,7 @@ static void main(unsigned long bist)
 
        cpuRegInit();
        print_err("done cpuRegInit\n");
 
        cpuRegInit();
        print_err("done cpuRegInit\n");

-       
+

        sdram_initialize(1, memctrl);
 
        msr_init();
        sdram_initialize(1, memctrl);
 
        msr_init();

diff --git a/src/mainboard/amd/serengeti_cheetah/acpi/amd8111.asl b/src/mainboard/amd/serengeti_cheetah/acpi/amd8111.asl
index b2474e2a2096e6e4f05fe97412d7f7d4ad62b0c8..77958b20637fb9a3c3ff6f3166fdb1a677e92ae2 100644 (file)
--- a/src/mainboard/amd/serengeti_cheetah/acpi/amd8111.asl
+++ b/src/mainboard/amd/serengeti_cheetah/acpi/amd8111.asl
@@ -4,17 +4,17 @@
 //AMD8111
             Name (APIC, Package (0x04)
             {
 //AMD8111
             Name (APIC, Package (0x04)
             {

-                Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x10},// 0x0004ffff : assusme 8131 is present 
-                Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x11}, 
-                Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x12}, 
+                Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x10},// 0x0004ffff : assusme 8131 is present
+                Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x11},
+                Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x12},

                 Package (0x04) { 0x0004FFFF, 0x03, 0x00, 0x13}
             })
 
             Name (PICM, Package (0x04)
             {
                 Package (0x04) { 0x0004FFFF, 0x03, 0x00, 0x13}
             })
 
             Name (PICM, Package (0x04)
             {

-                Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI0.LNKA, 0x00}, 
-                Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI0.LNKB, 0x00}, 
-                Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI0.LNKC, 0x00}, 
+                Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI0.LNKA, 0x00},
+                Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI0.LNKB, 0x00},
+                Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI0.LNKC, 0x00},

                 Package (0x04) { 0x0004FFFF, 0x03, \_SB.PCI0.LNKD, 0x00}
             })
 
                 Package (0x04) { 0x0004FFFF, 0x03, \_SB.PCI0.LNKD, 0x00}
             })
 


@@ -34,16 +34,16 @@
                         Store(Local0, Index (DeRefOf (Index (APIC, 1)), 0))
                         Store(Local0, Index (DeRefOf (Index (APIC, 2)), 0))
                         Store(Local0, Index (DeRefOf (Index (APIC, 3)), 0))
                         Store(Local0, Index (DeRefOf (Index (APIC, 1)), 0))
                         Store(Local0, Index (DeRefOf (Index (APIC, 2)), 0))
                         Store(Local0, Index (DeRefOf (Index (APIC, 3)), 0))

-                       
+

                        Store (0x00, ^DNCG)
                        Store (0x00, ^DNCG)

-                       
+

                }
 
                }
 

-                If (LNot (PICF)) { 
-                       Return (PICM) 
+                If (LNot (PICF)) {
+                       Return (PICM)

                }
                 Else {
                }
                 Else {

-                       Return (APIC) 
+                       Return (APIC)

                }
             }
 
                }
             }
 


@@ -57,7 +57,7 @@
                 OperationRegion (PIRQ, PCI_Config, 0x56, 0x02)
                 Field (PIRQ, ByteAcc, Lock, Preserve)
                 {
                 OperationRegion (PIRQ, PCI_Config, 0x56, 0x02)
                 Field (PIRQ, ByteAcc, Lock, Preserve)
                 {

-                    PIBA,   8, 
+                    PIBA,   8,

                     PIDC,   8
                 }
 /*
                     PIDC,   8
                 }
 /*


@@ -144,7 +144,7 @@
                     Package (0x04) { 0x0005FFFF, 0x02, 0x00, 0x13 },
                     Package (0x04) { 0x0005FFFF, 0x03, 0x00, 0x10 }
                 })
                     Package (0x04) { 0x0005FFFF, 0x02, 0x00, 0x13 },
                     Package (0x04) { 0x0005FFFF, 0x03, 0x00, 0x10 }
                 })

-       
+

                 Name (PICM, Package (0x0C)
                 {
                     Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 }, //USB
                 Name (PICM, Package (0x0C)
                 {
                     Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 }, //USB

diff --git a/src/mainboard/amd/serengeti_cheetah/acpi/amd8111_isa.asl b/src/mainboard/amd/serengeti_cheetah/acpi/amd8111_isa.asl
index 9d93e34e9265e70f100a800d98e059d95862c309..9e952c80bd3e18f9a28b4090c748500092b28665 100644 (file)
--- a/src/mainboard/amd/serengeti_cheetah/acpi/amd8111_isa.asl
+++ b/src/mainboard/amd/serengeti_cheetah/acpi/amd8111_isa.asl
@@ -5,7 +5,7 @@
 
             Device (ISA)
             {
 
             Device (ISA)
             {

-                /* lpc  0x00040000 */ 
+                /* lpc  0x00040000 */

                 Method (_ADR, 0, NotSerialized)
                 {
                        Return (DADD(\_SB.PCI0.SBDN, 0x00010000))
                 Method (_ADR, 0, NotSerialized)
                 {
                        Return (DADD(\_SB.PCI0.SBDN, 0x00010000))


@@ -15,11 +15,11 @@
                 Field (PIRY, ByteAcc, NoLock, Preserve)
                 {
                     Z000,   2,  // Parallel Port Range
                 Field (PIRY, ByteAcc, NoLock, Preserve)
                 {
                     Z000,   2,  // Parallel Port Range

-                        ,   1, 
+                        ,   1,

                     ECP,    1,  // ECP Enable
                     FDC1,   1,  // Floppy Drive Controller 1
                     FDC2,   1,  // Floppy Drive Controller 2
                     ECP,    1,  // ECP Enable
                     FDC1,   1,  // Floppy Drive Controller 1
                     FDC2,   1,  // Floppy Drive Controller 2

-                    Offset (0x01), 
+                    Offset (0x01),

                     Z001,   3,  // Serial Port A Range
                     SAEN,   1,  // Serial Post A Enabled
                     Z002,   3,  // Serial Port B Range
                     Z001,   3,  // Serial Port A Range
                     SAEN,   1,  // Serial Post A Enabled
                     Z002,   3,  // Serial Port B Range


@@ -106,7 +106,7 @@
                         IO (Decode16, 0x0090, 0x0090, 0x01, 0x10)
                         IO (Decode16, 0x00A2, 0x00A2, 0x01, 0x1E)
                         IO (Decode16, 0x00E0, 0x00E0, 0x01, 0x10)
                         IO (Decode16, 0x0090, 0x0090, 0x01, 0x10)
                         IO (Decode16, 0x00A2, 0x00A2, 0x01, 0x1E)
                         IO (Decode16, 0x00E0, 0x00E0, 0x01, 0x10)

-                        IO (Decode16, 0x0B78, 0x0B78, 0x01, 0x04) // Added this to remove ACPI Unrepoted IO Error 
+                        IO (Decode16, 0x0B78, 0x0B78, 0x01, 0x04) // Added this to remove ACPI Unrepoted IO Error

                         IO (Decode16, 0x0190, 0x0190, 0x01, 0x04) // Added this to remove ACPI Unrepoted IO Error
                     })
                     Method (_CRS, 0, NotSerialized)
                         IO (Decode16, 0x0190, 0x0190, 0x01, 0x04) // Added this to remove ACPI Unrepoted IO Error
                     })
                     Method (_CRS, 0, NotSerialized)


@@ -134,7 +134,7 @@
                             Memory32Fixed (ReadWrite, 0x00000000, 0x00000000) //Overlay BIOS
                             Memory32Fixed (ReadWrite, 0x00000000, 0x00000000) //Overlay BIOS
                         })
                             Memory32Fixed (ReadWrite, 0x00000000, 0x00000000) //Overlay BIOS
                             Memory32Fixed (ReadWrite, 0x00000000, 0x00000000) //Overlay BIOS
                         })

-                       // Read the Video Memory length 
+                       // Read the Video Memory length

                         CreateDWordField (BUF0, 0x14, CLEN)
                         CreateDWordField (BUF0, 0x10, CBAS)
 
                         CreateDWordField (BUF0, 0x14, CLEN)
                         CreateDWordField (BUF0, 0x10, CBAS)
 

diff --git a/src/mainboard/amd/serengeti_cheetah/acpi/amd8131.asl b/src/mainboard/amd/serengeti_cheetah/acpi/amd8131.asl
index e209665e48136708eec18342a90383fd23cc3f33..172f0bf9d161448fb0bd8c9286b1b7a967e16948 100644 (file)
--- a/src/mainboard/amd/serengeti_cheetah/acpi/amd8131.asl
+++ b/src/mainboard/amd/serengeti_cheetah/acpi/amd8131.asl
@@ -1,7 +1,7 @@
 /*
  * Copyright 2005 AMD
  */
 /*
  * Copyright 2005 AMD
  */

-               
+

             Device (PG0A)
             {
                 /*  8132 pcix bridge*/
             Device (PG0A)
             {
                 /*  8132 pcix bridge*/


@@ -19,60 +19,60 @@
                 Name (APIC, Package (0x14)
                 {
                    // Slot A - PIRQ BCDA
                 Name (APIC, Package (0x14)
                 {
                    // Slot A - PIRQ BCDA

-                    Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x19 }, //Slot 2 
-                    Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x1A }, 
-                    Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x1B }, 
+                    Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x19 }, //Slot 2
+                    Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x1A },
+                    Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x1B },

                     Package (0x04) { 0x0001FFFF, 0x03, 0x00, 0x18 },
                     Package (0x04) { 0x0001FFFF, 0x03, 0x00, 0x18 },

- 
+

                    //Cypress Slot A - PIRQ BCDA
                     Package (0x04) { 0x0003FFFF, 0x00, 0x00, 0x19 }, //?
                    //Cypress Slot A - PIRQ BCDA
                     Package (0x04) { 0x0003FFFF, 0x00, 0x00, 0x19 }, //?

-                    Package (0x04) { 0x0003FFFF, 0x01, 0x00, 0x1A }, 
-                    Package (0x04) { 0x0003FFFF, 0x02, 0x00, 0x1B }, 
-                    Package (0x04) { 0x0003FFFF, 0x03, 0x00, 0x18 }, 
+                    Package (0x04) { 0x0003FFFF, 0x01, 0x00, 0x1A },
+                    Package (0x04) { 0x0003FFFF, 0x02, 0x00, 0x1B },
+                    Package (0x04) { 0x0003FFFF, 0x03, 0x00, 0x18 },

 
                    //Cypress Slot B - PIRQ CDAB
                     Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x1A }, //?
 
                    //Cypress Slot B - PIRQ CDAB
                     Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x1A }, //?

-                    Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x1B }, 
-                    Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x18 }, 
-                    Package (0x04) { 0x0004FFFF, 0x03, 0x00, 0x19 }, 
+                    Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x1B },
+                    Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x18 },
+                    Package (0x04) { 0x0004FFFF, 0x03, 0x00, 0x19 },

 
                    //Cypress Slot C - PIRQ DABC
                     Package (0x04) { 0x0005FFFF, 0x00, 0x00, 0x1B }, //?
 
                    //Cypress Slot C - PIRQ DABC
                     Package (0x04) { 0x0005FFFF, 0x00, 0x00, 0x1B }, //?

-                    Package (0x04) { 0x0005FFFF, 0x01, 0x00, 0x18 }, 
-                    Package (0x04) { 0x0005FFFF, 0x02, 0x00, 0x19 }, 
-                    Package (0x04) { 0x0005FFFF, 0x03, 0x00, 0x1A }, 
+                    Package (0x04) { 0x0005FFFF, 0x01, 0x00, 0x18 },
+                    Package (0x04) { 0x0005FFFF, 0x02, 0x00, 0x19 },
+                    Package (0x04) { 0x0005FFFF, 0x03, 0x00, 0x1A },

 
                    //Cypress Slot D - PIRQ ABCD
                     Package (0x04) { 0x0006FFFF, 0x00, 0x00, 0x18 }, //?
 
                    //Cypress Slot D - PIRQ ABCD
                     Package (0x04) { 0x0006FFFF, 0x00, 0x00, 0x18 }, //?

-                    Package (0x04) { 0x0006FFFF, 0x01, 0x00, 0x19 }, 
-                    Package (0x04) { 0x0006FFFF, 0x02, 0x00, 0x1A }, 
+                    Package (0x04) { 0x0006FFFF, 0x01, 0x00, 0x19 },
+                    Package (0x04) { 0x0006FFFF, 0x02, 0x00, 0x1A },

                     Package (0x04) { 0x0006FFFF, 0x03, 0x00, 0x1B }
                 })
                 Name (PICM, Package (0x14)
                 {
                     Package (0x04) { 0x0006FFFF, 0x03, 0x00, 0x1B }
                 })
                 Name (PICM, Package (0x14)
                 {

-                    Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI0.LNKB, 0x00 },//Slot 2 
-                    Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI0.LNKC, 0x00 }, 
-                    Package (0x04) { 0x0001FFFF, 0x02, \_SB.PCI0.LNKD, 0x00 }, 
-                    Package (0x04) { 0x0001FFFF, 0x03, \_SB.PCI0.LNKA, 0x00 }, 
+                    Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI0.LNKB, 0x00 },//Slot 2
+                    Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI0.LNKC, 0x00 },
+                    Package (0x04) { 0x0001FFFF, 0x02, \_SB.PCI0.LNKD, 0x00 },
+                    Package (0x04) { 0x0001FFFF, 0x03, \_SB.PCI0.LNKA, 0x00 },

 
 

-                    Package (0x04) { 0x0003FFFF, 0x00, \_SB.PCI0.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0003FFFF, 0x01, \_SB.PCI0.LNKC, 0x00 }, 
-                    Package (0x04) { 0x0003FFFF, 0x02, \_SB.PCI0.LNKD, 0x00 }, 
-                    Package (0x04) { 0x0003FFFF, 0x03, \_SB.PCI0.LNKA, 0x00 }, 
+                    Package (0x04) { 0x0003FFFF, 0x00, \_SB.PCI0.LNKB, 0x00 },
+                    Package (0x04) { 0x0003FFFF, 0x01, \_SB.PCI0.LNKC, 0x00 },
+                    Package (0x04) { 0x0003FFFF, 0x02, \_SB.PCI0.LNKD, 0x00 },
+                    Package (0x04) { 0x0003FFFF, 0x03, \_SB.PCI0.LNKA, 0x00 },

 
 

-                    Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI0.LNKC, 0x00 }, 
-                    Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI0.LNKD, 0x00 }, 
-                    Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI0.LNKA, 0x00 }, 
-                    Package (0x04) { 0x0004FFFF, 0x03, \_SB.PCI0.LNKB, 0x00 }, 
+                    Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI0.LNKC, 0x00 },
+                    Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI0.LNKD, 0x00 },
+                    Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI0.LNKA, 0x00 },
+                    Package (0x04) { 0x0004FFFF, 0x03, \_SB.PCI0.LNKB, 0x00 },

 
 

-                    Package (0x04) { 0x0005FFFF, 0x00, \_SB.PCI0.LNKD, 0x00 }, 
-                    Package (0x04) { 0x0005FFFF, 0x01, \_SB.PCI0.LNKA, 0x00 }, 
-                    Package (0x04) { 0x0005FFFF, 0x02, \_SB.PCI0.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0005FFFF, 0x03, \_SB.PCI0.LNKC, 0x00 }, 
+                    Package (0x04) { 0x0005FFFF, 0x00, \_SB.PCI0.LNKD, 0x00 },
+                    Package (0x04) { 0x0005FFFF, 0x01, \_SB.PCI0.LNKA, 0x00 },
+                    Package (0x04) { 0x0005FFFF, 0x02, \_SB.PCI0.LNKB, 0x00 },
+                    Package (0x04) { 0x0005FFFF, 0x03, \_SB.PCI0.LNKC, 0x00 },

 
 

-                    Package (0x04) { 0x0006FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 }, 
-                    Package (0x04) { 0x0006FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0006FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, 
+                    Package (0x04) { 0x0006FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },
+                    Package (0x04) { 0x0006FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 },
+                    Package (0x04) { 0x0006FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 },

                     Package (0x04) { 0x0006FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }
                 })
                 Method (_PRT, 0, NotSerialized)
                     Package (0x04) { 0x0006FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }
                 })
                 Method (_PRT, 0, NotSerialized)


@@ -100,15 +100,15 @@
                 {
                    // Slot A - PIRQ ABCD
                     Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x1F },// Slot 1
                 {
                    // Slot A - PIRQ ABCD
                     Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x1F },// Slot 1

-                    Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x20 }, 
-                    Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x21 }, 
+                    Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x20 },
+                    Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x21 },

                     Package (0x04) { 0x0001FFFF, 0x03, 0x00, 0x22 }
                 })
                 Name (PICM, Package (0x04)
                 {
                     Package (0x04) { 0x0001FFFF, 0x03, 0x00, 0x22 }
                 })
                 Name (PICM, Package (0x04)
                 {

-                    Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 1 
-                    Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0001FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, 
+                    Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 1
+                    Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 },
+                    Package (0x04) { 0x0001FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 },

                     Package (0x04) { 0x0001FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }
                 })
                 Method (_PRT, 0, NotSerialized)
                     Package (0x04) { 0x0001FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }
                 })
                 Method (_PRT, 0, NotSerialized)

diff --git a/src/mainboard/amd/serengeti_cheetah/acpi/amd8131_2.asl b/src/mainboard/amd/serengeti_cheetah/acpi/amd8131_2.asl
index 163c0f6061d32d812143d939bf6c93d05bd83ea4..8b8bc9fab9c8316e660d556abe9ce38dd5f8d07c 100644 (file)
--- a/src/mainboard/amd/serengeti_cheetah/acpi/amd8131_2.asl
+++ b/src/mainboard/amd/serengeti_cheetah/acpi/amd8131_2.asl
@@ -1,7 +1,7 @@
 /*
  * Copyright 2005 AMD
  */
 /*
  * Copyright 2005 AMD
  */

-               
+

             Device (PG0A)
             {
                 /*  8132 pcix bridge*/
             Device (PG0A)
             {
                 /*  8132 pcix bridge*/


@@ -19,18 +19,18 @@
                 Name (APIC, Package (0x04)
                 {
                    // Slot A - PIRQ BCDA
                 Name (APIC, Package (0x04)
                 {
                    // Slot A - PIRQ BCDA

-                    Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x0018 }, //Slot 2 
-                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0019 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x001A }, 
+                    Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x0018 }, //Slot 2
+                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0019 },
+                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x001A },

                     Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x001B },
                     Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x001B },

- 
+

                 })
                 Name (PICM, Package (0x04)
                 {
                 })
                 Name (PICM, Package (0x04)
                 {

-                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 2 
-                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, 
-                    Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }, 
+                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 2
+                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 },
+                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 },
+                    Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 },

                 })
 
                Name (DNCG, Ones)
                 })
 
                Name (DNCG, Ones)


@@ -40,7 +40,7 @@
                     If (LEqual (^DNCG, Ones)) {
                            Multiply (HCIN, 0x0008, Local2) // GSI for 8132 is 4 so we get 8
                            Store (0x00, Local1)
                     If (LEqual (^DNCG, Ones)) {
                            Multiply (HCIN, 0x0008, Local2) // GSI for 8132 is 4 so we get 8
                            Store (0x00, Local1)

-                           While (LLess (Local1, 0x04)) 
+                           While (LLess (Local1, 0x04))

                            {
                                // Update the GSI according to HCIN
                                Store(DeRefOf(Index (DeRefOf (Index (APIC, Local1)), 3)), Local0)
                            {
                                // Update the GSI according to HCIN
                                Store(DeRefOf(Index (DeRefOf (Index (APIC, Local1)), 3)), Local0)


@@ -76,15 +76,15 @@
                 {
                    // Slot A - PIRQ ABCD
                     Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x001F },// Slot 1
                 {
                    // Slot A - PIRQ ABCD
                     Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x001F },// Slot 1

-                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0020 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x0021 }, 
+                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0020 },
+                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x0021 },

                     Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x0022 }
                 })
                 Name (PICM, Package (0x04)
                 {
                     Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x0022 }
                 })
                 Name (PICM, Package (0x04)
                 {

-                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 1 
-                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, 
+                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 1
+                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 },
+                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 },

                     Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }
                 })
 
                     Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }
                 })
 

diff --git a/src/mainboard/amd/serengeti_cheetah/acpi/amd8132_2.asl b/src/mainboard/amd/serengeti_cheetah/acpi/amd8132_2.asl
index 75ef72343a36c869d97c9769ac7549b7f7082fa7..e5cfe3c951d9c18933123c41c2a5101e6a54fa49 100644 (file)
--- a/src/mainboard/amd/serengeti_cheetah/acpi/amd8132_2.asl
+++ b/src/mainboard/amd/serengeti_cheetah/acpi/amd8132_2.asl
@@ -1,7 +1,7 @@
 /*
  * Copyright 2005 AMD
  */
 /*
  * Copyright 2005 AMD
  */

-               
+

             Device (PG0A)
             {
                 /*  8132 pcix bridge*/
             Device (PG0A)
             {
                 /*  8132 pcix bridge*/


@@ -19,18 +19,18 @@
                 Name (APIC, Package (0x04)
                 {
                    // Slot A - PIRQ BCDA
                 Name (APIC, Package (0x04)
                 {
                    // Slot A - PIRQ BCDA

-                    Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x0018 }, //Slot 2 
-                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0019 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x001A }, 
+                    Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x0018 }, //Slot 2
+                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0019 },
+                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x001A },

                     Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x001B },
                     Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x001B },

- 
+

                 })
                 Name (PICM, Package (0x04)
                 {
                 })
                 Name (PICM, Package (0x04)
                 {

-                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 2 
-                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, 
-                    Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }, 
+                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 2
+                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 },
+                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 },
+                    Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 },

                 })
 
                Name (DNCG, Ones)
                 })
 
                Name (DNCG, Ones)


@@ -40,7 +40,7 @@
                     If (LEqual (^DNCG, Ones)) {
                            Multiply (HCIN, 0x000e, Local2) // GSI for 8132 is 7 so we get 14
                            Store (0x00, Local1)
                     If (LEqual (^DNCG, Ones)) {
                            Multiply (HCIN, 0x000e, Local2) // GSI for 8132 is 7 so we get 14
                            Store (0x00, Local1)

-                           While (LLess (Local1, 0x04)) 
+                           While (LLess (Local1, 0x04))

                            {
                                // Update the GSI according to HCIN
                                Store(DeRefOf(Index (DeRefOf (Index (APIC, Local1)), 3)), Local0)
                            {
                                // Update the GSI according to HCIN
                                Store(DeRefOf(Index (DeRefOf (Index (APIC, Local1)), 3)), Local0)


@@ -76,15 +76,15 @@
                 {
                    // Slot A - PIRQ ABCD
                     Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x001F },// Slot 1
                 {
                    // Slot A - PIRQ ABCD
                     Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x001F },// Slot 1

-                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0020 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x0021 }, 
+                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0020 },
+                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x0021 },

                     Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x0022 }
                 })
                 Name (PICM, Package (0x04)
                 {
                     Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x0022 }
                 })
                 Name (PICM, Package (0x04)
                 {

-                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 1 
-                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, 
+                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 1
+                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 },
+                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 },

                     Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }
                 })
 
                     Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }
                 })
 

diff --git a/src/mainboard/amd/serengeti_cheetah/acpi/amd8151.asl b/src/mainboard/amd/serengeti_cheetah/acpi/amd8151.asl
index 001d45b0fe1dfa30ce2b52d6544440ef95dc3b9d..ce85502296640f6966459c8b3c2b64fca0abb916 100644 (file)
--- a/src/mainboard/amd/serengeti_cheetah/acpi/amd8151.asl
+++ b/src/mainboard/amd/serengeti_cheetah/acpi/amd8151.asl
@@ -1,4 +1,4 @@
-// AMD8151 
+// AMD8151

             Device (AGPB)
             {
                 Method (_ADR, 0, NotSerialized)
             Device (AGPB)
             {
                 Method (_ADR, 0, NotSerialized)


@@ -8,16 +8,16 @@
 
                 Name (APIC, Package (0x04)
                 {
 
                 Name (APIC, Package (0x04)
                 {

-                    Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x10 }, 
-                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x11 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x12 }, 
+                    Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x10 },
+                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x11 },
+                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x12 },

                     Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x13 }
                 })
                 Name (PICM, Package (0x04)
                 {
                     Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x13 }
                 })
                 Name (PICM, Package (0x04)
                 {

-                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 }, 
-                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, 
+                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },
+                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 },
+                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 },

                     Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }
                 })
                 Method (_PRT, 0, NotSerialized)
                     Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }
                 })
                 Method (_PRT, 0, NotSerialized)

diff --git a/src/mainboard/amd/serengeti_cheetah/ap_romstage.c b/src/mainboard/amd/serengeti_cheetah/ap_romstage.c
index c2b8e8c7b3ca94220bc22bd938ef1837933da8e4..f132ec727cc5f158803c8a78710a078230314661 100644 (file)
--- a/src/mainboard/amd/serengeti_cheetah/ap_romstage.c
+++ b/src/mainboard/amd/serengeti_cheetah/ap_romstage.c
@@ -4,7 +4,7 @@
 #define RAMINIT_SYSINFO 1
 #define CACHE_AS_RAM_ADDRESS_DEBUG 0
 
 #define RAMINIT_SYSINFO 1
 #define CACHE_AS_RAM_ADDRESS_DEBUG 0
 

-#define SET_NB_CFG_54 1 
+#define SET_NB_CFG_54 1

 
 //used by raminit
 #define QRANK_DIMM_SUPPORT 1
 
 //used by raminit
 #define QRANK_DIMM_SUPPORT 1

diff --git a/src/mainboard/amd/serengeti_cheetah/devicetree.cb b/src/mainboard/amd/serengeti_cheetah/devicetree.cb
index b9742b4a4667fd4290e2f20e5f0fa3d7cb0bbde3..c1748697f447c69cfd4986d4f0b549f96b269cdd 100644 (file)
--- a/src/mainboard/amd/serengeti_cheetah/devicetree.cb
+++ b/src/mainboard/amd/serengeti_cheetah/devicetree.cb
@@ -6,7 +6,7 @@ chip northbridge/amd/amdk8/root_complex
         end
        device pci_domain 0 on
                chip northbridge/amd/amdk8
         end
        device pci_domain 0 on
                chip northbridge/amd/amdk8

-                       device pci 18.0 on #  northbridge 
+                       device pci 18.0 on #  northbridge

                                #  devices on link 0, link 0 == LDT 0
                                chip southbridge/amd/amd8132
                                        # the on/off keyword is mandatory
                                #  devices on link 0, link 0 == LDT 0
                                chip southbridge/amd/amd8132
                                        # the on/off keyword is mandatory


@@ -56,7 +56,7 @@ chip northbridge/amd/amdk8/root_complex
                                                                io 0x60 = 0x220
                                                                io 0x62 = 0x300
                                                                irq 0x70 = 9
                                                                io 0x60 = 0x220
                                                                io 0x62 = 0x300
                                                                irq 0x70 = 9

-                                                       end                                             
+                                                       end

                                                        device pnp 2e.8 off end #  GPIO2
                                                        device pnp 2e.9 off end #  GPIO3
                                                        device pnp 2e.a off end #  ACPI
                                                        device pnp 2e.8 off end #  GPIO2
                                                        device pnp 2e.9 off end #  GPIO3
                                                        device pnp 2e.a off end #  ACPI


@@ -120,7 +120,7 @@ chip northbridge/amd/amdk8/root_complex
                        end #  device pci 18.0
 
                         device pci 18.0 on end
                        end #  device pci 18.0
 
                         device pci 18.0 on end

-                        device pci 18.0 on end  
+                        device pci 18.0 on end

                        device pci 18.1 on end
                        device pci 18.2 on end
                        device pci 18.3 on end
                        device pci 18.1 on end
                        device pci 18.2 on end
                        device pci 18.3 on end

diff --git a/src/mainboard/amd/serengeti_cheetah/dsdt.asl b/src/mainboard/amd/serengeti_cheetah/dsdt.asl
index ee87023ff86bd524ae8ea3f20fb1c72dbd5417e9..a549d70297629f22db7ac3896636963f7266a78d 100644 (file)
--- a/src/mainboard/amd/serengeti_cheetah/dsdt.asl
+++ b/src/mainboard/amd/serengeti_cheetah/dsdt.asl
@@ -100,11 +100,11 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMD-K8", "AMDACPI", 100925440)
                 Concatenate (\_SB.GMEM (0x00, \_SB.PCI0.SBLK), BUF0, Local1)
                 Concatenate (\_SB.GIOR (0x00, \_SB.PCI0.SBLK), Local1, Local2)
                 Concatenate (\_SB.GWBN (0x00, \_SB.PCI0.SBLK), Local2, Local3)
                 Concatenate (\_SB.GMEM (0x00, \_SB.PCI0.SBLK), BUF0, Local1)
                 Concatenate (\_SB.GIOR (0x00, \_SB.PCI0.SBLK), Local1, Local2)
                 Concatenate (\_SB.GWBN (0x00, \_SB.PCI0.SBLK), Local2, Local3)

-                Return (Local3) 
+                Return (Local3)

            }
 
            #include "acpi/pci0_hc.asl"
            }
 
            #include "acpi/pci0_hc.asl"

-               
+

         }
         Device (PCI1)
         {
         }
         Device (PCI1)
         {


@@ -138,7 +138,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMD-K8", "AMDACPI", 100925440)
             Notify (\_SB.PCI0.PG0B, 0x02)
         }
 
             Notify (\_SB.PCI0.PG0B, 0x02)
         }
 

-        Method (_L29, 0, NotSerialized) // GPIO25 (Suspend) - Pogo 0 Bridge A 
+        Method (_L29, 0, NotSerialized) // GPIO25 (Suspend) - Pogo 0 Bridge A

         {
             Notify (\_SB.PCI0.PG0A, 0x02)
         }
         {
             Notify (\_SB.PCI0.PG0A, 0x02)
         }


@@ -183,14 +183,14 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMD-K8", "AMDACPI", 100925440)
     OperationRegion (GRAM, SystemMemory, 0x0400, 0x0100)
     Field (GRAM, ByteAcc, Lock, Preserve)
     {
     OperationRegion (GRAM, SystemMemory, 0x0400, 0x0100)
     Field (GRAM, ByteAcc, Lock, Preserve)
     {

-        Offset (0x10), 
+        Offset (0x10),

         FLG0,   8
     }
 
     OperationRegion (GSTS, SystemIO, 0xC028, 0x02)
     Field (GSTS, ByteAcc, NoLock, Preserve)
     {
         FLG0,   8
     }
 
     OperationRegion (GSTS, SystemIO, 0xC028, 0x02)
     Field (GSTS, ByteAcc, NoLock, Preserve)
     {

-            ,   4, 
+            ,   4,

         IRQR,   1
     }
 
         IRQR,   1
     }
 

diff --git a/src/mainboard/amd/serengeti_cheetah/fadt.c b/src/mainboard/amd/serengeti_cheetah/fadt.c
index d4c66228475716118fcc2af6b599cddfe65651ab..6b6107070b257a681cf3e6bbc215f5b765eb3dfb 100644 (file)
--- a/src/mainboard/amd/serengeti_cheetah/fadt.c
+++ b/src/mainboard/amd/serengeti_cheetah/fadt.c
@@ -30,7 +30,7 @@ void acpi_create_fadt(acpi_fadt_t *fadt,acpi_facs_t *facs,void *dsdt){
        // 3=Workstation,4=Enterprise Server, 7=Performance Server
        fadt->preferred_pm_profile=0x03;
        fadt->sci_int=9;
        // 3=Workstation,4=Enterprise Server, 7=Performance Server
        fadt->preferred_pm_profile=0x03;
        fadt->sci_int=9;

-       // disable system management mode by setting to 0: 
+       // disable system management mode by setting to 0:

        fadt->smi_cmd = 0;//pm_base+0x2f;
        fadt->acpi_enable = 0xf0;
        fadt->acpi_disable = 0xf1;
        fadt->smi_cmd = 0;//pm_base+0x2f;
        fadt->acpi_enable = 0xf0;
        fadt->acpi_disable = 0xf1;


@@ -53,7 +53,7 @@ void acpi_create_fadt(acpi_fadt_t *fadt,acpi_facs_t *facs,void *dsdt){
        fadt->gpe0_blk_len =  4;
        fadt->gpe1_blk_len =  8;
        fadt->gpe1_base    = 16;
        fadt->gpe0_blk_len =  4;
        fadt->gpe1_blk_len =  8;
        fadt->gpe1_base    = 16;

-       
+

        fadt->cst_cnt    = 0xe3;
        fadt->p_lvl2_lat =  101;
        fadt->p_lvl3_lat = 1001;
        fadt->cst_cnt    = 0xe3;
        fadt->p_lvl2_lat =  101;
        fadt->p_lvl3_lat = 1001;


@@ -66,7 +66,7 @@ void acpi_create_fadt(acpi_fadt_t *fadt,acpi_facs_t *facs,void *dsdt){
        fadt->century =  0; // 0x7f to make rtc alrm work
        fadt->iapc_boot_arch = 0x3; // See table 5-11
        fadt->flags = 0x25;
        fadt->century =  0; // 0x7f to make rtc alrm work
        fadt->iapc_boot_arch = 0x3; // See table 5-11
        fadt->flags = 0x25;

-       
+

        fadt->res2 = 0;
 
        fadt->reset_reg.space_id = 1;
        fadt->res2 = 0;
 
        fadt->reset_reg.space_id = 1;

diff --git a/src/mainboard/amd/serengeti_cheetah/get_bus_conf.c b/src/mainboard/amd/serengeti_cheetah/get_bus_conf.c
index 436044e69a05de82f317e1f5d9b71f110929be45..3674ff007635445d22d9706649b70f82d9bd2002 100644 (file)
--- a/src/mainboard/amd/serengeti_cheetah/get_bus_conf.c
+++ b/src/mainboard/amd/serengeti_cheetah/get_bus_conf.c
@@ -15,7 +15,7 @@
 // Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
 struct mb_sysconf_t mb_sysconf;
 
 // Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
 struct mb_sysconf_t mb_sysconf;
 

-static unsigned pci1234x[] = 
+static unsigned pci1234x[] =

 {        //Here you only need to set value in pci1234 for HT-IO that could be installed or not
         //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
         0x0000ff0,
 {        //Here you only need to set value in pci1234 for HT-IO that could be installed or not
         //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
         0x0000ff0,


@@ -27,7 +27,7 @@ static unsigned pci1234x[] =
 //        0x0000ff0,
 //        0x0000ff0
 };
 //        0x0000ff0,
 //        0x0000ff0
 };

-static unsigned hcdnx[] = 
+static unsigned hcdnx[] =

 { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
        0x20202020,
        0x20202020,
 { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
        0x20202020,
        0x20202020,


@@ -88,17 +88,17 @@ void get_bus_conf(void)
        get_bus_conf_done = 1;
 
        sysconf.mb = &mb_sysconf;
        get_bus_conf_done = 1;
 
        sysconf.mb = &mb_sysconf;

-       
+

        m = sysconf.mb;
 
        m = sysconf.mb;
 

-       sysconf.hc_possible_num = ARRAY_SIZE(pci1234x); 
+       sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);

        for(i=0;i<sysconf.hc_possible_num; i++) {
                sysconf.pci1234[i] = pci1234x[i];
                sysconf.hcdn[i] = hcdnx[i];
        }
        for(i=0;i<sysconf.hc_possible_num; i++) {
                sysconf.pci1234[i] = pci1234x[i];
                sysconf.hcdn[i] = hcdnx[i];
        }

-       
+

        get_sblk_pci1234();
        get_sblk_pci1234();

-       
+

        sysconf.sbdn = (sysconf.hcdn[0] >> 8) & 0xff;
        m->sbdn3 = sysconf.hcdn[0] & 0xff;
 
        sysconf.sbdn = (sysconf.hcdn[0] >> 8) & 0xff;
        m->sbdn3 = sysconf.hcdn[0] & 0xff;
 


@@ -209,8 +209,8 @@ void get_bus_conf(void)
 /*I/O APICs:   APIC ID Version State           Address*/
 #if CONFIG_LOGICAL_CPUS==1
        apicid_base = get_apicid_base(3);
 /*I/O APICs:   APIC ID Version State           Address*/
 #if CONFIG_LOGICAL_CPUS==1
        apicid_base = get_apicid_base(3);

-#else 
-       apicid_base = CONFIG_MAX_PHYSICAL_CPUS; 
+#else
+       apicid_base = CONFIG_MAX_PHYSICAL_CPUS;

 #endif
        m->apicid_8111 = apicid_base+0;
        m->apicid_8132_1 = apicid_base+1;
 #endif
        m->apicid_8111 = apicid_base+0;
        m->apicid_8132_1 = apicid_base+1;

diff --git a/src/mainboard/amd/serengeti_cheetah/irq_tables.c b/src/mainboard/amd/serengeti_cheetah/irq_tables.c
index d872b0a0db728b7887f42aec3c709345f480b484..637f980055abaee13df3b4fc588ed0714866db0c 100644 (file)
--- a/src/mainboard/amd/serengeti_cheetah/irq_tables.c
+++ b/src/mainboard/amd/serengeti_cheetah/irq_tables.c
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!

    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 
    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 


@@ -13,11 +13,11 @@
 
 #include "mb_sysconf.h"
 
 
 #include "mb_sysconf.h"
 

-static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0, 
+static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,

                uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
                uint8_t slot, uint8_t rfu)
 {
                uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
                uint8_t slot, uint8_t rfu)
 {

-        pirq_info->bus = bus; 
+        pirq_info->bus = bus;

         pirq_info->devfn = devfn;
 
        pirq_info->irq[0].link = link0;
         pirq_info->devfn = devfn;
 
        pirq_info->irq[0].link = link0;


@@ -50,7 +50,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
        struct mb_sysconf_t *m;
 
        get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c
        struct mb_sysconf_t *m;
 
        get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c

-       
+

        m = sysconf.mb;
 
         /* Align the table to be 16 byte aligned. */
        m = sysconf.mb;
 
         /* Align the table to be 16 byte aligned. */


@@ -62,25 +62,25 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 
        pirq = (void *)(addr);
        v = (uint8_t *)(addr);
 
        pirq = (void *)(addr);
        v = (uint8_t *)(addr);

-       
+

        pirq->signature = PIRQ_SIGNATURE;
        pirq->version  = PIRQ_VERSION;
        pirq->signature = PIRQ_SIGNATURE;
        pirq->version  = PIRQ_VERSION;

-       
+

        pirq->rtr_bus = m->bus_8111_0;
        pirq->rtr_devfn = ((sysconf.sbdn+1)<<3)|0;
 
        pirq->exclusive_irqs = 0;
        pirq->rtr_bus = m->bus_8111_0;
        pirq->rtr_devfn = ((sysconf.sbdn+1)<<3)|0;
 
        pirq->exclusive_irqs = 0;

-       
+

        pirq->rtr_vendor = 0x1022;
        pirq->rtr_device = 0x746b;
 
        pirq->miniport_data = 0;
 
        memset(pirq->rfu, 0, sizeof(pirq->rfu));
        pirq->rtr_vendor = 0x1022;
        pirq->rtr_device = 0x746b;
 
        pirq->miniport_data = 0;
 
        memset(pirq->rfu, 0, sizeof(pirq->rfu));

-       
+

        pirq_info = (void *) ( &pirq->checksum + 1);
        slot_num = 0;
        pirq_info = (void *) ( &pirq->checksum + 1);
        slot_num = 0;

-       
+

         {
                 device_t dev;
                 dev = dev_find_slot(m->bus_8111_0, PCI_DEVFN(sysconf.sbdn+1,3));
         {
                 device_t dev;
                 dev = dev_find_slot(m->bus_8111_0, PCI_DEVFN(sysconf.sbdn+1,3));


@@ -126,11 +126,11 @@ unsigned long write_pirq_routing_table(unsigned long addr)
                 j++;
 
         }
                 j++;
 
         }

-       
-       pirq->size = 32 + 16 * slot_num; 
+
+       pirq->size = 32 + 16 * slot_num;

 
         for (i = 0; i < pirq->size; i++)
 
         for (i = 0; i < pirq->size; i++)

-                sum += v[i];   
+                sum += v[i];

 
        sum = pirq->checksum - sum;
 
 
        sum = pirq->checksum - sum;
 

diff --git a/src/mainboard/amd/serengeti_cheetah/mptable.c b/src/mainboard/amd/serengeti_cheetah/mptable.c
index 2b2f65c39b4a9f11f17ceff16620461f06cb0d20..fe2f9440e24e9ef30956d730f9961f4870495876 100644 (file)
--- a/src/mainboard/amd/serengeti_cheetah/mptable.c
+++ b/src/mainboard/amd/serengeti_cheetah/mptable.c
@@ -101,8 +101,8 @@ static void *smp_write_config_table(void *v)
                 }
 
        }
                 }
 
        }

-  
-/*I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN# */ 
+
+/*I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN# */

        smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, m->apicid_8111, 0x0);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x1, m->apicid_8111, 0x1);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x0, m->apicid_8111, 0x2);
        smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, m->apicid_8111, 0x0);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x1, m->apicid_8111, 0x1);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x0, m->apicid_8111, 0x2);

diff --git a/src/mainboard/amd/serengeti_cheetah/readme_acpi.txt b/src/mainboard/amd/serengeti_cheetah/readme_acpi.txt
index 41988c8ededc3f81e5be14cb804d490e14a8df11..685cd7a2ce150a929db8939d44aa07a0f1264449 100644 (file)
--- a/src/mainboard/amd/serengeti_cheetah/readme_acpi.txt
+++ b/src/mainboard/amd/serengeti_cheetah/readme_acpi.txt
@@ -6,7 +6,7 @@ At this time, For acpi support We got
 
 The developers need to change for different MB
 
 
 The developers need to change for different MB
 

-Change dsdt.asl, according to MB layout 
+Change dsdt.asl, according to MB layout

        pci1, pci2, pci3, pci4, ...., pci8
        if there is HT-IO board, may use pci2.asl.... to create ssdt2.c, and ssdt3,c and ssdt4.c, ....ssdt8.c
 
        pci1, pci2, pci3, pci4, ...., pci8
        if there is HT-IO board, may use pci2.asl.... to create ssdt2.c, and ssdt3,c and ssdt4.c, ....ssdt8.c
 


@@ -17,7 +17,7 @@ Change acpi_tables.c
 Regarding pci bridge apic and pic
        need to modify entries amd8111.asl and amd8131.asl and amd8151.asl.... acording to your MB laybout, it is like that in mptable.c
 
 Regarding pci bridge apic and pic
        need to modify entries amd8111.asl and amd8131.asl and amd8151.asl.... acording to your MB laybout, it is like that in mptable.c
 

-About other chipsets, need to develop their special asl such as 
+About other chipsets, need to develop their special asl such as

        ck804.asl  --- NB ck804
        bcm5785.asl or bcm5780.asl ---- Serverworks HT1000/HT2000
 
        ck804.asl  --- NB ck804
        bcm5785.asl or bcm5780.asl ---- Serverworks HT1000/HT2000
 


@@ -27,4 +27,4 @@ use c to delele hex file
 yhlu
 
 09/18/2005
 yhlu
 
 09/18/2005

-       
+

diff --git a/src/mainboard/amd/serengeti_cheetah/resourcemap.c b/src/mainboard/amd/serengeti_cheetah/resourcemap.c
index 9b19503360c9d02c6849ce8975c9b595a565b11a..be11b689da84724a5af6f6cc9e2c7de2bddeaabb 100644 (file)
--- a/src/mainboard/amd/serengeti_cheetah/resourcemap.c
+++ b/src/mainboard/amd/serengeti_cheetah/resourcemap.c
@@ -143,7 +143,7 @@ static void setup_mb_resource_map(void)
                 *         1 = base/limit registers i are read-only
                 * [ 7: 4] Reserved
                 * [31: 8] Memory-Mapped I/O Base Address i (39-16)
                 *         1 = base/limit registers i are read-only
                 * [ 7: 4] Reserved
                 * [31: 8] Memory-Mapped I/O Base Address i (39-16)

-                *         This field defines the upper address bits of a 40bit address 
+                *         This field defines the upper address bits of a 40bit address

                 *         that defines the start of memory-mapped I/O region i
                 */
                PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,
                 *         that defines the start of memory-mapped I/O region i
                 */
                PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,


@@ -199,7 +199,7 @@ static void setup_mb_resource_map(void)
                 * [ 3: 2] Reserved
                 * [ 4: 4] VGA Enable
                 *         0 = VGA matches Disabled
                 * [ 3: 2] Reserved
                 * [ 4: 4] VGA Enable
                 *         0 = VGA matches Disabled

-                *         1 = matches all address < 64K and where A[9:0] is in the 
+                *         1 = matches all address < 64K and where A[9:0] is in the

                 *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
                 * [ 5: 5] ISA Enable
                 *         0 = ISA matches Disabled
                 *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
                 * [ 5: 5] ISA Enable
                 *         0 = ISA matches Disabled


@@ -207,7 +207,7 @@ static void setup_mb_resource_map(void)
                 *             from matching agains this base/limit pair
                 * [11: 6] Reserved
                 * [24:12] PCI I/O Base i
                 *             from matching agains this base/limit pair
                 * [11: 6] Reserved
                 * [24:12] PCI I/O Base i

-                *         This field defines the start of PCI I/O region n 
+                *         This field defines the start of PCI I/O region n

                 * [31:25] Reserved
                 */
                PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000003,
                 * [31:25] Reserved
                 */
                PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000003,

diff --git a/src/mainboard/amd/serengeti_cheetah/romstage.c b/src/mainboard/amd/serengeti_cheetah/romstage.c
index 00d4b3b21abb740a64a2326ba3ed5d69e0f62a10..6fcaa908752ea27f140b825d18bdd3ce62d146e9 100644 (file)
--- a/src/mainboard/amd/serengeti_cheetah/romstage.c
+++ b/src/mainboard/amd/serengeti_cheetah/romstage.c
@@ -1,7 +1,7 @@
 #define RAMINIT_SYSINFO 1
 #define CACHE_AS_RAM_ADDRESS_DEBUG 0
 
 #define RAMINIT_SYSINFO 1
 #define CACHE_AS_RAM_ADDRESS_DEBUG 0
 

-#define SET_NB_CFG_54 1 
+#define SET_NB_CFG_54 1

 
 //used by raminit
 #define QRANK_DIMM_SUPPORT 1
 
 //used by raminit
 #define QRANK_DIMM_SUPPORT 1


@@ -107,7 +107,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 #include "lib/generic_sdram.c"
 
  /* tyan does not want the default */
 #include "lib/generic_sdram.c"
 
  /* tyan does not want the default */

-#include "resourcemap.c" 
+#include "resourcemap.c"

 
 #include "cpu/amd/dualcore/dualcore.c"
 
 
 #include "cpu/amd/dualcore/dualcore.c"
 


@@ -186,7 +186,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         console_init();
 
 //     dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE);
         console_init();
 
 //     dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE);

-       
+

        /* Halt if there was a built in self test failure */
        report_bist_failure(bist);
 
        /* Halt if there was a built in self test failure */
        report_bist_failure(bist);
 


@@ -201,21 +201,21 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n");
 
 #if CONFIG_MEM_TRAIN_SEQ == 1
        print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n");
 
 #if CONFIG_MEM_TRAIN_SEQ == 1

-        set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram 
+        set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram

 #endif
        setup_coherent_ht_domain(); // routing table and start other core0
 
        wait_all_core0_started();
 #if CONFIG_LOGICAL_CPUS==1
         // It is said that we should start core1 after all core0 launched
 #endif
        setup_coherent_ht_domain(); // routing table and start other core0
 
        wait_all_core0_started();
 #if CONFIG_LOGICAL_CPUS==1
         // It is said that we should start core1 after all core0 launched

-       /* becase optimize_link_coherent_ht is moved out from setup_coherent_ht_domain, 
+       /* becase optimize_link_coherent_ht is moved out from setup_coherent_ht_domain,

         * So here need to make sure last core0 is started, esp for two way system,
         * So here need to make sure last core0 is started, esp for two way system,

-        * (there may be apic id conflicts in that case) 
+        * (there may be apic id conflicts in that case)

         */
         start_other_cores();
        wait_all_other_cores_started(bsp_apicid);
 #endif
         */
         start_other_cores();
        wait_all_other_cores_started(bsp_apicid);
 #endif

-       
+

        /* it will set up chains and store link pair for optimization later */
         ht_setup_chains_x(sysinfo); // it will init sblnk and sbbusn, nodes, sbdn
 
        /* it will set up chains and store link pair for optimization later */
         ht_setup_chains_x(sysinfo); // it will init sblnk and sbbusn, nodes, sbdn
 


@@ -249,7 +249,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         {
                 msr_t msr;
                 msr=rdmsr(0xc0010042);
         {
                 msr_t msr;
                 msr=rdmsr(0xc0010042);

-                print_debug("end   msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n"); 
+                print_debug("end   msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n");

 
         }
 
 
         }
 

diff --git a/src/mainboard/amd/serengeti_cheetah/ssdt2.asl b/src/mainboard/amd/serengeti_cheetah/ssdt2.asl
index 582ef97621d6f20ccd8359175ff182768979905d..791454c190959855049289e3b76267d57e995cc0 100644 (file)
--- a/src/mainboard/amd/serengeti_cheetah/ssdt2.asl
+++ b/src/mainboard/amd/serengeti_cheetah/ssdt2.asl
@@ -28,16 +28,16 @@ DefinitionBlock ("SSDT2.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440)
 
            // BUS ? Second HT Chain
            Name (HCIN, 0xcc)  // HC2 0x01
 
            // BUS ? Second HT Chain
            Name (HCIN, 0xcc)  // HC2 0x01

-            
+

            Name (_UID,  0xdd)  // HC 0x03
 
            Name (_UID,  0xdd)  // HC 0x03
 

-           Name (_HID, "PNP0A03") 
+           Name (_HID, "PNP0A03")

 
             Method (_ADR, 0, NotSerialized) //Fake bus should be 0
            {
                Return (DADD(GHCN(HCIN), 0x00000000))
            }
 
             Method (_ADR, 0, NotSerialized) //Fake bus should be 0
            {
                Return (DADD(GHCN(HCIN), 0x00000000))
            }

-       
+

             Method (_BBN, 0, NotSerialized)
             {
                 Return (GBUS (GHCN(HCIN), GHCL(HCIN)))
             Method (_BBN, 0, NotSerialized)
             {
                 Return (GBUS (GHCN(HCIN), GHCL(HCIN)))


@@ -45,7 +45,7 @@ DefinitionBlock ("SSDT2.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440)
 
             Method (_STA, 0, NotSerialized)
             {
 
             Method (_STA, 0, NotSerialized)
             {

-                Return (\_SB.GHCE(HCIN)) 
+                Return (\_SB.GHCE(HCIN))

             }
 
             Method (_CRS, 0, NotSerialized)
             }
 
             Method (_CRS, 0, NotSerialized)

diff --git a/src/mainboard/amd/serengeti_cheetah/ssdt3.asl b/src/mainboard/amd/serengeti_cheetah/ssdt3.asl
index 583e94574010f5fe584bc16039eb4981cde680da..28fe5f45a3416a74f938f0995f205c837b8b1ac7 100644 (file)
--- a/src/mainboard/amd/serengeti_cheetah/ssdt3.asl
+++ b/src/mainboard/amd/serengeti_cheetah/ssdt3.asl
@@ -28,16 +28,16 @@ DefinitionBlock ("SSDT3.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440)
 
            // BUS ? Second HT Chain
            Name (HCIN, 0xcc)  // HC2 0x01
 
            // BUS ? Second HT Chain
            Name (HCIN, 0xcc)  // HC2 0x01

-            
+

            Name (_UID,  0xdd)  // HC 0x03
 
            Name (_UID,  0xdd)  // HC 0x03
 

-           Name (_HID, "PNP0A03") 
+           Name (_HID, "PNP0A03")

 
             Method (_ADR, 0, NotSerialized) //Fake bus should be 0
            {
                Return (DADD(GHCN(HCIN), 0x00000000))
            }
 
             Method (_ADR, 0, NotSerialized) //Fake bus should be 0
            {
                Return (DADD(GHCN(HCIN), 0x00000000))
            }

-       
+

             Method (_BBN, 0, NotSerialized)
             {
                 Return (GBUS (GHCN(HCIN), GHCL(HCIN)))
             Method (_BBN, 0, NotSerialized)
             {
                 Return (GBUS (GHCN(HCIN), GHCL(HCIN)))


@@ -45,7 +45,7 @@ DefinitionBlock ("SSDT3.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440)
 
             Method (_STA, 0, NotSerialized)
             {
 
             Method (_STA, 0, NotSerialized)
             {

-                Return (\_SB.GHCE(HCIN)) 
+                Return (\_SB.GHCE(HCIN))

             }
 
             Method (_CRS, 0, NotSerialized)
             }
 
             Method (_CRS, 0, NotSerialized)

diff --git a/src/mainboard/amd/serengeti_cheetah/ssdt4.asl b/src/mainboard/amd/serengeti_cheetah/ssdt4.asl
index fd7224d17ac64488812b47e5bebedaf5a47d2350..93abb7f5200c2e08e64ba68289f4ee39b4082a3d 100644 (file)
--- a/src/mainboard/amd/serengeti_cheetah/ssdt4.asl
+++ b/src/mainboard/amd/serengeti_cheetah/ssdt4.asl
@@ -28,16 +28,16 @@ DefinitionBlock ("SSDT4.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440)
 
            // BUS ? Second HT Chain
            Name (HCIN, 0xcc)  // HC2 0x01
 
            // BUS ? Second HT Chain
            Name (HCIN, 0xcc)  // HC2 0x01

-            
+

            Name (_UID,  0xdd)  // HC 0x03
 
            Name (_UID,  0xdd)  // HC 0x03
 

-           Name (_HID, "PNP0A03") 
+           Name (_HID, "PNP0A03")

 
             Method (_ADR, 0, NotSerialized) //Fake bus should be 0
            {
                Return (DADD(GHCN(HCIN), 0x00000000))
            }
 
             Method (_ADR, 0, NotSerialized) //Fake bus should be 0
            {
                Return (DADD(GHCN(HCIN), 0x00000000))
            }

-       
+

             Method (_BBN, 0, NotSerialized)
             {
                 Return (GBUS (GHCN(HCIN), GHCL(HCIN)))
             Method (_BBN, 0, NotSerialized)
             {
                 Return (GBUS (GHCN(HCIN), GHCL(HCIN)))


@@ -45,7 +45,7 @@ DefinitionBlock ("SSDT4.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440)
 
             Method (_STA, 0, NotSerialized)
             {
 
             Method (_STA, 0, NotSerialized)
             {

-                Return (\_SB.GHCE(HCIN)) 
+                Return (\_SB.GHCE(HCIN))

             }
 
             Method (_CRS, 0, NotSerialized)
             }
 
             Method (_CRS, 0, NotSerialized)

diff --git a/src/mainboard/arima/Kconfig b/src/mainboard/arima/Kconfig
index d1979b00a22b2f04a46c5155616863d1f79eccfe..8895433a5515d368b6eef280e929568f5dd0695e 100644 (file)
--- a/src/mainboard/arima/Kconfig
+++ b/src/mainboard/arima/Kconfig
@@ -1,7 +1,7 @@
 choice
        prompt "Mainboard model"
        depends on VENDOR_ARIMA
 choice
        prompt "Mainboard model"
        depends on VENDOR_ARIMA

-        
+

 source "src/mainboard/arima/hdama/Kconfig"
 
 endchoice
 source "src/mainboard/arima/hdama/Kconfig"
 
 endchoice

diff --git a/src/mainboard/arima/hdama/debug.c b/src/mainboard/arima/hdama/debug.c
index 0db327c5c6655f2b0fde0e0ff530d4d05d2800c6..a6f0d558a891807b7b1f753ba010946df8295c95 100644 (file)
--- a/src/mainboard/arima/hdama/debug.c
+++ b/src/mainboard/arima/hdama/debug.c
@@ -12,8 +12,8 @@ static void print_debug_pci_dev(unsigned dev)
 static void print_pci_devices(void)
 {
        device_t dev;
 static void print_pci_devices(void)
 {
        device_t dev;

-       for(dev = PCI_DEV(0, 0, 0); 
-               dev <= PCI_DEV(0, 0x1f, 0x7); 
+       for(dev = PCI_DEV(0, 0, 0);
+               dev <= PCI_DEV(0, 0x1f, 0x7);

                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);
                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);


@@ -32,7 +32,7 @@ static void dump_pci_device(unsigned dev)
        int i;
        print_debug_pci_dev(dev);
        print_debug("\n");
        int i;
        print_debug_pci_dev(dev);
        print_debug("\n");

-       
+

        for(i = 0; i <= 255; i++) {
                unsigned char val;
                if ((i & 0x0f) == 0) {
        for(i = 0; i <= 255; i++) {
                unsigned char val;
                if ((i & 0x0f) == 0) {


@@ -51,8 +51,8 @@ static void dump_pci_device(unsigned dev)
 static void dump_pci_devices(void)
 {
        device_t dev;
 static void dump_pci_devices(void)
 {
        device_t dev;

-       for(dev = PCI_DEV(0, 0, 0); 
-               dev <= PCI_DEV(0, 0x1f, 0x7); 
+       for(dev = PCI_DEV(0, 0, 0);
+               dev <= PCI_DEV(0, 0x1f, 0x7);

                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);
                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);


@@ -77,10 +77,10 @@ static void dump_spd_registers(int controllers, const struct mem_controller *ctr
                        device = ctrl[n].channel0[i];
                        if (device) {
                                int j;
                        device = ctrl[n].channel0[i];
                        if (device) {
                                int j;

-                               print_debug("dimm: "); 
+                               print_debug("dimm: ");

                                print_debug_hex8(n);
                                print_debug_char('.');
                                print_debug_hex8(n);
                                print_debug_char('.');

-                               print_debug_hex8(i); 
+                               print_debug_hex8(i);

                                print_debug(".0: ");
                                print_debug_hex8(device);
                                for(j = 0; j < 256; j++) {
                                print_debug(".0: ");
                                print_debug_hex8(device);
                                for(j = 0; j < 256; j++) {


@@ -109,10 +109,10 @@ static void dump_spd_registers(int controllers, const struct mem_controller *ctr
                        device = ctrl[n].channel1[i];
                        if (device) {
                                int j;
                        device = ctrl[n].channel1[i];
                        if (device) {
                                int j;

-                               print_debug("dimm: "); 
+                               print_debug("dimm: ");

                                print_debug_hex8(n);
                                print_debug_char('.');
                                print_debug_hex8(n);
                                print_debug_char('.');

-                               print_debug_hex8(i); 
+                               print_debug_hex8(i);

                                print_debug(".1: ");
                                print_debug_hex8(device);
                                for(j = 0; j < 256; j++) {
                                print_debug(".1: ");
                                print_debug_hex8(device);
                                for(j = 0; j < 256; j++) {

diff --git a/src/mainboard/arima/hdama/devicetree.cb b/src/mainboard/arima/hdama/devicetree.cb
index a8128147827dae3a506db0a7a4cd0b79ee448778..0ab47a4f0b28091fc2004b98847d8aa14b4850d6 100644 (file)
--- a/src/mainboard/arima/hdama/devicetree.cb
+++ b/src/mainboard/arima/hdama/devicetree.cb
@@ -6,14 +6,14 @@ chip northbridge/amd/amdk8/root_complex
        end
        device pci_domain 0 on
                chip northbridge/amd/amdk8
        end
        device pci_domain 0 on
                chip northbridge/amd/amdk8

-                       device pci 18.0 on #  northbridge 
-                               #  devices on link 0, link 0 == LDT 0 
+                       device pci 18.0 on #  northbridge
+                               #  devices on link 0, link 0 == LDT 0

                                chip southbridge/amd/amd8131
                                        # the on/off keyword is mandatory
                                        device pci 0.0 on       # PCIX bridge
                                                ## On board NIC A
                                                #chip drivers/generic/generic
                                chip southbridge/amd/amd8131
                                        # the on/off keyword is mandatory
                                        device pci 0.0 on       # PCIX bridge
                                                ## On board NIC A
                                                #chip drivers/generic/generic

-                                               #       device pci 3.0 on       
+                                               #       device pci 3.0 on

                                                #               irq 0 = 0x13
                                                #       end
                                                #end
                                                #               irq 0 = 0x13
                                                #       end
                                                #end


@@ -31,7 +31,7 @@ chip northbridge/amd/amdk8/root_complex
                                                #               irq 2 = 0x13
                                                #               irq 3 = 0x10
                                                #       end
                                                #               irq 2 = 0x13
                                                #               irq 3 = 0x10
                                                #       end

-                                               #end 
+                                               #end

                                                ## PCI Slot 4
                                                #chip drivers/generic/generic
                                                #       device pci 2.0 on
                                                ## PCI Slot 4
                                                #chip drivers/generic/generic
                                                #       device pci 2.0 on


@@ -40,7 +40,7 @@ chip northbridge/amd/amdk8/root_complex
                                                #               irq 2 = 0x10
                                                #               irq 3 = 0x11
                                                #       end
                                                #               irq 2 = 0x10
                                                #               irq 3 = 0x11
                                                #       end

-                                               #end 
+                                               #end

                                        end
                                        device pci 0.1 on end   # IOAPIC
                                        device pci 1.0 on       # PCIX bridge
                                        end
                                        device pci 0.1 on end   # IOAPIC
                                        device pci 1.0 on       # PCIX bridge


@@ -61,7 +61,7 @@ chip northbridge/amd/amdk8/root_complex
                                                #               irq 2 = 0x10
                                                #               irq 3 = 0x11
                                                #       end
                                                #               irq 2 = 0x10
                                                #               irq 3 = 0x11
                                                #       end

-                                               #end 
+                                               #end

                                        end
                                        device pci 1.1 on end   # IOAPIC
                                end
                                        end
                                        device pci 1.1 on end   # IOAPIC
                                end


@@ -82,7 +82,7 @@ chip northbridge/amd/amdk8/root_complex
                                                #               irq 2 = 0x13
                                                #               irq 3 = 0x10
                                                #       end
                                                #               irq 2 = 0x13
                                                #               irq 3 = 0x10
                                                #       end

-                                               #end 
+                                               #end

                                                ## PCI Slot 6 (correct?)
                                                #chip drivers/generic/generic
                                                #       device pci 4.0 on
                                                ## PCI Slot 6 (correct?)
                                                #chip drivers/generic/generic
                                                #       device pci 4.0 on


@@ -91,13 +91,13 @@ chip northbridge/amd/amdk8/root_complex
                                                #               irq 2 = 0x12
                                                #               irq 3 = 0x13
                                                #       end
                                                #               irq 2 = 0x12
                                                #               irq 3 = 0x13
                                                #       end

-                                               #end 
+                                               #end

 
                                        end
                                        # LPC bridge
                                        device pci 1.0 on
                                                chip superio/nsc/pc87360
 
                                        end
                                        # LPC bridge
                                        device pci 1.0 on
                                                chip superio/nsc/pc87360

-                                                       device  pnp 2e.0 off  # Floppy 
+                                                       device  pnp 2e.0 off  # Floppy

                                                                 io 0x60 = 0x3f0
                                                                irq 0x70 = 6
                                                                drq 0x74 = 2
                                                                 io 0x60 = 0x3f0
                                                                irq 0x70 = 6
                                                                drq 0x74 = 2


@@ -124,7 +124,7 @@ chip northbridge/amd/amdk8/root_complex
                                                        device pnp 2e.7 off end # GPIO
                                                        device pnp 2e.8 off end # ACB
                                                        device pnp 2e.9 off end # FSCM
                                                        device pnp 2e.7 off end # GPIO
                                                        device pnp 2e.8 off end # ACB
                                                        device pnp 2e.9 off end # FSCM

-                                                       device pnp 2e.a off end # WDT  
+                                                       device pnp 2e.a off end # WDT

                                                end
                                        end
                                        device pci 1.1 on end   # IDE
                                                end
                                        end
                                        device pci 1.1 on end   # IDE


@@ -132,8 +132,8 @@ chip northbridge/amd/amdk8/root_complex
                                        device pci 1.3 on       # System Management
                                                chip drivers/generic/generic
                                                        #phillips pca9545 smbus mux
                                        device pci 1.3 on       # System Management
                                                chip drivers/generic/generic
                                                        #phillips pca9545 smbus mux

-                                                       device i2c 70 on 
-                                                               # analog_devices adm1026        
+                                                       device i2c 70 on
+                                                               # analog_devices adm1026

                                                                chip drivers/generic/generic
                                                                        device i2c 2c on end
                                                                end
                                                                chip drivers/generic/generic
                                                                        device i2c 2c on end
                                                                end


@@ -147,33 +147,33 @@ chip northbridge/amd/amdk8/root_complex
                                                end
                                                chip drivers/generic/generic #dimm 0-0-1
                                                        device i2c 51 on end
                                                end
                                                chip drivers/generic/generic #dimm 0-0-1
                                                        device i2c 51 on end

-                                               end 
+                                               end

                                                chip drivers/generic/generic #dimm 0-1-0
                                                        device i2c 52 on end
                                                chip drivers/generic/generic #dimm 0-1-0
                                                        device i2c 52 on end

-                                               end 
+                                               end

                                                chip drivers/generic/generic #dimm 0-1-1
                                                        device i2c 53 on end
                                                chip drivers/generic/generic #dimm 0-1-1
                                                        device i2c 53 on end

-                                               end 
+                                               end

                                                chip drivers/generic/generic #dimm 1-0-0
                                                chip drivers/generic/generic #dimm 1-0-0

-                                                       device i2c 54 on end 
+                                                       device i2c 54 on end

                                                end
                                                chip drivers/generic/generic #dimm 1-0-1
                                                        device i2c 55 on end
                                                end
                                                chip drivers/generic/generic #dimm 1-0-1
                                                        device i2c 55 on end

-                                               end 
+                                               end

                                                chip drivers/generic/generic #dimm 1-1-0
                                                        device i2c 56 on end
                                                chip drivers/generic/generic #dimm 1-1-0
                                                        device i2c 56 on end

-                                               end 
+                                               end

                                                chip drivers/generic/generic #dimm 1-1-1
                                                        device i2c 57 on end
                                                chip drivers/generic/generic #dimm 1-1-1
                                                        device i2c 57 on end

-                                               end 
+                                               end

                                        end
                                        device pci 1.5 off end  # AC97 Audio
                                        device pci 1.6 on  end  # AC97 Modem
                                        register "ide0_enable" = "1"
                                        register "ide1_enable" = "1"
                                end
                                        end
                                        device pci 1.5 off end  # AC97 Audio
                                        device pci 1.6 on  end  # AC97 Modem
                                        register "ide0_enable" = "1"
                                        register "ide1_enable" = "1"
                                end

-                       end #  device pci 18.0 
-                       
+                       end #  device pci 18.0
+

                        device pci 18.0 on end # LDT1
                        device pci 18.0 on end # LDT2
                        device pci 18.1 on end
                        device pci 18.0 on end # LDT1
                        device pci 18.0 on end # LDT2
                        device pci 18.1 on end


@@ -188,6 +188,6 @@ chip northbridge/amd/amdk8/root_complex
                        device pci 19.2 on end
                        device pci 19.3 on end
                end
                        device pci 19.2 on end
                        device pci 19.3 on end
                end

-       end 
+       end

 end
 
 end
 

diff --git a/src/mainboard/arima/hdama/irq_tables.c b/src/mainboard/arima/hdama/irq_tables.c
index 2ca98066d0e6446394446459e10b5852a5d404e6..ba516f88e29afa16f0fae98132846e4821bcf913 100644 (file)
--- a/src/mainboard/arima/hdama/irq_tables.c
+++ b/src/mainboard/arima/hdama/irq_tables.c
@@ -12,7 +12,7 @@
        {linkc, AVAILABLE_IRQS}, {linkd, AVAILABLE_IRQS}}, slot, 0}
 
 /*  Each IRQ_SLOT entry consists of:
        {linkc, AVAILABLE_IRQS}, {linkd, AVAILABLE_IRQS}}, slot, 0}
 
 /*  Each IRQ_SLOT entry consists of:

- *  bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu  
+ *  bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu

  */
 
 const struct irq_routing_table intel_irq_routing_table = {
  */
 
 const struct irq_routing_table intel_irq_routing_table = {

diff --git a/src/mainboard/arima/hdama/mptable.c b/src/mainboard/arima/hdama/mptable.c
index 643dfabd5dd7e08da2fcc2a030b81f984f60fe45..11b8063f951a4c55fdc6e9c45de2857ebab60e89 100644 (file)
--- a/src/mainboard/arima/hdama/mptable.c
+++ b/src/mainboard/arima/hdama/mptable.c
@@ -4,7 +4,7 @@
 #include <string.h>
 #include <stdint.h>
 #include <cpu/x86/lapic.h>
 #include <string.h>
 #include <stdint.h>
 #include <cpu/x86/lapic.h>

-#include <arch/cpu.h>                                                                      
+#include <arch/cpu.h>

 #include <arch/io.h>
 
 #define HT_INIT_CONTROL 0x6c
 #include <arch/io.h>
 
 #define HT_INIT_CONTROL 0x6c


@@ -26,7 +26,7 @@ static void smp_write_processors_inorder(struct mp_config_table *mc)
         unsigned cpu_feature_flags;
         struct cpuid_result result;
         device_t cpu;
         unsigned cpu_feature_flags;
         struct cpuid_result result;
         device_t cpu;

-                                                                                
+

         boot_apic_id = lapicid();
         apic_version = lapic_read(LAPIC_LVR) & 0xff;
         result = cpuid(1);
         boot_apic_id = lapicid();
         apic_version = lapic_read(LAPIC_LVR) & 0xff;
         result = cpuid(1);


@@ -57,7 +57,7 @@ static void smp_write_processors_inorder(struct mp_config_table *mc)
             }
        }
 }
             }
        }
 }

-                                                                                
+

 static unsigned node_link_to_bus(unsigned node, unsigned link)
 {
        device_t dev;
 static unsigned node_link_to_bus(unsigned node, unsigned link)
 {
        device_t dev;


@@ -79,12 +79,12 @@ static unsigned node_link_to_bus(unsigned node, unsigned link)
                dst_node = (config_map >> 4) & 7;
                dst_link = (config_map >> 8) & 3;
                bus_base = (config_map >> 16) & 0xff;
                dst_node = (config_map >> 4) & 7;
                dst_link = (config_map >> 8) & 3;
                bus_base = (config_map >> 16) & 0xff;

-#if 0                          
+#if 0

                printk(BIOS_DEBUG, "node.link=bus: %d.%d=%d 0x%2x->0x%08x\n",
                        dst_node, dst_link, bus_base,
                        reg, config_map);
 #endif
                printk(BIOS_DEBUG, "node.link=bus: %d.%d=%d 0x%2x->0x%08x\n",
                        dst_node, dst_link, bus_base,
                        reg, config_map);
 #endif

-               if ((dst_node == node) && (dst_link == link)) 
+               if ((dst_node == node) && (dst_link == link))

                {
                        return bus_base;
                }
                {
                        return bus_base;
                }

diff --git a/src/mainboard/artecgroup/Kconfig b/src/mainboard/artecgroup/Kconfig
index 5f1a6e906f42fced98b5129e7ea84d29ade5e774..e95e56a0558fedc44cfad58f4f3c6617e1a7bace 100644 (file)
--- a/src/mainboard/artecgroup/Kconfig
+++ b/src/mainboard/artecgroup/Kconfig
@@ -1,7 +1,7 @@
 choice
        prompt "Mainboard model"
        depends on VENDOR_ARTEC_GROUP
 choice
        prompt "Mainboard model"
        depends on VENDOR_ARTEC_GROUP

-        
+

 source "src/mainboard/artecgroup/dbe61/Kconfig"
 
 endchoice
 source "src/mainboard/artecgroup/dbe61/Kconfig"
 
 endchoice

diff --git a/src/mainboard/artecgroup/dbe61/spd_table.h b/src/mainboard/artecgroup/dbe61/spd_table.h
index 33c92378367d028927d83def94fbb89232fbb429..73c777c9c425963033f201793f98c92e9de818eb 100644 (file)
--- a/src/mainboard/artecgroup/dbe61/spd_table.h
+++ b/src/mainboard/artecgroup/dbe61/spd_table.h
@@ -27,7 +27,7 @@ struct spd_entry {
 
 /* Save space by using a short list of SPD values used by Geode LX Memory init */
 /* 128MB */
 
 /* Save space by using a short list of SPD values used by Geode LX Memory init */
 /* 128MB */

-const struct spd_entry spd_table [] = 
+const struct spd_entry spd_table [] =

 {
 {SPD_MEMORY_TYPE,                     0x07}, /* (Fundamental) memory type */
 {SPD_NUM_ROWS,                        0x0D}, /* Number of row address bits */
 {
 {SPD_MEMORY_TYPE,                     0x07}, /* (Fundamental) memory type */
 {SPD_NUM_ROWS,                        0x0D}, /* Number of row address bits */

diff --git a/src/mainboard/asus/a8n_e/irq_tables.c b/src/mainboard/asus/a8n_e/irq_tables.c
index 0c0d3467a2c1bfdd4fee3386d8045573d126988c..ce15efd1a8752a74c9552105f8b8bd6b55c8ff7c 100644 (file)
--- a/src/mainboard/asus/a8n_e/irq_tables.c
+++ b/src/mainboard/asus/a8n_e/irq_tables.c
@@ -67,7 +67,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
        uint8_t *v, sum = 0;
        int i;
 
        uint8_t *v, sum = 0;
        int i;
 

-       /* get_bus_conf() will find out all bus num and APIC that share with 
+       /* get_bus_conf() will find out all bus num and APIC that share with

         * mptable.c and mptable.c.
         */
        get_bus_conf();
         * mptable.c and mptable.c.
         */
        get_bus_conf();

diff --git a/src/mainboard/asus/a8v-e_se/acpi_tables.c b/src/mainboard/asus/a8v-e_se/acpi_tables.c
index de957a8f78b1b22e3f5ecb3375dc9edce7491e2b..e7e6bb40f756791fc6ba4f70922688d9b8b11055 100644 (file)
--- a/src/mainboard/asus/a8v-e_se/acpi_tables.c
+++ b/src/mainboard/asus/a8v-e_se/acpi_tables.c
@@ -2,7 +2,7 @@
  * This file is part of the coreboot project.
  *
  * Written by Stefan Reinauer <stepan@openbios.org>.
  * This file is part of the coreboot project.
  *
  * Written by Stefan Reinauer <stepan@openbios.org>.

- * ACPI FADT, FACS, and DSDT table support added by 
+ * ACPI FADT, FACS, and DSDT table support added by

  *
  * Copyright (C) 2004 Stefan Reinauer <stepan@openbios.org>
  * Copyright (C) 2005 Nick Barker <nick.barker9@btinternet.com>
  *
  * Copyright (C) 2004 Stefan Reinauer <stepan@openbios.org>
  * Copyright (C) 2005 Nick Barker <nick.barker9@btinternet.com>


@@ -71,7 +71,7 @@ unsigned long acpi_fill_madt(unsigned long current)
 
        /* IRQ0 -> APIC IRQ2. */
        current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
 
        /* IRQ0 -> APIC IRQ2. */
        current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)

-                                               current, 0, 0, 2, 0x0); 
+                                               current, 0, 0, 2, 0x0);

 
        /* Create all subtables for processors. */
        current = acpi_create_madt_lapic_nmis(current,
 
        /* Create all subtables for processors. */
        current = acpi_create_madt_lapic_nmis(current,

diff --git a/src/mainboard/asus/a8v-e_se/romstage.c b/src/mainboard/asus/a8v-e_se/romstage.c
index 3ec90f80107dc2ad8741eb4559a6c2c476dc9437..f571bae47228a9d5512be3c120579851821fcb51 100644 (file)
--- a/src/mainboard/asus/a8v-e_se/romstage.c
+++ b/src/mainboard/asus/a8v-e_se/romstage.c
@@ -5,7 +5,7 @@
  * (Written by Yinghai Lu <yinghailu@amd.com> for AMD)
  * Copyright (C) 2006 MSI
  * (Written by Bingxun Shi <bingxunshi@gmail.com> for MSI)
  * (Written by Yinghai Lu <yinghailu@amd.com> for AMD)
  * Copyright (C) 2006 MSI
  * (Written by Bingxun Shi <bingxunshi@gmail.com> for MSI)

- * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz> 
+ * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>

  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by


@@ -180,7 +180,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        };
        unsigned bsp_apicid = 0;
        int needs_reset = 0;
        };
        unsigned bsp_apicid = 0;
        int needs_reset = 0;

-       struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE 
+       struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE

                + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
 
        sio_init();
                + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
 
        sio_init();

diff --git a/src/mainboard/asus/m2v-mx_se/acpi_tables.c b/src/mainboard/asus/m2v-mx_se/acpi_tables.c
index 46a6c1f6a443d3e0ee2633654a3246912659f715..1862bc993fb85529788cc332771976a87820e9a7 100644 (file)
--- a/src/mainboard/asus/m2v-mx_se/acpi_tables.c
+++ b/src/mainboard/asus/m2v-mx_se/acpi_tables.c
@@ -2,7 +2,7 @@
  * This file is part of the coreboot project.
  *
  * Written by Stefan Reinauer <stepan@openbios.org>.
  * This file is part of the coreboot project.
  *
  * Written by Stefan Reinauer <stepan@openbios.org>.

- * ACPI FADT, FACS, and DSDT table support added by 
+ * ACPI FADT, FACS, and DSDT table support added by

  *
  * Copyright (C) 2004 Stefan Reinauer <stepan@openbios.org>
  * Copyright (C) 2005 Nick Barker <nick.barker9@btinternet.com>
  *
  * Copyright (C) 2004 Stefan Reinauer <stepan@openbios.org>
  * Copyright (C) 2005 Nick Barker <nick.barker9@btinternet.com>


@@ -73,7 +73,7 @@ unsigned long acpi_fill_madt(unsigned long current)
 
        /* IRQ0 -> APIC IRQ2. */
        current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
 
        /* IRQ0 -> APIC IRQ2. */
        current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)

-                                               current, 0, 0, 2, 0x0); 
+                                               current, 0, 0, 2, 0x0);

 
        /* Create all subtables for processors. */
        current = acpi_create_madt_lapic_nmis(current,
 
        /* Create all subtables for processors. */
        current = acpi_create_madt_lapic_nmis(current,

diff --git a/src/mainboard/asus/m2v-mx_se/dsdt.asl b/src/mainboard/asus/m2v-mx_se/dsdt.asl
index fd4d42d378ab4df2cb264cf984d6f7181f6e41f8..493f1d6c8f0f2f371339a9c2846542286fc91652 100644 (file)
--- a/src/mainboard/asus/m2v-mx_se/dsdt.asl
+++ b/src/mainboard/asus/m2v-mx_se/dsdt.asl
@@ -60,7 +60,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
                        Name (_ADR, 0x00)
                        Name (_UID, 0x00)
                        Name (_BBN, 0x00)
                        Name (_ADR, 0x00)
                        Name (_UID, 0x00)
                        Name (_BBN, 0x00)

-                       
+

                    External (BUSN)
                    External (MMIO)
                    External (PCIO)
                    External (BUSN)
                    External (MMIO)
                    External (PCIO)


@@ -95,7 +95,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
                                Concatenate (\_SB.GMEM (0x00, \_SB.PCI0.SBLK), BUF0, Local1)
                                Concatenate (\_SB.GIOR (0x00, \_SB.PCI0.SBLK), Local1, Local2)
                                Concatenate (\_SB.GWBN (0x00, \_SB.PCI0.SBLK), Local2, Local3)
                                Concatenate (\_SB.GMEM (0x00, \_SB.PCI0.SBLK), BUF0, Local1)
                                Concatenate (\_SB.GIOR (0x00, \_SB.PCI0.SBLK), Local1, Local2)
                                Concatenate (\_SB.GWBN (0x00, \_SB.PCI0.SBLK), Local2, Local3)

-                               Return (Local3) 
+                               Return (Local3)

                        }
 
                        /* PCI Routing Table */
                        }
 
                        /* PCI Routing Table */


@@ -185,7 +185,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
                                        /* two LSB bits are blink rate */
                                        LEDR,   2,
                                }
                                        /* two LSB bits are blink rate */
                                        LEDR,   2,
                                }

-                               
+

                                /* PS/2 keyboard (seems to be important for WinXP install) */
                                Device (KBD)
                                {
                                /* PS/2 keyboard (seems to be important for WinXP install) */
                                Device (KBD)
                                {

diff --git a/src/mainboard/asus/m2v-mx_se/romstage.c b/src/mainboard/asus/m2v-mx_se/romstage.c
index 04a52064376d0e2286dde42d030424341f6f5c34..ea9870798c08a7d56b6331660e6911baebb8370a 100644 (file)
--- a/src/mainboard/asus/m2v-mx_se/romstage.c
+++ b/src/mainboard/asus/m2v-mx_se/romstage.c
@@ -5,7 +5,7 @@
  * (Written by Yinghai Lu <yinghailu@amd.com> for AMD)
  * Copyright (C) 2006 MSI
  * (Written by Bingxun Shi <bingxunshi@gmail.com> for MSI)
  * (Written by Yinghai Lu <yinghailu@amd.com> for AMD)
  * Copyright (C) 2006 MSI
  * (Written by Bingxun Shi <bingxunshi@gmail.com> for MSI)

- * Copyright (C) 2008 Rudolf Marek <r.marek@assembler.cz> 
+ * Copyright (C) 2008 Rudolf Marek <r.marek@assembler.cz>

  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by

diff --git a/src/mainboard/asus/mew-vm/devicetree.cb b/src/mainboard/asus/mew-vm/devicetree.cb
index a5415a2bfe5d6bf20e02a34d4561cabb2a4e95a9..29d706c62a723c03da7db5878f3d281a37cfb7f4 100644 (file)
--- a/src/mainboard/asus/mew-vm/devicetree.cb
+++ b/src/mainboard/asus/mew-vm/devicetree.cb
@@ -1,5 +1,5 @@
 chip northbridge/intel/i82810
 chip northbridge/intel/i82810

-       device pci_domain 0 on 
+       device pci_domain 0 on

                device pci 0.0 on end # Host bridge
                device pci 1.0 on # Onboard Video
                        #       device pci 1.0 on end
                device pci 0.0 on end # Host bridge
                device pci 1.0 on # Onboard Video
                        #       device pci 1.0 on end

diff --git a/src/mainboard/asus/mew-vm/irq_tables.c b/src/mainboard/asus/mew-vm/irq_tables.c
index 3bd0d7195f53016220a42c246c01d5e3a92b62b4..259b0e49386907f220051bfd8f021fcd79f4dc82 100644 (file)
--- a/src/mainboard/asus/mew-vm/irq_tables.c
+++ b/src/mainboard/asus/mew-vm/irq_tables.c
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!

  * (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
  *
  * (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
  *


@@ -18,7 +18,7 @@ const struct irq_routing_table intel_irq_routing_table = {
        0x7120,          /* Device */
        0,               /* Crap (miniport) */
        { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
        0x7120,          /* Device */
        0,               /* Crap (miniport) */
        { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */

-       0x89,            /*  u8 checksum , this has to set to some value 
+       0x89,            /*  u8 checksum , this has to set to some value

 that would give 0 after the sum of all bytes for this structure (including checksum) */
        {
                /* bus,     dev|fn,   {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap},  slot, rfu */
 that would give 0 after the sum of all bytes for this structure (including checksum) */
        {
                /* bus,     dev|fn,   {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap},  slot, rfu */

diff --git a/src/mainboard/azza/Kconfig b/src/mainboard/azza/Kconfig
index f7109ecbf7522e513bf6e1fb41b3cc80ddd50c7a..0c0be97d4623b3436cedbbc9afec6370f31e2da4 100644 (file)
--- a/src/mainboard/azza/Kconfig
+++ b/src/mainboard/azza/Kconfig
@@ -21,7 +21,7 @@
 choice
        prompt "Mainboard model"
        depends on VENDOR_AZZA
 choice
        prompt "Mainboard model"
        depends on VENDOR_AZZA

-       
+

 source "src/mainboard/azza/pt-6ibd/Kconfig"
 
 endchoice
 source "src/mainboard/azza/pt-6ibd/Kconfig"
 
 endchoice

diff --git a/src/mainboard/biostar/Kconfig b/src/mainboard/biostar/Kconfig
index 73bdfc20d808f9144661e3d3523c1b61cc8de872..85fad0a4f1d798d038d7eeee57bc0ec99ace29a0 100644 (file)
--- a/src/mainboard/biostar/Kconfig
+++ b/src/mainboard/biostar/Kconfig
@@ -21,7 +21,7 @@
 choice
        prompt "Mainboard model"
        depends on VENDOR_BIOSTAR
 choice
        prompt "Mainboard model"
        depends on VENDOR_BIOSTAR

-       
+

 source "src/mainboard/biostar/m6tba/Kconfig"
 
 endchoice
 source "src/mainboard/biostar/m6tba/Kconfig"
 
 endchoice

diff --git a/src/mainboard/broadcom/Kconfig b/src/mainboard/broadcom/Kconfig
index bf956ecdb3f23199ed8430279600bf9fc946b21d..d7406c0b45461407685a175b7f4b4541c39f9628 100644 (file)
--- a/src/mainboard/broadcom/Kconfig
+++ b/src/mainboard/broadcom/Kconfig
@@ -1,7 +1,7 @@
 choice
        prompt "Mainboard model"
        depends on VENDOR_BROADCOM
 choice
        prompt "Mainboard model"
        depends on VENDOR_BROADCOM

-        
+

 source "src/mainboard/broadcom/blast/Kconfig"
 
 endchoice
 source "src/mainboard/broadcom/blast/Kconfig"
 
 endchoice

diff --git a/src/mainboard/broadcom/blast/devicetree.cb b/src/mainboard/broadcom/blast/devicetree.cb
index a9cabe6bea7bcb74a51231bb4b7caece2a30e2ae..d06c590bf8513b19a5e584feea5263ceb81a12d3 100644 (file)
--- a/src/mainboard/broadcom/blast/devicetree.cb
+++ b/src/mainboard/broadcom/blast/devicetree.cb
@@ -6,7 +6,7 @@ chip northbridge/amd/amdk8/root_complex
         end
        device pci_domain 0 on
                chip northbridge/amd/amdk8
         end
        device pci_domain 0 on
                chip northbridge/amd/amdk8

-                       device pci 18.0 on #  northbridge 
+                       device pci 18.0 on #  northbridge

                               #  devices on link 0
                                 chip southbridge/broadcom/bcm5780 # HT2000
                                         device pci 0.0 on end   # PXB 1 0x0130
                               #  devices on link 0
                                 chip southbridge/broadcom/bcm5780 # HT2000
                                         device pci 0.0 on end   # PXB 1 0x0130


@@ -95,7 +95,7 @@ chip northbridge/amd/amdk8/root_complex
                                                         device pnp 2e.10 on #RTC
                                                                 io 0x60 = 0x70
                                                                 io 0x62 = 0x72
                                                         device pnp 2e.10 on #RTC
                                                                 io 0x60 = 0x70
                                                                 io 0x62 = 0x72

-                                                       end 
+                                                       end

                                                 end
                                         end
                                         device pci 1.3 on end # WDTimer    0x0238
                                                 end
                                         end
                                         device pci 1.3 on end # WDTimer    0x0238


@@ -110,7 +110,7 @@ chip northbridge/amd/amdk8/root_complex
                        end #  device pci 18.0
 
                         device pci 18.0 on end
                        end #  device pci 18.0
 
                         device pci 18.0 on end

-                        device pci 18.0 on end  
+                        device pci 18.0 on end

                        device pci 18.1 on end
                        device pci 18.2 on end
                        device pci 18.3 on end
                        device pci 18.1 on end
                        device pci 18.2 on end
                        device pci 18.3 on end

diff --git a/src/mainboard/broadcom/blast/get_bus_conf.c b/src/mainboard/broadcom/blast/get_bus_conf.c
index 9d1a4b1bf01a27b909aba70b1102189cafe4e90d..06f42f409227b760f4bd0f8dffb64d3150afb1d9 100644 (file)
--- a/src/mainboard/broadcom/blast/get_bus_conf.c
+++ b/src/mainboard/broadcom/blast/get_bus_conf.c
@@ -21,7 +21,7 @@ unsigned char bus_bcm5785_1_1 = 9;
 unsigned apicid_bcm5785[3];
 
 
 unsigned apicid_bcm5785[3];
 
 

-unsigned pci1234x[] = 
+unsigned pci1234x[] =

 {        //Here you only need to set value in pci1234 for HT-IO that could be installed or not
         //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
         0x0000ff0,
 {        //Here you only need to set value in pci1234 for HT-IO that could be installed or not
         //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
         0x0000ff0,


@@ -115,9 +115,9 @@ void get_bus_conf(void)
 /*I/O APICs:   APIC ID Version State           Address*/
 #if CONFIG_LOGICAL_CPUS==1
        apicid_base = get_apicid_base(3);
 /*I/O APICs:   APIC ID Version State           Address*/
 #if CONFIG_LOGICAL_CPUS==1
        apicid_base = get_apicid_base(3);

-#else 
-       apicid_base = CONFIG_MAX_PHYSICAL_CPUS; 
+#else
+       apicid_base = CONFIG_MAX_PHYSICAL_CPUS;

 #endif
 #endif

-       for(i=0;i<3;i++) 
+       for(i=0;i<3;i++)

                apicid_bcm5785[i] = apicid_base+i;
 }
                apicid_bcm5785[i] = apicid_base+i;
 }

diff --git a/src/mainboard/broadcom/blast/irq_tables.c b/src/mainboard/broadcom/blast/irq_tables.c
index 3f6f73893ebba4f7499924f928dc070386bb54fb..406419d6d8feb7ca17645bfa634a8885788c87a7 100644 (file)
--- a/src/mainboard/broadcom/blast/irq_tables.c
+++ b/src/mainboard/broadcom/blast/irq_tables.c
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!

    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 
    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 


@@ -16,7 +16,7 @@ static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t dev
                 uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
                 uint8_t slot, uint8_t rfu)
 {
                 uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
                 uint8_t slot, uint8_t rfu)
 {

-        pirq_info->bus = bus; 
+        pirq_info->bus = bus;

         pirq_info->devfn = devfn;
 
        pirq_info->irq[0].link = link0;
         pirq_info->devfn = devfn;
 
        pirq_info->irq[0].link = link0;


@@ -64,22 +64,22 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 
        pirq = (void *)(addr);
        v = (uint8_t *)(addr);
 
        pirq = (void *)(addr);
        v = (uint8_t *)(addr);

-       
+

        pirq->signature = PIRQ_SIGNATURE;
        pirq->version  = PIRQ_VERSION;
        pirq->signature = PIRQ_SIGNATURE;
        pirq->version  = PIRQ_VERSION;

-       
+

        pirq->rtr_bus = bus_bcm5785_0;
        pirq->rtr_devfn = (sysconf.sbdn<<3)|0;
 
        pirq->exclusive_irqs = 0;
        pirq->rtr_bus = bus_bcm5785_0;
        pirq->rtr_devfn = (sysconf.sbdn<<3)|0;
 
        pirq->exclusive_irqs = 0;

-       
+

        pirq->rtr_vendor = 0x1166;
        pirq->rtr_device = 0x0036;
 
        pirq->miniport_data = 0;
 
        memset(pirq->rfu, 0, sizeof(pirq->rfu));
        pirq->rtr_vendor = 0x1166;
        pirq->rtr_device = 0x0036;
 
        pirq->miniport_data = 0;
 
        memset(pirq->rfu, 0, sizeof(pirq->rfu));

-       
+

        get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c
 
        pirq_info = (void *) ( &pirq->checksum + 1);
        get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c
 
        pirq_info = (void *) ( &pirq->checksum + 1);


@@ -87,11 +87,11 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 //pci bridge
        write_pirq_info(pirq_info, bus_bcm5785_0, (sysconf.sbdn<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
        pirq_info++; slot_num++;
 //pci bridge
        write_pirq_info(pirq_info, bus_bcm5785_0, (sysconf.sbdn<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
        pirq_info++; slot_num++;

-             
-       pirq->size = 32 + 16 * slot_num; 
+
+       pirq->size = 32 + 16 * slot_num;

 
         for (i = 0; i < pirq->size; i++)
 
         for (i = 0; i < pirq->size; i++)

-                sum += v[i];   
+                sum += v[i];

 
        sum = pirq->checksum - sum;
 
 
        sum = pirq->checksum - sum;
 

diff --git a/src/mainboard/broadcom/blast/mptable.c b/src/mainboard/broadcom/blast/mptable.c
index 8a1b133bfb8635c928248dd2268cfa33ce5694c8..d24630844eb4a923a88b01df3fec2da2416ec392 100644 (file)
--- a/src/mainboard/broadcom/blast/mptable.c
+++ b/src/mainboard/broadcom/blast/mptable.c
@@ -72,12 +72,12 @@ static void *smp_write_config_table(void *v)
                                }
                        }
                }
                                }
                        }
                }

-               
+

        }
        }

-       
+

 /*I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN# */
        smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_bcm5785[0], 0x0);
 /*I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN# */
        smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_bcm5785[0], 0x0);

-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x1, apicid_bcm5785[0], 0x1); 
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x1, apicid_bcm5785[0], 0x1);

        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x0, apicid_bcm5785[0], 0x2);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x3, apicid_bcm5785[0], 0x3);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x4, apicid_bcm5785[0], 0x4);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x0, apicid_bcm5785[0], 0x2);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x3, apicid_bcm5785[0], 0x3);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x4, apicid_bcm5785[0], 0x4);


@@ -89,7 +89,7 @@ static void *smp_write_config_table(void *v)
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0xc, apicid_bcm5785[0], 0xc);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0xd, apicid_bcm5785[0], 0xd);
 
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0xc, apicid_bcm5785[0], 0xc);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0xd, apicid_bcm5785[0], 0xd);
 

-//IDE  
+//IDE

        outb(0x02, 0xc00); outb(0x0e, 0xc01);
 
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_bcm5785_0, ((1+sysconf.sbdn)<<2)|1, apicid_bcm5785[0], 0xe); // IDE
        outb(0x02, 0xc00); outb(0x0e, 0xc01);
 
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_bcm5785_0, ((1+sysconf.sbdn)<<2)|1, apicid_bcm5785[0], 0xe); // IDE


@@ -97,14 +97,14 @@ static void *smp_write_config_table(void *v)
 //SATA
        outb(0x07, 0xc00); outb(0x0f, 0xc01);
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5785_1, (0x0e<<2)|0, apicid_bcm5785[0], 0xf);
 //SATA
        outb(0x07, 0xc00); outb(0x0f, 0xc01);
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5785_1, (0x0e<<2)|0, apicid_bcm5785[0], 0xf);

-       
+

 //USB
        outb(0x01, 0xc00); outb(0x0a, 0xc01);
         for(i=0;i<3;i++) {
                 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5785_0, ((2+sysconf.sbdn)<<2)|i, apicid_bcm5785[0], 0xa); //
         }
 
 //USB
        outb(0x01, 0xc00); outb(0x0a, 0xc01);
         for(i=0;i<3;i++) {
                 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5785_0, ((2+sysconf.sbdn)<<2)|i, apicid_bcm5785[0], 0xa); //
         }
 

-       
+

 
         /* enable int */
         /* why here? must get the BAR and PCI command bit 1 set before enable it ....*/
 
         /* enable int */
         /* why here? must get the BAR and PCI command bit 1 set before enable it ....*/


@@ -127,13 +127,13 @@ static void *smp_write_config_table(void *v)
         }
 
 
         }
 
 

-//pci slot (on bcm5785)  
+//pci slot (on bcm5785)

         for(i=0;i<4;i++) {
                 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5785_0, (4<<2)|i, apicid_bcm5785[1], i%2); //
         }
 
 
         for(i=0;i<4;i++) {
                 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5785_0, (4<<2)|i, apicid_bcm5785[1], i%2); //
         }
 
 

-//onboard ati 
+//onboard ati

         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5785_0, (5<<2)|0, apicid_bcm5785[1], 0x1);
 
 //PCI-X on bcm5780
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5785_0, (5<<2)|0, apicid_bcm5785[1], 0x1);
 
 //PCI-X on bcm5780


@@ -157,7 +157,7 @@ static void *smp_write_config_table(void *v)
         }
 
 
         }
 
 

-// Second PCI-E x8 
+// Second PCI-E x8

         for(i=0;i<4;i++) {
                 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5780[3], (0<<2)|i, apicid_bcm5785[1], 0xc); //
         }
         for(i=0;i<4;i++) {
                 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5780[3], (0<<2)|i, apicid_bcm5785[1], 0xc); //
         }

diff --git a/src/mainboard/broadcom/blast/resourcemap.c b/src/mainboard/broadcom/blast/resourcemap.c
index 438605c701e85d80ded08978de142826dffa3ce9..71f0bba010d1e3bec63c65e6389f3094118877a9 100644 (file)
--- a/src/mainboard/broadcom/blast/resourcemap.c
+++ b/src/mainboard/broadcom/blast/resourcemap.c
@@ -119,7 +119,7 @@ static void setup_blast_resource_map(void)
                PCI_ADDR(0, 0x18, 1, 0xA4), 0x00000048, 0x00000000,
                PCI_ADDR(0, 0x18, 1, 0xAC), 0x00000048, 0x00000000,
                PCI_ADDR(0, 0x18, 1, 0xB4), 0x00000048, 0x00000000,
                PCI_ADDR(0, 0x18, 1, 0xA4), 0x00000048, 0x00000000,
                PCI_ADDR(0, 0x18, 1, 0xAC), 0x00000048, 0x00000000,
                PCI_ADDR(0, 0x18, 1, 0xB4), 0x00000048, 0x00000000,

-               PCI_ADDR(0, 0x18, 1, 0xBC), 0x00000048, 0x00ffff00, 
+               PCI_ADDR(0, 0x18, 1, 0xBC), 0x00000048, 0x00ffff00,

 
                /* Memory-Mapped I/O Base i Registers
                 * F1:0x80 i = 0
 
                /* Memory-Mapped I/O Base i Registers
                 * F1:0x80 i = 0


@@ -144,7 +144,7 @@ static void setup_blast_resource_map(void)
                 *         1 = base/limit registers i are read-only
                 * [ 7: 4] Reserved
                 * [31: 8] Memory-Mapped I/O Base Address i (39-16)
                 *         1 = base/limit registers i are read-only
                 * [ 7: 4] Reserved
                 * [31: 8] Memory-Mapped I/O Base Address i (39-16)

-                *         This field defines the upper address bits of a 40bit address 
+                *         This field defines the upper address bits of a 40bit address

                 *         that defines the start of memory-mapped I/O region i
                 */
                PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,
                 *         that defines the start of memory-mapped I/O region i
                 */
                PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,


@@ -181,7 +181,7 @@ static void setup_blast_resource_map(void)
                 *         This field defines the end of PCI I/O region n
                 * [31:25] Reserved
                 */
                 *         This field defines the end of PCI I/O region n
                 * [31:25] Reserved
                 */

-               PCI_ADDR(0, 0x18, 1, 0xC4), 0xFE000FC8, 0x01fff000, 
+               PCI_ADDR(0, 0x18, 1, 0xC4), 0xFE000FC8, 0x01fff000,

                PCI_ADDR(0, 0x18, 1, 0xCC), 0xFE000FC8, 0x00000000,
                PCI_ADDR(0, 0x18, 1, 0xD4), 0xFE000FC8, 0x00000000,
                PCI_ADDR(0, 0x18, 1, 0xDC), 0xFE000FC8, 0x00000000,
                PCI_ADDR(0, 0x18, 1, 0xCC), 0xFE000FC8, 0x00000000,
                PCI_ADDR(0, 0x18, 1, 0xD4), 0xFE000FC8, 0x00000000,
                PCI_ADDR(0, 0x18, 1, 0xDC), 0xFE000FC8, 0x00000000,


@@ -200,7 +200,7 @@ static void setup_blast_resource_map(void)
                 * [ 3: 2] Reserved
                 * [ 4: 4] VGA Enable
                 *         0 = VGA matches Disabled
                 * [ 3: 2] Reserved
                 * [ 4: 4] VGA Enable
                 *         0 = VGA matches Disabled

-                *         1 = matches all address < 64K and where A[9:0] is in the 
+                *         1 = matches all address < 64K and where A[9:0] is in the

                 *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
                 * [ 5: 5] ISA Enable
                 *         0 = ISA matches Disabled
                 *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
                 * [ 5: 5] ISA Enable
                 *         0 = ISA matches Disabled


@@ -208,7 +208,7 @@ static void setup_blast_resource_map(void)
                 *             from matching agains this base/limit pair
                 * [11: 6] Reserved
                 * [24:12] PCI I/O Base i
                 *             from matching agains this base/limit pair
                 * [11: 6] Reserved
                 * [24:12] PCI I/O Base i

-                *         This field defines the start of PCI I/O region n 
+                *         This field defines the start of PCI I/O region n

                 * [31:25] Reserved
                 */
                PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000003,
                 * [31:25] Reserved
                 */
                PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000003,


@@ -252,8 +252,8 @@ static void setup_blast_resource_map(void)
                 * [31:24] Bus Number Limit i
                 *         This field defines the highest bus number in configuration regin i
                 */
                 * [31:24] Bus Number Limit i
                 *         This field defines the highest bus number in configuration regin i
                 */

-               PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x08000003, 
-               PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000000, 
+               PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x08000003,
+               PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000000,

                PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x00000000,
                PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000,
        };
                PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x00000000,
                PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000,
        };

diff --git a/src/mainboard/broadcom/blast/romstage.c b/src/mainboard/broadcom/blast/romstage.c
index 35823bd47c1615995abc991142274f69c15f2706..13f5f97414b922ec98c99326c8333a963744e524 100644 (file)
--- a/src/mainboard/broadcom/blast/romstage.c
+++ b/src/mainboard/broadcom/blast/romstage.c
@@ -3,7 +3,7 @@
 #if CONFIG_LOGICAL_CPUS==1
 #define SET_NB_CFG_54 1
 #endif
 #if CONFIG_LOGICAL_CPUS==1
 #define SET_NB_CFG_54 1
 #endif

- 
+

 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>


@@ -75,7 +75,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 #include "lib/generic_sdram.c"
 
  /* tyan does not want the default */
 #include "lib/generic_sdram.c"
 
  /* tyan does not want the default */

-#include "resourcemap.c" 
+#include "resourcemap.c"

 
 #include "cpu/amd/dualcore/dualcore.c"
 
 
 #include "cpu/amd/dualcore/dualcore.c"
 


@@ -109,7 +109,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         struct mem_controller ctrl[8];
         unsigned nodes;
 
         struct mem_controller ctrl[8];
         unsigned nodes;
 

-        if (!cpu_init_detectedx && boot_cpu()) {  
+        if (!cpu_init_detectedx && boot_cpu()) {

                /* Nothing special needs to be done to find bus 0 */
                /* Allow the HT devices to be found */
 
                /* Nothing special needs to be done to find bus 0 */
                /* Allow the HT devices to be found */
 


@@ -130,7 +130,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
        pc87417_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 //     post_code(0x33);
 
        pc87417_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 //     post_code(0x33);

-       
+

         uart_init();
 //     post_code(0x34);
 
         uart_init();
 //     post_code(0x34);
 


@@ -142,7 +142,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n");
 
         setup_blast_resource_map();
        print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n");
 
         setup_blast_resource_map();

-       
+

 #if 0
         dump_pci_device(PCI_DEV(0, 0x18, 0));
        dump_pci_device(PCI_DEV(0, 0x19, 0));
 #if 0
         dump_pci_device(PCI_DEV(0, 0x18, 0));
        dump_pci_device(PCI_DEV(0, 0x19, 0));


@@ -174,7 +174,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
        enable_smbus();
 
 
        enable_smbus();
 

-#if 0 
+#if 0

         int i;
         for(i=4;i<8;i++) {
                 change_i2c_mux(i);
         int i;
         for(i=4;i<8;i++) {
                 change_i2c_mux(i);

diff --git a/src/mainboard/compaq/Kconfig b/src/mainboard/compaq/Kconfig
index 160048f30f62fd873c99faa7d84a5dd62ce501dc..c2bbb571208ce312c12730753ae34821c3241aa9 100644 (file)
--- a/src/mainboard/compaq/Kconfig
+++ b/src/mainboard/compaq/Kconfig
@@ -21,7 +21,7 @@
 choice
        prompt "Mainboard model"
        depends on VENDOR_COMPAQ
 choice
        prompt "Mainboard model"
        depends on VENDOR_COMPAQ

-       
+

 source "src/mainboard/compaq/deskpro_en_sff_p600/Kconfig"
 
 endchoice
 source "src/mainboard/compaq/deskpro_en_sff_p600/Kconfig"
 
 endchoice

diff --git a/src/mainboard/dell/s1850/debug.c b/src/mainboard/dell/s1850/debug.c
index 2ea3db32eaa0dbf7d1573db4ea67f3fd102af095..45315618b7c4aa90d104e1b8ee041047674fa9f4 100644 (file)
--- a/src/mainboard/dell/s1850/debug.c
+++ b/src/mainboard/dell/s1850/debug.c
@@ -5,7 +5,7 @@
 static void print_reg(unsigned char index)
 {
         unsigned char data;
 static void print_reg(unsigned char index)
 {
         unsigned char data;

-                                                                                
+

         outb(index, 0x2e);
         data = inb(0x2f);
        print_debug("0x");
         outb(index, 0x2e);
         data = inb(0x2f);
        print_debug("0x");


@@ -15,7 +15,7 @@ static void print_reg(unsigned char index)
        print_debug("\n");
         return;
 }
        print_debug("\n");
         return;
 }

-        
+

 static void xbus_en(void)
 {
         /* select the XBUS function in the SIO */
 static void xbus_en(void)
 {
         /* select the XBUS function in the SIO */


@@ -25,7 +25,7 @@ static void xbus_en(void)
         outb(0x01, 0x2f);
        return;
 }
         outb(0x01, 0x2f);
        return;
 }

-                                                                        
+

 static void setup_func(unsigned char func)
 {
         /* select the function in the SIO */
 static void setup_func(unsigned char func)
 {
         /* select the function in the SIO */


@@ -43,27 +43,27 @@ static void setup_func(unsigned char func)
         print_reg(0x75);
         return;
 }
         print_reg(0x75);
         return;
 }

-                                                                                
+

 static void siodump(void)
 {
         int i;
         unsigned char data;
 static void siodump(void)
 {
         int i;
         unsigned char data;

-       
+

         print_debug("\n*** SERVER I/O REGISTERS ***\n");
         for (i=0x10; i<=0x2d; i++) {
                 print_reg((unsigned char)i);
         }
         print_debug("\n*** SERVER I/O REGISTERS ***\n");
         for (i=0x10; i<=0x2d; i++) {
                 print_reg((unsigned char)i);
         }

-#if 0                                                                         
+#if 0

         print_debug("\n*** XBUS REGISTERS ***\n");
         setup_func(0x0f);
         for (i=0xf0; i<=0xff; i++) {
                 print_reg((unsigned char)i);
         }
         print_debug("\n*** XBUS REGISTERS ***\n");
         setup_func(0x0f);
         for (i=0xf0; i<=0xff; i++) {
                 print_reg((unsigned char)i);
         }

-                                                                                
+

         print_debug("\n***  SERIAL 1 CONFIG REGISTERS ***\n");
         setup_func(0x03);
         print_reg(0xf0);
         print_debug("\n***  SERIAL 1 CONFIG REGISTERS ***\n");
         setup_func(0x03);
         print_reg(0xf0);

-                                                                                
+

         print_debug("\n***  SERIAL 2 CONFIG REGISTERS ***\n");
         setup_func(0x02);
         print_reg(0xf0);
         print_debug("\n***  SERIAL 2 CONFIG REGISTERS ***\n");
         setup_func(0x02);
         print_reg(0xf0);


@@ -82,13 +82,13 @@ static void siodump(void)
        print_debug("\nGPDI 4: 0x");
        print_debug_hex8(data);
        print_debug("\n");
        print_debug("\nGPDI 4: 0x");
        print_debug_hex8(data);
        print_debug("\n");

-       
-#if 0                                                                                
-                                                                                
+
+#if 0
+

         print_debug("\n***  WATCHDOG TIMER REGISTERS ***\n");
         setup_func(0x0a);
         print_reg(0xf0);
         print_debug("\n***  WATCHDOG TIMER REGISTERS ***\n");
         setup_func(0x0a);
         print_reg(0xf0);

-                                                                                
+

         print_debug("\n***  FAN CONTROL REGISTERS ***\n");
         setup_func(0x09);
         print_reg(0xf0);
         print_debug("\n***  FAN CONTROL REGISTERS ***\n");
         setup_func(0x09);
         print_reg(0xf0);


@@ -103,11 +103,11 @@ static void siodump(void)
         print_reg(0xf7);
         print_reg(0xfe);
         print_reg(0xff);
         print_reg(0xf7);
         print_reg(0xfe);
         print_reg(0xff);

-                                                                                
+

         print_debug("\n***  HEALTH MONITORING & CONTROL REGISTERS ***\n");
         setup_func(0x14);
         print_reg(0xf0);
         print_debug("\n***  HEALTH MONITORING & CONTROL REGISTERS ***\n");
         setup_func(0x14);
         print_reg(0xf0);

-#endif                                                                           
+#endif

         return;
 }
 
         return;
 }
 


@@ -124,8 +124,8 @@ static void print_debug_pci_dev(unsigned dev)
 static void print_pci_devices(void)
 {
        device_t dev;
 static void print_pci_devices(void)
 {
        device_t dev;

-       for(dev = PCI_DEV(0, 0, 0); 
-               dev <= PCI_DEV(0, 0x1f, 0x7); 
+       for(dev = PCI_DEV(0, 0, 0);
+               dev <= PCI_DEV(0, 0x1f, 0x7);

                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);
                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);


@@ -144,7 +144,7 @@ static void dump_pci_device(unsigned dev)
        int i;
        print_debug_pci_dev(dev);
        print_debug("\n");
        int i;
        print_debug_pci_dev(dev);
        print_debug("\n");

-       
+

        for(i = 0; i <= 255; i++) {
                unsigned char val;
                if ((i & 0x0f) == 0) {
        for(i = 0; i <= 255; i++) {
                unsigned char val;
                if ((i & 0x0f) == 0) {


@@ -164,19 +164,19 @@ static void dump_bar14(unsigned dev)
 {
        int i;
        unsigned long bar;
 {
        int i;
        unsigned long bar;

-       
+

        print_debug("BAR 14 Dump\n");
        print_debug("BAR 14 Dump\n");

-       
+

        bar = pci_read_config32(dev, 0x14);
        for(i = 0; i <= 0x300; i+=4) {
        bar = pci_read_config32(dev, 0x14);
        for(i = 0; i <= 0x300; i+=4) {

-#if 0          
+#if 0

                unsigned char val;
                if ((i & 0x0f) == 0) {
                        print_debug_hex8(i);
                        print_debug_char(':');
                }
                val = pci_read_config8(dev, i);
                unsigned char val;
                if ((i & 0x0f) == 0) {
                        print_debug_hex8(i);
                        print_debug_char(':');
                }
                val = pci_read_config8(dev, i);

-#endif         
+#endif

                if((i%4)==0) {
                print_debug("\n");
                print_debug_hex16(i);
                if((i%4)==0) {
                print_debug("\n");
                print_debug_hex16(i);


@@ -191,8 +191,8 @@ static void dump_bar14(unsigned dev)
 static void dump_pci_devices(void)
 {
        device_t dev;
 static void dump_pci_devices(void)
 {
        device_t dev;

-       for(dev = PCI_DEV(0, 0, 0); 
-               dev <= PCI_DEV(0, 0x1f, 0x7); 
+       for(dev = PCI_DEV(0, 0, 0);
+               dev <= PCI_DEV(0, 0x1f, 0x7);

                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);
                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);


@@ -215,7 +215,7 @@ void dump_spd_registers(void)
                print_debug("\n");
                 print_debug("dimm ");
                print_debug_hex8(device);
                print_debug("\n");
                 print_debug("dimm ");
                print_debug_hex8(device);

-               
+

                 for(i = 0; (i < 256) ; i++) {
                        unsigned char byte;
                         if ((i % 16) == 0) {
                 for(i = 0; (i < 256) ; i++) {
                        unsigned char byte;
                         if ((i % 16) == 0) {


@@ -228,7 +228,7 @@ void dump_spd_registers(void)
                                 print_debug("bad device: ");
                                 print_debug_hex8(-status);
                                 print_debug("\n");
                                 print_debug("bad device: ");
                                 print_debug_hex8(-status);
                                 print_debug("\n");

-                                break; 
+                                break;

                        }
                        print_debug_hex8(status);
                        print_debug_char(' ');
                        }
                        print_debug_hex8(status);
                        print_debug_char(' ');


@@ -248,7 +248,7 @@ void show_dram_slots(void)
                print_debug("\n");
                print_debug("dimm ");
                print_debug_hex8(device);
                print_debug("\n");
                print_debug("dimm ");
                print_debug_hex8(device);

-               
+

                status = smbus_read_byte(device, 0);
                if (status < 0) {
                        print_debug("bad device: ");
                status = smbus_read_byte(device, 0);
                if (status < 0) {
                        print_debug("bad device: ");


@@ -272,7 +272,7 @@ void dump_ipmi_registers(void)
                print_debug("\n");
                 print_debug("ipmi ");
                print_debug_hex8(device);
                print_debug("\n");
                 print_debug("ipmi ");
                print_debug_hex8(device);

-               
+

                 for(i = 0; (i < 8) ; i++) {
                        unsigned char byte;
                        status = smbus_read_byte(device, 2);
                 for(i = 0; (i < 8) ; i++) {
                        unsigned char byte;
                        status = smbus_read_byte(device, 2);


@@ -280,7 +280,7 @@ void dump_ipmi_registers(void)
                                 print_debug("bad device: ");
                                 print_debug_hex8(-status);
                                 print_debug("\n");
                                 print_debug("bad device: ");
                                 print_debug_hex8(-status);
                                 print_debug("\n");

-                                break; 
+                                break;

                        }
                        print_debug_hex8(status);
                        print_debug_char(' ');
                        }
                        print_debug_hex8(status);
                        print_debug_char(' ');


@@ -288,4 +288,4 @@ void dump_ipmi_registers(void)
                device += SMBUS_MEM_DEVICE_INC;
                print_debug("\n");
        }
                device += SMBUS_MEM_DEVICE_INC;
                print_debug("\n");
        }

-}      
+}

diff --git a/src/mainboard/dell/s1850/devicetree.cb b/src/mainboard/dell/s1850/devicetree.cb
index ab95e54a7b83b8fe62abb9c45cd968da317ddc26..bd7b3a3773154fbd14f3b7f0eb4cdb8a509f6655 100644 (file)
--- a/src/mainboard/dell/s1850/devicetree.cb
+++ b/src/mainboard/dell/s1850/devicetree.cb
@@ -1,23 +1,23 @@
 chip northbridge/intel/e7520 # mch
 chip northbridge/intel/e7520 # mch

-       device pci_domain 0 on 
+       device pci_domain 0 on

                chip southbridge/intel/i82801ex # i82801er
                        # USB ports
                        device pci 1d.0 on end
                        device pci 1d.1 on end
                chip southbridge/intel/i82801ex # i82801er
                        # USB ports
                        device pci 1d.0 on end
                        device pci 1d.1 on end

-                       device pci 1d.2 on end 
+                       device pci 1d.2 on end

                        device pci 1d.3 on end
                        device pci 1d.7 on end
                        device pci 1d.3 on end
                        device pci 1d.7 on end

-               
+

                        # -> Bridge
                        device pci 1e.0 on end
                        # -> Bridge
                        device pci 1e.0 on end

-               
+

                        # -> ISA
                        # -> ISA

-                       device pci 1f.0 on 
+                       device pci 1f.0 on

                                chip superio/nsc/pc8374
                                        device pnp 2e.0 off end
                                        device pnp 2e.1 off end
                                        device pnp 2e.2 off end
                                chip superio/nsc/pc8374
                                        device pnp 2e.0 off end
                                        device pnp 2e.1 off end
                                        device pnp 2e.2 off end

-                                       device pnp 2e.3 on 
+                                       device pnp 2e.3 on

                                                 io 0x60 = 0x3f8
                                                irq 0x70 = 4
                                        end
                                                 io 0x60 = 0x3f8
                                                irq 0x70 = 4
                                        end


@@ -30,22 +30,22 @@ chip northbridge/intel/e7520 # mch
                        end
                        # -> IDE
                        device pci 1f.1 on end
                        end
                        # -> IDE
                        device pci 1f.1 on end

-                       # -> SATA 
+                       # -> SATA

                        device pci 1f.2 on end
                        device pci 1f.3 on end
 
                        register "pirq_a_d" = "0x8a07030b"
                        register "pirq_e_h" = "0x85808080"
                end
                        device pci 1f.2 on end
                        device pci 1f.3 on end
 
                        register "pirq_a_d" = "0x8a07030b"
                        register "pirq_e_h" = "0x85808080"
                end

-               device pci 00.0 on end 
+               device pci 00.0 on end

                device pci 00.1 on end
                device pci 00.1 on end

-               device pci 01.0 on end 
-               device pci 02.0 on 
+               device pci 01.0 on end
+               device pci 02.0 on

                        chip southbridge/intel/pxhd # pxhd1
                                # Bus bridges and ioapics usually bus 1
                        chip southbridge/intel/pxhd # pxhd1
                                # Bus bridges and ioapics usually bus 1

-                               device pci 0.0 on 
+                               device pci 0.0 on

                                # On board gig e1000
                                # On board gig e1000

-                                       chip drivers/generic/generic 
+                                       chip drivers/generic/generic

                                                device pci 03.0 on end
                                                device pci 03.1 on end
                                        end
                                                device pci 03.0 on end
                                                device pci 03.1 on end
                                        end

diff --git a/src/mainboard/dell/s1850/irq_tables.c b/src/mainboard/dell/s1850/irq_tables.c
index 8b4773df66d3cffe90804bf81009bf5e12686c5f..1f56ed30b975eef47600c4361f4c804d01d710e0 100644 (file)
--- a/src/mainboard/dell/s1850/irq_tables.c
+++ b/src/mainboard/dell/s1850/irq_tables.c
@@ -1,8 +1,8 @@
 /*
  * This file is part of the coreboot project.
  *
 /*
  * This file is part of the coreboot project.
  *

- * Copyright (C) by the coreboot pirq tool. 
- * This file was programatically generated. 
+ * Copyright (C) by the coreboot pirq tool.
+ * This file was programatically generated.

  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by

diff --git a/src/mainboard/dell/s1850/mptable.c b/src/mainboard/dell/s1850/mptable.c
index c7fd52af3e96eee8297f8a2a4e1853793b6b554a..4cdd0f1e7bc918bf861e97fccd92f2bc9f8c508d 100644 (file)
--- a/src/mainboard/dell/s1850/mptable.c
+++ b/src/mainboard/dell/s1850/mptable.c
@@ -36,7 +36,7 @@ static void *smp_write_config_table(void *v)
        mc->reserved = 0;
 
        smp_write_processors(mc);
        mc->reserved = 0;
 
        smp_write_processors(mc);

-       
+

        {
                device_t dev;
 
        {
                device_t dev;
 


@@ -98,9 +98,9 @@ static void *smp_write_config_table(void *v)
 
                        bus_pxhd_4 = 6;
                }
 
                        bus_pxhd_4 = 6;
                }

-       
+

        }
        }

-       
+

        /* define bus and isa numbers */
        for(bus_num = 0; bus_num < bus_isa; bus_num++) {
                smp_write_bus(mc, bus_num, "PCI   ");
        /* define bus and isa numbers */
        for(bus_num = 0; bus_num < bus_isa; bus_num++) {
                smp_write_bus(mc, bus_num, "PCI   ");


@@ -135,7 +135,7 @@ static void *smp_write_config_table(void *v)
                else {
                        printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 1:00.3\n");
                }
                else {
                        printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 1:00.3\n");
                }

-       }       
+       }

        /* ISA backward compatibility interrupts  */
        smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
                bus_isa, 0x00, 0x02, 0x00);
        /* ISA backward compatibility interrupts  */
        smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
                bus_isa, 0x00, 0x02, 0x00);

diff --git a/src/mainboard/dell/s1850/romstage.c b/src/mainboard/dell/s1850/romstage.c
index 199c6ea5d554692d0254565a7b7842a447fec3e0..07fbef282d4c99c57e046d52aed3e0bdcfe52fb3 100644 (file)
--- a/src/mainboard/dell/s1850/romstage.c
+++ b/src/mainboard/dell/s1850/romstage.c
@@ -65,7 +65,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 static inline void  ibfzero(void)
 {
 
 static inline void  ibfzero(void)
 {

-       while(inb(ipmicsr) &  (1<<IBF)) 
+       while(inb(ipmicsr) &  (1<<IBF))

                ;
 }
 static inline void  clearobf(void)
                ;
 }
 static inline void  clearobf(void)


@@ -75,7 +75,7 @@ static inline void  clearobf(void)
 
 static inline void  waitobf(void)
 {
 
 static inline void  waitobf(void)
 {

-       while((inb(ipmicsr) &  (1<<OBF)) == 0) 
+       while((inb(ipmicsr) &  (1<<OBF)) == 0)

                ;
 }
 /* quite possibly the stupidest interface ever designed. */
                ;
 }
 /* quite possibly the stupidest interface ever designed. */


@@ -162,8 +162,8 @@ static void main(unsigned long bist)
        u32 l;
        int do_reset;
        /*
        u32 l;
        int do_reset;
        /*

-        * 
-        * 
+        *
+        *

         */
        static const struct mem_controller mch[] = {
                {
         */
        static const struct mem_controller mch[] = {
                {


@@ -192,9 +192,9 @@ static void main(unsigned long bist)
                0,
        };
 
                0,
        };
 

-       /* using SerialICE, we've seen this basic reset sequence on the dell. 
+       /* using SerialICE, we've seen this basic reset sequence on the dell.

         * we don't understand it as it uses undocumented registers, but
         * we don't understand it as it uses undocumented registers, but

-        * we're going to clone it. 
+        * we're going to clone it.

         */
        /* enable a hidden device. */
        b = pci_read_config8(PCI_DEV(0, 0, 0), 0xf4);
         */
        /* enable a hidden device. */
        b = pci_read_config8(PCI_DEV(0, 0, 0), 0xf4);


@@ -217,11 +217,11 @@ static void main(unsigned long bist)
        b = pci_read_config8(PCI_DEV(0, 0, 0), 0xf4);
        b &= ~0x8;
        pci_write_config8(PCI_DEV(0, 0, 0), 0xf4, b);
        b = pci_read_config8(PCI_DEV(0, 0, 0), 0xf4);
        b &= ~0x8;
        pci_write_config8(PCI_DEV(0, 0, 0), 0xf4, b);

-       
+

        /* set up LPC bridge bits, some of which reply on undocumented
         * registers
         */
        /* set up LPC bridge bits, some of which reply on undocumented
         * registers
         */

-       
+

        b= pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xd8);
        b |= 4;
        pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xd8, b);
        b= pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xd8);
        b |= 4;
        pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xd8, b);


@@ -244,9 +244,9 @@ static void main(unsigned long bist)
        w = inw(0x866);
        outw(w|2, 0x866);
 
        w = inw(0x866);
        outw(w|2, 0x866);
 

-#if 0 
+#if 0

        /*seriaice shows
        /*seriaice shows

-       dell does this so leave it here so I don't forget 
+       dell does this so leave it here so I don't forget

         */
        /* SMBUS */
        pci_write_config16(PCI_DEV(0, 0x1f, 3), 0x20, 0x08c0);
         */
        /* SMBUS */
        pci_write_config16(PCI_DEV(0, 0x1f, 3), 0x20, 0x08c0);


@@ -260,7 +260,7 @@ static void main(unsigned long bist)
        b = pci_read_config8(PCI_DEV(0, 0, 0), 0xf4);
        b |= 2;
        pci_write_config8(PCI_DEV(0, 0, 0), 0xf4, b);
        b = pci_read_config8(PCI_DEV(0, 0, 0), 0xf4);
        b |= 2;
        pci_write_config8(PCI_DEV(0, 0, 0), 0xf4, b);

-       
+

        /* ?? */
        l = pci_read_config32(PCI_DEV(0, 8, 0), 0xc0);
        do_reset = l & 0x8000000;
        /* ?? */
        l = pci_read_config32(PCI_DEV(0, 8, 0), 0xc0);
        do_reset = l & 0x8000000;


@@ -334,7 +334,7 @@ static void main(unsigned long bist)
 #endif
        disable_watchdogs();
 //     dump_ipmi_registers();
 #endif
        disable_watchdogs();
 //     dump_ipmi_registers();

-       mainboard_set_e7520_leds();     
+       mainboard_set_e7520_leds();

 
        sdram_initialize(ARRAY_SIZE(mch), mch);
 #if 0
 
        sdram_initialize(ARRAY_SIZE(mch), mch);
 #if 0


@@ -345,7 +345,7 @@ static void main(unsigned long bist)
 //     dump_bar14(PCI_DEV(0, 0x00, 0));
 #endif
 
 //     dump_bar14(PCI_DEV(0, 0x00, 0));
 #endif
 

-#if 1 // temporarily disabled 
+#if 1 // temporarily disabled

        /* Check the first 1M */
 //     ram_check(0x00000000, 0x000100000);
 //     ram_check(0x00000000, 0x000a0000);
        /* Check the first 1M */
 //     ram_check(0x00000000, 0x000100000);
 //     ram_check(0x00000000, 0x000a0000);


@@ -357,8 +357,8 @@ static void main(unsigned long bist)
 #if 0
        ram_check(0x00000000, 0x02000000);
 #endif
 #if 0
        ram_check(0x00000000, 0x02000000);
 #endif

-       
-#if 0  
+
+#if 0

        while(1) {
                hlt();
        }
        while(1) {
                hlt();
        }

diff --git a/src/mainboard/dell/s1850/s1850_fixups.c b/src/mainboard/dell/s1850/s1850_fixups.c
index 9827120056bc3b7392e613a02b431c57a575d2d2..7ef9ce163be859e3708b10c6ed1b2cf85fb8f243 100644 (file)
--- a/src/mainboard/dell/s1850/s1850_fixups.c
+++ b/src/mainboard/dell/s1850/s1850_fixups.c
@@ -9,13 +9,13 @@ static void mch_reset(void)
 
 static void mainboard_set_e7520_pll(unsigned bits)
 {
 
 static void mainboard_set_e7520_pll(unsigned bits)
 {

-       return; 
+       return;

 }
 
 
 static void mainboard_set_e7520_leds(void)
 {
 }
 
 
 static void mainboard_set_e7520_leds(void)
 {

-       return; 
+       return;

 }
 
 static void mainboard_set_ich5(void)
 }
 
 static void mainboard_set_ich5(void)


@@ -28,8 +28,8 @@ static void mainboard_set_ich5(void)
        pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xe3, 0xc0);
        pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xf0, 0x0);
        /* disable certain devices -- see data sheet -- this is from
        pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xe3, 0xc0);
        pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xf0, 0x0);
        /* disable certain devices -- see data sheet -- this is from

-        * dell settings via lspci 
-        * Note that they leave SMBUS disabled -- 8f6f. 
+        * dell settings via lspci
+        * Note that they leave SMBUS disabled -- 8f6f.

         * we leave it enabled and visible in config space -- 8f66
         */
        pci_write_config16(PCI_DEV(0, 0x1f, 0), 0xf2, 0x8f66);
         * we leave it enabled and visible in config space -- 8f66
         */
        pci_write_config16(PCI_DEV(0, 0x1f, 0), 0xf2, 0x8f66);


@@ -38,7 +38,7 @@ static void mainboard_set_ich5(void)
        pci_write_config8(PCI_DEV(0, 0x1f, 0), 0x5c, 0x10);
 
        /* now the fun begins ... enable the GPIOs as done on factory */
        pci_write_config8(PCI_DEV(0, 0x1f, 0), 0x5c, 0x10);
 
        /* now the fun begins ... enable the GPIOs as done on factory */

-       /* factory config from IO ports 
+       /* factory config from IO ports

         * It has a few more things enabled than default!
         */
        outl(0x1ae0f183, 0x880);
         * It has a few more things enabled than default!
         */
        outl(0x1ae0f183, 0x880);

diff --git a/src/mainboard/dell/s1850/watchdog.c b/src/mainboard/dell/s1850/watchdog.c
index 50e9e6e7b08994e76bbdcd185fb3567a473163d8..43f4029b5e522f48f209536d8066168e0d279e27 100644 (file)
--- a/src/mainboard/dell/s1850/watchdog.c
+++ b/src/mainboard/dell/s1850/watchdog.c
@@ -31,17 +31,17 @@ static void disable_ich5_watchdog(void)
        value = pci_read_config16(dev, 0x04);
        value |= (1 << 10);
        pci_write_config16(dev, 0x04, value);
        value = pci_read_config16(dev, 0x04);
        value |= (1 << 10);
        pci_write_config16(dev, 0x04, value);

-       
+

        /* Set and enable acpibase */
        pci_write_config32(dev, 0x40, ICH5_WDBASE | 1);
        pci_write_config8(dev, 0x44, 0x10);
        base = ICH5_WDBASE + 0x60;
        /* Set and enable acpibase */
        pci_write_config32(dev, 0x40, ICH5_WDBASE | 1);
        pci_write_config8(dev, 0x44, 0x10);
        base = ICH5_WDBASE + 0x60;

-       
+

        /* Set bit 11 in TCO1_CNT */
        value = inw(base + 0x08);
        value |= 1 << 11;
        outw(value, base + 0x08);
        /* Set bit 11 in TCO1_CNT */
        value = inw(base + 0x08);
        value |= 1 << 11;
        outw(value, base + 0x08);

-       
+

        /* Clear TCO timeout status */
        outw(0x0008, base + 0x04);
        outw(0x0002, base + 0x06);
        /* Clear TCO timeout status */
        outw(0x0008, base + 0x04);
        outw(0x0002, base + 0x06);

diff --git a/src/mainboard/digitallogic/Kconfig b/src/mainboard/digitallogic/Kconfig
index 7c8fb1164e34193949e8772756ba034fc08cf2d8..7e115fc40228dcdad3ef309a9f4c6651e56c8ec7 100644 (file)
--- a/src/mainboard/digitallogic/Kconfig
+++ b/src/mainboard/digitallogic/Kconfig
@@ -1,7 +1,7 @@
 choice
        prompt "Mainboard model"
        depends on VENDOR_DIGITAL_LOGIC
 choice
        prompt "Mainboard model"
        depends on VENDOR_DIGITAL_LOGIC

-        
+

 source "src/mainboard/digitallogic/adl855pc/Kconfig"
 source "src/mainboard/digitallogic/msm586seg/Kconfig"
 source "src/mainboard/digitallogic/msm800sev/Kconfig"
 source "src/mainboard/digitallogic/adl855pc/Kconfig"
 source "src/mainboard/digitallogic/msm586seg/Kconfig"
 source "src/mainboard/digitallogic/msm800sev/Kconfig"

diff --git a/src/mainboard/digitallogic/adl855pc/devicetree.cb b/src/mainboard/digitallogic/adl855pc/devicetree.cb
index 5365b3f538570273257a972e1a9f1c9da3d90b4e..6b52633382766d80db8ed0176c749e7568539e0d 100644 (file)
--- a/src/mainboard/digitallogic/adl855pc/devicetree.cb
+++ b/src/mainboard/digitallogic/adl855pc/devicetree.cb
@@ -1,5 +1,5 @@
 chip northbridge/intel/i855
 chip northbridge/intel/i855

-       device pci_domain 0 on 
+       device pci_domain 0 on

                device pci 0.0 on end
                device pci 1.0 on end
                chip southbridge/intel/i82801dx
                device pci 0.0 on end
                device pci 1.0 on end
                chip southbridge/intel/i82801dx


@@ -51,7 +51,7 @@ chip northbridge/intel/i855
                        end
                end
        end
                        end
                end
        end

-       device apic_cluster 0 on 
+       device apic_cluster 0 on

                chip cpu/intel/socket_mPGA479M
                        device apic 0 on end
                end
                chip cpu/intel/socket_mPGA479M
                        device apic 0 on end
                end

diff --git a/src/mainboard/digitallogic/adl855pc/irq_tables.c b/src/mainboard/digitallogic/adl855pc/irq_tables.c
index f3978d5e815c551e68d345b006dc9a2e674fbdcc..8b4352d25a2a7a6515eed600827fbe3ab10d58da 100644 (file)
--- a/src/mainboard/digitallogic/adl855pc/irq_tables.c
+++ b/src/mainboard/digitallogic/adl855pc/irq_tables.c
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!

    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 
    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 

diff --git a/src/mainboard/digitallogic/adl855pc/romstage.c b/src/mainboard/digitallogic/adl855pc/romstage.c
index 731e681253ffba5ee64f466e91bef62a6a3fa72a..a137a3fd6f3631f217c6dde82b346e505562e28c 100644 (file)
--- a/src/mainboard/digitallogic/adl855pc/romstage.c
+++ b/src/mainboard/digitallogic/adl855pc/romstage.c
@@ -15,7 +15,7 @@
 #include "southbridge/intel/i82801dx/i82801dx_early_smbus.c"
 #include "northbridge/intel/i855/raminit.h"
 #include "northbridge/intel/i855/debug.c"
 #include "southbridge/intel/i82801dx/i82801dx_early_smbus.c"
 #include "northbridge/intel/i855/raminit.h"
 #include "northbridge/intel/i855/debug.c"

-#include "superio/winbond/w83627hf/w83627hf_early_serial.c" 
+#include "superio/winbond/w83627hf/w83627hf_early_serial.c"

 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"
 
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"
 


@@ -45,7 +45,7 @@ void main(unsigned long bist)
                init_timer();
 #endif
        }
                init_timer();
 #endif
        }

-        
+

         w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
         uart_init();
         console_init();
         w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
         uart_init();
         console_init();


@@ -66,7 +66,7 @@ void main(unsigned long bist)
 
                sdram_initialize(ARRAY_SIZE(memctrl), memctrl);
 
 
                sdram_initialize(ARRAY_SIZE(memctrl), memctrl);
 

-       } 
+       }

 
 #if 0
        dump_pci_devices();
 
 #if 0
        dump_pci_devices();


@@ -76,7 +76,7 @@ void main(unsigned long bist)
        ram_check(0x00000000, msr.lo+(msr.hi<<32));
        // Check 16MB of memory @ 0
        ram_check(0x00000000, 0x01000000);
        ram_check(0x00000000, msr.lo+(msr.hi<<32));
        // Check 16MB of memory @ 0
        ram_check(0x00000000, 0x01000000);

-       // Check 16MB of memory @ 2GB 
+       // Check 16MB of memory @ 2GB

        ram_check(0x80000000, 0x81000000);
 #endif
 }
        ram_check(0x80000000, 0x81000000);
 #endif
 }

diff --git a/src/mainboard/digitallogic/msm586seg/devicetree.cb b/src/mainboard/digitallogic/msm586seg/devicetree.cb
index 05067ca632cfc91f9772f9bb67906728823e47a4..1ccf39f5b80700b20f75b39f4aa0b5a9a89b6881 100644 (file)
--- a/src/mainboard/digitallogic/msm586seg/devicetree.cb
+++ b/src/mainboard/digitallogic/msm586seg/devicetree.cb
@@ -1,5 +1,5 @@
 chip cpu/amd/sc520
 chip cpu/amd/sc520

-       device pci_domain 0 on 
+       device pci_domain 0 on

                device pci 0.0 on end
                device pci 12.0 on end # enet
                device pci 14.0 on end # 69000
                device pci 0.0 on end
                device pci 12.0 on end # enet
                device pci 14.0 on end # 69000

diff --git a/src/mainboard/digitallogic/msm586seg/irq_tables.c b/src/mainboard/digitallogic/msm586seg/irq_tables.c
index 9b49747ead30359473fabf4bd8a5e4076cd4b6e4..22d5820a62f30d38576efb6a6d0ae451d79aeea4 100644 (file)
--- a/src/mainboard/digitallogic/msm586seg/irq_tables.c
+++ b/src/mainboard/digitallogic/msm586seg/irq_tables.c
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!

    (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
  *
    (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
  *

diff --git a/src/mainboard/digitallogic/msm586seg/mainboard.c b/src/mainboard/digitallogic/msm586seg/mainboard.c
index fefe553de32d0f82db4b91230d51029e71aaf8ce..2361059a7da9647192738bb8ee764a893ea167bd 100644 (file)
--- a/src/mainboard/digitallogic/msm586seg/mainboard.c
+++ b/src/mainboard/digitallogic/msm586seg/mainboard.c
@@ -14,10 +14,10 @@ static void irqdump(void)
   int i;
   int irqlist[] = {0xd00, 0xd02, 0xd03, 0xd04, 0xd08, 0xd0a,
                0xd14, 0xd18, 0xd1a, 0xd1b, 0xd1c,
   int i;
   int irqlist[] = {0xd00, 0xd02, 0xd03, 0xd04, 0xd08, 0xd0a,
                0xd14, 0xd18, 0xd1a, 0xd1b, 0xd1c,

-               0xd20, 0xd21, 0xd22, 0xd28, 0xd29, 
+               0xd20, 0xd21, 0xd22, 0xd28, 0xd29,

                0xd30, 0xd31, 0xd32, 0xd33,
                0xd30, 0xd31, 0xd32, 0xd33,

-               0xd40, 0xd41, 0xd42, 0xd43,0xd44, 0xd45, 0xd46, 
-               0xd50, 0xd51, 0xd52, 0xd53,0xd54, 0xd55, 0xd56, 0xd57,0xd58, 0xd59, 0xd5a, 
+               0xd40, 0xd41, 0xd42, 0xd43,0xd44, 0xd45, 0xd46,
+               0xd50, 0xd51, 0xd52, 0xd53,0xd54, 0xd55, 0xd56, 0xd57,0xd58, 0xd59, 0xd5a,

                -1};
   mmcr = (void *) 0xfffef000;
 
                -1};
   mmcr = (void *) 0xfffef000;
 


@@ -37,7 +37,7 @@ static void enable_dev(struct device *dev)
        //volatile struct mmcrpic *pic = MMCRPIC;
        volatile struct mmcr *mmcr = MMCRDEFAULT;
 
        //volatile struct mmcrpic *pic = MMCRPIC;
        volatile struct mmcr *mmcr = MMCRDEFAULT;
 

-       /* msm586seg has this register set to a weird value. 
+       /* msm586seg has this register set to a weird value.

         * follow the board, not the manual!
         */
 
         * follow the board, not the manual!
         */
 


@@ -47,7 +47,7 @@ static void enable_dev(struct device *dev)
 
        /* from fuctory bios */
        /* NOTE: the following interrupt settings made interrupts work
 
        /* from fuctory bios */
        /* NOTE: the following interrupt settings made interrupts work

-        * for hard drive, and serial, but not for ethernet 
+        * for hard drive, and serial, but not for ethernet

         */
        /* just do what they say and nobody gets hurt. */
        mmcr->pic.pcicr = 0 ; // M_GINT_MODE | M_S1_MODE | M_S2_MODE;
         */
        /* just do what they say and nobody gets hurt. */
        mmcr->pic.pcicr = 0 ; // M_GINT_MODE | M_S1_MODE | M_S2_MODE;


@@ -78,7 +78,7 @@ static void enable_dev(struct device *dev)
        printk(BIOS_ERR, "0xc22 0x%x\n", *(unsigned short *) 0xfffefc22);
 
        /* The following block has NOT proven sufficient to get
        printk(BIOS_ERR, "0xc22 0x%x\n", *(unsigned short *) 0xfffefc22);
 
        /* The following block has NOT proven sufficient to get

-        * the VGA hardware to talk to us 
+        * the VGA hardware to talk to us

         */
        /* let's set some mmcr stuff per the BIOS settings */
        mmcr->dbctl.dbctl = 0x10;
         */
        /* let's set some mmcr stuff per the BIOS settings */
        mmcr->dbctl.dbctl = 0x10;


@@ -100,20 +100,20 @@ static void enable_dev(struct device *dev)
         */
        mmcr->sysmap.adddecctl = 0x10;
 
         */
        mmcr->sysmap.adddecctl = 0x10;
 

-       /* VGA now talks to us, so this adddecctl was the trick. 
-        * still no interrupts from enet. 
-        * Let's try fixing the piodata stuff, as there may be 
+       /* VGA now talks to us, so this adddecctl was the trick.
+        * still no interrupts from enet.
+        * Let's try fixing the piodata stuff, as there may be

         * some wire there not documented.
         */
        mmcr->pio.data31_16 = 0xffbf;
        /* also, our sl?picmode needs to match fuctory bios */
        mmcr->pic.sl1picmode = 0x80;
        mmcr->pic.sl2picmode = 0x0;
         * some wire there not documented.
         */
        mmcr->pio.data31_16 = 0xffbf;
        /* also, our sl?picmode needs to match fuctory bios */
        mmcr->pic.sl1picmode = 0x80;
        mmcr->pic.sl2picmode = 0x0;

-       /* and, finally, they do set gp5imap and we don't. 
+       /* and, finally, they do set gp5imap and we don't.

         */
        mmcr->pic.gp5imap = 0xd;
        /* remaining problem: almost certainly, the irq table is bogus
         */
        mmcr->pic.gp5imap = 0xd;
        /* remaining problem: almost certainly, the irq table is bogus

-        * NO SHOCK as it came from fuctory bios. 
+        * NO SHOCK as it came from fuctory bios.

         * but let's try these 4 changes for now and see what shakes.
         */
        /* still not interrupts. */
         * but let's try these 4 changes for now and see what shakes.
         */
        /* still not interrupts. */

diff --git a/src/mainboard/digitallogic/msm586seg/romstage.c b/src/mainboard/digitallogic/msm586seg/romstage.c
index 2035993be83c0697996b633d02c1092d5d16d983..ae964fea93eec7b811644e5770ea7bb46ba8225b 100644 (file)
--- a/src/mainboard/digitallogic/msm586seg/romstage.c
+++ b/src/mainboard/digitallogic/msm586seg/romstage.c
@@ -74,7 +74,7 @@ static inline void irqinit(void){
 /* these values taken from the msm board itself.
  * and they cause the board to not even come out of calibrating_delay_loop
  * if you can believe it. Our problem right now is no IDE or serial interrupts
 /* these values taken from the msm board itself.
  * and they cause the board to not even come out of calibrating_delay_loop
  * if you can believe it. Our problem right now is no IDE or serial interrupts

- * So we'll try to put interrupts in, one at a time. IDE first. 
+ * So we'll try to put interrupts in, one at a time. IDE first.

  */
        cp = (volatile unsigned char *) 0xfffefd00;
        *cp =  0x11;
  */
        cp = (volatile unsigned char *) 0xfffefd00;
        *cp =  0x11;


@@ -179,9 +179,9 @@ static void main(unsigned long bist)
                print_err("HI THERE!\n");
                //                      sizemem();
        staticmem();
                print_err("HI THERE!\n");
                //                      sizemem();
        staticmem();

-       print_err("c60 is "); print_err_hex16(*(unsigned short *)0xfffefc60); 
+       print_err("c60 is "); print_err_hex16(*(unsigned short *)0xfffefc60);

        print_err("\n");
        print_err("\n");

-                       
+

        //                      while(1)
        print_err("STATIC MEM DONE\n");
        outb(0xee, 0x80);
        //                      while(1)
        print_err("STATIC MEM DONE\n");
        outb(0xee, 0x80);


@@ -198,18 +198,18 @@ static void main(unsigned long bist)
                         "jnz 1b\n\t"
                         :
                         : "a" (0), "D" (0), "c" (1024*1024)
                         "jnz 1b\n\t"
                         :
                         : "a" (0), "D" (0), "c" (1024*1024)

-                        ); 
-       
-       
+                        );
+
+

 #endif
 #endif

-       
+

 #if 0
        dump_pci_devices();
 #endif
 #if 0
        dump_pci_device(PCI_DEV(0, 0, 0));
 #endif
 #if 0
        dump_pci_devices();
 #endif
 #if 0
        dump_pci_device(PCI_DEV(0, 0, 0));
 #endif

-       
+

 #if 0
        print_err("RAM CHECK!\n");
        // Check 16MB of memory @ 0
 #if 0
        print_err("RAM CHECK!\n");
        // Check 16MB of memory @ 0


@@ -223,10 +223,10 @@ static void main(unsigned long bist)
 #if 1
        {
          volatile unsigned char *src = (unsigned char *) 0x2000000 + 0x60000;
 #if 1
        {
          volatile unsigned char *src = (unsigned char *) 0x2000000 + 0x60000;

-         volatile unsigned char *dst = (unsigned char *) 0x4000; 
+         volatile unsigned char *dst = (unsigned char *) 0x4000;

          for(i = 0; i < 0x20000; i++) {
            /*
          for(i = 0; i < 0x20000; i++) {
            /*

-             print_err("Set dst "); print_err_hex32((unsigned long) dst); 
+             print_err("Set dst "); print_err_hex32((unsigned long) dst);

              print_err(" to "); print_err_hex32(*src); print_err("\n");
            */
            *dst = *src;
              print_err(" to "); print_err_hex32(*src); print_err("\n");
            */
            *dst = *src;


@@ -244,10 +244,10 @@ static void main(unsigned long bist)
                         "jmp *%%edi\n\t"
                         :
                         : "a" (0x4000)
                         "jmp *%%edi\n\t"
                         :
                         : "a" (0x4000)

-                        ); 
-       
+                        );
+

        print_err("Oh dear, I'm afraid it didn't work...\n");
        print_err("Oh dear, I'm afraid it didn't work...\n");

-       
+

        while(1);
 #endif
 }
        while(1);
 #endif
 }

diff --git a/src/mainboard/digitallogic/msm800sev/devicetree.cb b/src/mainboard/digitallogic/msm800sev/devicetree.cb
index 9636dee6788dd2775258616b208204ce15500320..6890e83327fd5b75d54988362bd042be8e44fd11 100644 (file)
--- a/src/mainboard/digitallogic/msm800sev/devicetree.cb
+++ b/src/mainboard/digitallogic/msm800sev/devicetree.cb
@@ -1,5 +1,5 @@
 chip northbridge/amd/lx
 chip northbridge/amd/lx

-       device pci_domain 0 on 
+       device pci_domain 0 on

                device pci 1.0 on end
                device pci 1.1 on end
                chip southbridge/amd/cs5536
                device pci 1.0 on end
                device pci 1.1 on end
                chip southbridge/amd/cs5536


@@ -57,7 +57,7 @@ chip northbridge/amd/lx
                                                io 0x60 = 0x220
                                                io 0x62 = 0x300
                                                irq 0x70 = 9
                                                io 0x60 = 0x220
                                                io 0x62 = 0x300
                                                irq 0x70 = 9

-                                       end                                             
+                                       end

                                        device pnp 2e.8 off end #  GPIO2
                                        device pnp 2e.9 off end #  GPIO3
                                        device pnp 2e.a off end #  ACPI
                                        device pnp 2e.8 off end #  GPIO2
                                        device pnp 2e.9 off end #  GPIO3
                                        device pnp 2e.a off end #  ACPI

diff --git a/src/mainboard/digitallogic/msm800sev/romstage.c b/src/mainboard/digitallogic/msm800sev/romstage.c
index 4598e89ad9210f094479482fe14e3320004e6e3d..379f5517bcb30092cf588a67e6b24ce755ee6c12 100644 (file)
--- a/src/mainboard/digitallogic/msm800sev/romstage.c
+++ b/src/mainboard/digitallogic/msm800sev/romstage.c
@@ -93,7 +93,7 @@ void main(unsigned long bist)
        print_err("POST 02\n");
        __asm__("wbinvd\n");
        print_err("Past wbinvd\n");
        print_err("POST 02\n");
        __asm__("wbinvd\n");
        print_err("Past wbinvd\n");

-       /* we are finding the return does not work on this board. Explicitly call the label that is 
+       /* we are finding the return does not work on this board. Explicitly call the label that is

         * after the call to us. This is gross, but sometimes at this level it is the only way out
         */
        void done_cache_as_ram_main(void);
         * after the call to us. This is gross, but sometimes at this level it is the only way out
         */
        void done_cache_as_ram_main(void);

diff --git a/src/mainboard/eaglelion/5bcm/devicetree.cb b/src/mainboard/eaglelion/5bcm/devicetree.cb
index 2e0c8161fc633073de4c944de61043c1f83d2675..7e55bca54d0e6467b5d6f84b8e775d2b0bb70495 100644 (file)
--- a/src/mainboard/eaglelion/5bcm/devicetree.cb
+++ b/src/mainboard/eaglelion/5bcm/devicetree.cb
@@ -1,5 +1,5 @@
 chip northbridge/amd/gx1
 chip northbridge/amd/gx1

-  device pci_domain 0 on 
+  device pci_domain 0 on

     device pci 0.0 on end
       chip southbridge/amd/cs5530
         device pci 12.0 on
     device pci 0.0 on end
       chip southbridge/amd/cs5530
         device pci 12.0 on

diff --git a/src/mainboard/eaglelion/5bcm/irq_tables.c b/src/mainboard/eaglelion/5bcm/irq_tables.c
index d58662365d76f257ddc02f8e3398fa569f622ef1..bcc53b4a269c3af9d7f15c5b78a51e947938b662 100644 (file)
--- a/src/mainboard/eaglelion/5bcm/irq_tables.c
+++ b/src/mainboard/eaglelion/5bcm/irq_tables.c
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!

    (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
  *
    (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
  *

diff --git a/src/mainboard/eaglelion/5bcm/romstage.c b/src/mainboard/eaglelion/5bcm/romstage.c
index 633c23cd5a51c2aaa3c3ad248f99fe75b0f9414a..11fe81250ab1465fe62ad7b580aa995a52dd792e 100644 (file)
--- a/src/mainboard/eaglelion/5bcm/romstage.c
+++ b/src/mainboard/eaglelion/5bcm/romstage.c
@@ -28,11 +28,11 @@ static void main(unsigned long bist)
 
        /* Halt if there was a built in self test failure */
        report_bist_failure(bist);
 
        /* Halt if there was a built in self test failure */
        report_bist_failure(bist);

-       
+

        cs5530_enable_rom();
 
        sdram_init();
        cs5530_enable_rom();
 
        sdram_init();

-       
+

        /* Check all of memory */
 #if 0
        ram_check(0x00000000, msr.lo);
        /* Check all of memory */
 #if 0
        ram_check(0x00000000, msr.lo);

diff --git a/src/mainboard/emulation/qemu-x86/devicetree.cb b/src/mainboard/emulation/qemu-x86/devicetree.cb
index 2e18d790c97014cc26a2002832153984041b2769..471cc331e13f80ff0280bd7665ebc84ffd8deb69 100644 (file)
--- a/src/mainboard/emulation/qemu-x86/devicetree.cb
+++ b/src/mainboard/emulation/qemu-x86/devicetree.cb
@@ -1,5 +1,5 @@
 chip mainboard/emulation/qemu-x86
 chip mainboard/emulation/qemu-x86

-       device pci_domain 0 on 
+       device pci_domain 0 on

                device pci 0.0 on end
 
                chip southbridge/intel/i82371eb # southbridge
                device pci 0.0 on end
 
                chip southbridge/intel/i82371eb # southbridge

diff --git a/src/mainboard/emulation/qemu-x86/irq_tables.c b/src/mainboard/emulation/qemu-x86/irq_tables.c
index 8402602abd0eafc1e46707b63a1d92d7737e8084..27a48ec5ff2c2a22e99f09f577c66291aeae6737 100644 (file)
--- a/src/mainboard/emulation/qemu-x86/irq_tables.c
+++ b/src/mainboard/emulation/qemu-x86/irq_tables.c
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!

    (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
  *
    (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
  *

diff --git a/src/mainboard/emulation/qemu-x86/mainboard.c b/src/mainboard/emulation/qemu-x86/mainboard.c
index be17698d7d8143d49f76ed01434389ee8b4524dd..7ab02d93c4d58bf0682413227227ae09bb1b86f4 100644 (file)
--- a/src/mainboard/emulation/qemu-x86/mainboard.c
+++ b/src/mainboard/emulation/qemu-x86/mainboard.c
@@ -25,8 +25,8 @@ static void qemu_init(device_t dev)
         */
        pc_keyboard_init(0);
 
         */
        pc_keyboard_init(0);
 

-       /* The PIRQ table is not working well for interrupt routing purposes. 
-        * so we'll just set the IRQ directly. 
+       /* The PIRQ table is not working well for interrupt routing purposes.
+        * so we'll just set the IRQ directly.

        */
        printk(BIOS_INFO, "setting ethernet\n");
        pci_assign_irqs(0, 3, enetIrqs);
        */
        printk(BIOS_INFO, "setting ethernet\n");
        pci_assign_irqs(0, 3, enetIrqs);

diff --git a/src/mainboard/emulation/qemu-x86/romstage.c b/src/mainboard/emulation/qemu-x86/romstage.c
index 1d6eeded110564631f6b1bea4053e3d276fe7edc..0543815a6d9ca105324e3bec587ab017c12d0a61 100644 (file)
--- a/src/mainboard/emulation/qemu-x86/romstage.c
+++ b/src/mainboard/emulation/qemu-x86/romstage.c
@@ -17,10 +17,10 @@ static void main(void)
 {
        /*      init_timer();*/
        post_code(0x05);
 {
        /*      init_timer();*/
        post_code(0x05);

-       
+

        uart_init();
        console_init();
        uart_init();
        console_init();

-       
+

        //print_pci_devices();
        //dump_pci_devices();
 }
        //print_pci_devices();
        //dump_pci_devices();
 }

diff --git a/src/mainboard/gigabyte/Kconfig b/src/mainboard/gigabyte/Kconfig
index 483e3fc8a66911bd62121f886f02611d16a7ad20..9323da7dd636adf13e5dab480cb7fd085959d910 100644 (file)
--- a/src/mainboard/gigabyte/Kconfig
+++ b/src/mainboard/gigabyte/Kconfig
@@ -21,7 +21,7 @@
 choice
        prompt "Mainboard model"
        depends on VENDOR_GIGABYTE
 choice
        prompt "Mainboard model"
        depends on VENDOR_GIGABYTE

-        
+

 source "src/mainboard/gigabyte/ga_2761gxdk/Kconfig"
 source "src/mainboard/gigabyte/ga-6bxc/Kconfig"
 source "src/mainboard/gigabyte/m57sli/Kconfig"
 source "src/mainboard/gigabyte/ga_2761gxdk/Kconfig"
 source "src/mainboard/gigabyte/ga-6bxc/Kconfig"
 source "src/mainboard/gigabyte/m57sli/Kconfig"

diff --git a/src/mainboard/gigabyte/ga_2761gxdk/Kconfig b/src/mainboard/gigabyte/ga_2761gxdk/Kconfig
index d08414f2174430afb433829e6ea245fa8e16fa46..728c40caf9e2faf604e4fdddef1a76cf34df1344 100644 (file)
--- a/src/mainboard/gigabyte/ga_2761gxdk/Kconfig
+++ b/src/mainboard/gigabyte/ga_2761gxdk/Kconfig
@@ -14,7 +14,7 @@ config BOARD_GIGABYTE_GA_2761GXDK
        select LIFT_BSP_APIC_ID
        select K8_REV_F_SUPPORT
        select BOARD_ROMSIZE_KB_512
        select LIFT_BSP_APIC_ID
        select K8_REV_F_SUPPORT
        select BOARD_ROMSIZE_KB_512

- 
+

 config MAINBOARD_DIR
        string
        default gigabyte/ga_2761gxdk
 config MAINBOARD_DIR
        string
        default gigabyte/ga_2761gxdk


@@ -24,7 +24,7 @@ config DCACHE_RAM_BASE
        hex
        default 0xc8000
        depends on BOARD_GIGABYTE_GA_2761GXDK
        hex
        default 0xc8000
        depends on BOARD_GIGABYTE_GA_2761GXDK

-       
+

 config DCACHE_RAM_SIZE
        hex
        default 0x08000
 config DCACHE_RAM_SIZE
        hex
        default 0x08000


@@ -36,7 +36,7 @@ config DCACHE_RAM_GLOBAL_VAR_SIZE
        depends on BOARD_GIGABYTE_GA_2761GXDK
 
 config APIC_ID_OFFSET
        depends on BOARD_GIGABYTE_GA_2761GXDK
 
 config APIC_ID_OFFSET

-       hex     
+       hex

        default 0x10
        depends on BOARD_GIGABYTE_GA_2761GXDK
 
        default 0x10
        depends on BOARD_GIGABYTE_GA_2761GXDK
 


@@ -76,7 +76,7 @@ config MAX_PHYSICAL_CPUS
        depends on BOARD_GIGABYTE_GA_2761GXDK
 
 config HW_MEM_HOLE_SIZE_AUTO_INC
        depends on BOARD_GIGABYTE_GA_2761GXDK
 
 config HW_MEM_HOLE_SIZE_AUTO_INC

-       bool    
+       bool

        default n
        depends on BOARD_GIGABYTE_GA_2761GXDK
 
        default n
        depends on BOARD_GIGABYTE_GA_2761GXDK
 


@@ -86,12 +86,12 @@ config HT_CHAIN_UNITID_BASE
        depends on BOARD_GIGABYTE_GA_2761GXDK
 
 config HT_CHAIN_END_UNITID_BASE
        depends on BOARD_GIGABYTE_GA_2761GXDK
 
 config HT_CHAIN_END_UNITID_BASE

-       hex     
+       hex

        default 0x20
        depends on BOARD_GIGABYTE_GA_2761GXDK
 
 config SERIAL_CPU_INIT
        default 0x20
        depends on BOARD_GIGABYTE_GA_2761GXDK
 
 config SERIAL_CPU_INIT

-       bool    
+       bool

        default n
        depends on BOARD_GIGABYTE_GA_2761GXDK
 
        default n
        depends on BOARD_GIGABYTE_GA_2761GXDK
 

diff --git a/src/mainboard/gigabyte/m57sli/Kconfig b/src/mainboard/gigabyte/m57sli/Kconfig
index 27904270807d27bba2165990057c36c473887746..b36261e53344fa76daf7bc18ffd7ddc3e79233fd 100644 (file)
--- a/src/mainboard/gigabyte/m57sli/Kconfig
+++ b/src/mainboard/gigabyte/m57sli/Kconfig
@@ -17,17 +17,17 @@ config BOARD_GIGABYTE_M57SLI
        select HAVE_ACPI_TABLES
        select K8_REV_F_SUPPORT
        select BOARD_ROMSIZE_KB_512
        select HAVE_ACPI_TABLES
        select K8_REV_F_SUPPORT
        select BOARD_ROMSIZE_KB_512

- 
+

 config MAINBOARD_DIR
        string
 config MAINBOARD_DIR
        string

-       default gigabyte/m57sli 
+       default gigabyte/m57sli

        depends on BOARD_GIGABYTE_M57SLI
 
 config DCACHE_RAM_BASE
        hex
        default 0xc8000
        depends on BOARD_GIGABYTE_M57SLI
        depends on BOARD_GIGABYTE_M57SLI
 
 config DCACHE_RAM_BASE
        hex
        default 0xc8000
        depends on BOARD_GIGABYTE_M57SLI

-       
+

 config DCACHE_RAM_SIZE
        hex
        default 0x08000
 config DCACHE_RAM_SIZE
        hex
        default 0x08000


@@ -39,7 +39,7 @@ config DCACHE_RAM_GLOBAL_VAR_SIZE
        depends on BOARD_GIGABYTE_M57SLI
 
 config APIC_ID_OFFSET
        depends on BOARD_GIGABYTE_M57SLI
 
 config APIC_ID_OFFSET

-       hex     
+       hex

        default 0x10
        depends on BOARD_GIGABYTE_M57SLI
 
        default 0x10
        depends on BOARD_GIGABYTE_M57SLI
 


@@ -79,7 +79,7 @@ config MAX_PHYSICAL_CPUS
        depends on BOARD_GIGABYTE_M57SLI
 
 config HW_MEM_HOLE_SIZE_AUTO_INC
        depends on BOARD_GIGABYTE_M57SLI
 
 config HW_MEM_HOLE_SIZE_AUTO_INC

-       bool    
+       bool

        default n
        depends on BOARD_GIGABYTE_M57SLI
 
        default n
        depends on BOARD_GIGABYTE_M57SLI
 


@@ -89,12 +89,12 @@ config HT_CHAIN_UNITID_BASE
        depends on BOARD_GIGABYTE_M57SLI
 
 config HT_CHAIN_END_UNITID_BASE
        depends on BOARD_GIGABYTE_M57SLI
 
 config HT_CHAIN_END_UNITID_BASE

-       hex     
+       hex

        default 0x20
        depends on BOARD_GIGABYTE_M57SLI
 
 config SERIAL_CPU_INIT
        default 0x20
        depends on BOARD_GIGABYTE_M57SLI
 
 config SERIAL_CPU_INIT

-       bool    
+       bool

        default n
        depends on BOARD_GIGABYTE_M57SLI
 
        default n
        depends on BOARD_GIGABYTE_M57SLI
 

diff --git a/src/mainboard/gigabyte/m57sli/Makefile.inc b/src/mainboard/gigabyte/m57sli/Makefile.inc
index 00075834e11eac0aee571ce455c7cb9c3e8771d5..36be8066fa28938cd3d4155f80f563cc89c730f5 100644 (file)
--- a/src/mainboard/gigabyte/m57sli/Makefile.inc
+++ b/src/mainboard/gigabyte/m57sli/Makefile.inc
@@ -1,6 +1,6 @@
 ##
 ## This file is part of the coreboot project.
 ##
 ## This file is part of the coreboot project.

-## 
+##

 ## Copyright (C) 2007-2008 coresystems GmbH
 ##
 ## This program is free software; you can redistribute it and/or modify
 ## Copyright (C) 2007-2008 coresystems GmbH
 ##
 ## This program is free software; you can redistribute it and/or modify

diff --git a/src/mainboard/gigabyte/m57sli/acpi_tables.c b/src/mainboard/gigabyte/m57sli/acpi_tables.c
index 1bd302271ae783621990f06bb13c131c3bd1c187..60b041a953b5c761e0d0109604cb1b1e980816da 100644 (file)
--- a/src/mainboard/gigabyte/m57sli/acpi_tables.c
+++ b/src/mainboard/gigabyte/m57sli/acpi_tables.c
@@ -2,7 +2,7 @@
  * This file is part of the coreboot project.
  *
  * Written by Stefan Reinauer <stepan@openbios.org>.
  * This file is part of the coreboot project.
  *
  * Written by Stefan Reinauer <stepan@openbios.org>.

- * ACPI FADT, FACS, and DSDT table support added by 
+ * ACPI FADT, FACS, and DSDT table support added by

  *
  * Copyright (C) 2004 Stefan Reinauer <stepan@openbios.org>
  * Copyright (C) 2005 Nick Barker <nick.barker9@btinternet.com>
  *
  * Copyright (C) 2004 Stefan Reinauer <stepan@openbios.org>
  * Copyright (C) 2005 Nick Barker <nick.barker9@btinternet.com>


@@ -47,14 +47,14 @@ unsigned long acpi_fill_madt(unsigned long current)
        unsigned int gsi_base = 0x18;
        extern unsigned char bus_mcp55[8];
        extern unsigned apicid_mcp55;
        unsigned int gsi_base = 0x18;
        extern unsigned char bus_mcp55[8];
        extern unsigned apicid_mcp55;

-       
+

        unsigned sbdn;
        struct resource *res;
        device_t dev;
 
        get_bus_conf();
        sbdn = sysconf.sbdn;
        unsigned sbdn;
        struct resource *res;
        device_t dev;
 
        get_bus_conf();
        sbdn = sysconf.sbdn;

-       
+

        /* Create all subtables for processors. */
        current = acpi_create_madt_lapics(current);
 
        /* Create all subtables for processors. */
        current = acpi_create_madt_lapics(current);
 


@@ -84,7 +84,7 @@ unsigned long acpi_fill_madt(unsigned long current)
 
        /* IRQ0 -> APIC IRQ2. */
        current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
 
        /* IRQ0 -> APIC IRQ2. */
        current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)

-               current, 0, 0, 2, 0x0); 
+               current, 0, 0, 2, 0x0);

 
        /* Create all subtables for processors. */
        current = acpi_create_madt_lapic_nmis(current,
 
        /* Create all subtables for processors. */
        current = acpi_create_madt_lapic_nmis(current,

diff --git a/src/mainboard/gigabyte/m57sli/ap_romstage.c b/src/mainboard/gigabyte/m57sli/ap_romstage.c
index 28f47597e94f5160b989070df160316042b8eb24..8429286bc754ca44b58912ca518418e14275ddcf 100644 (file)
--- a/src/mainboard/gigabyte/m57sli/ap_romstage.c
+++ b/src/mainboard/gigabyte/m57sli/ap_romstage.c
@@ -25,7 +25,7 @@
 #define RAMINIT_SYSINFO 1
 #define CACHE_AS_RAM_ADDRESS_DEBUG 0
 
 #define RAMINIT_SYSINFO 1
 #define CACHE_AS_RAM_ADDRESS_DEBUG 0
 

-#define SET_NB_CFG_54 1 
+#define SET_NB_CFG_54 1

 
 //used by raminit
 #define QRANK_DIMM_SUPPORT 1
 
 //used by raminit
 #define QRANK_DIMM_SUPPORT 1

diff --git a/src/mainboard/gigabyte/m57sli/cmos.layout b/src/mainboard/gigabyte/m57sli/cmos.layout
index 9d37e2bba61f0ed9138fb24d7017a6bceec58778..518f9458b698c637260b1df5ed68c682c06f9c9c 100644 (file)
--- a/src/mainboard/gigabyte/m57sli/cmos.layout
+++ b/src/mainboard/gigabyte/m57sli/cmos.layout
@@ -1,23 +1,23 @@
-## 
+##

 ## This file is part of the coreboot project.
 ## This file is part of the coreboot project.

-## 
+##

 ## Copyright (C) 2007 AMD
 ## Written by Yinghai Lu <yinghailu@amd.com> for AMD.
 ## Copyright (C) 2007 AMD
 ## Written by Yinghai Lu <yinghailu@amd.com> for AMD.

-## 
+##

 ## This program is free software; you can redistribute it and/or modify
 ## it under the terms of the GNU General Public License as published by
 ## the Free Software Foundation; either version 2 of the License, or
 ## (at your option) any later version.
 ## This program is free software; you can redistribute it and/or modify
 ## it under the terms of the GNU General Public License as published by
 ## the Free Software Foundation; either version 2 of the License, or
 ## (at your option) any later version.

-## 
+##

 ## This program is distributed in the hope that it will be useful,
 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 ## GNU General Public License for more details.
 ## This program is distributed in the hope that it will be useful,
 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 ## GNU General Public License for more details.

-## 
+##

 ## You should have received a copy of the GNU General Public License
 ## along with this program; if not, write to the Free Software
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 ## You should have received a copy of the GNU General Public License
 ## along with this program; if not, write to the Free Software
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA

-## 
+##

 
 entries
 
 
 entries
 

diff --git a/src/mainboard/gigabyte/m57sli/dsdt.asl b/src/mainboard/gigabyte/m57sli/dsdt.asl
index c9b969de0e1c75f3fdb1f82eddd66d5561a1af4c..a8c4242bffeac94bc9a9b3ee619834aefab36e25 100644 (file)
--- a/src/mainboard/gigabyte/m57sli/dsdt.asl
+++ b/src/mainboard/gigabyte/m57sli/dsdt.asl
@@ -53,7 +53,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
                        External (HCLK)
                        External (SBDN)
                        External (HCDN)
                        External (HCLK)
                        External (SBDN)
                        External (HCDN)

-                    
+

                        Method (_CRS, 0, NotSerialized)
                         {
                                Name (BUF0, ResourceTemplate ()
                        Method (_CRS, 0, NotSerialized)
                         {
                                Name (BUF0, ResourceTemplate ()


@@ -274,7 +274,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
                                Method (_CRS, 0, NotSerialized)
                                {
                                        Name (BUF1, ResourceTemplate () {
                                Method (_CRS, 0, NotSerialized)
                                {
                                        Name (BUF1, ResourceTemplate () {

-                                               IO (Decode16, 0x0378, 0x0378, 0x01, 0x08) 
+                                               IO (Decode16, 0x0378, 0x0378, 0x01, 0x08)

                                                IRQNoFlags () {7}
                                        })
                                        Return (BUF1)
                                                IRQNoFlags () {7}
                                        })
                                        Return (BUF1)


@@ -291,7 +291,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
                                Method (_CRS, 0, NotSerialized)
                                {
                                        Name (BUF1, ResourceTemplate () {
                                Method (_CRS, 0, NotSerialized)
                                {
                                        Name (BUF1, ResourceTemplate () {

-                                               IO (Decode16, 0x0378, 0x0378, 0x01, 0x04) 
+                                               IO (Decode16, 0x0378, 0x0378, 0x01, 0x04)

                                                IO (Decode16, 0x0778, 0x0778, 0x01, 0x04)
                                                IRQNoFlags() {7}
                                                DMA (Compatibility, NotBusMaster, Transfer8) {0,1,3}
                                                IO (Decode16, 0x0778, 0x0778, 0x01, 0x04)
                                                IRQNoFlags() {7}
                                                DMA (Compatibility, NotBusMaster, Transfer8) {0,1,3}

diff --git a/src/mainboard/gigabyte/m57sli/get_bus_conf.c b/src/mainboard/gigabyte/m57sli/get_bus_conf.c
index 4d381a6e8ec2b214a83f13763dfbc828dd6eccc7..cad922f16adc6d9cce4a4a3ced3403f13bfc7992 100644 (file)
--- a/src/mainboard/gigabyte/m57sli/get_bus_conf.c
+++ b/src/mainboard/gigabyte/m57sli/get_bus_conf.c
@@ -39,7 +39,7 @@
         unsigned apicid_mcp55;
 
 
         unsigned apicid_mcp55;
 
 

-unsigned pci1234x[] = 
+unsigned pci1234x[] =

 {        //Here you only need to set value in pci1234 for HT-IO that could be installed or not
         //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
         0x0000ff0,
 {        //Here you only need to set value in pci1234 for HT-IO that could be installed or not
         //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
         0x0000ff0,


@@ -51,7 +51,7 @@ unsigned pci1234x[] =
 //        0x0000ff0,
 //        0x0000ff0
 };
 //        0x0000ff0,
 //        0x0000ff0
 };

-unsigned hcdnx[] = 
+unsigned hcdnx[] =

 { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
        0x20202020,
 //     0x20202020,
 { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
        0x20202020,
 //     0x20202020,


@@ -62,7 +62,7 @@ unsigned hcdnx[] =
 //        0x20202020,
 //        0x20202020,
 };
 //        0x20202020,
 //        0x20202020,
 };

-unsigned bus_type[256]; 
+unsigned bus_type[256];

 
 
 
 
 
 


@@ -95,13 +95,13 @@ void get_bus_conf(void)
        for(i=0; i<8; i++) {
                bus_mcp55[i] = 0;
        }
        for(i=0; i<8; i++) {
                bus_mcp55[i] = 0;
        }

-       
+

        for(i=0;i<256; i++) {
                bus_type[i] = 0;
        }
 
        bus_type[0] = 1; //pci
        for(i=0;i<256; i++) {
                bus_type[i] = 0;
        }
 
        bus_type[0] = 1; //pci

-       
+

        bus_mcp55[0] = (sysconf.pci1234[0] >> 16) & 0xff;
 
        bus_type[bus_mcp55[0]] = 1;
        bus_mcp55[0] = (sysconf.pci1234[0] >> 16) & 0xff;
 
        bus_type[bus_mcp55[0]] = 1;


@@ -139,8 +139,8 @@ void get_bus_conf(void)
 /*I/O APICs:   APIC ID Version State           Address*/
 #if CONFIG_LOGICAL_CPUS==1
        apicid_base = get_apicid_base(1);
 /*I/O APICs:   APIC ID Version State           Address*/
 #if CONFIG_LOGICAL_CPUS==1
        apicid_base = get_apicid_base(1);

-#else 
-       apicid_base = CONFIG_MAX_PHYSICAL_CPUS; 
+#else
+       apicid_base = CONFIG_MAX_PHYSICAL_CPUS;

 #endif
        apicid_mcp55 = apicid_base+0;
 
 #endif
        apicid_mcp55 = apicid_base+0;
 

diff --git a/src/mainboard/gigabyte/m57sli/irq_tables.c b/src/mainboard/gigabyte/m57sli/irq_tables.c
index 5cb6d8420c28bf35d675dbca36f7229961b71285..bc6aded97fc4aaec05c0950d111d91aab9e7fa44 100644 (file)
--- a/src/mainboard/gigabyte/m57sli/irq_tables.c
+++ b/src/mainboard/gigabyte/m57sli/irq_tables.c
@@ -19,7 +19,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 

-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!

    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 
    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 


@@ -33,11 +33,11 @@
 
 #include <cpu/amd/amdk8_sysconf.h>
 
 
 #include <cpu/amd/amdk8_sysconf.h>
 

-static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0, 
+static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,

                uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
                uint8_t slot, uint8_t rfu)
 {
                uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
                uint8_t slot, uint8_t rfu)
 {

-        pirq_info->bus = bus; 
+        pirq_info->bus = bus;

         pirq_info->devfn = devfn;
                 pirq_info->irq[0].link = link0;
                 pirq_info->irq[0].bitmap = bitmap0;
         pirq_info->devfn = devfn;
                 pirq_info->irq[0].link = link0;
                 pirq_info->irq[0].bitmap = bitmap0;


@@ -79,15 +79,15 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 
        pirq = (void *)(addr);
        v = (uint8_t *)(addr);
 
        pirq = (void *)(addr);
        v = (uint8_t *)(addr);

-       
+

        pirq->signature = PIRQ_SIGNATURE;
        pirq->version  = PIRQ_VERSION;
        pirq->signature = PIRQ_SIGNATURE;
        pirq->version  = PIRQ_VERSION;

-       
+

        pirq->rtr_bus = bus_mcp55[0];
        pirq->rtr_devfn = ((sbdn+6)<<3)|0;
 
        pirq->exclusive_irqs = 0;
        pirq->rtr_bus = bus_mcp55[0];
        pirq->rtr_devfn = ((sbdn+6)<<3)|0;
 
        pirq->exclusive_irqs = 0;

-       
+

        pirq->rtr_vendor = 0x10de;
        pirq->rtr_device = 0x0370;
 
        pirq->rtr_vendor = 0x10de;
        pirq->rtr_device = 0x0370;
 


@@ -100,11 +100,11 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 //pci bridge
        write_pirq_info(pirq_info, bus_mcp55[0], ((sbdn+6)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
        pirq_info++; slot_num++;
 //pci bridge
        write_pirq_info(pirq_info, bus_mcp55[0], ((sbdn+6)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
        pirq_info++; slot_num++;

-        
-       pirq->size = 32 + 16 * slot_num; 
+
+       pirq->size = 32 + 16 * slot_num;

 
         for (i = 0; i < pirq->size; i++)
 
         for (i = 0; i < pirq->size; i++)

-                sum += v[i];   
+                sum += v[i];

 
        sum = pirq->checksum - sum;
 
 
        sum = pirq->checksum - sum;
 

diff --git a/src/mainboard/gigabyte/m57sli/mptable.c b/src/mainboard/gigabyte/m57sli/mptable.c
index 93e6c274c9729cec4d3018b96b57c91dcf06dc4c..3aad7e281ff63297352af4abc40b6f2e8b9177c5 100644 (file)
--- a/src/mainboard/gigabyte/m57sli/mptable.c
+++ b/src/mainboard/gigabyte/m57sli/mptable.c
@@ -32,7 +32,7 @@ extern unsigned char bus_mcp55[8]; //1
 
 extern unsigned apicid_mcp55;
 
 
 extern unsigned apicid_mcp55;
 

-extern unsigned bus_type[256]; 
+extern unsigned bus_type[256];

 
 
 
 
 
 


@@ -94,7 +94,7 @@ static void *smp_write_config_table(void *v)
                 }
        }
 
                 }
        }
 

-       /*I/O Ints:          Type       Trigger    Polarity                       Bus ID   IRQ  APIC ID       PIN# */   
+       /*I/O Ints:          Type       Trigger    Polarity                       Bus ID   IRQ  APIC ID       PIN# */

        smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_mcp55, 0x0);
 
 /* ISA ints are edge-triggered, and usually originate from the ISA bus,
        smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_mcp55, 0x0);
 
 /* ISA ints are edge-triggered, and usually originate from the ISA bus,


@@ -122,7 +122,7 @@ static void *smp_write_config_table(void *v)
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,\
                         bus_mcp55[bus], (((dev)<<2)|(fn)), apicid_mcp55, (pin))
 
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,\
                         bus_mcp55[bus], (((dev)<<2)|(fn)), apicid_mcp55, (pin))
 

-       PCI_INT(0,sbdn+1,1, 10); /* SMBus */ 
+       PCI_INT(0,sbdn+1,1, 10); /* SMBus */

        PCI_INT(0,sbdn+2,0, 22); /* USB */
        PCI_INT(0,sbdn+2,1, 23); /* USB */
        PCI_INT(0,sbdn+4,0, 21); /* IDE */
        PCI_INT(0,sbdn+2,0, 22); /* USB */
        PCI_INT(0,sbdn+2,1, 23); /* USB */
        PCI_INT(0,sbdn+4,0, 21); /* IDE */


@@ -144,8 +144,8 @@ static void *smp_write_config_table(void *v)
         }
 
        /* On bus 1: the PCI bus slots...
         }
 
        /* On bus 1: the PCI bus slots...

-          pyhsical PCI slots are j = 7,8 
-          FireWire is j = 10           
+          pyhsical PCI slots are j = 7,8
+          FireWire is j = 10

        */
         k=2;
         for(i=0; i<4; i++){
        */
         k=2;
         for(i=0; i<4; i++){

diff --git a/src/mainboard/gigabyte/m57sli/resourcemap.c b/src/mainboard/gigabyte/m57sli/resourcemap.c
index 847cd86e65396e801fe72d7f1c77e28bf537a341..43ff3ed11aceebf632e6d65cfea6600cacd4b20d 100644 (file)
--- a/src/mainboard/gigabyte/m57sli/resourcemap.c
+++ b/src/mainboard/gigabyte/m57sli/resourcemap.c
@@ -161,7 +161,7 @@ static void setup_mb_resource_map(void)
                 *         1 = base/limit registers i are read-only
                 * [ 7: 4] Reserved
                 * [31: 8] Memory-Mapped I/O Base Address i (39-16)
                 *         1 = base/limit registers i are read-only
                 * [ 7: 4] Reserved
                 * [31: 8] Memory-Mapped I/O Base Address i (39-16)

-                *         This field defines the upper address bits of a 40bit address 
+                *         This field defines the upper address bits of a 40bit address

                 *         that defines the start of memory-mapped I/O region i
                 */
                PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,
                 *         that defines the start of memory-mapped I/O region i
                 */
                PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,


@@ -199,7 +199,7 @@ static void setup_mb_resource_map(void)
                 * [31:25] Reserved
                 */
 //             PCI_ADDR(0, 0x18, 1, 0xC4), 0xFE000FC8, 0x00007000,
                 * [31:25] Reserved
                 */
 //             PCI_ADDR(0, 0x18, 1, 0xC4), 0xFE000FC8, 0x00007000,

-               PCI_ADDR(0, 0x18, 1, 0xCC), 0xFE000FC8, 0x00000000, 
+               PCI_ADDR(0, 0x18, 1, 0xCC), 0xFE000FC8, 0x00000000,

                PCI_ADDR(0, 0x18, 1, 0xD4), 0xFE000FC8, 0x00000000,
                PCI_ADDR(0, 0x18, 1, 0xDC), 0xFE000FC8, 0x00000000,
 
                PCI_ADDR(0, 0x18, 1, 0xD4), 0xFE000FC8, 0x00000000,
                PCI_ADDR(0, 0x18, 1, 0xDC), 0xFE000FC8, 0x00000000,
 


@@ -217,7 +217,7 @@ static void setup_mb_resource_map(void)
                 * [ 3: 2] Reserved
                 * [ 4: 4] VGA Enable
                 *         0 = VGA matches Disabled
                 * [ 3: 2] Reserved
                 * [ 4: 4] VGA Enable
                 *         0 = VGA matches Disabled

-                *         1 = matches all address < 64K and where A[9:0] is in the 
+                *         1 = matches all address < 64K and where A[9:0] is in the

                 *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
                 * [ 5: 5] ISA Enable
                 *         0 = ISA matches Disabled
                 *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
                 * [ 5: 5] ISA Enable
                 *         0 = ISA matches Disabled


@@ -225,7 +225,7 @@ static void setup_mb_resource_map(void)
                 *             from matching agains this base/limit pair
                 * [11: 6] Reserved
                 * [24:12] PCI I/O Base i
                 *             from matching agains this base/limit pair
                 * [11: 6] Reserved
                 * [24:12] PCI I/O Base i

-                *         This field defines the start of PCI I/O region n 
+                *         This field defines the start of PCI I/O region n

                 * [31:25] Reserved
                 */
 //             PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000033,
                 * [31:25] Reserved
                 */
 //             PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000033,


@@ -270,9 +270,9 @@ static void setup_mb_resource_map(void)
                 *         This field defines the highest bus number in configuration region i
                 */
 //             PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0xff000003, /* link 0 of cpu 0 --> Nvidia MCP55 */
                 *         This field defines the highest bus number in configuration region i
                 */
 //             PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0xff000003, /* link 0 of cpu 0 --> Nvidia MCP55 */

-               PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000000, 
+               PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000000,

                PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x00000000,
                PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x00000000,

-               PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000, 
+               PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000,

 
        };
 
 
        };
 

diff --git a/src/mainboard/gigabyte/m57sli/romstage.c b/src/mainboard/gigabyte/m57sli/romstage.c
index 1e3bee8845e722b3ac0532bccc9488912c00fb5a..3f2f5e6f537d61433534ff7e82bb285a2d3e1b7a 100644 (file)
--- a/src/mainboard/gigabyte/m57sli/romstage.c
+++ b/src/mainboard/gigabyte/m57sli/romstage.c
@@ -39,7 +39,7 @@
 #endif
 
 #define DBGP_DEFAULT 7
 #endif
 
 #define DBGP_DEFAULT 7

- 
+

 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>


@@ -123,7 +123,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 #include "northbridge/amd/amdk8/raminit_f.c"
 #include "lib/generic_sdram.c"
 
 #include "northbridge/amd/amdk8/raminit_f.c"
 #include "lib/generic_sdram.c"
 

-#include "resourcemap.c" 
+#include "resourcemap.c"

 
 #include "cpu/amd/dualcore/dualcore.c"
 
 
 #include "cpu/amd/dualcore/dualcore.c"
 


@@ -142,13 +142,13 @@ static void sio_setup(void)
         uint8_t byte;
 
         byte = pci_read_config8(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0x7b);
         uint8_t byte;
 
         byte = pci_read_config8(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0x7b);

-        byte |= 0x20; 
+        byte |= 0x20;

         pci_write_config8(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0x7b, byte);
         pci_write_config8(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0x7b, byte);

-        
+

         dword = pci_read_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa0);
         dword |= (1<<0);
         pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa0, dword);
         dword = pci_read_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa0);
         dword |= (1<<0);
         pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa0, dword);

-        
+

         dword = pci_read_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa4);
         dword |= (1<<16);
         pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa4, dword);
         dword = pci_read_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa4);
         dword |= (1<<16);
         pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa4, dword);


@@ -165,7 +165,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
                        (0xa<<3)|5, (0xa<<3)|7, 0, 0,
        };
 
                        (0xa<<3)|5, (0xa<<3)|7, 0, 0,
        };
 

-        struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE 
+        struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE

                + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
 
         int needs_reset = 0;
                + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
 
         int needs_reset = 0;


@@ -209,7 +209,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         setup_mb_resource_map();
 
         uart_init();
         setup_mb_resource_map();
 
         uart_init();

-       
+

        /* Halt if there was a built in self test failure */
        report_bist_failure(bist);
 
        /* Halt if there was a built in self test failure */
        report_bist_failure(bist);
 


@@ -281,7 +281,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         //It's the time to set ctrl in sysinfo now;
        fill_mem_ctrl(sysinfo->nodes, sysinfo->ctrl, spd_addr);
 
         //It's the time to set ctrl in sysinfo now;
        fill_mem_ctrl(sysinfo->nodes, sysinfo->ctrl, spd_addr);
 

-        enable_smbus(); 
+        enable_smbus();

 
         /* all ap stopped? */
 
 
         /* all ap stopped? */
 

diff --git a/src/mainboard/hp/Kconfig b/src/mainboard/hp/Kconfig
index f216a7e58da1a9a21bae04bbafae59c8c14fd4b8..36857e5f8770c9fa7434824d272694fbb463bb5b 100644 (file)
--- a/src/mainboard/hp/Kconfig
+++ b/src/mainboard/hp/Kconfig
@@ -1,7 +1,7 @@
 choice
        prompt "Mainboard model"
        depends on VENDOR_HP
 choice
        prompt "Mainboard model"
        depends on VENDOR_HP

-        
+

 source "src/mainboard/hp/dl145_g3/Kconfig"
 source "src/mainboard/hp/e_vectra_p2706t/Kconfig"
 
 source "src/mainboard/hp/dl145_g3/Kconfig"
 source "src/mainboard/hp/e_vectra_p2706t/Kconfig"
 

diff --git a/src/mainboard/hp/dl145_g3/romstage.c b/src/mainboard/hp/dl145_g3/romstage.c
index 2e4d4109dfe1ea4f2186834bac0fbcc30f07bff9..799e3fa7e1bb94c1e608cc6dc2e60e09a101cee2 100644 (file)
--- a/src/mainboard/hp/dl145_g3/romstage.c
+++ b/src/mainboard/hp/dl145_g3/romstage.c
@@ -185,7 +185,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
                DIMM5, DIMM7, 0, 0,
        };
 
                DIMM5, DIMM7, 0, 0,
        };
 

-       struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE 
+       struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE

                + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
 
        int needs_reset;
                + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
 
        int needs_reset;

diff --git a/src/mainboard/ibm/Kconfig b/src/mainboard/ibm/Kconfig
index d3d4f292e12558d1af5542cc2c5534530ab22c75..d9d1774532c6ed82a1c774c06841e87c1a31e963 100644 (file)
--- a/src/mainboard/ibm/Kconfig
+++ b/src/mainboard/ibm/Kconfig
@@ -1,7 +1,7 @@
 choice
        prompt "Mainboard model"
        depends on VENDOR_IBM
 choice
        prompt "Mainboard model"
        depends on VENDOR_IBM

-        
+

 source "src/mainboard/ibm/e325/Kconfig"
 source "src/mainboard/ibm/e326/Kconfig"
 
 source "src/mainboard/ibm/e325/Kconfig"
 source "src/mainboard/ibm/e326/Kconfig"
 

diff --git a/src/mainboard/ibm/e325/devicetree.cb b/src/mainboard/ibm/e325/devicetree.cb
index 4db7c0005e4a4ab51779aacaca36b2f7296db22b..1b63301c09f537ca9c0d6905f3b4437136874bca 100644 (file)
--- a/src/mainboard/ibm/e325/devicetree.cb
+++ b/src/mainboard/ibm/e325/devicetree.cb
@@ -18,7 +18,7 @@ chip northbridge/amd/amdk8/root_complex
                                        end
                                        device pci 1.0 on
                                                chip superio/nsc/pc87366
                                        end
                                        device pci 1.0 on
                                                chip superio/nsc/pc87366

-                                                       device  pnp 2e.0 off  # Floppy 
+                                                       device  pnp 2e.0 off  # Floppy

                                                                 io 0x60 = 0x3f0
                                                                irq 0x70 = 6
                                                                drq 0x74 = 2
                                                                 io 0x60 = 0x3f0
                                                                irq 0x70 = 6
                                                                drq 0x74 = 2


@@ -45,7 +45,7 @@ chip northbridge/amd/amdk8/root_complex
                                                        device pnp 2e.7 off end # GPIO
                                                        device pnp 2e.8 off end # ACB
                                                        device pnp 2e.9 off end # FSCM
                                                        device pnp 2e.7 off end # GPIO
                                                        device pnp 2e.8 off end # ACB
                                                        device pnp 2e.9 off end # FSCM

-                                                       device pnp 2e.a off end # WDT  
+                                                       device pnp 2e.a off end # WDT

                                                end
                                        end
                                        device pci 1.1 on end
                                                end
                                        end
                                        device pci 1.1 on end


@@ -54,7 +54,7 @@ chip northbridge/amd/amdk8/root_complex
                                        device pci 1.5 off end
                                        device pci 1.6 off end
                                end
                                        device pci 1.5 off end
                                        device pci 1.6 off end
                                end

-                       end #  device pci 18.0 
+                       end #  device pci 18.0

                        device pci 18.0 on end # LDT2
                        device pci 18.1 on end
                        device pci 18.2 on end
                        device pci 18.0 on end # LDT2
                        device pci 18.1 on end
                        device pci 18.2 on end


@@ -68,7 +68,7 @@ chip northbridge/amd/amdk8/root_complex
                        device pci 19.2 on end
                        device pci 19.3 on end
                end
                        device pci 19.2 on end
                        device pci 19.3 on end
                end

-       end 
+       end

        device apic_cluster 0 on
                chip cpu/amd/socket_940
                        device apic 0 on end
        device apic_cluster 0 on
                chip cpu/amd/socket_940
                        device apic 0 on end

diff --git a/src/mainboard/ibm/e325/irq_tables.c b/src/mainboard/ibm/e325/irq_tables.c
index a9e8d071661b6be4f9ff3897301060100b5b8b34..e537b65ab16f758c45db898c51ff952f306d8815 100644 (file)
--- a/src/mainboard/ibm/e325/irq_tables.c
+++ b/src/mainboard/ibm/e325/irq_tables.c
@@ -12,7 +12,7 @@
        {linkc, AVAILABLE_IRQS}, {linkd, AVAILABLE_IRQS}}, slot, 0}
 
 /*  Each IRQ_SLOT entry consists of:
        {linkc, AVAILABLE_IRQS}, {linkd, AVAILABLE_IRQS}}, slot, 0}
 
 /*  Each IRQ_SLOT entry consists of:

- *  bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu  
+ *  bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu

  */
 
 const struct irq_routing_table intel_irq_routing_table = {
  */
 
 const struct irq_routing_table intel_irq_routing_table = {

diff --git a/src/mainboard/ibm/e325/resourcemap.c b/src/mainboard/ibm/e325/resourcemap.c
index b80347eb0cb974cb64d9ca71f795edb25dc249ce..85aafbf5a7db511c91451cef9626c91d3aaad613 100644 (file)
--- a/src/mainboard/ibm/e325/resourcemap.c
+++ b/src/mainboard/ibm/e325/resourcemap.c
@@ -134,7 +134,7 @@ static void setup_ibm_e325_resource_map(void)
         *         1 = base/limit registers i are read-only
         * [ 7: 4] Reserved
         * [31: 8] Memory-Mapped I/O Base Address i (39-16)
         *         1 = base/limit registers i are read-only
         * [ 7: 4] Reserved
         * [31: 8] Memory-Mapped I/O Base Address i (39-16)

-        *         This field defines the upper address bits of a 40bit address 
+        *         This field defines the upper address bits of a 40bit address

         *         that defines the start of memory-mapped I/O region i
         */
 
         *         that defines the start of memory-mapped I/O region i
         */
 


@@ -143,8 +143,8 @@ static void setup_ibm_e325_resource_map(void)
        //PCI_ADDR(0, 0x18, 1, 0xbc), 0x48, 0x0,
        // PCI_ADDR(0, 0x18, 1, 0xb8), 0xf0, 0x0,
 
        //PCI_ADDR(0, 0x18, 1, 0xbc), 0x48, 0x0,
        // PCI_ADDR(0, 0x18, 1, 0xb8), 0xf0, 0x0,
 

-       PCI_ADDR(0, 0x18, 1, 0xb4), 0x48, 0xfec010, 
-       PCI_ADDR(0, 0x18, 1, 0xb0), 0xf0, 0xfec003, 
+       PCI_ADDR(0, 0x18, 1, 0xb4), 0x48, 0xfec010,
+       PCI_ADDR(0, 0x18, 1, 0xb0), 0xf0, 0xfec003,

        //PCI_ADDR(0, 0x18, 1, 0xb4), 0x48, 0x0,
        //PCI_ADDR(0, 0x18, 1, 0xb0), 0xf0, 0x0,
 
        //PCI_ADDR(0, 0x18, 1, 0xb4), 0x48, 0x0,
        //PCI_ADDR(0, 0x18, 1, 0xb0), 0xf0, 0x0,
 


@@ -153,19 +153,19 @@ static void setup_ibm_e325_resource_map(void)
        //PCI_ADDR(0, 0x18, 1, 0xac), 0x48, 0x0,
        //PCI_ADDR(0, 0x18, 1, 0xa8), 0xf0, 0x0,
 
        //PCI_ADDR(0, 0x18, 1, 0xac), 0x48, 0x0,
        //PCI_ADDR(0, 0x18, 1, 0xa8), 0xf0, 0x0,
 

-       PCI_ADDR(0, 0x18, 1, 0xa4), 0x48, 0xfed010, 
+       PCI_ADDR(0, 0x18, 1, 0xa4), 0x48, 0xfed010,

        PCI_ADDR(0, 0x18, 1, 0xa0), 0xf0, 0xfed003,
        //PCI_ADDR(0, 0x18, 1, 0xa4), 0x48, 0x0,
        //PCI_ADDR(0, 0x18, 1, 0xa0), 0xf0, 0x0,
 
        PCI_ADDR(0, 0x18, 1, 0xa0), 0xf0, 0xfed003,
        //PCI_ADDR(0, 0x18, 1, 0xa4), 0x48, 0x0,
        //PCI_ADDR(0, 0x18, 1, 0xa0), 0xf0, 0x0,
 

-       PCI_ADDR(0, 0x18, 1, 0x9c), 0x48, 0x0, 
-       PCI_ADDR(0, 0x18, 1, 0x98), 0xf0, 0x0, 
-       PCI_ADDR(0, 0x18, 1, 0x94), 0x48, 0x0, 
-       PCI_ADDR(0, 0x18, 1, 0x90), 0xf0, 0x0, 
-       PCI_ADDR(0, 0x18, 1, 0x8c), 0x48, 0x0, 
-       PCI_ADDR(0, 0x18, 1, 0x88), 0xf0, 0x0, 
-       PCI_ADDR(0, 0x18, 1, 0x84), 0x48, 0x0, 
-       PCI_ADDR(0, 0x18, 1, 0x80), 0xf0, 0x0, 
+       PCI_ADDR(0, 0x18, 1, 0x9c), 0x48, 0x0,
+       PCI_ADDR(0, 0x18, 1, 0x98), 0xf0, 0x0,
+       PCI_ADDR(0, 0x18, 1, 0x94), 0x48, 0x0,
+       PCI_ADDR(0, 0x18, 1, 0x90), 0xf0, 0x0,
+       PCI_ADDR(0, 0x18, 1, 0x8c), 0x48, 0x0,
+       PCI_ADDR(0, 0x18, 1, 0x88), 0xf0, 0x0,
+       PCI_ADDR(0, 0x18, 1, 0x84), 0x48, 0x0,
+       PCI_ADDR(0, 0x18, 1, 0x80), 0xf0, 0x0,

        /* PCI I/O Limit i Registers
         * F1:0xC4 i = 0
         * F1:0xCC i = 1
        /* PCI I/O Limit i Registers
         * F1:0xC4 i = 0
         * F1:0xCC i = 1


@@ -205,7 +205,7 @@ static void setup_ibm_e325_resource_map(void)
         * [ 3: 2] Reserved
         * [ 4: 4] VGA Enable
         *         0 = VGA matches Disabled
         * [ 3: 2] Reserved
         * [ 4: 4] VGA Enable
         *         0 = VGA matches Disabled

-        *         1 = matches all address < 64K and where A[9:0] is in the 
+        *         1 = matches all address < 64K and where A[9:0] is in the

         *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
         * [ 5: 5] ISA Enable
         *         0 = ISA matches Disabled
         *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
         * [ 5: 5] ISA Enable
         *         0 = ISA matches Disabled


@@ -213,17 +213,17 @@ static void setup_ibm_e325_resource_map(void)
         *             from matching agains this base/limit pair
         * [11: 6] Reserved
         * [24:12] PCI I/O Base i
         *             from matching agains this base/limit pair
         * [11: 6] Reserved
         * [24:12] PCI I/O Base i

-        *         This field defines the start of PCI I/O region n 
+        *         This field defines the start of PCI I/O region n

         * [31:25] Reserved
         */
         * [31:25] Reserved
         */

-       PCI_ADDR(0, 0x18, 1, 0xdc), 0xFE000FC8, 0x1fff010, 
-       PCI_ADDR(0, 0x18, 1, 0xd8), 0xFE000FCC, 0x33, 
-       PCI_ADDR(0, 0x18, 1, 0xd4), 0xFE000FC8, 0x0, 
-       PCI_ADDR(0, 0x18, 1, 0xd0), 0xFE000FCC, 0x0, 
-       PCI_ADDR(0, 0x18, 1, 0xcc), 0xFE000FC8, 0x0, 
-       PCI_ADDR(0, 0x18, 1, 0xc8), 0xFE000FCC, 0x0, 
-       PCI_ADDR(0, 0x18, 1, 0xc4), 0xFE000FC8, 0x0, 
-       PCI_ADDR(0, 0x18, 1, 0xc0), 0xFE000FCC, 0x0, 
+       PCI_ADDR(0, 0x18, 1, 0xdc), 0xFE000FC8, 0x1fff010,
+       PCI_ADDR(0, 0x18, 1, 0xd8), 0xFE000FCC, 0x33,
+       PCI_ADDR(0, 0x18, 1, 0xd4), 0xFE000FC8, 0x0,
+       PCI_ADDR(0, 0x18, 1, 0xd0), 0xFE000FCC, 0x0,
+       PCI_ADDR(0, 0x18, 1, 0xcc), 0xFE000FC8, 0x0,
+       PCI_ADDR(0, 0x18, 1, 0xc8), 0xFE000FCC, 0x0,
+       PCI_ADDR(0, 0x18, 1, 0xc4), 0xFE000FC8, 0x0,
+       PCI_ADDR(0, 0x18, 1, 0xc0), 0xFE000FCC, 0x0,

        /* Config Base and Limit i Registers
         * F1:0xE0 i = 0
         * F1:0xE4 i = 1
        /* Config Base and Limit i Registers
         * F1:0xE0 i = 0
         * F1:0xE4 i = 1


@@ -260,10 +260,10 @@ static void setup_ibm_e325_resource_map(void)
         * [31:24] Bus Number Limit i
         *         This field defines the highest bus number in configuration regin i
         */
         * [31:24] Bus Number Limit i
         *         This field defines the highest bus number in configuration regin i
         */

-       PCI_ADDR(0, 0x18, 1, 0xe0), 0x0000FC88, 0xff040103, 
-       PCI_ADDR(0, 0x18, 1, 0xe4), 0x0000FC88, 0, 
-       PCI_ADDR(0, 0x18, 1, 0xe8), 0x0000FC88, 0, 
-       PCI_ADDR(0, 0x18, 1, 0xec), 0x0000FC88, 0, 
+       PCI_ADDR(0, 0x18, 1, 0xe0), 0x0000FC88, 0xff040103,
+       PCI_ADDR(0, 0x18, 1, 0xe4), 0x0000FC88, 0,
+       PCI_ADDR(0, 0x18, 1, 0xe8), 0x0000FC88, 0,
+       PCI_ADDR(0, 0x18, 1, 0xec), 0x0000FC88, 0,

         };
         int max;
         max = ARRAY_SIZE(register_values);
         };
         int max;
         max = ARRAY_SIZE(register_values);

diff --git a/src/mainboard/ibm/e325/romstage.c b/src/mainboard/ibm/e325/romstage.c
index 0200fcd0408bdeb4314d9144b534c2ba4c0f7c5a..7697450b0eb21537f78c7bc055a27ce51c2801a2 100644 (file)
--- a/src/mainboard/ibm/e325/romstage.c
+++ b/src/mainboard/ibm/e325/romstage.c
@@ -1,4 +1,4 @@
- 
+

 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>


@@ -142,7 +142,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         setup_ibm_e325_resource_map();
 
        needs_reset = setup_coherent_ht_domain();
         setup_ibm_e325_resource_map();
 
        needs_reset = setup_coherent_ht_domain();

-       
+

 #if CONFIG_LOGICAL_CPUS==1
         // It is said that we should start core1 after all core0 launched
         start_other_cores();
 #if CONFIG_LOGICAL_CPUS==1
         // It is said that we should start core1 after all core0 launched
         start_other_cores();

diff --git a/src/mainboard/ibm/e326/devicetree.cb b/src/mainboard/ibm/e326/devicetree.cb
index a8576968cb283706d8699db191c9fed7bc692a3a..f1759dd81e59d0a45e15079fc027cc625a3b93d4 100644 (file)
--- a/src/mainboard/ibm/e326/devicetree.cb
+++ b/src/mainboard/ibm/e326/devicetree.cb
@@ -25,7 +25,7 @@ chip northbridge/amd/amdk8/root_complex
                                        end
                                        device pci 1.0 on
                                                chip superio/nsc/pc87366
                                        end
                                        device pci 1.0 on
                                                chip superio/nsc/pc87366

-                                                       device  pnp 2e.0 off  # Floppy 
+                                                       device  pnp 2e.0 off  # Floppy

                                                                 io 0x60 = 0x3f0
                                                                irq 0x70 = 6
                                                                drq 0x74 = 2
                                                                 io 0x60 = 0x3f0
                                                                irq 0x70 = 6
                                                                drq 0x74 = 2


@@ -52,7 +52,7 @@ chip northbridge/amd/amdk8/root_complex
                                                        device pnp 2e.7 off end # GPIO
                                                        device pnp 2e.8 off end # ACB
                                                        device pnp 2e.9 off end # FSCM
                                                        device pnp 2e.7 off end # GPIO
                                                        device pnp 2e.8 off end # ACB
                                                        device pnp 2e.9 off end # FSCM

-                                                       device pnp 2e.a off end # WDT  
+                                                       device pnp 2e.a off end # WDT

                                                end
                                        end
                                        device pci 1.1 on end
                                                end
                                        end
                                        device pci 1.1 on end


@@ -63,12 +63,12 @@ chip northbridge/amd/amdk8/root_complex
                                        register "ide0_enable" = "1"
                                        register "ide1_enable" = "1"
                                end
                                        register "ide0_enable" = "1"
                                        register "ide1_enable" = "1"
                                end

-                       end #  device pci 18.0 
+                       end #  device pci 18.0

                        device pci 18.0 on end # LDT2
                        device pci 18.1 on end
                        device pci 18.2 on end
                        device pci 18.3 on end
                end
                        device pci 18.0 on end # LDT2
                        device pci 18.1 on end
                        device pci 18.2 on end
                        device pci 18.3 on end
                end

-       end 
+       end

 end
 
 end
 

diff --git a/src/mainboard/ibm/e326/irq_tables.c b/src/mainboard/ibm/e326/irq_tables.c
index a9e8d071661b6be4f9ff3897301060100b5b8b34..e537b65ab16f758c45db898c51ff952f306d8815 100644 (file)
--- a/src/mainboard/ibm/e326/irq_tables.c
+++ b/src/mainboard/ibm/e326/irq_tables.c
@@ -12,7 +12,7 @@
        {linkc, AVAILABLE_IRQS}, {linkd, AVAILABLE_IRQS}}, slot, 0}
 
 /*  Each IRQ_SLOT entry consists of:
        {linkc, AVAILABLE_IRQS}, {linkd, AVAILABLE_IRQS}}, slot, 0}
 
 /*  Each IRQ_SLOT entry consists of:

- *  bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu  
+ *  bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu

  */
 
 const struct irq_routing_table intel_irq_routing_table = {
  */
 
 const struct irq_routing_table intel_irq_routing_table = {

diff --git a/src/mainboard/ibm/e326/resourcemap.c b/src/mainboard/ibm/e326/resourcemap.c
index a37496879b03b4ea321da820cf67bd7ebc2206b3..98fdcc0ec620908ad8b942475f7be1399b280cf9 100644 (file)
--- a/src/mainboard/ibm/e326/resourcemap.c
+++ b/src/mainboard/ibm/e326/resourcemap.c
@@ -134,7 +134,7 @@ static void setup_ibm_e326_resource_map(void)
         *         1 = base/limit registers i are read-only
         * [ 7: 4] Reserved
         * [31: 8] Memory-Mapped I/O Base Address i (39-16)
         *         1 = base/limit registers i are read-only
         * [ 7: 4] Reserved
         * [31: 8] Memory-Mapped I/O Base Address i (39-16)

-        *         This field defines the upper address bits of a 40bit address 
+        *         This field defines the upper address bits of a 40bit address

         *         that defines the start of memory-mapped I/O region i
         */
 
         *         that defines the start of memory-mapped I/O region i
         */
 


@@ -143,8 +143,8 @@ static void setup_ibm_e326_resource_map(void)
        //PCI_ADDR(0, 0x18, 1, 0xbc), 0x48, 0x0,
        // PCI_ADDR(0, 0x18, 1, 0xb8), 0xf0, 0x0,
 
        //PCI_ADDR(0, 0x18, 1, 0xbc), 0x48, 0x0,
        // PCI_ADDR(0, 0x18, 1, 0xb8), 0xf0, 0x0,
 

-       PCI_ADDR(0, 0x18, 1, 0xb4), 0x48, 0xfec010, 
-       PCI_ADDR(0, 0x18, 1, 0xb0), 0xf0, 0xfec003, 
+       PCI_ADDR(0, 0x18, 1, 0xb4), 0x48, 0xfec010,
+       PCI_ADDR(0, 0x18, 1, 0xb0), 0xf0, 0xfec003,

        //PCI_ADDR(0, 0x18, 1, 0xb4), 0x48, 0x0,
        //PCI_ADDR(0, 0x18, 1, 0xb0), 0xf0, 0x0,
 
        //PCI_ADDR(0, 0x18, 1, 0xb4), 0x48, 0x0,
        //PCI_ADDR(0, 0x18, 1, 0xb0), 0xf0, 0x0,
 


@@ -153,19 +153,19 @@ static void setup_ibm_e326_resource_map(void)
        //PCI_ADDR(0, 0x18, 1, 0xac), 0x48, 0x0,
        //PCI_ADDR(0, 0x18, 1, 0xa8), 0xf0, 0x0,
 
        //PCI_ADDR(0, 0x18, 1, 0xac), 0x48, 0x0,
        //PCI_ADDR(0, 0x18, 1, 0xa8), 0xf0, 0x0,
 

-       PCI_ADDR(0, 0x18, 1, 0xa4), 0x48, 0xfed010, 
+       PCI_ADDR(0, 0x18, 1, 0xa4), 0x48, 0xfed010,

        PCI_ADDR(0, 0x18, 1, 0xa0), 0xf0, 0xfed003,
        //PCI_ADDR(0, 0x18, 1, 0xa4), 0x48, 0x0,
        //PCI_ADDR(0, 0x18, 1, 0xa0), 0xf0, 0x0,
 
        PCI_ADDR(0, 0x18, 1, 0xa0), 0xf0, 0xfed003,
        //PCI_ADDR(0, 0x18, 1, 0xa4), 0x48, 0x0,
        //PCI_ADDR(0, 0x18, 1, 0xa0), 0xf0, 0x0,
 

-       PCI_ADDR(0, 0x18, 1, 0x9c), 0x48, 0x0, 
-       PCI_ADDR(0, 0x18, 1, 0x98), 0xf0, 0x0, 
-       PCI_ADDR(0, 0x18, 1, 0x94), 0x48, 0x0, 
-       PCI_ADDR(0, 0x18, 1, 0x90), 0xf0, 0x0, 
-       PCI_ADDR(0, 0x18, 1, 0x8c), 0x48, 0x0, 
-       PCI_ADDR(0, 0x18, 1, 0x88), 0xf0, 0x0, 
-       PCI_ADDR(0, 0x18, 1, 0x84), 0x48, 0x0, 
-       PCI_ADDR(0, 0x18, 1, 0x80), 0xf0, 0x0, 
+       PCI_ADDR(0, 0x18, 1, 0x9c), 0x48, 0x0,
+       PCI_ADDR(0, 0x18, 1, 0x98), 0xf0, 0x0,
+       PCI_ADDR(0, 0x18, 1, 0x94), 0x48, 0x0,
+       PCI_ADDR(0, 0x18, 1, 0x90), 0xf0, 0x0,
+       PCI_ADDR(0, 0x18, 1, 0x8c), 0x48, 0x0,
+       PCI_ADDR(0, 0x18, 1, 0x88), 0xf0, 0x0,
+       PCI_ADDR(0, 0x18, 1, 0x84), 0x48, 0x0,
+       PCI_ADDR(0, 0x18, 1, 0x80), 0xf0, 0x0,

        /* PCI I/O Limit i Registers
         * F1:0xC4 i = 0
         * F1:0xCC i = 1
        /* PCI I/O Limit i Registers
         * F1:0xC4 i = 0
         * F1:0xCC i = 1


@@ -205,7 +205,7 @@ static void setup_ibm_e326_resource_map(void)
         * [ 3: 2] Reserved
         * [ 4: 4] VGA Enable
         *         0 = VGA matches Disabled
         * [ 3: 2] Reserved
         * [ 4: 4] VGA Enable
         *         0 = VGA matches Disabled

-        *         1 = matches all address < 64K and where A[9:0] is in the 
+        *         1 = matches all address < 64K and where A[9:0] is in the

         *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
         * [ 5: 5] ISA Enable
         *         0 = ISA matches Disabled
         *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
         * [ 5: 5] ISA Enable
         *         0 = ISA matches Disabled


@@ -213,17 +213,17 @@ static void setup_ibm_e326_resource_map(void)
         *             from matching agains this base/limit pair
         * [11: 6] Reserved
         * [24:12] PCI I/O Base i
         *             from matching agains this base/limit pair
         * [11: 6] Reserved
         * [24:12] PCI I/O Base i

-        *         This field defines the start of PCI I/O region n 
+        *         This field defines the start of PCI I/O region n

         * [31:25] Reserved
         */
         * [31:25] Reserved
         */

-       PCI_ADDR(0, 0x18, 1, 0xdc), 0xFE000FC8, 0x1fff010, 
-       PCI_ADDR(0, 0x18, 1, 0xd8), 0xFE000FCC, 0x33, 
-       PCI_ADDR(0, 0x18, 1, 0xd4), 0xFE000FC8, 0x0, 
-       PCI_ADDR(0, 0x18, 1, 0xd0), 0xFE000FCC, 0x0, 
-       PCI_ADDR(0, 0x18, 1, 0xcc), 0xFE000FC8, 0x0, 
-       PCI_ADDR(0, 0x18, 1, 0xc8), 0xFE000FCC, 0x0, 
-       PCI_ADDR(0, 0x18, 1, 0xc4), 0xFE000FC8, 0x0, 
-       PCI_ADDR(0, 0x18, 1, 0xc0), 0xFE000FCC, 0x0, 
+       PCI_ADDR(0, 0x18, 1, 0xdc), 0xFE000FC8, 0x1fff010,
+       PCI_ADDR(0, 0x18, 1, 0xd8), 0xFE000FCC, 0x33,
+       PCI_ADDR(0, 0x18, 1, 0xd4), 0xFE000FC8, 0x0,
+       PCI_ADDR(0, 0x18, 1, 0xd0), 0xFE000FCC, 0x0,
+       PCI_ADDR(0, 0x18, 1, 0xcc), 0xFE000FC8, 0x0,
+       PCI_ADDR(0, 0x18, 1, 0xc8), 0xFE000FCC, 0x0,
+       PCI_ADDR(0, 0x18, 1, 0xc4), 0xFE000FC8, 0x0,
+       PCI_ADDR(0, 0x18, 1, 0xc0), 0xFE000FCC, 0x0,

        /* Config Base and Limit i Registers
         * F1:0xE0 i = 0
         * F1:0xE4 i = 1
        /* Config Base and Limit i Registers
         * F1:0xE0 i = 0
         * F1:0xE4 i = 1


@@ -260,10 +260,10 @@ static void setup_ibm_e326_resource_map(void)
         * [31:24] Bus Number Limit i
         *         This field defines the highest bus number in configuration regin i
         */
         * [31:24] Bus Number Limit i
         *         This field defines the highest bus number in configuration regin i
         */

-       PCI_ADDR(0, 0x18, 1, 0xe0), 0x0000FC88, 0xff040103, 
-       PCI_ADDR(0, 0x18, 1, 0xe4), 0x0000FC88, 0, 
-       PCI_ADDR(0, 0x18, 1, 0xe8), 0x0000FC88, 0, 
-       PCI_ADDR(0, 0x18, 1, 0xec), 0x0000FC88, 0, 
+       PCI_ADDR(0, 0x18, 1, 0xe0), 0x0000FC88, 0xff040103,
+       PCI_ADDR(0, 0x18, 1, 0xe4), 0x0000FC88, 0,
+       PCI_ADDR(0, 0x18, 1, 0xe8), 0x0000FC88, 0,
+       PCI_ADDR(0, 0x18, 1, 0xec), 0x0000FC88, 0,

         };
         int max;
         max = ARRAY_SIZE(register_values);
         };
         int max;
         max = ARRAY_SIZE(register_values);

diff --git a/src/mainboard/ibm/e326/romstage.c b/src/mainboard/ibm/e326/romstage.c
index 527db2fa3e4678264d84f062493fa8c9abbfa80c..0b38ec78fa25c1547cbb7e97dd4b58fa97180141 100644 (file)
--- a/src/mainboard/ibm/e326/romstage.c
+++ b/src/mainboard/ibm/e326/romstage.c
@@ -1,4 +1,4 @@
- 
+

 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>


@@ -142,7 +142,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         setup_ibm_e326_resource_map();
 
        needs_reset = setup_coherent_ht_domain();
         setup_ibm_e326_resource_map();
 
        needs_reset = setup_coherent_ht_domain();

-       
+

 #if CONFIG_LOGICAL_CPUS==1
         // It is said that we should start core1 after all core0 launched
         start_other_cores();
 #if CONFIG_LOGICAL_CPUS==1
         // It is said that we should start core1 after all core0 launched
         start_other_cores();

diff --git a/src/mainboard/iei/nova4899r/irq_tables.c b/src/mainboard/iei/nova4899r/irq_tables.c
index 5886c20077ad5256233463ef388ea33c1cc32914..7893e1032f10ae0a62f8f841adc70bf7f05b81c5 100644 (file)
--- a/src/mainboard/iei/nova4899r/irq_tables.c
+++ b/src/mainboard/iei/nova4899r/irq_tables.c
@@ -118,7 +118,7 @@ const struct irq_routing_table intel_irq_routing_table = {
                        .slot = 0x2,
                },
  */
                        .slot = 0x2,
                },
  */

- 
+

 /*
  * Definition for "slot#2". There is no real slot,
  * the network device is soldered...
 /*
  * Definition for "slot#2". There is no real slot,
  * the network device is soldered...

diff --git a/src/mainboard/iei/pcisa-lx-800-r10/Kconfig b/src/mainboard/iei/pcisa-lx-800-r10/Kconfig
index 5180b84cf1a97ba5e6033a10f72e8c00b47c3e26..2678c149b1ce5d8d0b65caeb59f842c53586e489 100644 (file)
--- a/src/mainboard/iei/pcisa-lx-800-r10/Kconfig
+++ b/src/mainboard/iei/pcisa-lx-800-r10/Kconfig
@@ -13,7 +13,7 @@ config BOARD_IEI_PCISA_LX_800_R10
 
 config MAINBOARD_DIR
        string
 
 config MAINBOARD_DIR
        string

-       default iei/pcisa-lx-800-r10 
+       default iei/pcisa-lx-800-r10

        depends on BOARD_IEI_PCISA_LX_800_R10
 
 config MAINBOARD_PART_NUMBER
        depends on BOARD_IEI_PCISA_LX_800_R10
 
 config MAINBOARD_PART_NUMBER

diff --git a/src/mainboard/intel/d945gclf/acpi/i945_pci_irqs.asl b/src/mainboard/intel/d945gclf/acpi/i945_pci_irqs.asl
index 93e4b87fee4a7006ed23449445760e4e9acc49a1..de2ec481fb074d85c045b439e938e19acf9838f2 100644 (file)
--- a/src/mainboard/intel/d945gclf/acpi/i945_pci_irqs.asl
+++ b/src/mainboard/intel/d945gclf/acpi/i945_pci_irqs.asl
@@ -17,7 +17,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 

-/* This is board specific information: IRQ routing for the 
+/* This is board specific information: IRQ routing for the

  * i945
  */
 
  * i945
  */
 

diff --git a/src/mainboard/intel/d945gclf/acpi/ich7_pci_irqs.asl b/src/mainboard/intel/d945gclf/acpi/ich7_pci_irqs.asl
index b3b60d6ece29363a0ca53aafe7f6a30c297a968e..931fbfdeb434e4d4b0d9086322f0f436ff16c150 100644 (file)
--- a/src/mainboard/intel/d945gclf/acpi/ich7_pci_irqs.asl
+++ b/src/mainboard/intel/d945gclf/acpi/ich7_pci_irqs.asl
@@ -17,7 +17,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 

-/* This is board specific information: IRQ routing for the 
+/* This is board specific information: IRQ routing for the

  * 0:1e.0 PCI bridge of the ICH7
  */
 
  * 0:1e.0 PCI bridge of the ICH7
  */
 

diff --git a/src/mainboard/intel/d945gclf/acpi/mainboard.asl b/src/mainboard/intel/d945gclf/acpi/mainboard.asl
index 3d1ad0ea2999263f9a9c728dda2da7279f3c6d5c..d321771c0a019df5188c1f3c14632213d9f0a3d8 100644 (file)
--- a/src/mainboard/intel/d945gclf/acpi/mainboard.asl
+++ b/src/mainboard/intel/d945gclf/acpi/mainboard.asl
@@ -28,7 +28,7 @@ Device (SLPB)
 Device (PWRB)
 {
        Name(_HID, EisaId("PNP0C0C"))
 Device (PWRB)
 {
        Name(_HID, EisaId("PNP0C0C"))

-       
+

        // Wake
        Name(_PRW, Package(){0x1d, 0x04})
 }
        // Wake
        Name(_PRW, Package(){0x1d, 0x04})
 }

diff --git a/src/mainboard/intel/d945gclf/acpi/platform.asl b/src/mainboard/intel/d945gclf/acpi/platform.asl
index 7c5b9da429f71d19bb26e3228d86b2a8d24aeae4..0a7930a3cc75cc640f24ade27ff0818d243264b6 100644 (file)
--- a/src/mainboard/intel/d945gclf/acpi/platform.asl
+++ b/src/mainboard/intel/d945gclf/acpi/platform.asl
@@ -42,9 +42,9 @@ Method(TRAP, 1, Serialized)
        Return (SMIF)           // Return value of SMI handler
 }
 
        Return (SMIF)           // Return value of SMI handler
 }
 

-/* The _PIC method is called by the OS to choose between interrupt 
+/* The _PIC method is called by the OS to choose between interrupt

  * routing via the i8259 interrupt controller or the APIC.
  * routing via the i8259 interrupt controller or the APIC.

- * 
+ *

  * _PIC is called with a parameter of 0 for i8259 configuration and
  * with a parameter of 1 for Local Apic/IOAPIC configuration.
  */
  * _PIC is called with a parameter of 0 for i8259 configuration and
  * with a parameter of 1 for Local Apic/IOAPIC configuration.
  */


@@ -74,12 +74,12 @@ Method(_WAK,1)
        // Notify PCI Express slots in case a card
        // was inserted while a sleep state was active.
 
        // Notify PCI Express slots in case a card
        // was inserted while a sleep state was active.
 

-       // Are we going to S3? 
+       // Are we going to S3?

        If (LEqual(Arg0, 3)) {
                // ..
        }
 
        If (LEqual(Arg0, 3)) {
                // ..
        }
 

-       // Are we going to S4? 
+       // Are we going to S4?

        If (LEqual(Arg0, 4)) {
                // ..
        }
        If (LEqual(Arg0, 4)) {
                // ..
        }

diff --git a/src/mainboard/intel/d945gclf/acpi/thermal.asl b/src/mainboard/intel/d945gclf/acpi/thermal.asl
index fb9d94095506035bb5b30e194ad59c2b18ac2127..fc79a35f6166fe553996ec21f0211687c8049933 100644 (file)
--- a/src/mainboard/intel/d945gclf/acpi/thermal.asl
+++ b/src/mainboard/intel/d945gclf/acpi/thermal.asl
@@ -25,7 +25,7 @@ Scope (\_TZ)
        {
 
                // FIXME these could/should be read from the
        {
 
                // FIXME these could/should be read from the

-               // GNVS area, so they can be controlled by 
+               // GNVS area, so they can be controlled by

                // coreboot
                Name(TC1V, 0x04)
                Name(TC2V, 0x03)
                // coreboot
                Name(TC1V, 0x04)
                Name(TC2V, 0x03)

diff --git a/src/mainboard/intel/d945gclf/acpi_tables.c b/src/mainboard/intel/d945gclf/acpi_tables.c
index b7f92114c547760b9adf16ede7daf191b3d2ab67..afa695502f07fca993fcb3af4adae080cbd4f5c5 100644 (file)
--- a/src/mainboard/intel/d945gclf/acpi_tables.c
+++ b/src/mainboard/intel/d945gclf/acpi_tables.c
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
 /*
  * This file is part of the coreboot project.

- * 
+ *

  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or
  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or

diff --git a/src/mainboard/intel/d945gclf/chip.h b/src/mainboard/intel/d945gclf/chip.h
index 90e8c27999fc1ee42a43d84db23c9672eef4e3b2..4e1432de6941d1d51cde62ff1d4d6a3dfbc78cd9 100644 (file)
--- a/src/mainboard/intel/d945gclf/chip.h
+++ b/src/mainboard/intel/d945gclf/chip.h
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
 /*
  * This file is part of the coreboot project.

- * 
+ *

  * Copyright (C) 2007-2008 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or
  * Copyright (C) 2007-2008 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or

diff --git a/src/mainboard/intel/d945gclf/cmos.layout b/src/mainboard/intel/d945gclf/cmos.layout
index e99c43d79b9a91f47b6cece4efe87408808128e4..9997584a541e804ab58ea100a0a9f64d78117c9c 100644 (file)
--- a/src/mainboard/intel/d945gclf/cmos.layout
+++ b/src/mainboard/intel/d945gclf/cmos.layout
@@ -1,6 +1,6 @@
 #
 # This file is part of the coreboot project.
 #
 # This file is part of the coreboot project.

-# 
+#

 # Copyright (C) 2007-2008 coresystems GmbH
 #
 # This program is free software; you can redistribute it and/or
 # Copyright (C) 2007-2008 coresystems GmbH
 #
 # This program is free software; you can redistribute it and/or

diff --git a/src/mainboard/intel/d945gclf/devicetree.cb b/src/mainboard/intel/d945gclf/devicetree.cb
index af5f22b30239a829e1e1cdcc9b83e4e1bd6e0099..01a0bc67a5ea9a0ab3afe73587400cdc7ba510be 100644 (file)
--- a/src/mainboard/intel/d945gclf/devicetree.cb
+++ b/src/mainboard/intel/d945gclf/devicetree.cb
@@ -1,6 +1,6 @@
 ##
 ## This file is part of the coreboot project.
 ##
 ## This file is part of the coreboot project.

-## 
+##

 ## Copyright (C) 2007-2008 coresystems GmbH
 ##
 ## This program is free software; you can redistribute it and/or
 ## Copyright (C) 2007-2008 coresystems GmbH
 ##
 ## This program is free software; you can redistribute it and/or


@@ -25,7 +25,7 @@ chip northbridge/intel/i945
                 end
         end
 
                 end
         end
 

-        device pci_domain 0 on 
+        device pci_domain 0 on

                 device pci 00.0 on end # host bridge
                device pci 01.0 off end # i945 PCIe root port
                device pci 02.0 on end # vga controller
                 device pci 00.0 on end # host bridge
                device pci 01.0 off end # i945 PCIe root port
                device pci 02.0 on end # vga controller


@@ -66,7 +66,7 @@ chip northbridge/intel/i945
                        device pci 1d.3 on end # USB UHCI
                        device pci 1d.7 on end # USB2 EHCI
                        device pci 1e.0 on end # PCI bridge
                        device pci 1d.3 on end # USB UHCI
                        device pci 1d.7 on end # USB2 EHCI
                        device pci 1e.0 on end # PCI bridge

-                       #device pci 1e.2 off end # AC'97 Audio 
+                       #device pci 1e.2 off end # AC'97 Audio

                        #device pci 1e.3 off end # AC'97 Modem
                         device pci 1f.0 on # LPC bridge
                                 chip superio/smsc/lpc47m15x
                        #device pci 1e.3 off end # AC'97 Modem
                         device pci 1f.0 on # LPC bridge
                                 chip superio/smsc/lpc47m15x

diff --git a/src/mainboard/intel/d945gclf/dsdt.asl b/src/mainboard/intel/d945gclf/dsdt.asl
index 1b025994f0527cf5d62c23a93740be07e7cefe37..bf57e74b21d8bd47e3a337bc64c371f981ef05cb 100644 (file)
--- a/src/mainboard/intel/d945gclf/dsdt.asl
+++ b/src/mainboard/intel/d945gclf/dsdt.asl
@@ -34,7 +34,7 @@ DefinitionBlock(
 
        // General Purpose Events
        //#include "acpi/gpe.asl"
 
        // General Purpose Events
        //#include "acpi/gpe.asl"

-       
+

        // mainboard specific devices
        #include "acpi/mainboard.asl"
 
        // mainboard specific devices
        #include "acpi/mainboard.asl"
 

diff --git a/src/mainboard/intel/d945gclf/mainboard_smi.c b/src/mainboard/intel/d945gclf/mainboard_smi.c
index fc4c5081941e7a159cfcf522419f11509984c170..c07a24c3996a742fb0ce384fdd12b0f171af7771 100644 (file)
--- a/src/mainboard/intel/d945gclf/mainboard_smi.c
+++ b/src/mainboard/intel/d945gclf/mainboard_smi.c
@@ -23,7 +23,7 @@
 #include <cpu/x86/smm.h>
 #include "../../../southbridge/intel/i82801gx/i82801gx_nvs.h"
 
 #include <cpu/x86/smm.h>
 #include "../../../southbridge/intel/i82801gx/i82801gx_nvs.h"
 

-/* The southbridge SMI handler checks whether gnvs has a 
+/* The southbridge SMI handler checks whether gnvs has a

  * valid pointer before calling the trap handler
  */
 extern global_nvs_t *gnvs;
  * valid pointer before calling the trap handler
  */
 extern global_nvs_t *gnvs;

diff --git a/src/mainboard/intel/d945gclf/mptable.c b/src/mainboard/intel/d945gclf/mptable.c
index 5d57f3d7436001f8d13c384495e8d71546d19659..62850ebf1cd3706a919d32fc0983c2772b921325 100644 (file)
--- a/src/mainboard/intel/d945gclf/mptable.c
+++ b/src/mainboard/intel/d945gclf/mptable.c
@@ -69,7 +69,7 @@ static void *smp_write_config_table(void *v)
 
        /* Legacy Interrupts */
 
 
        /* Legacy Interrupts */
 

-       /* I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN# */ 
+       /* I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN# */

        smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, 0x2, 0x0);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x1, 0x2, 0x1);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, 0x2, 0x2);
        smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, 0x2, 0x0);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x1, 0x2, 0x1);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, 0x2, 0x2);

diff --git a/src/mainboard/intel/d945gclf/romstage.c b/src/mainboard/intel/d945gclf/romstage.c
index e3e5814d3ec9435e44f59147081ff8569aee85d1..45e9fb1341a1d52354923b57d1c387cc0ad333db 100644 (file)
--- a/src/mainboard/intel/d945gclf/romstage.c
+++ b/src/mainboard/intel/d945gclf/romstage.c
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
 /*
  * This file is part of the coreboot project.

- * 
+ *

  * Copyright (C) 2007-2008 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or
  * Copyright (C) 2007-2008 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or


@@ -105,7 +105,7 @@ static void ich7_enable_lpc(void)
 static void early_superio_config_lpc47m15x(void)
 {
        device_t dev;
 static void early_superio_config_lpc47m15x(void)
 {
        device_t dev;

-       
+

        dev=PNP_DEV(0x2e, LPC47M15X_SP1);
        pnp_enter_conf_state(dev);
 
        dev=PNP_DEV(0x2e, LPC47M15X_SP1);
        pnp_enter_conf_state(dev);
 


@@ -276,7 +276,7 @@ void main(unsigned long bist)
 
        /* Enable SPD ROMs and DDR-II DRAM */
        enable_smbus();
 
        /* Enable SPD ROMs and DDR-II DRAM */
        enable_smbus();

-       
+

 #if CONFIG_DEFAULT_CONSOLE_LOGLEVEL > 8
        dump_spd_registers();
 #endif
 #if CONFIG_DEFAULT_CONSOLE_LOGLEVEL > 8
        dump_spd_registers();
 #endif


@@ -286,8 +286,8 @@ void main(unsigned long bist)
        /* Perform some initialization that must run before stage2 */
        early_ich7_init();
 
        /* Perform some initialization that must run before stage2 */
        early_ich7_init();
 

-       /* This should probably go away. Until now it is required 
-        * and mainboard specific 
+       /* This should probably go away. Until now it is required
+        * and mainboard specific

         */
        rcba_config();
 
         */
        rcba_config();
 


@@ -331,7 +331,7 @@ void main(unsigned long bist)
                 * memory completely, but that's a wonderful clean up task for another
                 * day.
                 */
                 * memory completely, but that's a wonderful clean up task for another
                 * day.
                 */

-               if (resume_backup_memory) 
+               if (resume_backup_memory)

                        memcpy(resume_backup_memory, (void *)CONFIG_RAMBASE, HIGH_MEMORY_SAVE);
 
                /* Magic for S3 resume */
                        memcpy(resume_backup_memory, (void *)CONFIG_RAMBASE, HIGH_MEMORY_SAVE);
 
                /* Magic for S3 resume */

diff --git a/src/mainboard/intel/d945gclf/rtl8168.c b/src/mainboard/intel/d945gclf/rtl8168.c
index e278bcfb4eaf76d0c5f65bea2a3050774b79e603..04fd56ccb18f0e71f84969e5b5531e9396c9107d 100644 (file)
--- a/src/mainboard/intel/d945gclf/rtl8168.c
+++ b/src/mainboard/intel/d945gclf/rtl8168.c
@@ -28,7 +28,7 @@
 static void nic_init(struct device *dev)
 {
        printk(BIOS_DEBUG, "Initializing RTL8168 Gigabit Ethernet\n");
 static void nic_init(struct device *dev)
 {
        printk(BIOS_DEBUG, "Initializing RTL8168 Gigabit Ethernet\n");

-       // Nothing to do yet, but this has to be here to keep 
+       // Nothing to do yet, but this has to be here to keep

        // coreboot from trying to execute an option ROM.
 }
 
        // coreboot from trying to execute an option ROM.
 }
 

diff --git a/src/mainboard/intel/eagleheights/Kconfig b/src/mainboard/intel/eagleheights/Kconfig
index 991fddf0e2e3c9f0a954e768a110944390a598aa..d04e79eafea4dc574e3778fb9de575f76be7db12 100644 (file)
--- a/src/mainboard/intel/eagleheights/Kconfig
+++ b/src/mainboard/intel/eagleheights/Kconfig
@@ -57,7 +57,7 @@ config MAX_CPUS
        int
        default 4
        depends on BOARD_INTEL_EAGLEHEIGHTS
        int
        default 4
        depends on BOARD_INTEL_EAGLEHEIGHTS

-       
+

 config MAX_PHYSICAL_CPUS
        int
        default 2
 config MAX_PHYSICAL_CPUS
        int
        default 2

diff --git a/src/mainboard/intel/jarrell/debug.c b/src/mainboard/intel/jarrell/debug.c
index b4f2a185b37b405a0844f45927275e50550db5a3..87c67b5964cbea35f6a083a7c2c895c533f3cfe0 100644 (file)
--- a/src/mainboard/intel/jarrell/debug.c
+++ b/src/mainboard/intel/jarrell/debug.c
@@ -5,7 +5,7 @@
 static void print_reg(unsigned char index)
 {
         unsigned char data;
 static void print_reg(unsigned char index)
 {
         unsigned char data;

-                                                                                
+

         outb(index, 0x2e);
         data = inb(0x2f);
        print_debug("0x");
         outb(index, 0x2e);
         data = inb(0x2f);
        print_debug("0x");


@@ -15,7 +15,7 @@ static void print_reg(unsigned char index)
        print_debug("\n");
         return;
 }
        print_debug("\n");
         return;
 }

-        
+

 static void xbus_en(void)
 {
         /* select the XBUS function in the SIO */
 static void xbus_en(void)
 {
         /* select the XBUS function in the SIO */


@@ -25,7 +25,7 @@ static void xbus_en(void)
         outb(0x01, 0x2f);
        return;
 }
         outb(0x01, 0x2f);
        return;
 }

-                                                                        
+

 static void setup_func(unsigned char func)
 {
         /* select the function in the SIO */
 static void setup_func(unsigned char func)
 {
         /* select the function in the SIO */


@@ -43,27 +43,27 @@ static void setup_func(unsigned char func)
         print_reg(0x75);
         return;
 }
         print_reg(0x75);
         return;
 }

-                                                                                
+

 static void siodump(void)
 {
         int i;
         unsigned char data;
 static void siodump(void)
 {
         int i;
         unsigned char data;

-       
+

         print_debug("\n*** SERVER I/O REGISTERS ***\n");
         for (i=0x10; i<=0x2d; i++) {
                 print_reg((unsigned char)i);
         }
         print_debug("\n*** SERVER I/O REGISTERS ***\n");
         for (i=0x10; i<=0x2d; i++) {
                 print_reg((unsigned char)i);
         }

-#if 0                                                                         
+#if 0

         print_debug("\n*** XBUS REGISTERS ***\n");
         setup_func(0x0f);
         for (i=0xf0; i<=0xff; i++) {
                 print_reg((unsigned char)i);
         }
         print_debug("\n*** XBUS REGISTERS ***\n");
         setup_func(0x0f);
         for (i=0xf0; i<=0xff; i++) {
                 print_reg((unsigned char)i);
         }

-                                                                                
+

         print_debug("\n***  SERIAL 1 CONFIG REGISTERS ***\n");
         setup_func(0x03);
         print_reg(0xf0);
         print_debug("\n***  SERIAL 1 CONFIG REGISTERS ***\n");
         setup_func(0x03);
         print_reg(0xf0);

-                                                                                
+

         print_debug("\n***  SERIAL 2 CONFIG REGISTERS ***\n");
         setup_func(0x02);
         print_reg(0xf0);
         print_debug("\n***  SERIAL 2 CONFIG REGISTERS ***\n");
         setup_func(0x02);
         print_reg(0xf0);


@@ -82,13 +82,13 @@ static void siodump(void)
        print_debug("\nGPDI 4: 0x");
        print_debug_hex8(data);
        print_debug("\n");
        print_debug("\nGPDI 4: 0x");
        print_debug_hex8(data);
        print_debug("\n");

-       
-#if 0                                                                                
-                                                                                
+
+#if 0
+

         print_debug("\n***  WATCHDOG TIMER REGISTERS ***\n");
         setup_func(0x0a);
         print_reg(0xf0);
         print_debug("\n***  WATCHDOG TIMER REGISTERS ***\n");
         setup_func(0x0a);
         print_reg(0xf0);

-                                                                                
+

         print_debug("\n***  FAN CONTROL REGISTERS ***\n");
         setup_func(0x09);
         print_reg(0xf0);
         print_debug("\n***  FAN CONTROL REGISTERS ***\n");
         setup_func(0x09);
         print_reg(0xf0);


@@ -103,11 +103,11 @@ static void siodump(void)
         print_reg(0xf7);
         print_reg(0xfe);
         print_reg(0xff);
         print_reg(0xf7);
         print_reg(0xfe);
         print_reg(0xff);

-                                                                                
+

         print_debug("\n***  HEALTH MONITORING & CONTROL REGISTERS ***\n");
         setup_func(0x14);
         print_reg(0xf0);
         print_debug("\n***  HEALTH MONITORING & CONTROL REGISTERS ***\n");
         setup_func(0x14);
         print_reg(0xf0);

-#endif                                                                           
+#endif

         return;
 }
 
         return;
 }
 


@@ -124,8 +124,8 @@ static void print_debug_pci_dev(unsigned dev)
 static void print_pci_devices(void)
 {
        device_t dev;
 static void print_pci_devices(void)
 {
        device_t dev;

-       for(dev = PCI_DEV(0, 0, 0); 
-               dev <= PCI_DEV(0, 0x1f, 0x7); 
+       for(dev = PCI_DEV(0, 0, 0);
+               dev <= PCI_DEV(0, 0x1f, 0x7);

                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);
                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);


@@ -144,7 +144,7 @@ static void dump_pci_device(unsigned dev)
        int i;
        print_debug_pci_dev(dev);
        print_debug("\n");
        int i;
        print_debug_pci_dev(dev);
        print_debug("\n");

-       
+

        for(i = 0; i <= 255; i++) {
                unsigned char val;
                if ((i & 0x0f) == 0) {
        for(i = 0; i <= 255; i++) {
                unsigned char val;
                if ((i & 0x0f) == 0) {


@@ -164,19 +164,19 @@ static void dump_bar14(unsigned dev)
 {
        int i;
        unsigned long bar;
 {
        int i;
        unsigned long bar;

-       
+

        print_debug("BAR 14 Dump\n");
        print_debug("BAR 14 Dump\n");

-       
+

        bar = pci_read_config32(dev, 0x14);
        for(i = 0; i <= 0x300; i+=4) {
        bar = pci_read_config32(dev, 0x14);
        for(i = 0; i <= 0x300; i+=4) {

-#if 0          
+#if 0

                unsigned char val;
                if ((i & 0x0f) == 0) {
                        print_debug_hex8(i);
                        print_debug_char(':');
                }
                val = pci_read_config8(dev, i);
                unsigned char val;
                if ((i & 0x0f) == 0) {
                        print_debug_hex8(i);
                        print_debug_char(':');
                }
                val = pci_read_config8(dev, i);

-#endif         
+#endif

                if((i%4)==0) {
                print_debug("\n");
                print_debug_hex16(i);
                if((i%4)==0) {
                print_debug("\n");
                print_debug_hex16(i);


@@ -191,8 +191,8 @@ static void dump_bar14(unsigned dev)
 static void dump_pci_devices(void)
 {
        device_t dev;
 static void dump_pci_devices(void)
 {
        device_t dev;

-       for(dev = PCI_DEV(0, 0, 0); 
-               dev <= PCI_DEV(0, 0x1f, 0x7); 
+       for(dev = PCI_DEV(0, 0, 0);
+               dev <= PCI_DEV(0, 0x1f, 0x7);

                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);
                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);


@@ -215,8 +215,8 @@ static void dump_spd_registers(const struct mem_controller *ctrl)
                device = ctrl->channel0[i];
                if (device) {
                        int j;
                device = ctrl->channel0[i];
                if (device) {
                        int j;

-                       print_debug("dimm: "); 
-                       print_debug_hex8(i); 
+                       print_debug("dimm: ");
+                       print_debug_hex8(i);

                        print_debug(".0: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {
                        print_debug(".0: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {


@@ -241,8 +241,8 @@ static void dump_spd_registers(const struct mem_controller *ctrl)
                device = ctrl->channel1[i];
                if (device) {
                        int j;
                device = ctrl->channel1[i];
                if (device) {
                        int j;

-                       print_debug("dimm: "); 
-                       print_debug_hex8(i); 
+                       print_debug("dimm: ");
+                       print_debug_hex8(i);

                        print_debug(".1: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {
                        print_debug(".1: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {


@@ -278,7 +278,7 @@ void dump_spd_registers(void)
                print_debug("\n");
                 print_debug("dimm ");
                print_debug_hex8(device);
                print_debug("\n");
                 print_debug("dimm ");
                print_debug_hex8(device);

-               
+

                 for(i = 0; (i < 256) ; i++) {
                        unsigned char byte;
                         if ((i % 16) == 0) {
                 for(i = 0; (i < 256) ; i++) {
                        unsigned char byte;
                         if ((i % 16) == 0) {


@@ -291,7 +291,7 @@ void dump_spd_registers(void)
                                 print_debug("bad device: ");
                                 print_debug_hex8(-status);
                                 print_debug("\n");
                                 print_debug("bad device: ");
                                 print_debug_hex8(-status);
                                 print_debug("\n");

-                                break; 
+                                break;

                        }
                        print_debug_hex8(status);
                        print_debug_char(' ');
                        }
                        print_debug_hex8(status);
                        print_debug_char(' ');


@@ -311,7 +311,7 @@ void dump_ipmi_registers(void)
                print_debug("\n");
                 print_debug("ipmi ");
                print_debug_hex8(device);
                print_debug("\n");
                 print_debug("ipmi ");
                print_debug_hex8(device);

-               
+

                 for(i = 0; (i < 8) ; i++) {
                        unsigned char byte;
                        status = smbus_read_byte(device, 2);
                 for(i = 0; (i < 8) ; i++) {
                        unsigned char byte;
                        status = smbus_read_byte(device, 2);


@@ -319,7 +319,7 @@ void dump_ipmi_registers(void)
                                 print_debug("bad device: ");
                                 print_debug_hex8(-status);
                                 print_debug("\n");
                                 print_debug("bad device: ");
                                 print_debug_hex8(-status);
                                 print_debug("\n");

-                                break; 
+                                break;

                        }
                        print_debug_hex8(status);
                        print_debug_char(' ');
                        }
                        print_debug_hex8(status);
                        print_debug_char(' ');


@@ -327,4 +327,4 @@ void dump_ipmi_registers(void)
                device += SMBUS_MEM_DEVICE_INC;
                print_debug("\n");
        }
                device += SMBUS_MEM_DEVICE_INC;
                print_debug("\n");
        }

-}      
+}

diff --git a/src/mainboard/intel/jarrell/devicetree.cb b/src/mainboard/intel/jarrell/devicetree.cb
index 32f70e3e857e09d2afceded0002cff9782ea3c88..3a40899b297b64af453cca33326032fa83592dcd 100644 (file)
--- a/src/mainboard/intel/jarrell/devicetree.cb
+++ b/src/mainboard/intel/jarrell/devicetree.cb
@@ -1,9 +1,9 @@
 chip northbridge/intel/e7520
 chip northbridge/intel/e7520

-       device pci_domain 0 on 
+       device pci_domain 0 on

                device pci 00.0 on end
                device pci 00.1 on end
                device pci 01.0 on end
                device pci 00.0 on end
                device pci 00.1 on end
                device pci 01.0 on end

-               device pci 02.0 on 
+               device pci 02.0 on

                        chip southbridge/intel/pxhd # pxhd1
                                device pci 00.0 on end
                                device pci 00.1 on end
                        chip southbridge/intel/pxhd # pxhd1
                                device pci 00.0 on end
                                device pci 00.1 on end


@@ -28,7 +28,7 @@ chip northbridge/intel/e7520
                                        device pci 0c.0 on end
                                end
                        end
                                        device pci 0c.0 on end
                                end
                        end

-                       device pci 1f.0 on 
+                       device pci 1f.0 on

                                chip superio/nsc/pc87427
                                        device pnp 2e.0 off end
                                        device pnp 2e.2 on
                                chip superio/nsc/pc87427
                                        device pnp 2e.0 off end
                                        device pnp 2e.2 on


@@ -60,7 +60,7 @@ chip northbridge/intel/e7520
                        end
                        device pci 1f.1 on end
                        device pci 1f.2 off end
                        end
                        device pci 1f.1 on end
                        device pci 1f.2 off end

-                       device pci 1f.3 on end 
+                       device pci 1f.3 on end

                        device pci 1f.5 off end
                        device pci 1f.6 off end
                        register "gpio[40]" = "ICH5R_GPIO_USE_AS_GPIO"
                        device pci 1f.5 off end
                        device pci 1f.6 off end
                        register "gpio[40]" = "ICH5R_GPIO_USE_AS_GPIO"

diff --git a/src/mainboard/intel/jarrell/jarrell_fixups.c b/src/mainboard/intel/jarrell/jarrell_fixups.c
index 7fb5a20dbb695fcb3e6c4672bddcd159d9c867eb..1261e61046fda97c07cdbdecc636206b953281e6 100644 (file)
--- a/src/mainboard/intel/jarrell/jarrell_fixups.c
+++ b/src/mainboard/intel/jarrell/jarrell_fixups.c
@@ -21,7 +21,7 @@ static void mch_reset(void)
                value = inl(base);
                value |= (1 <<19);
                outl(value, base);
                value = inl(base);
                value |= (1 <<19);
                outl(value, base);

-               
+

                 /* Pull GPIO 19 low */
                 value = inl(base + 0x0c);
                 value &= ~(1 << 19);
                 /* Pull GPIO 19 low */
                 value = inl(base + 0x0c);
                 value &= ~(1 << 19);


@@ -38,7 +38,7 @@ static void mainboard_set_e7520_pll(unsigned bits)
 
        /* currently only handle the Jarrell/PC87427 case */
        dev = PC87427_GPIO_DEV;
 
        /* currently only handle the Jarrell/PC87427 case */
        dev = PC87427_GPIO_DEV;

-               
+

 
        pnp_set_logical_device(dev);
        gpio_index = pnp_read_iobase(dev, 0x60);
 
        pnp_set_logical_device(dev);
        gpio_index = pnp_read_iobase(dev, 0x60);


@@ -66,7 +66,7 @@ static void mainboard_set_e7520_pll(unsigned bits)
                // mch_reset();
                full_reset();
        }
                // mch_reset();
                full_reset();
        }

-       return; 
+       return;

 }
 
 static void mainboard_set_e7520_leds(void)
 }
 
 static void mainboard_set_e7520_leds(void)


@@ -77,7 +77,7 @@ static void mainboard_set_e7520_leds(void)
 
        /* currently only handle the Jarrell/PC87427 case */
        dev = PC87427_GPIO_DEV;
 
        /* currently only handle the Jarrell/PC87427 case */
        dev = PC87427_GPIO_DEV;

-               
+

        pnp_set_logical_device(dev);
 
        /* enable */
        pnp_set_logical_device(dev);
 
        /* enable */


@@ -88,17 +88,17 @@ static void mainboard_set_e7520_leds(void)
 
        /* Set auto mode for dimm leds and post */
        outb(0xf0,0x2e);
 
        /* Set auto mode for dimm leds and post */
        outb(0xf0,0x2e);

-       outb(0x70,0x2f);        
+       outb(0x70,0x2f);

        outb(0xf4,0x2e);
        outb(0xf4,0x2e);

-       outb(0x30,0x2f);        
+       outb(0x30,0x2f);

        outb(0xf5,0x2e);
        outb(0xf5,0x2e);

-       outb(0x88,0x2f);        
+       outb(0x88,0x2f);

        outb(0xf6,0x2e);
        outb(0xf6,0x2e);

-       outb(0x00,0x2f);        
+       outb(0x00,0x2f);

        outb(0xf7,0x2e);
        outb(0xf7,0x2e);

-       outb(0x90,0x2f);        
+       outb(0x90,0x2f);

        outb(0xf8,0x2e);
        outb(0xf8,0x2e);

-       outb(0x00,0x2f);        
+       outb(0x00,0x2f);

 
        /* Turn the leds off */
        outb(0x00,0x88);
 
        /* Turn the leds off */
        outb(0x00,0x88);


@@ -106,12 +106,12 @@ static void mainboard_set_e7520_leds(void)
 
        /* Disable the ports */
        outb(0xf5,0x2e);
 
        /* Disable the ports */
        outb(0xf5,0x2e);

-       outb(0x00,0x2f);        
+       outb(0x00,0x2f);

        outb(0xf7,0x2e);
        outb(0xf7,0x2e);

-       outb(0x00,0x2f);        
+       outb(0x00,0x2f);

        outb(0xf4,0x2e);
        outb(0xf4,0x2e);

-       outb(0x00,0x2f);        
-       
-       return; 
+       outb(0x00,0x2f);
+
+       return;

 }
 
 }
 

diff --git a/src/mainboard/intel/jarrell/mptable.c b/src/mainboard/intel/jarrell/mptable.c
index 73aa57554082afd5d2b49f597a446e57f2d56fda..1386c16183364c44b0f48a1929a9a97f1fca0a50 100644 (file)
--- a/src/mainboard/intel/jarrell/mptable.c
+++ b/src/mainboard/intel/jarrell/mptable.c
@@ -38,7 +38,7 @@ static void *smp_write_config_table(void *v)
        mc->reserved = 0;
 
        smp_write_processors(mc);
        mc->reserved = 0;
 
        smp_write_processors(mc);

-       
+

        {
                device_t dev;
 
        {
                device_t dev;
 


@@ -102,7 +102,7 @@ static void *smp_write_config_table(void *v)
                        }
                }
        }
                        }
                }
        }

-       
+

        /* define bus and isa numbers */
        for(bus_num = 0; bus_num < bus_isa; bus_num++) {
                smp_write_bus(mc, bus_num, "PCI   ");
        /* define bus and isa numbers */
        for(bus_num = 0; bus_num < bus_isa; bus_num++) {
                smp_write_bus(mc, bus_num, "PCI   ");


@@ -165,7 +165,7 @@ static void *smp_write_config_table(void *v)
                        }
                }
        }
                        }
                }
        }

-       
+

        /* ISA backward compatibility interrupts  */
        smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
                bus_isa, 0x00, 0x08, 0x00);
        /* ISA backward compatibility interrupts  */
        smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
                bus_isa, 0x00, 0x08, 0x00);

diff --git a/src/mainboard/intel/jarrell/romstage.c b/src/mainboard/intel/jarrell/romstage.c
index d3f6c7a707eb30e95a1c51eeb9d7cbc44626f2ba..823519984e0d2654155e99d6c6702287d8e2b6be 100644 (file)
--- a/src/mainboard/intel/jarrell/romstage.c
+++ b/src/mainboard/intel/jarrell/romstage.c
@@ -51,8 +51,8 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 static void main(unsigned long bist)
 {
        /*
 static void main(unsigned long bist)
 {
        /*

-        * 
-        * 
+        *
+        *

         */
        static const struct mem_controller mch[] = {
                {
         */
        static const struct mem_controller mch[] = {
                {


@@ -117,7 +117,7 @@ static void main(unsigned long bist)
        disable_watchdogs();
        power_down_reset_check();
 //     dump_ipmi_registers();
        disable_watchdogs();
        power_down_reset_check();
 //     dump_ipmi_registers();

-       mainboard_set_e7520_leds();     
+       mainboard_set_e7520_leds();

        sdram_initialize(ARRAY_SIZE(mch), mch);
        ich5_watchdog_on();
 #if 0
        sdram_initialize(ARRAY_SIZE(mch), mch);
        ich5_watchdog_on();
 #if 0


@@ -128,7 +128,7 @@ static void main(unsigned long bist)
        dump_bar14(PCI_DEV(0, 0x00, 0));
 #endif
 
        dump_bar14(PCI_DEV(0, 0x00, 0));
 #endif
 

-#if 0 // temporarily disabled 
+#if 0 // temporarily disabled

        /* Check the first 1M */
 //     ram_check(0x00000000, 0x000100000);
 //     ram_check(0x00000000, 0x000a0000);
        /* Check the first 1M */
 //     ram_check(0x00000000, 0x000100000);
 //     ram_check(0x00000000, 0x000a0000);


@@ -138,9 +138,9 @@ static void main(unsigned long bist)
 #if 0
        ram_check(0x00000000, 0x02000000);
 #endif
 #if 0
        ram_check(0x00000000, 0x02000000);
 #endif

-       
+

 #endif
 #endif

-#if 0  
+#if 0

        while(1) {
                hlt();
        }
        while(1) {
                hlt();
        }

diff --git a/src/mainboard/intel/jarrell/watchdog.c b/src/mainboard/intel/jarrell/watchdog.c
index 90782d9fbfe1c443790e47eae485295fee0b97ce..f7c42caa78dc79421916d2f4ba6eef73d5398f10 100644 (file)
--- a/src/mainboard/intel/jarrell/watchdog.c
+++ b/src/mainboard/intel/jarrell/watchdog.c
@@ -29,17 +29,17 @@ static void disable_ich5_watchdog(void)
        value = pci_read_config16(dev, 0x04);
        value |= (1 << 10);
        pci_write_config16(dev, 0x04, value);
        value = pci_read_config16(dev, 0x04);
        value |= (1 << 10);
        pci_write_config16(dev, 0x04, value);

-       
+

        /* Set and enable acpibase */
        pci_write_config32(dev, 0x40, ICH5_WDBASE | 1);
        pci_write_config8(dev, 0x44, 0x10);
        base = ICH5_WDBASE + 0x60;
        /* Set and enable acpibase */
        pci_write_config32(dev, 0x40, ICH5_WDBASE | 1);
        pci_write_config8(dev, 0x44, 0x10);
        base = ICH5_WDBASE + 0x60;

-       
+

        /* Set bit 11 in TCO1_CNT */
        value = inw(base + 0x08);
        value |= 1 << 11;
        outw(value, base + 0x08);
        /* Set bit 11 in TCO1_CNT */
        value = inw(base + 0x08);
        value |= 1 << 11;
        outw(value, base + 0x08);

-       
+

        /* Clear TCO timeout status */
        outw(0x0008, base + 0x04);
        outw(0x0002, base + 0x06);
        /* Clear TCO timeout status */
        outw(0x0008, base + 0x04);
        outw(0x0002, base + 0x06);


@@ -83,7 +83,7 @@ static void disable_jarell_frb3(void)
        outl(value, base + 0x38);
        value &= ~(1 << 16);
        outl(value, base + 0x38);
        outl(value, base + 0x38);
        value &= ~(1 << 16);
        outl(value, base + 0x38);

-                                 
+

 }
 
 static void disable_watchdogs(void)
 }
 
 static void disable_watchdogs(void)


@@ -114,12 +114,12 @@ static void ich5_watchdog_on(void)
        value = pci_read_config16(dev, 0x04);
        value |= (1 << 10);
        pci_write_config16(dev, 0x04, value);
        value = pci_read_config16(dev, 0x04);
        value |= (1 << 10);
        pci_write_config16(dev, 0x04, value);

-       
+

        /* Set and enable acpibase */
        pci_write_config32(dev, 0x40, ICH5_WDBASE | 1);
        pci_write_config8(dev, 0x44, 0x10);
        base = ICH5_WDBASE + 0x60;
        /* Set and enable acpibase */
        pci_write_config32(dev, 0x40, ICH5_WDBASE | 1);
        pci_write_config8(dev, 0x44, 0x10);
        base = ICH5_WDBASE + 0x60;

-       
+

        /* Clear TCO timeout status */
        outw(0x0008, base + 0x04);
        outw(0x0002, base + 0x06);
        /* Clear TCO timeout status */
        outw(0x0008, base + 0x04);
        outw(0x0002, base + 0x06);


@@ -132,7 +132,7 @@ static void ich5_watchdog_on(void)
        /* clear bit 11 in TCO1_CNT to start watchdog */
        value = inw(base + 0x08);
        value &= ~(1 << 11);
        /* clear bit 11 in TCO1_CNT to start watchdog */
        value = inw(base + 0x08);
        value &= ~(1 << 11);

-       outw(value, base + 0x08);       
+       outw(value, base + 0x08);

 
        print_debug("Watchdog ICH5 enabled\n");
 }
 
        print_debug("Watchdog ICH5 enabled\n");
 }

diff --git a/src/mainboard/intel/xe7501devkit/acpi_tables.c b/src/mainboard/intel/xe7501devkit/acpi_tables.c
index fd43eb693bcf2a16f4209409fd86d79b17118653..1188467f20d294aaa44ca6a634e1e5967ca827ba 100644 (file)
--- a/src/mainboard/intel/xe7501devkit/acpi_tables.c
+++ b/src/mainboard/intel/xe7501devkit/acpi_tables.c
@@ -38,21 +38,21 @@ unsigned long acpi_fill_madt(unsigned long current)
        device_t dev = 0;
     struct resource* res = NULL;
 
        device_t dev = 0;
     struct resource* res = NULL;
 

- 
+

        // SJM: Hard-code CPU LAPIC entries for now
        //              Use SourcePoint numbering of processors
        current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 0, 6);
        current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 1, 7);
        current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 2, 0);
        current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 3, 1);
        // SJM: Hard-code CPU LAPIC entries for now
        //              Use SourcePoint numbering of processors
        current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 0, 6);
        current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 1, 7);
        current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 2, 0);
        current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 3, 1);

-       
+

 
        // Southbridge IOAPIC
        current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, IOAPIC_ICH3, 0xfec00000, irq_start);
        irq_start += INTEL_IOAPIC_NUM_INTERRUPTS;
 
        // P64H2#2 Bus A IOAPIC
 
        // Southbridge IOAPIC
        current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, IOAPIC_ICH3, 0xfec00000, irq_start);
        irq_start += INTEL_IOAPIC_NUM_INTERRUPTS;
 
        // P64H2#2 Bus A IOAPIC

-       dev = dev_find_slot(PCI_BUS_E7501_HI_B, PCI_DEVFN(30, 0));      
+       dev = dev_find_slot(PCI_BUS_E7501_HI_B, PCI_DEVFN(30, 0));

        if (!dev)
                BUG();          // Config.lb error?
        res = find_resource(dev, PCI_BASE_ADDRESS_0);
        if (!dev)
                BUG();          // Config.lb error?
        res = find_resource(dev, PCI_BASE_ADDRESS_0);


@@ -60,7 +60,7 @@ unsigned long acpi_fill_madt(unsigned long current)
        irq_start += INTEL_IOAPIC_NUM_INTERRUPTS;
 
        // P64H2#2 Bus B IOAPIC
        irq_start += INTEL_IOAPIC_NUM_INTERRUPTS;
 
        // P64H2#2 Bus B IOAPIC

-       dev = dev_find_slot(PCI_BUS_E7501_HI_B, PCI_DEVFN(28, 0));      
+       dev = dev_find_slot(PCI_BUS_E7501_HI_B, PCI_DEVFN(28, 0));

        if (!dev)
                BUG();          // Config.lb error?
        res = find_resource(dev, PCI_BASE_ADDRESS_0);
        if (!dev)
                BUG();          // Config.lb error?
        res = find_resource(dev, PCI_BASE_ADDRESS_0);


@@ -69,7 +69,7 @@ unsigned long acpi_fill_madt(unsigned long current)
 
 
        // P64H2#1 Bus A IOAPIC
 
 
        // P64H2#1 Bus A IOAPIC

-       dev = dev_find_slot(PCI_BUS_E7501_HI_D, PCI_DEVFN(30, 0));      
+       dev = dev_find_slot(PCI_BUS_E7501_HI_D, PCI_DEVFN(30, 0));

        if (!dev)
                BUG();          // Config.lb error?
        res = find_resource(dev, PCI_BASE_ADDRESS_0);
        if (!dev)
                BUG();          // Config.lb error?
        res = find_resource(dev, PCI_BASE_ADDRESS_0);


@@ -77,7 +77,7 @@ unsigned long acpi_fill_madt(unsigned long current)
        irq_start += INTEL_IOAPIC_NUM_INTERRUPTS;
 
        // P64H2#1 Bus B IOAPIC
        irq_start += INTEL_IOAPIC_NUM_INTERRUPTS;
 
        // P64H2#1 Bus B IOAPIC

-       dev = dev_find_slot(PCI_BUS_E7501_HI_D, PCI_DEVFN(28, 0));      
+       dev = dev_find_slot(PCI_BUS_E7501_HI_D, PCI_DEVFN(28, 0));

        if (!dev)
                BUG();          // Config.lb error?
        res = find_resource(dev, PCI_BASE_ADDRESS_0);
        if (!dev)
                BUG();          // Config.lb error?
        res = find_resource(dev, PCI_BASE_ADDRESS_0);


@@ -104,7 +104,7 @@ unsigned long write_acpi_tables(unsigned long start)
        /* Align ACPI tables to 16byte */
        start   = ( start + 0x0f ) & -0x10;
        current = start;
        /* Align ACPI tables to 16byte */
        start   = ( start + 0x0f ) & -0x10;
        current = start;

-       
+

        printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx...\n", start);
 
        /* We need at least an RSDP and an RSDT Table */
        printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx...\n", start);
 
        /* We need at least an RSDP and an RSDT Table */


@@ -115,10 +115,10 @@ unsigned long write_acpi_tables(unsigned long start)
 
        /* clear all table memory */
        memset((void *)start, 0, current - start);
 
        /* clear all table memory */
        memset((void *)start, 0, current - start);

-       
+

        acpi_write_rsdp(rsdp, rsdt, NULL);
        acpi_write_rsdt(rsdt);
        acpi_write_rsdp(rsdp, rsdt, NULL);
        acpi_write_rsdt(rsdt);

-       
+

        /*
         * We explicitly add these tables later on:
         */
        /*
         * We explicitly add these tables later on:
         */

diff --git a/src/mainboard/intel/xe7501devkit/cmos.layout b/src/mainboard/intel/xe7501devkit/cmos.layout
index 494af5bb61ee435d8cb7f30b8da1564447350773..baae5eb617829d7cee531a5c0174e511268527b3 100644 (file)
--- a/src/mainboard/intel/xe7501devkit/cmos.layout
+++ b/src/mainboard/intel/xe7501devkit/cmos.layout
@@ -1,4 +1,4 @@
-# NOTE: This file must be in UNIX format (not DOS) or build_opt_tbl fails: 
+# NOTE: This file must be in UNIX format (not DOS) or build_opt_tbl fails:

 # "Error - Name  is an invalid identifier in line"
 
 entries
 # "Error - Name  is an invalid identifier in line"
 
 entries

diff --git a/src/mainboard/intel/xe7501devkit/ioapic.h b/src/mainboard/intel/xe7501devkit/ioapic.h
index 30ae8e7a736fd17093ce7469cdc4965289979588..9ac2aee3f8a8509444fa66d2f364de4033d71803 100644 (file)
--- a/src/mainboard/intel/xe7501devkit/ioapic.h
+++ b/src/mainboard/intel/xe7501devkit/ioapic.h
@@ -1,6 +1,6 @@
-// IOAPIC addresses determined by coreboot enumeration. 
+// IOAPIC addresses determined by coreboot enumeration.

 // Someday add functions to get APIC IDs and versions from the chips themselves.
 // Someday add functions to get APIC IDs and versions from the chips themselves.

-       
+

 #define IOAPIC_ICH3                            2
 #define IOAPIC_P64H2_2_BUS_B   3       // IOAPIC 3 at 01:1c.0  MBAR = fe300000 DataAddr = fe300010
 #define IOAPIC_P64H2_2_BUS_A   4       // IOAPIC 4 at 01:1e.0  MBAR = fe301000 DataAddr = fe301010
 #define IOAPIC_ICH3                            2
 #define IOAPIC_P64H2_2_BUS_B   3       // IOAPIC 3 at 01:1c.0  MBAR = fe300000 DataAddr = fe300010
 #define IOAPIC_P64H2_2_BUS_A   4       // IOAPIC 4 at 01:1e.0  MBAR = fe301000 DataAddr = fe301010

diff --git a/src/mainboard/intel/xe7501devkit/irq_tables.c b/src/mainboard/intel/xe7501devkit/irq_tables.c
index b329351b6bb7aad4c913af2b5366c76c0edf3f75..951b08f5f8ef18bc365618ad920d3d769e9c75bd 100644 (file)
--- a/src/mainboard/intel/xe7501devkit/irq_tables.c
+++ b/src/mainboard/intel/xe7501devkit/irq_tables.c
@@ -35,17 +35,17 @@ const struct irq_routing_table intel_irq_routing_table = {
                // bitmap of 0xdcf8 == routable to IRQ3-IRQ7, IRQ10-IRQ12, or IRQ14-IRQ15
                // ICH-3 doesn't allow SERIRQ or PCI message to generate IRQ0, IRQ2, IRQ8, or IRQ13
                // Not sure why IRQ9 isn't routable (inherited from Tyan S2735)
                // bitmap of 0xdcf8 == routable to IRQ3-IRQ7, IRQ10-IRQ12, or IRQ14-IRQ15
                // ICH-3 doesn't allow SERIRQ or PCI message to generate IRQ0, IRQ2, IRQ8, or IRQ13
                // Not sure why IRQ9 isn't routable (inherited from Tyan S2735)

-               
+

                //                                                                                      INTA#                      INTB#                     INTC#                    INTD#
        //  bus,                                device #                   {link  , bitmap}, {link  , bitmap}, {link  , bitmap}, {link  , bitmap},  slot, rfu
                //                                                                                      INTA#                      INTB#                     INTC#                    INTD#
        //  bus,                                device #                   {link  , bitmap}, {link  , bitmap}, {link  , bitmap}, {link  , bitmap},  slot, rfu

-               
+

                {PCI_BUS_CHIPSET,       PCI_DEVFN(31, 0), {{PIRQ_C, 0xdcf8}, {PIRQ_B, 0xdcf8}, UNUSED_INTERRUPT, UNUSED_INTERRUPT},   0, 0},    // IDE / SMBus
                {PCI_BUS_CHIPSET,       PCI_DEVFN(29, 0), {{PIRQ_A, 0xdcf8}, {PIRQ_D, 0xdcf8}, {PIRQ_C, 0xdcf8}, UNUSED_INTERRUPT},   0, 0},    // USB 1.1
                {PCI_BUS_CHIPSET,       PCI_DEVFN(31, 0), {{PIRQ_C, 0xdcf8}, {PIRQ_B, 0xdcf8}, UNUSED_INTERRUPT, UNUSED_INTERRUPT},   0, 0},    // IDE / SMBus
                {PCI_BUS_CHIPSET,       PCI_DEVFN(29, 0), {{PIRQ_A, 0xdcf8}, {PIRQ_D, 0xdcf8}, {PIRQ_C, 0xdcf8}, UNUSED_INTERRUPT},   0, 0},    // USB 1.1

-               
+

                // P64H2#2 Bus A
                {PCI_BUS_P64H2_2_A, PCI_DEVFN(1, 0),  {{PIRQ_B, 0xdcf8}, {PIRQ_B, 0xdcf8}, UNUSED_INTERRUPT, UNUSED_INTERRUPT},   0, 0},        // SCSI
                        // NOTE: Hotplug disabled on this bus
                // P64H2#2 Bus A
                {PCI_BUS_P64H2_2_A, PCI_DEVFN(1, 0),  {{PIRQ_B, 0xdcf8}, {PIRQ_B, 0xdcf8}, UNUSED_INTERRUPT, UNUSED_INTERRUPT},   0, 0},        // SCSI
                        // NOTE: Hotplug disabled on this bus

-               
+

                // P64H2#2 Bus B
                {PCI_BUS_P64H2_2_B, PCI_DEVFN(1, 0),  {{PIRQ_B, 0xdcf8}, {PIRQ_B, 0xdcf8}, {PIRQ_B, 0xdcf8}, {PIRQ_B, 0xdcf8}},  23, 0},        // Slot 2A (J23)
                {PCI_BUS_P64H2_2_B, PCI_DEVFN(2, 0),  {{PIRQ_B, 0xdcf8}, {PIRQ_B, 0xdcf8}, {PIRQ_B, 0xdcf8}, {PIRQ_B, 0xdcf8}},  24, 0},        // Slot 2B (J24)
                // P64H2#2 Bus B
                {PCI_BUS_P64H2_2_B, PCI_DEVFN(1, 0),  {{PIRQ_B, 0xdcf8}, {PIRQ_B, 0xdcf8}, {PIRQ_B, 0xdcf8}, {PIRQ_B, 0xdcf8}},  23, 0},        // Slot 2A (J23)
                {PCI_BUS_P64H2_2_B, PCI_DEVFN(2, 0),  {{PIRQ_B, 0xdcf8}, {PIRQ_B, 0xdcf8}, {PIRQ_B, 0xdcf8}, {PIRQ_B, 0xdcf8}},  24, 0},        // Slot 2B (J24)


@@ -61,7 +61,7 @@ const struct irq_routing_table intel_irq_routing_table = {
                {PCI_BUS_P64H2_1_B, PCI_DEVFN(1, 0),  {{PIRQ_A, 0xdcf8}, UNUSED_INTERRUPT, UNUSED_INTERRUPT, UNUSED_INTERRUPT},   0, 0},        // GB Ethernet
                {PCI_BUS_P64H2_1_B, PCI_DEVFN(2, 0),  {{PIRQ_A, 0xdcf8}, {PIRQ_A, 0xdcf8}, {PIRQ_A, 0xdcf8}, {PIRQ_A, 0xdcf8}},  21, 0},        // Slot 1B (J21)
                        // NOTE: Hotplug disabled on this bus
                {PCI_BUS_P64H2_1_B, PCI_DEVFN(1, 0),  {{PIRQ_A, 0xdcf8}, UNUSED_INTERRUPT, UNUSED_INTERRUPT, UNUSED_INTERRUPT},   0, 0},        // GB Ethernet
                {PCI_BUS_P64H2_1_B, PCI_DEVFN(2, 0),  {{PIRQ_A, 0xdcf8}, {PIRQ_A, 0xdcf8}, {PIRQ_A, 0xdcf8}, {PIRQ_A, 0xdcf8}},  21, 0},        // Slot 1B (J21)
                        // NOTE: Hotplug disabled on this bus

-       
+

                // ICH-3 PCI bus
                {PCI_BUS_ICH3,          PCI_DEVFN(0, 0),  {{PIRQ_A, 0xdcf8}, UNUSED_INTERRUPT, UNUSED_INTERRUPT, UNUSED_INTERRUPT},   0, 0},    // Video
                {PCI_BUS_ICH3,          PCI_DEVFN(2, 0),  {{PIRQ_C, 0xdcf8}, {PIRQ_D, 0xdcf8}, {PIRQ_A, 0xdcf8}, {PIRQ_B, 0xdcf8}},  11, 0},    // Debug slot (J11)
                // ICH-3 PCI bus
                {PCI_BUS_ICH3,          PCI_DEVFN(0, 0),  {{PIRQ_A, 0xdcf8}, UNUSED_INTERRUPT, UNUSED_INTERRUPT, UNUSED_INTERRUPT},   0, 0},    // Video
                {PCI_BUS_ICH3,          PCI_DEVFN(2, 0),  {{PIRQ_C, 0xdcf8}, {PIRQ_D, 0xdcf8}, {PIRQ_A, 0xdcf8}, {PIRQ_B, 0xdcf8}},  11, 0},    // Debug slot (J11)

diff --git a/src/mainboard/intel/xe7501devkit/mptable.c b/src/mainboard/intel/xe7501devkit/mptable.c
index ee8299389d3eed1354f631ee3b2005f5abe61651..2f48e83285fd31e8d94506dc1c50fed7b8c64d2a 100644 (file)
--- a/src/mainboard/intel/xe7501devkit/mptable.c
+++ b/src/mainboard/intel/xe7501devkit/mptable.c
@@ -40,14 +40,14 @@ static void xe7501devkit_register_ioapics(struct mp_config_table *mc)
        smp_write_ioapic(mc, IOAPIC_ICH3, 0x20, 0xfec00000);    // APIC ID, Version, Address
 
        // P64H2#2 Bus A IOAPIC
        smp_write_ioapic(mc, IOAPIC_ICH3, 0x20, 0xfec00000);    // APIC ID, Version, Address
 
        // P64H2#2 Bus A IOAPIC

-       dev = dev_find_slot(PCI_BUS_E7501_HI_B, PCI_DEVFN(30, 0));      
+       dev = dev_find_slot(PCI_BUS_E7501_HI_B, PCI_DEVFN(30, 0));

        if (!dev)
                BUG();          // Config.lb error?
        res = find_resource(dev, PCI_BASE_ADDRESS_0);
        smp_write_ioapic(mc, IOAPIC_P64H2_2_BUS_A, P64H2_IOAPIC_VERSION, res->base);
 
        // P64H2#2 Bus B IOAPIC
        if (!dev)
                BUG();          // Config.lb error?
        res = find_resource(dev, PCI_BASE_ADDRESS_0);
        smp_write_ioapic(mc, IOAPIC_P64H2_2_BUS_A, P64H2_IOAPIC_VERSION, res->base);
 
        // P64H2#2 Bus B IOAPIC

-       dev = dev_find_slot(PCI_BUS_E7501_HI_B, PCI_DEVFN(28, 0));      
+       dev = dev_find_slot(PCI_BUS_E7501_HI_B, PCI_DEVFN(28, 0));

        if (!dev)
                BUG();          // Config.lb error?
        res = find_resource(dev, PCI_BASE_ADDRESS_0);
        if (!dev)
                BUG();          // Config.lb error?
        res = find_resource(dev, PCI_BASE_ADDRESS_0);


@@ -55,14 +55,14 @@ static void xe7501devkit_register_ioapics(struct mp_config_table *mc)
 
 
        // P64H2#1 Bus A IOAPIC
 
 
        // P64H2#1 Bus A IOAPIC

-       dev = dev_find_slot(PCI_BUS_E7501_HI_D, PCI_DEVFN(30, 0));      
+       dev = dev_find_slot(PCI_BUS_E7501_HI_D, PCI_DEVFN(30, 0));

        if (!dev)
                BUG();          // Config.lb error?
        res = find_resource(dev, PCI_BASE_ADDRESS_0);
        smp_write_ioapic(mc, IOAPIC_P64H2_1_BUS_A, P64H2_IOAPIC_VERSION, res->base);
 
        // P64H2#1 Bus B IOAPIC
        if (!dev)
                BUG();          // Config.lb error?
        res = find_resource(dev, PCI_BASE_ADDRESS_0);
        smp_write_ioapic(mc, IOAPIC_P64H2_1_BUS_A, P64H2_IOAPIC_VERSION, res->base);
 
        // P64H2#1 Bus B IOAPIC

-       dev = dev_find_slot(PCI_BUS_E7501_HI_D, PCI_DEVFN(28, 0));      
+       dev = dev_find_slot(PCI_BUS_E7501_HI_D, PCI_DEVFN(28, 0));

        if (!dev)
                BUG();          // Config.lb error?
        res = find_resource(dev, PCI_BASE_ADDRESS_0);
        if (!dev)
                BUG();          // Config.lb error?
        res = find_resource(dev, PCI_BASE_ADDRESS_0);


@@ -98,11 +98,11 @@ static void xe7501devkit_register_interrupts(struct mp_config_table *mc)
        smp_write_intsrc(mc, mp_INT,    MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,       PCI_BUS_P64H2_2_B,      PCI_IRQ(4, INT_B),      IOAPIC_P64H2_2_BUS_B,   13);    // Slot 2D (J12)
        smp_write_intsrc(mc, mp_INT,    MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,       PCI_BUS_P64H2_2_B,      PCI_IRQ(4, INT_C),      IOAPIC_P64H2_2_BUS_B,   14);    // Slot 2D (J12)
        smp_write_intsrc(mc, mp_INT,    MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,       PCI_BUS_P64H2_2_B,      PCI_IRQ(4, INT_D),      IOAPIC_P64H2_2_BUS_B,   15);    // Slot 2D (J12)
        smp_write_intsrc(mc, mp_INT,    MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,       PCI_BUS_P64H2_2_B,      PCI_IRQ(4, INT_B),      IOAPIC_P64H2_2_BUS_B,   13);    // Slot 2D (J12)
        smp_write_intsrc(mc, mp_INT,    MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,       PCI_BUS_P64H2_2_B,      PCI_IRQ(4, INT_C),      IOAPIC_P64H2_2_BUS_B,   14);    // Slot 2D (J12)
        smp_write_intsrc(mc, mp_INT,    MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,       PCI_BUS_P64H2_2_B,      PCI_IRQ(4, INT_D),      IOAPIC_P64H2_2_BUS_B,   15);    // Slot 2D (J12)

-       
+

        // P64H2#2 Bus A
        smp_write_intsrc(mc, mp_INT,    MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,       PCI_BUS_P64H2_2_A,      PCI_IRQ(1, INT_A),      IOAPIC_P64H2_2_BUS_A,    0);    // SCSI
        smp_write_intsrc(mc, mp_INT,    MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,       PCI_BUS_P64H2_2_A,      PCI_IRQ(1, INT_B),      IOAPIC_P64H2_2_BUS_A,    1);    // SCSI
        // P64H2#2 Bus A
        smp_write_intsrc(mc, mp_INT,    MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,       PCI_BUS_P64H2_2_A,      PCI_IRQ(1, INT_A),      IOAPIC_P64H2_2_BUS_A,    0);    // SCSI
        smp_write_intsrc(mc, mp_INT,    MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,       PCI_BUS_P64H2_2_A,      PCI_IRQ(1, INT_B),      IOAPIC_P64H2_2_BUS_A,    1);    // SCSI

-       
+

        // P64H2#1 Bus B
        smp_write_intsrc(mc, mp_INT,    MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,       PCI_BUS_P64H2_1_B,      PCI_IRQ(1, INT_A),      IOAPIC_P64H2_1_BUS_B,    0);    // GB Ethernet
        smp_write_intsrc(mc, mp_INT,    MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,       PCI_BUS_P64H2_1_B,      PCI_IRQ(2, INT_A),      IOAPIC_P64H2_1_BUS_B,    4);    // Slot 1B (J21)
        // P64H2#1 Bus B
        smp_write_intsrc(mc, mp_INT,    MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,       PCI_BUS_P64H2_1_B,      PCI_IRQ(1, INT_A),      IOAPIC_P64H2_1_BUS_B,    0);    // GB Ethernet
        smp_write_intsrc(mc, mp_INT,    MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,       PCI_BUS_P64H2_1_B,      PCI_IRQ(2, INT_A),      IOAPIC_P64H2_1_BUS_B,    4);    // Slot 1B (J21)


@@ -117,13 +117,13 @@ static void xe7501devkit_register_interrupts(struct mp_config_table *mc)
        smp_write_intsrc(mc, mp_INT,    MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,       PCI_BUS_P64H2_1_A,      PCI_IRQ(1, INT_D),      IOAPIC_P64H2_1_BUS_A,    3);    // Slot 1A (J20)
 
        // ICH-3
        smp_write_intsrc(mc, mp_INT,    MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,       PCI_BUS_P64H2_1_A,      PCI_IRQ(1, INT_D),      IOAPIC_P64H2_1_BUS_A,    3);    // Slot 1A (J20)
 
        // ICH-3

-       
+

        smp_write_intsrc(mc, mp_INT,    MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,       PCI_BUS_ICH3,           PCI_IRQ(0, INT_A),      IOAPIC_ICH3,                    16);    // Video
        smp_write_intsrc(mc, mp_INT,    MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,       PCI_BUS_ICH3,           PCI_IRQ(2, INT_A),      IOAPIC_ICH3,                    18);    // Debug slot (J11)
        smp_write_intsrc(mc, mp_INT,    MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,       PCI_BUS_ICH3,           PCI_IRQ(2, INT_B),      IOAPIC_ICH3,                    19);    // Debug slot (J11)
        smp_write_intsrc(mc, mp_INT,    MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,       PCI_BUS_ICH3,           PCI_IRQ(2, INT_C),      IOAPIC_ICH3,                    16);    // Debug slot (J11)
        smp_write_intsrc(mc, mp_INT,    MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,       PCI_BUS_ICH3,           PCI_IRQ(2, INT_D),      IOAPIC_ICH3,                    17);    // Debug slot (J11)
        smp_write_intsrc(mc, mp_INT,    MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,       PCI_BUS_ICH3,           PCI_IRQ(0, INT_A),      IOAPIC_ICH3,                    16);    // Video
        smp_write_intsrc(mc, mp_INT,    MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,       PCI_BUS_ICH3,           PCI_IRQ(2, INT_A),      IOAPIC_ICH3,                    18);    // Debug slot (J11)
        smp_write_intsrc(mc, mp_INT,    MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,       PCI_BUS_ICH3,           PCI_IRQ(2, INT_B),      IOAPIC_ICH3,                    19);    // Debug slot (J11)
        smp_write_intsrc(mc, mp_INT,    MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,       PCI_BUS_ICH3,           PCI_IRQ(2, INT_C),      IOAPIC_ICH3,                    16);    // Debug slot (J11)
        smp_write_intsrc(mc, mp_INT,    MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,       PCI_BUS_ICH3,           PCI_IRQ(2, INT_D),      IOAPIC_ICH3,                    17);    // Debug slot (J11)

-       
+

        // TODO: Not sure how to handle BT_INTR# signals from the P64H2s. Do we even need to, in APIC mode?
 
        // Super I/O (ISA interrupts)
        // TODO: Not sure how to handle BT_INTR# signals from the P64H2s. Do we even need to, in APIC mode?
 
        // Super I/O (ISA interrupts)

diff --git a/src/mainboard/intel/xe7501devkit/romstage.c b/src/mainboard/intel/xe7501devkit/romstage.c
index 003a37f31cae9020aebfb0e2de299f2f9f796d40..99f00212c1d06d8abe14f769c9b0e3e91320c490 100644 (file)
--- a/src/mainboard/intel/xe7501devkit/romstage.c
+++ b/src/mainboard/intel/xe7501devkit/romstage.c
@@ -48,7 +48,7 @@ static void main(unsigned long bist)
                },
        };
 
                },
        };
 

-       if (bist == 0) 
+       if (bist == 0)

        {
                // Skip this if there was a built in self test failure
                early_mtrr_init();
        {
                // Skip this if there was a built in self test failure
                early_mtrr_init();


@@ -68,14 +68,14 @@ static void main(unsigned long bist)
 
        // If this is a warm boot, some initialization can be skipped
 
 
        // If this is a warm boot, some initialization can be skipped
 

-       if (!bios_reset_detected()) 
+       if (!bios_reset_detected())

        {
                enable_smbus();
                // dump_spd_registers(&memctrl[0]);
                // dump_smbus_registers();
                sdram_initialize(ARRAY_SIZE(memctrl), memctrl);
        }
        {
                enable_smbus();
                // dump_spd_registers(&memctrl[0]);
                // dump_smbus_registers();
                sdram_initialize(ARRAY_SIZE(memctrl), memctrl);
        }

-       
+

        // NOTE: ROMCC dies with an internal compiler error
        //               if the following line is removed.
        print_debug("SDRAM is up.\n");
        // NOTE: ROMCC dies with an internal compiler error
        //               if the following line is removed.
        print_debug("SDRAM is up.\n");

diff --git a/src/mainboard/iwill/Kconfig b/src/mainboard/iwill/Kconfig
index cfb986f7eb0fdef6415eef72be2abf07fbfbb426..4a157954ab30c9ff3ab5d458a997b9bb65485e7a 100644 (file)
--- a/src/mainboard/iwill/Kconfig
+++ b/src/mainboard/iwill/Kconfig
@@ -1,7 +1,7 @@
 choice
        prompt "Mainboard model"
        depends on VENDOR_IWILL
 choice
        prompt "Mainboard model"
        depends on VENDOR_IWILL

-        
+

 source "src/mainboard/iwill/dk8_htx/Kconfig"
 source "src/mainboard/iwill/dk8s2/Kconfig"
 source "src/mainboard/iwill/dk8x/Kconfig"
 source "src/mainboard/iwill/dk8_htx/Kconfig"
 source "src/mainboard/iwill/dk8s2/Kconfig"
 source "src/mainboard/iwill/dk8x/Kconfig"

diff --git a/src/mainboard/iwill/dk8_htx/acpi/amd8111.asl b/src/mainboard/iwill/dk8_htx/acpi/amd8111.asl
index 19011dc47b654edc95fcc4ac22597b381ffb0bbb..38aaea1525f857f8d61f46e5b44626c9d5072c94 100644 (file)
--- a/src/mainboard/iwill/dk8_htx/acpi/amd8111.asl
+++ b/src/mainboard/iwill/dk8_htx/acpi/amd8111.asl
@@ -4,17 +4,17 @@
 //AMD8111
             Name (APIC, Package (0x04)
             {
 //AMD8111
             Name (APIC, Package (0x04)
             {

-                Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x10},// 0x0004ffff : assusme 8131 is present 
-                Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x11}, 
-                Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x12}, 
+                Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x10},// 0x0004ffff : assusme 8131 is present
+                Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x11},
+                Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x12},

                 Package (0x04) { 0x0004FFFF, 0x03, 0x00, 0x13}
             })
 
             Name (PICM, Package (0x04)
             {
                 Package (0x04) { 0x0004FFFF, 0x03, 0x00, 0x13}
             })
 
             Name (PICM, Package (0x04)
             {

-                Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI0.LNKA, 0x00}, 
-                Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI0.LNKB, 0x00}, 
-                Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI0.LNKC, 0x00}, 
+                Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI0.LNKA, 0x00},
+                Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI0.LNKB, 0x00},
+                Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI0.LNKC, 0x00},

                 Package (0x04) { 0x0004FFFF, 0x03, \_SB.PCI0.LNKD, 0x00}
             })
 
                 Package (0x04) { 0x0004FFFF, 0x03, \_SB.PCI0.LNKD, 0x00}
             })
 


@@ -34,16 +34,16 @@
                         Store(Local0, Index (DeRefOf (Index (APIC, 1)), 0))
                         Store(Local0, Index (DeRefOf (Index (APIC, 2)), 0))
                         Store(Local0, Index (DeRefOf (Index (APIC, 3)), 0))
                         Store(Local0, Index (DeRefOf (Index (APIC, 1)), 0))
                         Store(Local0, Index (DeRefOf (Index (APIC, 2)), 0))
                         Store(Local0, Index (DeRefOf (Index (APIC, 3)), 0))

-                       
+

                        Store (0x00, ^DNCG)
                        Store (0x00, ^DNCG)

-                       
+

                }
 
                }
 

-                If (LNot (PICF)) { 
-                       Return (PICM) 
+                If (LNot (PICF)) {
+                       Return (PICM)

                }
                 Else {
                }
                 Else {

-                       Return (APIC) 
+                       Return (APIC)

                }
             }
 
                }
             }
 


@@ -57,7 +57,7 @@
                 OperationRegion (PIRQ, PCI_Config, 0x56, 0x02)
                 Field (PIRQ, ByteAcc, Lock, Preserve)
                 {
                 OperationRegion (PIRQ, PCI_Config, 0x56, 0x02)
                 Field (PIRQ, ByteAcc, Lock, Preserve)
                 {

-                    PIBA,   8, 
+                    PIBA,   8,

                     PIDC,   8
                 }
 /*
                     PIDC,   8
                 }
 /*


@@ -144,7 +144,7 @@
                     Package (0x04) { 0x0005FFFF, 0x02, 0x00, 0x13 },
                     Package (0x04) { 0x0005FFFF, 0x03, 0x00, 0x10 }
                 })
                     Package (0x04) { 0x0005FFFF, 0x02, 0x00, 0x13 },
                     Package (0x04) { 0x0005FFFF, 0x03, 0x00, 0x10 }
                 })

-       
+

                 Name (PICM, Package (0x0C)
                 {
                     Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 }, //USB
                 Name (PICM, Package (0x0C)
                 {
                     Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 }, //USB

diff --git a/src/mainboard/iwill/dk8_htx/acpi/amd8111_isa.asl b/src/mainboard/iwill/dk8_htx/acpi/amd8111_isa.asl
index 9d93e34e9265e70f100a800d98e059d95862c309..9e952c80bd3e18f9a28b4090c748500092b28665 100644 (file)
--- a/src/mainboard/iwill/dk8_htx/acpi/amd8111_isa.asl
+++ b/src/mainboard/iwill/dk8_htx/acpi/amd8111_isa.asl
@@ -5,7 +5,7 @@
 
             Device (ISA)
             {
 
             Device (ISA)
             {

-                /* lpc  0x00040000 */ 
+                /* lpc  0x00040000 */

                 Method (_ADR, 0, NotSerialized)
                 {
                        Return (DADD(\_SB.PCI0.SBDN, 0x00010000))
                 Method (_ADR, 0, NotSerialized)
                 {
                        Return (DADD(\_SB.PCI0.SBDN, 0x00010000))


@@ -15,11 +15,11 @@
                 Field (PIRY, ByteAcc, NoLock, Preserve)
                 {
                     Z000,   2,  // Parallel Port Range
                 Field (PIRY, ByteAcc, NoLock, Preserve)
                 {
                     Z000,   2,  // Parallel Port Range

-                        ,   1, 
+                        ,   1,

                     ECP,    1,  // ECP Enable
                     FDC1,   1,  // Floppy Drive Controller 1
                     FDC2,   1,  // Floppy Drive Controller 2
                     ECP,    1,  // ECP Enable
                     FDC1,   1,  // Floppy Drive Controller 1
                     FDC2,   1,  // Floppy Drive Controller 2

-                    Offset (0x01), 
+                    Offset (0x01),

                     Z001,   3,  // Serial Port A Range
                     SAEN,   1,  // Serial Post A Enabled
                     Z002,   3,  // Serial Port B Range
                     Z001,   3,  // Serial Port A Range
                     SAEN,   1,  // Serial Post A Enabled
                     Z002,   3,  // Serial Port B Range


@@ -106,7 +106,7 @@
                         IO (Decode16, 0x0090, 0x0090, 0x01, 0x10)
                         IO (Decode16, 0x00A2, 0x00A2, 0x01, 0x1E)
                         IO (Decode16, 0x00E0, 0x00E0, 0x01, 0x10)
                         IO (Decode16, 0x0090, 0x0090, 0x01, 0x10)
                         IO (Decode16, 0x00A2, 0x00A2, 0x01, 0x1E)
                         IO (Decode16, 0x00E0, 0x00E0, 0x01, 0x10)

-                        IO (Decode16, 0x0B78, 0x0B78, 0x01, 0x04) // Added this to remove ACPI Unrepoted IO Error 
+                        IO (Decode16, 0x0B78, 0x0B78, 0x01, 0x04) // Added this to remove ACPI Unrepoted IO Error

                         IO (Decode16, 0x0190, 0x0190, 0x01, 0x04) // Added this to remove ACPI Unrepoted IO Error
                     })
                     Method (_CRS, 0, NotSerialized)
                         IO (Decode16, 0x0190, 0x0190, 0x01, 0x04) // Added this to remove ACPI Unrepoted IO Error
                     })
                     Method (_CRS, 0, NotSerialized)


@@ -134,7 +134,7 @@
                             Memory32Fixed (ReadWrite, 0x00000000, 0x00000000) //Overlay BIOS
                             Memory32Fixed (ReadWrite, 0x00000000, 0x00000000) //Overlay BIOS
                         })
                             Memory32Fixed (ReadWrite, 0x00000000, 0x00000000) //Overlay BIOS
                             Memory32Fixed (ReadWrite, 0x00000000, 0x00000000) //Overlay BIOS
                         })

-                       // Read the Video Memory length 
+                       // Read the Video Memory length

                         CreateDWordField (BUF0, 0x14, CLEN)
                         CreateDWordField (BUF0, 0x10, CBAS)
 
                         CreateDWordField (BUF0, 0x14, CLEN)
                         CreateDWordField (BUF0, 0x10, CBAS)
 

diff --git a/src/mainboard/iwill/dk8_htx/acpi/amd8131.asl b/src/mainboard/iwill/dk8_htx/acpi/amd8131.asl
index fbc0b30e4260e882bd00db7c0579c123c56f0552..dd82e38df54717d849681311219e338de63a2e89 100644 (file)
--- a/src/mainboard/iwill/dk8_htx/acpi/amd8131.asl
+++ b/src/mainboard/iwill/dk8_htx/acpi/amd8131.asl
@@ -1,7 +1,7 @@
 /*
  * Copyright 2005 AMD
  */
 /*
  * Copyright 2005 AMD
  */

-               
+

             Device (PG0A)
             {
                 /*  8132 pcix bridge*/
             Device (PG0A)
             {
                 /*  8132 pcix bridge*/


@@ -19,60 +19,60 @@
                 Name (APIC, Package (0x14)
                 {
                    // Slot 3 - PIRQ BCDA ---- verified
                 Name (APIC, Package (0x14)
                 {
                    // Slot 3 - PIRQ BCDA ---- verified

-                    Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x19 }, //Slot 3 
-                    Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x1A }, 
-                    Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x1B }, 
+                    Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x19 }, //Slot 3
+                    Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x1A },
+                    Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x1B },

                     Package (0x04) { 0x0001FFFF, 0x03, 0x00, 0x18 },
                     Package (0x04) { 0x0001FFFF, 0x03, 0x00, 0x18 },

- 
+

                    //Slot 4 - PIRQ CDAB  ---- verified
                     Package (0x04) { 0x0002FFFF, 0x00, 0x00, 0x1A }, //?
                    //Slot 4 - PIRQ CDAB  ---- verified
                     Package (0x04) { 0x0002FFFF, 0x00, 0x00, 0x1A }, //?

-                    Package (0x04) { 0x0002FFFF, 0x01, 0x00, 0x1B }, 
-                    Package (0x04) { 0x0002FFFF, 0x02, 0x00, 0x18 }, 
-                    Package (0x04) { 0x0002FFFF, 0x03, 0x00, 0x19 }, 
+                    Package (0x04) { 0x0002FFFF, 0x01, 0x00, 0x1B },
+                    Package (0x04) { 0x0002FFFF, 0x02, 0x00, 0x18 },
+                    Package (0x04) { 0x0002FFFF, 0x03, 0x00, 0x19 },

 
                    //Onboard NIC 1  - PIRQ DABC
                     Package (0x04) { 0x0003FFFF, 0x00, 0x00, 0x1B }, //?
 
                    //Onboard NIC 1  - PIRQ DABC
                     Package (0x04) { 0x0003FFFF, 0x00, 0x00, 0x1B }, //?

-                    Package (0x04) { 0x0003FFFF, 0x01, 0x00, 0x18 }, 
-                    Package (0x04) { 0x0003FFFF, 0x02, 0x00, 0x19 }, 
-                    Package (0x04) { 0x0003FFFF, 0x03, 0x00, 0x1A }, 
+                    Package (0x04) { 0x0003FFFF, 0x01, 0x00, 0x18 },
+                    Package (0x04) { 0x0003FFFF, 0x02, 0x00, 0x19 },
+                    Package (0x04) { 0x0003FFFF, 0x03, 0x00, 0x1A },

 
                    // NIC 2  - PIRQ ABCD -- verified
                     Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x18 }, //?
 
                    // NIC 2  - PIRQ ABCD -- verified
                     Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x18 }, //?

-                    Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x19 }, 
-                    Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x1A }, 
-                    Package (0x04) { 0x0004FFFF, 0x03, 0x00, 0x1B }, 
+                    Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x19 },
+                    Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x1A },
+                    Package (0x04) { 0x0004FFFF, 0x03, 0x00, 0x1B },

 
                    //SERIAL ATA     - PIRQ BCDA
                     Package (0x04) { 0x0005FFFF, 0x00, 0x00, 0x19 }, //?
 
                    //SERIAL ATA     - PIRQ BCDA
                     Package (0x04) { 0x0005FFFF, 0x00, 0x00, 0x19 }, //?

-                    Package (0x04) { 0x0005FFFF, 0x01, 0x00, 0x1A }, 
-                    Package (0x04) { 0x0005FFFF, 0x02, 0x00, 0x1B }, 
+                    Package (0x04) { 0x0005FFFF, 0x01, 0x00, 0x1A },
+                    Package (0x04) { 0x0005FFFF, 0x02, 0x00, 0x1B },

                     Package (0x04) { 0x0005FFFF, 0x03, 0x00, 0x18 }
                 })
                 Name (PICM, Package (0x14)
                 {
                     Package (0x04) { 0x0005FFFF, 0x03, 0x00, 0x18 }
                 })
                 Name (PICM, Package (0x14)
                 {

-                    Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI0.LNKB, 0x00 },//Slot 3 
-                    Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI0.LNKC, 0x00 }, 
-                    Package (0x04) { 0x0001FFFF, 0x02, \_SB.PCI0.LNKD, 0x00 }, 
-                    Package (0x04) { 0x0001FFFF, 0x03, \_SB.PCI0.LNKA, 0x00 }, 
+                    Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI0.LNKB, 0x00 },//Slot 3
+                    Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI0.LNKC, 0x00 },
+                    Package (0x04) { 0x0001FFFF, 0x02, \_SB.PCI0.LNKD, 0x00 },
+                    Package (0x04) { 0x0001FFFF, 0x03, \_SB.PCI0.LNKA, 0x00 },

 
 

-                    Package (0x04) { 0x0002FFFF, 0x00, \_SB.PCI0.LNKC, 0x00 }, 
-                    Package (0x04) { 0x0002FFFF, 0x01, \_SB.PCI0.LNKD, 0x00 }, 
-                    Package (0x04) { 0x0002FFFF, 0x02, \_SB.PCI0.LNKA, 0x00 }, 
-                    Package (0x04) { 0x0002FFFF, 0x03, \_SB.PCI0.LNKB, 0x00 }, 
+                    Package (0x04) { 0x0002FFFF, 0x00, \_SB.PCI0.LNKC, 0x00 },
+                    Package (0x04) { 0x0002FFFF, 0x01, \_SB.PCI0.LNKD, 0x00 },
+                    Package (0x04) { 0x0002FFFF, 0x02, \_SB.PCI0.LNKA, 0x00 },
+                    Package (0x04) { 0x0002FFFF, 0x03, \_SB.PCI0.LNKB, 0x00 },

 
 

-                    Package (0x04) { 0x0003FFFF, 0x00, \_SB.PCI0.LNKD, 0x00 }, 
-                    Package (0x04) { 0x0003FFFF, 0x01, \_SB.PCI0.LNKA, 0x00 }, 
-                    Package (0x04) { 0x0003FFFF, 0x02, \_SB.PCI0.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0003FFFF, 0x03, \_SB.PCI0.LNKC, 0x00 }, 
+                    Package (0x04) { 0x0003FFFF, 0x00, \_SB.PCI0.LNKD, 0x00 },
+                    Package (0x04) { 0x0003FFFF, 0x01, \_SB.PCI0.LNKA, 0x00 },
+                    Package (0x04) { 0x0003FFFF, 0x02, \_SB.PCI0.LNKB, 0x00 },
+                    Package (0x04) { 0x0003FFFF, 0x03, \_SB.PCI0.LNKC, 0x00 },

 
 

-                    Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 }, 
-                    Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, 
-                    Package (0x04) { 0x0004FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }, 
+                    Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },
+                    Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 },
+                    Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 },
+                    Package (0x04) { 0x0004FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 },

 
 

-                    Package (0x04) { 0x0005FFFF, 0x00, \_SB.PCI0.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0005FFFF, 0x01, \_SB.PCI0.LNKC, 0x00 }, 
-                    Package (0x04) { 0x0005FFFF, 0x02, \_SB.PCI0.LNKD, 0x00 }, 
+                    Package (0x04) { 0x0005FFFF, 0x00, \_SB.PCI0.LNKB, 0x00 },
+                    Package (0x04) { 0x0005FFFF, 0x01, \_SB.PCI0.LNKC, 0x00 },
+                    Package (0x04) { 0x0005FFFF, 0x02, \_SB.PCI0.LNKD, 0x00 },

                     Package (0x04) { 0x0005FFFF, 0x03, \_SB.PCI0.LNKA, 0x00 }
                 })
                 Method (_PRT, 0, NotSerialized)
                     Package (0x04) { 0x0005FFFF, 0x03, \_SB.PCI0.LNKA, 0x00 }
                 })
                 Method (_PRT, 0, NotSerialized)


@@ -100,15 +100,15 @@
                 {
                    // Slot A - PIRQ CDAB -- verfied
                     Package (0x04) { 0x0002FFFF, 0x00, 0x00, 0x1E },// Slot 2
                 {
                    // Slot A - PIRQ CDAB -- verfied
                     Package (0x04) { 0x0002FFFF, 0x00, 0x00, 0x1E },// Slot 2

-                    Package (0x04) { 0x0002FFFF, 0x01, 0x00, 0x1F }, 
-                    Package (0x04) { 0x0002FFFF, 0x02, 0x00, 0x1C }, 
+                    Package (0x04) { 0x0002FFFF, 0x01, 0x00, 0x1F },
+                    Package (0x04) { 0x0002FFFF, 0x02, 0x00, 0x1C },

                     Package (0x04) { 0x0002FFFF, 0x03, 0x00, 0x1D }
                 })
                 Name (PICM, Package (0x04)
                 {
                     Package (0x04) { 0x0002FFFF, 0x03, 0x00, 0x1D }
                 })
                 Name (PICM, Package (0x04)
                 {

-                    Package (0x04) { 0x0002FFFF, 0x00, \_SB.PCI0.LNKC, 0x00 },//Slot 2 
-                    Package (0x04) { 0x0002FFFF, 0x01, \_SB.PCI0.LNKD, 0x00 }, 
-                    Package (0x04) { 0x0002FFFF, 0x02, \_SB.PCI0.LNKA, 0x00 }, 
+                    Package (0x04) { 0x0002FFFF, 0x00, \_SB.PCI0.LNKC, 0x00 },//Slot 2
+                    Package (0x04) { 0x0002FFFF, 0x01, \_SB.PCI0.LNKD, 0x00 },
+                    Package (0x04) { 0x0002FFFF, 0x02, \_SB.PCI0.LNKA, 0x00 },

                     Package (0x04) { 0x0002FFFF, 0x03, \_SB.PCI0.LNKB, 0x00 }
                 })
                 Method (_PRT, 0, NotSerialized)
                     Package (0x04) { 0x0002FFFF, 0x03, \_SB.PCI0.LNKB, 0x00 }
                 })
                 Method (_PRT, 0, NotSerialized)

diff --git a/src/mainboard/iwill/dk8_htx/acpi/amd8131_2.asl b/src/mainboard/iwill/dk8_htx/acpi/amd8131_2.asl
index 163c0f6061d32d812143d939bf6c93d05bd83ea4..8b8bc9fab9c8316e660d556abe9ce38dd5f8d07c 100644 (file)
--- a/src/mainboard/iwill/dk8_htx/acpi/amd8131_2.asl
+++ b/src/mainboard/iwill/dk8_htx/acpi/amd8131_2.asl
@@ -1,7 +1,7 @@
 /*
  * Copyright 2005 AMD
  */
 /*
  * Copyright 2005 AMD
  */

-               
+

             Device (PG0A)
             {
                 /*  8132 pcix bridge*/
             Device (PG0A)
             {
                 /*  8132 pcix bridge*/


@@ -19,18 +19,18 @@
                 Name (APIC, Package (0x04)
                 {
                    // Slot A - PIRQ BCDA
                 Name (APIC, Package (0x04)
                 {
                    // Slot A - PIRQ BCDA

-                    Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x0018 }, //Slot 2 
-                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0019 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x001A }, 
+                    Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x0018 }, //Slot 2
+                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0019 },
+                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x001A },

                     Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x001B },
                     Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x001B },

- 
+

                 })
                 Name (PICM, Package (0x04)
                 {
                 })
                 Name (PICM, Package (0x04)
                 {

-                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 2 
-                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, 
-                    Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }, 
+                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 2
+                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 },
+                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 },
+                    Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 },

                 })
 
                Name (DNCG, Ones)
                 })
 
                Name (DNCG, Ones)


@@ -40,7 +40,7 @@
                     If (LEqual (^DNCG, Ones)) {
                            Multiply (HCIN, 0x0008, Local2) // GSI for 8132 is 4 so we get 8
                            Store (0x00, Local1)
                     If (LEqual (^DNCG, Ones)) {
                            Multiply (HCIN, 0x0008, Local2) // GSI for 8132 is 4 so we get 8
                            Store (0x00, Local1)

-                           While (LLess (Local1, 0x04)) 
+                           While (LLess (Local1, 0x04))

                            {
                                // Update the GSI according to HCIN
                                Store(DeRefOf(Index (DeRefOf (Index (APIC, Local1)), 3)), Local0)
                            {
                                // Update the GSI according to HCIN
                                Store(DeRefOf(Index (DeRefOf (Index (APIC, Local1)), 3)), Local0)


@@ -76,15 +76,15 @@
                 {
                    // Slot A - PIRQ ABCD
                     Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x001F },// Slot 1
                 {
                    // Slot A - PIRQ ABCD
                     Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x001F },// Slot 1

-                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0020 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x0021 }, 
+                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0020 },
+                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x0021 },

                     Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x0022 }
                 })
                 Name (PICM, Package (0x04)
                 {
                     Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x0022 }
                 })
                 Name (PICM, Package (0x04)
                 {

-                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 1 
-                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, 
+                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 1
+                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 },
+                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 },

                     Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }
                 })
 
                     Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }
                 })
 

diff --git a/src/mainboard/iwill/dk8_htx/acpi/amd8132_2.asl b/src/mainboard/iwill/dk8_htx/acpi/amd8132_2.asl
index 75ef72343a36c869d97c9769ac7549b7f7082fa7..e5cfe3c951d9c18933123c41c2a5101e6a54fa49 100644 (file)
--- a/src/mainboard/iwill/dk8_htx/acpi/amd8132_2.asl
+++ b/src/mainboard/iwill/dk8_htx/acpi/amd8132_2.asl
@@ -1,7 +1,7 @@
 /*
  * Copyright 2005 AMD
  */
 /*
  * Copyright 2005 AMD
  */

-               
+

             Device (PG0A)
             {
                 /*  8132 pcix bridge*/
             Device (PG0A)
             {
                 /*  8132 pcix bridge*/


@@ -19,18 +19,18 @@
                 Name (APIC, Package (0x04)
                 {
                    // Slot A - PIRQ BCDA
                 Name (APIC, Package (0x04)
                 {
                    // Slot A - PIRQ BCDA

-                    Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x0018 }, //Slot 2 
-                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0019 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x001A }, 
+                    Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x0018 }, //Slot 2
+                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0019 },
+                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x001A },

                     Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x001B },
                     Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x001B },

- 
+

                 })
                 Name (PICM, Package (0x04)
                 {
                 })
                 Name (PICM, Package (0x04)
                 {

-                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 2 
-                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, 
-                    Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }, 
+                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 2
+                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 },
+                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 },
+                    Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 },

                 })
 
                Name (DNCG, Ones)
                 })
 
                Name (DNCG, Ones)


@@ -40,7 +40,7 @@
                     If (LEqual (^DNCG, Ones)) {
                            Multiply (HCIN, 0x000e, Local2) // GSI for 8132 is 7 so we get 14
                            Store (0x00, Local1)
                     If (LEqual (^DNCG, Ones)) {
                            Multiply (HCIN, 0x000e, Local2) // GSI for 8132 is 7 so we get 14
                            Store (0x00, Local1)

-                           While (LLess (Local1, 0x04)) 
+                           While (LLess (Local1, 0x04))

                            {
                                // Update the GSI according to HCIN
                                Store(DeRefOf(Index (DeRefOf (Index (APIC, Local1)), 3)), Local0)
                            {
                                // Update the GSI according to HCIN
                                Store(DeRefOf(Index (DeRefOf (Index (APIC, Local1)), 3)), Local0)


@@ -76,15 +76,15 @@
                 {
                    // Slot A - PIRQ ABCD
                     Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x001F },// Slot 1
                 {
                    // Slot A - PIRQ ABCD
                     Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x001F },// Slot 1

-                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0020 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x0021 }, 
+                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0020 },
+                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x0021 },

                     Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x0022 }
                 })
                 Name (PICM, Package (0x04)
                 {
                     Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x0022 }
                 })
                 Name (PICM, Package (0x04)
                 {

-                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 1 
-                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, 
+                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 1
+                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 },
+                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 },

                     Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }
                 })
 
                     Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }
                 })
 

diff --git a/src/mainboard/iwill/dk8_htx/acpi/amd8151.asl b/src/mainboard/iwill/dk8_htx/acpi/amd8151.asl
index 001d45b0fe1dfa30ce2b52d6544440ef95dc3b9d..ce85502296640f6966459c8b3c2b64fca0abb916 100644 (file)
--- a/src/mainboard/iwill/dk8_htx/acpi/amd8151.asl
+++ b/src/mainboard/iwill/dk8_htx/acpi/amd8151.asl
@@ -1,4 +1,4 @@
-// AMD8151 
+// AMD8151

             Device (AGPB)
             {
                 Method (_ADR, 0, NotSerialized)
             Device (AGPB)
             {
                 Method (_ADR, 0, NotSerialized)


@@ -8,16 +8,16 @@
 
                 Name (APIC, Package (0x04)
                 {
 
                 Name (APIC, Package (0x04)
                 {

-                    Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x10 }, 
-                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x11 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x12 }, 
+                    Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x10 },
+                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x11 },
+                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x12 },

                     Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x13 }
                 })
                 Name (PICM, Package (0x04)
                 {
                     Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x13 }
                 })
                 Name (PICM, Package (0x04)
                 {

-                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 }, 
-                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, 
+                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },
+                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 },
+                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 },

                     Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }
                 })
                 Method (_PRT, 0, NotSerialized)
                     Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }
                 })
                 Method (_PRT, 0, NotSerialized)

diff --git a/src/mainboard/iwill/dk8_htx/acpi/htx_no_ioapic.asl b/src/mainboard/iwill/dk8_htx/acpi/htx_no_ioapic.asl
index 95a4860c63227d11b9576660a2df525b55760abb..1035a7edfd92aa3878435ded346b7b68b67f9e21 100644 (file)
--- a/src/mainboard/iwill/dk8_htx/acpi/htx_no_ioapic.asl
+++ b/src/mainboard/iwill/dk8_htx/acpi/htx_no_ioapic.asl
@@ -1,7 +1,7 @@
 /*
  * Copyright 2006 AMD
  */
 /*
  * Copyright 2006 AMD
  */

-               
+

             Device (HTXA)
             {
                 /*  HTX */
             Device (HTXA)
             {
                 /*  HTX */

diff --git a/src/mainboard/iwill/dk8_htx/acpi_tables.c b/src/mainboard/iwill/dk8_htx/acpi_tables.c
index 05664e31a563f449790f6562daf3eb4a825633d4..9113c5acc9eeaee0707fd502ab59f913051a29c3 100644 (file)
--- a/src/mainboard/iwill/dk8_htx/acpi_tables.c
+++ b/src/mainboard/iwill/dk8_htx/acpi_tables.c
@@ -25,7 +25,7 @@
 #if DUMP_ACPI_TABLES == 1
 static void dump_mem(unsigned start, unsigned end)
 {
 #if DUMP_ACPI_TABLES == 1
 static void dump_mem(unsigned start, unsigned end)
 {

-        
+

        unsigned i;
         print_debug("dump_mem:");
         for(i=start;i<end;i++) {
        unsigned i;
         print_debug("dump_mem:");
         for(i=start;i<end;i++) {


@@ -63,10 +63,10 @@ unsigned long acpi_fill_madt(unsigned long current)
         struct mb_sysconf_t *m;
 
         m = sysconf.mb;
         struct mb_sysconf_t *m;
 
         m = sysconf.mb;

- 
+

        /* create all subtables for processors */
        current = acpi_create_madt_lapics(current);
        /* create all subtables for processors */
        current = acpi_create_madt_lapics(current);

-       
+

        /* Write 8111 IOAPIC */
        current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, m->apicid_8111,
                        IO_APIC_ADDR, 0);
        /* Write 8111 IOAPIC */
        current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, m->apicid_8111,
                        IO_APIC_ADDR, 0);


@@ -102,7 +102,7 @@ unsigned long acpi_fill_madt(unsigned long current)
                        unsigned d = 0;
                         if(!(sysconf.pci1234[i] & 0x1) ) continue;
                         // 8131 need to use +4
                        unsigned d = 0;
                         if(!(sysconf.pci1234[i] & 0x1) ) continue;
                         // 8131 need to use +4

-                       
+

                         switch (sysconf.hcid[i]) {
                         case 1:
                                d = 7;
                         switch (sysconf.hcid[i]) {
                         case 1:
                                d = 7;


@@ -145,7 +145,7 @@ unsigned long acpi_fill_madt(unsigned long current)
                        current, 0, 0, 2, 5 );
                /* 0: mean bus 0--->ISA */
                /* 0: PIC 0 */
                        current, 0, 0, 2, 5 );
                /* 0: mean bus 0--->ISA */
                /* 0: PIC 0 */

-               /* 2: APIC 2 */ 
+               /* 2: APIC 2 */

                /* 5 mean: 0101 --> Edige-triggered, Active high*/
 
 
                /* 5 mean: 0101 --> Edige-triggered, Active high*/
 
 


@@ -185,7 +185,7 @@ unsigned long write_acpi_tables(unsigned long start)
        /* Align ACPI tables to 16byte */
        start   = ( start + 0x0f ) & -0x10;
        current = start;
        /* Align ACPI tables to 16byte */
        start   = ( start + 0x0f ) & -0x10;
        current = start;

-       
+

        printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx...\n", start);
 
        /* We need at least an RSDP and an RSDT Table */
        printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx...\n", start);
 
        /* We need at least an RSDP and an RSDT Table */


@@ -196,7 +196,7 @@ unsigned long write_acpi_tables(unsigned long start)
 
        /* clear all table memory */
        memset((void *)start, 0, current - start);
 
        /* clear all table memory */
        memset((void *)start, 0, current - start);

-       
+

        acpi_write_rsdp(rsdp, rsdt, NULL);
        acpi_write_rsdt(rsdt);
 
        acpi_write_rsdp(rsdp, rsdt, NULL);
        acpi_write_rsdt(rsdt);
 

diff --git a/src/mainboard/iwill/dk8_htx/devicetree.cb b/src/mainboard/iwill/dk8_htx/devicetree.cb
index cfddca953dfbed05aa98540e4f874ab6f4987daa..734a93fe0acb3178e888e4d3dbfe86f430f9db6a 100644 (file)
--- a/src/mainboard/iwill/dk8_htx/devicetree.cb
+++ b/src/mainboard/iwill/dk8_htx/devicetree.cb
@@ -8,7 +8,7 @@ chip northbridge/amd/amdk8/root_complex
                chip northbridge/amd/amdk8
                        device pci 18.0 on end
                        device pci 18.0 on end
                chip northbridge/amd/amdk8
                        device pci 18.0 on end
                        device pci 18.0 on end

-                       device pci 18.0 on #  northbridge 
+                       device pci 18.0 on #  northbridge

                                chip southbridge/amd/amd8131
                                        # the on/off keyword is mandatory
                                        device pci 0.0 on end
                                chip southbridge/amd/amd8131
                                        # the on/off keyword is mandatory
                                        device pci 0.0 on end


@@ -57,7 +57,7 @@ chip northbridge/amd/amdk8/root_complex
                                                                io 0x60 = 0x220
                                                                io 0x62 = 0x300
                                                                irq 0x70 = 9
                                                                io 0x60 = 0x220
                                                                io 0x62 = 0x300
                                                                irq 0x70 = 9

-                                                       end                                             
+                                                       end

                                                        device pnp 2e.8 on #  GPIO2
                                                                io 0x07 = 0x08ff
                                                                io 0x30 = 0x01ff
                                                        device pnp 2e.8 on #  GPIO2
                                                                io 0x07 = 0x08ff
                                                                io 0x30 = 0x01ff

diff --git a/src/mainboard/iwill/dk8_htx/dsdt.asl b/src/mainboard/iwill/dk8_htx/dsdt.asl
index ee87023ff86bd524ae8ea3f20fb1c72dbd5417e9..a549d70297629f22db7ac3896636963f7266a78d 100644 (file)
--- a/src/mainboard/iwill/dk8_htx/dsdt.asl
+++ b/src/mainboard/iwill/dk8_htx/dsdt.asl
@@ -100,11 +100,11 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMD-K8", "AMDACPI", 100925440)
                 Concatenate (\_SB.GMEM (0x00, \_SB.PCI0.SBLK), BUF0, Local1)
                 Concatenate (\_SB.GIOR (0x00, \_SB.PCI0.SBLK), Local1, Local2)
                 Concatenate (\_SB.GWBN (0x00, \_SB.PCI0.SBLK), Local2, Local3)
                 Concatenate (\_SB.GMEM (0x00, \_SB.PCI0.SBLK), BUF0, Local1)
                 Concatenate (\_SB.GIOR (0x00, \_SB.PCI0.SBLK), Local1, Local2)
                 Concatenate (\_SB.GWBN (0x00, \_SB.PCI0.SBLK), Local2, Local3)

-                Return (Local3) 
+                Return (Local3)

            }
 
            #include "acpi/pci0_hc.asl"
            }
 
            #include "acpi/pci0_hc.asl"

-               
+

         }
         Device (PCI1)
         {
         }
         Device (PCI1)
         {


@@ -138,7 +138,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMD-K8", "AMDACPI", 100925440)
             Notify (\_SB.PCI0.PG0B, 0x02)
         }
 
             Notify (\_SB.PCI0.PG0B, 0x02)
         }
 

-        Method (_L29, 0, NotSerialized) // GPIO25 (Suspend) - Pogo 0 Bridge A 
+        Method (_L29, 0, NotSerialized) // GPIO25 (Suspend) - Pogo 0 Bridge A

         {
             Notify (\_SB.PCI0.PG0A, 0x02)
         }
         {
             Notify (\_SB.PCI0.PG0A, 0x02)
         }


@@ -183,14 +183,14 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMD-K8", "AMDACPI", 100925440)
     OperationRegion (GRAM, SystemMemory, 0x0400, 0x0100)
     Field (GRAM, ByteAcc, Lock, Preserve)
     {
     OperationRegion (GRAM, SystemMemory, 0x0400, 0x0100)
     Field (GRAM, ByteAcc, Lock, Preserve)
     {

-        Offset (0x10), 
+        Offset (0x10),

         FLG0,   8
     }
 
     OperationRegion (GSTS, SystemIO, 0xC028, 0x02)
     Field (GSTS, ByteAcc, NoLock, Preserve)
     {
         FLG0,   8
     }
 
     OperationRegion (GSTS, SystemIO, 0xC028, 0x02)
     Field (GSTS, ByteAcc, NoLock, Preserve)
     {

-            ,   4, 
+            ,   4,

         IRQR,   1
     }
 
         IRQR,   1
     }
 

diff --git a/src/mainboard/iwill/dk8_htx/fadt.c b/src/mainboard/iwill/dk8_htx/fadt.c
index d4c66228475716118fcc2af6b599cddfe65651ab..6b6107070b257a681cf3e6bbc215f5b765eb3dfb 100644 (file)
--- a/src/mainboard/iwill/dk8_htx/fadt.c
+++ b/src/mainboard/iwill/dk8_htx/fadt.c
@@ -30,7 +30,7 @@ void acpi_create_fadt(acpi_fadt_t *fadt,acpi_facs_t *facs,void *dsdt){
        // 3=Workstation,4=Enterprise Server, 7=Performance Server
        fadt->preferred_pm_profile=0x03;
        fadt->sci_int=9;
        // 3=Workstation,4=Enterprise Server, 7=Performance Server
        fadt->preferred_pm_profile=0x03;
        fadt->sci_int=9;

-       // disable system management mode by setting to 0: 
+       // disable system management mode by setting to 0:

        fadt->smi_cmd = 0;//pm_base+0x2f;
        fadt->acpi_enable = 0xf0;
        fadt->acpi_disable = 0xf1;
        fadt->smi_cmd = 0;//pm_base+0x2f;
        fadt->acpi_enable = 0xf0;
        fadt->acpi_disable = 0xf1;


@@ -53,7 +53,7 @@ void acpi_create_fadt(acpi_fadt_t *fadt,acpi_facs_t *facs,void *dsdt){
        fadt->gpe0_blk_len =  4;
        fadt->gpe1_blk_len =  8;
        fadt->gpe1_base    = 16;
        fadt->gpe0_blk_len =  4;
        fadt->gpe1_blk_len =  8;
        fadt->gpe1_base    = 16;

-       
+

        fadt->cst_cnt    = 0xe3;
        fadt->p_lvl2_lat =  101;
        fadt->p_lvl3_lat = 1001;
        fadt->cst_cnt    = 0xe3;
        fadt->p_lvl2_lat =  101;
        fadt->p_lvl3_lat = 1001;


@@ -66,7 +66,7 @@ void acpi_create_fadt(acpi_fadt_t *fadt,acpi_facs_t *facs,void *dsdt){
        fadt->century =  0; // 0x7f to make rtc alrm work
        fadt->iapc_boot_arch = 0x3; // See table 5-11
        fadt->flags = 0x25;
        fadt->century =  0; // 0x7f to make rtc alrm work
        fadt->iapc_boot_arch = 0x3; // See table 5-11
        fadt->flags = 0x25;

-       
+

        fadt->res2 = 0;
 
        fadt->reset_reg.space_id = 1;
        fadt->res2 = 0;
 
        fadt->reset_reg.space_id = 1;

diff --git a/src/mainboard/iwill/dk8_htx/get_bus_conf.c b/src/mainboard/iwill/dk8_htx/get_bus_conf.c
index d6141158ac933014f2aa2d88a222243b7ea4f54d..30b9e368abb199e826ccb43bb523cfea9566ffa9 100644 (file)
--- a/src/mainboard/iwill/dk8_htx/get_bus_conf.c
+++ b/src/mainboard/iwill/dk8_htx/get_bus_conf.c
@@ -15,10 +15,10 @@
 // Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
 struct mb_sysconf_t mb_sysconf;
 
 // Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
 struct mb_sysconf_t mb_sysconf;
 

-static unsigned pci1234x[] = 
+static unsigned pci1234x[] =

 {        //Here you only need to set value in pci1234 for HT-IO that could be installed or not
         //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
 {        //Here you only need to set value in pci1234 for HT-IO that could be installed or not
         //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail

-        0x0000ff0, // SB chain m 
+        0x0000ff0, // SB chain m

         0x0000000, // HTX
         0x0000100, // co processor on socket 1
 //        0x0000ff0,
         0x0000000, // HTX
         0x0000100, // co processor on socket 1
 //        0x0000ff0,


@@ -27,7 +27,7 @@ static unsigned pci1234x[] =
 //        0x0000ff0,
 //        0x0000ff0
 };
 //        0x0000ff0,
 //        0x0000ff0
 };

-static unsigned hcdnx[] = 
+static unsigned hcdnx[] =

 { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
        0x20202020,
        0x20202020,
 { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
        0x20202020,
        0x20202020,


@@ -88,17 +88,17 @@ void get_bus_conf(void)
        get_bus_conf_done = 1;
 
        sysconf.mb = &mb_sysconf;
        get_bus_conf_done = 1;
 
        sysconf.mb = &mb_sysconf;

-       
+

        m = sysconf.mb;
 
        m = sysconf.mb;
 

-       sysconf.hc_possible_num = ARRAY_SIZE(pci1234x); 
+       sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);

        for(i=0;i<sysconf.hc_possible_num; i++) {
                sysconf.pci1234[i] = pci1234x[i];
                sysconf.hcdn[i] = hcdnx[i];
        }
        for(i=0;i<sysconf.hc_possible_num; i++) {
                sysconf.pci1234[i] = pci1234x[i];
                sysconf.hcdn[i] = hcdnx[i];
        }

-       
+

        get_sblk_pci1234();
        get_sblk_pci1234();

-       
+

        sysconf.sbdn = (sysconf.hcdn[0] >> 8) & 0xff;
        m->sbdn3 = sysconf.hcdn[0] & 0xff;
 
        sysconf.sbdn = (sysconf.hcdn[0] >> 8) & 0xff;
        m->sbdn3 = sysconf.hcdn[0] & 0xff;
 


@@ -209,8 +209,8 @@ void get_bus_conf(void)
 /*I/O APICs:   APIC ID Version State           Address*/
 #if CONFIG_LOGICAL_CPUS==1
        apicid_base = get_apicid_base(3);
 /*I/O APICs:   APIC ID Version State           Address*/
 #if CONFIG_LOGICAL_CPUS==1
        apicid_base = get_apicid_base(3);

-#else 
-       apicid_base = CONFIG_MAX_PHYSICAL_CPUS; 
+#else
+       apicid_base = CONFIG_MAX_PHYSICAL_CPUS;

 #endif
        m->apicid_8111 = apicid_base+0;
        m->apicid_8132_1 = apicid_base+1;
 #endif
        m->apicid_8111 = apicid_base+0;
        m->apicid_8132_1 = apicid_base+1;

diff --git a/src/mainboard/iwill/dk8_htx/irq_tables.c b/src/mainboard/iwill/dk8_htx/irq_tables.c
index d872b0a0db728b7887f42aec3c709345f480b484..637f980055abaee13df3b4fc588ed0714866db0c 100644 (file)
--- a/src/mainboard/iwill/dk8_htx/irq_tables.c
+++ b/src/mainboard/iwill/dk8_htx/irq_tables.c
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!

    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 
    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 


@@ -13,11 +13,11 @@
 
 #include "mb_sysconf.h"
 
 
 #include "mb_sysconf.h"
 

-static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0, 
+static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,

                uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
                uint8_t slot, uint8_t rfu)
 {
                uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
                uint8_t slot, uint8_t rfu)
 {

-        pirq_info->bus = bus; 
+        pirq_info->bus = bus;

         pirq_info->devfn = devfn;
 
        pirq_info->irq[0].link = link0;
         pirq_info->devfn = devfn;
 
        pirq_info->irq[0].link = link0;


@@ -50,7 +50,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
        struct mb_sysconf_t *m;
 
        get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c
        struct mb_sysconf_t *m;
 
        get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c

-       
+

        m = sysconf.mb;
 
         /* Align the table to be 16 byte aligned. */
        m = sysconf.mb;
 
         /* Align the table to be 16 byte aligned. */


@@ -62,25 +62,25 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 
        pirq = (void *)(addr);
        v = (uint8_t *)(addr);
 
        pirq = (void *)(addr);
        v = (uint8_t *)(addr);

-       
+

        pirq->signature = PIRQ_SIGNATURE;
        pirq->version  = PIRQ_VERSION;
        pirq->signature = PIRQ_SIGNATURE;
        pirq->version  = PIRQ_VERSION;

-       
+

        pirq->rtr_bus = m->bus_8111_0;
        pirq->rtr_devfn = ((sysconf.sbdn+1)<<3)|0;
 
        pirq->exclusive_irqs = 0;
        pirq->rtr_bus = m->bus_8111_0;
        pirq->rtr_devfn = ((sysconf.sbdn+1)<<3)|0;
 
        pirq->exclusive_irqs = 0;

-       
+

        pirq->rtr_vendor = 0x1022;
        pirq->rtr_device = 0x746b;
 
        pirq->miniport_data = 0;
 
        memset(pirq->rfu, 0, sizeof(pirq->rfu));
        pirq->rtr_vendor = 0x1022;
        pirq->rtr_device = 0x746b;
 
        pirq->miniport_data = 0;
 
        memset(pirq->rfu, 0, sizeof(pirq->rfu));

-       
+

        pirq_info = (void *) ( &pirq->checksum + 1);
        slot_num = 0;
        pirq_info = (void *) ( &pirq->checksum + 1);
        slot_num = 0;

-       
+

         {
                 device_t dev;
                 dev = dev_find_slot(m->bus_8111_0, PCI_DEVFN(sysconf.sbdn+1,3));
         {
                 device_t dev;
                 dev = dev_find_slot(m->bus_8111_0, PCI_DEVFN(sysconf.sbdn+1,3));


@@ -126,11 +126,11 @@ unsigned long write_pirq_routing_table(unsigned long addr)
                 j++;
 
         }
                 j++;
 
         }

-       
-       pirq->size = 32 + 16 * slot_num; 
+
+       pirq->size = 32 + 16 * slot_num;

 
         for (i = 0; i < pirq->size; i++)
 
         for (i = 0; i < pirq->size; i++)

-                sum += v[i];   
+                sum += v[i];

 
        sum = pirq->checksum - sum;
 
 
        sum = pirq->checksum - sum;
 

diff --git a/src/mainboard/iwill/dk8_htx/mptable.c b/src/mainboard/iwill/dk8_htx/mptable.c
index 1b0cea02ab0f5391d2da2bc995cf7a0fd6525439..061f3d8ece69b267f3d16c5ee3985ee5b6202372 100644 (file)
--- a/src/mainboard/iwill/dk8_htx/mptable.c
+++ b/src/mainboard/iwill/dk8_htx/mptable.c
@@ -101,8 +101,8 @@ static void *smp_write_config_table(void *v)
                 }
 
        }
                 }
 
        }

-  
-/*I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN# */ 
+
+/*I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN# */

        smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, m->apicid_8111, 0x0);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x1, m->apicid_8111, 0x1);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x0, m->apicid_8111, 0x2);
        smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, m->apicid_8111, 0x0);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x1, m->apicid_8111, 0x1);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x0, m->apicid_8111, 0x2);


@@ -149,14 +149,14 @@ static void *smp_write_config_table(void *v)
 
 //Slot 4 PCI-X 133/100/66
         for(i=0;i<4;i++) {
 
 //Slot 4 PCI-X 133/100/66
         for(i=0;i<4;i++) {

-                smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132_1, (2<<2)|i, m->apicid_8132_1, (2+i)%4); //26 
+                smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132_1, (2<<2)|i, m->apicid_8132_1, (2+i)%4); //26

         }
 
 //Onboard NICS
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132_1, (3<<2)|0, m->apicid_8132_1, 3); //27
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132_1, (4<<2)|0, m->apicid_8132_1, 0); //24
 
         }
 
 //Onboard NICS
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132_1, (3<<2)|0, m->apicid_8132_1, 3); //27
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132_1, (4<<2)|0, m->apicid_8132_1, 0); //24
 

-//Onboard SATA 
+//Onboard SATA

         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132_1, (5<<2)|0, m->apicid_8132_1, 1); //25
 
         j = 0;
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132_1, (5<<2)|0, m->apicid_8132_1, 1); //25
 
         j = 0;

diff --git a/src/mainboard/iwill/dk8_htx/resourcemap.c b/src/mainboard/iwill/dk8_htx/resourcemap.c
index 992510215c8deb0bfb7dfb25c5021abc38c880b3..d60c379669d00f15e581d5d7041c66364960fa97 100644 (file)
--- a/src/mainboard/iwill/dk8_htx/resourcemap.c
+++ b/src/mainboard/iwill/dk8_htx/resourcemap.c
@@ -143,7 +143,7 @@ static void setup_mb_resource_map(void)
                 *         1 = base/limit registers i are read-only
                 * [ 7: 4] Reserved
                 * [31: 8] Memory-Mapped I/O Base Address i (39-16)
                 *         1 = base/limit registers i are read-only
                 * [ 7: 4] Reserved
                 * [31: 8] Memory-Mapped I/O Base Address i (39-16)

-                *         This field defines the upper address bits of a 40bit address 
+                *         This field defines the upper address bits of a 40bit address

                 *         that defines the start of memory-mapped I/O region i
                 */
                PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,
                 *         that defines the start of memory-mapped I/O region i
                 */
                PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,


@@ -199,7 +199,7 @@ static void setup_mb_resource_map(void)
                 * [ 3: 2] Reserved
                 * [ 4: 4] VGA Enable
                 *         0 = VGA matches Disabled
                 * [ 3: 2] Reserved
                 * [ 4: 4] VGA Enable
                 *         0 = VGA matches Disabled

-                *         1 = matches all address < 64K and where A[9:0] is in the 
+                *         1 = matches all address < 64K and where A[9:0] is in the

                 *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
                 * [ 5: 5] ISA Enable
                 *         0 = ISA matches Disabled
                 *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
                 * [ 5: 5] ISA Enable
                 *         0 = ISA matches Disabled


@@ -207,7 +207,7 @@ static void setup_mb_resource_map(void)
                 *             from matching agains this base/limit pair
                 * [11: 6] Reserved
                 * [24:12] PCI I/O Base i
                 *             from matching agains this base/limit pair
                 * [11: 6] Reserved
                 * [24:12] PCI I/O Base i

-                *         This field defines the start of PCI I/O region n 
+                *         This field defines the start of PCI I/O region n

                 * [31:25] Reserved
                 */
                PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000003,
                 * [31:25] Reserved
                 */
                PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000003,


@@ -252,7 +252,7 @@ static void setup_mb_resource_map(void)
                 *         This field defines the highest bus number in configuration regin i
                 */
                PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x06000203, // AMD 8111 on link0 of CPU 0
                 *         This field defines the highest bus number in configuration regin i
                 */
                PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x06000203, // AMD 8111 on link0 of CPU 0

-               PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000000, 
+               PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000000,

                PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x00000000,
                PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000,
        };
                PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x00000000,
                PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000,
        };

diff --git a/src/mainboard/iwill/dk8_htx/romstage.c b/src/mainboard/iwill/dk8_htx/romstage.c
index bddc5be7b056b1bb4a3e716ddd757bcbc4578b3a..af4c7b021cf0c62f4bcbd36e0ff885e696afa338 100644 (file)
--- a/src/mainboard/iwill/dk8_htx/romstage.c
+++ b/src/mainboard/iwill/dk8_htx/romstage.c
@@ -1,7 +1,7 @@
 #define RAMINIT_SYSINFO 1
 #define CACHE_AS_RAM_ADDRESS_DEBUG 0
 
 #define RAMINIT_SYSINFO 1
 #define CACHE_AS_RAM_ADDRESS_DEBUG 0
 

-#define SET_NB_CFG_54 1 
+#define SET_NB_CFG_54 1

 
 //used by raminit
 #define QRANK_DIMM_SUPPORT 1
 
 //used by raminit
 #define QRANK_DIMM_SUPPORT 1


@@ -97,7 +97,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 #include "lib/ramtest.c"
 
  /* tyan does not want the default */
 #include "lib/ramtest.c"
 
  /* tyan does not want the default */

-#include "resourcemap.c" 
+#include "resourcemap.c"

 
 #include "cpu/amd/dualcore/dualcore.c"
 
 
 #include "cpu/amd/dualcore/dualcore.c"
 


@@ -165,21 +165,21 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n");
 
 #if CONFIG_MEM_TRAIN_SEQ == 1
        print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n");
 
 #if CONFIG_MEM_TRAIN_SEQ == 1

-        set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram 
+        set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram

 #endif
        setup_coherent_ht_domain(); // routing table and start other core0
 
        wait_all_core0_started();
 #if CONFIG_LOGICAL_CPUS==1
         // It is said that we should start core1 after all core0 launched
 #endif
        setup_coherent_ht_domain(); // routing table and start other core0
 
        wait_all_core0_started();
 #if CONFIG_LOGICAL_CPUS==1
         // It is said that we should start core1 after all core0 launched

-       /* becase optimize_link_coherent_ht is moved out from setup_coherent_ht_domain, 
+       /* becase optimize_link_coherent_ht is moved out from setup_coherent_ht_domain,

         * So here need to make sure last core0 is started, esp for two way system,
         * So here need to make sure last core0 is started, esp for two way system,

-        * (there may be apic id conflicts in that case) 
+        * (there may be apic id conflicts in that case)

         */
         start_other_cores();
        wait_all_other_cores_started(bsp_apicid);
 #endif
         */
         start_other_cores();
        wait_all_other_cores_started(bsp_apicid);
 #endif

-       
+

        /* it will set up chains and store link pair for optimization later */
         ht_setup_chains_x(sysinfo); // it will init sblnk and sbbusn, nodes, sbdn
 
        /* it will set up chains and store link pair for optimization later */
         ht_setup_chains_x(sysinfo); // it will init sblnk and sbbusn, nodes, sbdn
 


@@ -202,7 +202,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         {
                 msr_t msr;
                        msr=rdmsr(0xc0010042);
         {
                 msr_t msr;
                        msr=rdmsr(0xc0010042);

-                       print_debug("end   msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n"); 
+                       print_debug("end   msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n");

 
         }
 #endif
 
         }
 #endif

diff --git a/src/mainboard/iwill/dk8_htx/ssdt2.asl b/src/mainboard/iwill/dk8_htx/ssdt2.asl
index 582ef97621d6f20ccd8359175ff182768979905d..791454c190959855049289e3b76267d57e995cc0 100644 (file)
--- a/src/mainboard/iwill/dk8_htx/ssdt2.asl
+++ b/src/mainboard/iwill/dk8_htx/ssdt2.asl
@@ -28,16 +28,16 @@ DefinitionBlock ("SSDT2.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440)
 
            // BUS ? Second HT Chain
            Name (HCIN, 0xcc)  // HC2 0x01
 
            // BUS ? Second HT Chain
            Name (HCIN, 0xcc)  // HC2 0x01

-            
+

            Name (_UID,  0xdd)  // HC 0x03
 
            Name (_UID,  0xdd)  // HC 0x03
 

-           Name (_HID, "PNP0A03") 
+           Name (_HID, "PNP0A03")

 
             Method (_ADR, 0, NotSerialized) //Fake bus should be 0
            {
                Return (DADD(GHCN(HCIN), 0x00000000))
            }
 
             Method (_ADR, 0, NotSerialized) //Fake bus should be 0
            {
                Return (DADD(GHCN(HCIN), 0x00000000))
            }

-       
+

             Method (_BBN, 0, NotSerialized)
             {
                 Return (GBUS (GHCN(HCIN), GHCL(HCIN)))
             Method (_BBN, 0, NotSerialized)
             {
                 Return (GBUS (GHCN(HCIN), GHCL(HCIN)))


@@ -45,7 +45,7 @@ DefinitionBlock ("SSDT2.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440)
 
             Method (_STA, 0, NotSerialized)
             {
 
             Method (_STA, 0, NotSerialized)
             {

-                Return (\_SB.GHCE(HCIN)) 
+                Return (\_SB.GHCE(HCIN))

             }
 
             Method (_CRS, 0, NotSerialized)
             }
 
             Method (_CRS, 0, NotSerialized)

diff --git a/src/mainboard/iwill/dk8_htx/ssdt3.asl b/src/mainboard/iwill/dk8_htx/ssdt3.asl
index 583e94574010f5fe584bc16039eb4981cde680da..28fe5f45a3416a74f938f0995f205c837b8b1ac7 100644 (file)
--- a/src/mainboard/iwill/dk8_htx/ssdt3.asl
+++ b/src/mainboard/iwill/dk8_htx/ssdt3.asl
@@ -28,16 +28,16 @@ DefinitionBlock ("SSDT3.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440)
 
            // BUS ? Second HT Chain
            Name (HCIN, 0xcc)  // HC2 0x01
 
            // BUS ? Second HT Chain
            Name (HCIN, 0xcc)  // HC2 0x01

-            
+

            Name (_UID,  0xdd)  // HC 0x03
 
            Name (_UID,  0xdd)  // HC 0x03
 

-           Name (_HID, "PNP0A03") 
+           Name (_HID, "PNP0A03")

 
             Method (_ADR, 0, NotSerialized) //Fake bus should be 0
            {
                Return (DADD(GHCN(HCIN), 0x00000000))
            }
 
             Method (_ADR, 0, NotSerialized) //Fake bus should be 0
            {
                Return (DADD(GHCN(HCIN), 0x00000000))
            }

-       
+

             Method (_BBN, 0, NotSerialized)
             {
                 Return (GBUS (GHCN(HCIN), GHCL(HCIN)))
             Method (_BBN, 0, NotSerialized)
             {
                 Return (GBUS (GHCN(HCIN), GHCL(HCIN)))


@@ -45,7 +45,7 @@ DefinitionBlock ("SSDT3.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440)
 
             Method (_STA, 0, NotSerialized)
             {
 
             Method (_STA, 0, NotSerialized)
             {

-                Return (\_SB.GHCE(HCIN)) 
+                Return (\_SB.GHCE(HCIN))

             }
 
             Method (_CRS, 0, NotSerialized)
             }
 
             Method (_CRS, 0, NotSerialized)

diff --git a/src/mainboard/iwill/dk8_htx/ssdt4.asl b/src/mainboard/iwill/dk8_htx/ssdt4.asl
index fd7224d17ac64488812b47e5bebedaf5a47d2350..93abb7f5200c2e08e64ba68289f4ee39b4082a3d 100644 (file)
--- a/src/mainboard/iwill/dk8_htx/ssdt4.asl
+++ b/src/mainboard/iwill/dk8_htx/ssdt4.asl
@@ -28,16 +28,16 @@ DefinitionBlock ("SSDT4.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440)
 
            // BUS ? Second HT Chain
            Name (HCIN, 0xcc)  // HC2 0x01
 
            // BUS ? Second HT Chain
            Name (HCIN, 0xcc)  // HC2 0x01

-            
+

            Name (_UID,  0xdd)  // HC 0x03
 
            Name (_UID,  0xdd)  // HC 0x03
 

-           Name (_HID, "PNP0A03") 
+           Name (_HID, "PNP0A03")

 
             Method (_ADR, 0, NotSerialized) //Fake bus should be 0
            {
                Return (DADD(GHCN(HCIN), 0x00000000))
            }
 
             Method (_ADR, 0, NotSerialized) //Fake bus should be 0
            {
                Return (DADD(GHCN(HCIN), 0x00000000))
            }

-       
+

             Method (_BBN, 0, NotSerialized)
             {
                 Return (GBUS (GHCN(HCIN), GHCL(HCIN)))
             Method (_BBN, 0, NotSerialized)
             {
                 Return (GBUS (GHCN(HCIN), GHCL(HCIN)))


@@ -45,7 +45,7 @@ DefinitionBlock ("SSDT4.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440)
 
             Method (_STA, 0, NotSerialized)
             {
 
             Method (_STA, 0, NotSerialized)
             {

-                Return (\_SB.GHCE(HCIN)) 
+                Return (\_SB.GHCE(HCIN))

             }
 
             Method (_CRS, 0, NotSerialized)
             }
 
             Method (_CRS, 0, NotSerialized)

diff --git a/src/mainboard/iwill/dk8_htx/ssdt5.asl b/src/mainboard/iwill/dk8_htx/ssdt5.asl
index 759230190209d1b9c5a7e841373c2e93f73f44f9..5910e0fac203471f2b992772ae82ba4a36e64fce 100644 (file)
--- a/src/mainboard/iwill/dk8_htx/ssdt5.asl
+++ b/src/mainboard/iwill/dk8_htx/ssdt5.asl
@@ -28,16 +28,16 @@ DefinitionBlock ("SSDT5.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440)
 
            // BUS ? Second HT Chain
            Name (HCIN, 0xcc)  // HC2 0x01
 
            // BUS ? Second HT Chain
            Name (HCIN, 0xcc)  // HC2 0x01

-            
+

            Name (_UID,  0xdd)  // HC 0x03
 
            Name (_UID,  0xdd)  // HC 0x03
 

-           Name (_HID, "PNP0A03") 
+           Name (_HID, "PNP0A03")

 
             Method (_ADR, 0, NotSerialized) //Fake bus should be 0
            {
                Return (DADD(GHCN(HCIN), 0x00000000))
            }
 
             Method (_ADR, 0, NotSerialized) //Fake bus should be 0
            {
                Return (DADD(GHCN(HCIN), 0x00000000))
            }

-       
+

             Method (_BBN, 0, NotSerialized)
             {
                 Return (GBUS (GHCN(HCIN), GHCL(HCIN)))
             Method (_BBN, 0, NotSerialized)
             {
                 Return (GBUS (GHCN(HCIN), GHCL(HCIN)))


@@ -45,7 +45,7 @@ DefinitionBlock ("SSDT5.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440)
 
             Method (_STA, 0, NotSerialized)
             {
 
             Method (_STA, 0, NotSerialized)
             {

-                Return (\_SB.GHCE(HCIN)) 
+                Return (\_SB.GHCE(HCIN))

             }
 
             Method (_CRS, 0, NotSerialized)
             }
 
             Method (_CRS, 0, NotSerialized)

diff --git a/src/mainboard/iwill/dk8s2/irq_tables.c b/src/mainboard/iwill/dk8s2/irq_tables.c
index 75f1790abd29bbfdcbfa3c1f60a84270a21fa29d..c3928f06ff1330a4b3f908addc893818eb4c8470 100644 (file)
--- a/src/mainboard/iwill/dk8s2/irq_tables.c
+++ b/src/mainboard/iwill/dk8s2/irq_tables.c
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!

    (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
  *
    (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
  *

diff --git a/src/mainboard/iwill/dk8s2/romstage.c b/src/mainboard/iwill/dk8s2/romstage.c
index 8dc9dc0049e283d014d444586c9656be641c525f..9a2fede0614064c192559d8b13e487d2bcb5d014 100644 (file)
--- a/src/mainboard/iwill/dk8s2/romstage.c
+++ b/src/mainboard/iwill/dk8s2/romstage.c
@@ -1,7 +1,7 @@
 #define RAMINIT_SYSINFO 1
 #define CACHE_AS_RAM_ADDRESS_DEBUG 0
 
 #define RAMINIT_SYSINFO 1
 #define CACHE_AS_RAM_ADDRESS_DEBUG 0
 

-#define SET_NB_CFG_54 1 
+#define SET_NB_CFG_54 1

 
 //used by raminit
 #define QRANK_DIMM_SUPPORT 1
 
 //used by raminit
 #define QRANK_DIMM_SUPPORT 1


@@ -165,21 +165,21 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n");
 
 #if CONFIG_MEM_TRAIN_SEQ == 1
        print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n");
 
 #if CONFIG_MEM_TRAIN_SEQ == 1

-        set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram 
+        set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram

 #endif
        setup_coherent_ht_domain(); // routing table and start other core0
 
        wait_all_core0_started();
 #if CONFIG_LOGICAL_CPUS==1
         // It is said that we should start core1 after all core0 launched
 #endif
        setup_coherent_ht_domain(); // routing table and start other core0
 
        wait_all_core0_started();
 #if CONFIG_LOGICAL_CPUS==1
         // It is said that we should start core1 after all core0 launched

-       /* becase optimize_link_coherent_ht is moved out from setup_coherent_ht_domain, 
+       /* becase optimize_link_coherent_ht is moved out from setup_coherent_ht_domain,

         * So here need to make sure last core0 is started, esp for two way system,
         * So here need to make sure last core0 is started, esp for two way system,

-        * (there may be apic id conflicts in that case) 
+        * (there may be apic id conflicts in that case)

         */
         start_other_cores();
        wait_all_other_cores_started(bsp_apicid);
 #endif
         */
         start_other_cores();
        wait_all_other_cores_started(bsp_apicid);
 #endif

-       
+

        /* it will set up chains and store link pair for optimization later */
         ht_setup_chains_x(sysinfo); // it will init sblnk and sbbusn, nodes, sbdn
 
        /* it will set up chains and store link pair for optimization later */
         ht_setup_chains_x(sysinfo); // it will init sblnk and sbbusn, nodes, sbdn
 


@@ -202,7 +202,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         {
                 msr_t msr;
                        msr=rdmsr(0xc0010042);
         {
                 msr_t msr;
                        msr=rdmsr(0xc0010042);

-                       print_debug("end   msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n"); 
+                       print_debug("end   msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n");

 
         }
 #endif
 
         }
 #endif

diff --git a/src/mainboard/iwill/dk8x/devicetree.cb b/src/mainboard/iwill/dk8x/devicetree.cb
index 77c96aa944aa4d453a082cb07c96c0bf85dd7929..a27542575184f1eca59f578c366861957379cb04 100644 (file)
--- a/src/mainboard/iwill/dk8x/devicetree.cb
+++ b/src/mainboard/iwill/dk8x/devicetree.cb
@@ -1,8 +1,8 @@
 chip northbridge/amd/amdk8/root_complex
        device pci_domain 0 on
                chip northbridge/amd/amdk8
 chip northbridge/amd/amdk8/root_complex
        device pci_domain 0 on
                chip northbridge/amd/amdk8

-                       device pci 18.0 on #  northbridge 
-                               #  devices on link 0, link 0 == LDT 0 
+                       device pci 18.0 on #  northbridge
+                               #  devices on link 0, link 0 == LDT 0

                                chip southbridge/amd/amd8131
                                        # the on/off keyword is mandatory
                                        device pci 0.0 on end
                                chip southbridge/amd/amd8131
                                        # the on/off keyword is mandatory
                                        device pci 0.0 on end


@@ -28,15 +28,15 @@ chip northbridge/amd/amdk8/root_complex
                                                        device pnp 2e.4 on end
                                                        device pnp 2e.5 on end
                                                        device pnp 2e.6 on end
                                                        device pnp 2e.4 on end
                                                        device pnp 2e.5 on end
                                                        device pnp 2e.6 on end

-                                                       device pnp 2e.7 on end 
-                                                       device pnp 2e.8 on end 
-                                                       device pnp 2e.9 on end 
-                                                       device pnp 2e.a on end 
+                                                       device pnp 2e.7 on end
+                                                       device pnp 2e.8 on end
+                                                       device pnp 2e.9 on end
+                                                       device pnp 2e.a on end

                                                end
                                        end
                                        device pci 1.1 on end
                                        device pci 1.2 on end
                                                end
                                        end
                                        device pci 1.1 on end
                                        device pci 1.2 on end

-                                       device pci 1.3 on end 
+                                       device pci 1.3 on end

                                        device pci 1.5 off end
                                        device pci 1.6 off end
                                end
                                        device pci 1.5 off end
                                        device pci 1.6 off end
                                end


@@ -55,7 +55,7 @@ chip northbridge/amd/amdk8/root_complex
                        device pci 19.2 on end
                        device pci 19.3 on end
                end
                        device pci 19.2 on end
                        device pci 19.3 on end
                end

-       end 
+       end

        device apic_cluster 0 on
                chip cpu/amd/socket_940
                        device apic 0 on end
        device apic_cluster 0 on
                chip cpu/amd/socket_940
                        device apic 0 on end

diff --git a/src/mainboard/iwill/dk8x/irq_tables.c b/src/mainboard/iwill/dk8x/irq_tables.c
index 1f35cbaef2d1862e9252f1b46b777fea899e3efb..06b9cfb6b5036bae8bfa1de032205be15ddaa56c 100644 (file)
--- a/src/mainboard/iwill/dk8x/irq_tables.c
+++ b/src/mainboard/iwill/dk8x/irq_tables.c
@@ -12,13 +12,13 @@
        {linkc, AVAILABLE_IRQS}, {linkd, AVAILABLE_IRQS}}, slot, 0}
 
 /*  Each IRQ_SLOT entry consists of:
        {linkc, AVAILABLE_IRQS}, {linkd, AVAILABLE_IRQS}}, slot, 0}
 
 /*  Each IRQ_SLOT entry consists of:

- *  bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu  
+ *  bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu

  */
 
 const struct irq_routing_table intel_irq_routing_table = {
        PIRQ_SIGNATURE,         /* u32 signature */
        PIRQ_VERSION,           /* u16 version   */
  */
 
 const struct irq_routing_table intel_irq_routing_table = {
        PIRQ_SIGNATURE,         /* u32 signature */
        PIRQ_VERSION,           /* u16 version   */

-       32+16*CONFIG_IRQ_SLOT_COUNT,    /* there can be total CONFIG_IRQ_SLOT_COUNT 
+       32+16*CONFIG_IRQ_SLOT_COUNT,    /* there can be total CONFIG_IRQ_SLOT_COUNT

                                 * devices on the bus */
        IRQ_ROUTER_BUS,         /* Where the interrupt router lies (bus) */
        IRQ_ROUTER_DEVFN,       /* Where the interrupt router lies (dev) */
                                 * devices on the bus */
        IRQ_ROUTER_BUS,         /* Where the interrupt router lies (bus) */
        IRQ_ROUTER_DEVFN,       /* Where the interrupt router lies (dev) */


@@ -28,7 +28,7 @@ const struct irq_routing_table intel_irq_routing_table = {
        0x00,                   /* Crap (miniport) */
        { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },    /* u8 rfu[11] */
        0x00,                   /*  u8 checksum , mod 256 checksum must give
        0x00,                   /* Crap (miniport) */
        { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },    /* u8 rfu[11] */
        0x00,                   /*  u8 checksum , mod 256 checksum must give

-                                *  zero, will be corrected later 
+                                *  zero, will be corrected later

                                 */
        {
 
                                 */
        {
 

diff --git a/src/mainboard/iwill/dk8x/romstage.c b/src/mainboard/iwill/dk8x/romstage.c
index 8dc9dc0049e283d014d444586c9656be641c525f..9a2fede0614064c192559d8b13e487d2bcb5d014 100644 (file)
--- a/src/mainboard/iwill/dk8x/romstage.c
+++ b/src/mainboard/iwill/dk8x/romstage.c
@@ -1,7 +1,7 @@
 #define RAMINIT_SYSINFO 1
 #define CACHE_AS_RAM_ADDRESS_DEBUG 0
 
 #define RAMINIT_SYSINFO 1
 #define CACHE_AS_RAM_ADDRESS_DEBUG 0
 

-#define SET_NB_CFG_54 1 
+#define SET_NB_CFG_54 1

 
 //used by raminit
 #define QRANK_DIMM_SUPPORT 1
 
 //used by raminit
 #define QRANK_DIMM_SUPPORT 1


@@ -165,21 +165,21 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n");
 
 #if CONFIG_MEM_TRAIN_SEQ == 1
        print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n");
 
 #if CONFIG_MEM_TRAIN_SEQ == 1

-        set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram 
+        set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram

 #endif
        setup_coherent_ht_domain(); // routing table and start other core0
 
        wait_all_core0_started();
 #if CONFIG_LOGICAL_CPUS==1
         // It is said that we should start core1 after all core0 launched
 #endif
        setup_coherent_ht_domain(); // routing table and start other core0
 
        wait_all_core0_started();
 #if CONFIG_LOGICAL_CPUS==1
         // It is said that we should start core1 after all core0 launched

-       /* becase optimize_link_coherent_ht is moved out from setup_coherent_ht_domain, 
+       /* becase optimize_link_coherent_ht is moved out from setup_coherent_ht_domain,

         * So here need to make sure last core0 is started, esp for two way system,
         * So here need to make sure last core0 is started, esp for two way system,

-        * (there may be apic id conflicts in that case) 
+        * (there may be apic id conflicts in that case)

         */
         start_other_cores();
        wait_all_other_cores_started(bsp_apicid);
 #endif
         */
         start_other_cores();
        wait_all_other_cores_started(bsp_apicid);
 #endif

-       
+

        /* it will set up chains and store link pair for optimization later */
         ht_setup_chains_x(sysinfo); // it will init sblnk and sbbusn, nodes, sbdn
 
        /* it will set up chains and store link pair for optimization later */
         ht_setup_chains_x(sysinfo); // it will init sblnk and sbbusn, nodes, sbdn
 


@@ -202,7 +202,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         {
                 msr_t msr;
                        msr=rdmsr(0xc0010042);
         {
                 msr_t msr;
                        msr=rdmsr(0xc0010042);

-                       print_debug("end   msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n"); 
+                       print_debug("end   msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n");

 
         }
 #endif
 
         }
 #endif

diff --git a/src/mainboard/kontron/986lcd-m/acpi/i945_pci_irqs.asl b/src/mainboard/kontron/986lcd-m/acpi/i945_pci_irqs.asl
index a6043867b9b685d7363dac0f5cd03f81b796fb3e..e466658dd44fa70ce72bd5e13c17c1a0cb456fba 100644 (file)
--- a/src/mainboard/kontron/986lcd-m/acpi/i945_pci_irqs.asl
+++ b/src/mainboard/kontron/986lcd-m/acpi/i945_pci_irqs.asl
@@ -17,7 +17,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 

-/* This is board specific information: IRQ routing for the 
+/* This is board specific information: IRQ routing for the

  * i945
  */
 
  * i945
  */
 

diff --git a/src/mainboard/kontron/986lcd-m/acpi/ich7_pci_irqs.asl b/src/mainboard/kontron/986lcd-m/acpi/ich7_pci_irqs.asl
index e86df0f9731060085c2574e9128f75b7890605d2..c108d3f5b23a9599145e8ddb2d5df22f483860bc 100644 (file)
--- a/src/mainboard/kontron/986lcd-m/acpi/ich7_pci_irqs.asl
+++ b/src/mainboard/kontron/986lcd-m/acpi/ich7_pci_irqs.asl
@@ -17,7 +17,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 

-/* This is board specific information: IRQ routing for the 
+/* This is board specific information: IRQ routing for the

  * 0:1e.0 PCI bridge of the ICH7
  */
 
  * 0:1e.0 PCI bridge of the ICH7
  */
 

diff --git a/src/mainboard/kontron/986lcd-m/acpi/platform.asl b/src/mainboard/kontron/986lcd-m/acpi/platform.asl
index 39faa5d72927341b60febb8daabf1eec4699d85b..2e4223c19c14f342a413988e0dce1434165848e9 100644 (file)
--- a/src/mainboard/kontron/986lcd-m/acpi/platform.asl
+++ b/src/mainboard/kontron/986lcd-m/acpi/platform.asl
@@ -42,9 +42,9 @@ Method(TRAP, 1, Serialized)
        Return (SMIF)           // Return value of SMI handler
 }
 
        Return (SMIF)           // Return value of SMI handler
 }
 

-/* The _PIC method is called by the OS to choose between interrupt 
+/* The _PIC method is called by the OS to choose between interrupt

  * routing via the i8259 interrupt controller or the APIC.
  * routing via the i8259 interrupt controller or the APIC.

- * 
+ *

  * _PIC is called with a parameter of 0 for i8259 configuration and
  * with a parameter of 1 for Local Apic/IOAPIC configuration.
  */
  * _PIC is called with a parameter of 0 for i8259 configuration and
  * with a parameter of 1 for Local Apic/IOAPIC configuration.
  */


@@ -74,12 +74,12 @@ Method(_WAK,1)
        // Notify PCI Express slots in case a card
        // was inserted while a sleep state was active.
 
        // Notify PCI Express slots in case a card
        // was inserted while a sleep state was active.
 

-       // Are we going to S3? 
+       // Are we going to S3?

        If (LEqual(Arg0, 3)) {
                // ..
        }
 
        If (LEqual(Arg0, 3)) {
                // ..
        }
 

-       // Are we going to S4? 
+       // Are we going to S4?

        If (LEqual(Arg0, 4)) {
                // ..
        }
        If (LEqual(Arg0, 4)) {
                // ..
        }

diff --git a/src/mainboard/kontron/986lcd-m/acpi/thermal.asl b/src/mainboard/kontron/986lcd-m/acpi/thermal.asl
index ad653bc5fcfd8620c39401d31ca3b323a289d69e..d1774d4756358dc4022ca8a6cd83beb5ec4bad0d 100644 (file)
--- a/src/mainboard/kontron/986lcd-m/acpi/thermal.asl
+++ b/src/mainboard/kontron/986lcd-m/acpi/thermal.asl
@@ -25,7 +25,7 @@ Scope (\_TZ)
        {
 
                // FIXME these could/should be read from the
        {
 
                // FIXME these could/should be read from the

-               // GNVS area, so they can be controlled by 
+               // GNVS area, so they can be controlled by

                // coreboot
                Name(TC1V, 0x04)
                Name(TC2V, 0x03)
                // coreboot
                Name(TC1V, 0x04)
                Name(TC2V, 0x03)

diff --git a/src/mainboard/kontron/986lcd-m/acpi_tables.c b/src/mainboard/kontron/986lcd-m/acpi_tables.c
index 55f02b10c27e17da648e043515ed61663258b41f..6adff9f56bc5ad23a855ebe51514b2ed564f2e2f 100644 (file)
--- a/src/mainboard/kontron/986lcd-m/acpi_tables.c
+++ b/src/mainboard/kontron/986lcd-m/acpi_tables.c
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
 /*
  * This file is part of the coreboot project.

- * 
+ *

  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or modify
  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or modify

diff --git a/src/mainboard/kontron/986lcd-m/chip.h b/src/mainboard/kontron/986lcd-m/chip.h
index 9d7e5968e149fc47ac9033602ba852850b2d266f..800384aca4c12be6da37208dbbb3f84c7a1b2892 100644 (file)
--- a/src/mainboard/kontron/986lcd-m/chip.h
+++ b/src/mainboard/kontron/986lcd-m/chip.h
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
 /*
  * This file is part of the coreboot project.

- * 
+ *

  * Copyright (C) 2007-2008 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or modify
  * Copyright (C) 2007-2008 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or modify

diff --git a/src/mainboard/kontron/986lcd-m/cmos.layout b/src/mainboard/kontron/986lcd-m/cmos.layout
index 18867e514d65cba90b74d0dd12b1346d03ef73fd..2217cb365aa270fca7a331e396be510c84885b11 100644 (file)
--- a/src/mainboard/kontron/986lcd-m/cmos.layout
+++ b/src/mainboard/kontron/986lcd-m/cmos.layout
@@ -102,7 +102,7 @@ entries
 968          1       e       2        ethernet1
 969          1       e       2        ethernet2
 970          1       e       2        ethernet3
 968          1       e       2        ethernet1
 969          1       e       2        ethernet2
 970          1       e       2        ethernet3

- 
+

 #971          13       r       0        unused
 
 # coreboot config options: check sums
 #971          13       r       0        unused
 
 # coreboot config options: check sums

diff --git a/src/mainboard/kontron/986lcd-m/devicetree.cb b/src/mainboard/kontron/986lcd-m/devicetree.cb
index f1f771ad72d02e8b41319763072f15cb82492613..f4e6b9318a7fa4b37cde1bb525e07c418fe04526 100644 (file)
--- a/src/mainboard/kontron/986lcd-m/devicetree.cb
+++ b/src/mainboard/kontron/986lcd-m/devicetree.cb
@@ -6,7 +6,7 @@ chip northbridge/intel/i945
                 end
         end
 
                 end
         end
 

-        device pci_domain 0 on 
+        device pci_domain 0 on

                 device pci 00.0 on end # host bridge
                device pci 01.0 off end # i945 PCIe root port
                device pci 02.0 on end # vga controller
                 device pci 00.0 on end # host bridge
                device pci 01.0 off end # i945 PCIe root port
                device pci 02.0 on end # vga controller


@@ -46,7 +46,7 @@ chip northbridge/intel/i945
                        device pci 1d.3 on end # USB UHCI
                        device pci 1d.7 on end # USB2 EHCI
                        device pci 1e.0 on end # PCI bridge
                        device pci 1d.3 on end # USB UHCI
                        device pci 1d.7 on end # USB2 EHCI
                        device pci 1e.0 on end # PCI bridge

-                       #device pci 1e.2 off end # AC'97 Audio 
+                       #device pci 1e.2 off end # AC'97 Audio

                        #device pci 1e.3 off end # AC'97 Modem
                         device pci 1f.0 on # LPC bridge
                                 chip superio/winbond/w83627thg
                        #device pci 1e.3 off end # AC'97 Modem
                         device pci 1f.0 on # LPC bridge
                                 chip superio/winbond/w83627thg

diff --git a/src/mainboard/kontron/986lcd-m/dsdt.asl b/src/mainboard/kontron/986lcd-m/dsdt.asl
index 653cd5b266ab0f36b080a6c29aad5ee705da6d89..f06b225fe02e5e2741fb774dd4e91d263935bb72 100644 (file)
--- a/src/mainboard/kontron/986lcd-m/dsdt.asl
+++ b/src/mainboard/kontron/986lcd-m/dsdt.asl
@@ -34,7 +34,7 @@ DefinitionBlock(
 
        // General Purpose Events
        //#include "acpi/gpe.asl"
 
        // General Purpose Events
        //#include "acpi/gpe.asl"

-       
+

        //#include "acpi/thermal.asl"
 
        Scope (\_SB) {
        //#include "acpi/thermal.asl"
 
        Scope (\_SB) {

diff --git a/src/mainboard/kontron/986lcd-m/mainboard.c b/src/mainboard/kontron/986lcd-m/mainboard.c
index c7f2ee00e443a1babfc66ba10daa88bd759cb344..28d6de18e166301bc44771d7e4bb3413149db20c 100644 (file)
--- a/src/mainboard/kontron/986lcd-m/mainboard.c
+++ b/src/mainboard/kontron/986lcd-m/mainboard.c
@@ -104,7 +104,7 @@ struct fan_speed {
        u16 fan_speed;
 };
 
        u16 fan_speed;
 };
 

-// FANIN Target Speed Register 
+// FANIN Target Speed Register

 // FANIN = 337500 / RPM
 struct fan_speed fan_speeds[] = {
        { 0x3c, 5625 }, { 0x41, 5192 }, { 0x47, 4753 }, { 0x4e, 4326 },
 // FANIN = 337500 / RPM
 struct fan_speed fan_speeds[] = {
        { 0x3c, 5625 }, { 0x41, 5192 }, { 0x47, 4753 }, { 0x4e, 4326 },


@@ -119,7 +119,7 @@ struct temperature {
 };
 
 struct temperature temperatures[] = {
 };
 
 struct temperature temperatures[] = {

-       { 30,  86 }, { 33,  91 }, { 36,  96 }, { 39, 102 }, 
+       { 30,  86 }, { 33,  91 }, { 36,  96 }, { 39, 102 },

        { 42, 107 }, { 45, 113 }, { 48, 118 }, { 51, 123 },
        { 54, 129 }, { 57, 134 }, { 60, 140 }, { 63, 145 },
        { 66, 150 }, { 69, 156 }, { 72, 161 }, { 75, 167 }
        { 42, 107 }, { 45, 113 }, { 48, 118 }, { 51, 123 },
        { 54, 129 }, { 57, 134 }, { 60, 140 }, { 63, 145 },
        { 66, 150 }, { 69, 156 }, { 72, 161 }, { 75, 167 }


@@ -144,7 +144,7 @@ static void hwm_setup(void)
                sysfan_speed = FAN_SPEED_5625;
        //if (get_option(&sysfan_temperature, "sysfan_temperature") < 0)
        //      sysfan_temperature = FAN_TEMPERATURE_30DEGC;
                sysfan_speed = FAN_SPEED_5625;
        //if (get_option(&sysfan_temperature, "sysfan_temperature") < 0)
        //      sysfan_temperature = FAN_TEMPERATURE_30DEGC;

-       
+

        // hwm_write(0x31, 0x20); // AVCC high limit
        // hwm_write(0x34, 0x06); // VIN2 low limit
 
        // hwm_write(0x31, 0x20); // AVCC high limit
        // hwm_write(0x34, 0x06); // VIN2 low limit
 


@@ -223,10 +223,10 @@ static void verb_setup(void)
        cim_verb_data_size = 0;
 }
 
        cim_verb_data_size = 0;
 }
 

-// mainboard_enable is executed as first thing after 
+// mainboard_enable is executed as first thing after

 // enumerate_buses().
 
 // enumerate_buses().
 

-static void mainboard_enable(device_t dev) 
+static void mainboard_enable(device_t dev)

 {
 #if CONFIG_PCI_OPTION_ROM_RUN_YABEL
        /* Install custom int15 handler for VGA OPROM */
 {
 #if CONFIG_PCI_OPTION_ROM_RUN_YABEL
        /* Install custom int15 handler for VGA OPROM */

diff --git a/src/mainboard/kontron/986lcd-m/mainboard_smi.c b/src/mainboard/kontron/986lcd-m/mainboard_smi.c
index 6e4b5ad8d1d5c18d8cb46e5b4a080837a51eacbc..1aac802f2e571af25e40306689567877dbd9ccc9 100644 (file)
--- a/src/mainboard/kontron/986lcd-m/mainboard_smi.c
+++ b/src/mainboard/kontron/986lcd-m/mainboard_smi.c
@@ -23,7 +23,7 @@
 #include <cpu/x86/smm.h>
 #include "../../../southbridge/intel/i82801gx/i82801gx_nvs.h"
 
 #include <cpu/x86/smm.h>
 #include "../../../southbridge/intel/i82801gx/i82801gx_nvs.h"
 

-/* The southbridge SMI handler checks whether gnvs has a 
+/* The southbridge SMI handler checks whether gnvs has a

  * valid pointer before calling the trap handler
  */
 extern global_nvs_t *gnvs;
  * valid pointer before calling the trap handler
  */
 extern global_nvs_t *gnvs;

diff --git a/src/mainboard/kontron/986lcd-m/mptable.c b/src/mainboard/kontron/986lcd-m/mptable.c
index dbf36bd51c0135ce4b800c7eb73e1978cf96cd83..28c506f132fc3e796b2361e621b3816382898c30 100644 (file)
--- a/src/mainboard/kontron/986lcd-m/mptable.c
+++ b/src/mainboard/kontron/986lcd-m/mptable.c
@@ -90,7 +90,7 @@ static void *smp_write_config_table(void *v)
 
        /* Legacy Interrupts */
 
 
        /* Legacy Interrupts */
 

-       /* I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN# */ 
+       /* I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN# */

        smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, ioapic_id, 0x0);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x1, ioapic_id, 0x1);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, ioapic_id, 0x2);
        smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, ioapic_id, 0x0);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x1, ioapic_id, 0x1);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, ioapic_id, 0x2);


@@ -158,11 +158,11 @@ static void *smp_write_config_table(void *v)
        return smp_next_mpe_entry(mc);
 }
 
        return smp_next_mpe_entry(mc);
 }
 

-/* MP table generation in coreboot is not very well designed; 
- * One of the issues is that it knows nothing about Virtual 
+/* MP table generation in coreboot is not very well designed;
+ * One of the issues is that it knows nothing about Virtual

  * Wire mode, which everyone uses since a decade or so. This
  * function fixes up our floating table. This spares us doing
  * Wire mode, which everyone uses since a decade or so. This
  * function fixes up our floating table. This spares us doing

- * a half-baked fix of adding a new parameter to 200+ calls 
+ * a half-baked fix of adding a new parameter to 200+ calls

  * to smp_write_floating_table()
  */
 static void fixup_virtual_wire(void *v)
  * to smp_write_floating_table()
  */
 static void fixup_virtual_wire(void *v)

diff --git a/src/mainboard/kontron/986lcd-m/romstage.c b/src/mainboard/kontron/986lcd-m/romstage.c
index d29b23bde7e07dae635a03860e24a18ee380aa64..5c7724828e8103b1d3b22859be3f11988ea53f82 100644 (file)
--- a/src/mainboard/kontron/986lcd-m/romstage.c
+++ b/src/mainboard/kontron/986lcd-m/romstage.c
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
 /*
  * This file is part of the coreboot project.

- * 
+ *

  * Copyright (C) 2007-2010 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or modify
  * Copyright (C) 2007-2010 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or modify


@@ -21,7 +21,7 @@
 
 /* Configuration of the i945 driver */
 #define CHIPSET_I945GM 1
 
 /* Configuration of the i945 driver */
 #define CHIPSET_I945GM 1

-/* Usually system firmware turns off system memory clock signals to 
+/* Usually system firmware turns off system memory clock signals to

  * unused SO-DIMM slots to reduce EMI and power consumption.
  * However, the Kontron 986LCD-M does not like unused clock signals to
  * be disabled. If other similar mainboard occur, it would make sense
  * unused SO-DIMM slots to reduce EMI and power consumption.
  * However, the Kontron 986LCD-M does not like unused clock signals to
  * be disabled. If other similar mainboard occur, it would make sense


@@ -107,7 +107,7 @@ static void ich7_enable_lpc(void)
        pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x88, 0x000403e9);
        // COM4 decode
        pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x8c, 0x000402e9);
        pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x88, 0x000403e9);
        // COM4 decode
        pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x8c, 0x000402e9);

-       // io 0x300 decode 
+       // io 0x300 decode

        pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x90, 0x00000301);
 }
 
        pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x90, 0x00000301);
 }
 


@@ -119,7 +119,7 @@ static void ich7_enable_lpc(void)
 static void early_superio_config_w83627thg(void)
 {
        device_t dev;
 static void early_superio_config_w83627thg(void)
 {
        device_t dev;

-       
+

        dev=PNP_DEV(0x2e, W83627THG_SP1);
        pnp_enter_ext_func_mode(dev);
 
        dev=PNP_DEV(0x2e, W83627THG_SP1);
        pnp_enter_ext_func_mode(dev);
 


@@ -194,7 +194,7 @@ static void early_superio_config_w83627thg(void)
        pnp_set_irq(dev, PNP_IDX_IRQ0, 11);
        pnp_set_enable(dev, 1);
 
        pnp_set_irq(dev, PNP_IDX_IRQ0, 11);
        pnp_set_enable(dev, 1);
 

-       dev=PNP_DEV(0x4e, W83627THG_SP2); 
+       dev=PNP_DEV(0x4e, W83627THG_SP2);

        pnp_set_logical_device(dev); // Set COM4 to sane non-conflicting values
        pnp_set_enable(dev, 0);
        pnp_set_iobase(dev, PNP_IDX_IO0, 0x2e8);
        pnp_set_logical_device(dev); // Set COM4 to sane non-conflicting values
        pnp_set_enable(dev, 0);
        pnp_set_iobase(dev, PNP_IDX_IO0, 0x2e8);


@@ -249,7 +249,7 @@ static void rcba_config(void)
         * would essentially disable all three ethernet ports of the mainboard.
         * It's possible to rename the ports to achieve compatibility to the
         * PCI spec but this will confuse all (static!) tables containing
         * would essentially disable all three ethernet ports of the mainboard.
         * It's possible to rename the ports to achieve compatibility to the
         * PCI spec but this will confuse all (static!) tables containing

-        * interrupt routing information. 
+        * interrupt routing information.

         * To avoid this, we enable (unused) port 6 and swap it with port 1
         * in the case that ethernet port 1 is disabled. Since no devices
         * are connected to that port, we don't have to worry about interrupt
         * To avoid this, we enable (unused) port 6 and swap it with port 1
         * in the case that ethernet port 1 is disabled. Since no devices
         * are connected to that port, we don't have to worry about interrupt


@@ -413,7 +413,7 @@ void main(unsigned long bist)
 
        /* Enable SPD ROMs and DDR-II DRAM */
        enable_smbus();
 
        /* Enable SPD ROMs and DDR-II DRAM */
        enable_smbus();

-       
+

 #if CONFIG_DEFAULT_CONSOLE_LOGLEVEL > 8
        dump_spd_registers();
 #endif
 #if CONFIG_DEFAULT_CONSOLE_LOGLEVEL > 8
        dump_spd_registers();
 #endif


@@ -423,8 +423,8 @@ void main(unsigned long bist)
        /* Perform some initialization that must run before stage2 */
        early_ich7_init();
 
        /* Perform some initialization that must run before stage2 */
        early_ich7_init();
 

-       /* This should probably go away. Until now it is required 
-        * and mainboard specific 
+       /* This should probably go away. Until now it is required
+        * and mainboard specific

         */
        rcba_config();
 
         */
        rcba_config();
 


@@ -470,7 +470,7 @@ void main(unsigned long bist)
                 * memory completely, but that's a wonderful clean up task for another
                 * day.
                 */
                 * memory completely, but that's a wonderful clean up task for another
                 * day.
                 */

-               if (resume_backup_memory) 
+               if (resume_backup_memory)

                        memcpy(resume_backup_memory, (void *)CONFIG_RAMBASE, HIGH_MEMORY_SAVE);
 
                /* Magic for S3 resume */
                        memcpy(resume_backup_memory, (void *)CONFIG_RAMBASE, HIGH_MEMORY_SAVE);
 
                /* Magic for S3 resume */

diff --git a/src/mainboard/kontron/986lcd-m/rtl8168.c b/src/mainboard/kontron/986lcd-m/rtl8168.c
index e278bcfb4eaf76d0c5f65bea2a3050774b79e603..04fd56ccb18f0e71f84969e5b5531e9396c9107d 100644 (file)
--- a/src/mainboard/kontron/986lcd-m/rtl8168.c
+++ b/src/mainboard/kontron/986lcd-m/rtl8168.c
@@ -28,7 +28,7 @@
 static void nic_init(struct device *dev)
 {
        printk(BIOS_DEBUG, "Initializing RTL8168 Gigabit Ethernet\n");
 static void nic_init(struct device *dev)
 {
        printk(BIOS_DEBUG, "Initializing RTL8168 Gigabit Ethernet\n");

-       // Nothing to do yet, but this has to be here to keep 
+       // Nothing to do yet, but this has to be here to keep

        // coreboot from trying to execute an option ROM.
 }
 
        // coreboot from trying to execute an option ROM.
 }
 

diff --git a/src/mainboard/kontron/kt690/acpi/routing.asl b/src/mainboard/kontron/kt690/acpi/routing.asl
index 4b6b111f05c993032ce2ff1815467faa42766d08..231512031030fc515dce24013d6145ea75407c9a 100644 (file)
--- a/src/mainboard/kontron/kt690/acpi/routing.asl
+++ b/src/mainboard/kontron/kt690/acpi/routing.asl
@@ -92,38 +92,38 @@ Scope(\_SB) {
                /* Bus 0, Dev 0 - RS690 Host Controller */
                /* Bus 0, Dev 1 - PCI Bridge for Internal Graphics */
                /* Bus 0, Dev 2 - PCIe Bridge for x8 PCIe Slot (GFX0) */
                /* Bus 0, Dev 0 - RS690 Host Controller */
                /* Bus 0, Dev 1 - PCI Bridge for Internal Graphics */
                /* Bus 0, Dev 2 - PCIe Bridge for x8 PCIe Slot (GFX0) */

-               Package(){ 0x0002FFFF, 0, 0, 18 }, 
-               Package(){ 0x0002FFFF, 1, 0, 19 }, 
-               Package(){ 0x0002FFFF, 2, 0, 16 }, 
-               Package(){ 0x0002FFFF, 3, 0, 17 }, 
+               Package(){ 0x0002FFFF, 0, 0, 18 },
+               Package(){ 0x0002FFFF, 1, 0, 19 },
+               Package(){ 0x0002FFFF, 2, 0, 16 },
+               Package(){ 0x0002FFFF, 3, 0, 17 },

 
                /* Bus 0, Dev 3 - PCIe graphics port 1 bridge */
 
                /* Bus 0, Dev 3 - PCIe graphics port 1 bridge */

-               Package(){ 0x0003FFFF, 0, 0, 19 }, 
-               Package(){ 0x0003FFFF, 1, 0, 16 }, 
-               Package(){ 0x0003FFFF, 2, 0, 17 }, 
-               Package(){ 0x0003FFFF, 3, 0, 18 }, 
-       
+               Package(){ 0x0003FFFF, 0, 0, 19 },
+               Package(){ 0x0003FFFF, 1, 0, 16 },
+               Package(){ 0x0003FFFF, 2, 0, 17 },
+               Package(){ 0x0003FFFF, 3, 0, 18 },
+

                /* Bus 0, Dev 4 - PCIe Bridge for Express Card Slot */
                /* Bus 0, Dev 4 - PCIe Bridge for Express Card Slot */

-               Package(){ 0x0004FFFF, 0, 0, 16 }, 
-               Package(){ 0x0004FFFF, 1, 0, 17 }, 
-               Package(){ 0x0004FFFF, 2, 0, 18 }, 
-               Package(){ 0x0004FFFF, 3, 0, 19 }, 
+               Package(){ 0x0004FFFF, 0, 0, 16 },
+               Package(){ 0x0004FFFF, 1, 0, 17 },
+               Package(){ 0x0004FFFF, 2, 0, 18 },
+               Package(){ 0x0004FFFF, 3, 0, 19 },

 
                /* Bus 0, Dev 5 - General purpose PCIe bridge 5 */
 
                /* Bus 0, Dev 5 - General purpose PCIe bridge 5 */

-               Package(){ 0x0005FFFF, 0, 0, 17 }, 
-               Package(){ 0x0005FFFF, 1, 0, 18 }, 
-               Package(){ 0x0005FFFF, 2, 0, 19 }, 
-               Package(){ 0x0005FFFF, 3, 0, 16 }, 
+               Package(){ 0x0005FFFF, 0, 0, 17 },
+               Package(){ 0x0005FFFF, 1, 0, 18 },
+               Package(){ 0x0005FFFF, 2, 0, 19 },
+               Package(){ 0x0005FFFF, 3, 0, 16 },

 
                /* Bus 0, Dev 6 - General purpose PCIe bridge 6 */
 
                /* Bus 0, Dev 6 - General purpose PCIe bridge 6 */

-               Package(){ 0x0006FFFF, 0, 0, 18 }, 
-               Package(){ 0x0006FFFF, 1, 0, 19 }, 
-               Package(){ 0x0006FFFF, 2, 0, 16 }, 
-               Package(){ 0x0006FFFF, 3, 0, 17 }, 
+               Package(){ 0x0006FFFF, 0, 0, 18 },
+               Package(){ 0x0006FFFF, 1, 0, 19 },
+               Package(){ 0x0006FFFF, 2, 0, 16 },
+               Package(){ 0x0006FFFF, 3, 0, 17 },

 
                /* Bus 0, Dev 7 - PCIe Bridge for network card */
 
                /* Bus 0, Dev 7 - PCIe Bridge for network card */

-               Package(){ 0x0007FFFF, 0, 0, 19 }, 
-               Package(){ 0x0007FFFF, 1, 0, 16 }, 
+               Package(){ 0x0007FFFF, 0, 0, 19 },
+               Package(){ 0x0007FFFF, 1, 0, 16 },

                Package(){ 0x0007FFFF, 2, 0, 17 },
                Package(){ 0x0007FFFF, 3, 0, 18 },
 
                Package(){ 0x0007FFFF, 2, 0, 17 },
                Package(){ 0x0007FFFF, 3, 0, 18 },
 

diff --git a/src/mainboard/lippert/Kconfig b/src/mainboard/lippert/Kconfig
index 82c0b282e3c0eef0eb7a8fb6d839e497148bd523..792a1430b775d2521b0696255c2f070100ce8182 100644 (file)
--- a/src/mainboard/lippert/Kconfig
+++ b/src/mainboard/lippert/Kconfig
@@ -1,7 +1,7 @@
 choice
        prompt "Mainboard model"
        depends on VENDOR_LIPPERT
 choice
        prompt "Mainboard model"
        depends on VENDOR_LIPPERT

-        
+

 source "src/mainboard/lippert/frontrunner/Kconfig"
 source "src/mainboard/lippert/roadrunner-lx/Kconfig"
 source "src/mainboard/lippert/spacerunner-lx/Kconfig"
 source "src/mainboard/lippert/frontrunner/Kconfig"
 source "src/mainboard/lippert/roadrunner-lx/Kconfig"
 source "src/mainboard/lippert/spacerunner-lx/Kconfig"

diff --git a/src/mainboard/lippert/frontrunner/devicetree.cb b/src/mainboard/lippert/frontrunner/devicetree.cb
index 28c6af67a19536436241d9dd013f54bcbda5be8f..1386de9d77243ec4d597403ce2d2bf19f38c9c4c 100644 (file)
--- a/src/mainboard/lippert/frontrunner/devicetree.cb
+++ b/src/mainboard/lippert/frontrunner/devicetree.cb
@@ -1,7 +1,7 @@
 chip northbridge/amd/gx2
   register "setupflash" = "0"
   #register "irqmap" = "0xaa5b"
 chip northbridge/amd/gx2
   register "setupflash" = "0"
   #register "irqmap" = "0xaa5b"

-  device pci_domain 0 on 
+  device pci_domain 0 on

     device pci 0.0 on end
       chip southbridge/amd/cs5535
         device pci 12.0 on
     device pci 0.0 on end
       chip southbridge/amd/cs5535
         device pci 12.0 on

diff --git a/src/mainboard/lippert/frontrunner/irq_tables.c b/src/mainboard/lippert/frontrunner/irq_tables.c
index 598350b4b82c4624ab0f6ac37e737c2e127676c4..f751b481caa460bd622533b6579ecdd07ce7435d 100644 (file)
--- a/src/mainboard/lippert/frontrunner/irq_tables.c
+++ b/src/mainboard/lippert/frontrunner/irq_tables.c
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!

    (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
  *
    (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
  *

diff --git a/src/mainboard/lippert/frontrunner/romstage.c b/src/mainboard/lippert/frontrunner/romstage.c
index 4c3f615da03670bf621f4acace42b856fd246c43..87337a2be9bb540b6ea5dc774a12edc99612ddb9 100644 (file)
--- a/src/mainboard/lippert/frontrunner/romstage.c
+++ b/src/mainboard/lippert/frontrunner/romstage.c
@@ -19,7 +19,7 @@
 #include "northbridge/amd/gx2/raminit.h"
 
 /* this has to be done on a per-mainboard basis, esp. if you don't have smbus */
 #include "northbridge/amd/gx2/raminit.h"
 
 /* this has to be done on a per-mainboard basis, esp. if you don't have smbus */

-static void sdram_set_spd_registers(const struct mem_controller *ctrl) 
+static void sdram_set_spd_registers(const struct mem_controller *ctrl)

 {
        msr_t msr;
        /* 1. Initialize GLMC registers base on SPD values,
 {
        msr_t msr;
        /* 1. Initialize GLMC registers base on SPD values,

diff --git a/src/mainboard/mitac/Kconfig b/src/mainboard/mitac/Kconfig
index a02f150f9dddc612aebe5ee1b796af9fa8cee942..34cb1de7aabc905ebc0f0215cc39fac395ea32a7 100644 (file)
--- a/src/mainboard/mitac/Kconfig
+++ b/src/mainboard/mitac/Kconfig
@@ -21,7 +21,7 @@
 choice
        prompt "Mainboard model"
        depends on VENDOR_MITAC
 choice
        prompt "Mainboard model"
        depends on VENDOR_MITAC

-       
+

 source "src/mainboard/mitac/6513wu/Kconfig"
 
 endchoice
 source "src/mainboard/mitac/6513wu/Kconfig"
 
 endchoice

diff --git a/src/mainboard/msi/Kconfig b/src/mainboard/msi/Kconfig
index 7377da7f65995db42ea829ca3f5bc530fdf0cd36..fd836987e3238927386c02fad9a8d80e23fca4fa 100644 (file)
--- a/src/mainboard/msi/Kconfig
+++ b/src/mainboard/msi/Kconfig
@@ -21,7 +21,7 @@
 choice
        prompt "Mainboard model"
        depends on VENDOR_MSI
 choice
        prompt "Mainboard model"
        depends on VENDOR_MSI

-       
+

 source "src/mainboard/msi/ms6119/Kconfig"
 source "src/mainboard/msi/ms6147/Kconfig"
 source "src/mainboard/msi/ms6156/Kconfig"
 source "src/mainboard/msi/ms6119/Kconfig"
 source "src/mainboard/msi/ms6147/Kconfig"
 source "src/mainboard/msi/ms6156/Kconfig"

diff --git a/src/mainboard/msi/ms6147/irq_tables.c b/src/mainboard/msi/ms6147/irq_tables.c
index b3cd1194a6afad200f0287b25b46dcc316ed0813..d41e9b7115f1189c02521c1a342922b49582f437 100644 (file)
--- a/src/mainboard/msi/ms6147/irq_tables.c
+++ b/src/mainboard/msi/ms6147/irq_tables.c
@@ -35,7 +35,7 @@ const struct irq_routing_table intel_irq_routing_table = {
        {
                /* bus,     dev|fn,   {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap},  slot, rfu */
                {0x00,(0x0e<<3)|0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0x0deb8}}, 0x1, 0x0},
        {
                /* bus,     dev|fn,   {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap},  slot, rfu */
                {0x00,(0x0e<<3)|0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0x0deb8}}, 0x1, 0x0},

-               {0x00,(0x10<<3)|0x0, {{0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0x0deb8}}, 0x2, 0x0}, 
+               {0x00,(0x10<<3)|0x0, {{0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0x0deb8}}, 0x2, 0x0},

                {0x00,(0x12<<3)|0x0, {{0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0x0deb8}}, 0x3, 0x0},
                {0x00,(0x14<<3)|0x0, {{0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0x0deb8}}, 0x4, 0x0},
                {0x00,(0x00<<3)|0x0, {{0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0}, /* North bridge */
                {0x00,(0x12<<3)|0x0, {{0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0x0deb8}}, 0x3, 0x0},
                {0x00,(0x14<<3)|0x0, {{0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0x0deb8}}, 0x4, 0x0},
                {0x00,(0x00<<3)|0x0, {{0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0}, /* North bridge */

diff --git a/src/mainboard/msi/ms7135/get_bus_conf.c b/src/mainboard/msi/ms7135/get_bus_conf.c
index ae7a7f1a03bca24a423a6871646c708594cf7e24..6ccd97587d9d39e005288f4d73f31bc984e91f34 100644 (file)
--- a/src/mainboard/msi/ms7135/get_bus_conf.c
+++ b/src/mainboard/msi/ms7135/get_bus_conf.c
@@ -47,7 +47,7 @@ unsigned pci1234x[] = {               //Here you only need to set value in pci1234 for HT-IO
        0x0000ff0,              //no HTIO for ms7135
 };
 unsigned hcdnx[] = {           //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
        0x0000ff0,              //no HTIO for ms7135
 };
 unsigned hcdnx[] = {           //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most

-       0x20202020,             //ms7135 has only one ht-chain 
+       0x20202020,             //ms7135 has only one ht-chain

 };
 unsigned bus_type[256];
 
 };
 unsigned bus_type[256];
 


@@ -100,7 +100,7 @@ void get_bus_conf(void)
                switch (i) {
                        case 1: dn = 9; break;
                        case 2: dn = 13; break;
                switch (i) {
                        case 1: dn = 9; break;
                        case 2: dn = 13; break;

-                       case 3: dn = 14; break; 
+                       case 3: dn = 14; break;

                        default: dn = -1; break;
                }
                dev = dev_find_slot(bus_ck804[0], PCI_DEVFN(sbdn + dn, 0));
                        default: dn = -1; break;
                }
                dev = dev_find_slot(bus_ck804[0], PCI_DEVFN(sbdn + dn, 0));

diff --git a/src/mainboard/msi/ms7135/irq_tables.c b/src/mainboard/msi/ms7135/irq_tables.c
index f43af44bf55114f392144533324681e744bbb197..e4a717ba72443b826331b0cca9e952467f9948f3 100644 (file)
--- a/src/mainboard/msi/ms7135/irq_tables.c
+++ b/src/mainboard/msi/ms7135/irq_tables.c
@@ -78,7 +78,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
        int i;
        unsigned sbdn;
 
        int i;
        unsigned sbdn;
 

-       /* get_bus_conf() will find out all bus num and apic that share with 
+       /* get_bus_conf() will find out all bus num and apic that share with

         * mptable.c and mptable.c
         */
        get_bus_conf();
         * mptable.c and mptable.c
         */
        get_bus_conf();


@@ -112,7 +112,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
        pirq_info = (void *)(&pirq->checksum + 1);
        slot_num = 0;
 
        pirq_info = (void *)(&pirq->checksum + 1);
        slot_num = 0;
 

-//Slot1 PCIE 16x 
+//Slot1 PCIE 16x

        write_pirq_info(pirq_info, bus_ck804[1], (0 << 3) | 0, 0x3, 0xdeb8, 0x4,
                        0xdeb8, 0x1, 0xdeb8, 0x2, 0xdeb8, 4, 0);
        pirq_info++;
        write_pirq_info(pirq_info, bus_ck804[1], (0 << 3) | 0, 0x3, 0xdeb8, 0x4,
                        0xdeb8, 0x1, 0xdeb8, 0x2, 0xdeb8, 4, 0);
        pirq_info++;


@@ -130,7 +130,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
        pirq_info++;
        slot_num++;
 
        pirq_info++;
        slot_num++;
 

-//Slot4 PCIE 4x 
+//Slot4 PCIE 4x

        write_pirq_info(pirq_info, bus_ck804[4], (0x4 << 3) | 0,
                        0x2, 0xdeb8, 0x3, 0xdeb8, 0x4, 0xdeb8, 0x1, 0xdeb8,
                        7, 0);
        write_pirq_info(pirq_info, bus_ck804[4], (0x4 << 3) | 0,
                        0x2, 0xdeb8, 0x3, 0xdeb8, 0x4, 0xdeb8, 0x1, 0xdeb8,
                        7, 0);


@@ -229,7 +229,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
        irq[0] = 10; /* Ethernet */
        pci_assign_irqs(bus_ck804[0], 10, irq);
 
        irq[0] = 10; /* Ethernet */
        pci_assign_irqs(bus_ck804[0], 10, irq);
 

-       
+

        /* physical slots */
 
        irq[0] = 5; /* PCI E1 - x1 */
        /* physical slots */
 
        irq[0] = 5; /* PCI E1 - x1 */


@@ -237,7 +237,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 
        irq[0] = 11; /* PCI E2 - x16 */
        pci_assign_irqs(bus_ck804[3], 0, irq);
 
        irq[0] = 11; /* PCI E2 - x16 */
        pci_assign_irqs(bus_ck804[3], 0, irq);

-       
+

        /* AGP-on-PCI "AGR" ignored */
 
        irq[0] = 10; /* PCI1 */
        /* AGP-on-PCI "AGR" ignored */
 
        irq[0] = 10; /* PCI1 */


@@ -257,7 +257,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
        irq[2] = 11;
        irq[3] = 0;
        pci_assign_irqs(bus_ck804[1], 9, irq);
        irq[2] = 11;
        irq[3] = 0;
        pci_assign_irqs(bus_ck804[1], 9, irq);

-#endif 
+#endif

 
        return (unsigned long)pirq_info;
 }
 
        return (unsigned long)pirq_info;
 }

diff --git a/src/mainboard/msi/ms7260/Kconfig b/src/mainboard/msi/ms7260/Kconfig
index 9752597d7af7a47fbc5e7ef515429616c31683b6..cce07a7f94d722f137d1708a3d208ee18ae1df11 100644 (file)
--- a/src/mainboard/msi/ms7260/Kconfig
+++ b/src/mainboard/msi/ms7260/Kconfig
@@ -15,7 +15,7 @@ config BOARD_MSI_MS7260
        select LIFT_BSP_APIC_ID
        select K8_REV_F_SUPPORT
        select BOARD_ROMSIZE_KB_512
        select LIFT_BSP_APIC_ID
        select K8_REV_F_SUPPORT
        select BOARD_ROMSIZE_KB_512

- 
+

 config MAINBOARD_DIR
        string
        default msi/ms7260
 config MAINBOARD_DIR
        string
        default msi/ms7260


@@ -25,7 +25,7 @@ config DCACHE_RAM_BASE
        hex
        default 0xc8000
        depends on BOARD_MSI_MS7260
        hex
        default 0xc8000
        depends on BOARD_MSI_MS7260

-       
+

 config DCACHE_RAM_SIZE
        hex
        default 0x08000
 config DCACHE_RAM_SIZE
        hex
        default 0x08000


@@ -37,7 +37,7 @@ config DCACHE_RAM_GLOBAL_VAR_SIZE
        depends on BOARD_MSI_MS7260
 
 config APIC_ID_OFFSET
        depends on BOARD_MSI_MS7260
 
 config APIC_ID_OFFSET

-       hex     
+       hex

        default 0x10
        depends on BOARD_MSI_MS7260
 
        default 0x10
        depends on BOARD_MSI_MS7260
 


@@ -77,7 +77,7 @@ config MAX_PHYSICAL_CPUS
        depends on BOARD_MSI_MS7260
 
 config HW_MEM_HOLE_SIZE_AUTO_INC
        depends on BOARD_MSI_MS7260
 
 config HW_MEM_HOLE_SIZE_AUTO_INC

-       bool    
+       bool

        default n
        depends on BOARD_MSI_MS7260
 
        default n
        depends on BOARD_MSI_MS7260
 


@@ -87,12 +87,12 @@ config HT_CHAIN_UNITID_BASE
        depends on BOARD_MSI_MS7260
 
 config HT_CHAIN_END_UNITID_BASE
        depends on BOARD_MSI_MS7260
 
 config HT_CHAIN_END_UNITID_BASE

-       hex     
+       hex

        default 0x20
        depends on BOARD_MSI_MS7260
 
 config SERIAL_CPU_INIT
        default 0x20
        depends on BOARD_MSI_MS7260
 
 config SERIAL_CPU_INIT

-       bool    
+       bool

        default n
        depends on BOARD_MSI_MS7260
 
        default n
        depends on BOARD_MSI_MS7260
 

diff --git a/src/mainboard/msi/ms7260/cmos.layout b/src/mainboard/msi/ms7260/cmos.layout
index 51f4a6c598b2d4523ac6e64404ce6a07ed9b5cc2..5266518e561f3856b492d07057dc7400873e6215 100644 (file)
--- a/src/mainboard/msi/ms7260/cmos.layout
+++ b/src/mainboard/msi/ms7260/cmos.layout
@@ -1,22 +1,22 @@
-## 
+##

 ## This file is part of the coreboot project.
 ## This file is part of the coreboot project.

-## 
+##

 ## Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
 ## Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>

-## 
+##

 ## This program is free software; you can redistribute it and/or modify
 ## it under the terms of the GNU General Public License as published by
 ## the Free Software Foundation; either version 2 of the License, or
 ## (at your option) any later version.
 ## This program is free software; you can redistribute it and/or modify
 ## it under the terms of the GNU General Public License as published by
 ## the Free Software Foundation; either version 2 of the License, or
 ## (at your option) any later version.

-## 
+##

 ## This program is distributed in the hope that it will be useful,
 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 ## GNU General Public License for more details.
 ## This program is distributed in the hope that it will be useful,
 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 ## GNU General Public License for more details.

-## 
+##

 ## You should have received a copy of the GNU General Public License
 ## along with this program; if not, write to the Free Software
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 ## You should have received a copy of the GNU General Public License
 ## along with this program; if not, write to the Free Software
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA

-## 
+##

 
 # TODO: Check and fix up the values as needed.
 
 
 # TODO: Check and fix up the values as needed.
 

diff --git a/src/mainboard/msi/ms7260/resourcemap.c b/src/mainboard/msi/ms7260/resourcemap.c
index d72530a3ae113a77fece41defb27d7b57923b4d0..a051500c64832ddcc6504a330511f8c7c4cba3e1 100644 (file)
--- a/src/mainboard/msi/ms7260/resourcemap.c
+++ b/src/mainboard/msi/ms7260/resourcemap.c
@@ -163,7 +163,7 @@ static void setup_mb_resource_map(void)
                 *         1 = base/limit registers i are read-only
                 * [ 7: 4] Reserved
                 * [31: 8] Memory-Mapped I/O Base Address i (39-16)
                 *         1 = base/limit registers i are read-only
                 * [ 7: 4] Reserved
                 * [31: 8] Memory-Mapped I/O Base Address i (39-16)

-                *         This field defines the upper address bits of a 40bit address 
+                *         This field defines the upper address bits of a 40bit address

                 *         that defines the start of memory-mapped I/O region i
                 */
                PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,
                 *         that defines the start of memory-mapped I/O region i
                 */
                PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,


@@ -201,7 +201,7 @@ static void setup_mb_resource_map(void)
                 * [31:25] Reserved
                 */
 //             PCI_ADDR(0, 0x18, 1, 0xC4), 0xFE000FC8, 0x00007000,
                 * [31:25] Reserved
                 */
 //             PCI_ADDR(0, 0x18, 1, 0xC4), 0xFE000FC8, 0x00007000,

-               PCI_ADDR(0, 0x18, 1, 0xCC), 0xFE000FC8, 0x00000000, 
+               PCI_ADDR(0, 0x18, 1, 0xCC), 0xFE000FC8, 0x00000000,

                PCI_ADDR(0, 0x18, 1, 0xD4), 0xFE000FC8, 0x00000000,
                PCI_ADDR(0, 0x18, 1, 0xDC), 0xFE000FC8, 0x00000000,
 
                PCI_ADDR(0, 0x18, 1, 0xD4), 0xFE000FC8, 0x00000000,
                PCI_ADDR(0, 0x18, 1, 0xDC), 0xFE000FC8, 0x00000000,
 


@@ -219,7 +219,7 @@ static void setup_mb_resource_map(void)
                 * [ 3: 2] Reserved
                 * [ 4: 4] VGA Enable
                 *         0 = VGA matches Disabled
                 * [ 3: 2] Reserved
                 * [ 4: 4] VGA Enable
                 *         0 = VGA matches Disabled

-                *         1 = matches all address < 64K and where A[9:0] is in the 
+                *         1 = matches all address < 64K and where A[9:0] is in the

                 *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
                 * [ 5: 5] ISA Enable
                 *         0 = ISA matches Disabled
                 *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
                 * [ 5: 5] ISA Enable
                 *         0 = ISA matches Disabled


@@ -227,7 +227,7 @@ static void setup_mb_resource_map(void)
                 *             from matching agains this base/limit pair
                 * [11: 6] Reserved
                 * [24:12] PCI I/O Base i
                 *             from matching agains this base/limit pair
                 * [11: 6] Reserved
                 * [24:12] PCI I/O Base i

-                *         This field defines the start of PCI I/O region n 
+                *         This field defines the start of PCI I/O region n

                 * [31:25] Reserved
                 */
 //             PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000033,
                 * [31:25] Reserved
                 */
 //             PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000033,


@@ -272,9 +272,9 @@ static void setup_mb_resource_map(void)
                 *         This field defines the highest bus number in configuration region i
                 */
 //             PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0xff000003, /* link 0 of cpu 0 --> Nvidia MCP55 */
                 *         This field defines the highest bus number in configuration region i
                 */
 //             PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0xff000003, /* link 0 of cpu 0 --> Nvidia MCP55 */

-               PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000000, 
+               PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000000,

                PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x00000000,
                PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x00000000,

-               PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000, 
+               PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000,

 
        };
 
 
        };
 

diff --git a/src/mainboard/msi/ms7260/romstage.c b/src/mainboard/msi/ms7260/romstage.c
index 3f7b69dc1bc1477aa4e19f96b06b28923a4531d1..a5fbffbe4b883a1238929d58dafabb6f0bc597a3 100644 (file)
--- a/src/mainboard/msi/ms7260/romstage.c
+++ b/src/mainboard/msi/ms7260/romstage.c
@@ -152,7 +152,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
                (0xa << 3) | 5, (0xa << 3) | 7, 0, 0,
        };
 
                (0xa << 3) | 5, (0xa << 3) | 7, 0, 0,
        };
 

-       struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE 
+       struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE

                + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
 
        int needs_reset = 0;
                + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
 
        int needs_reset = 0;

diff --git a/src/mainboard/msi/ms9282/Kconfig b/src/mainboard/msi/ms9282/Kconfig
index bd734873130bb3ebaddf35b3b3001b931879cf9b..cf1896d2d7650bbdc59b15d5684da9e8a1581616 100644 (file)
--- a/src/mainboard/msi/ms9282/Kconfig
+++ b/src/mainboard/msi/ms9282/Kconfig
@@ -14,7 +14,7 @@ config BOARD_MSI_MS9282
        select HAVE_HARD_RESET
        select K8_REV_F_SUPPORT
        select BOARD_ROMSIZE_KB_512
        select HAVE_HARD_RESET
        select K8_REV_F_SUPPORT
        select BOARD_ROMSIZE_KB_512

- 
+

 config MAINBOARD_DIR
        string
        default msi/ms9282
 config MAINBOARD_DIR
        string
        default msi/ms9282


@@ -24,7 +24,7 @@ config DCACHE_RAM_BASE
        hex
        default 0xcc000
        depends on BOARD_MSI_MS9282
        hex
        default 0xcc000
        depends on BOARD_MSI_MS9282

-       
+

 config DCACHE_RAM_SIZE
        hex
        default 0x04000
 config DCACHE_RAM_SIZE
        hex
        default 0x04000


@@ -36,7 +36,7 @@ config DCACHE_RAM_GLOBAL_VAR_SIZE
        depends on BOARD_MSI_MS9282
 
 config APIC_ID_OFFSET
        depends on BOARD_MSI_MS9282
 
 config APIC_ID_OFFSET

-       hex     
+       hex

        default 0x10
        depends on BOARD_MSI_MS9282
 
        default 0x10
        depends on BOARD_MSI_MS9282
 


@@ -71,7 +71,7 @@ config MAX_PHYSICAL_CPUS
        depends on BOARD_MSI_MS9282
 
 config HW_MEM_HOLE_SIZE_AUTO_INC
        depends on BOARD_MSI_MS9282
 
 config HW_MEM_HOLE_SIZE_AUTO_INC

-       bool    
+       bool

        default n
        depends on BOARD_MSI_MS9282
 
        default n
        depends on BOARD_MSI_MS9282
 


@@ -81,12 +81,12 @@ config HT_CHAIN_UNITID_BASE
        depends on BOARD_MSI_MS9282
 
 config HT_CHAIN_END_UNITID_BASE
        depends on BOARD_MSI_MS9282
 
 config HT_CHAIN_END_UNITID_BASE

-       hex     
+       hex

        default 0x20
        depends on BOARD_MSI_MS9282
 
 config SERIAL_CPU_INIT
        default 0x20
        depends on BOARD_MSI_MS9282
 
 config SERIAL_CPU_INIT

-       bool    
+       bool

        default n
        depends on BOARD_MSI_MS9282
 
        default n
        depends on BOARD_MSI_MS9282
 

diff --git a/src/mainboard/msi/ms9282/Makefile.inc b/src/mainboard/msi/ms9282/Makefile.inc
index 8f9466696184e72c3a73e7956de1cbbc6773d453..e94ce3fd0e9cfe9b212093a606c9c70b2257ee9a 100644 (file)
--- a/src/mainboard/msi/ms9282/Makefile.inc
+++ b/src/mainboard/msi/ms9282/Makefile.inc
@@ -1,6 +1,6 @@
 ##
 ## This file is part of the coreboot project.
 ##
 ## This file is part of the coreboot project.

-## 
+##

 ## Copyright (C) 2007-2008 coresystems GmbH
 ##
 ## This program is free software; you can redistribute it and/or modify
 ## Copyright (C) 2007-2008 coresystems GmbH
 ##
 ## This program is free software; you can redistribute it and/or modify

diff --git a/src/mainboard/msi/ms9652_fam10/acpi_tables.c b/src/mainboard/msi/ms9652_fam10/acpi_tables.c
index 54e8be4f67a70680960420e071ebc6486222ac6f..c76f830d8948db9a93bcfe31cf836ba5fdb1a00c 100644 (file)
--- a/src/mainboard/msi/ms9652_fam10/acpi_tables.c
+++ b/src/mainboard/msi/ms9652_fam10/acpi_tables.c
@@ -2,7 +2,7 @@
  * This file is part of the coreboot project.
  *
  * Written by Stefan Reinauer <stepan@openbios.org>.
  * This file is part of the coreboot project.
  *
  * Written by Stefan Reinauer <stepan@openbios.org>.

- * ACPI FADT, FACS, and DSDT table support added by 
+ * ACPI FADT, FACS, and DSDT table support added by

  *
  * Copyright (C) 2004 Stefan Reinauer <stepan@openbios.org>
  * Copyright (C) 2005 Nick Barker <nick.barker9@btinternet.com>
  *
  * Copyright (C) 2004 Stefan Reinauer <stepan@openbios.org>
  * Copyright (C) 2005 Nick Barker <nick.barker9@btinternet.com>


@@ -49,7 +49,7 @@ unsigned long acpi_fill_madt(unsigned long current)
        struct mb_sysconf_t *m;
        //extern unsigned char bus_mcp55[8];
        //extern unsigned apicid_mcp55;
        struct mb_sysconf_t *m;
        //extern unsigned char bus_mcp55[8];
        //extern unsigned apicid_mcp55;

-       
+

        unsigned sbdn;
        struct resource *res;
        device_t dev;
        unsigned sbdn;
        struct resource *res;
        device_t dev;


@@ -57,7 +57,7 @@ unsigned long acpi_fill_madt(unsigned long current)
        get_bus_conf();
        sbdn = sysconf.sbdn;
        m = sysconf.mb;
        get_bus_conf();
        sbdn = sysconf.sbdn;
        m = sysconf.mb;

-       
+

        /* Create all subtables for processors. */
        current = acpi_create_madt_lapics(current);
 
        /* Create all subtables for processors. */
        current = acpi_create_madt_lapics(current);
 


@@ -87,7 +87,7 @@ unsigned long acpi_fill_madt(unsigned long current)
 
        /* IRQ0 -> APIC IRQ2. */
        current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
 
        /* IRQ0 -> APIC IRQ2. */
        current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)

-               current, 0, 0, 2, 0x0); 
+               current, 0, 0, 2, 0x0);

 
        /* Create all subtables for processors. */
        current = acpi_create_madt_lapic_nmis(current,
 
        /* Create all subtables for processors. */
        current = acpi_create_madt_lapic_nmis(current,

diff --git a/src/mainboard/msi/ms9652_fam10/dsdt.asl b/src/mainboard/msi/ms9652_fam10/dsdt.asl
index 84e1a7663079b94ce62da991778343c7cf060c94..e5361b6822b74126d7b248f4d29ecb44baf498a0 100644 (file)
--- a/src/mainboard/msi/ms9652_fam10/dsdt.asl
+++ b/src/mainboard/msi/ms9652_fam10/dsdt.asl
@@ -51,7 +51,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
                        External (HCLK)
                        External (SBDN)
                        External (HCDN)
                        External (HCLK)
                        External (SBDN)
                        External (HCDN)

-                    
+

                        Method (_CRS, 0, NotSerialized)
                         {
                                Name (BUF0, ResourceTemplate ()
                        Method (_CRS, 0, NotSerialized)
                         {
                                Name (BUF0, ResourceTemplate ()


@@ -272,7 +272,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
                                Method (_CRS, 0, NotSerialized)
                                {
                                        Name (BUF1, ResourceTemplate () {
                                Method (_CRS, 0, NotSerialized)
                                {
                                        Name (BUF1, ResourceTemplate () {

-                                               IO (Decode16, 0x0378, 0x0378, 0x01, 0x08) 
+                                               IO (Decode16, 0x0378, 0x0378, 0x01, 0x08)

                                                IRQNoFlags () {7}
                                        })
                                        Return (BUF1)
                                                IRQNoFlags () {7}
                                        })
                                        Return (BUF1)


@@ -289,7 +289,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
                                Method (_CRS, 0, NotSerialized)
                                {
                                        Name (BUF1, ResourceTemplate () {
                                Method (_CRS, 0, NotSerialized)
                                {
                                        Name (BUF1, ResourceTemplate () {

-                                               IO (Decode16, 0x0378, 0x0378, 0x01, 0x04) 
+                                               IO (Decode16, 0x0378, 0x0378, 0x01, 0x04)

                                                IO (Decode16, 0x0778, 0x0778, 0x01, 0x04)
                                                IRQNoFlags() {7}
                                                DMA (Compatibility, NotBusMaster, Transfer8) {0,1,3}
                                                IO (Decode16, 0x0778, 0x0778, 0x01, 0x04)
                                                IRQNoFlags() {7}
                                                DMA (Compatibility, NotBusMaster, Transfer8) {0,1,3}

diff --git a/src/mainboard/msi/ms9652_fam10/irq_tables.c b/src/mainboard/msi/ms9652_fam10/irq_tables.c
index bb14f3310b94c7e38e9658659ec286c6ab39d7e2..a1de4c4f57a17a7bcbd50b24e9ce74055204c7bc 100644 (file)
--- a/src/mainboard/msi/ms9652_fam10/irq_tables.c
+++ b/src/mainboard/msi/ms9652_fam10/irq_tables.c
@@ -19,7 +19,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 

-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!

  * (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 
  * (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 


@@ -34,11 +34,11 @@
 #include <cpu/amd/amdfam10_sysconf.h>
 #include "mb_sysconf.h"
 
 #include <cpu/amd/amdfam10_sysconf.h>
 #include "mb_sysconf.h"
 

-static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0, 
+static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,

                uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
                uint8_t slot, uint8_t rfu)
 {
                uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
                uint8_t slot, uint8_t rfu)
 {

-       pirq_info->bus = bus; 
+       pirq_info->bus = bus;

        pirq_info->devfn = devfn;
                pirq_info->irq[0].link = link0;
                pirq_info->irq[0].bitmap = bitmap0;
        pirq_info->devfn = devfn;
                pirq_info->irq[0].link = link0;
                pirq_info->irq[0].bitmap = bitmap0;


@@ -80,15 +80,15 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 
        pirq = (void *)(addr);
        v = (uint8_t *)(addr);
 
        pirq = (void *)(addr);
        v = (uint8_t *)(addr);

-       
+

        pirq->signature = PIRQ_SIGNATURE;
        pirq->version  = PIRQ_VERSION;
        pirq->signature = PIRQ_SIGNATURE;
        pirq->version  = PIRQ_VERSION;

-       
+

        pirq->rtr_bus = m->bus_mcp55[0];
        pirq->rtr_devfn = ((sbdn+6)<<3)|0;
 
        pirq->exclusive_irqs = 0;
        pirq->rtr_bus = m->bus_mcp55[0];
        pirq->rtr_devfn = ((sbdn+6)<<3)|0;
 
        pirq->exclusive_irqs = 0;

-       
+

        pirq->rtr_vendor = 0x10de;
        pirq->rtr_device = 0x0370;
 
        pirq->rtr_vendor = 0x10de;
        pirq->rtr_device = 0x0370;
 


@@ -101,7 +101,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 //pci bridge
        write_pirq_info(pirq_info, m->bus_mcp55[0], ((sbdn+6)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
        pirq_info++; slot_num++;
 //pci bridge
        write_pirq_info(pirq_info, m->bus_mcp55[0], ((sbdn+6)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
        pirq_info++; slot_num++;

-       
+

        for(i=1; i< sysconf.hc_possible_num; i++) {
                if(!(sysconf.pci1234[i] & 0x1) ) continue;
                unsigned busn = (sysconf.pci1234[i] >> 12) & 0xff;
        for(i=1; i< sysconf.hc_possible_num; i++) {
                if(!(sysconf.pci1234[i] & 0x1) ) continue;
                unsigned busn = (sysconf.pci1234[i] >> 12) & 0xff;


@@ -120,10 +120,10 @@ unsigned long write_pirq_routing_table(unsigned long addr)
        }
 #endif
 
        }
 #endif
 

-       pirq->size = 32 + 16 * slot_num; 
+       pirq->size = 32 + 16 * slot_num;

 
        for (i = 0; i < pirq->size; i++)
 
        for (i = 0; i < pirq->size; i++)

-               sum += v[i];    
+               sum += v[i];

 
        sum = pirq->checksum - sum;
 
 
        sum = pirq->checksum - sum;
 

diff --git a/src/mainboard/msi/ms9652_fam10/mb_sysconf.h b/src/mainboard/msi/ms9652_fam10/mb_sysconf.h
index 83f9dbab28cb5e5d03e7483644cd82a95b39b9da..a2e6fc7ade7c8f3df1de373279bf00ee1dfae7a6 100644 (file)
--- a/src/mainboard/msi/ms9652_fam10/mb_sysconf.h
+++ b/src/mainboard/msi/ms9652_fam10/mb_sysconf.h
@@ -26,7 +26,7 @@ struct mb_sysconf_t {
        unsigned char bus_isa;
        unsigned char bus_mcp55[8]; //1
        unsigned apicid_mcp55;
        unsigned char bus_isa;
        unsigned char bus_mcp55[8]; //1
        unsigned apicid_mcp55;

-       unsigned bus_type[256]; 
+       unsigned bus_type[256];

 
 };
 
 
 };
 

diff --git a/src/mainboard/newisys/Kconfig b/src/mainboard/newisys/Kconfig
index fd8f9176e11d8956e332336b824c7df054789d0e..308cced541c109e5b32b780a90d68b427f1d0dcf 100644 (file)
--- a/src/mainboard/newisys/Kconfig
+++ b/src/mainboard/newisys/Kconfig
@@ -1,7 +1,7 @@
 choice
        prompt "Mainboard model"
        depends on VENDOR_NEWISYS
 choice
        prompt "Mainboard model"
        depends on VENDOR_NEWISYS

-        
+

 source "src/mainboard/newisys/khepri/Kconfig"
 
 endchoice
 source "src/mainboard/newisys/khepri/Kconfig"
 
 endchoice

diff --git a/src/mainboard/newisys/khepri/devicetree.cb b/src/mainboard/newisys/khepri/devicetree.cb
index cb8f356e5a204a4fb182a10c8bf9484b23e61a69..30e73f774da9c144d37a50729de042a84be70e10 100644 (file)
--- a/src/mainboard/newisys/khepri/devicetree.cb
+++ b/src/mainboard/newisys/khepri/devicetree.cb
@@ -10,7 +10,7 @@ chip northbridge/amd/amdk8/root_complex
 
        device pci_domain 0 on
                chip northbridge/amd/amdk8
 
        device pci_domain 0 on
                chip northbridge/amd/amdk8

-                       device pci 18.0 on end # LDT 0 
+                       device pci 18.0 on end # LDT 0

                        device pci 18.0 on     # LDT 1
                                chip southbridge/amd/amd8131
                                        device pci 0.0 on end
                        device pci 18.0 on     # LDT 1
                                chip southbridge/amd/amd8131
                                        device pci 0.0 on end


@@ -57,7 +57,7 @@ chip northbridge/amd/amdk8/root_complex
                                                                io 0x60 = 0x220
                                                                io 0x62 = 0x300
                                                                irq 0x70 = 9
                                                                io 0x60 = 0x220
                                                                io 0x62 = 0x300
                                                                irq 0x70 = 9

-                                                       end                                             
+                                                       end

                                                        device pnp 2e.8 off end #  GPIO2
                                                        device pnp 2e.9 off end #  GPIO3
                                                        device pnp 2e.a off end #  ACPI
                                                        device pnp 2e.8 off end #  GPIO2
                                                        device pnp 2e.9 off end #  GPIO3
                                                        device pnp 2e.a off end #  ACPI


@@ -69,7 +69,7 @@ chip northbridge/amd/amdk8/root_complex
                                        end
                                        device pci 1.1 on end
                                        device pci 1.2 on end
                                        end
                                        device pci 1.1 on end
                                        device pci 1.2 on end

-                                       device pci 1.3 on end 
+                                       device pci 1.3 on end

                                        device pci 1.5 on end
                                        device pci 1.6 on end
                                end
                                        device pci 1.5 on end
                                        device pci 1.6 on end
                                end


@@ -87,6 +87,6 @@ chip northbridge/amd/amdk8/root_complex
                        device pci 19.2 on end
                        device pci 19.3 on end
                end
                        device pci 19.2 on end
                        device pci 19.3 on end
                end

-       end 
+       end

 end
 
 end
 

diff --git a/src/mainboard/newisys/khepri/resourcemap.c b/src/mainboard/newisys/khepri/resourcemap.c
index d533b6357e2f2ef4125abc75882a0e9b76d51b59..81bdefa8350195f24b452ba2ce4e7bcaef1b12da 100644 (file)
--- a/src/mainboard/newisys/khepri/resourcemap.c
+++ b/src/mainboard/newisys/khepri/resourcemap.c
@@ -151,7 +151,7 @@ static void setup_khepri_resource_map(void)
         *         1 = base/limit registers i are read-only
         * [ 7: 4] Reserved
         * [31: 8] Memory-Mapped I/O Base Address i (39-16)
         *         1 = base/limit registers i are read-only
         * [ 7: 4] Reserved
         * [31: 8] Memory-Mapped I/O Base Address i (39-16)

-        *         This field defines the upper address bits of a 40bit address 
+        *         This field defines the upper address bits of a 40bit address

         *         that defines the start of memory-mapped I/O region i
         */
        PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,
         *         that defines the start of memory-mapped I/O region i
         */
        PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,


@@ -207,7 +207,7 @@ static void setup_khepri_resource_map(void)
         * [ 3: 2] Reserved
         * [ 4: 4] VGA Enable
         *         0 = VGA matches Disabled
         * [ 3: 2] Reserved
         * [ 4: 4] VGA Enable
         *         0 = VGA matches Disabled

-        *         1 = matches all address < 64K and where A[9:0] is in the 
+        *         1 = matches all address < 64K and where A[9:0] is in the

         *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
         * [ 5: 5] ISA Enable
         *         0 = ISA matches Disabled
         *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
         * [ 5: 5] ISA Enable
         *         0 = ISA matches Disabled


@@ -215,7 +215,7 @@ static void setup_khepri_resource_map(void)
         *             from matching agains this base/limit pair
         * [11: 6] Reserved
         * [24:12] PCI I/O Base i
         *             from matching agains this base/limit pair
         * [11: 6] Reserved
         * [24:12] PCI I/O Base i

-        *         This field defines the start of PCI I/O region n 
+        *         This field defines the start of PCI I/O region n

         * [31:25] Reserved
         */
        PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000003,
         * [31:25] Reserved
         */
        PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000003,

diff --git a/src/mainboard/newisys/khepri/romstage.c b/src/mainboard/newisys/khepri/romstage.c
index e8c040950f996ae804873902c7be1da79c48b1d0..bf1186df46784281443c54c3d742d00059737907 100644 (file)
--- a/src/mainboard/newisys/khepri/romstage.c
+++ b/src/mainboard/newisys/khepri/romstage.c
@@ -1,10 +1,10 @@
 /*
  * This code is derived from the Tyan s2882 romstage.c
  * Adapted by Stefan Reinauer <stepan@coresystems.de>
 /*
  * This code is derived from the Tyan s2882 romstage.c
  * Adapted by Stefan Reinauer <stepan@coresystems.de>

- * Additional (C) 2007 coresystems GmbH 
+ * Additional (C) 2007 coresystems GmbH

  */
 
  */
 

- 
+

 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>


@@ -81,7 +81,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 #include "lib/generic_sdram.c"
 
  /* newisys khepri does not want the default */
 #include "lib/generic_sdram.c"
 
  /* newisys khepri does not want the default */

-#include "resourcemap.c" 
+#include "resourcemap.c"

 
 #if CONFIG_LOGICAL_CPUS==1
 #define SET_NB_CFG_54 1
 
 #if CONFIG_LOGICAL_CPUS==1
 #define SET_NB_CFG_54 1


@@ -129,13 +129,13 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         }
 
 //     post_code(0x32);
         }
 
 //     post_code(0x32);

-       
+

        w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
         uart_init();
         console_init();
 
 //     dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE);
        w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
         uart_init();
         console_init();
 
 //     dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE);

-       
+

        /* Halt if there was a built in self test failure */
        report_bist_failure(bist);
 
        /* Halt if there was a built in self test failure */
        report_bist_failure(bist);
 

diff --git a/src/mainboard/nvidia/Kconfig b/src/mainboard/nvidia/Kconfig
index 54a0c0a99ce2cb3dca6903418b76217378e2c338..ac3b92f91506ed3e36b61c423fa617ac5aac3ad2 100644 (file)
--- a/src/mainboard/nvidia/Kconfig
+++ b/src/mainboard/nvidia/Kconfig
@@ -1,7 +1,7 @@
 choice
        prompt "Mainboard model"
        depends on VENDOR_NVIDIA
 choice
        prompt "Mainboard model"
        depends on VENDOR_NVIDIA

-        
+

 source "src/mainboard/nvidia/l1_2pvv/Kconfig"
 
 endchoice
 source "src/mainboard/nvidia/l1_2pvv/Kconfig"
 
 endchoice

diff --git a/src/mainboard/nvidia/l1_2pvv/Kconfig b/src/mainboard/nvidia/l1_2pvv/Kconfig
index 80f9f16d33f39356117944935e93aaf52eaa4dac..ab361f175f0aa06d5f2caeb2e840d2c27c0370aa 100644 (file)
--- a/src/mainboard/nvidia/l1_2pvv/Kconfig
+++ b/src/mainboard/nvidia/l1_2pvv/Kconfig
@@ -15,7 +15,7 @@ config BOARD_NVIDIA_L1_2PVV
        select LIFT_BSP_APIC_ID
        select K8_REV_F_SUPPORT
        select BOARD_ROMSIZE_KB_512
        select LIFT_BSP_APIC_ID
        select K8_REV_F_SUPPORT
        select BOARD_ROMSIZE_KB_512

- 
+

 config MAINBOARD_DIR
        string
        default nvidia/l1_2pvv
 config MAINBOARD_DIR
        string
        default nvidia/l1_2pvv


@@ -25,7 +25,7 @@ config DCACHE_RAM_BASE
        hex
        default 0xc8000
        depends on BOARD_NVIDIA_L1_2PVV
        hex
        default 0xc8000
        depends on BOARD_NVIDIA_L1_2PVV

-       
+

 config DCACHE_RAM_SIZE
        hex
        default 0x08000
 config DCACHE_RAM_SIZE
        hex
        default 0x08000


@@ -37,7 +37,7 @@ config DCACHE_RAM_GLOBAL_VAR_SIZE
        depends on BOARD_NVIDIA_L1_2PVV
 
 config APIC_ID_OFFSET
        depends on BOARD_NVIDIA_L1_2PVV
 
 config APIC_ID_OFFSET

-       hex     
+       hex

        default 0x10
        depends on BOARD_NVIDIA_L1_2PVV
 
        default 0x10
        depends on BOARD_NVIDIA_L1_2PVV
 


@@ -77,7 +77,7 @@ config MAX_PHYSICAL_CPUS
        depends on BOARD_NVIDIA_L1_2PVV
 
 config HW_MEM_HOLE_SIZE_AUTO_INC
        depends on BOARD_NVIDIA_L1_2PVV
 
 config HW_MEM_HOLE_SIZE_AUTO_INC

-       bool    
+       bool

        default n
        depends on BOARD_NVIDIA_L1_2PVV
 
        default n
        depends on BOARD_NVIDIA_L1_2PVV
 


@@ -87,12 +87,12 @@ config HT_CHAIN_UNITID_BASE
        depends on BOARD_NVIDIA_L1_2PVV
 
 config HT_CHAIN_END_UNITID_BASE
        depends on BOARD_NVIDIA_L1_2PVV
 
 config HT_CHAIN_END_UNITID_BASE

-       hex     
+       hex

        default 0x20
        depends on BOARD_NVIDIA_L1_2PVV
 
 config SERIAL_CPU_INIT
        default 0x20
        depends on BOARD_NVIDIA_L1_2PVV
 
 config SERIAL_CPU_INIT

-       bool    
+       bool

        default n
        depends on BOARD_NVIDIA_L1_2PVV
 
        default n
        depends on BOARD_NVIDIA_L1_2PVV
 

diff --git a/src/mainboard/olpc/Kconfig b/src/mainboard/olpc/Kconfig
index 658ebb51c6e1400260cda8739e93783dffe31ebd..a74f3937746fb0f55029f9046c7bc6669d62fb8f 100644 (file)
--- a/src/mainboard/olpc/Kconfig
+++ b/src/mainboard/olpc/Kconfig
@@ -1,7 +1,7 @@
 choice
        prompt "Mainboard model"
        depends on VENDOR_OLPC
 choice
        prompt "Mainboard model"
        depends on VENDOR_OLPC

-        
+

 source "src/mainboard/olpc/rev_a/Kconfig"
 source "src/mainboard/olpc/btest/Kconfig"
 
 source "src/mainboard/olpc/rev_a/Kconfig"
 source "src/mainboard/olpc/btest/Kconfig"
 

diff --git a/src/mainboard/olpc/btest/devicetree.cb b/src/mainboard/olpc/btest/devicetree.cb
index e0da82836a6a34a0358df64a28ee079d94b3a3df..ca55ce1b7ee77992b7dc43173bfc8a3205eceeda 100644 (file)
--- a/src/mainboard/olpc/btest/devicetree.cb
+++ b/src/mainboard/olpc/btest/devicetree.cb
@@ -6,7 +6,7 @@ chip northbridge/amd/gx2
                        device apic 0 on end
                end
        end
                        device apic 0 on end
                end
        end

-       device pci_domain 0 on 
+       device pci_domain 0 on

                device pci 1.0 on end
                device pci 1.1 on end
                chip southbridge/amd/cs5536
                device pci 1.0 on end
                device pci 1.1 on end
                chip southbridge/amd/cs5536


@@ -18,7 +18,7 @@ chip northbridge/amd/gx2
                # SIRQ Mode = continous , It would be better if the EC could operate in
                # Active(Quiet) mode. Save power....
                # SIRQ Enable = Enabled
                # SIRQ Mode = continous , It would be better if the EC could operate in
                # Active(Quiet) mode. Save power....
                # SIRQ Enable = Enabled

-               # Invert mask = IRQ 12 and 1 are active high. Keyboard and Mouse IRQs. OK 
+               # Invert mask = IRQ 12 and 1 are active high. Keyboard and Mouse IRQs. OK

                        #register "lpc_irq" = "0x00001002"
                        #register "lpc_serirq_enable" = "0xEFFD0080"
                        #register "enable_gpio0_inta" = "1"
                        #register "lpc_irq" = "0x00001002"
                        #register "lpc_serirq_enable" = "0xEFFD0080"
                        #register "enable_gpio0_inta" = "1"

diff --git a/src/mainboard/olpc/btest/irq_tables.c b/src/mainboard/olpc/btest/irq_tables.c
index 598350b4b82c4624ab0f6ac37e737c2e127676c4..f751b481caa460bd622533b6579ecdd07ce7435d 100644 (file)
--- a/src/mainboard/olpc/btest/irq_tables.c
+++ b/src/mainboard/olpc/btest/irq_tables.c
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!

    (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
  *
    (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
  *

diff --git a/src/mainboard/olpc/btest/mainboard.c b/src/mainboard/olpc/btest/mainboard.c
index b184a566d0afdff9d3f302950efc7ac7c63ddc4c..1e5add3dc04d60fc9049265d836ff23610dd75e4 100644 (file)
--- a/src/mainboard/olpc/btest/mainboard.c
+++ b/src/mainboard/olpc/btest/mainboard.c
@@ -73,26 +73,26 @@ static void
 init_cafe_irq(void){
        const unsigned char slots_cafe[4] = {11, 0, 0, 0};
 
 init_cafe_irq(void){
        const unsigned char slots_cafe[4] = {11, 0, 0, 0};
 

- 
-       /* CAFE PCI slots */ 
-       pci_assign_irqs(0, 0x0C, slots_cafe); 
-
-       /* Make the pin assignments - NOTENOTENOTE:  This should be 
-         * configurable! 
-         */ 
-
-       /* Configure the GPIO pins to use - class 0, index 9 to configure 
-         * AB.  Write 0xFF to disable 
-         */ 
-       
-       vrWrite(0x9, 0XFF00); 
-       
-       /* Configure the GPIO pins to use - class 0, index A to configure 
-         * CD.  Write 0xFF to disable 
-         */ 
-       
-       vrWrite(0xA, 0xFFFF); 
-        
+
+       /* CAFE PCI slots */
+       pci_assign_irqs(0, 0x0C, slots_cafe);
+
+       /* Make the pin assignments - NOTENOTENOTE:  This should be
+         * configurable!
+         */
+
+       /* Configure the GPIO pins to use - class 0, index 9 to configure
+         * AB.  Write 0xFF to disable
+         */
+
+       vrWrite(0x9, 0XFF00);
+
+       /* Configure the GPIO pins to use - class 0, index A to configure
+         * CD.  Write 0xFF to disable
+         */
+
+       vrWrite(0xA, 0xFFFF);
+

 }
 
 
 }
 
 


@@ -111,7 +111,7 @@ static void init(struct device *dev) {
          * conditional we can make it a config variable later.
          */
 
          * conditional we can make it a config variable later.
          */
 

-       printk(BIOS_DEBUG, "%s (%x,%x)SET USB PCI interrupt line to %d\n", 
+       printk(BIOS_DEBUG, "%s (%x,%x)SET USB PCI interrupt line to %d\n",

                __func__, bus, devfn, usbirq);
        usb = dev_find_slot(bus, devfn);
        if (! usb){
                __func__, bus, devfn, usbirq);
        usb = dev_find_slot(bus, devfn);
        if (! usb){

diff --git a/src/mainboard/olpc/btest/romstage.c b/src/mainboard/olpc/btest/romstage.c
index 1503baa6ba65cac8d63561f09b20d148f95080ca..fc605d1a88e22bce18e69ecd96c9c7c8b2f5727a 100644 (file)
--- a/src/mainboard/olpc/btest/romstage.c
+++ b/src/mainboard/olpc/btest/romstage.c
@@ -50,7 +50,7 @@ static inline unsigned int fls(unsigned int x)
        Trrd=2 (act2act)
        Tref=17.8ms
   */
        Trrd=2 (act2act)
        Tref=17.8ms
   */

-static void sdram_set_spd_registers(const struct mem_controller *ctrl) 
+static void sdram_set_spd_registers(const struct mem_controller *ctrl)

 {
        /* Total size of DIMM = 2^row address (byte 3) * 2^col address (byte 4) *
         *                      component Banks (byte 17) * module banks, side (byte 5) *
 {
        /* Total size of DIMM = 2^row address (byte 3) * 2^col address (byte 4) *
         *                      component Banks (byte 17) * module banks, side (byte 5) *


@@ -100,11 +100,11 @@ static void sdram_set_spd_registers(const struct mem_controller *ctrl)
        /* timing and mode ... */
 
        msr = rdmsr(0x20000019);
        /* timing and mode ... */
 
        msr = rdmsr(0x20000019);

-       
-       /* per standard bios settings */        
+
+       /* per standard bios settings */

 
        msr.hi = 0x18000108;
 
        msr.hi = 0x18000108;

-       msr.lo = 
+       msr.lo =

                        (6<<28) |               // cas_lat
                        (10<<24)|               // ref2act
                        (7<<20)|                // act2pre
                        (6<<28) |               // cas_lat
                        (10<<24)|               // ref2act
                        (7<<20)|                // act2pre


@@ -114,8 +114,8 @@ static void sdram_set_spd_registers(const struct mem_controller *ctrl)
                        (2<<6)|                 // dplwr
                        (2<<4)|                 // dplrd
                        (3);                    // dal
                        (2<<6)|                 // dplwr
                        (2<<4)|                 // dplrd
                        (3);                    // dal

-       /* the msr value reported by quanta is very, very different. 
-        * we will go with that value for now. 
+       /* the msr value reported by quanta is very, very different.
+        * we will go with that value for now.

         */
        msr.lo = 0x286332a3;
 
         */
        msr.lo = 0x286332a3;
 


@@ -180,9 +180,9 @@ static void main(unsigned long bist)
 
        cpuRegInit();
        print_err("done cpuRegInit\n");
 
        cpuRegInit();
        print_err("done cpuRegInit\n");

-       
+

        sdram_initialize(1, memctrl);
        sdram_initialize(1, memctrl);

-       
+

        /* Check all of memory */
        //ram_check(0x00000000, 640*1024);
 }
        /* Check all of memory */
        //ram_check(0x00000000, 640*1024);
 }

diff --git a/src/mainboard/olpc/rev_a/devicetree.cb b/src/mainboard/olpc/rev_a/devicetree.cb
index e0da82836a6a34a0358df64a28ee079d94b3a3df..ca55ce1b7ee77992b7dc43173bfc8a3205eceeda 100644 (file)
--- a/src/mainboard/olpc/rev_a/devicetree.cb
+++ b/src/mainboard/olpc/rev_a/devicetree.cb
@@ -6,7 +6,7 @@ chip northbridge/amd/gx2
                        device apic 0 on end
                end
        end
                        device apic 0 on end
                end
        end

-       device pci_domain 0 on 
+       device pci_domain 0 on

                device pci 1.0 on end
                device pci 1.1 on end
                chip southbridge/amd/cs5536
                device pci 1.0 on end
                device pci 1.1 on end
                chip southbridge/amd/cs5536


@@ -18,7 +18,7 @@ chip northbridge/amd/gx2
                # SIRQ Mode = continous , It would be better if the EC could operate in
                # Active(Quiet) mode. Save power....
                # SIRQ Enable = Enabled
                # SIRQ Mode = continous , It would be better if the EC could operate in
                # Active(Quiet) mode. Save power....
                # SIRQ Enable = Enabled

-               # Invert mask = IRQ 12 and 1 are active high. Keyboard and Mouse IRQs. OK 
+               # Invert mask = IRQ 12 and 1 are active high. Keyboard and Mouse IRQs. OK

                        #register "lpc_irq" = "0x00001002"
                        #register "lpc_serirq_enable" = "0xEFFD0080"
                        #register "enable_gpio0_inta" = "1"
                        #register "lpc_irq" = "0x00001002"
                        #register "lpc_serirq_enable" = "0xEFFD0080"
                        #register "enable_gpio0_inta" = "1"

diff --git a/src/mainboard/olpc/rev_a/irq_tables.c b/src/mainboard/olpc/rev_a/irq_tables.c
index 598350b4b82c4624ab0f6ac37e737c2e127676c4..f751b481caa460bd622533b6579ecdd07ce7435d 100644 (file)
--- a/src/mainboard/olpc/rev_a/irq_tables.c
+++ b/src/mainboard/olpc/rev_a/irq_tables.c
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!

    (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
  *
    (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
  *

diff --git a/src/mainboard/olpc/rev_a/mainboard.c b/src/mainboard/olpc/rev_a/mainboard.c
index a02e583558d6b890f6b3871865e18a4a3fd47e13..adfb957ab7852e3a8ae8a73cdd93926aa79cf175 100644 (file)
--- a/src/mainboard/olpc/rev_a/mainboard.c
+++ b/src/mainboard/olpc/rev_a/mainboard.c
@@ -83,7 +83,7 @@ static void init(struct device *dev) {
          * conditional we can make it a config variable later.
          */
 
          * conditional we can make it a config variable later.
          */
 

-       printk(BIOS_DEBUG, "%s (%x,%x)SET USB PCI interrupt line to %d\n", 
+       printk(BIOS_DEBUG, "%s (%x,%x)SET USB PCI interrupt line to %d\n",

                __func__, bus, devfn, usbirq);
        usb = dev_find_slot(bus, devfn);
        if (! usb){
                __func__, bus, devfn, usbirq);
        usb = dev_find_slot(bus, devfn);
        if (! usb){

diff --git a/src/mainboard/olpc/rev_a/romstage.c b/src/mainboard/olpc/rev_a/romstage.c
index 1503baa6ba65cac8d63561f09b20d148f95080ca..fc605d1a88e22bce18e69ecd96c9c7c8b2f5727a 100644 (file)
--- a/src/mainboard/olpc/rev_a/romstage.c
+++ b/src/mainboard/olpc/rev_a/romstage.c
@@ -50,7 +50,7 @@ static inline unsigned int fls(unsigned int x)
        Trrd=2 (act2act)
        Tref=17.8ms
   */
        Trrd=2 (act2act)
        Tref=17.8ms
   */

-static void sdram_set_spd_registers(const struct mem_controller *ctrl) 
+static void sdram_set_spd_registers(const struct mem_controller *ctrl)

 {
        /* Total size of DIMM = 2^row address (byte 3) * 2^col address (byte 4) *
         *                      component Banks (byte 17) * module banks, side (byte 5) *
 {
        /* Total size of DIMM = 2^row address (byte 3) * 2^col address (byte 4) *
         *                      component Banks (byte 17) * module banks, side (byte 5) *


@@ -100,11 +100,11 @@ static void sdram_set_spd_registers(const struct mem_controller *ctrl)
        /* timing and mode ... */
 
        msr = rdmsr(0x20000019);
        /* timing and mode ... */
 
        msr = rdmsr(0x20000019);

-       
-       /* per standard bios settings */        
+
+       /* per standard bios settings */

 
        msr.hi = 0x18000108;
 
        msr.hi = 0x18000108;

-       msr.lo = 
+       msr.lo =

                        (6<<28) |               // cas_lat
                        (10<<24)|               // ref2act
                        (7<<20)|                // act2pre
                        (6<<28) |               // cas_lat
                        (10<<24)|               // ref2act
                        (7<<20)|                // act2pre


@@ -114,8 +114,8 @@ static void sdram_set_spd_registers(const struct mem_controller *ctrl)
                        (2<<6)|                 // dplwr
                        (2<<4)|                 // dplrd
                        (3);                    // dal
                        (2<<6)|                 // dplwr
                        (2<<4)|                 // dplrd
                        (3);                    // dal

-       /* the msr value reported by quanta is very, very different. 
-        * we will go with that value for now. 
+       /* the msr value reported by quanta is very, very different.
+        * we will go with that value for now.

         */
        msr.lo = 0x286332a3;
 
         */
        msr.lo = 0x286332a3;
 


@@ -180,9 +180,9 @@ static void main(unsigned long bist)
 
        cpuRegInit();
        print_err("done cpuRegInit\n");
 
        cpuRegInit();
        print_err("done cpuRegInit\n");

-       
+

        sdram_initialize(1, memctrl);
        sdram_initialize(1, memctrl);

-       
+

        /* Check all of memory */
        //ram_check(0x00000000, 640*1024);
 }
        /* Check all of memory */
        //ram_check(0x00000000, 640*1024);
 }

diff --git a/src/mainboard/pcengines/Kconfig b/src/mainboard/pcengines/Kconfig
index 23b46536c89df5eb7d92db598b8578d28eea7a02..c1b0168505ec6fdb44e282f03c3830b76b3c71b4 100644 (file)
--- a/src/mainboard/pcengines/Kconfig
+++ b/src/mainboard/pcengines/Kconfig
@@ -1,7 +1,7 @@
 choice
        prompt "Mainboard model"
        depends on VENDOR_PC_ENGINES
 choice
        prompt "Mainboard model"
        depends on VENDOR_PC_ENGINES

-        
+

 source "src/mainboard/pcengines/alix1c/Kconfig"
 
 endchoice
 source "src/mainboard/pcengines/alix1c/Kconfig"
 
 endchoice

diff --git a/src/mainboard/pcengines/alix1c/Kconfig b/src/mainboard/pcengines/alix1c/Kconfig
index 3e1237a47c2c006ccc4e86bbc030fd66a109f0d4..0ba52ce937dd37439854bc2459f52be7bc9b6154 100644 (file)
--- a/src/mainboard/pcengines/alix1c/Kconfig
+++ b/src/mainboard/pcengines/alix1c/Kconfig
@@ -14,7 +14,7 @@ config BOARD_PCENGINES_ALIX1C
 
 config MAINBOARD_DIR
        string
 
 config MAINBOARD_DIR
        string

-       default pcengines/alix1c 
+       default pcengines/alix1c

        depends on BOARD_PCENGINES_ALIX1C
 
 config MAINBOARD_PART_NUMBER
        depends on BOARD_PCENGINES_ALIX1C
 
 config MAINBOARD_PART_NUMBER

diff --git a/src/mainboard/pcengines/alix1c/devicetree.cb b/src/mainboard/pcengines/alix1c/devicetree.cb
index 34668d1025cce146d1a8a596d11e1adb77439a6d..f40e30295612285f9332a0037b8899e31a240f29 100644 (file)
--- a/src/mainboard/pcengines/alix1c/devicetree.cb
+++ b/src/mainboard/pcengines/alix1c/devicetree.cb
@@ -1,5 +1,5 @@
 chip northbridge/amd/lx
 chip northbridge/amd/lx

-       device pci_domain 0 on 
+       device pci_domain 0 on

                device pci 1.0 on end
                device pci 1.1 on end
                chip southbridge/amd/cs5536
                device pci 1.0 on end
                device pci 1.1 on end
                chip southbridge/amd/cs5536


@@ -57,7 +57,7 @@ chip northbridge/amd/lx
                                                io 0x60 = 0x220
                                                io 0x62 = 0x300
                                                irq 0x70 = 9
                                                io 0x60 = 0x220
                                                io 0x62 = 0x300
                                                irq 0x70 = 9

-                                       end                                             
+                                       end

                                        device pnp 2e.8 on end #  GPIO2
                                        device pnp 2e.9 on end #  GPIO3
                                        device pnp 2e.a on end #  ACPI
                                        device pnp 2e.8 on end #  GPIO2
                                        device pnp 2e.9 on end #  GPIO3
                                        device pnp 2e.a on end #  ACPI

diff --git a/src/mainboard/rca/Kconfig b/src/mainboard/rca/Kconfig
index e4e913559de169a0456fc51915e81bff10136e32..bd272be17e3920806ad4078d8de927937a7c90ff 100644 (file)
--- a/src/mainboard/rca/Kconfig
+++ b/src/mainboard/rca/Kconfig
@@ -1,7 +1,7 @@
 choice
        prompt "Mainboard model"
        depends on VENDOR_RCA
 choice
        prompt "Mainboard model"
        depends on VENDOR_RCA

-        
+

 source "src/mainboard/rca/rm4100/Kconfig"
 
 endchoice
 source "src/mainboard/rca/rm4100/Kconfig"
 
 endchoice

diff --git a/src/mainboard/rca/rm4100/chip.h b/src/mainboard/rca/rm4100/chip.h
index 14d6677a2209ddf6c0db30f4b82712886fb4c548..c46c318c2986e0f1913fb3dd0567b083412477ad 100644 (file)
--- a/src/mainboard/rca/rm4100/chip.h
+++ b/src/mainboard/rca/rm4100/chip.h
@@ -1,7 +1,7 @@
 /*
  * This file is part of the coreboot project.
  *
 /*
  * This file is part of the coreboot project.
  *

- * Copyright (C) 2008 Joseph Smith <joe@settoplinux.org> 
+ * Copyright (C) 2008 Joseph Smith <joe@settoplinux.org>

  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by

diff --git a/src/mainboard/rca/rm4100/gpio.c b/src/mainboard/rca/rm4100/gpio.c
index a27b7bb327377b77a55120f2eaae29131a96c3b0..0f7512c1b2e710cf545856b00a9d23eddfcd305e 100644 (file)
--- a/src/mainboard/rca/rm4100/gpio.c
+++ b/src/mainboard/rca/rm4100/gpio.c
@@ -58,13 +58,13 @@ static void mb_gpio_init(void)
        outl(0x01, PME_IO_BASE_ADDR + 0x2c);
 
        /* GP30 - FAN2_TACH */
        outl(0x01, PME_IO_BASE_ADDR + 0x2c);
 
        /* GP30 - FAN2_TACH */

-       outl(0x05, PME_IO_BASE_ADDR + 0x33); 
+       outl(0x05, PME_IO_BASE_ADDR + 0x33);

 
        /* GP31 - FAN1_TACH */
        outl(0x05, PME_IO_BASE_ADDR + 0x34);
 
        /* GP32 - FAN2_CTRL */
 
        /* GP31 - FAN1_TACH */
        outl(0x05, PME_IO_BASE_ADDR + 0x34);
 
        /* GP32 - FAN2_CTRL */

-       outl(0x04, PME_IO_BASE_ADDR + 0x35); 
+       outl(0x04, PME_IO_BASE_ADDR + 0x35);

 
        /* GP33 - FAN1_CTRL */
        outl(0x04, PME_IO_BASE_ADDR + 0x36);
 
        /* GP33 - FAN1_CTRL */
        outl(0x04, PME_IO_BASE_ADDR + 0x36);


@@ -79,7 +79,7 @@ static void mb_gpio_init(void)
        outl(0x00, PME_IO_BASE_ADDR + 0x3a);
 
        /* GP42 - GPIO_PME_OUT */
        outl(0x00, PME_IO_BASE_ADDR + 0x3a);
 
        /* GP42 - GPIO_PME_OUT */

-       outl(0x00, PME_IO_BASE_ADDR + 0x3d); 
+       outl(0x00, PME_IO_BASE_ADDR + 0x3d);

 
        /* GP50 - SER2_RI */
        outl(0x05, PME_IO_BASE_ADDR + 0x3f);
 
        /* GP50 - SER2_RI */
        outl(0x05, PME_IO_BASE_ADDR + 0x3f);

diff --git a/src/mainboard/rca/rm4100/mainboard.c b/src/mainboard/rca/rm4100/mainboard.c
index 2248ba791ec6638ed5a99e45c9eeb2c2ef464e90..653b22ab76834e146673a94d4b78d26e6ead1f82 100644 (file)
--- a/src/mainboard/rca/rm4100/mainboard.c
+++ b/src/mainboard/rca/rm4100/mainboard.c
@@ -38,7 +38,7 @@ static void mainboard_enable(device_t dev)
        // TODO Switch parport LEDs
        dev->ops->init = mainboard_init;
 }
        // TODO Switch parport LEDs
        dev->ops->init = mainboard_init;
 }

- 
+

 struct chip_operations mainboard_ops = {
        .enable_dev = mainboard_enable,
        CHIP_NAME("RCA RM4100 Mainboard")
 struct chip_operations mainboard_ops = {
        .enable_dev = mainboard_enable,
        CHIP_NAME("RCA RM4100 Mainboard")

diff --git a/src/mainboard/rca/rm4100/romstage.c b/src/mainboard/rca/rm4100/romstage.c
index 5830af0b40082137a87a40ea79855261dcdf63a0..554d7f125bd7fd1f5276f18cd9e031894b504fd3 100644 (file)
--- a/src/mainboard/rca/rm4100/romstage.c
+++ b/src/mainboard/rca/rm4100/romstage.c
@@ -88,11 +88,11 @@ static void mb_early_setup(void)
        /* CPU Frequency Strap */
        pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xd5, 0x02);
        /* ACPI base address and enable Resource Indicator */
        /* CPU Frequency Strap */
        pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xd5, 0x02);
        /* ACPI base address and enable Resource Indicator */

-       pci_write_config32(PCI_DEV(0, 0x1f, 0), PMBASE, (PMBASE_ADDR | 1)); 
+       pci_write_config32(PCI_DEV(0, 0x1f, 0), PMBASE, (PMBASE_ADDR | 1));

        /* Enable the SMBUS */
        enable_smbus();
        /* ACPI base address and disable Resource Indicator */
        /* Enable the SMBUS */
        enable_smbus();
        /* ACPI base address and disable Resource Indicator */

-       pci_write_config32(PCI_DEV(0, 0x1f, 0), PMBASE, (PMBASE_ADDR)); 
+       pci_write_config32(PCI_DEV(0, 0x1f, 0), PMBASE, (PMBASE_ADDR));

        /*  ACPI Enable */
        pci_write_config8(PCI_DEV(0, 0x1f, 0), ACPI_CNTL, 0x10);
 }
        /*  ACPI Enable */
        pci_write_config8(PCI_DEV(0, 0x1f, 0), ACPI_CNTL, 0x10);
 }

diff --git a/src/mainboard/roda/rk886ex/acpi/battery.asl b/src/mainboard/roda/rk886ex/acpi/battery.asl
index 77269ad14301cecc03e0485d5da2e940cf89921c..df61526867a03fdd060aefa858ce6da2e39143bf 100644 (file)
--- a/src/mainboard/roda/rk886ex/acpi/battery.asl
+++ b/src/mainboard/roda/rk886ex/acpi/battery.asl
@@ -113,7 +113,7 @@ Device (BAT1)
                                }
                        }
                }
                                }
                        }
                }

-               
+

                Store (CBA1, Local0)
                Store (Local0, Index(PBST, 2))
                Store (DerefOf(Index(PBIF, 4)), Index(PBST, 3))
                Store (CBA1, Local0)
                Store (Local0, Index(PBST, 2))
                Store (DerefOf(Index(PBIF, 4)), Index(PBST, 3))


@@ -130,7 +130,7 @@ Device (BAT1)
                                Store (1, Local1)
                        }
                }
                                Store (1, Local1)
                        }
                }

-               
+

                Store (Local1, Index(PBST, 0))
                If (\_SB.PCI0.LPCB.EC0.P63S) {
                        Store (0x16, Index(PBST, 1))
                Store (Local1, Index(PBST, 0))
                If (\_SB.PCI0.LPCB.EC0.P63S) {
                        Store (0x16, Index(PBST, 1))


@@ -253,7 +253,7 @@ Device (BAT2)
                                }
                        }
                }
                                }
                        }
                }

-               
+

                Store (CBA2, Local0)
                Store (Local0, Index(PBST, 2))
                Store (DerefOf(Index(PBIF, 4)), Index(PBST, 3))
                Store (CBA2, Local0)
                Store (Local0, Index(PBST, 2))
                Store (DerefOf(Index(PBIF, 4)), Index(PBST, 3))


@@ -270,7 +270,7 @@ Device (BAT2)
                                Store (1, Local1)
                        }
                }
                                Store (1, Local1)
                        }
                }

-               
+

                Store (Local1, Index(PBST, 0))
                If (\_SB.PCI0.LPCB.EC0.P62S) {
                        Store (0x16, Index(PBST, 1))
                Store (Local1, Index(PBST, 0))
                If (\_SB.PCI0.LPCB.EC0.P62S) {
                        Store (0x16, Index(PBST, 1))

diff --git a/src/mainboard/roda/rk886ex/acpi/ec.asl b/src/mainboard/roda/rk886ex/acpi/ec.asl
index 2b8c7ea429b235583a27be04f9232591f022f87c..fc0ae547e2a15dbc80dde630b60d1bba29946c6d 100644 (file)
--- a/src/mainboard/roda/rk886ex/acpi/ec.asl
+++ b/src/mainboard/roda/rk886ex/acpi/ec.asl
@@ -81,14 +81,14 @@ Device(EC0)
        {
                // This method is needed by Windows XP/2000 for
                // EC initialization before a driver is loaded
        {
                // This method is needed by Windows XP/2000 for
                // EC initialization before a driver is loaded

-       
+

                If (LEqual(Arg0, 0x03)) {
                        Store (Arg1, ECON)
                }
        }
 
        // EC Query methods
                If (LEqual(Arg0, 0x03)) {
                        Store (Arg1, ECON)
                }
        }
 
        // EC Query methods

-       
+

        Method (_Q11, 0)
        {
                Store("_Q11: Fn-F8 (Sleep Button) pressed", Debug)
        Method (_Q11, 0)
        {
                Store("_Q11: Fn-F8 (Sleep Button) pressed", Debug)

diff --git a/src/mainboard/roda/rk886ex/acpi/i945_pci_irqs.asl b/src/mainboard/roda/rk886ex/acpi/i945_pci_irqs.asl
index 6a16b5b88700b6bae0bfae20ecbe28690b4721fb..674c3d41f0697af5a2653e342dc24ad992de2589 100644 (file)
--- a/src/mainboard/roda/rk886ex/acpi/i945_pci_irqs.asl
+++ b/src/mainboard/roda/rk886ex/acpi/i945_pci_irqs.asl
@@ -19,7 +19,7 @@
  * MA 02110-1301 USA
  */
 
  * MA 02110-1301 USA
  */
 

-/* This is board specific information: IRQ routing for the 
+/* This is board specific information: IRQ routing for the

  * i945
  */
 
  * i945
  */
 

diff --git a/src/mainboard/roda/rk886ex/acpi/ich7_pci_irqs.asl b/src/mainboard/roda/rk886ex/acpi/ich7_pci_irqs.asl
index 4c4edd7c170475f2d1ee45a1e500817fadd11e0f..dc1f9da6f64d14e55255555e38a55c2a8f015939 100644 (file)
--- a/src/mainboard/roda/rk886ex/acpi/ich7_pci_irqs.asl
+++ b/src/mainboard/roda/rk886ex/acpi/ich7_pci_irqs.asl
@@ -19,7 +19,7 @@
  * MA 02110-1301 USA
  */
 
  * MA 02110-1301 USA
  */
 

-/* This is board specific information: IRQ routing for the 
+/* This is board specific information: IRQ routing for the

  * 0:1e.0 PCI bridge of the ICH7
  */
 
  * 0:1e.0 PCI bridge of the ICH7
  */
 

diff --git a/src/mainboard/roda/rk886ex/acpi/mainboard.asl b/src/mainboard/roda/rk886ex/acpi/mainboard.asl
index 7a2dea76a28249054a285db2088904e9c6444ed0..4be20c3ed8f3f0d491e751aacd06e050d4e3abac 100644 (file)
--- a/src/mainboard/roda/rk886ex/acpi/mainboard.asl
+++ b/src/mainboard/roda/rk886ex/acpi/mainboard.asl
@@ -36,7 +36,7 @@ Device (SLPB)
 Device (PWRB)
 {
        Name(_HID, EisaId("PNP0C0C"))
 Device (PWRB)
 {
        Name(_HID, EisaId("PNP0C0C"))

-       
+

        // Wake
        Name(_PRW, Package(){0x1d, 0x04})
 }
        // Wake
        Name(_PRW, Package(){0x1d, 0x04})
 }

diff --git a/src/mainboard/roda/rk886ex/acpi/platform.asl b/src/mainboard/roda/rk886ex/acpi/platform.asl
index 9e86d0b7a7bfd016ce185ffc8c73aa5c153bba01..5de4a833243458b621aa705a7d9f80a4cc718d0a 100644 (file)
--- a/src/mainboard/roda/rk886ex/acpi/platform.asl
+++ b/src/mainboard/roda/rk886ex/acpi/platform.asl
@@ -48,9 +48,9 @@ Method(TRAP, 1, Serialized)
        Return (SMIF)           // Return value of SMI handler
 }
 
        Return (SMIF)           // Return value of SMI handler
 }
 

-/* The _PIC method is called by the OS to choose between interrupt 
+/* The _PIC method is called by the OS to choose between interrupt

  * routing via the i8259 interrupt controller or the APIC.
  * routing via the i8259 interrupt controller or the APIC.

- * 
+ *

  * _PIC is called with a parameter of 0 for i8259 configuration and
  * with a parameter of 1 for Local Apic/IOAPIC configuration.
  */
  * _PIC is called with a parameter of 0 for i8259 configuration and
  * with a parameter of 1 for Local Apic/IOAPIC configuration.
  */


@@ -80,12 +80,12 @@ Method(_WAK,1)
        // Notify PCI Express slots in case a card
        // was inserted while a sleep state was active.
 
        // Notify PCI Express slots in case a card
        // was inserted while a sleep state was active.
 

-       // Are we going to S3? 
+       // Are we going to S3?

        If (LEqual(Arg0, 3)) {
                // ..
        }
 
        If (LEqual(Arg0, 3)) {
                // ..
        }
 

-       // Are we going to S4? 
+       // Are we going to S4?

        If (LEqual(Arg0, 4)) {
                // ..
        }
        If (LEqual(Arg0, 4)) {
                // ..
        }

diff --git a/src/mainboard/roda/rk886ex/acpi/superio.asl b/src/mainboard/roda/rk886ex/acpi/superio.asl
index 67ff1f91f769b02d4cf6af28d8cd00e3d33e6bfb..31cb44ad642a3f827af68702dbe61b37a78bb732 100644 (file)
--- a/src/mainboard/roda/rk886ex/acpi/superio.asl
+++ b/src/mainboard/roda/rk886ex/acpi/superio.asl
@@ -138,7 +138,7 @@ Device (SIO1)
                        CreateByteField(RSRC, 0x05, IORH) // Why?
                        CreateByteField(RSRC,
                                \_SB.PCI0.LPCB.SIO1.COMA._CRS._IRA._INT, IRQL)
                        CreateByteField(RSRC, 0x05, IORH) // Why?
                        CreateByteField(RSRC,
                                \_SB.PCI0.LPCB.SIO1.COMA._CRS._IRA._INT, IRQL)

-                       
+

                        Store (READ(0, 0x24, 0xff), Local0)
                        And (Local0, 0xc0, Local1)
                        ShiftRight(Local1, 0x06, Local1)
                        Store (READ(0, 0x24, 0xff), Local0)
                        And (Local0, 0xc0, Local1)
                        ShiftRight(Local1, 0x06, Local1)


@@ -297,7 +297,7 @@ Device (SIO1)
                        CreateByteField(RSRC, 0x05, IORH)
                        CreateByteField(RSRC,
                                \_SB.PCI0.LPCB.SIO1.COMB._CRS._IRB._INT, IRQL)
                        CreateByteField(RSRC, 0x05, IORH)
                        CreateByteField(RSRC,
                                \_SB.PCI0.LPCB.SIO1.COMB._CRS._IRB._INT, IRQL)

-                       
+

                        Store (READ(0, 0x25, 0xff), Local0)
                        And (Local0, 0xc0, Local1)
                        ShiftRight(Local1, 0x06, Local1)
                        Store (READ(0, 0x25, 0xff), Local0)
                        And (Local0, 0xc0, Local1)
                        ShiftRight(Local1, 0x06, Local1)

diff --git a/src/mainboard/roda/rk886ex/acpi/thermal.asl b/src/mainboard/roda/rk886ex/acpi/thermal.asl
index cea3e8ea7beaecb33e50e1a7eb15ef066e443a8d..b7efc53c3a44fb78ecb6aab69b4ef5c79cc7416c 100644 (file)
--- a/src/mainboard/roda/rk886ex/acpi/thermal.asl
+++ b/src/mainboard/roda/rk886ex/acpi/thermal.asl
@@ -27,7 +27,7 @@ Scope (\_TZ)
        {
 
                // FIXME these could/should be read from the
        {
 
                // FIXME these could/should be read from the

-               // GNVS area, so they can be controlled by 
+               // GNVS area, so they can be controlled by

                // coreboot
                Name(TC1V, 0x04)
                Name(TC2V, 0x03)
                // coreboot
                Name(TC1V, 0x04)
                Name(TC2V, 0x03)

diff --git a/src/mainboard/roda/rk886ex/acpi_tables.c b/src/mainboard/roda/rk886ex/acpi_tables.c
index d89adf5e8b508937b9a2f583f3070d2b4ed335ed..00088f7b65f7e1504aed648d110242111c20c140 100644 (file)
--- a/src/mainboard/roda/rk886ex/acpi_tables.c
+++ b/src/mainboard/roda/rk886ex/acpi_tables.c
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
 /*
  * This file is part of the coreboot project.

- * 
+ *

  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or
  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or


@@ -161,7 +161,7 @@ unsigned long acpi_fill_madt(unsigned long current)
                                MP_IRQ_POLARITY_HIGH |
                                MP_IRQ_TRIGGER_EDGE, 0x01);
        current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)
                                MP_IRQ_POLARITY_HIGH |
                                MP_IRQ_TRIGGER_EDGE, 0x01);
        current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)

-                               current, 1, MP_IRQ_POLARITY_HIGH | 
+                               current, 1, MP_IRQ_POLARITY_HIGH |

                                MP_IRQ_TRIGGER_EDGE, 0x01);
 
        /* INT_SRC_OVR */
                                MP_IRQ_TRIGGER_EDGE, 0x01);
 
        /* INT_SRC_OVR */


@@ -277,7 +277,7 @@ unsigned long write_acpi_tables(unsigned long start)
        current += dsdt->length;
        memcpy(dsdt, &AmlCode, dsdt->length);
 
        current += dsdt->length;
        memcpy(dsdt, &AmlCode, dsdt->length);
 

-       /* Fix up global NVS region for SMI handler. The GNVS region lives 
+       /* Fix up global NVS region for SMI handler. The GNVS region lives

         * in the (high) table area. The low memory map looks like this:
         *
         * 0x00000000 - 0x000003ff      Real Mode IVT
         * in the (high) table area. The low memory map looks like this:
         *
         * 0x00000000 - 0x000003ff      Real Mode IVT

diff --git a/src/mainboard/roda/rk886ex/chip.h b/src/mainboard/roda/rk886ex/chip.h
index 538f91425e5b49f11a858f0842ab86d624e70017..9fcb67fddba30d4b2506181d3b0c3904b5cf7bc6 100644 (file)
--- a/src/mainboard/roda/rk886ex/chip.h
+++ b/src/mainboard/roda/rk886ex/chip.h
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
 /*
  * This file is part of the coreboot project.

- * 
+ *

  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or modify
  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or modify

diff --git a/src/mainboard/roda/rk886ex/cmos.layout b/src/mainboard/roda/rk886ex/cmos.layout
index 985aa1427571cb2f5e549fdbf49b3032418cc57e..b5ae473ac6a13ecccb3f0f84db64c861e306d6c0 100644 (file)
--- a/src/mainboard/roda/rk886ex/cmos.layout
+++ b/src/mainboard/roda/rk886ex/cmos.layout
@@ -1,6 +1,6 @@
 #
 # This file is part of the coreboot project.
 #
 # This file is part of the coreboot project.

-# 
+#

 # Copyright (C) 2007-2008 coresystems GmbH
 #
 # This program is free software; you can redistribute it and/or
 # Copyright (C) 2007-2008 coresystems GmbH
 #
 # This program is free software; you can redistribute it and/or

diff --git a/src/mainboard/roda/rk886ex/devicetree.cb b/src/mainboard/roda/rk886ex/devicetree.cb
index b578e19a553b607f9df85055a764fcc8b7a7103d..9ce265955e89b85a0f90771bd1ec9473c216b0e8 100644 (file)
--- a/src/mainboard/roda/rk886ex/devicetree.cb
+++ b/src/mainboard/roda/rk886ex/devicetree.cb
@@ -1,6 +1,6 @@
 ##
 ## This file is part of the coreboot project.
 ##
 ## This file is part of the coreboot project.

-## 
+##

 ## Copyright (C) 2007-2009 coresystems GmbH
 ##
 ## This program is free software; you can redistribute it and/or
 ## Copyright (C) 2007-2009 coresystems GmbH
 ##
 ## This program is free software; you can redistribute it and/or


@@ -27,7 +27,7 @@ chip northbridge/intel/i945
                 end
         end
 
                 end
         end
 

-        device pci_domain 0 on 
+        device pci_domain 0 on

                 device pci 00.0 on end # host bridge
                # auto detection:
                #device pci 01.0 off end # i945 PCIe root port
                 device pci 00.0 on end # host bridge
                # auto detection:
                #device pci 01.0 off end # i945 PCIe root port


@@ -79,7 +79,7 @@ chip northbridge/intel/i945
                                        device pci 3.3 off end  # smartcard
                                end
                        end # PCI bridge
                                        device pci 3.3 off end  # smartcard
                                end
                        end # PCI bridge

-                       #device pci 1e.2 off end # AC'97 Audio 
+                       #device pci 1e.2 off end # AC'97 Audio

                        #device pci 1e.3 off end # AC'97 Modem
                         device pci 1f.0 on # LPC bridge
                                 chip superio/smsc/lpc47n227
                        #device pci 1e.3 off end # AC'97 Modem
                         device pci 1f.0 on # LPC bridge
                                 chip superio/smsc/lpc47n227

diff --git a/src/mainboard/roda/rk886ex/dsdt.asl b/src/mainboard/roda/rk886ex/dsdt.asl
index 67539cce53b620663a267ae18a3d24f03711efe3..593b8d351fe2bd7e61e5abe3a9e1616a591ef5f1 100644 (file)
--- a/src/mainboard/roda/rk886ex/dsdt.asl
+++ b/src/mainboard/roda/rk886ex/dsdt.asl
@@ -36,7 +36,7 @@ DefinitionBlock(
 
        // General Purpose Events
        #include "acpi/gpe.asl"
 
        // General Purpose Events
        #include "acpi/gpe.asl"

-       
+

        // mainboard specific devices
        #include "acpi/mainboard.asl"
 
        // mainboard specific devices
        #include "acpi/mainboard.asl"
 

diff --git a/src/mainboard/roda/rk886ex/ec.c b/src/mainboard/roda/rk886ex/ec.c
index f2d23ad6c53eafbf8ed8e72bbed7355140b66adc..4c39a8419e1c35f6f2145155d2923035382bcb2e 100644 (file)
--- a/src/mainboard/roda/rk886ex/ec.c
+++ b/src/mainboard/roda/rk886ex/ec.c
@@ -35,7 +35,7 @@ int send_ec_command(u8 command)
                        printk(BIOS_SPEW, ".");
        }
        if (!timeout) {
                        printk(BIOS_SPEW, ".");
        }
        if (!timeout) {

-               printk(BIOS_DEBUG, "Timeout while sending command 0x%02x to EC!\n", 
+               printk(BIOS_DEBUG, "Timeout while sending command 0x%02x to EC!\n",

                                command);
                // return -1;
        }
                                command);
                // return -1;
        }

diff --git a/src/mainboard/roda/rk886ex/m3885.c b/src/mainboard/roda/rk886ex/m3885.c
index 62752e906537c5d4b1af6c67746c760f0200b51e..5173ecfd391d65e995e5d7ce11b72b35ce3c7463 100644 (file)
--- a/src/mainboard/roda/rk886ex/m3885.c
+++ b/src/mainboard/roda/rk886ex/m3885.c
@@ -54,7 +54,7 @@ static u8 variables[] = {
        0x1e, 0xff, 0x87,  // FuncKey Task = c5 Command Data (funcTsk)
        0x1f, 0xff, 0x9f,  // Delayed Task = c5 Command Data (dlyTsk1)
        0x20, 0xff, 0x9f,  // Wake-Up Task = c5 Command Data (wakeTsk)
        0x1e, 0xff, 0x87,  // FuncKey Task = c5 Command Data (funcTsk)
        0x1f, 0xff, 0x9f,  // Delayed Task = c5 Command Data (dlyTsk1)
        0x20, 0xff, 0x9f,  // Wake-Up Task = c5 Command Data (wakeTsk)

-       // 
+       //

        0x21, 0xff, 0x08,  // WigglePin Pulse Width * 2.4ms (tmPulse)
        0x24, 0xff, 0x30,  // Keyboard State Flags (kState7)
        //
        0x21, 0xff, 0x08,  // WigglePin Pulse Width * 2.4ms (tmPulse)
        0x24, 0xff, 0x30,  // Keyboard State Flags (kState7)
        //


@@ -121,7 +121,7 @@ static int send_kbd_command(u8 command)
                        printk(BIOS_SPEW, ".");
        }
        if (!timeout) {
                        printk(BIOS_SPEW, ".");
        }
        if (!timeout) {

-               printk(BIOS_DEBUG, "Timeout while sending command 0x%02x to EC!\n", 
+               printk(BIOS_DEBUG, "Timeout while sending command 0x%02x to EC!\n",

                                command);
                // return -1;
        }
                                command);
                // return -1;
        }


@@ -249,7 +249,7 @@ void m3885_configure_multikey(void)
                m3885_set_proc_ram(i + 0x80, matrix[i]);
        }
 
                m3885_set_proc_ram(i + 0x80, matrix[i]);
        }
 

-       
+

        /* ram bank 2 */
        m3885_set_variable(0x0c, (kstate5_flags & (~(7 << 4))) | (2 << 4));
 
        /* ram bank 2 */
        m3885_set_variable(0x0c, (kstate5_flags & (~(7 << 4))) | (2 << 4));
 


@@ -303,7 +303,7 @@ void m3885_configure_multikey(void)
 
        /* Critical Task */
        m3885_set_proc_ram(0xf3, 0x5d);
 
        /* Critical Task */
        m3885_set_proc_ram(0xf3, 0x5d);

-       
+

        /* Thermal Polling Period */
        m3885_set_proc_ram(0xf9, 0x0a);
 
        /* Thermal Polling Period */
        m3885_set_proc_ram(0xf9, 0x0a);
 


@@ -316,21 +316,21 @@ void m3885_configure_multikey(void)
        else
                reg8 = 0x9a;
        m3885_set_proc_ram(0xd0, reg8); // P60SPEC
        else
                reg8 = 0x9a;
        m3885_set_proc_ram(0xd0, reg8); // P60SPEC

-       
+

        /* SENSE1# */
        if (m3885_read_port() & (1 << 2))
                reg8 = 0x8a;
        else
                reg8 = 0x9a;
        m3885_set_proc_ram(0xd2, reg8); // P62SPEC
        /* SENSE1# */
        if (m3885_read_port() & (1 << 2))
                reg8 = 0x8a;
        else
                reg8 = 0x9a;
        m3885_set_proc_ram(0xd2, reg8); // P62SPEC

-       
+

        /* SENSE2# */
        if (m3885_read_port() & (1 << 3))
                reg8 = 0x8a;
        else
                reg8 = 0x9a;
        m3885_set_proc_ram(0xd3, reg8); // P63SPEC
        /* SENSE2# */
        if (m3885_read_port() & (1 << 3))
                reg8 = 0x8a;
        else
                reg8 = 0x9a;
        m3885_set_proc_ram(0xd3, reg8); // P63SPEC

-       
+

        /* Low Active Port */
        m3885_set_proc_ram(0xd1, 0x88); // P61SPEC
        m3885_set_proc_ram(0xd6, 0x88); // P66SPEC
        /* Low Active Port */
        m3885_set_proc_ram(0xd1, 0x88); // P61SPEC
        m3885_set_proc_ram(0xd6, 0x88); // P66SPEC

diff --git a/src/mainboard/roda/rk886ex/mainboard.c b/src/mainboard/roda/rk886ex/mainboard.c
index f23a15932e21ef282678c92295986d55ace2f9ef..acfdfaa67b06c0489ac92ce00207d54cfeb49a2a 100644 (file)
--- a/src/mainboard/roda/rk886ex/mainboard.c
+++ b/src/mainboard/roda/rk886ex/mainboard.c
@@ -114,7 +114,7 @@ static void dump_runtime_registers(void)
 }
 #endif
 
 }
 #endif
 

-static void mainboard_enable(device_t dev) 
+static void mainboard_enable(device_t dev)

 {
        /* Configure the MultiKey controller */
        // m3885_configure_multikey();
 {
        /* Configure the MultiKey controller */
        // m3885_configure_multikey();

diff --git a/src/mainboard/roda/rk886ex/mainboard_smi.c b/src/mainboard/roda/rk886ex/mainboard_smi.c
index 947f642802e61b6d571d890212de5b19732ceb81..a87d99da476facd840192b743b312280d5623ba5 100644 (file)
--- a/src/mainboard/roda/rk886ex/mainboard_smi.c
+++ b/src/mainboard/roda/rk886ex/mainboard_smi.c
@@ -25,7 +25,7 @@
 #include <cpu/x86/smm.h>
 #include "../../../southbridge/intel/i82801gx/i82801gx_nvs.h"
 
 #include <cpu/x86/smm.h>
 #include "../../../southbridge/intel/i82801gx/i82801gx_nvs.h"
 

-/* The southbridge SMI handler checks whether gnvs has a 
+/* The southbridge SMI handler checks whether gnvs has a

  * valid pointer before calling the trap handler
  */
 extern global_nvs_t *gnvs;
  * valid pointer before calling the trap handler
  */
 extern global_nvs_t *gnvs;

diff --git a/src/mainboard/roda/rk886ex/mptable.c b/src/mainboard/roda/rk886ex/mptable.c
index c9de525d11b527a7ccd5bfdbdeaf2953f097f7eb..027be50b99fd90e78c8d76c49da62bc2b7171f2e 100644 (file)
--- a/src/mainboard/roda/rk886ex/mptable.c
+++ b/src/mainboard/roda/rk886ex/mptable.c
@@ -71,7 +71,7 @@ static void *smp_write_config_table(void *v)
 
        /* Legacy Interrupts */
 
 
        /* Legacy Interrupts */
 

-       /* I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN# */ 
+       /* I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN# */

        smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, 0x2, 0x0);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x1, 0x2, 0x1);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, 0x2, 0x2);
        smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, 0x2, 0x0);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x1, 0x2, 0x1);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, 0x2, 0x2);

diff --git a/src/mainboard/roda/rk886ex/romstage.c b/src/mainboard/roda/rk886ex/romstage.c
index c888871e5f4288c18cbb430a10b8fa353d9247c8..044107cd5aa4326d55d0d9fbff95fd1c4fe22b5b 100644 (file)
--- a/src/mainboard/roda/rk886ex/romstage.c
+++ b/src/mainboard/roda/rk886ex/romstage.c
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
 /*
  * This file is part of the coreboot project.

- * 
+ *

  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or
  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or


@@ -184,7 +184,7 @@ static void rcba_config(void)
        RCBA32(0x3400) = (1 << 2);
 
        /* Disable unused devices */
        RCBA32(0x3400) = (1 << 2);
 
        /* Disable unused devices */

-       RCBA32(0x3418) = FD_PCIE6 | FD_PCIE5 | FD_PCIE3 | FD_PCIE2 | 
+       RCBA32(0x3418) = FD_PCIE6 | FD_PCIE5 | FD_PCIE3 | FD_PCIE2 |

                         FD_INTLAN | FD_ACMOD | FD_HDAUD | FD_PATA;
        RCBA32(0x3418) |= (1 << 0); // Required.
 
                         FD_INTLAN | FD_ACMOD | FD_HDAUD | FD_PATA;
        RCBA32(0x3418) |= (1 << 0); // Required.
 


@@ -266,7 +266,7 @@ static void init_artec_dongle(void)
 #include <cbmem.h>
 
 // Now, this needs to be included because it relies on the symbol
 #include <cbmem.h>
 
 // Now, this needs to be included because it relies on the symbol

-// __PRE_RAM__ being set during CAR stage (in order to compile the 
+// __PRE_RAM__ being set during CAR stage (in order to compile the

 // BSS free versions of the functions). Either rewrite the code
 // to be always BSS free, or invent a flag that's better suited than
 // __PRE_RAM__ to determine whether we're in ram init stage (stage 1)
 // BSS free versions of the functions). Either rewrite the code
 // to be always BSS free, or invent a flag that's better suited than
 // __PRE_RAM__ to determine whether we're in ram init stage (stage 1)


@@ -330,7 +330,7 @@ void main(unsigned long bist)
 
        /* Enable SPD ROMs and DDR-II DRAM */
        enable_smbus();
 
        /* Enable SPD ROMs and DDR-II DRAM */
        enable_smbus();

-       
+

 #if CONFIG_DEFAULT_CONSOLE_LOGLEVEL > 8
        dump_spd_registers();
 #endif
 #if CONFIG_DEFAULT_CONSOLE_LOGLEVEL > 8
        dump_spd_registers();
 #endif


@@ -340,8 +340,8 @@ void main(unsigned long bist)
        /* Perform some initialization that must run before stage2 */
        early_ich7_init();
 
        /* Perform some initialization that must run before stage2 */
        early_ich7_init();
 

-       /* This should probably go away. Until now it is required 
-        * and mainboard specific 
+       /* This should probably go away. Until now it is required
+        * and mainboard specific

         */
        rcba_config();
 
         */
        rcba_config();
 


@@ -385,7 +385,7 @@ void main(unsigned long bist)
                 * memory completely, but that's a wonderful clean up task for another
                 * day.
                 */
                 * memory completely, but that's a wonderful clean up task for another
                 * day.
                 */

-               if (resume_backup_memory) 
+               if (resume_backup_memory)

                        memcpy(resume_backup_memory, (void *)CONFIG_RAMBASE, HIGH_MEMORY_SAVE);
 
                /* Magic for S3 resume */
                        memcpy(resume_backup_memory, (void *)CONFIG_RAMBASE, HIGH_MEMORY_SAVE);
 
                /* Magic for S3 resume */

diff --git a/src/mainboard/roda/rk886ex/rtl8168.c b/src/mainboard/roda/rk886ex/rtl8168.c
index e278bcfb4eaf76d0c5f65bea2a3050774b79e603..04fd56ccb18f0e71f84969e5b5531e9396c9107d 100644 (file)
--- a/src/mainboard/roda/rk886ex/rtl8168.c
+++ b/src/mainboard/roda/rk886ex/rtl8168.c
@@ -28,7 +28,7 @@
 static void nic_init(struct device *dev)
 {
        printk(BIOS_DEBUG, "Initializing RTL8168 Gigabit Ethernet\n");
 static void nic_init(struct device *dev)
 {
        printk(BIOS_DEBUG, "Initializing RTL8168 Gigabit Ethernet\n");

-       // Nothing to do yet, but this has to be here to keep 
+       // Nothing to do yet, but this has to be here to keep

        // coreboot from trying to execute an option ROM.
 }
 
        // coreboot from trying to execute an option ROM.
 }
 

diff --git a/src/mainboard/soyo/Kconfig b/src/mainboard/soyo/Kconfig
index bb20b7475a45153a23a2fb3a94172b5d4024158b..224e9a7409fa080e1b8ffedf71fddfa51fd5ef71 100644 (file)
--- a/src/mainboard/soyo/Kconfig
+++ b/src/mainboard/soyo/Kconfig
@@ -21,7 +21,7 @@
 choice
        prompt "Mainboard model"
        depends on VENDOR_SOYO
 choice
        prompt "Mainboard model"
        depends on VENDOR_SOYO

-       
+

 source "src/mainboard/soyo/sy-6ba-plus-iii/Kconfig"
 
 endchoice
 source "src/mainboard/soyo/sy-6ba-plus-iii/Kconfig"
 
 endchoice

diff --git a/src/mainboard/sunw/Kconfig b/src/mainboard/sunw/Kconfig
index b04d9053c08ff7ae912c7c613d0fc6e11362da4c..8a42be74148b98d1c4b809743b02ca40728d138e 100644 (file)
--- a/src/mainboard/sunw/Kconfig
+++ b/src/mainboard/sunw/Kconfig
@@ -1,7 +1,7 @@
 choice
        prompt "Mainboard model"
        depends on VENDOR_SUNW
 choice
        prompt "Mainboard model"
        depends on VENDOR_SUNW

-       
+

 source "src/mainboard/sunw/ultra40/Kconfig"
 
 endchoice
 source "src/mainboard/sunw/ultra40/Kconfig"
 
 endchoice

diff --git a/src/mainboard/sunw/ultra40/devicetree.cb b/src/mainboard/sunw/ultra40/devicetree.cb
index afa6f66bebf6c1970741548a2e45012f7eecbf09..e7917495b795756c0fcd43ea702674f73eb78bdf 100644 (file)
--- a/src/mainboard/sunw/ultra40/devicetree.cb
+++ b/src/mainboard/sunw/ultra40/devicetree.cb
@@ -7,9 +7,9 @@ chip northbridge/amd/amdk8/root_complex
        device pci_domain 0 on
                chip northbridge/amd/amdk8 #mc0
                        device pci 18.0 on end # link 0
        device pci_domain 0 on
                chip northbridge/amd/amdk8 #mc0
                        device pci 18.0 on end # link 0

-                       device pci 18.0 on # link1 
-                               #  devices on link 0, link 0 == LDT 0 
-                               chip southbridge/nvidia/ck804 
+                       device pci 18.0 on # link1
+                               #  devices on link 0, link 0 == LDT 0
+                               chip southbridge/nvidia/ck804

                                        device pci 0.0 on end   # HT
                                        device pci 1.0 on # LPC
                                                chip superio/smsc/lpc47m10x
                                        device pci 0.0 on end   # HT
                                        device pci 1.0 on # LPC
                                                chip superio/smsc/lpc47m10x


@@ -40,29 +40,29 @@ chip northbridge/amd/amdk8/root_complex
                                        end
                                        device pci 1.1 on # SM 0
                                                 chip drivers/generic/generic #dimm 0-0-0
                                        end
                                        device pci 1.1 on # SM 0
                                                 chip drivers/generic/generic #dimm 0-0-0

-                                                        device i2c 50 on end  
-                                                end              
+                                                        device i2c 50 on end
+                                                end

                                                 chip drivers/generic/generic #dimm 0-0-1
                                                         device i2c 51 on end
                                                 chip drivers/generic/generic #dimm 0-0-1
                                                         device i2c 51 on end

-                                                end     
+                                                end

                                                 chip drivers/generic/generic #dimm 0-1-0
                                                         device i2c 52 on end
                                                 chip drivers/generic/generic #dimm 0-1-0
                                                         device i2c 52 on end

-                                                end             
+                                                end

                                                 chip drivers/generic/generic #dimm 0-1-1
                                                         device i2c 53 on end
                                                 chip drivers/generic/generic #dimm 0-1-1
                                                         device i2c 53 on end

-                                                end              
+                                                end

                                                 chip drivers/generic/generic #dimm 1-0-0
                                                         device i2c 54 on end
                                                 chip drivers/generic/generic #dimm 1-0-0
                                                         device i2c 54 on end

-                                                end     
+                                                end

                                                 chip drivers/generic/generic #dimm 1-0-1
                                                         device i2c 55 on end
                                                 chip drivers/generic/generic #dimm 1-0-1
                                                         device i2c 55 on end

-                                                end     
+                                                end

                                                 chip drivers/generic/generic #dimm 1-1-0
                                                         device i2c 56 on end
                                                 chip drivers/generic/generic #dimm 1-1-0
                                                         device i2c 56 on end

-                                                end     
+                                                end

                                                 chip drivers/generic/generic #dimm 1-1-1
                                                         device i2c 57 on end
                                                 chip drivers/generic/generic #dimm 1-1-1
                                                         device i2c 57 on end

-                                                end 
+                                                end

                                        end # SM
                                         device pci 1.1 on # SM 1
 #PCI device smbus address will depend on addon pci device, do we need to scan_smbus_bus?
                                        end # SM
                                         device pci 1.1 on # SM 1
 #PCI device smbus address will depend on addon pci device, do we need to scan_smbus_bus?


@@ -71,24 +71,24 @@ chip northbridge/amd/amdk8/root_complex
 #                                                end
 #                                                chip drivers/generic/generic #PCIXB Slot1
 #                                                        device i2c 51 on end
 #                                                end
 #                                                chip drivers/generic/generic #PCIXB Slot1
 #                                                        device i2c 51 on end

-#                                                end     
+#                                                end

 #                                                chip drivers/generic/generic #PCIXB Slot2
 #                                                        device i2c 52 on end
 #                                                chip drivers/generic/generic #PCIXB Slot2
 #                                                        device i2c 52 on end

-#                                                end             
+#                                                end

 #                                                chip drivers/generic/generic #PCI Slot1
 #                                                        device i2c 53 on end
 #                                                chip drivers/generic/generic #PCI Slot1
 #                                                        device i2c 53 on end

-#                                                end              
+#                                                end

 #                                                chip drivers/generic/generic #Master CK804 PCI-E
 #                                                        device i2c 54 on end
 #                                                chip drivers/generic/generic #Master CK804 PCI-E
 #                                                        device i2c 54 on end

-#                                                end     
+#                                                end

 #                                                chip drivers/generic/generic #Slave CK804 PCI-E
 #                                                        device i2c 55 on end
 #                                                chip drivers/generic/generic #Slave CK804 PCI-E
 #                                                        device i2c 55 on end

-#                                                end             
+#                                                end

                                                 chip drivers/generic/generic #MAC EEPROM
                                                         device i2c 51 on end
                                                 chip drivers/generic/generic #MAC EEPROM
                                                         device i2c 51 on end

-                                                end 
+                                                end

 
 

-                                        end # SM 
+                                        end # SM

                                        device pci 2.0 on end # USB 1.1
                                        device pci 2.1 on end # USB 2
                                        device pci 4.0 on end # ACI
                                        device pci 2.0 on end # USB 1.1
                                        device pci 2.1 on end # USB 2
                                        device pci 4.0 on end # ACI


@@ -109,18 +109,18 @@ chip northbridge/amd/amdk8/root_complex
                                        register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1
                                        register "mac_eeprom_addr" = "0x51"
                                end
                                        register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1
                                        register "mac_eeprom_addr" = "0x51"
                                end

-                       end #  device pci 18.0 
+                       end #  device pci 18.0

                        device pci 18.0 on end # link 2
                        device pci 18.1 on end
                        device pci 18.2 on end
                        device pci 18.3 on end
                end # mc0
                        device pci 18.0 on end # link 2
                        device pci 18.1 on end
                        device pci 18.2 on end
                        device pci 18.3 on end
                end # mc0

-               
+

                chip northbridge/amd/amdk8
                        device pci 19.0 on end # link 0
                chip northbridge/amd/amdk8
                        device pci 19.0 on end # link 0

-               device pci 19.0 on   
+               device pci 19.0 on

                                #  devices on link 1, link 1 == LDT 1
                                #  devices on link 1, link 1 == LDT 1

-                               chip southbridge/nvidia/ck804 
+                               chip southbridge/nvidia/ck804

                                        device pci 0.0 on end   # HT
                                        device pci 1.0 on end   # LPC
                                        device pci 1.1 off end # SM
                                        device pci 0.0 on end   # HT
                                        device pci 1.0 on end   # LPC
                                        device pci 1.1 off end # SM


@@ -140,13 +140,13 @@ chip northbridge/amd/amdk8/root_complex
                                         register "mac_eeprom_smbus" = "3"
                                         register "mac_eeprom_addr" = "0x51"
                                end
                                         register "mac_eeprom_smbus" = "3"
                                         register "mac_eeprom_addr" = "0x51"
                                end

-                       end #  device pci 19.0 
-                       
+                       end #  device pci 19.0
+

                        device pci 19.0 on end
                        device pci 19.1 on end
                        device pci 19.2 on end
                        device pci 19.3 on end
                end
        end # PCI domain
                        device pci 19.0 on end
                        device pci 19.1 on end
                        device pci 19.2 on end
                        device pci 19.3 on end
                end
        end # PCI domain

-       
+

 end #root_complex
 end #root_complex

diff --git a/src/mainboard/sunw/ultra40/get_bus_conf.c b/src/mainboard/sunw/ultra40/get_bus_conf.c
index 53162da97f23f028882467fec36e6e860a388368..8309c8a10f9d620fb31b2cddf2bdb7dfa8034ee8 100644 (file)
--- a/src/mainboard/sunw/ultra40/get_bus_conf.c
+++ b/src/mainboard/sunw/ultra40/get_bus_conf.c
@@ -34,7 +34,7 @@
         unsigned apicid_ck804b;
 
 unsigned sblk;
         unsigned apicid_ck804b;
 
 unsigned sblk;

-unsigned pci1234[] = 
+unsigned pci1234[] =

 {        //Here you only need to set value in pci1234 for HT-IO that could be installed or not
         //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
         0x0000ff0,
 {        //Here you only need to set value in pci1234 for HT-IO that could be installed or not
         //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
         0x0000ff0,


@@ -48,7 +48,7 @@ unsigned pci1234[] =
 };
 unsigned hc_possible_num;
 unsigned sbdn;
 };
 unsigned hc_possible_num;
 unsigned sbdn;

-unsigned hcdn[] = 
+unsigned hcdn[] =

 { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
        0x20202020,
        0x20202020,
 { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
        0x20202020,
        0x20202020,


@@ -77,10 +77,10 @@ void get_bus_conf(void)
 
        get_bus_conf_done = 1;
 
 
        get_bus_conf_done = 1;
 

-       hc_possible_num = ARRAY_SIZE(pci1234);  
-       
+       hc_possible_num = ARRAY_SIZE(pci1234);
+

        get_sblk_pci1234();
        get_sblk_pci1234();

-       
+

        sbdn = (hcdn[0] & 0xff); // first byte of first chain
 
        sbdn3 = (hcdn[1] & 0xff);
        sbdn = (hcdn[0] & 0xff); // first byte of first chain
 
        sbdn3 = (hcdn[1] & 0xff);


@@ -262,8 +262,8 @@ void get_bus_conf(void)
 /*I/O APICs:   APIC ID Version State           Address*/
 #if CONFIG_LOGICAL_CPUS==1
        apicid_base = get_apicid_base(4);
 /*I/O APICs:   APIC ID Version State           Address*/
 #if CONFIG_LOGICAL_CPUS==1
        apicid_base = get_apicid_base(4);

-#else 
-       apicid_base = CONFIG_MAX_PHYSICAL_CPUS; 
+#else
+       apicid_base = CONFIG_MAX_PHYSICAL_CPUS;

 #endif
        apicid_ck804 = apicid_base+0;
         apicid_8131_1 = apicid_base+1;
 #endif
        apicid_ck804 = apicid_base+0;
         apicid_8131_1 = apicid_base+1;

diff --git a/src/mainboard/sunw/ultra40/irq_tables.c b/src/mainboard/sunw/ultra40/irq_tables.c
index 2bbbe7b11072b4fc97e6283c18146051c21eb289..324c87d9950dfc6caf028a625a68d1176febefc4 100644 (file)
--- a/src/mainboard/sunw/ultra40/irq_tables.c
+++ b/src/mainboard/sunw/ultra40/irq_tables.c
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!

    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 
    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 


@@ -11,11 +11,11 @@
 #include <arch/pirq_routing.h>
 #include <cpu/amd/amdk8_sysconf.h>
 
 #include <arch/pirq_routing.h>
 #include <cpu/amd/amdk8_sysconf.h>
 

-static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0, 
+static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,

                uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
                uint8_t slot, uint8_t rfu)
 {
                uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
                uint8_t slot, uint8_t rfu)
 {

-        pirq_info->bus = bus; 
+        pirq_info->bus = bus;

         pirq_info->devfn = devfn;
                 pirq_info->irq[0].link = link0;
                 pirq_info->irq[0].bitmap = bitmap0;
         pirq_info->devfn = devfn;
                 pirq_info->irq[0].link = link0;
                 pirq_info->irq[0].bitmap = bitmap0;


@@ -76,15 +76,15 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 
        pirq = (void *)(addr);
        v = (uint8_t *)(addr);
 
        pirq = (void *)(addr);
        v = (uint8_t *)(addr);

-       
+

        pirq->signature = PIRQ_SIGNATURE;
        pirq->version  = PIRQ_VERSION;
        pirq->signature = PIRQ_SIGNATURE;
        pirq->version  = PIRQ_VERSION;

-       
+

        pirq->rtr_bus = bus_ck804_0;
        pirq->rtr_devfn = ((sbdn+9)<<3)|0;
 
        pirq->exclusive_irqs = 0;
        pirq->rtr_bus = bus_ck804_0;
        pirq->rtr_devfn = ((sbdn+9)<<3)|0;
 
        pirq->exclusive_irqs = 0;

-       
+

        pirq->rtr_vendor = 0x10de;
        pirq->rtr_device = 0x005c;
 
        pirq->rtr_vendor = 0x10de;
        pirq->rtr_device = 0x005c;
 


@@ -100,9 +100,9 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 //pcix bridge
         write_pirq_info(pirq_info, bus_8131_0, (sbdn3<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
         pirq_info++; slot_num++;
 //pcix bridge
         write_pirq_info(pirq_info, bus_8131_0, (sbdn3<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
         pirq_info++; slot_num++;

-        
-       if(pci1234[2] & 0xf) {     
-       //second pci beidge   
+
+       if(pci1234[2] & 0xf) {
+       //second pci beidge

                write_pirq_info(pirq_info, bus_ck804b_0, ((sbdnb+9)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0x0, 0);
                pirq_info++; slot_num++;
        }
                write_pirq_info(pirq_info, bus_ck804b_0, ((sbdnb+9)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0x0, 0);
                pirq_info++; slot_num++;
        }


@@ -139,10 +139,10 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 //Slot2 pci
         write_pirq_info(pirq_info, bus_ck804_1, (0x4<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 2, 0);
         pirq_info++; slot_num++;
 //Slot2 pci
         write_pirq_info(pirq_info, bus_ck804_1, (0x4<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 2, 0);
         pirq_info++; slot_num++;

-//nic   
+//nic

         write_pirq_info(pirq_info, bus_ck804b_0, ((sbdnb+0xa)<<3)|0, 0x1, 0xdef8, 0, 0, 0, 0, 0, 0, 0, 0);
         pirq_info++; slot_num++;
         write_pirq_info(pirq_info, bus_ck804b_0, ((sbdnb+0xa)<<3)|0, 0x1, 0xdef8, 0, 0, 0, 0, 0, 0, 0, 0);
         pirq_info++; slot_num++;

-//Slot3 PCIE x16 
+//Slot3 PCIE x16

         write_pirq_info(pirq_info, bus_ck804b_5, (0<<3)|0, 0x3, 0xdef8, 0x4, 0xdef8, 0x1, 0xdef8, 0x2, 0xdef8, 3, 0);
         pirq_info++; slot_num++;
 
         write_pirq_info(pirq_info, bus_ck804b_5, (0<<3)|0, 0x3, 0xdef8, 0x4, 0xdef8, 0x1, 0xdef8, 0x2, 0xdef8, 3, 0);
         pirq_info++; slot_num++;
 


@@ -162,11 +162,11 @@ unsigned long write_pirq_routing_table(unsigned long addr)
         write_pirq_info(pirq_info, bus_8131_1, (4<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 6, 0);
         pirq_info++; slot_num++;
 #endif
         write_pirq_info(pirq_info, bus_8131_1, (4<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 6, 0);
         pirq_info++; slot_num++;
 #endif

-                
-       pirq->size = 32 + 16 * slot_num; 
+
+       pirq->size = 32 + 16 * slot_num;

 
         for (i = 0; i < pirq->size; i++)
 
         for (i = 0; i < pirq->size; i++)

-                sum += v[i];   
+                sum += v[i];

 
        sum = pirq->checksum - sum;
 
 
        sum = pirq->checksum - sum;
 

diff --git a/src/mainboard/sunw/ultra40/mptable.c b/src/mainboard/sunw/ultra40/mptable.c
index b019ffea1380bd5e8cdb68a759c11bd94b577c32..be92616e2dc461ced1c9ef834a676aa665100d5d 100644 (file)
--- a/src/mainboard/sunw/ultra40/mptable.c
+++ b/src/mainboard/sunw/ultra40/mptable.c
@@ -133,7 +133,7 @@ static void *smp_write_config_table(void *v)
            }
 
        }
            }
 
        }

-  
+

 /*I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN#
 */     smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_ck804, 0x0);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x1, apicid_ck804, 0x1);
 /*I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN#
 */     smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_ck804, 0x0);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x1, apicid_ck804, 0x1);


@@ -212,7 +212,7 @@ static void *smp_write_config_table(void *v)
 
 //Channel A of 8131
 
 
 //Channel A of 8131
 

-//Slot 6 PCIX 133/100/66       
+//Slot 6 PCIX 133/100/66

         for(i=0;i<4;i++) {
                 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (4<<2)|i, apicid_8131_1, (0+i)%4); //24
         }
         for(i=0;i<4;i++) {
                 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (4<<2)|i, apicid_8131_1, (0+i)%4); //24
         }

diff --git a/src/mainboard/sunw/ultra40/resourcemap.c b/src/mainboard/sunw/ultra40/resourcemap.c
index 726373093fd3000ac89ef140b489bee1a774a180..eae21b481724f4efe4d2f436e2c9d4f3b33f7fb8 100644 (file)
--- a/src/mainboard/sunw/ultra40/resourcemap.c
+++ b/src/mainboard/sunw/ultra40/resourcemap.c
@@ -145,7 +145,7 @@ static void setup_ultra40_resource_map(void)
                 *         1 = base/limit registers i are read-only
                 * [ 7: 4] Reserved
                 * [31: 8] Memory-Mapped I/O Base Address i (39-16)
                 *         1 = base/limit registers i are read-only
                 * [ 7: 4] Reserved
                 * [31: 8] Memory-Mapped I/O Base Address i (39-16)

-                *         This field defines the upper address bits of a 40bit address 
+                *         This field defines the upper address bits of a 40bit address

                 *         that defines the start of memory-mapped I/O region i
                 */
                PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,
                 *         that defines the start of memory-mapped I/O region i
                 */
                PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,


@@ -183,7 +183,7 @@ static void setup_ultra40_resource_map(void)
                 * [31:25] Reserved
                 */
                PCI_ADDR(0, 0x18, 1, 0xC4), 0xFE000FC8, 0x00007000,
                 * [31:25] Reserved
                 */
                PCI_ADDR(0, 0x18, 1, 0xC4), 0xFE000FC8, 0x00007000,

-               PCI_ADDR(0, 0x18, 1, 0xCC), 0xFE000FC8, 0x01fff001, 
+               PCI_ADDR(0, 0x18, 1, 0xCC), 0xFE000FC8, 0x01fff001,

                PCI_ADDR(0, 0x18, 1, 0xD4), 0xFE000FC8, 0x00000000,
                PCI_ADDR(0, 0x18, 1, 0xDC), 0xFE000FC8, 0x00000000,
 
                PCI_ADDR(0, 0x18, 1, 0xD4), 0xFE000FC8, 0x00000000,
                PCI_ADDR(0, 0x18, 1, 0xDC), 0xFE000FC8, 0x00000000,
 


@@ -201,7 +201,7 @@ static void setup_ultra40_resource_map(void)
                 * [ 3: 2] Reserved
                 * [ 4: 4] VGA Enable
                 *         0 = VGA matches Disabled
                 * [ 3: 2] Reserved
                 * [ 4: 4] VGA Enable
                 *         0 = VGA matches Disabled

-                *         1 = matches all address < 64K and where A[9:0] is in the 
+                *         1 = matches all address < 64K and where A[9:0] is in the

                 *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
                 * [ 5: 5] ISA Enable
                 *         0 = ISA matches Disabled
                 *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
                 * [ 5: 5] ISA Enable
                 *         0 = ISA matches Disabled


@@ -209,7 +209,7 @@ static void setup_ultra40_resource_map(void)
                 *             from matching agains this base/limit pair
                 * [11: 6] Reserved
                 * [24:12] PCI I/O Base i
                 *             from matching agains this base/limit pair
                 * [11: 6] Reserved
                 * [24:12] PCI I/O Base i

-                *         This field defines the start of PCI I/O region n 
+                *         This field defines the start of PCI I/O region n

                 * [31:25] Reserved
                 */
                PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000033,
                 * [31:25] Reserved
                 */
                PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000033,

diff --git a/src/mainboard/sunw/ultra40/romstage.c b/src/mainboard/sunw/ultra40/romstage.c
index de16a4481f14d9d667b47af09dc65f7aa764cb61..76822ce45dc60e04d2697d50b2aa0ddc5845e8a2 100644 (file)
--- a/src/mainboard/sunw/ultra40/romstage.c
+++ b/src/mainboard/sunw/ultra40/romstage.c
@@ -6,7 +6,7 @@
 #define SET_NB_CFG_54 1
 #endif
 
 #define SET_NB_CFG_54 1
 #endif
 

- 
+

 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>


@@ -55,7 +55,7 @@ static void sio_gpio_setup(void)
         unsigned value;
 
         /*Enable onboard scsi*/
         unsigned value;
 
         /*Enable onboard scsi*/

-        lpc47b397_gpio_offset_out(SUPERIO_GPIO_IO_BASE, 0x2c, (1<<7)|(0<<2)|(0<<1)|(0<<0)); // GP21, offset 0x2c, DISABLE_SCSI_L 
+        lpc47b397_gpio_offset_out(SUPERIO_GPIO_IO_BASE, 0x2c, (1<<7)|(0<<2)|(0<<1)|(0<<0)); // GP21, offset 0x2c, DISABLE_SCSI_L

         value = lpc47b397_gpio_offset_in(SUPERIO_GPIO_IO_BASE, 0x4c);
         lpc47b397_gpio_offset_out(SUPERIO_GPIO_IO_BASE, 0x4c, (value|(1<<1)));
 }
         value = lpc47b397_gpio_offset_in(SUPERIO_GPIO_IO_BASE, 0x4c);
         lpc47b397_gpio_offset_out(SUPERIO_GPIO_IO_BASE, 0x4c, (value|(1<<1)));
 }


@@ -76,7 +76,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 #include "lib/generic_sdram.c"
 
  /* tyan does not want the default */
 #include "lib/generic_sdram.c"
 
  /* tyan does not want the default */

-#include "resourcemap.c" 
+#include "resourcemap.c"

 
 #include "cpu/amd/dualcore/dualcore.c"
 
 
 #include "cpu/amd/dualcore/dualcore.c"
 


@@ -111,21 +111,21 @@ static void sio_setup(void)
         unsigned value;
         uint32_t dword;
         uint8_t byte;
         unsigned value;
         uint32_t dword;
         uint8_t byte;

-        
+

         pci_write_config32(PCI_DEV(0, CK804_DEVN_BASE+1, 0), 0xac, 0x047f0400);
         pci_write_config32(PCI_DEV(0, CK804_DEVN_BASE+1, 0), 0xac, 0x047f0400);

-        
+

         byte = pci_read_config32(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0x7b);
         byte = pci_read_config32(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0x7b);

-        byte |= 0x20; 
+        byte |= 0x20;

         pci_write_config8(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0x7b, byte);
         pci_write_config8(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0x7b, byte);

-        
+

         dword = pci_read_config32(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0xa0);
         dword |= (1<<29)|(1<<0);
         pci_write_config32(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0xa0, dword);
         dword = pci_read_config32(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0xa0);
         dword |= (1<<29)|(1<<0);
         pci_write_config32(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0xa0, dword);

-        
+

         lpc47b397_enable_serial(SUPERIO_GPIO_DEV, SUPERIO_GPIO_IO_BASE);
         lpc47b397_enable_serial(SUPERIO_GPIO_DEV, SUPERIO_GPIO_IO_BASE);

-                
+

         value =  lpc47b397_gpio_offset_in(SUPERIO_GPIO_IO_BASE, 0x77);
         value =  lpc47b397_gpio_offset_in(SUPERIO_GPIO_IO_BASE, 0x77);

-        value &= 0xbf; 
+        value &= 0xbf;

         lpc47b397_gpio_offset_out(SUPERIO_GPIO_IO_BASE, 0x77, value);
 }
 
         lpc47b397_gpio_offset_out(SUPERIO_GPIO_IO_BASE, 0x77, value);
 }
 


@@ -165,7 +165,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        lpc47b397_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
         uart_init();
         console_init();
        lpc47b397_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
         uart_init();
         console_init();

-       
+

        /* Halt if there was a built in self test failure */
        report_bist_failure(bist);
 
        /* Halt if there was a built in self test failure */
        report_bist_failure(bist);
 

diff --git a/src/mainboard/supermicro/Kconfig b/src/mainboard/supermicro/Kconfig
index f44677118c10f606465655463f19c4a61be26a35..19487847616ee41ae4a729990b798d06eeccdc61 100644 (file)
--- a/src/mainboard/supermicro/Kconfig
+++ b/src/mainboard/supermicro/Kconfig
@@ -1,7 +1,7 @@
 choice
        prompt "Mainboard model"
        depends on VENDOR_SUPERMICRO
 choice
        prompt "Mainboard model"
        depends on VENDOR_SUPERMICRO

-       
+

 source "src/mainboard/supermicro/h8dme/Kconfig"
 source "src/mainboard/supermicro/h8dmr/Kconfig"
 source "src/mainboard/supermicro/h8dmr_fam10/Kconfig"
 source "src/mainboard/supermicro/h8dme/Kconfig"
 source "src/mainboard/supermicro/h8dmr/Kconfig"
 source "src/mainboard/supermicro/h8dmr_fam10/Kconfig"

diff --git a/src/mainboard/supermicro/h8dme/ap_romstage.c b/src/mainboard/supermicro/h8dme/ap_romstage.c
index 60dd1b275ebe5343c5974e98828ae8004fbd99c7..3454cae31373400220275123d5c5b738c6461bde 100644 (file)
--- a/src/mainboard/supermicro/h8dme/ap_romstage.c
+++ b/src/mainboard/supermicro/h8dme/ap_romstage.c
@@ -25,7 +25,7 @@
 #define RAMINIT_SYSINFO 1
 #define CACHE_AS_RAM_ADDRESS_DEBUG 0
 
 #define RAMINIT_SYSINFO 1
 #define CACHE_AS_RAM_ADDRESS_DEBUG 0
 

-#define SET_NB_CFG_54 1 
+#define SET_NB_CFG_54 1

 
 //used by raminit
 #define QRANK_DIMM_SUPPORT 1
 
 //used by raminit
 #define QRANK_DIMM_SUPPORT 1

diff --git a/src/mainboard/supermicro/h8dme/cmos.layout b/src/mainboard/supermicro/h8dme/cmos.layout
index 9d37e2bba61f0ed9138fb24d7017a6bceec58778..518f9458b698c637260b1df5ed68c682c06f9c9c 100644 (file)
--- a/src/mainboard/supermicro/h8dme/cmos.layout
+++ b/src/mainboard/supermicro/h8dme/cmos.layout
@@ -1,23 +1,23 @@
-## 
+##

 ## This file is part of the coreboot project.
 ## This file is part of the coreboot project.

-## 
+##

 ## Copyright (C) 2007 AMD
 ## Written by Yinghai Lu <yinghailu@amd.com> for AMD.
 ## Copyright (C) 2007 AMD
 ## Written by Yinghai Lu <yinghailu@amd.com> for AMD.

-## 
+##

 ## This program is free software; you can redistribute it and/or modify
 ## it under the terms of the GNU General Public License as published by
 ## the Free Software Foundation; either version 2 of the License, or
 ## (at your option) any later version.
 ## This program is free software; you can redistribute it and/or modify
 ## it under the terms of the GNU General Public License as published by
 ## the Free Software Foundation; either version 2 of the License, or
 ## (at your option) any later version.

-## 
+##

 ## This program is distributed in the hope that it will be useful,
 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 ## GNU General Public License for more details.
 ## This program is distributed in the hope that it will be useful,
 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 ## GNU General Public License for more details.

-## 
+##

 ## You should have received a copy of the GNU General Public License
 ## along with this program; if not, write to the Free Software
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 ## You should have received a copy of the GNU General Public License
 ## along with this program; if not, write to the Free Software
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA

-## 
+##

 
 entries
 
 
 entries
 

diff --git a/src/mainboard/supermicro/h8dme/devicetree.cb b/src/mainboard/supermicro/h8dme/devicetree.cb
index 5d6776a3f288649c0363c431770883a34b367d48..f6f75efb65e0485498472608a8086816d62918f6 100644 (file)
--- a/src/mainboard/supermicro/h8dme/devicetree.cb
+++ b/src/mainboard/supermicro/h8dme/devicetree.cb
@@ -8,9 +8,9 @@ chip northbridge/amd/amdk8/root_complex
                chip northbridge/amd/amdk8 #mc0
                        device pci 18.0 on end
                        device pci 18.0 on end
                chip northbridge/amd/amdk8 #mc0
                        device pci 18.0 on end
                        device pci 18.0 on end

-                       device pci 18.0 on 
-                               #  devices on link 0, link 0 == LDT 0 
-                               chip southbridge/nvidia/mcp55 
+                       device pci 18.0 on
+                               #  devices on link 0, link 0 == LDT 0
+                               chip southbridge/nvidia/mcp55

                                        device pci 0.0 on end   # HT
                                        device pci 1.0 on # LPC
                                                chip superio/winbond/w83627hf
                                        device pci 0.0 on end   # HT
                                        device pci 1.0 on # LPC
                                                chip superio/winbond/w83627hf


@@ -37,14 +37,14 @@ chip northbridge/amd/amdk8/root_complex
                                                                irq 0x70 = 1
                                                                irq 0x72 = 12
                                                        end
                                                                irq 0x70 = 1
                                                                irq 0x72 = 12
                                                        end

-                                                       device pnp 2e.6 off  # SFI 
+                                                       device pnp 2e.6 off  # SFI

                                                                io 0x62 = 0x100
                                                        end
                                                        device pnp 2e.7 off #  GPIO_GAME_MIDI
                                                                io 0x60 = 0x220
                                                                io 0x62 = 0x300
                                                                irq 0x70 = 9
                                                                io 0x62 = 0x100
                                                        end
                                                        device pnp 2e.7 off #  GPIO_GAME_MIDI
                                                                io 0x60 = 0x220
                                                                io 0x62 = 0x300
                                                                irq 0x70 = 9

-                                                       end                                             
+                                                       end

                                                        device pnp 2e.8 off end #  WDTO_PLED
                                                        device pnp 2e.9 off end #  GPIO_SUSLED
                                                        device pnp 2e.a off end #  ACPI
                                                        device pnp 2e.8 off end #  WDTO_PLED
                                                        device pnp 2e.9 off end #  GPIO_SUSLED
                                                        device pnp 2e.a off end #  ACPI


@@ -67,24 +67,24 @@ chip northbridge/amd/amdk8/root_complex
 #                                                end
 #                                                chip drivers/generic/generic #PCIXB Slot1
 #                                                        device i2c 51 on end
 #                                                end
 #                                                chip drivers/generic/generic #PCIXB Slot1
 #                                                        device i2c 51 on end

-#                                                end     
+#                                                end

 #                                                chip drivers/generic/generic #PCIXB Slot2
 #                                                        device i2c 52 on end
 #                                                chip drivers/generic/generic #PCIXB Slot2
 #                                                        device i2c 52 on end

-#                                                end             
+#                                                end

 #                                                chip drivers/generic/generic #PCI Slot1
 #                                                        device i2c 53 on end
 #                                                chip drivers/generic/generic #PCI Slot1
 #                                                        device i2c 53 on end

-#                                                end              
+#                                                end

 #                                                chip drivers/generic/generic #Master MCP55 PCI-E
 #                                                        device i2c 54 on end
 #                                                chip drivers/generic/generic #Master MCP55 PCI-E
 #                                                        device i2c 54 on end

-#                                                end     
+#                                                end

 #                                                chip drivers/generic/generic #Slave MCP55 PCI-E
 #                                                        device i2c 55 on end
 #                                                chip drivers/generic/generic #Slave MCP55 PCI-E
 #                                                        device i2c 55 on end

-#                                                end             
+#                                                end

                                                 chip drivers/generic/generic #MAC EEPROM
                                                         device i2c 51 on end
                                                 end
 
                                                 chip drivers/generic/generic #MAC EEPROM
                                                         device i2c 51 on end
                                                 end
 

-                                        end # SM 
+                                        end # SM

                                        device pci 2.0 on end # USB 1.1
                                        device pci 2.1 on end # USB 2
                                        device pci 4.0 on end # IDE
                                        device pci 2.0 on end # USB 1.1
                                        device pci 2.1 on end # USB 2
                                        device pci 4.0 on end # IDE


@@ -116,15 +116,15 @@ chip northbridge/amd/amdk8/root_complex
                                        register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1
                                        register "mac_eeprom_addr" = "0x51"
                                end
                                        register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1
                                        register "mac_eeprom_addr" = "0x51"
                                end

-                       end #  device pci 18.0 
+                       end #  device pci 18.0

                        device pci 18.1 on end
                        device pci 18.2 on end
                        device pci 18.3 on end
                end # mc0
                        device pci 18.1 on end
                        device pci 18.2 on end
                        device pci 18.3 on end
                end # mc0

-               
+

        end # PCI domain
        end # PCI domain

-       
-#       chip drivers/generic/debug 
+
+#       chip drivers/generic/debug

 #               device pnp 0.0 off end # chip name
 #                device pnp 0.1 on end # pci_regs_all
 #                device pnp 0.2 off end # mem
 #               device pnp 0.0 off end # chip name
 #                device pnp 0.1 on end # pci_regs_all
 #                device pnp 0.2 off end # mem


@@ -135,5 +135,5 @@ chip northbridge/amd/amdk8/root_complex
 #                device pnp 0.7 off end # tsc
 #                device pnp 0.8 off  end # io
 #                device pnp 0.9 on end # io
 #                device pnp 0.7 off end # tsc
 #                device pnp 0.8 off  end # io
 #                device pnp 0.9 on end # io

-#       end  
+#       end

 end #root_complex
 end #root_complex

diff --git a/src/mainboard/supermicro/h8dme/get_bus_conf.c b/src/mainboard/supermicro/h8dme/get_bus_conf.c
index 3a9218ba6c11287f145820a1499fd755451fc004..5052f35d7b5825405aa09ca17211618bb2773c92 100644 (file)
--- a/src/mainboard/supermicro/h8dme/get_bus_conf.c
+++ b/src/mainboard/supermicro/h8dme/get_bus_conf.c
@@ -40,7 +40,7 @@
 
        unsigned char bus_pcix[3]; // under bus_mcp55_2
 
 
        unsigned char bus_pcix[3]; // under bus_mcp55_2
 

-unsigned pci1234x[] = 
+unsigned pci1234x[] =

 {        //Here you only need to set value in pci1234 for HT-IO that could be installed or not
         //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
         0x0000ff0,
 {        //Here you only need to set value in pci1234 for HT-IO that could be installed or not
         //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
         0x0000ff0,


@@ -52,7 +52,7 @@ unsigned pci1234x[] =
 //        0x0000ff0,
 //        0x0000ff0
 };
 //        0x0000ff0,
 //        0x0000ff0
 };

-unsigned hcdnx[] = 
+unsigned hcdnx[] =

 { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
        0x20202020,
        0x20202020,
 { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
        0x20202020,
        0x20202020,


@@ -98,7 +98,7 @@ void get_bus_conf(void)
        for(i=0; i<8; i++) {
                bus_mcp55[i] = 0;
        }
        for(i=0; i<8; i++) {
                bus_mcp55[i] = 0;
        }

-       
+

        for(i=0; i<3; i++) {
                bus_pcix[i] = 0;
        }
        for(i=0; i<3; i++) {
                bus_pcix[i] = 0;
        }


@@ -142,13 +142,13 @@ void get_bus_conf(void)
                                }
                        }
                }
                                }
                        }
                }

-               
+

 
 /*I/O APICs:   APIC ID Version State           Address*/
 #if CONFIG_LOGICAL_CPUS==1
        apicid_base = get_apicid_base(1);
 
 /*I/O APICs:   APIC ID Version State           Address*/
 #if CONFIG_LOGICAL_CPUS==1
        apicid_base = get_apicid_base(1);

-#else 
-       apicid_base = CONFIG_MAX_PHYSICAL_CPUS; 
+#else
+       apicid_base = CONFIG_MAX_PHYSICAL_CPUS;

 #endif
        apicid_mcp55 = apicid_base+0;
 
 #endif
        apicid_mcp55 = apicid_base+0;
 

diff --git a/src/mainboard/supermicro/h8dme/irq_tables.c b/src/mainboard/supermicro/h8dme/irq_tables.c
index 5cb6d8420c28bf35d675dbca36f7229961b71285..bc6aded97fc4aaec05c0950d111d91aab9e7fa44 100644 (file)
--- a/src/mainboard/supermicro/h8dme/irq_tables.c
+++ b/src/mainboard/supermicro/h8dme/irq_tables.c
@@ -19,7 +19,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 

-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!

    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 
    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 


@@ -33,11 +33,11 @@
 
 #include <cpu/amd/amdk8_sysconf.h>
 
 
 #include <cpu/amd/amdk8_sysconf.h>
 

-static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0, 
+static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,

                uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
                uint8_t slot, uint8_t rfu)
 {
                uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
                uint8_t slot, uint8_t rfu)
 {

-        pirq_info->bus = bus; 
+        pirq_info->bus = bus;

         pirq_info->devfn = devfn;
                 pirq_info->irq[0].link = link0;
                 pirq_info->irq[0].bitmap = bitmap0;
         pirq_info->devfn = devfn;
                 pirq_info->irq[0].link = link0;
                 pirq_info->irq[0].bitmap = bitmap0;


@@ -79,15 +79,15 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 
        pirq = (void *)(addr);
        v = (uint8_t *)(addr);
 
        pirq = (void *)(addr);
        v = (uint8_t *)(addr);

-       
+

        pirq->signature = PIRQ_SIGNATURE;
        pirq->version  = PIRQ_VERSION;
        pirq->signature = PIRQ_SIGNATURE;
        pirq->version  = PIRQ_VERSION;

-       
+

        pirq->rtr_bus = bus_mcp55[0];
        pirq->rtr_devfn = ((sbdn+6)<<3)|0;
 
        pirq->exclusive_irqs = 0;
        pirq->rtr_bus = bus_mcp55[0];
        pirq->rtr_devfn = ((sbdn+6)<<3)|0;
 
        pirq->exclusive_irqs = 0;

-       
+

        pirq->rtr_vendor = 0x10de;
        pirq->rtr_device = 0x0370;
 
        pirq->rtr_vendor = 0x10de;
        pirq->rtr_device = 0x0370;
 


@@ -100,11 +100,11 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 //pci bridge
        write_pirq_info(pirq_info, bus_mcp55[0], ((sbdn+6)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
        pirq_info++; slot_num++;
 //pci bridge
        write_pirq_info(pirq_info, bus_mcp55[0], ((sbdn+6)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
        pirq_info++; slot_num++;

-        
-       pirq->size = 32 + 16 * slot_num; 
+
+       pirq->size = 32 + 16 * slot_num;

 
         for (i = 0; i < pirq->size; i++)
 
         for (i = 0; i < pirq->size; i++)

-                sum += v[i];   
+                sum += v[i];

 
        sum = pirq->checksum - sum;
 
 
        sum = pirq->checksum - sum;
 

diff --git a/src/mainboard/supermicro/h8dme/mptable.c b/src/mainboard/supermicro/h8dme/mptable.c
index c7e46f2bda5988580e3b1d9f5928e466c6e7d120..8146923ef7ec8bb5ae7bb5543804a6ac9262e3db 100644 (file)
--- a/src/mainboard/supermicro/h8dme/mptable.c
+++ b/src/mainboard/supermicro/h8dme/mptable.c
@@ -102,7 +102,7 @@ static void *smp_write_config_table(void *v)
 
 
        }
 
 
        }

-  
+

 /*I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN#
 */     smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_mcp55, 0x0);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x1, apicid_mcp55, 0x1);
 /*I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN#
 */     smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_mcp55, 0x0);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x1, apicid_mcp55, 0x1);


@@ -144,9 +144,9 @@ static void *smp_write_config_table(void *v)
         }
 
 
         }
 
 

-       if(bus_pcix[0]) {       
+       if(bus_pcix[0]) {

                for(i=0;i<2;i++) {
                for(i=0;i<2;i++) {

-                       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pcix[2], (4<<2)|i, apicid_mcp55, 0x10 + (0+i+4-sbdn%4)%4); //16, 17 
+                       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pcix[2], (4<<2)|i, apicid_mcp55, 0x10 + (0+i+4-sbdn%4)%4); //16, 17

                }
 
                for(i=0;i<4;i++) {
                }
 
                for(i=0;i<4;i++) {

diff --git a/src/mainboard/supermicro/h8dme/resourcemap.c b/src/mainboard/supermicro/h8dme/resourcemap.c
index fa22ee337b3c842f2df1ca232800bc3007612752..db5d5fe185e11fad3e32008d11e254baabc6a03c 100644 (file)
--- a/src/mainboard/supermicro/h8dme/resourcemap.c
+++ b/src/mainboard/supermicro/h8dme/resourcemap.c
@@ -161,7 +161,7 @@ static void setup_mb_resource_map(void)
                 *         1 = base/limit registers i are read-only
                 * [ 7: 4] Reserved
                 * [31: 8] Memory-Mapped I/O Base Address i (39-16)
                 *         1 = base/limit registers i are read-only
                 * [ 7: 4] Reserved
                 * [31: 8] Memory-Mapped I/O Base Address i (39-16)

-                *         This field defines the upper address bits of a 40bit address 
+                *         This field defines the upper address bits of a 40bit address

                 *         that defines the start of memory-mapped I/O region i
                 */
                PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,
                 *         that defines the start of memory-mapped I/O region i
                 */
                PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,


@@ -217,7 +217,7 @@ static void setup_mb_resource_map(void)
                 * [ 3: 2] Reserved
                 * [ 4: 4] VGA Enable
                 *         0 = VGA matches Disabled
                 * [ 3: 2] Reserved
                 * [ 4: 4] VGA Enable
                 *         0 = VGA matches Disabled

-                *         1 = matches all address < 64K and where A[9:0] is in the 
+                *         1 = matches all address < 64K and where A[9:0] is in the

                 *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
                 * [ 5: 5] ISA Enable
                 *         0 = ISA matches Disabled
                 *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
                 * [ 5: 5] ISA Enable
                 *         0 = ISA matches Disabled


@@ -225,7 +225,7 @@ static void setup_mb_resource_map(void)
                 *             from matching agains this base/limit pair
                 * [11: 6] Reserved
                 * [24:12] PCI I/O Base i
                 *             from matching agains this base/limit pair
                 * [11: 6] Reserved
                 * [24:12] PCI I/O Base i

-                *         This field defines the start of PCI I/O region n 
+                *         This field defines the start of PCI I/O region n

                 * [31:25] Reserved
                 */
                PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000033,
                 * [31:25] Reserved
                 */
                PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000033,


@@ -270,9 +270,9 @@ static void setup_mb_resource_map(void)
                 *         This field defines the highest bus number in configuration region i
                 */
                PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x3f000203, /* link 2 of cpu 0 --> Nvidia MCP55 Pro */
                 *         This field defines the highest bus number in configuration region i
                 */
                PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x3f000203, /* link 2 of cpu 0 --> Nvidia MCP55 Pro */

-               PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000000, 
+               PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000000,

                PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x00000000,
                PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x00000000,

-               PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000, 
+               PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000,

 
        };
 
 
        };
 

diff --git a/src/mainboard/supermicro/h8dmr/ap_romstage.c b/src/mainboard/supermicro/h8dmr/ap_romstage.c
index 60dd1b275ebe5343c5974e98828ae8004fbd99c7..3454cae31373400220275123d5c5b738c6461bde 100644 (file)
--- a/src/mainboard/supermicro/h8dmr/ap_romstage.c
+++ b/src/mainboard/supermicro/h8dmr/ap_romstage.c
@@ -25,7 +25,7 @@
 #define RAMINIT_SYSINFO 1
 #define CACHE_AS_RAM_ADDRESS_DEBUG 0
 
 #define RAMINIT_SYSINFO 1
 #define CACHE_AS_RAM_ADDRESS_DEBUG 0
 

-#define SET_NB_CFG_54 1 
+#define SET_NB_CFG_54 1

 
 //used by raminit
 #define QRANK_DIMM_SUPPORT 1
 
 //used by raminit
 #define QRANK_DIMM_SUPPORT 1

diff --git a/src/mainboard/supermicro/h8dmr/cmos.layout b/src/mainboard/supermicro/h8dmr/cmos.layout
index 9d37e2bba61f0ed9138fb24d7017a6bceec58778..518f9458b698c637260b1df5ed68c682c06f9c9c 100644 (file)
--- a/src/mainboard/supermicro/h8dmr/cmos.layout
+++ b/src/mainboard/supermicro/h8dmr/cmos.layout
@@ -1,23 +1,23 @@
-## 
+##

 ## This file is part of the coreboot project.
 ## This file is part of the coreboot project.

-## 
+##

 ## Copyright (C) 2007 AMD
 ## Written by Yinghai Lu <yinghailu@amd.com> for AMD.
 ## Copyright (C) 2007 AMD
 ## Written by Yinghai Lu <yinghailu@amd.com> for AMD.

-## 
+##

 ## This program is free software; you can redistribute it and/or modify
 ## it under the terms of the GNU General Public License as published by
 ## the Free Software Foundation; either version 2 of the License, or
 ## (at your option) any later version.
 ## This program is free software; you can redistribute it and/or modify
 ## it under the terms of the GNU General Public License as published by
 ## the Free Software Foundation; either version 2 of the License, or
 ## (at your option) any later version.

-## 
+##

 ## This program is distributed in the hope that it will be useful,
 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 ## GNU General Public License for more details.
 ## This program is distributed in the hope that it will be useful,
 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 ## GNU General Public License for more details.

-## 
+##

 ## You should have received a copy of the GNU General Public License
 ## along with this program; if not, write to the Free Software
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 ## You should have received a copy of the GNU General Public License
 ## along with this program; if not, write to the Free Software
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA

-## 
+##

 
 entries
 
 
 entries
 

diff --git a/src/mainboard/supermicro/h8dmr/devicetree.cb b/src/mainboard/supermicro/h8dmr/devicetree.cb
index d83f00637d2c0f9b7d97bce2abf9722c9dfbf57d..67920c46576023e6989e00e6a770d7424ab1c89e 100644 (file)
--- a/src/mainboard/supermicro/h8dmr/devicetree.cb
+++ b/src/mainboard/supermicro/h8dmr/devicetree.cb
@@ -8,9 +8,9 @@ chip northbridge/amd/amdk8/root_complex
                chip northbridge/amd/amdk8 #mc0
                        device pci 18.0 on end
                        device pci 18.0 on end
                chip northbridge/amd/amdk8 #mc0
                        device pci 18.0 on end
                        device pci 18.0 on end

-                       device pci 18.0 on 
-                               #  devices on link 0, link 0 == LDT 0 
-                               chip southbridge/nvidia/mcp55 
+                       device pci 18.0 on
+                               #  devices on link 0, link 0 == LDT 0
+                               chip southbridge/nvidia/mcp55

                                        device pci 0.0 on end   # HT
                                        device pci 1.0 on # LPC
                                                chip superio/winbond/w83627hf
                                        device pci 0.0 on end   # HT
                                        device pci 1.0 on # LPC
                                                chip superio/winbond/w83627hf


@@ -37,14 +37,14 @@ chip northbridge/amd/amdk8/root_complex
                                                                irq 0x70 = 1
                                                                irq 0x72 = 12
                                                        end
                                                                irq 0x70 = 1
                                                                irq 0x72 = 12
                                                        end

-                                                       device pnp 2e.6 off  # SFI 
+                                                       device pnp 2e.6 off  # SFI

                                                                io 0x62 = 0x100
                                                        end
                                                        device pnp 2e.7 off #  GPIO_GAME_MIDI
                                                                io 0x60 = 0x220
                                                                io 0x62 = 0x300
                                                                irq 0x70 = 9
                                                                io 0x62 = 0x100
                                                        end
                                                        device pnp 2e.7 off #  GPIO_GAME_MIDI
                                                                io 0x60 = 0x220
                                                                io 0x62 = 0x300
                                                                irq 0x70 = 9

-                                                       end                                             
+                                                       end

                                                        device pnp 2e.8 off end #  WDTO_PLED
                                                        device pnp 2e.9 off end #  GPIO_SUSLED
                                                        device pnp 2e.a off end #  ACPI
                                                        device pnp 2e.8 off end #  WDTO_PLED
                                                        device pnp 2e.9 off end #  GPIO_SUSLED
                                                        device pnp 2e.a off end #  ACPI


@@ -56,29 +56,29 @@ chip northbridge/amd/amdk8/root_complex
                                        end
                                        device pci 1.1 on # SM 0
                                                 chip drivers/generic/generic #dimm 0-0-0
                                        end
                                        device pci 1.1 on # SM 0
                                                 chip drivers/generic/generic #dimm 0-0-0

-                                                        device i2c 50 on end  
-                                                end              
+                                                        device i2c 50 on end
+                                                end

                                                 chip drivers/generic/generic #dimm 0-0-1
                                                         device i2c 51 on end
                                                 chip drivers/generic/generic #dimm 0-0-1
                                                         device i2c 51 on end

-                                                end     
+                                                end

                                                 chip drivers/generic/generic #dimm 0-1-0
                                                         device i2c 52 on end
                                                 chip drivers/generic/generic #dimm 0-1-0
                                                         device i2c 52 on end

-                                                end             
+                                                end

                                                 chip drivers/generic/generic #dimm 0-1-1
                                                         device i2c 53 on end
                                                 chip drivers/generic/generic #dimm 0-1-1
                                                         device i2c 53 on end

-                                                end              
+                                                end

                                                 chip drivers/generic/generic #dimm 1-0-0
                                                         device i2c 54 on end
                                                 chip drivers/generic/generic #dimm 1-0-0
                                                         device i2c 54 on end

-                                                end     
+                                                end

                                                 chip drivers/generic/generic #dimm 1-0-1
                                                         device i2c 55 on end
                                                 chip drivers/generic/generic #dimm 1-0-1
                                                         device i2c 55 on end

-                                                end     
+                                                end

                                                 chip drivers/generic/generic #dimm 1-1-0
                                                         device i2c 56 on end
                                                 chip drivers/generic/generic #dimm 1-1-0
                                                         device i2c 56 on end

-                                                end     
+                                                end

                                                 chip drivers/generic/generic #dimm 1-1-1
                                                         device i2c 57 on end
                                                 chip drivers/generic/generic #dimm 1-1-1
                                                         device i2c 57 on end

-                                                end 
+                                                end

                                        end # SM
                                         device pci 1.1 on # SM 1
 #PCI device smbus address will depend on addon pci device, do we need to scan_smbus_bus?
                                        end # SM
                                         device pci 1.1 on # SM 1
 #PCI device smbus address will depend on addon pci device, do we need to scan_smbus_bus?


@@ -87,24 +87,24 @@ chip northbridge/amd/amdk8/root_complex
 #                                                end
 #                                                chip drivers/generic/generic #PCIXB Slot1
 #                                                        device i2c 51 on end
 #                                                end
 #                                                chip drivers/generic/generic #PCIXB Slot1
 #                                                        device i2c 51 on end

-#                                                end     
+#                                                end

 #                                                chip drivers/generic/generic #PCIXB Slot2
 #                                                        device i2c 52 on end
 #                                                chip drivers/generic/generic #PCIXB Slot2
 #                                                        device i2c 52 on end

-#                                                end             
+#                                                end

 #                                                chip drivers/generic/generic #PCI Slot1
 #                                                        device i2c 53 on end
 #                                                chip drivers/generic/generic #PCI Slot1
 #                                                        device i2c 53 on end

-#                                                end              
+#                                                end

 #                                                chip drivers/generic/generic #Master MCP55 PCI-E
 #                                                        device i2c 54 on end
 #                                                chip drivers/generic/generic #Master MCP55 PCI-E
 #                                                        device i2c 54 on end

-#                                                end     
+#                                                end

 #                                                chip drivers/generic/generic #Slave MCP55 PCI-E
 #                                                        device i2c 55 on end
 #                                                chip drivers/generic/generic #Slave MCP55 PCI-E
 #                                                        device i2c 55 on end

-#                                                end             
+#                                                end

                                                 chip drivers/generic/generic #MAC EEPROM
                                                         device i2c 51 on end
                                                 chip drivers/generic/generic #MAC EEPROM
                                                         device i2c 51 on end

-                                                end 
+                                                end

 
 

-                                        end # SM 
+                                        end # SM

                                        device pci 2.0 on end # USB 1.1
                                        device pci 2.1 on end # USB 2
                                        device pci 4.0 on end # IDE
                                        device pci 2.0 on end # USB 1.1
                                        device pci 2.1 on end # USB 2
                                        device pci 4.0 on end # IDE


@@ -136,15 +136,15 @@ chip northbridge/amd/amdk8/root_complex
                                        register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1
                                        register "mac_eeprom_addr" = "0x51"
                                end
                                        register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1
                                        register "mac_eeprom_addr" = "0x51"
                                end

-                       end #  device pci 18.0 
+                       end #  device pci 18.0

                        device pci 18.1 on end
                        device pci 18.2 on end
                        device pci 18.3 on end
                end # mc0
                        device pci 18.1 on end
                        device pci 18.2 on end
                        device pci 18.3 on end
                end # mc0

-               
+

        end # PCI domain
        end # PCI domain

-       
-#       chip drivers/generic/debug 
+
+#       chip drivers/generic/debug

 #               device pnp 0.0 off end # chip name
 #                device pnp 0.1 on end # pci_regs_all
 #                device pnp 0.2 off end # mem
 #               device pnp 0.0 off end # chip name
 #                device pnp 0.1 on end # pci_regs_all
 #                device pnp 0.2 off end # mem


@@ -155,5 +155,5 @@ chip northbridge/amd/amdk8/root_complex
 #                device pnp 0.7 off end # tsc
 #                device pnp 0.8 off  end # io
 #                device pnp 0.9 on end # io
 #                device pnp 0.7 off end # tsc
 #                device pnp 0.8 off  end # io
 #                device pnp 0.9 on end # io

-#       end  
+#       end

 end #root_complex
 end #root_complex

diff --git a/src/mainboard/supermicro/h8dmr/get_bus_conf.c b/src/mainboard/supermicro/h8dmr/get_bus_conf.c
index 3a9218ba6c11287f145820a1499fd755451fc004..5052f35d7b5825405aa09ca17211618bb2773c92 100644 (file)
--- a/src/mainboard/supermicro/h8dmr/get_bus_conf.c
+++ b/src/mainboard/supermicro/h8dmr/get_bus_conf.c
@@ -40,7 +40,7 @@
 
        unsigned char bus_pcix[3]; // under bus_mcp55_2
 
 
        unsigned char bus_pcix[3]; // under bus_mcp55_2
 

-unsigned pci1234x[] = 
+unsigned pci1234x[] =

 {        //Here you only need to set value in pci1234 for HT-IO that could be installed or not
         //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
         0x0000ff0,
 {        //Here you only need to set value in pci1234 for HT-IO that could be installed or not
         //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
         0x0000ff0,


@@ -52,7 +52,7 @@ unsigned pci1234x[] =
 //        0x0000ff0,
 //        0x0000ff0
 };
 //        0x0000ff0,
 //        0x0000ff0
 };

-unsigned hcdnx[] = 
+unsigned hcdnx[] =

 { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
        0x20202020,
        0x20202020,
 { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
        0x20202020,
        0x20202020,


@@ -98,7 +98,7 @@ void get_bus_conf(void)
        for(i=0; i<8; i++) {
                bus_mcp55[i] = 0;
        }
        for(i=0; i<8; i++) {
                bus_mcp55[i] = 0;
        }

-       
+

        for(i=0; i<3; i++) {
                bus_pcix[i] = 0;
        }
        for(i=0; i<3; i++) {
                bus_pcix[i] = 0;
        }


@@ -142,13 +142,13 @@ void get_bus_conf(void)
                                }
                        }
                }
                                }
                        }
                }

-               
+

 
 /*I/O APICs:   APIC ID Version State           Address*/
 #if CONFIG_LOGICAL_CPUS==1
        apicid_base = get_apicid_base(1);
 
 /*I/O APICs:   APIC ID Version State           Address*/
 #if CONFIG_LOGICAL_CPUS==1
        apicid_base = get_apicid_base(1);

-#else 
-       apicid_base = CONFIG_MAX_PHYSICAL_CPUS; 
+#else
+       apicid_base = CONFIG_MAX_PHYSICAL_CPUS;

 #endif
        apicid_mcp55 = apicid_base+0;
 
 #endif
        apicid_mcp55 = apicid_base+0;
 

diff --git a/src/mainboard/supermicro/h8dmr/irq_tables.c b/src/mainboard/supermicro/h8dmr/irq_tables.c
index 5cb6d8420c28bf35d675dbca36f7229961b71285..bc6aded97fc4aaec05c0950d111d91aab9e7fa44 100644 (file)
--- a/src/mainboard/supermicro/h8dmr/irq_tables.c
+++ b/src/mainboard/supermicro/h8dmr/irq_tables.c
@@ -19,7 +19,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 

-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!

    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 
    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 


@@ -33,11 +33,11 @@
 
 #include <cpu/amd/amdk8_sysconf.h>
 
 
 #include <cpu/amd/amdk8_sysconf.h>
 

-static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0, 
+static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,

                uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
                uint8_t slot, uint8_t rfu)
 {
                uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
                uint8_t slot, uint8_t rfu)
 {

-        pirq_info->bus = bus; 
+        pirq_info->bus = bus;

         pirq_info->devfn = devfn;
                 pirq_info->irq[0].link = link0;
                 pirq_info->irq[0].bitmap = bitmap0;
         pirq_info->devfn = devfn;
                 pirq_info->irq[0].link = link0;
                 pirq_info->irq[0].bitmap = bitmap0;


@@ -79,15 +79,15 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 
        pirq = (void *)(addr);
        v = (uint8_t *)(addr);
 
        pirq = (void *)(addr);
        v = (uint8_t *)(addr);

-       
+

        pirq->signature = PIRQ_SIGNATURE;
        pirq->version  = PIRQ_VERSION;
        pirq->signature = PIRQ_SIGNATURE;
        pirq->version  = PIRQ_VERSION;

-       
+

        pirq->rtr_bus = bus_mcp55[0];
        pirq->rtr_devfn = ((sbdn+6)<<3)|0;
 
        pirq->exclusive_irqs = 0;
        pirq->rtr_bus = bus_mcp55[0];
        pirq->rtr_devfn = ((sbdn+6)<<3)|0;
 
        pirq->exclusive_irqs = 0;

-       
+

        pirq->rtr_vendor = 0x10de;
        pirq->rtr_device = 0x0370;
 
        pirq->rtr_vendor = 0x10de;
        pirq->rtr_device = 0x0370;
 


@@ -100,11 +100,11 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 //pci bridge
        write_pirq_info(pirq_info, bus_mcp55[0], ((sbdn+6)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
        pirq_info++; slot_num++;
 //pci bridge
        write_pirq_info(pirq_info, bus_mcp55[0], ((sbdn+6)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
        pirq_info++; slot_num++;

-        
-       pirq->size = 32 + 16 * slot_num; 
+
+       pirq->size = 32 + 16 * slot_num;

 
         for (i = 0; i < pirq->size; i++)
 
         for (i = 0; i < pirq->size; i++)

-                sum += v[i];   
+                sum += v[i];

 
        sum = pirq->checksum - sum;
 
 
        sum = pirq->checksum - sum;
 

diff --git a/src/mainboard/supermicro/h8dmr/mptable.c b/src/mainboard/supermicro/h8dmr/mptable.c
index c7e46f2bda5988580e3b1d9f5928e466c6e7d120..8146923ef7ec8bb5ae7bb5543804a6ac9262e3db 100644 (file)
--- a/src/mainboard/supermicro/h8dmr/mptable.c
+++ b/src/mainboard/supermicro/h8dmr/mptable.c
@@ -102,7 +102,7 @@ static void *smp_write_config_table(void *v)
 
 
        }
 
 
        }

-  
+

 /*I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN#
 */     smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_mcp55, 0x0);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x1, apicid_mcp55, 0x1);
 /*I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN#
 */     smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_mcp55, 0x0);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x1, apicid_mcp55, 0x1);


@@ -144,9 +144,9 @@ static void *smp_write_config_table(void *v)
         }
 
 
         }
 
 

-       if(bus_pcix[0]) {       
+       if(bus_pcix[0]) {

                for(i=0;i<2;i++) {
                for(i=0;i<2;i++) {

-                       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pcix[2], (4<<2)|i, apicid_mcp55, 0x10 + (0+i+4-sbdn%4)%4); //16, 17 
+                       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pcix[2], (4<<2)|i, apicid_mcp55, 0x10 + (0+i+4-sbdn%4)%4); //16, 17

                }
 
                for(i=0;i<4;i++) {
                }
 
                for(i=0;i<4;i++) {

diff --git a/src/mainboard/supermicro/h8dmr/resourcemap.c b/src/mainboard/supermicro/h8dmr/resourcemap.c
index fa22ee337b3c842f2df1ca232800bc3007612752..db5d5fe185e11fad3e32008d11e254baabc6a03c 100644 (file)
--- a/src/mainboard/supermicro/h8dmr/resourcemap.c
+++ b/src/mainboard/supermicro/h8dmr/resourcemap.c
@@ -161,7 +161,7 @@ static void setup_mb_resource_map(void)
                 *         1 = base/limit registers i are read-only
                 * [ 7: 4] Reserved
                 * [31: 8] Memory-Mapped I/O Base Address i (39-16)
                 *         1 = base/limit registers i are read-only
                 * [ 7: 4] Reserved
                 * [31: 8] Memory-Mapped I/O Base Address i (39-16)

-                *         This field defines the upper address bits of a 40bit address 
+                *         This field defines the upper address bits of a 40bit address

                 *         that defines the start of memory-mapped I/O region i
                 */
                PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,
                 *         that defines the start of memory-mapped I/O region i
                 */
                PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,


@@ -217,7 +217,7 @@ static void setup_mb_resource_map(void)
                 * [ 3: 2] Reserved
                 * [ 4: 4] VGA Enable
                 *         0 = VGA matches Disabled
                 * [ 3: 2] Reserved
                 * [ 4: 4] VGA Enable
                 *         0 = VGA matches Disabled

-                *         1 = matches all address < 64K and where A[9:0] is in the 
+                *         1 = matches all address < 64K and where A[9:0] is in the

                 *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
                 * [ 5: 5] ISA Enable
                 *         0 = ISA matches Disabled
                 *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
                 * [ 5: 5] ISA Enable
                 *         0 = ISA matches Disabled


@@ -225,7 +225,7 @@ static void setup_mb_resource_map(void)
                 *             from matching agains this base/limit pair
                 * [11: 6] Reserved
                 * [24:12] PCI I/O Base i
                 *             from matching agains this base/limit pair
                 * [11: 6] Reserved
                 * [24:12] PCI I/O Base i

-                *         This field defines the start of PCI I/O region n 
+                *         This field defines the start of PCI I/O region n

                 * [31:25] Reserved
                 */
                PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000033,
                 * [31:25] Reserved
                 */
                PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000033,


@@ -270,9 +270,9 @@ static void setup_mb_resource_map(void)
                 *         This field defines the highest bus number in configuration region i
                 */
                PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x3f000203, /* link 2 of cpu 0 --> Nvidia MCP55 Pro */
                 *         This field defines the highest bus number in configuration region i
                 */
                PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x3f000203, /* link 2 of cpu 0 --> Nvidia MCP55 Pro */

-               PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000000, 
+               PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000000,

                PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x00000000,
                PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x00000000,

-               PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000, 
+               PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000,

 
        };
 
 
        };
 

diff --git a/src/mainboard/supermicro/h8dmr/romstage.c b/src/mainboard/supermicro/h8dmr/romstage.c
index fd0634ff62238d71d691ddb7c45fc4f5240a9ea2..3ef91c82bba73c02cd9f3dd3dcdfe4ed4d7cee62 100644 (file)
--- a/src/mainboard/supermicro/h8dmr/romstage.c
+++ b/src/mainboard/supermicro/h8dmr/romstage.c
@@ -37,7 +37,7 @@
 #if CONFIG_K8_REV_F_SUPPORT == 1
 #define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
 #endif
 #if CONFIG_K8_REV_F_SUPPORT == 1
 #define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
 #endif

- 
+

 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>


@@ -98,7 +98,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 #include "northbridge/amd/amdk8/raminit_f.c"
 #include "lib/generic_sdram.c"
 
 #include "northbridge/amd/amdk8/raminit_f.c"
 #include "lib/generic_sdram.c"
 

-#include "resourcemap.c" 
+#include "resourcemap.c"

 
 #include "cpu/amd/dualcore/dualcore.c"
 
 
 #include "cpu/amd/dualcore/dualcore.c"
 


@@ -129,13 +129,13 @@ static void sio_setup(void)
        smbusx_write_byte(1, (0x58>>1), 0xb1, 0xff); /* set FAN ctrl to DC mode */
 
         byte = pci_read_config8(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0x7b);
        smbusx_write_byte(1, (0x58>>1), 0xb1, 0xff); /* set FAN ctrl to DC mode */
 
         byte = pci_read_config8(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0x7b);

-        byte |= 0x20; 
+        byte |= 0x20;

         pci_write_config8(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0x7b, byte);
         pci_write_config8(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0x7b, byte);

-        
+

         dword = pci_read_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa0);
         dword |= (1<<0);
         pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa0, dword);
         dword = pci_read_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa0);
         dword |= (1<<0);
         pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa0, dword);

-        
+

         dword = pci_read_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa4);
         dword |= (1<<16);
         pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa4, dword);
         dword = pci_read_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa4);
         dword |= (1<<16);
         pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa4, dword);


@@ -181,7 +181,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
         uart_init();
         console_init();
 
         uart_init();
         console_init();

-       
+

        /* Halt if there was a built in self test failure */
        report_bist_failure(bist);
 
        /* Halt if there was a built in self test failure */
        report_bist_failure(bist);
 

diff --git a/src/mainboard/supermicro/h8dmr_fam10/cmos.layout b/src/mainboard/supermicro/h8dmr_fam10/cmos.layout
index 9d37e2bba61f0ed9138fb24d7017a6bceec58778..518f9458b698c637260b1df5ed68c682c06f9c9c 100644 (file)
--- a/src/mainboard/supermicro/h8dmr_fam10/cmos.layout
+++ b/src/mainboard/supermicro/h8dmr_fam10/cmos.layout
@@ -1,23 +1,23 @@
-## 
+##

 ## This file is part of the coreboot project.
 ## This file is part of the coreboot project.

-## 
+##

 ## Copyright (C) 2007 AMD
 ## Written by Yinghai Lu <yinghailu@amd.com> for AMD.
 ## Copyright (C) 2007 AMD
 ## Written by Yinghai Lu <yinghailu@amd.com> for AMD.

-## 
+##

 ## This program is free software; you can redistribute it and/or modify
 ## it under the terms of the GNU General Public License as published by
 ## the Free Software Foundation; either version 2 of the License, or
 ## (at your option) any later version.
 ## This program is free software; you can redistribute it and/or modify
 ## it under the terms of the GNU General Public License as published by
 ## the Free Software Foundation; either version 2 of the License, or
 ## (at your option) any later version.

-## 
+##

 ## This program is distributed in the hope that it will be useful,
 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 ## GNU General Public License for more details.
 ## This program is distributed in the hope that it will be useful,
 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 ## GNU General Public License for more details.

-## 
+##

 ## You should have received a copy of the GNU General Public License
 ## along with this program; if not, write to the Free Software
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 ## You should have received a copy of the GNU General Public License
 ## along with this program; if not, write to the Free Software
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA

-## 
+##

 
 entries
 
 
 entries
 

diff --git a/src/mainboard/supermicro/h8dmr_fam10/devicetree.cb b/src/mainboard/supermicro/h8dmr_fam10/devicetree.cb
index 8d8936c92fc0407a7b5cc92bbec0bed5816ff7a9..c142dcb29092cc81be43cd3dc1fbd6b2d2ff95d8 100644 (file)
--- a/src/mainboard/supermicro/h8dmr_fam10/devicetree.cb
+++ b/src/mainboard/supermicro/h8dmr_fam10/devicetree.cb
@@ -8,9 +8,9 @@ chip northbridge/amd/amdfam10/root_complex
                chip northbridge/amd/amdfam10 #mc0
                        device pci 18.0 on end
                        device pci 18.0 on end
                chip northbridge/amd/amdfam10 #mc0
                        device pci 18.0 on end
                        device pci 18.0 on end

-                       device pci 18.0 on 
+                       device pci 18.0 on

         # SB on link 2.0
         # SB on link 2.0

-                               chip southbridge/nvidia/mcp55 
+                               chip southbridge/nvidia/mcp55

                                        device pci 0.0 on end   # HT
                                        device pci 1.0 on # LPC
                                                chip superio/winbond/w83627hf
                                        device pci 0.0 on end   # HT
                                        device pci 1.0 on # LPC
                                                chip superio/winbond/w83627hf


@@ -37,14 +37,14 @@ chip northbridge/amd/amdfam10/root_complex
                                                                irq 0x70 = 1
                                                                irq 0x72 = 12
                                                        end
                                                                irq 0x70 = 1
                                                                irq 0x72 = 12
                                                        end

-                                                       device pnp 2e.6 off  # SFI 
+                                                       device pnp 2e.6 off  # SFI

                                                                io 0x62 = 0x100
                                                        end
                                                        device pnp 2e.7 off #  GPIO_GAME_MIDI
                                                                io 0x60 = 0x220
                                                                io 0x62 = 0x300
                                                                irq 0x70 = 9
                                                                io 0x62 = 0x100
                                                        end
                                                        device pnp 2e.7 off #  GPIO_GAME_MIDI
                                                                io 0x60 = 0x220
                                                                io 0x62 = 0x300
                                                                irq 0x70 = 9

-                                                       end                                             
+                                                       end

                                                        device pnp 2e.8 off end #  WDTO_PLED
                                                        device pnp 2e.9 off end #  GPIO_SUSLED
                                                        device pnp 2e.a off end #  ACPI
                                                        device pnp 2e.8 off end #  WDTO_PLED
                                                        device pnp 2e.9 off end #  GPIO_SUSLED
                                                        device pnp 2e.a off end #  ACPI


@@ -56,29 +56,29 @@ chip northbridge/amd/amdfam10/root_complex
                                        end
                                        device pci 1.1 on # SM 0
                                                 chip drivers/generic/generic #dimm 0-0-0
                                        end
                                        device pci 1.1 on # SM 0
                                                 chip drivers/generic/generic #dimm 0-0-0

-                                                        device i2c 50 on end  
-                                                end              
+                                                        device i2c 50 on end
+                                                end

                                                 chip drivers/generic/generic #dimm 0-0-1
                                                         device i2c 51 on end
                                                 chip drivers/generic/generic #dimm 0-0-1
                                                         device i2c 51 on end

-                                                end     
+                                                end

                                                 chip drivers/generic/generic #dimm 0-1-0
                                                         device i2c 52 on end
                                                 chip drivers/generic/generic #dimm 0-1-0
                                                         device i2c 52 on end

-                                                end             
+                                                end

                                                 chip drivers/generic/generic #dimm 0-1-1
                                                         device i2c 53 on end
                                                 chip drivers/generic/generic #dimm 0-1-1
                                                         device i2c 53 on end

-                                                end              
+                                                end

                                                 chip drivers/generic/generic #dimm 1-0-0
                                                         device i2c 54 on end
                                                 chip drivers/generic/generic #dimm 1-0-0
                                                         device i2c 54 on end

-                                                end     
+                                                end

                                                 chip drivers/generic/generic #dimm 1-0-1
                                                         device i2c 55 on end
                                                 chip drivers/generic/generic #dimm 1-0-1
                                                         device i2c 55 on end

-                                                end     
+                                                end

                                                 chip drivers/generic/generic #dimm 1-1-0
                                                         device i2c 56 on end
                                                 chip drivers/generic/generic #dimm 1-1-0
                                                         device i2c 56 on end

-                                                end     
+                                                end

                                                 chip drivers/generic/generic #dimm 1-1-1
                                                         device i2c 57 on end
                                                 chip drivers/generic/generic #dimm 1-1-1
                                                         device i2c 57 on end

-                                                end 
+                                                end

                                        end # SM
                                         device pci 1.1 on # SM 1
 #PCI device smbus address will depend on addon pci device, do we need to scan_smbus_bus?
                                        end # SM
                                         device pci 1.1 on # SM 1
 #PCI device smbus address will depend on addon pci device, do we need to scan_smbus_bus?


@@ -87,24 +87,24 @@ chip northbridge/amd/amdfam10/root_complex
 #                                                end
 #                                                chip drivers/generic/generic #PCIXB Slot1
 #                                                        device i2c 51 on end
 #                                                end
 #                                                chip drivers/generic/generic #PCIXB Slot1
 #                                                        device i2c 51 on end

-#                                                end     
+#                                                end

 #                                                chip drivers/generic/generic #PCIXB Slot2
 #                                                        device i2c 52 on end
 #                                                chip drivers/generic/generic #PCIXB Slot2
 #                                                        device i2c 52 on end

-#                                                end             
+#                                                end

 #                                                chip drivers/generic/generic #PCI Slot1
 #                                                        device i2c 53 on end
 #                                                chip drivers/generic/generic #PCI Slot1
 #                                                        device i2c 53 on end

-#                                                end              
+#                                                end

 #                                                chip drivers/generic/generic #Master MCP55 PCI-E
 #                                                        device i2c 54 on end
 #                                                chip drivers/generic/generic #Master MCP55 PCI-E
 #                                                        device i2c 54 on end

-#                                                end     
+#                                                end

 #                                                chip drivers/generic/generic #Slave MCP55 PCI-E
 #                                                        device i2c 55 on end
 #                                                chip drivers/generic/generic #Slave MCP55 PCI-E
 #                                                        device i2c 55 on end

-#                                                end             
+#                                                end

                                                 chip drivers/generic/generic #MAC EEPROM
                                                         device i2c 51 on end
                                                 chip drivers/generic/generic #MAC EEPROM
                                                         device i2c 51 on end

-                                                end 
+                                                end

 
 

-                                        end # SM 
+                                        end # SM

                                        device pci 2.0 on end # USB 1.1
                                        device pci 2.1 on end # USB 2
                                        device pci 4.0 on end # IDE
                                        device pci 2.0 on end # USB 1.1
                                        device pci 2.1 on end # USB 2
                                        device pci 4.0 on end # IDE


@@ -136,7 +136,7 @@ chip northbridge/amd/amdfam10/root_complex
                                        register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1
                                        register "mac_eeprom_addr" = "0x51"
                                end
                                        register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1
                                        register "mac_eeprom_addr" = "0x51"
                                end

-                       end #  device pci 18.0 
+                       end #  device pci 18.0

                        device pci 18.1 on end
                        device pci 18.2 on end
                        device pci 18.3 on end
                        device pci 18.1 on end
                        device pci 18.2 on end
                        device pci 18.3 on end


@@ -147,10 +147,10 @@ chip northbridge/amd/amdfam10/root_complex
                        device pci 19.3 on end
                        device pci 19.4 on end
                end # mc0
                        device pci 19.3 on end
                        device pci 19.4 on end
                end # mc0

-               
+

        end # PCI domain
        end # PCI domain

-       
-#       chip drivers/generic/debug 
+
+#       chip drivers/generic/debug

 #               device pnp 0.0 off end # chip name
 #                device pnp 0.1 on end # pci_regs_all
 #                device pnp 0.2 off end # mem
 #               device pnp 0.0 off end # chip name
 #                device pnp 0.1 on end # pci_regs_all
 #                device pnp 0.2 off end # mem


@@ -161,5 +161,5 @@ chip northbridge/amd/amdfam10/root_complex
 #                device pnp 0.7 off end # tsc
 #                device pnp 0.8 off  end # io
 #                device pnp 0.9 on end # io
 #                device pnp 0.7 off end # tsc
 #                device pnp 0.8 off  end # io
 #                device pnp 0.9 on end # io

-#       end  
+#       end

 end #root_complex
 end #root_complex

diff --git a/src/mainboard/supermicro/h8dmr_fam10/irq_tables.c b/src/mainboard/supermicro/h8dmr_fam10/irq_tables.c
index 673db742fb173e42d943aad9332e0d7a4ca8fad8..a981fe1b9cd4d5c96c971c0fd94e4a5134b39446 100644 (file)
--- a/src/mainboard/supermicro/h8dmr_fam10/irq_tables.c
+++ b/src/mainboard/supermicro/h8dmr_fam10/irq_tables.c
@@ -19,7 +19,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 

-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!

  * (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 
  * (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 


@@ -34,11 +34,11 @@
 #include <cpu/amd/amdfam10_sysconf.h>
 #include "mb_sysconf.h"
 
 #include <cpu/amd/amdfam10_sysconf.h>
 #include "mb_sysconf.h"
 

-static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0, 
+static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,

                uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
                uint8_t slot, uint8_t rfu)
 {
                uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
                uint8_t slot, uint8_t rfu)
 {

-       pirq_info->bus = bus; 
+       pirq_info->bus = bus;

        pirq_info->devfn = devfn;
                pirq_info->irq[0].link = link0;
                pirq_info->irq[0].bitmap = bitmap0;
        pirq_info->devfn = devfn;
                pirq_info->irq[0].link = link0;
                pirq_info->irq[0].bitmap = bitmap0;


@@ -80,15 +80,15 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 
        pirq = (void *)(addr);
        v = (uint8_t *)(addr);
 
        pirq = (void *)(addr);
        v = (uint8_t *)(addr);

-       
+

        pirq->signature = PIRQ_SIGNATURE;
        pirq->version  = PIRQ_VERSION;
        pirq->signature = PIRQ_SIGNATURE;
        pirq->version  = PIRQ_VERSION;

-       
+

        pirq->rtr_bus = m->bus_mcp55[0];
        pirq->rtr_devfn = ((sbdn+6)<<3)|0;
 
        pirq->exclusive_irqs = 0;
        pirq->rtr_bus = m->bus_mcp55[0];
        pirq->rtr_devfn = ((sbdn+6)<<3)|0;
 
        pirq->exclusive_irqs = 0;

-       
+

        pirq->rtr_vendor = 0x10de;
        pirq->rtr_device = 0x0370;
 
        pirq->rtr_vendor = 0x10de;
        pirq->rtr_device = 0x0370;
 


@@ -101,7 +101,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 //pci bridge
        write_pirq_info(pirq_info, m->bus_mcp55[0], ((sbdn+6)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
        pirq_info++; slot_num++;
 //pci bridge
        write_pirq_info(pirq_info, m->bus_mcp55[0], ((sbdn+6)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
        pirq_info++; slot_num++;

-       
+

        for(i=1; i< sysconf.hc_possible_num; i++) {
                if(!(sysconf.pci1234[i] & 0x1) ) continue;
                unsigned busn = (sysconf.pci1234[i] >> 12) & 0xff;
        for(i=1; i< sysconf.hc_possible_num; i++) {
                if(!(sysconf.pci1234[i] & 0x1) ) continue;
                unsigned busn = (sysconf.pci1234[i] >> 12) & 0xff;


@@ -120,10 +120,10 @@ unsigned long write_pirq_routing_table(unsigned long addr)
        }
 #endif
 
        }
 #endif
 

-       pirq->size = 32 + 16 * slot_num; 
+       pirq->size = 32 + 16 * slot_num;

 
        for (i = 0; i < pirq->size; i++)
 
        for (i = 0; i < pirq->size; i++)

-               sum += v[i];    
+               sum += v[i];

 
        sum = pirq->checksum - sum;
 
 
        sum = pirq->checksum - sum;
 

diff --git a/src/mainboard/supermicro/h8dmr_fam10/mb_sysconf.h b/src/mainboard/supermicro/h8dmr_fam10/mb_sysconf.h
index 83f9dbab28cb5e5d03e7483644cd82a95b39b9da..a2e6fc7ade7c8f3df1de373279bf00ee1dfae7a6 100644 (file)
--- a/src/mainboard/supermicro/h8dmr_fam10/mb_sysconf.h
+++ b/src/mainboard/supermicro/h8dmr_fam10/mb_sysconf.h
@@ -26,7 +26,7 @@ struct mb_sysconf_t {
        unsigned char bus_isa;
        unsigned char bus_mcp55[8]; //1
        unsigned apicid_mcp55;
        unsigned char bus_isa;
        unsigned char bus_mcp55[8]; //1
        unsigned apicid_mcp55;

-       unsigned bus_type[256]; 
+       unsigned bus_type[256];

 
 };
 
 
 };
 

diff --git a/src/mainboard/supermicro/h8dmr_fam10/resourcemap.c b/src/mainboard/supermicro/h8dmr_fam10/resourcemap.c
index 13ae166708a1a8b6613de7956129b8f9cc94b81a..0aded2ccbd10ab92f628567402c5a293ba9dc4ba 100644 (file)
--- a/src/mainboard/supermicro/h8dmr_fam10/resourcemap.c
+++ b/src/mainboard/supermicro/h8dmr_fam10/resourcemap.c
@@ -161,7 +161,7 @@ static void setup_mb_resource_map(void)
                 *         1 = base/limit registers i are read-only
                 * [ 7: 4] Reserved
                 * [31: 8] Memory-Mapped I/O Base Address i (39-16)
                 *         1 = base/limit registers i are read-only
                 * [ 7: 4] Reserved
                 * [31: 8] Memory-Mapped I/O Base Address i (39-16)

-                *         This field defines the upper address bits of a 40bit address 
+                *         This field defines the upper address bits of a 40bit address

                 *         that defines the start of memory-mapped I/O region i
                 */
                PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0x80), 0x000000f0, 0x00000000,
                 *         that defines the start of memory-mapped I/O region i
                 */
                PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0x80), 0x000000f0, 0x00000000,


@@ -218,7 +218,7 @@ static void setup_mb_resource_map(void)
                 * [ 3: 2] Reserved
                 * [ 4: 4] VGA Enable
                 *         0 = VGA matches Disabled
                 * [ 3: 2] Reserved
                 * [ 4: 4] VGA Enable
                 *         0 = VGA matches Disabled

-                *         1 = matches all address < 64K and where A[9:0] is in the 
+                *         1 = matches all address < 64K and where A[9:0] is in the

                 *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
                 * [ 5: 5] ISA Enable
                 *         0 = ISA matches Disabled
                 *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
                 * [ 5: 5] ISA Enable
                 *         0 = ISA matches Disabled


@@ -226,7 +226,7 @@ static void setup_mb_resource_map(void)
                 *             from matching agains this base/limit pair
                 * [11: 6] Reserved
                 * [24:12] PCI I/O Base i
                 *             from matching agains this base/limit pair
                 * [11: 6] Reserved
                 * [24:12] PCI I/O Base i

-                *         This field defines the start of PCI I/O region n 
+                *         This field defines the start of PCI I/O region n

                 * [31:25] Reserved
                 */
                // WARD CHANGED
                 * [31:25] Reserved
                 */
                // WARD CHANGED


@@ -273,9 +273,9 @@ static void setup_mb_resource_map(void)
                 */
                // WARD CHANGED
                PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xE0), 0x0000FC88, 0x3f000203, /* link 2 of cpu 0 --> Nvidia MCP55 Pro */
                 */
                // WARD CHANGED
                PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xE0), 0x0000FC88, 0x3f000203, /* link 2 of cpu 0 --> Nvidia MCP55 Pro */

-               PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xE4), 0x0000FC88, 0x00000000, 
+               PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xE4), 0x0000FC88, 0x00000000,

                PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xE8), 0x0000FC88, 0x00000000,
                PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xE8), 0x0000FC88, 0x00000000,

-               PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xEC), 0x0000FC88, 0x00000000, 
+               PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xEC), 0x0000FC88, 0x00000000,

 
        };
 
 
        };
 

diff --git a/src/mainboard/supermicro/h8qme_fam10/cmos.layout b/src/mainboard/supermicro/h8qme_fam10/cmos.layout
index 9d37e2bba61f0ed9138fb24d7017a6bceec58778..518f9458b698c637260b1df5ed68c682c06f9c9c 100644 (file)
--- a/src/mainboard/supermicro/h8qme_fam10/cmos.layout
+++ b/src/mainboard/supermicro/h8qme_fam10/cmos.layout
@@ -1,23 +1,23 @@
-## 
+##

 ## This file is part of the coreboot project.
 ## This file is part of the coreboot project.

-## 
+##

 ## Copyright (C) 2007 AMD
 ## Written by Yinghai Lu <yinghailu@amd.com> for AMD.
 ## Copyright (C) 2007 AMD
 ## Written by Yinghai Lu <yinghailu@amd.com> for AMD.

-## 
+##

 ## This program is free software; you can redistribute it and/or modify
 ## it under the terms of the GNU General Public License as published by
 ## the Free Software Foundation; either version 2 of the License, or
 ## (at your option) any later version.
 ## This program is free software; you can redistribute it and/or modify
 ## it under the terms of the GNU General Public License as published by
 ## the Free Software Foundation; either version 2 of the License, or
 ## (at your option) any later version.

-## 
+##

 ## This program is distributed in the hope that it will be useful,
 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 ## GNU General Public License for more details.
 ## This program is distributed in the hope that it will be useful,
 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 ## GNU General Public License for more details.

-## 
+##

 ## You should have received a copy of the GNU General Public License
 ## along with this program; if not, write to the Free Software
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 ## You should have received a copy of the GNU General Public License
 ## along with this program; if not, write to the Free Software
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA

-## 
+##

 
 entries
 
 
 entries
 

diff --git a/src/mainboard/supermicro/h8qme_fam10/devicetree.cb b/src/mainboard/supermicro/h8qme_fam10/devicetree.cb
index 51c2feb0009966bd7ad56a6f2cbf231d638aaae0..5759f40ccf9efa8ab2a6433c1f40c0312aa0c81a 100644 (file)
--- a/src/mainboard/supermicro/h8qme_fam10/devicetree.cb
+++ b/src/mainboard/supermicro/h8qme_fam10/devicetree.cb
@@ -8,9 +8,9 @@ chip northbridge/amd/amdfam10/root_complex
                chip northbridge/amd/amdfam10 #mc0
                        device pci 18.0 on end
                        device pci 18.0 on end
                chip northbridge/amd/amdfam10 #mc0
                        device pci 18.0 on end
                        device pci 18.0 on end

-                       device pci 18.0 on 
+                       device pci 18.0 on

         # SB on link 2.0
         # SB on link 2.0

-                               chip southbridge/nvidia/mcp55 
+                               chip southbridge/nvidia/mcp55

                                        device pci 0.0 on end   # HT
                                        device pci 1.0 on # LPC
                                                chip superio/winbond/w83627hf
                                        device pci 0.0 on end   # HT
                                        device pci 1.0 on # LPC
                                                chip superio/winbond/w83627hf


@@ -37,14 +37,14 @@ chip northbridge/amd/amdfam10/root_complex
                                                                irq 0x70 = 1
                                                                irq 0x72 = 12
                                                        end
                                                                irq 0x70 = 1
                                                                irq 0x72 = 12
                                                        end

-                                                       device pnp 2e.6 off  # SFI 
+                                                       device pnp 2e.6 off  # SFI

                                                                io 0x62 = 0x100
                                                        end
                                                        device pnp 2e.7 off #  GPIO_GAME_MIDI
                                                                io 0x60 = 0x220
                                                                io 0x62 = 0x300
                                                                irq 0x70 = 9
                                                                io 0x62 = 0x100
                                                        end
                                                        device pnp 2e.7 off #  GPIO_GAME_MIDI
                                                                io 0x60 = 0x220
                                                                io 0x62 = 0x300
                                                                irq 0x70 = 9

-                                                       end                                             
+                                                       end

                                                        device pnp 2e.8 off end #  WDTO_PLED
                                                        device pnp 2e.9 off end #  GPIO_SUSLED
                                                        device pnp 2e.a off end #  ACPI
                                                        device pnp 2e.8 off end #  WDTO_PLED
                                                        device pnp 2e.9 off end #  GPIO_SUSLED
                                                        device pnp 2e.a off end #  ACPI


@@ -57,12 +57,12 @@ chip northbridge/amd/amdfam10/root_complex
                                        device pci 1.1 on end
                                         device pci 1.1 on # SM 1
 #PCI device smbus address will depend on addon pci device, do we need to scan_smbus_bus?
                                        device pci 1.1 on end
                                         device pci 1.1 on # SM 1
 #PCI device smbus address will depend on addon pci device, do we need to scan_smbus_bus?

-#                                                         
+#

                                                 chip drivers/generic/generic #MAC EEPROM
                                                         device i2c 51 on end
                                                 chip drivers/generic/generic #MAC EEPROM
                                                         device i2c 51 on end

-                                                end 
+                                                end

 
 

-                                        end # SM 
+                                        end # SM

                                        device pci 2.0 on end # USB 1.1
                                        device pci 2.1 on end # USB 2
                                        device pci 4.0 on end # IDE
                                        device pci 2.0 on end # USB 1.1
                                        device pci 2.1 on end # USB 2
                                        device pci 4.0 on end # IDE


@@ -70,7 +70,7 @@ chip northbridge/amd/amdfam10/root_complex
                                        device pci 5.1 on end # SATA 1
                                        device pci 5.2 on end # SATA 2
                                        device pci 6.1 off end # AZA
                                        device pci 5.1 on end # SATA 1
                                        device pci 5.2 on end # SATA 2
                                        device pci 6.1 off end # AZA

-                                       device pci 7.0 on 
+                                       device pci 7.0 on

                                            device pci 1.0 on end
                                        end
                                        device pci 8.0 off end
                                            device pci 1.0 on end
                                        end
                                        device pci 8.0 off end


@@ -87,7 +87,7 @@ chip northbridge/amd/amdfam10/root_complex
                                        register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1
                                        register "mac_eeprom_addr" = "0x51"
                                end
                                        register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1
                                        register "mac_eeprom_addr" = "0x51"
                                end

-                       end #  device pci 18.0 
+                       end #  device pci 18.0

                        device pci 18.1 on end
                        device pci 18.2 on end
                        device pci 18.3 on end
                        device pci 18.1 on end
                        device pci 18.2 on end
                        device pci 18.3 on end


@@ -110,10 +110,10 @@ chip northbridge/amd/amdfam10/root_complex
                        device pci 19.3 on end
                        device pci 19.4 on end
                end # mc0
                        device pci 19.3 on end
                        device pci 19.4 on end
                end # mc0

-               
+

        end # PCI domain
        end # PCI domain

-       
-#       chip drivers/generic/debug 
+
+#       chip drivers/generic/debug

 #               device pnp 0.0 off end # chip name
 #                device pnp 0.1 on end # pci_regs_all
 #                device pnp 0.2 off end # mem
 #               device pnp 0.0 off end # chip name
 #                device pnp 0.1 on end # pci_regs_all
 #                device pnp 0.2 off end # mem


@@ -124,5 +124,5 @@ chip northbridge/amd/amdfam10/root_complex
 #                device pnp 0.7 off end # tsc
 #                device pnp 0.8 off  end # io
 #                device pnp 0.9 on end # io
 #                device pnp 0.7 off end # tsc
 #                device pnp 0.8 off  end # io
 #                device pnp 0.9 on end # io

-#       end  
+#       end

 end #root_complex
 end #root_complex

diff --git a/src/mainboard/supermicro/h8qme_fam10/irq_tables.c b/src/mainboard/supermicro/h8qme_fam10/irq_tables.c
index efaf4cb7547f51b535ab04d3b90d10e184e35bfc..9338d5e08c796a78b594e93706ce0c003827d9e5 100644 (file)
--- a/src/mainboard/supermicro/h8qme_fam10/irq_tables.c
+++ b/src/mainboard/supermicro/h8qme_fam10/irq_tables.c
@@ -19,7 +19,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 

-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!

  * (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 
  * (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 


@@ -34,11 +34,11 @@
 #include <cpu/amd/amdfam10_sysconf.h>
 #include "mb_sysconf.h"
 
 #include <cpu/amd/amdfam10_sysconf.h>
 #include "mb_sysconf.h"
 

-static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0, 
+static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,

                uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
                uint8_t slot, uint8_t rfu)
 {
                uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
                uint8_t slot, uint8_t rfu)
 {

-       pirq_info->bus = bus; 
+       pirq_info->bus = bus;

        pirq_info->devfn = devfn;
                pirq_info->irq[0].link = link0;
                pirq_info->irq[0].bitmap = bitmap0;
        pirq_info->devfn = devfn;
                pirq_info->irq[0].link = link0;
                pirq_info->irq[0].bitmap = bitmap0;


@@ -80,15 +80,15 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 
        pirq = (void *)(addr);
        v = (uint8_t *)(addr);
 
        pirq = (void *)(addr);
        v = (uint8_t *)(addr);

-       
+

        pirq->signature = PIRQ_SIGNATURE;
        pirq->version  = PIRQ_VERSION;
        pirq->signature = PIRQ_SIGNATURE;
        pirq->version  = PIRQ_VERSION;

-       
+

        pirq->rtr_bus = m->bus_mcp55[0];
        pirq->rtr_devfn = ((sbdn+6)<<3)|0;
 
        pirq->exclusive_irqs = 0;
        pirq->rtr_bus = m->bus_mcp55[0];
        pirq->rtr_devfn = ((sbdn+6)<<3)|0;
 
        pirq->exclusive_irqs = 0;

-       
+

        pirq->rtr_vendor = 0x10de;
        pirq->rtr_device = 0x0364;
 
        pirq->rtr_vendor = 0x10de;
        pirq->rtr_device = 0x0364;
 


@@ -101,7 +101,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 //pci bridge
        write_pirq_info(pirq_info, m->bus_mcp55[0], ((sbdn+6)<<3)|0, 0x1, 0x4ca0, 0x2, 0x4ca0, 0x3, 0x4ca0, 0x4, 0x4ca0, 0, 0);
        pirq_info++; slot_num++;
 //pci bridge
        write_pirq_info(pirq_info, m->bus_mcp55[0], ((sbdn+6)<<3)|0, 0x1, 0x4ca0, 0x2, 0x4ca0, 0x3, 0x4ca0, 0x4, 0x4ca0, 0, 0);
        pirq_info++; slot_num++;

-       
+

        for(i=1; i< sysconf.hc_possible_num; i++) {
                if(!(sysconf.pci1234[i] & 0x1) ) continue;
                unsigned busn = (sysconf.pci1234[i] >> 12) & 0xff;
        for(i=1; i< sysconf.hc_possible_num; i++) {
                if(!(sysconf.pci1234[i] & 0x1) ) continue;
                unsigned busn = (sysconf.pci1234[i] >> 12) & 0xff;


@@ -120,10 +120,10 @@ unsigned long write_pirq_routing_table(unsigned long addr)
        }
 #endif
 
        }
 #endif
 

-       pirq->size = 32 + 16 * slot_num; 
+       pirq->size = 32 + 16 * slot_num;

 
        for (i = 0; i < pirq->size; i++)
 
        for (i = 0; i < pirq->size; i++)

-               sum += v[i];    
+               sum += v[i];

 
        sum = pirq->checksum - sum;
 
 
        sum = pirq->checksum - sum;
 

diff --git a/src/mainboard/supermicro/h8qme_fam10/mb_sysconf.h b/src/mainboard/supermicro/h8qme_fam10/mb_sysconf.h
index 42969bb71e54f2128e4480d4c52597dab2c0c508..5a17fa9442d06daa879f8e3dd295b6031f402c5b 100644 (file)
--- a/src/mainboard/supermicro/h8qme_fam10/mb_sysconf.h
+++ b/src/mainboard/supermicro/h8qme_fam10/mb_sysconf.h
@@ -26,7 +26,7 @@ struct mb_sysconf_t {
        unsigned char bus_isa;
        unsigned char bus_mcp55[8]; //1
        unsigned apicid_mcp55;
        unsigned char bus_isa;
        unsigned char bus_mcp55[8]; //1
        unsigned apicid_mcp55;

-       unsigned bus_type[256]; 
+       unsigned bus_type[256];

 
        unsigned char bus_8132_0;  //7
        unsigned char bus_8132_1;  //8
 
        unsigned char bus_8132_0;  //7
        unsigned char bus_8132_1;  //8

diff --git a/src/mainboard/supermicro/h8qme_fam10/mptable.c b/src/mainboard/supermicro/h8qme_fam10/mptable.c
index 551ee977faf16acda34df1e5cfac7aefe5d636bb..c365ddbe2da6eabe64b03c634f2baaac1d888412 100644 (file)
--- a/src/mainboard/supermicro/h8qme_fam10/mptable.c
+++ b/src/mainboard/supermicro/h8qme_fam10/mptable.c
@@ -100,33 +100,33 @@ static void *smp_write_config_table(void *v)
 
 
        }
 
 
        }

-               
+

                   /*I/O Ints:  Type    Polarity    Trigger                     Bus ID   IRQ    APIC ID PIN# */
                   /*I/O Ints:  Type    Polarity    Trigger                     Bus ID   IRQ    APIC ID PIN# */

-       smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, m->apicid_mcp55, 0x0); 
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x1, m->apicid_mcp55, 0x1); 
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x0, m->apicid_mcp55, 0x2); 
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x3, m->apicid_mcp55, 0x3); 
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x4, m->apicid_mcp55, 0x4); 
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x6, m->apicid_mcp55, 0x6); 
+       smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, m->apicid_mcp55, 0x0);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x1, m->apicid_mcp55, 0x1);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x0, m->apicid_mcp55, 0x2);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x3, m->apicid_mcp55, 0x3);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x4, m->apicid_mcp55, 0x4);
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x6, m->apicid_mcp55, 0x6);

        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x7, m->apicid_mcp55, 0x7);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x8, m->apicid_mcp55, 0x8);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0xc, m->apicid_mcp55, 0xc);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0xd, m->apicid_mcp55, 0xd);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0xe, m->apicid_mcp55, 0xe);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0xf, m->apicid_mcp55, 0xf);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x7, m->apicid_mcp55, 0x7);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x8, m->apicid_mcp55, 0x8);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0xc, m->apicid_mcp55, 0xc);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0xd, m->apicid_mcp55, 0xd);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0xe, m->apicid_mcp55, 0xe);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0xf, m->apicid_mcp55, 0xf);

-       
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+1)<<2)|1, m->apicid_mcp55, 0x5);  /*  5 SMBus, OK */ 
+
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+1)<<2)|1, m->apicid_mcp55, 0x5);  /*  5 SMBus, OK */

        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+2)<<2)|0, m->apicid_mcp55, 0xb); /* 11 USB, OK */
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+2)<<2)|1, m->apicid_mcp55, 0xa); /* 10 USB, OK */
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+5)<<2)|0, m->apicid_mcp55, 0x5); /*  5  IDE, OK*/
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+2)<<2)|0, m->apicid_mcp55, 0xb); /* 11 USB, OK */
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+2)<<2)|1, m->apicid_mcp55, 0xa); /* 10 USB, OK */
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+5)<<2)|0, m->apicid_mcp55, 0x5); /*  5  IDE, OK*/

-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+5)<<2)|1, m->apicid_mcp55, 0xa); /* 10 IDE, OK*/ 
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+5)<<2)|2, m->apicid_mcp55, 0xa); /* 10 IDE, OK*/ 
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+5)<<2)|1, m->apicid_mcp55, 0xa); /* 10 IDE, OK*/
+       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+5)<<2)|2, m->apicid_mcp55, 0xa); /* 10 IDE, OK*/

        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+6)<<2)|1, m->apicid_mcp55, 0xa); /* 10 VGA, OK*/
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+6)<<2)|1, m->apicid_mcp55, 0xa); /* 10 VGA, OK*/

-       
+

        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132_2, ((3)<<2)|0, m->apicid_mcp55, 0x5); /* 5  eth0, OK*/
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132_2, ((3)<<2)|1, m->apicid_mcp55, 0xb); /* 11 eth1, OK*/
 
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132_2, ((3)<<2)|0, m->apicid_mcp55, 0x5); /* 5  eth0, OK*/
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132_2, ((3)<<2)|1, m->apicid_mcp55, 0xb); /* 11 eth1, OK*/
 

-       for(j=7;j>=2; j--) { 
+       for(j=7;j>=2; j--) {

                if(!m->bus_mcp55[j]) continue;
                for(i=0;i<4;i++) {
                        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[j], (0x00<<2)|i, m->apicid_mcp55, 0x10 + (2+j+i+4-sbdn%4)%4);
                if(!m->bus_mcp55[j]) continue;
                for(i=0;i<4;i++) {
                        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[j], (0x00<<2)|i, m->apicid_mcp55, 0x10 + (2+j+i+4-sbdn%4)%4);

diff --git a/src/mainboard/supermicro/h8qme_fam10/resourcemap.c b/src/mainboard/supermicro/h8qme_fam10/resourcemap.c
index 13ae166708a1a8b6613de7956129b8f9cc94b81a..0aded2ccbd10ab92f628567402c5a293ba9dc4ba 100644 (file)
--- a/src/mainboard/supermicro/h8qme_fam10/resourcemap.c
+++ b/src/mainboard/supermicro/h8qme_fam10/resourcemap.c
@@ -161,7 +161,7 @@ static void setup_mb_resource_map(void)
                 *         1 = base/limit registers i are read-only
                 * [ 7: 4] Reserved
                 * [31: 8] Memory-Mapped I/O Base Address i (39-16)
                 *         1 = base/limit registers i are read-only
                 * [ 7: 4] Reserved
                 * [31: 8] Memory-Mapped I/O Base Address i (39-16)

-                *         This field defines the upper address bits of a 40bit address 
+                *         This field defines the upper address bits of a 40bit address

                 *         that defines the start of memory-mapped I/O region i
                 */
                PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0x80), 0x000000f0, 0x00000000,
                 *         that defines the start of memory-mapped I/O region i
                 */
                PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0x80), 0x000000f0, 0x00000000,


@@ -218,7 +218,7 @@ static void setup_mb_resource_map(void)
                 * [ 3: 2] Reserved
                 * [ 4: 4] VGA Enable
                 *         0 = VGA matches Disabled
                 * [ 3: 2] Reserved
                 * [ 4: 4] VGA Enable
                 *         0 = VGA matches Disabled

-                *         1 = matches all address < 64K and where A[9:0] is in the 
+                *         1 = matches all address < 64K and where A[9:0] is in the

                 *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
                 * [ 5: 5] ISA Enable
                 *         0 = ISA matches Disabled
                 *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
                 * [ 5: 5] ISA Enable
                 *         0 = ISA matches Disabled


@@ -226,7 +226,7 @@ static void setup_mb_resource_map(void)
                 *             from matching agains this base/limit pair
                 * [11: 6] Reserved
                 * [24:12] PCI I/O Base i
                 *             from matching agains this base/limit pair
                 * [11: 6] Reserved
                 * [24:12] PCI I/O Base i

-                *         This field defines the start of PCI I/O region n 
+                *         This field defines the start of PCI I/O region n

                 * [31:25] Reserved
                 */
                // WARD CHANGED
                 * [31:25] Reserved
                 */
                // WARD CHANGED


@@ -273,9 +273,9 @@ static void setup_mb_resource_map(void)
                 */
                // WARD CHANGED
                PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xE0), 0x0000FC88, 0x3f000203, /* link 2 of cpu 0 --> Nvidia MCP55 Pro */
                 */
                // WARD CHANGED
                PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xE0), 0x0000FC88, 0x3f000203, /* link 2 of cpu 0 --> Nvidia MCP55 Pro */

-               PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xE4), 0x0000FC88, 0x00000000, 
+               PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xE4), 0x0000FC88, 0x00000000,

                PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xE8), 0x0000FC88, 0x00000000,
                PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xE8), 0x0000FC88, 0x00000000,

-               PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xEC), 0x0000FC88, 0x00000000, 
+               PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xEC), 0x0000FC88, 0x00000000,

 
        };
 
 
        };
 

diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c
index aa2081f7df63f1361d6e48e4e3b471b62dc0dd78..0d1657a170a5f2663e7241c4cd78f07f1a07caf6 100644 (file)
--- a/src/mainboard/supermicro/h8qme_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c
@@ -93,12 +93,12 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 #include "northbridge/amd/amdfam10/raminit_amdmct.c"
 #include "northbridge/amd/amdfam10/amdfam10_pci.c"
 
 #include "northbridge/amd/amdfam10/raminit_amdmct.c"
 #include "northbridge/amd/amdfam10/amdfam10_pci.c"
 

-#include "resourcemap.c" 
+#include "resourcemap.c"

 
 #include "cpu/amd/quadcore/quadcore.c"
 
 #define MCP55_NUM 1
 
 #include "cpu/amd/quadcore/quadcore.c"
 
 #define MCP55_NUM 1

-#define MCP55_USE_NIC 0 
+#define MCP55_USE_NIC 0

 #define MCP55_USE_AZA 0
 
 #define MCP55_PCI_E_X_0 4
 #define MCP55_USE_AZA 0
 
 #define MCP55_PCI_E_X_0 4


@@ -128,13 +128,13 @@ static void sio_setup(void)
        smbusx_write_byte(1, (0x58>>1), 0xb1, 0xff); /* set FAN ctrl to DC mode */
 
         byte = pci_read_config8(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0x7b);
        smbusx_write_byte(1, (0x58>>1), 0xb1, 0xff); /* set FAN ctrl to DC mode */
 
         byte = pci_read_config8(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0x7b);

-        byte |= 0x20; 
+        byte |= 0x20;

         pci_write_config8(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0x7b, byte);
         pci_write_config8(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0x7b, byte);

-        
+

         dword = pci_read_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa0);
         dword |= (1<<0);
         pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa0, dword);
         dword = pci_read_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa0);
         dword |= (1<<0);
         pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa0, dword);

-        
+

         dword = pci_read_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa4);
         dword |= (1<<16);
         pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa4, dword);
         dword = pci_read_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa4);
         dword |= (1<<16);
         pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa4, dword);


@@ -206,7 +206,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         }
 
   post_code(0x30);
         }
 
   post_code(0x30);

- 
+

         if (bist == 0) {
                bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);
         }
         if (bist == 0) {
                bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);
         }

diff --git a/src/mainboard/supermicro/x6dai_g/debug.c b/src/mainboard/supermicro/x6dai_g/debug.c
index b4f2a185b37b405a0844f45927275e50550db5a3..87c67b5964cbea35f6a083a7c2c895c533f3cfe0 100644 (file)
--- a/src/mainboard/supermicro/x6dai_g/debug.c
+++ b/src/mainboard/supermicro/x6dai_g/debug.c
@@ -5,7 +5,7 @@
 static void print_reg(unsigned char index)
 {
         unsigned char data;
 static void print_reg(unsigned char index)
 {
         unsigned char data;

-                                                                                
+

         outb(index, 0x2e);
         data = inb(0x2f);
        print_debug("0x");
         outb(index, 0x2e);
         data = inb(0x2f);
        print_debug("0x");


@@ -15,7 +15,7 @@ static void print_reg(unsigned char index)
        print_debug("\n");
         return;
 }
        print_debug("\n");
         return;
 }

-        
+

 static void xbus_en(void)
 {
         /* select the XBUS function in the SIO */
 static void xbus_en(void)
 {
         /* select the XBUS function in the SIO */


@@ -25,7 +25,7 @@ static void xbus_en(void)
         outb(0x01, 0x2f);
        return;
 }
         outb(0x01, 0x2f);
        return;
 }

-                                                                        
+

 static void setup_func(unsigned char func)
 {
         /* select the function in the SIO */
 static void setup_func(unsigned char func)
 {
         /* select the function in the SIO */


@@ -43,27 +43,27 @@ static void setup_func(unsigned char func)
         print_reg(0x75);
         return;
 }
         print_reg(0x75);
         return;
 }

-                                                                                
+

 static void siodump(void)
 {
         int i;
         unsigned char data;
 static void siodump(void)
 {
         int i;
         unsigned char data;

-       
+

         print_debug("\n*** SERVER I/O REGISTERS ***\n");
         for (i=0x10; i<=0x2d; i++) {
                 print_reg((unsigned char)i);
         }
         print_debug("\n*** SERVER I/O REGISTERS ***\n");
         for (i=0x10; i<=0x2d; i++) {
                 print_reg((unsigned char)i);
         }

-#if 0                                                                         
+#if 0

         print_debug("\n*** XBUS REGISTERS ***\n");
         setup_func(0x0f);
         for (i=0xf0; i<=0xff; i++) {
                 print_reg((unsigned char)i);
         }
         print_debug("\n*** XBUS REGISTERS ***\n");
         setup_func(0x0f);
         for (i=0xf0; i<=0xff; i++) {
                 print_reg((unsigned char)i);
         }

-                                                                                
+

         print_debug("\n***  SERIAL 1 CONFIG REGISTERS ***\n");
         setup_func(0x03);
         print_reg(0xf0);
         print_debug("\n***  SERIAL 1 CONFIG REGISTERS ***\n");
         setup_func(0x03);
         print_reg(0xf0);

-                                                                                
+

         print_debug("\n***  SERIAL 2 CONFIG REGISTERS ***\n");
         setup_func(0x02);
         print_reg(0xf0);
         print_debug("\n***  SERIAL 2 CONFIG REGISTERS ***\n");
         setup_func(0x02);
         print_reg(0xf0);


@@ -82,13 +82,13 @@ static void siodump(void)
        print_debug("\nGPDI 4: 0x");
        print_debug_hex8(data);
        print_debug("\n");
        print_debug("\nGPDI 4: 0x");
        print_debug_hex8(data);
        print_debug("\n");

-       
-#if 0                                                                                
-                                                                                
+
+#if 0
+

         print_debug("\n***  WATCHDOG TIMER REGISTERS ***\n");
         setup_func(0x0a);
         print_reg(0xf0);
         print_debug("\n***  WATCHDOG TIMER REGISTERS ***\n");
         setup_func(0x0a);
         print_reg(0xf0);

-                                                                                
+

         print_debug("\n***  FAN CONTROL REGISTERS ***\n");
         setup_func(0x09);
         print_reg(0xf0);
         print_debug("\n***  FAN CONTROL REGISTERS ***\n");
         setup_func(0x09);
         print_reg(0xf0);


@@ -103,11 +103,11 @@ static void siodump(void)
         print_reg(0xf7);
         print_reg(0xfe);
         print_reg(0xff);
         print_reg(0xf7);
         print_reg(0xfe);
         print_reg(0xff);

-                                                                                
+

         print_debug("\n***  HEALTH MONITORING & CONTROL REGISTERS ***\n");
         setup_func(0x14);
         print_reg(0xf0);
         print_debug("\n***  HEALTH MONITORING & CONTROL REGISTERS ***\n");
         setup_func(0x14);
         print_reg(0xf0);

-#endif                                                                           
+#endif

         return;
 }
 
         return;
 }
 


@@ -124,8 +124,8 @@ static void print_debug_pci_dev(unsigned dev)
 static void print_pci_devices(void)
 {
        device_t dev;
 static void print_pci_devices(void)
 {
        device_t dev;

-       for(dev = PCI_DEV(0, 0, 0); 
-               dev <= PCI_DEV(0, 0x1f, 0x7); 
+       for(dev = PCI_DEV(0, 0, 0);
+               dev <= PCI_DEV(0, 0x1f, 0x7);

                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);
                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);


@@ -144,7 +144,7 @@ static void dump_pci_device(unsigned dev)
        int i;
        print_debug_pci_dev(dev);
        print_debug("\n");
        int i;
        print_debug_pci_dev(dev);
        print_debug("\n");

-       
+

        for(i = 0; i <= 255; i++) {
                unsigned char val;
                if ((i & 0x0f) == 0) {
        for(i = 0; i <= 255; i++) {
                unsigned char val;
                if ((i & 0x0f) == 0) {


@@ -164,19 +164,19 @@ static void dump_bar14(unsigned dev)
 {
        int i;
        unsigned long bar;
 {
        int i;
        unsigned long bar;

-       
+

        print_debug("BAR 14 Dump\n");
        print_debug("BAR 14 Dump\n");

-       
+

        bar = pci_read_config32(dev, 0x14);
        for(i = 0; i <= 0x300; i+=4) {
        bar = pci_read_config32(dev, 0x14);
        for(i = 0; i <= 0x300; i+=4) {

-#if 0          
+#if 0

                unsigned char val;
                if ((i & 0x0f) == 0) {
                        print_debug_hex8(i);
                        print_debug_char(':');
                }
                val = pci_read_config8(dev, i);
                unsigned char val;
                if ((i & 0x0f) == 0) {
                        print_debug_hex8(i);
                        print_debug_char(':');
                }
                val = pci_read_config8(dev, i);

-#endif         
+#endif

                if((i%4)==0) {
                print_debug("\n");
                print_debug_hex16(i);
                if((i%4)==0) {
                print_debug("\n");
                print_debug_hex16(i);


@@ -191,8 +191,8 @@ static void dump_bar14(unsigned dev)
 static void dump_pci_devices(void)
 {
        device_t dev;
 static void dump_pci_devices(void)
 {
        device_t dev;

-       for(dev = PCI_DEV(0, 0, 0); 
-               dev <= PCI_DEV(0, 0x1f, 0x7); 
+       for(dev = PCI_DEV(0, 0, 0);
+               dev <= PCI_DEV(0, 0x1f, 0x7);

                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);
                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);


@@ -215,8 +215,8 @@ static void dump_spd_registers(const struct mem_controller *ctrl)
                device = ctrl->channel0[i];
                if (device) {
                        int j;
                device = ctrl->channel0[i];
                if (device) {
                        int j;

-                       print_debug("dimm: "); 
-                       print_debug_hex8(i); 
+                       print_debug("dimm: ");
+                       print_debug_hex8(i);

                        print_debug(".0: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {
                        print_debug(".0: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {


@@ -241,8 +241,8 @@ static void dump_spd_registers(const struct mem_controller *ctrl)
                device = ctrl->channel1[i];
                if (device) {
                        int j;
                device = ctrl->channel1[i];
                if (device) {
                        int j;

-                       print_debug("dimm: "); 
-                       print_debug_hex8(i); 
+                       print_debug("dimm: ");
+                       print_debug_hex8(i);

                        print_debug(".1: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {
                        print_debug(".1: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {


@@ -278,7 +278,7 @@ void dump_spd_registers(void)
                print_debug("\n");
                 print_debug("dimm ");
                print_debug_hex8(device);
                print_debug("\n");
                 print_debug("dimm ");
                print_debug_hex8(device);

-               
+

                 for(i = 0; (i < 256) ; i++) {
                        unsigned char byte;
                         if ((i % 16) == 0) {
                 for(i = 0; (i < 256) ; i++) {
                        unsigned char byte;
                         if ((i % 16) == 0) {


@@ -291,7 +291,7 @@ void dump_spd_registers(void)
                                 print_debug("bad device: ");
                                 print_debug_hex8(-status);
                                 print_debug("\n");
                                 print_debug("bad device: ");
                                 print_debug_hex8(-status);
                                 print_debug("\n");

-                                break; 
+                                break;

                        }
                        print_debug_hex8(status);
                        print_debug_char(' ');
                        }
                        print_debug_hex8(status);
                        print_debug_char(' ');


@@ -311,7 +311,7 @@ void dump_ipmi_registers(void)
                print_debug("\n");
                 print_debug("ipmi ");
                print_debug_hex8(device);
                print_debug("\n");
                 print_debug("ipmi ");
                print_debug_hex8(device);

-               
+

                 for(i = 0; (i < 8) ; i++) {
                        unsigned char byte;
                        status = smbus_read_byte(device, 2);
                 for(i = 0; (i < 8) ; i++) {
                        unsigned char byte;
                        status = smbus_read_byte(device, 2);


@@ -319,7 +319,7 @@ void dump_ipmi_registers(void)
                                 print_debug("bad device: ");
                                 print_debug_hex8(-status);
                                 print_debug("\n");
                                 print_debug("bad device: ");
                                 print_debug_hex8(-status);
                                 print_debug("\n");

-                                break; 
+                                break;

                        }
                        print_debug_hex8(status);
                        print_debug_char(' ');
                        }
                        print_debug_hex8(status);
                        print_debug_char(' ');


@@ -327,4 +327,4 @@ void dump_ipmi_registers(void)
                device += SMBUS_MEM_DEVICE_INC;
                print_debug("\n");
        }
                device += SMBUS_MEM_DEVICE_INC;
                print_debug("\n");
        }

-}      
+}

diff --git a/src/mainboard/supermicro/x6dai_g/devicetree.cb b/src/mainboard/supermicro/x6dai_g/devicetree.cb
index 97176b9b7841cb351f7b189d9249bd57f1b1bc93..038964e9ad8af8b04562d1ef7920478a06af8b3a 100644 (file)
--- a/src/mainboard/supermicro/x6dai_g/devicetree.cb
+++ b/src/mainboard/supermicro/x6dai_g/devicetree.cb
@@ -1,20 +1,20 @@
 chip northbridge/intel/e7525 # mch
        device pci_domain 0 on
 chip northbridge/intel/e7525 # mch
        device pci_domain 0 on

-               chip southbridge/intel/esb6300  # esb6300 
+               chip southbridge/intel/esb6300  # esb6300

                        register "pirq_a_d" = "0x0b0a0a05"
                        register "pirq_e_h" = "0x0a0b0c80"
                        register "pirq_a_d" = "0x0b0a0a05"
                        register "pirq_e_h" = "0x0a0b0c80"

-               
+

                        device pci 1c.0 on end
                        device pci 1c.0 on end

-               
+

                        device pci 1d.0 on end
                        device pci 1d.1 on end
                        device pci 1d.4 on end
                        device pci 1d.5 on end
                        device pci 1d.7 on end
                        device pci 1d.0 on end
                        device pci 1d.1 on end
                        device pci 1d.4 on end
                        device pci 1d.5 on end
                        device pci 1d.7 on end

-               
+

                        device pci 1e.0 on end
                        device pci 1e.0 on end

-               
-                       device pci 1f.0 on 
+
+                       device pci 1f.0 on

                                chip superio/winbond/w83627hf
                                        device pnp 2e.0 off end
                                        device pnp 2e.1 off end
                                chip superio/winbond/w83627hf
                                        device pnp 2e.0 off end
                                        device pnp 2e.1 off end


@@ -45,7 +45,7 @@ chip northbridge/intel/e7525 # mch
                        device pci 1f.6 on end
                end
                device pci 00.0 on end
                        device pci 1f.6 on end
                end
                device pci 00.0 on end

-               device pci 00.1 on end 
+               device pci 00.1 on end

                device pci 00.2 on end
                device pci 02.0 on end
                device pci 03.0 on end
                device pci 00.2 on end
                device pci 02.0 on end
                device pci 03.0 on end

diff --git a/src/mainboard/supermicro/x6dai_g/mptable.c b/src/mainboard/supermicro/x6dai_g/mptable.c
index a3bb398fa2dccc49232010810fc5b52e4c335075..a0c863cb45426be448dbf067cf074d4dd7cde591 100644 (file)
--- a/src/mainboard/supermicro/x6dai_g/mptable.c
+++ b/src/mainboard/supermicro/x6dai_g/mptable.c
@@ -32,7 +32,7 @@ static void *smp_write_config_table(void *v)
        mc->reserved = 0;
 
        smp_write_processors(mc);
        mc->reserved = 0;
 
        smp_write_processors(mc);

-       
+

        {
                device_t dev;
 
        {
                device_t dev;
 


@@ -49,7 +49,7 @@ static void *smp_write_config_table(void *v)
                        bus_isa = 6;
                }
        }
                        bus_isa = 6;
                }
        }

-       
+

        /* define bus and isa numbers */
        for(bus_num = 0; bus_num < bus_isa; bus_num++) {
                smp_write_bus(mc, bus_num, "PCI   ");
        /* define bus and isa numbers */
        for(bus_num = 0; bus_num < bus_isa; bus_num++) {
                smp_write_bus(mc, bus_num, "PCI   ");

diff --git a/src/mainboard/supermicro/x6dai_g/romstage.c b/src/mainboard/supermicro/x6dai_g/romstage.c
index b718daf9ab4c0531ce2839113287d7d447c2e51d..da5cadac00d29a1322afac2896775a59f77f8fb0 100644 (file)
--- a/src/mainboard/supermicro/x6dai_g/romstage.c
+++ b/src/mainboard/supermicro/x6dai_g/romstage.c
@@ -54,8 +54,8 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 static void main(unsigned long bist)
 {
        /*
 static void main(unsigned long bist)
 {
        /*

-        * 
-        * 
+        *
+        *

         */
        static const struct mem_controller mch[] = {
                {
         */
        static const struct mem_controller mch[] = {
                {


@@ -116,7 +116,7 @@ static void main(unsigned long bist)
 //     dump_bar14(PCI_DEV(0, 0x00, 0));
 #endif
 
 //     dump_bar14(PCI_DEV(0, 0x00, 0));
 #endif
 

-#if 0 // temporarily disabled 
+#if 0 // temporarily disabled

        /* Check the first 1M */
 //     ram_check(0x00000000, 0x000100000);
 //     ram_check(0x00000000, 0x000a0000);
        /* Check the first 1M */
 //     ram_check(0x00000000, 0x000100000);
 //     ram_check(0x00000000, 0x000a0000);


@@ -127,8 +127,8 @@ static void main(unsigned long bist)
 #if 0
        ram_check(0x00000000, 0x02000000);
 #endif
 #if 0
        ram_check(0x00000000, 0x02000000);
 #endif

-       
-#if 0  
+
+#if 0

        while(1) {
                hlt();
        }
        while(1) {
                hlt();
        }

diff --git a/src/mainboard/supermicro/x6dai_g/watchdog.c b/src/mainboard/supermicro/x6dai_g/watchdog.c
index 2531bc29690e5138850bbc35ff780b76a9e09c56..1b1162c00d483ba6733d8227dea9d12d57446da8 100644 (file)
--- a/src/mainboard/supermicro/x6dai_g/watchdog.c
+++ b/src/mainboard/supermicro/x6dai_g/watchdog.c
@@ -18,17 +18,17 @@ static void disable_esb6300_watchdog(void)
        value = pci_read_config16(dev, 0x04);
        value |= (1 << 10);
        pci_write_config16(dev, 0x04, value);
        value = pci_read_config16(dev, 0x04);
        value |= (1 << 10);
        pci_write_config16(dev, 0x04, value);

-       
+

        /* Set and enable acpibase */
        pci_write_config32(dev, 0x40, ICH5_WDBASE | 1);
        pci_write_config8(dev, 0x44, 0x10);
        base = ICH5_WDBASE + 0x60;
        /* Set and enable acpibase */
        pci_write_config32(dev, 0x40, ICH5_WDBASE | 1);
        pci_write_config8(dev, 0x44, 0x10);
        base = ICH5_WDBASE + 0x60;

-       
+

        /* Set bit 11 in TCO1_CNT */
        value = inw(base + 0x08);
        value |= 1 << 11;
        outw(value, base + 0x08);
        /* Set bit 11 in TCO1_CNT */
        value = inw(base + 0x08);
        value |= 1 << 11;
        outw(value, base + 0x08);

-       
+

        /* Clear TCO timeout status */
        outw(0x0008, base + 0x04);
        outw(0x0002, base + 0x06);
        /* Clear TCO timeout status */
        outw(0x0008, base + 0x04);
        outw(0x0002, base + 0x06);

diff --git a/src/mainboard/supermicro/x6dhe_g/debug.c b/src/mainboard/supermicro/x6dhe_g/debug.c
index b4f2a185b37b405a0844f45927275e50550db5a3..87c67b5964cbea35f6a083a7c2c895c533f3cfe0 100644 (file)
--- a/src/mainboard/supermicro/x6dhe_g/debug.c
+++ b/src/mainboard/supermicro/x6dhe_g/debug.c
@@ -5,7 +5,7 @@
 static void print_reg(unsigned char index)
 {
         unsigned char data;
 static void print_reg(unsigned char index)
 {
         unsigned char data;

-                                                                                
+

         outb(index, 0x2e);
         data = inb(0x2f);
        print_debug("0x");
         outb(index, 0x2e);
         data = inb(0x2f);
        print_debug("0x");


@@ -15,7 +15,7 @@ static void print_reg(unsigned char index)
        print_debug("\n");
         return;
 }
        print_debug("\n");
         return;
 }

-        
+

 static void xbus_en(void)
 {
         /* select the XBUS function in the SIO */
 static void xbus_en(void)
 {
         /* select the XBUS function in the SIO */


@@ -25,7 +25,7 @@ static void xbus_en(void)
         outb(0x01, 0x2f);
        return;
 }
         outb(0x01, 0x2f);
        return;
 }

-                                                                        
+

 static void setup_func(unsigned char func)
 {
         /* select the function in the SIO */
 static void setup_func(unsigned char func)
 {
         /* select the function in the SIO */


@@ -43,27 +43,27 @@ static void setup_func(unsigned char func)
         print_reg(0x75);
         return;
 }
         print_reg(0x75);
         return;
 }

-                                                                                
+

 static void siodump(void)
 {
         int i;
         unsigned char data;
 static void siodump(void)
 {
         int i;
         unsigned char data;

-       
+

         print_debug("\n*** SERVER I/O REGISTERS ***\n");
         for (i=0x10; i<=0x2d; i++) {
                 print_reg((unsigned char)i);
         }
         print_debug("\n*** SERVER I/O REGISTERS ***\n");
         for (i=0x10; i<=0x2d; i++) {
                 print_reg((unsigned char)i);
         }

-#if 0                                                                         
+#if 0

         print_debug("\n*** XBUS REGISTERS ***\n");
         setup_func(0x0f);
         for (i=0xf0; i<=0xff; i++) {
                 print_reg((unsigned char)i);
         }
         print_debug("\n*** XBUS REGISTERS ***\n");
         setup_func(0x0f);
         for (i=0xf0; i<=0xff; i++) {
                 print_reg((unsigned char)i);
         }

-                                                                                
+

         print_debug("\n***  SERIAL 1 CONFIG REGISTERS ***\n");
         setup_func(0x03);
         print_reg(0xf0);
         print_debug("\n***  SERIAL 1 CONFIG REGISTERS ***\n");
         setup_func(0x03);
         print_reg(0xf0);

-                                                                                
+

         print_debug("\n***  SERIAL 2 CONFIG REGISTERS ***\n");
         setup_func(0x02);
         print_reg(0xf0);
         print_debug("\n***  SERIAL 2 CONFIG REGISTERS ***\n");
         setup_func(0x02);
         print_reg(0xf0);


@@ -82,13 +82,13 @@ static void siodump(void)
        print_debug("\nGPDI 4: 0x");
        print_debug_hex8(data);
        print_debug("\n");
        print_debug("\nGPDI 4: 0x");
        print_debug_hex8(data);
        print_debug("\n");

-       
-#if 0                                                                                
-                                                                                
+
+#if 0
+

         print_debug("\n***  WATCHDOG TIMER REGISTERS ***\n");
         setup_func(0x0a);
         print_reg(0xf0);
         print_debug("\n***  WATCHDOG TIMER REGISTERS ***\n");
         setup_func(0x0a);
         print_reg(0xf0);

-                                                                                
+

         print_debug("\n***  FAN CONTROL REGISTERS ***\n");
         setup_func(0x09);
         print_reg(0xf0);
         print_debug("\n***  FAN CONTROL REGISTERS ***\n");
         setup_func(0x09);
         print_reg(0xf0);


@@ -103,11 +103,11 @@ static void siodump(void)
         print_reg(0xf7);
         print_reg(0xfe);
         print_reg(0xff);
         print_reg(0xf7);
         print_reg(0xfe);
         print_reg(0xff);

-                                                                                
+

         print_debug("\n***  HEALTH MONITORING & CONTROL REGISTERS ***\n");
         setup_func(0x14);
         print_reg(0xf0);
         print_debug("\n***  HEALTH MONITORING & CONTROL REGISTERS ***\n");
         setup_func(0x14);
         print_reg(0xf0);

-#endif                                                                           
+#endif

         return;
 }
 
         return;
 }
 


@@ -124,8 +124,8 @@ static void print_debug_pci_dev(unsigned dev)
 static void print_pci_devices(void)
 {
        device_t dev;
 static void print_pci_devices(void)
 {
        device_t dev;

-       for(dev = PCI_DEV(0, 0, 0); 
-               dev <= PCI_DEV(0, 0x1f, 0x7); 
+       for(dev = PCI_DEV(0, 0, 0);
+               dev <= PCI_DEV(0, 0x1f, 0x7);

                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);
                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);


@@ -144,7 +144,7 @@ static void dump_pci_device(unsigned dev)
        int i;
        print_debug_pci_dev(dev);
        print_debug("\n");
        int i;
        print_debug_pci_dev(dev);
        print_debug("\n");

-       
+

        for(i = 0; i <= 255; i++) {
                unsigned char val;
                if ((i & 0x0f) == 0) {
        for(i = 0; i <= 255; i++) {
                unsigned char val;
                if ((i & 0x0f) == 0) {


@@ -164,19 +164,19 @@ static void dump_bar14(unsigned dev)
 {
        int i;
        unsigned long bar;
 {
        int i;
        unsigned long bar;

-       
+

        print_debug("BAR 14 Dump\n");
        print_debug("BAR 14 Dump\n");

-       
+

        bar = pci_read_config32(dev, 0x14);
        for(i = 0; i <= 0x300; i+=4) {
        bar = pci_read_config32(dev, 0x14);
        for(i = 0; i <= 0x300; i+=4) {

-#if 0          
+#if 0

                unsigned char val;
                if ((i & 0x0f) == 0) {
                        print_debug_hex8(i);
                        print_debug_char(':');
                }
                val = pci_read_config8(dev, i);
                unsigned char val;
                if ((i & 0x0f) == 0) {
                        print_debug_hex8(i);
                        print_debug_char(':');
                }
                val = pci_read_config8(dev, i);

-#endif         
+#endif

                if((i%4)==0) {
                print_debug("\n");
                print_debug_hex16(i);
                if((i%4)==0) {
                print_debug("\n");
                print_debug_hex16(i);


@@ -191,8 +191,8 @@ static void dump_bar14(unsigned dev)
 static void dump_pci_devices(void)
 {
        device_t dev;
 static void dump_pci_devices(void)
 {
        device_t dev;

-       for(dev = PCI_DEV(0, 0, 0); 
-               dev <= PCI_DEV(0, 0x1f, 0x7); 
+       for(dev = PCI_DEV(0, 0, 0);
+               dev <= PCI_DEV(0, 0x1f, 0x7);

                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);
                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);


@@ -215,8 +215,8 @@ static void dump_spd_registers(const struct mem_controller *ctrl)
                device = ctrl->channel0[i];
                if (device) {
                        int j;
                device = ctrl->channel0[i];
                if (device) {
                        int j;

-                       print_debug("dimm: "); 
-                       print_debug_hex8(i); 
+                       print_debug("dimm: ");
+                       print_debug_hex8(i);

                        print_debug(".0: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {
                        print_debug(".0: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {


@@ -241,8 +241,8 @@ static void dump_spd_registers(const struct mem_controller *ctrl)
                device = ctrl->channel1[i];
                if (device) {
                        int j;
                device = ctrl->channel1[i];
                if (device) {
                        int j;

-                       print_debug("dimm: "); 
-                       print_debug_hex8(i); 
+                       print_debug("dimm: ");
+                       print_debug_hex8(i);

                        print_debug(".1: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {
                        print_debug(".1: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {


@@ -278,7 +278,7 @@ void dump_spd_registers(void)
                print_debug("\n");
                 print_debug("dimm ");
                print_debug_hex8(device);
                print_debug("\n");
                 print_debug("dimm ");
                print_debug_hex8(device);

-               
+

                 for(i = 0; (i < 256) ; i++) {
                        unsigned char byte;
                         if ((i % 16) == 0) {
                 for(i = 0; (i < 256) ; i++) {
                        unsigned char byte;
                         if ((i % 16) == 0) {


@@ -291,7 +291,7 @@ void dump_spd_registers(void)
                                 print_debug("bad device: ");
                                 print_debug_hex8(-status);
                                 print_debug("\n");
                                 print_debug("bad device: ");
                                 print_debug_hex8(-status);
                                 print_debug("\n");

-                                break; 
+                                break;

                        }
                        print_debug_hex8(status);
                        print_debug_char(' ');
                        }
                        print_debug_hex8(status);
                        print_debug_char(' ');


@@ -311,7 +311,7 @@ void dump_ipmi_registers(void)
                print_debug("\n");
                 print_debug("ipmi ");
                print_debug_hex8(device);
                print_debug("\n");
                 print_debug("ipmi ");
                print_debug_hex8(device);

-               
+

                 for(i = 0; (i < 8) ; i++) {
                        unsigned char byte;
                        status = smbus_read_byte(device, 2);
                 for(i = 0; (i < 8) ; i++) {
                        unsigned char byte;
                        status = smbus_read_byte(device, 2);


@@ -319,7 +319,7 @@ void dump_ipmi_registers(void)
                                 print_debug("bad device: ");
                                 print_debug_hex8(-status);
                                 print_debug("\n");
                                 print_debug("bad device: ");
                                 print_debug_hex8(-status);
                                 print_debug("\n");

-                                break; 
+                                break;

                        }
                        print_debug_hex8(status);
                        print_debug_char(' ');
                        }
                        print_debug_hex8(status);
                        print_debug_char(' ');


@@ -327,4 +327,4 @@ void dump_ipmi_registers(void)
                device += SMBUS_MEM_DEVICE_INC;
                print_debug("\n");
        }
                device += SMBUS_MEM_DEVICE_INC;
                print_debug("\n");
        }

-}      
+}

diff --git a/src/mainboard/supermicro/x6dhe_g/devicetree.cb b/src/mainboard/supermicro/x6dhe_g/devicetree.cb
index d5625e4c7c087ab526dab8082149cdc21641b5f1..075acfc23200e4dd10e648647146a33127237ad4 100644 (file)
--- a/src/mainboard/supermicro/x6dhe_g/devicetree.cb
+++ b/src/mainboard/supermicro/x6dhe_g/devicetree.cb
@@ -10,8 +10,8 @@ chip northbridge/intel/e7520  # MCH
                        register "pirq_a_d" = "0x0b070a05"
                        register "pirq_e_h" = "0x0a808080"
 
                        register "pirq_a_d" = "0x0b070a05"
                        register "pirq_e_h" = "0x0a808080"
 

-                       device pci 1c.0 on 
-                               chip drivers/generic/generic 
+                       device pci 1c.0 on
+                               chip drivers/generic/generic

                                        device pci 01.0 on end  # onboard gige1
                                        device pci 02.0 on end  # onboard gige2
                                end
                                        device pci 01.0 on end  # onboard gige1
                                        device pci 02.0 on end  # onboard gige2
                                end


@@ -25,9 +25,9 @@ chip northbridge/intel/e7520  # MCH
                        device pci 1d.7 on end
 
                        # VGA / PCI 32-bit
                        device pci 1d.7 on end
 
                        # VGA / PCI 32-bit

-                       device pci 1e.0 on 
+                       device pci 1e.0 on

                                chip drivers/generic/generic
                                chip drivers/generic/generic

-                                       device pci 01.0 on end 
+                                       device pci 01.0 on end

                                end
                        end
 
                                end
                        end
 


@@ -35,7 +35,7 @@ chip northbridge/intel/e7520  # MCH
                        device pci 1f.0 on      # ISA bridge
                                chip superio/winbond/w83627hf
                                        device pnp 2e.0 off end
                        device pci 1f.0 on      # ISA bridge
                                chip superio/winbond/w83627hf
                                        device pnp 2e.0 off end

-                                       device pnp 2e.2 on 
+                                       device pnp 2e.2 on

                                                 io 0x60 = 0x3f8
                                                irq 0x70 = 4
                                        end
                                                 io 0x60 = 0x3f8
                                                irq 0x70 = 4
                                        end


@@ -62,17 +62,17 @@ chip northbridge/intel/e7520  # MCH
                device pci 00.0 on end  # Northbridge
                device pci 00.1 on end  # Northbridge Error reporting
                device pci 01.0 on end
                device pci 00.0 on end  # Northbridge
                device pci 00.1 on end  # Northbridge Error reporting
                device pci 01.0 on end

-               device pci 02.0 on 
-                       chip southbridge/intel/pxhd     # PXHD 6700 
-                               device pci 00.0 on end   # bridge 
+               device pci 02.0 on
+                       chip southbridge/intel/pxhd     # PXHD 6700
+                               device pci 00.0 on end   # bridge

                                device pci 00.1 on end   # I/O apic
                                device pci 00.2 on end   # bridge
                                device pci 00.3 on end   # I/O apic
                        end
                end
                                device pci 00.1 on end   # I/O apic
                                device pci 00.2 on end   # bridge
                                device pci 00.3 on end   # I/O apic
                        end
                end

-#              device register "intrline" = "0x00070105" 
-               device  pci 04.0 on end 
-               device  pci 06.0 on end 
+#              device register "intrline" = "0x00070105"
+               device  pci 04.0 on end
+               device  pci 06.0 on end

        end
 
        device apic_cluster 0 on
        end
 
        device apic_cluster 0 on

diff --git a/src/mainboard/supermicro/x6dhe_g/mptable.c b/src/mainboard/supermicro/x6dhe_g/mptable.c
index c50fabb0f3c1ad4d244e43fd4365abbdc07b4bf6..81ccf854586a112dba87559321611f4802df785f 100644 (file)
--- a/src/mainboard/supermicro/x6dhe_g/mptable.c
+++ b/src/mainboard/supermicro/x6dhe_g/mptable.c
@@ -35,7 +35,7 @@ static void *smp_write_config_table(void *v)
        mc->reserved = 0;
 
        smp_write_processors(mc);
        mc->reserved = 0;
 
        smp_write_processors(mc);

-       
+

        {
                device_t dev;
 
        {
                device_t dev;
 


@@ -75,7 +75,7 @@ static void *smp_write_config_table(void *v)
                        bus_pxhd_2 = 3;
                }
        }
                        bus_pxhd_2 = 3;
                }
        }

-       
+

        /* define bus and isa numbers */
        for(bus_num = 0; bus_num < bus_isa; bus_num++) {
                smp_write_bus(mc, bus_num, "PCI   ");
        /* define bus and isa numbers */
        for(bus_num = 0; bus_num < bus_isa; bus_num++) {
                smp_write_bus(mc, bus_num, "PCI   ");


@@ -162,7 +162,7 @@ static void *smp_write_config_table(void *v)
                bus_esb6300_2, 0x04, 0x02, 0x10);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, // -- added
                bus_esb6300_2, 0x08, 0x02, 0x14);
                bus_esb6300_2, 0x04, 0x02, 0x10);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, // -- added
                bus_esb6300_2, 0x08, 0x02, 0x14);

-       
+

        /* Standard local interrupt assignments */
        smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
                bus_isa, 0x00, MP_APIC_ALL, 0x00);
        /* Standard local interrupt assignments */
        smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
                bus_isa, 0x00, MP_APIC_ALL, 0x00);

diff --git a/src/mainboard/supermicro/x6dhe_g/romstage.c b/src/mainboard/supermicro/x6dhe_g/romstage.c
index 67bd2cfb567eedbbd4304908d606894d029427ed..2549cb1327987267e82d76a160e79323e734f76f 100644 (file)
--- a/src/mainboard/supermicro/x6dhe_g/romstage.c
+++ b/src/mainboard/supermicro/x6dhe_g/romstage.c
@@ -55,8 +55,8 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 static void main(unsigned long bist)
 {
        /*
 static void main(unsigned long bist)
 {
        /*

-        * 
-        * 
+        *
+        *

         */
        static const struct mem_controller mch[] = {
                {
         */
        static const struct mem_controller mch[] = {
                {


@@ -118,7 +118,7 @@ static void main(unsigned long bist)
 #endif
        disable_watchdogs();
 //     dump_ipmi_registers();
 #endif
        disable_watchdogs();
 //     dump_ipmi_registers();

-//     mainboard_set_e7520_leds();     
+//     mainboard_set_e7520_leds();

        sdram_initialize(ARRAY_SIZE(mch), mch);
 #if 0
        dump_pci_devices();
        sdram_initialize(ARRAY_SIZE(mch), mch);
 #if 0
        dump_pci_devices();


@@ -128,7 +128,7 @@ static void main(unsigned long bist)
        dump_bar14(PCI_DEV(0, 0x00, 0));
 #endif
 
        dump_bar14(PCI_DEV(0, 0x00, 0));
 #endif
 

-#if 0 // temporarily disabled 
+#if 0 // temporarily disabled

        /* Check the first 1M */
 //     ram_check(0x00000000, 0x000100000);
 //     ram_check(0x00000000, 0x000a0000);
        /* Check the first 1M */
 //     ram_check(0x00000000, 0x000100000);
 //     ram_check(0x00000000, 0x000a0000);


@@ -139,8 +139,8 @@ static void main(unsigned long bist)
 #if 0
        ram_check(0x00000000, 0x02000000);
 #endif
 #if 0
        ram_check(0x00000000, 0x02000000);
 #endif

-       
-#if 0  
+
+#if 0

        while(1) {
                hlt();
        }
        while(1) {
                hlt();
        }

diff --git a/src/mainboard/supermicro/x6dhe_g/watchdog.c b/src/mainboard/supermicro/x6dhe_g/watchdog.c
index 17ec9621aded100d81316c1549901a7ec8309a92..a3c55c15439f5a8e94fe5c1e72e2d5ec1a7dda13 100644 (file)
--- a/src/mainboard/supermicro/x6dhe_g/watchdog.c
+++ b/src/mainboard/supermicro/x6dhe_g/watchdog.c
@@ -31,17 +31,17 @@ static void disable_esb6300_watchdog(void)
        value = pci_read_config16(dev, 0x04);
        value |= (1 << 10);
        pci_write_config16(dev, 0x04, value);
        value = pci_read_config16(dev, 0x04);
        value |= (1 << 10);
        pci_write_config16(dev, 0x04, value);

-       
+

        /* Set and enable acpibase */
        pci_write_config32(dev, 0x40, ESB6300_WDBASE | 1);
        pci_write_config8(dev, 0x44, 0x10);
        base = ESB6300_WDBASE + 0x60;
        /* Set and enable acpibase */
        pci_write_config32(dev, 0x40, ESB6300_WDBASE | 1);
        pci_write_config8(dev, 0x44, 0x10);
        base = ESB6300_WDBASE + 0x60;

-       
+

        /* Set bit 11 in TCO1_CNT */
        value = inw(base + 0x08);
        value |= 1 << 11;
        outw(value, base + 0x08);
        /* Set bit 11 in TCO1_CNT */
        value = inw(base + 0x08);
        value |= 1 << 11;
        outw(value, base + 0x08);

-       
+

        /* Clear TCO timeout status */
        outw(0x0008, base + 0x04);
        outw(0x0002, base + 0x06);
        /* Clear TCO timeout status */
        outw(0x0008, base + 0x04);
        outw(0x0002, base + 0x06);


@@ -86,7 +86,7 @@ static void disable_jarell_frb3(void)
        outl(value, base + 0x38);
        value &= ~(1 << 16);
        outl(value, base + 0x38);
        outl(value, base + 0x38);
        value &= ~(1 << 16);
        outl(value, base + 0x38);

-#endif                           
+#endif

 }
 
 static void disable_watchdogs(void)
 }
 
 static void disable_watchdogs(void)

diff --git a/src/mainboard/supermicro/x6dhe_g/x6dhe_g_fixups.c b/src/mainboard/supermicro/x6dhe_g/x6dhe_g_fixups.c
index 82c070b0c12c76f8fe2af73fe3c31239d383aa33..cc3e41eb9f634c3a735eb41c03c48642b82d2617 100644 (file)
--- a/src/mainboard/supermicro/x6dhe_g/x6dhe_g_fixups.c
+++ b/src/mainboard/supermicro/x6dhe_g/x6dhe_g_fixups.c
@@ -9,13 +9,13 @@ static void mch_reset(void)
 
 static void mainboard_set_e7520_pll(unsigned bits)
 {
 
 static void mainboard_set_e7520_pll(unsigned bits)
 {

-       return; 
+       return;

 }
 
 
 static void mainboard_set_e7520_leds(void)
 {
 }
 
 
 static void mainboard_set_e7520_leds(void)
 {

-       return; 
+       return;

 }
 
 
 }
 
 

diff --git a/src/mainboard/supermicro/x6dhe_g2/debug.c b/src/mainboard/supermicro/x6dhe_g2/debug.c
index b4f2a185b37b405a0844f45927275e50550db5a3..87c67b5964cbea35f6a083a7c2c895c533f3cfe0 100644 (file)
--- a/src/mainboard/supermicro/x6dhe_g2/debug.c
+++ b/src/mainboard/supermicro/x6dhe_g2/debug.c
@@ -5,7 +5,7 @@
 static void print_reg(unsigned char index)
 {
         unsigned char data;
 static void print_reg(unsigned char index)
 {
         unsigned char data;

-                                                                                
+

         outb(index, 0x2e);
         data = inb(0x2f);
        print_debug("0x");
         outb(index, 0x2e);
         data = inb(0x2f);
        print_debug("0x");


@@ -15,7 +15,7 @@ static void print_reg(unsigned char index)
        print_debug("\n");
         return;
 }
        print_debug("\n");
         return;
 }

-        
+

 static void xbus_en(void)
 {
         /* select the XBUS function in the SIO */
 static void xbus_en(void)
 {
         /* select the XBUS function in the SIO */


@@ -25,7 +25,7 @@ static void xbus_en(void)
         outb(0x01, 0x2f);
        return;
 }
         outb(0x01, 0x2f);
        return;
 }

-                                                                        
+

 static void setup_func(unsigned char func)
 {
         /* select the function in the SIO */
 static void setup_func(unsigned char func)
 {
         /* select the function in the SIO */


@@ -43,27 +43,27 @@ static void setup_func(unsigned char func)
         print_reg(0x75);
         return;
 }
         print_reg(0x75);
         return;
 }

-                                                                                
+

 static void siodump(void)
 {
         int i;
         unsigned char data;
 static void siodump(void)
 {
         int i;
         unsigned char data;

-       
+

         print_debug("\n*** SERVER I/O REGISTERS ***\n");
         for (i=0x10; i<=0x2d; i++) {
                 print_reg((unsigned char)i);
         }
         print_debug("\n*** SERVER I/O REGISTERS ***\n");
         for (i=0x10; i<=0x2d; i++) {
                 print_reg((unsigned char)i);
         }

-#if 0                                                                         
+#if 0

         print_debug("\n*** XBUS REGISTERS ***\n");
         setup_func(0x0f);
         for (i=0xf0; i<=0xff; i++) {
                 print_reg((unsigned char)i);
         }
         print_debug("\n*** XBUS REGISTERS ***\n");
         setup_func(0x0f);
         for (i=0xf0; i<=0xff; i++) {
                 print_reg((unsigned char)i);
         }

-                                                                                
+

         print_debug("\n***  SERIAL 1 CONFIG REGISTERS ***\n");
         setup_func(0x03);
         print_reg(0xf0);
         print_debug("\n***  SERIAL 1 CONFIG REGISTERS ***\n");
         setup_func(0x03);
         print_reg(0xf0);

-                                                                                
+

         print_debug("\n***  SERIAL 2 CONFIG REGISTERS ***\n");
         setup_func(0x02);
         print_reg(0xf0);
         print_debug("\n***  SERIAL 2 CONFIG REGISTERS ***\n");
         setup_func(0x02);
         print_reg(0xf0);


@@ -82,13 +82,13 @@ static void siodump(void)
        print_debug("\nGPDI 4: 0x");
        print_debug_hex8(data);
        print_debug("\n");
        print_debug("\nGPDI 4: 0x");
        print_debug_hex8(data);
        print_debug("\n");

-       
-#if 0                                                                                
-                                                                                
+
+#if 0
+

         print_debug("\n***  WATCHDOG TIMER REGISTERS ***\n");
         setup_func(0x0a);
         print_reg(0xf0);
         print_debug("\n***  WATCHDOG TIMER REGISTERS ***\n");
         setup_func(0x0a);
         print_reg(0xf0);

-                                                                                
+

         print_debug("\n***  FAN CONTROL REGISTERS ***\n");
         setup_func(0x09);
         print_reg(0xf0);
         print_debug("\n***  FAN CONTROL REGISTERS ***\n");
         setup_func(0x09);
         print_reg(0xf0);


@@ -103,11 +103,11 @@ static void siodump(void)
         print_reg(0xf7);
         print_reg(0xfe);
         print_reg(0xff);
         print_reg(0xf7);
         print_reg(0xfe);
         print_reg(0xff);

-                                                                                
+

         print_debug("\n***  HEALTH MONITORING & CONTROL REGISTERS ***\n");
         setup_func(0x14);
         print_reg(0xf0);
         print_debug("\n***  HEALTH MONITORING & CONTROL REGISTERS ***\n");
         setup_func(0x14);
         print_reg(0xf0);

-#endif                                                                           
+#endif

         return;
 }
 
         return;
 }
 


@@ -124,8 +124,8 @@ static void print_debug_pci_dev(unsigned dev)
 static void print_pci_devices(void)
 {
        device_t dev;
 static void print_pci_devices(void)
 {
        device_t dev;

-       for(dev = PCI_DEV(0, 0, 0); 
-               dev <= PCI_DEV(0, 0x1f, 0x7); 
+       for(dev = PCI_DEV(0, 0, 0);
+               dev <= PCI_DEV(0, 0x1f, 0x7);

                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);
                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);


@@ -144,7 +144,7 @@ static void dump_pci_device(unsigned dev)
        int i;
        print_debug_pci_dev(dev);
        print_debug("\n");
        int i;
        print_debug_pci_dev(dev);
        print_debug("\n");

-       
+

        for(i = 0; i <= 255; i++) {
                unsigned char val;
                if ((i & 0x0f) == 0) {
        for(i = 0; i <= 255; i++) {
                unsigned char val;
                if ((i & 0x0f) == 0) {


@@ -164,19 +164,19 @@ static void dump_bar14(unsigned dev)
 {
        int i;
        unsigned long bar;
 {
        int i;
        unsigned long bar;

-       
+

        print_debug("BAR 14 Dump\n");
        print_debug("BAR 14 Dump\n");

-       
+

        bar = pci_read_config32(dev, 0x14);
        for(i = 0; i <= 0x300; i+=4) {
        bar = pci_read_config32(dev, 0x14);
        for(i = 0; i <= 0x300; i+=4) {

-#if 0          
+#if 0

                unsigned char val;
                if ((i & 0x0f) == 0) {
                        print_debug_hex8(i);
                        print_debug_char(':');
                }
                val = pci_read_config8(dev, i);
                unsigned char val;
                if ((i & 0x0f) == 0) {
                        print_debug_hex8(i);
                        print_debug_char(':');
                }
                val = pci_read_config8(dev, i);

-#endif         
+#endif

                if((i%4)==0) {
                print_debug("\n");
                print_debug_hex16(i);
                if((i%4)==0) {
                print_debug("\n");
                print_debug_hex16(i);


@@ -191,8 +191,8 @@ static void dump_bar14(unsigned dev)
 static void dump_pci_devices(void)
 {
        device_t dev;
 static void dump_pci_devices(void)
 {
        device_t dev;

-       for(dev = PCI_DEV(0, 0, 0); 
-               dev <= PCI_DEV(0, 0x1f, 0x7); 
+       for(dev = PCI_DEV(0, 0, 0);
+               dev <= PCI_DEV(0, 0x1f, 0x7);

                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);
                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);


@@ -215,8 +215,8 @@ static void dump_spd_registers(const struct mem_controller *ctrl)
                device = ctrl->channel0[i];
                if (device) {
                        int j;
                device = ctrl->channel0[i];
                if (device) {
                        int j;

-                       print_debug("dimm: "); 
-                       print_debug_hex8(i); 
+                       print_debug("dimm: ");
+                       print_debug_hex8(i);

                        print_debug(".0: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {
                        print_debug(".0: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {


@@ -241,8 +241,8 @@ static void dump_spd_registers(const struct mem_controller *ctrl)
                device = ctrl->channel1[i];
                if (device) {
                        int j;
                device = ctrl->channel1[i];
                if (device) {
                        int j;

-                       print_debug("dimm: "); 
-                       print_debug_hex8(i); 
+                       print_debug("dimm: ");
+                       print_debug_hex8(i);

                        print_debug(".1: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {
                        print_debug(".1: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {


@@ -278,7 +278,7 @@ void dump_spd_registers(void)
                print_debug("\n");
                 print_debug("dimm ");
                print_debug_hex8(device);
                print_debug("\n");
                 print_debug("dimm ");
                print_debug_hex8(device);

-               
+

                 for(i = 0; (i < 256) ; i++) {
                        unsigned char byte;
                         if ((i % 16) == 0) {
                 for(i = 0; (i < 256) ; i++) {
                        unsigned char byte;
                         if ((i % 16) == 0) {


@@ -291,7 +291,7 @@ void dump_spd_registers(void)
                                 print_debug("bad device: ");
                                 print_debug_hex8(-status);
                                 print_debug("\n");
                                 print_debug("bad device: ");
                                 print_debug_hex8(-status);
                                 print_debug("\n");

-                                break; 
+                                break;

                        }
                        print_debug_hex8(status);
                        print_debug_char(' ');
                        }
                        print_debug_hex8(status);
                        print_debug_char(' ');


@@ -311,7 +311,7 @@ void dump_ipmi_registers(void)
                print_debug("\n");
                 print_debug("ipmi ");
                print_debug_hex8(device);
                print_debug("\n");
                 print_debug("ipmi ");
                print_debug_hex8(device);

-               
+

                 for(i = 0; (i < 8) ; i++) {
                        unsigned char byte;
                        status = smbus_read_byte(device, 2);
                 for(i = 0; (i < 8) ; i++) {
                        unsigned char byte;
                        status = smbus_read_byte(device, 2);


@@ -319,7 +319,7 @@ void dump_ipmi_registers(void)
                                 print_debug("bad device: ");
                                 print_debug_hex8(-status);
                                 print_debug("\n");
                                 print_debug("bad device: ");
                                 print_debug_hex8(-status);
                                 print_debug("\n");

-                                break; 
+                                break;

                        }
                        print_debug_hex8(status);
                        print_debug_char(' ');
                        }
                        print_debug_hex8(status);
                        print_debug_char(' ');


@@ -327,4 +327,4 @@ void dump_ipmi_registers(void)
                device += SMBUS_MEM_DEVICE_INC;
                print_debug("\n");
        }
                device += SMBUS_MEM_DEVICE_INC;
                print_debug("\n");
        }

-}      
+}

diff --git a/src/mainboard/supermicro/x6dhe_g2/devicetree.cb b/src/mainboard/supermicro/x6dhe_g2/devicetree.cb
index e621594b937b41806ada5c2bf5969de455a018c5..bbc4e767786fb237381296925b0d3ff83e9c84a1 100644 (file)
--- a/src/mainboard/supermicro/x6dhe_g2/devicetree.cb
+++ b/src/mainboard/supermicro/x6dhe_g2/devicetree.cb
@@ -6,12 +6,12 @@ chip northbridge/intel/e7520  # MCH
                device pnp 00.3 off end
        end
        device pci_domain 0 on
                device pnp 00.3 off end
        end
        device pci_domain 0 on

-               chip southbridge/intel/i82801ex # ICH5R 
+               chip southbridge/intel/i82801ex # ICH5R

                        register "pirq_a_d" = "0x0b070a05"
                        register "pirq_e_h" = "0x0a808080"
 
                        register "pirq_a_d" = "0x0b070a05"
                        register "pirq_e_h" = "0x0a808080"
 

-                       device pci 1c.0 on 
-                               chip drivers/generic/generic 
+                       device pci 1c.0 on
+                               chip drivers/generic/generic

                                        device pci 01.0 on end  # onboard gige1
                                        device pci 02.0 on end  # onboard gige2
                                end
                                        device pci 01.0 on end  # onboard gige1
                                        device pci 02.0 on end  # onboard gige2
                                end


@@ -25,9 +25,9 @@ chip northbridge/intel/e7520  # MCH
                        device pci 1d.7 on end
 
                        # VGA / PCI 32-bit
                        device pci 1d.7 on end
 
                        # VGA / PCI 32-bit

-                       device pci 1e.0 on 
+                       device pci 1e.0 on

                                chip drivers/generic/generic
                                chip drivers/generic/generic

-                                       device pci 01.0 on end 
+                                       device pci 01.0 on end

                                end
                        end
 
                                end
                        end
 


@@ -35,7 +35,7 @@ chip northbridge/intel/e7520  # MCH
                        device pci 1f.0 on      # ISA bridge
                                chip superio/nsc/pc87427
                                        device pnp 2e.0 off end
                        device pci 1f.0 on      # ISA bridge
                                chip superio/nsc/pc87427
                                        device pnp 2e.0 off end

-                                       device pnp 2e.2 on 
+                                       device pnp 2e.2 on

                                                 io 0x60 = 0x3f8
                                                irq 0x70 = 4
                                        end
                                                 io 0x60 = 0x3f8
                                                irq 0x70 = 4
                                        end


@@ -62,17 +62,17 @@ chip northbridge/intel/e7520  # MCH
                device pci 00.0 on end  # Northbridge
                device pci 00.1 on end  # Northbridge Error reporting
                device pci 01.0 on end
                device pci 00.0 on end  # Northbridge
                device pci 00.1 on end  # Northbridge Error reporting
                device pci 01.0 on end

-               device pci 02.0 on 
-                       chip southbridge/intel/pxhd     # PXHD 6700 
-                               device pci 00.0 on end   # bridge 
+               device pci 02.0 on
+                       chip southbridge/intel/pxhd     # PXHD 6700
+                               device pci 00.0 on end   # bridge

                                device pci 00.1 on end   # I/O apic
                                device pci 00.2 on end   # bridge
                                device pci 00.3 on end   # I/O apic
                        end
                end
                                device pci 00.1 on end   # I/O apic
                                device pci 00.2 on end   # bridge
                                device pci 00.3 on end   # I/O apic
                        end
                end

-#              device register "intrline" = "0x00070105" 
-               device  pci 04.0 on end 
-               device  pci 06.0 on end 
+#              device register "intrline" = "0x00070105"
+               device  pci 04.0 on end
+               device  pci 06.0 on end

        end
 
        device apic_cluster 0 on
        end
 
        device apic_cluster 0 on

diff --git a/src/mainboard/supermicro/x6dhe_g2/mptable.c b/src/mainboard/supermicro/x6dhe_g2/mptable.c
index c50fabb0f3c1ad4d244e43fd4365abbdc07b4bf6..81ccf854586a112dba87559321611f4802df785f 100644 (file)
--- a/src/mainboard/supermicro/x6dhe_g2/mptable.c
+++ b/src/mainboard/supermicro/x6dhe_g2/mptable.c
@@ -35,7 +35,7 @@ static void *smp_write_config_table(void *v)
        mc->reserved = 0;
 
        smp_write_processors(mc);
        mc->reserved = 0;
 
        smp_write_processors(mc);

-       
+

        {
                device_t dev;
 
        {
                device_t dev;
 


@@ -75,7 +75,7 @@ static void *smp_write_config_table(void *v)
                        bus_pxhd_2 = 3;
                }
        }
                        bus_pxhd_2 = 3;
                }
        }

-       
+

        /* define bus and isa numbers */
        for(bus_num = 0; bus_num < bus_isa; bus_num++) {
                smp_write_bus(mc, bus_num, "PCI   ");
        /* define bus and isa numbers */
        for(bus_num = 0; bus_num < bus_isa; bus_num++) {
                smp_write_bus(mc, bus_num, "PCI   ");


@@ -162,7 +162,7 @@ static void *smp_write_config_table(void *v)
                bus_esb6300_2, 0x04, 0x02, 0x10);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, // -- added
                bus_esb6300_2, 0x08, 0x02, 0x14);
                bus_esb6300_2, 0x04, 0x02, 0x10);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, // -- added
                bus_esb6300_2, 0x08, 0x02, 0x14);

-       
+

        /* Standard local interrupt assignments */
        smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
                bus_isa, 0x00, MP_APIC_ALL, 0x00);
        /* Standard local interrupt assignments */
        smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
                bus_isa, 0x00, MP_APIC_ALL, 0x00);

diff --git a/src/mainboard/supermicro/x6dhe_g2/romstage.c b/src/mainboard/supermicro/x6dhe_g2/romstage.c
index 68ad41de4089585a025e34493db68b3e58a96b1f..2b0cbc84d429741ea73fb1a63b8969e05a1a9ff0 100644 (file)
--- a/src/mainboard/supermicro/x6dhe_g2/romstage.c
+++ b/src/mainboard/supermicro/x6dhe_g2/romstage.c
@@ -53,8 +53,8 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 static void main(unsigned long bist)
 {
        /*
 static void main(unsigned long bist)
 {
        /*

-        * 
-        * 
+        *
+        *

         */
        static const struct mem_controller mch[] = {
                {
         */
        static const struct mem_controller mch[] = {
                {


@@ -117,7 +117,7 @@ static void main(unsigned long bist)
 #endif
        disable_watchdogs();
 //     dump_ipmi_registers();
 #endif
        disable_watchdogs();
 //     dump_ipmi_registers();

-//     mainboard_set_e7520_leds();     
+//     mainboard_set_e7520_leds();

        sdram_initialize(ARRAY_SIZE(mch), mch);
 #if 0
        dump_pci_devices();
        sdram_initialize(ARRAY_SIZE(mch), mch);
 #if 0
        dump_pci_devices();


@@ -127,7 +127,7 @@ static void main(unsigned long bist)
        //dump_bar14(PCI_DEV(0, 0x00, 0));
 #endif
 
        //dump_bar14(PCI_DEV(0, 0x00, 0));
 #endif
 

-#if 0 // temporarily disabled 
+#if 0 // temporarily disabled

        /* Check the first 1M */
 //     ram_check(0x00000000, 0x000100000);
 //     ram_check(0x00000000, 0x000a0000);
        /* Check the first 1M */
 //     ram_check(0x00000000, 0x000100000);
 //     ram_check(0x00000000, 0x000a0000);


@@ -138,8 +138,8 @@ static void main(unsigned long bist)
 #if 0
        ram_check(0x00000000, 0x02000000);
 #endif
 #if 0
        ram_check(0x00000000, 0x02000000);
 #endif

-       
-#if 0  
+
+#if 0

        while(1) {
                hlt();
        }
        while(1) {
                hlt();
        }

diff --git a/src/mainboard/supermicro/x6dhe_g2/watchdog.c b/src/mainboard/supermicro/x6dhe_g2/watchdog.c
index 17ec9621aded100d81316c1549901a7ec8309a92..a3c55c15439f5a8e94fe5c1e72e2d5ec1a7dda13 100644 (file)
--- a/src/mainboard/supermicro/x6dhe_g2/watchdog.c
+++ b/src/mainboard/supermicro/x6dhe_g2/watchdog.c
@@ -31,17 +31,17 @@ static void disable_esb6300_watchdog(void)
        value = pci_read_config16(dev, 0x04);
        value |= (1 << 10);
        pci_write_config16(dev, 0x04, value);
        value = pci_read_config16(dev, 0x04);
        value |= (1 << 10);
        pci_write_config16(dev, 0x04, value);

-       
+

        /* Set and enable acpibase */
        pci_write_config32(dev, 0x40, ESB6300_WDBASE | 1);
        pci_write_config8(dev, 0x44, 0x10);
        base = ESB6300_WDBASE + 0x60;
        /* Set and enable acpibase */
        pci_write_config32(dev, 0x40, ESB6300_WDBASE | 1);
        pci_write_config8(dev, 0x44, 0x10);
        base = ESB6300_WDBASE + 0x60;

-       
+

        /* Set bit 11 in TCO1_CNT */
        value = inw(base + 0x08);
        value |= 1 << 11;
        outw(value, base + 0x08);
        /* Set bit 11 in TCO1_CNT */
        value = inw(base + 0x08);
        value |= 1 << 11;
        outw(value, base + 0x08);

-       
+

        /* Clear TCO timeout status */
        outw(0x0008, base + 0x04);
        outw(0x0002, base + 0x06);
        /* Clear TCO timeout status */
        outw(0x0008, base + 0x04);
        outw(0x0002, base + 0x06);


@@ -86,7 +86,7 @@ static void disable_jarell_frb3(void)
        outl(value, base + 0x38);
        value &= ~(1 << 16);
        outl(value, base + 0x38);
        outl(value, base + 0x38);
        value &= ~(1 << 16);
        outl(value, base + 0x38);

-#endif                           
+#endif

 }
 
 static void disable_watchdogs(void)
 }
 
 static void disable_watchdogs(void)

diff --git a/src/mainboard/supermicro/x6dhe_g2/x6dhe_g2_fixups.c b/src/mainboard/supermicro/x6dhe_g2/x6dhe_g2_fixups.c
index 82c070b0c12c76f8fe2af73fe3c31239d383aa33..cc3e41eb9f634c3a735eb41c03c48642b82d2617 100644 (file)
--- a/src/mainboard/supermicro/x6dhe_g2/x6dhe_g2_fixups.c
+++ b/src/mainboard/supermicro/x6dhe_g2/x6dhe_g2_fixups.c
@@ -9,13 +9,13 @@ static void mch_reset(void)
 
 static void mainboard_set_e7520_pll(unsigned bits)
 {
 
 static void mainboard_set_e7520_pll(unsigned bits)
 {

-       return; 
+       return;

 }
 
 
 static void mainboard_set_e7520_leds(void)
 {
 }
 
 
 static void mainboard_set_e7520_leds(void)
 {

-       return; 
+       return;

 }
 
 
 }
 
 

diff --git a/src/mainboard/supermicro/x6dhr_ig/debug.c b/src/mainboard/supermicro/x6dhr_ig/debug.c
index b4f2a185b37b405a0844f45927275e50550db5a3..87c67b5964cbea35f6a083a7c2c895c533f3cfe0 100644 (file)
--- a/src/mainboard/supermicro/x6dhr_ig/debug.c
+++ b/src/mainboard/supermicro/x6dhr_ig/debug.c
@@ -5,7 +5,7 @@
 static void print_reg(unsigned char index)
 {
         unsigned char data;
 static void print_reg(unsigned char index)
 {
         unsigned char data;

-                                                                                
+

         outb(index, 0x2e);
         data = inb(0x2f);
        print_debug("0x");
         outb(index, 0x2e);
         data = inb(0x2f);
        print_debug("0x");


@@ -15,7 +15,7 @@ static void print_reg(unsigned char index)
        print_debug("\n");
         return;
 }
        print_debug("\n");
         return;
 }

-        
+

 static void xbus_en(void)
 {
         /* select the XBUS function in the SIO */
 static void xbus_en(void)
 {
         /* select the XBUS function in the SIO */


@@ -25,7 +25,7 @@ static void xbus_en(void)
         outb(0x01, 0x2f);
        return;
 }
         outb(0x01, 0x2f);
        return;
 }

-                                                                        
+

 static void setup_func(unsigned char func)
 {
         /* select the function in the SIO */
 static void setup_func(unsigned char func)
 {
         /* select the function in the SIO */


@@ -43,27 +43,27 @@ static void setup_func(unsigned char func)
         print_reg(0x75);
         return;
 }
         print_reg(0x75);
         return;
 }

-                                                                                
+

 static void siodump(void)
 {
         int i;
         unsigned char data;
 static void siodump(void)
 {
         int i;
         unsigned char data;

-       
+

         print_debug("\n*** SERVER I/O REGISTERS ***\n");
         for (i=0x10; i<=0x2d; i++) {
                 print_reg((unsigned char)i);
         }
         print_debug("\n*** SERVER I/O REGISTERS ***\n");
         for (i=0x10; i<=0x2d; i++) {
                 print_reg((unsigned char)i);
         }

-#if 0                                                                         
+#if 0

         print_debug("\n*** XBUS REGISTERS ***\n");
         setup_func(0x0f);
         for (i=0xf0; i<=0xff; i++) {
                 print_reg((unsigned char)i);
         }
         print_debug("\n*** XBUS REGISTERS ***\n");
         setup_func(0x0f);
         for (i=0xf0; i<=0xff; i++) {
                 print_reg((unsigned char)i);
         }

-                                                                                
+

         print_debug("\n***  SERIAL 1 CONFIG REGISTERS ***\n");
         setup_func(0x03);
         print_reg(0xf0);
         print_debug("\n***  SERIAL 1 CONFIG REGISTERS ***\n");
         setup_func(0x03);
         print_reg(0xf0);

-                                                                                
+

         print_debug("\n***  SERIAL 2 CONFIG REGISTERS ***\n");
         setup_func(0x02);
         print_reg(0xf0);
         print_debug("\n***  SERIAL 2 CONFIG REGISTERS ***\n");
         setup_func(0x02);
         print_reg(0xf0);


@@ -82,13 +82,13 @@ static void siodump(void)
        print_debug("\nGPDI 4: 0x");
        print_debug_hex8(data);
        print_debug("\n");
        print_debug("\nGPDI 4: 0x");
        print_debug_hex8(data);
        print_debug("\n");

-       
-#if 0                                                                                
-                                                                                
+
+#if 0
+

         print_debug("\n***  WATCHDOG TIMER REGISTERS ***\n");
         setup_func(0x0a);
         print_reg(0xf0);
         print_debug("\n***  WATCHDOG TIMER REGISTERS ***\n");
         setup_func(0x0a);
         print_reg(0xf0);

-                                                                                
+

         print_debug("\n***  FAN CONTROL REGISTERS ***\n");
         setup_func(0x09);
         print_reg(0xf0);
         print_debug("\n***  FAN CONTROL REGISTERS ***\n");
         setup_func(0x09);
         print_reg(0xf0);


@@ -103,11 +103,11 @@ static void siodump(void)
         print_reg(0xf7);
         print_reg(0xfe);
         print_reg(0xff);
         print_reg(0xf7);
         print_reg(0xfe);
         print_reg(0xff);

-                                                                                
+

         print_debug("\n***  HEALTH MONITORING & CONTROL REGISTERS ***\n");
         setup_func(0x14);
         print_reg(0xf0);
         print_debug("\n***  HEALTH MONITORING & CONTROL REGISTERS ***\n");
         setup_func(0x14);
         print_reg(0xf0);

-#endif                                                                           
+#endif

         return;
 }
 
         return;
 }
 


@@ -124,8 +124,8 @@ static void print_debug_pci_dev(unsigned dev)
 static void print_pci_devices(void)
 {
        device_t dev;
 static void print_pci_devices(void)
 {
        device_t dev;

-       for(dev = PCI_DEV(0, 0, 0); 
-               dev <= PCI_DEV(0, 0x1f, 0x7); 
+       for(dev = PCI_DEV(0, 0, 0);
+               dev <= PCI_DEV(0, 0x1f, 0x7);

                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);
                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);


@@ -144,7 +144,7 @@ static void dump_pci_device(unsigned dev)
        int i;
        print_debug_pci_dev(dev);
        print_debug("\n");
        int i;
        print_debug_pci_dev(dev);
        print_debug("\n");

-       
+

        for(i = 0; i <= 255; i++) {
                unsigned char val;
                if ((i & 0x0f) == 0) {
        for(i = 0; i <= 255; i++) {
                unsigned char val;
                if ((i & 0x0f) == 0) {


@@ -164,19 +164,19 @@ static void dump_bar14(unsigned dev)
 {
        int i;
        unsigned long bar;
 {
        int i;
        unsigned long bar;

-       
+

        print_debug("BAR 14 Dump\n");
        print_debug("BAR 14 Dump\n");

-       
+

        bar = pci_read_config32(dev, 0x14);
        for(i = 0; i <= 0x300; i+=4) {
        bar = pci_read_config32(dev, 0x14);
        for(i = 0; i <= 0x300; i+=4) {

-#if 0          
+#if 0

                unsigned char val;
                if ((i & 0x0f) == 0) {
                        print_debug_hex8(i);
                        print_debug_char(':');
                }
                val = pci_read_config8(dev, i);
                unsigned char val;
                if ((i & 0x0f) == 0) {
                        print_debug_hex8(i);
                        print_debug_char(':');
                }
                val = pci_read_config8(dev, i);

-#endif         
+#endif

                if((i%4)==0) {
                print_debug("\n");
                print_debug_hex16(i);
                if((i%4)==0) {
                print_debug("\n");
                print_debug_hex16(i);


@@ -191,8 +191,8 @@ static void dump_bar14(unsigned dev)
 static void dump_pci_devices(void)
 {
        device_t dev;
 static void dump_pci_devices(void)
 {
        device_t dev;

-       for(dev = PCI_DEV(0, 0, 0); 
-               dev <= PCI_DEV(0, 0x1f, 0x7); 
+       for(dev = PCI_DEV(0, 0, 0);
+               dev <= PCI_DEV(0, 0x1f, 0x7);

                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);
                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);


@@ -215,8 +215,8 @@ static void dump_spd_registers(const struct mem_controller *ctrl)
                device = ctrl->channel0[i];
                if (device) {
                        int j;
                device = ctrl->channel0[i];
                if (device) {
                        int j;

-                       print_debug("dimm: "); 
-                       print_debug_hex8(i); 
+                       print_debug("dimm: ");
+                       print_debug_hex8(i);

                        print_debug(".0: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {
                        print_debug(".0: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {


@@ -241,8 +241,8 @@ static void dump_spd_registers(const struct mem_controller *ctrl)
                device = ctrl->channel1[i];
                if (device) {
                        int j;
                device = ctrl->channel1[i];
                if (device) {
                        int j;

-                       print_debug("dimm: "); 
-                       print_debug_hex8(i); 
+                       print_debug("dimm: ");
+                       print_debug_hex8(i);

                        print_debug(".1: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {
                        print_debug(".1: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {


@@ -278,7 +278,7 @@ void dump_spd_registers(void)
                print_debug("\n");
                 print_debug("dimm ");
                print_debug_hex8(device);
                print_debug("\n");
                 print_debug("dimm ");
                print_debug_hex8(device);

-               
+

                 for(i = 0; (i < 256) ; i++) {
                        unsigned char byte;
                         if ((i % 16) == 0) {
                 for(i = 0; (i < 256) ; i++) {
                        unsigned char byte;
                         if ((i % 16) == 0) {


@@ -291,7 +291,7 @@ void dump_spd_registers(void)
                                 print_debug("bad device: ");
                                 print_debug_hex8(-status);
                                 print_debug("\n");
                                 print_debug("bad device: ");
                                 print_debug_hex8(-status);
                                 print_debug("\n");

-                                break; 
+                                break;

                        }
                        print_debug_hex8(status);
                        print_debug_char(' ');
                        }
                        print_debug_hex8(status);
                        print_debug_char(' ');


@@ -311,7 +311,7 @@ void dump_ipmi_registers(void)
                print_debug("\n");
                 print_debug("ipmi ");
                print_debug_hex8(device);
                print_debug("\n");
                 print_debug("ipmi ");
                print_debug_hex8(device);

-               
+

                 for(i = 0; (i < 8) ; i++) {
                        unsigned char byte;
                        status = smbus_read_byte(device, 2);
                 for(i = 0; (i < 8) ; i++) {
                        unsigned char byte;
                        status = smbus_read_byte(device, 2);


@@ -319,7 +319,7 @@ void dump_ipmi_registers(void)
                                 print_debug("bad device: ");
                                 print_debug_hex8(-status);
                                 print_debug("\n");
                                 print_debug("bad device: ");
                                 print_debug_hex8(-status);
                                 print_debug("\n");

-                                break; 
+                                break;

                        }
                        print_debug_hex8(status);
                        print_debug_char(' ');
                        }
                        print_debug_hex8(status);
                        print_debug_char(' ');


@@ -327,4 +327,4 @@ void dump_ipmi_registers(void)
                device += SMBUS_MEM_DEVICE_INC;
                print_debug("\n");
        }
                device += SMBUS_MEM_DEVICE_INC;
                print_debug("\n");
        }

-}      
+}

diff --git a/src/mainboard/supermicro/x6dhr_ig/devicetree.cb b/src/mainboard/supermicro/x6dhr_ig/devicetree.cb
index 921c54fff5b5d74c1e682e605448a8de40b34cf3..b989e76e8aa44e73bf9148b16a450a8fe2478199 100644 (file)
--- a/src/mainboard/supermicro/x6dhr_ig/devicetree.cb
+++ b/src/mainboard/supermicro/x6dhr_ig/devicetree.cb
@@ -1,21 +1,21 @@
 chip northbridge/intel/e7520 # mch
 chip northbridge/intel/e7520 # mch

-       device pci_domain 0 on 
+       device pci_domain 0 on

                chip southbridge/intel/i82801ex # i82801er
                        # USB ports
                        device pci 1d.0 on end
                        device pci 1d.1 on end
                chip southbridge/intel/i82801ex # i82801er
                        # USB ports
                        device pci 1d.0 on end
                        device pci 1d.1 on end

-                       device pci 1d.2 on end 
+                       device pci 1d.2 on end

                        device pci 1d.3 on end
                        device pci 1d.7 on end
                        device pci 1d.3 on end
                        device pci 1d.7 on end

-               
+

                        # -> VGA
                        device pci 1e.0 on end
                        # -> VGA
                        device pci 1e.0 on end

-               
+

                        # -> IDE
                        # -> IDE

-                       device pci 1f.0 on 
+                       device pci 1f.0 on

                                chip superio/winbond/w83627hf
                                        device pnp 2e.0 off end
                                chip superio/winbond/w83627hf
                                        device pnp 2e.0 off end

-                                       device pnp 2e.2 on 
+                                       device pnp 2e.2 on

                                                 io 0x60 = 0x3f8
                                                irq 0x70 = 4
                                        end
                                                 io 0x60 = 0x3f8
                                                irq 0x70 = 4
                                        end


@@ -39,18 +39,18 @@ chip northbridge/intel/e7520 # mch
                        register "pirq_a_d" = "0x0b070a05"
                        register "pirq_e_h" = "0x0a808080"
                end
                        register "pirq_a_d" = "0x0b070a05"
                        register "pirq_e_h" = "0x0a808080"
                end

-               device pci 00.0 on end 
+               device pci 00.0 on end

                device pci 00.1  on end
                device pci 00.1  on end

-               device pci 01.0 on end 
-               device pci 02.0 on end 
-               device pci 03.0 on 
+               device pci 01.0 on end
+               device pci 02.0 on end
+               device pci 03.0 on

                        chip southbridge/intel/pxhd # pxhd1
                                # Bus bridges and ioapics usually bus 2
                                device pci 0.0 on end
                                device pci 0.1 on end
                        chip southbridge/intel/pxhd # pxhd1
                                # Bus bridges and ioapics usually bus 2
                                device pci 0.0 on end
                                device pci 0.1 on end

-                               device pci 0.2 on 
+                               device pci 0.2 on

                                # On board gig e1000
                                # On board gig e1000

-                                       chip drivers/generic/generic 
+                                       chip drivers/generic/generic

                                                device pci 02.0 on end
                                                device pci 02.1 on end
                                        end
                                                device pci 02.0 on end
                                                device pci 02.1 on end
                                        end


@@ -58,7 +58,7 @@ chip northbridge/intel/e7520 # mch
                                device pci 0.3 on end
                        end
                end
                                device pci 0.3 on end
                        end
                end

-               device pci 04.0 on 
+               device pci 04.0 on

                        chip southbridge/intel/pxhd # pxhd2
                                # Bus bridges and ioapics usually bus 5
                                device pci 0.0 on end
                        chip southbridge/intel/pxhd # pxhd2
                                # Bus bridges and ioapics usually bus 5
                                device pci 0.0 on end

diff --git a/src/mainboard/supermicro/x6dhr_ig/mptable.c b/src/mainboard/supermicro/x6dhr_ig/mptable.c
index b98ec52479098b3ac03dd91ee430ed90f41a3d66..efc7abf22ac84aae44304c5325f9250792ad4d8b 100644 (file)
--- a/src/mainboard/supermicro/x6dhr_ig/mptable.c
+++ b/src/mainboard/supermicro/x6dhr_ig/mptable.c
@@ -36,7 +36,7 @@ static void *smp_write_config_table(void *v)
        mc->reserved = 0;
 
        smp_write_processors(mc);
        mc->reserved = 0;
 
        smp_write_processors(mc);

-       
+

        {
                device_t dev;
 
        {
                device_t dev;
 


@@ -98,9 +98,9 @@ static void *smp_write_config_table(void *v)
 
                        bus_pxhd_4 = 7;
                }
 
                        bus_pxhd_4 = 7;
                }

-       
+

        }
        }

-       
+

        /* define bus and isa numbers */
        for(bus_num = 0; bus_num < bus_isa; bus_num++) {
                smp_write_bus(mc, bus_num, "PCI   ");
        /* define bus and isa numbers */
        for(bus_num = 0; bus_num < bus_isa; bus_num++) {
                smp_write_bus(mc, bus_num, "PCI   ");


@@ -159,7 +159,7 @@ static void *smp_write_config_table(void *v)
                }
        }
 
                }
        }
 

-       
+

        /* ISA backward compatibility interrupts  */
        smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
                bus_isa, 0x00, 0x02, 0x00);
        /* ISA backward compatibility interrupts  */
        smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
                bus_isa, 0x00, 0x02, 0x00);

diff --git a/src/mainboard/supermicro/x6dhr_ig/romstage.c b/src/mainboard/supermicro/x6dhr_ig/romstage.c
index 77c9eba0fbbe3fca3d68e005272c3335d7b27c87..16f0ac7337ac8b241a2416652c9c8a4cec58d03c 100644 (file)
--- a/src/mainboard/supermicro/x6dhr_ig/romstage.c
+++ b/src/mainboard/supermicro/x6dhr_ig/romstage.c
@@ -54,8 +54,8 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 static void main(unsigned long bist)
 {
        /*
 static void main(unsigned long bist)
 {
        /*

-        * 
-        * 
+        *
+        *

         */
        static const struct mem_controller mch[] = {
                {
         */
        static const struct mem_controller mch[] = {
                {


@@ -117,7 +117,7 @@ static void main(unsigned long bist)
 #endif
        disable_watchdogs();
 //     dump_ipmi_registers();
 #endif
        disable_watchdogs();
 //     dump_ipmi_registers();

-       mainboard_set_e7520_leds();     
+       mainboard_set_e7520_leds();

        sdram_initialize(ARRAY_SIZE(mch), mch);
 #if 1
        dump_pci_devices();
        sdram_initialize(ARRAY_SIZE(mch), mch);
 #if 1
        dump_pci_devices();


@@ -127,7 +127,7 @@ static void main(unsigned long bist)
        dump_bar14(PCI_DEV(0, 0x00, 0));
 #endif
 
        dump_bar14(PCI_DEV(0, 0x00, 0));
 #endif
 

-#if 0 // temporarily disabled 
+#if 0 // temporarily disabled

        /* Check the first 1M */
 //     ram_check(0x00000000, 0x000100000);
 //     ram_check(0x00000000, 0x000a0000);
        /* Check the first 1M */
 //     ram_check(0x00000000, 0x000100000);
 //     ram_check(0x00000000, 0x000a0000);


@@ -139,8 +139,8 @@ static void main(unsigned long bist)
 #if 0
        ram_check(0x00000000, 0x02000000);
 #endif
 #if 0
        ram_check(0x00000000, 0x02000000);
 #endif

-       
-#if 0  
+
+#if 0

        while(1) {
                hlt();
        }
        while(1) {
                hlt();
        }

diff --git a/src/mainboard/supermicro/x6dhr_ig/watchdog.c b/src/mainboard/supermicro/x6dhr_ig/watchdog.c
index a4c1eec04f5cefb8ecad8dd1db245f07018382d5..44cfd10b73c1e4f0c7127e7b49636220d0af33d1 100644 (file)
--- a/src/mainboard/supermicro/x6dhr_ig/watchdog.c
+++ b/src/mainboard/supermicro/x6dhr_ig/watchdog.c
@@ -31,17 +31,17 @@ static void disable_ich5_watchdog(void)
        value = pci_read_config16(dev, 0x04);
        value |= (1 << 10);
        pci_write_config16(dev, 0x04, value);
        value = pci_read_config16(dev, 0x04);
        value |= (1 << 10);
        pci_write_config16(dev, 0x04, value);

-       
+

        /* Set and enable acpibase */
        pci_write_config32(dev, 0x40, ICH5_WDBASE | 1);
        pci_write_config8(dev, 0x44, 0x10);
        base = ICH5_WDBASE + 0x60;
        /* Set and enable acpibase */
        pci_write_config32(dev, 0x40, ICH5_WDBASE | 1);
        pci_write_config8(dev, 0x44, 0x10);
        base = ICH5_WDBASE + 0x60;

-       
+

        /* Set bit 11 in TCO1_CNT */
        value = inw(base + 0x08);
        value |= 1 << 11;
        outw(value, base + 0x08);
        /* Set bit 11 in TCO1_CNT */
        value = inw(base + 0x08);
        value |= 1 << 11;
        outw(value, base + 0x08);

-       
+

        /* Clear TCO timeout status */
        outw(0x0008, base + 0x04);
        outw(0x0002, base + 0x06);
        /* Clear TCO timeout status */
        outw(0x0008, base + 0x04);
        outw(0x0002, base + 0x06);


@@ -86,7 +86,7 @@ static void disable_jarell_frb3(void)
        outl(value, base + 0x38);
        value &= ~(1 << 16);
        outl(value, base + 0x38);
        outl(value, base + 0x38);
        value &= ~(1 << 16);
        outl(value, base + 0x38);

-#endif                           
+#endif

 }
 
 static void disable_watchdogs(void)
 }
 
 static void disable_watchdogs(void)

diff --git a/src/mainboard/supermicro/x6dhr_ig/x6dhr_fixups.c b/src/mainboard/supermicro/x6dhr_ig/x6dhr_fixups.c
index 82c070b0c12c76f8fe2af73fe3c31239d383aa33..cc3e41eb9f634c3a735eb41c03c48642b82d2617 100644 (file)
--- a/src/mainboard/supermicro/x6dhr_ig/x6dhr_fixups.c
+++ b/src/mainboard/supermicro/x6dhr_ig/x6dhr_fixups.c
@@ -9,13 +9,13 @@ static void mch_reset(void)
 
 static void mainboard_set_e7520_pll(unsigned bits)
 {
 
 static void mainboard_set_e7520_pll(unsigned bits)
 {

-       return; 
+       return;

 }
 
 
 static void mainboard_set_e7520_leds(void)
 {
 }
 
 
 static void mainboard_set_e7520_leds(void)
 {

-       return; 
+       return;

 }
 
 
 }
 
 

diff --git a/src/mainboard/supermicro/x6dhr_ig2/debug.c b/src/mainboard/supermicro/x6dhr_ig2/debug.c
index b4f2a185b37b405a0844f45927275e50550db5a3..87c67b5964cbea35f6a083a7c2c895c533f3cfe0 100644 (file)
--- a/src/mainboard/supermicro/x6dhr_ig2/debug.c
+++ b/src/mainboard/supermicro/x6dhr_ig2/debug.c
@@ -5,7 +5,7 @@
 static void print_reg(unsigned char index)
 {
         unsigned char data;
 static void print_reg(unsigned char index)
 {
         unsigned char data;

-                                                                                
+

         outb(index, 0x2e);
         data = inb(0x2f);
        print_debug("0x");
         outb(index, 0x2e);
         data = inb(0x2f);
        print_debug("0x");


@@ -15,7 +15,7 @@ static void print_reg(unsigned char index)
        print_debug("\n");
         return;
 }
        print_debug("\n");
         return;
 }

-        
+

 static void xbus_en(void)
 {
         /* select the XBUS function in the SIO */
 static void xbus_en(void)
 {
         /* select the XBUS function in the SIO */


@@ -25,7 +25,7 @@ static void xbus_en(void)
         outb(0x01, 0x2f);
        return;
 }
         outb(0x01, 0x2f);
        return;
 }

-                                                                        
+

 static void setup_func(unsigned char func)
 {
         /* select the function in the SIO */
 static void setup_func(unsigned char func)
 {
         /* select the function in the SIO */


@@ -43,27 +43,27 @@ static void setup_func(unsigned char func)
         print_reg(0x75);
         return;
 }
         print_reg(0x75);
         return;
 }

-                                                                                
+

 static void siodump(void)
 {
         int i;
         unsigned char data;
 static void siodump(void)
 {
         int i;
         unsigned char data;

-       
+

         print_debug("\n*** SERVER I/O REGISTERS ***\n");
         for (i=0x10; i<=0x2d; i++) {
                 print_reg((unsigned char)i);
         }
         print_debug("\n*** SERVER I/O REGISTERS ***\n");
         for (i=0x10; i<=0x2d; i++) {
                 print_reg((unsigned char)i);
         }

-#if 0                                                                         
+#if 0

         print_debug("\n*** XBUS REGISTERS ***\n");
         setup_func(0x0f);
         for (i=0xf0; i<=0xff; i++) {
                 print_reg((unsigned char)i);
         }
         print_debug("\n*** XBUS REGISTERS ***\n");
         setup_func(0x0f);
         for (i=0xf0; i<=0xff; i++) {
                 print_reg((unsigned char)i);
         }

-                                                                                
+

         print_debug("\n***  SERIAL 1 CONFIG REGISTERS ***\n");
         setup_func(0x03);
         print_reg(0xf0);
         print_debug("\n***  SERIAL 1 CONFIG REGISTERS ***\n");
         setup_func(0x03);
         print_reg(0xf0);

-                                                                                
+

         print_debug("\n***  SERIAL 2 CONFIG REGISTERS ***\n");
         setup_func(0x02);
         print_reg(0xf0);
         print_debug("\n***  SERIAL 2 CONFIG REGISTERS ***\n");
         setup_func(0x02);
         print_reg(0xf0);


@@ -82,13 +82,13 @@ static void siodump(void)
        print_debug("\nGPDI 4: 0x");
        print_debug_hex8(data);
        print_debug("\n");
        print_debug("\nGPDI 4: 0x");
        print_debug_hex8(data);
        print_debug("\n");

-       
-#if 0                                                                                
-                                                                                
+
+#if 0
+

         print_debug("\n***  WATCHDOG TIMER REGISTERS ***\n");
         setup_func(0x0a);
         print_reg(0xf0);
         print_debug("\n***  WATCHDOG TIMER REGISTERS ***\n");
         setup_func(0x0a);
         print_reg(0xf0);

-                                                                                
+

         print_debug("\n***  FAN CONTROL REGISTERS ***\n");
         setup_func(0x09);
         print_reg(0xf0);
         print_debug("\n***  FAN CONTROL REGISTERS ***\n");
         setup_func(0x09);
         print_reg(0xf0);


@@ -103,11 +103,11 @@ static void siodump(void)
         print_reg(0xf7);
         print_reg(0xfe);
         print_reg(0xff);
         print_reg(0xf7);
         print_reg(0xfe);
         print_reg(0xff);

-                                                                                
+

         print_debug("\n***  HEALTH MONITORING & CONTROL REGISTERS ***\n");
         setup_func(0x14);
         print_reg(0xf0);
         print_debug("\n***  HEALTH MONITORING & CONTROL REGISTERS ***\n");
         setup_func(0x14);
         print_reg(0xf0);

-#endif                                                                           
+#endif

         return;
 }
 
         return;
 }
 


@@ -124,8 +124,8 @@ static void print_debug_pci_dev(unsigned dev)
 static void print_pci_devices(void)
 {
        device_t dev;
 static void print_pci_devices(void)
 {
        device_t dev;

-       for(dev = PCI_DEV(0, 0, 0); 
-               dev <= PCI_DEV(0, 0x1f, 0x7); 
+       for(dev = PCI_DEV(0, 0, 0);
+               dev <= PCI_DEV(0, 0x1f, 0x7);

                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);
                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);


@@ -144,7 +144,7 @@ static void dump_pci_device(unsigned dev)
        int i;
        print_debug_pci_dev(dev);
        print_debug("\n");
        int i;
        print_debug_pci_dev(dev);
        print_debug("\n");

-       
+

        for(i = 0; i <= 255; i++) {
                unsigned char val;
                if ((i & 0x0f) == 0) {
        for(i = 0; i <= 255; i++) {
                unsigned char val;
                if ((i & 0x0f) == 0) {


@@ -164,19 +164,19 @@ static void dump_bar14(unsigned dev)
 {
        int i;
        unsigned long bar;
 {
        int i;
        unsigned long bar;

-       
+

        print_debug("BAR 14 Dump\n");
        print_debug("BAR 14 Dump\n");

-       
+

        bar = pci_read_config32(dev, 0x14);
        for(i = 0; i <= 0x300; i+=4) {
        bar = pci_read_config32(dev, 0x14);
        for(i = 0; i <= 0x300; i+=4) {

-#if 0          
+#if 0

                unsigned char val;
                if ((i & 0x0f) == 0) {
                        print_debug_hex8(i);
                        print_debug_char(':');
                }
                val = pci_read_config8(dev, i);
                unsigned char val;
                if ((i & 0x0f) == 0) {
                        print_debug_hex8(i);
                        print_debug_char(':');
                }
                val = pci_read_config8(dev, i);

-#endif         
+#endif

                if((i%4)==0) {
                print_debug("\n");
                print_debug_hex16(i);
                if((i%4)==0) {
                print_debug("\n");
                print_debug_hex16(i);


@@ -191,8 +191,8 @@ static void dump_bar14(unsigned dev)
 static void dump_pci_devices(void)
 {
        device_t dev;
 static void dump_pci_devices(void)
 {
        device_t dev;

-       for(dev = PCI_DEV(0, 0, 0); 
-               dev <= PCI_DEV(0, 0x1f, 0x7); 
+       for(dev = PCI_DEV(0, 0, 0);
+               dev <= PCI_DEV(0, 0x1f, 0x7);

                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);
                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);


@@ -215,8 +215,8 @@ static void dump_spd_registers(const struct mem_controller *ctrl)
                device = ctrl->channel0[i];
                if (device) {
                        int j;
                device = ctrl->channel0[i];
                if (device) {
                        int j;

-                       print_debug("dimm: "); 
-                       print_debug_hex8(i); 
+                       print_debug("dimm: ");
+                       print_debug_hex8(i);

                        print_debug(".0: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {
                        print_debug(".0: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {


@@ -241,8 +241,8 @@ static void dump_spd_registers(const struct mem_controller *ctrl)
                device = ctrl->channel1[i];
                if (device) {
                        int j;
                device = ctrl->channel1[i];
                if (device) {
                        int j;

-                       print_debug("dimm: "); 
-                       print_debug_hex8(i); 
+                       print_debug("dimm: ");
+                       print_debug_hex8(i);

                        print_debug(".1: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {
                        print_debug(".1: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {


@@ -278,7 +278,7 @@ void dump_spd_registers(void)
                print_debug("\n");
                 print_debug("dimm ");
                print_debug_hex8(device);
                print_debug("\n");
                 print_debug("dimm ");
                print_debug_hex8(device);

-               
+

                 for(i = 0; (i < 256) ; i++) {
                        unsigned char byte;
                         if ((i % 16) == 0) {
                 for(i = 0; (i < 256) ; i++) {
                        unsigned char byte;
                         if ((i % 16) == 0) {


@@ -291,7 +291,7 @@ void dump_spd_registers(void)
                                 print_debug("bad device: ");
                                 print_debug_hex8(-status);
                                 print_debug("\n");
                                 print_debug("bad device: ");
                                 print_debug_hex8(-status);
                                 print_debug("\n");

-                                break; 
+                                break;

                        }
                        print_debug_hex8(status);
                        print_debug_char(' ');
                        }
                        print_debug_hex8(status);
                        print_debug_char(' ');


@@ -311,7 +311,7 @@ void dump_ipmi_registers(void)
                print_debug("\n");
                 print_debug("ipmi ");
                print_debug_hex8(device);
                print_debug("\n");
                 print_debug("ipmi ");
                print_debug_hex8(device);

-               
+

                 for(i = 0; (i < 8) ; i++) {
                        unsigned char byte;
                        status = smbus_read_byte(device, 2);
                 for(i = 0; (i < 8) ; i++) {
                        unsigned char byte;
                        status = smbus_read_byte(device, 2);


@@ -319,7 +319,7 @@ void dump_ipmi_registers(void)
                                 print_debug("bad device: ");
                                 print_debug_hex8(-status);
                                 print_debug("\n");
                                 print_debug("bad device: ");
                                 print_debug_hex8(-status);
                                 print_debug("\n");

-                                break; 
+                                break;

                        }
                        print_debug_hex8(status);
                        print_debug_char(' ');
                        }
                        print_debug_hex8(status);
                        print_debug_char(' ');


@@ -327,4 +327,4 @@ void dump_ipmi_registers(void)
                device += SMBUS_MEM_DEVICE_INC;
                print_debug("\n");
        }
                device += SMBUS_MEM_DEVICE_INC;
                print_debug("\n");
        }

-}      
+}

diff --git a/src/mainboard/supermicro/x6dhr_ig2/devicetree.cb b/src/mainboard/supermicro/x6dhr_ig2/devicetree.cb
index 318d492b9fff4a7ec997ecb2a2fd1c7223f317e8..ed3fa65219f82d90c26c17fd4d3b6048ba4f2869 100644 (file)
--- a/src/mainboard/supermicro/x6dhr_ig2/devicetree.cb
+++ b/src/mainboard/supermicro/x6dhr_ig2/devicetree.cb
@@ -1,21 +1,21 @@
 chip northbridge/intel/e7520 # mch
 chip northbridge/intel/e7520 # mch

-       device pci_domain 0 on 
+       device pci_domain 0 on

                chip southbridge/intel/i82801ex # i82801er
                        # USB ports
                        device pci 1d.0 on end
                        device pci 1d.1 on end
                chip southbridge/intel/i82801ex # i82801er
                        # USB ports
                        device pci 1d.0 on end
                        device pci 1d.1 on end

-                       device pci 1d.2 on end 
+                       device pci 1d.2 on end

                        device pci 1d.3 on end
                        device pci 1d.7 on end
                        device pci 1d.3 on end
                        device pci 1d.7 on end

-               
+

                        # -> Bridge
                        device pci 1e.0 on end
                        # -> Bridge
                        device pci 1e.0 on end

-               
+

                        # -> ISA
                        # -> ISA

-                       device pci 1f.0 on 
+                       device pci 1f.0 on

                                chip superio/winbond/w83627hf
                                        device pnp 2e.0 off end
                                chip superio/winbond/w83627hf
                                        device pnp 2e.0 off end

-                                       device pnp 2e.2 on 
+                                       device pnp 2e.2 on

                                                 io 0x60 = 0x3f8
                                                irq 0x70 = 4
                                        end
                                                 io 0x60 = 0x3f8
                                                irq 0x70 = 4
                                        end


@@ -34,22 +34,22 @@ chip northbridge/intel/e7520 # mch
                        end
                        # -> IDE
                        device pci 1f.1 on end
                        end
                        # -> IDE
                        device pci 1f.1 on end

-                       # -> SATA 
+                       # -> SATA

                        device pci 1f.2 on end
                        device pci 1f.3 on end
 
                        register "pirq_a_d" = "0x0b070a05"
                        register "pirq_e_h" = "0x0a808080"
                end
                        device pci 1f.2 on end
                        device pci 1f.3 on end
 
                        register "pirq_a_d" = "0x0b070a05"
                        register "pirq_e_h" = "0x0a808080"
                end

-               device pci 00.0 on end 
+               device pci 00.0 on end

                device pci 00.1 on end
                device pci 00.1 on end

-               device pci 01.0 on end 
-               device pci 02.0 on 
+               device pci 01.0 on end
+               device pci 02.0 on

                        chip southbridge/intel/pxhd # pxhd1
                                # Bus bridges and ioapics usually bus 1
                        chip southbridge/intel/pxhd # pxhd1
                                # Bus bridges and ioapics usually bus 1

-                               device pci 0.0 on 
+                               device pci 0.0 on

                                # On board gig e1000
                                # On board gig e1000

-                                       chip drivers/generic/generic 
+                                       chip drivers/generic/generic

                                                device pci 03.0 on end
                                                device pci 03.1 on end
                                        end
                                                device pci 03.0 on end
                                                device pci 03.1 on end
                                        end

diff --git a/src/mainboard/supermicro/x6dhr_ig2/mptable.c b/src/mainboard/supermicro/x6dhr_ig2/mptable.c
index 78a863c7a1ff2123ba91bf525cb449940f4a6a8c..3e95e108d1aa498b9739a0029fecc2f9744cb12b 100644 (file)
--- a/src/mainboard/supermicro/x6dhr_ig2/mptable.c
+++ b/src/mainboard/supermicro/x6dhr_ig2/mptable.c
@@ -36,7 +36,7 @@ static void *smp_write_config_table(void *v)
        mc->reserved = 0;
 
        smp_write_processors(mc);
        mc->reserved = 0;
 
        smp_write_processors(mc);

-       
+

        {
                device_t dev;
 
        {
                device_t dev;
 


@@ -98,9 +98,9 @@ static void *smp_write_config_table(void *v)
 
                        bus_pxhd_4 = 6;
                }
 
                        bus_pxhd_4 = 6;
                }

-       
+

        }
        }

-       
+

        /* define bus and isa numbers */
        for(bus_num = 0; bus_num < bus_isa; bus_num++) {
                smp_write_bus(mc, bus_num, "PCI   ");
        /* define bus and isa numbers */
        for(bus_num = 0; bus_num < bus_isa; bus_num++) {
                smp_write_bus(mc, bus_num, "PCI   ");


@@ -135,7 +135,7 @@ static void *smp_write_config_table(void *v)
                else {
                        printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 1:00.3\n");
                }
                else {
                        printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 1:00.3\n");
                }

-       }       
+       }

        /* ISA backward compatibility interrupts  */
        smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
                bus_isa, 0x00, 0x02, 0x00);
        /* ISA backward compatibility interrupts  */
        smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
                bus_isa, 0x00, 0x02, 0x00);

diff --git a/src/mainboard/supermicro/x6dhr_ig2/romstage.c b/src/mainboard/supermicro/x6dhr_ig2/romstage.c
index d2b845eac648128ccfea6e68c8ed46241efdf049..8f5ca7930e1d248bc854c4b2a9b1f6883b76b2c4 100644 (file)
--- a/src/mainboard/supermicro/x6dhr_ig2/romstage.c
+++ b/src/mainboard/supermicro/x6dhr_ig2/romstage.c
@@ -54,8 +54,8 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 static void main(unsigned long bist)
 {
        /*
 static void main(unsigned long bist)
 {
        /*

-        * 
-        * 
+        *
+        *

         */
        static const struct mem_controller mch[] = {
                {
         */
        static const struct mem_controller mch[] = {
                {


@@ -117,7 +117,7 @@ static void main(unsigned long bist)
 #endif
        disable_watchdogs();
 //     dump_ipmi_registers();
 #endif
        disable_watchdogs();
 //     dump_ipmi_registers();

-       mainboard_set_e7520_leds();     
+       mainboard_set_e7520_leds();

        sdram_initialize(ARRAY_SIZE(mch), mch);
 #if 0
        dump_pci_devices();
        sdram_initialize(ARRAY_SIZE(mch), mch);
 #if 0
        dump_pci_devices();


@@ -127,7 +127,7 @@ static void main(unsigned long bist)
        dump_bar14(PCI_DEV(0, 0x00, 0));
 #endif
 
        dump_bar14(PCI_DEV(0, 0x00, 0));
 #endif
 

-#if 0 // temporarily disabled 
+#if 0 // temporarily disabled

        /* Check the first 1M */
 //     ram_check(0x00000000, 0x000100000);
 //     ram_check(0x00000000, 0x000a0000);
        /* Check the first 1M */
 //     ram_check(0x00000000, 0x000100000);
 //     ram_check(0x00000000, 0x000a0000);


@@ -139,8 +139,8 @@ static void main(unsigned long bist)
 #if 0
        ram_check(0x00000000, 0x02000000);
 #endif
 #if 0
        ram_check(0x00000000, 0x02000000);
 #endif

-       
-#if 0  
+
+#if 0

        while(1) {
                hlt();
        }
        while(1) {
                hlt();
        }

diff --git a/src/mainboard/supermicro/x6dhr_ig2/watchdog.c b/src/mainboard/supermicro/x6dhr_ig2/watchdog.c
index a4c1eec04f5cefb8ecad8dd1db245f07018382d5..44cfd10b73c1e4f0c7127e7b49636220d0af33d1 100644 (file)
--- a/src/mainboard/supermicro/x6dhr_ig2/watchdog.c
+++ b/src/mainboard/supermicro/x6dhr_ig2/watchdog.c
@@ -31,17 +31,17 @@ static void disable_ich5_watchdog(void)
        value = pci_read_config16(dev, 0x04);
        value |= (1 << 10);
        pci_write_config16(dev, 0x04, value);
        value = pci_read_config16(dev, 0x04);
        value |= (1 << 10);
        pci_write_config16(dev, 0x04, value);

-       
+

        /* Set and enable acpibase */
        pci_write_config32(dev, 0x40, ICH5_WDBASE | 1);
        pci_write_config8(dev, 0x44, 0x10);
        base = ICH5_WDBASE + 0x60;
        /* Set and enable acpibase */
        pci_write_config32(dev, 0x40, ICH5_WDBASE | 1);
        pci_write_config8(dev, 0x44, 0x10);
        base = ICH5_WDBASE + 0x60;

-       
+

        /* Set bit 11 in TCO1_CNT */
        value = inw(base + 0x08);
        value |= 1 << 11;
        outw(value, base + 0x08);
        /* Set bit 11 in TCO1_CNT */
        value = inw(base + 0x08);
        value |= 1 << 11;
        outw(value, base + 0x08);

-       
+

        /* Clear TCO timeout status */
        outw(0x0008, base + 0x04);
        outw(0x0002, base + 0x06);
        /* Clear TCO timeout status */
        outw(0x0008, base + 0x04);
        outw(0x0002, base + 0x06);


@@ -86,7 +86,7 @@ static void disable_jarell_frb3(void)
        outl(value, base + 0x38);
        value &= ~(1 << 16);
        outl(value, base + 0x38);
        outl(value, base + 0x38);
        value &= ~(1 << 16);
        outl(value, base + 0x38);

-#endif                           
+#endif

 }
 
 static void disable_watchdogs(void)
 }
 
 static void disable_watchdogs(void)

diff --git a/src/mainboard/supermicro/x6dhr_ig2/x6dhr2_fixups.c b/src/mainboard/supermicro/x6dhr_ig2/x6dhr2_fixups.c
index 82c070b0c12c76f8fe2af73fe3c31239d383aa33..cc3e41eb9f634c3a735eb41c03c48642b82d2617 100644 (file)
--- a/src/mainboard/supermicro/x6dhr_ig2/x6dhr2_fixups.c
+++ b/src/mainboard/supermicro/x6dhr_ig2/x6dhr2_fixups.c
@@ -9,13 +9,13 @@ static void mch_reset(void)
 
 static void mainboard_set_e7520_pll(unsigned bits)
 {
 
 static void mainboard_set_e7520_pll(unsigned bits)
 {

-       return; 
+       return;

 }
 
 
 static void mainboard_set_e7520_leds(void)
 {
 }
 
 
 static void mainboard_set_e7520_leds(void)
 {

-       return; 
+       return;

 }
 
 
 }
 
 

diff --git a/src/mainboard/technexion/Kconfig b/src/mainboard/technexion/Kconfig
index c0bf041034d38e86462ec54d22c9a1509569393e..da13c340eb515240a6d7a799164c8680862985c0 100644 (file)
--- a/src/mainboard/technexion/Kconfig
+++ b/src/mainboard/technexion/Kconfig
@@ -1,7 +1,7 @@
 choice
        prompt "Mainboard model"
        depends on VENDOR_TECHNEXION
 choice
        prompt "Mainboard model"
        depends on VENDOR_TECHNEXION

-        
+

 source "src/mainboard/technexion/tim8690/Kconfig"
 source "src/mainboard/technexion/tim5690/Kconfig"
 
 source "src/mainboard/technexion/tim8690/Kconfig"
 source "src/mainboard/technexion/tim5690/Kconfig"
 

diff --git a/src/mainboard/technexion/tim5690/mainboard.c b/src/mainboard/technexion/tim5690/mainboard.c
index 11bb4248e7d1e05ea11a8585d80aecdd168c7949..924d09e55fd9f77c17b0418a57924437ccf20c50 100644 (file)
--- a/src/mainboard/technexion/tim5690/mainboard.c
+++ b/src/mainboard/technexion/tim5690/mainboard.c
@@ -184,7 +184,7 @@ static void mb_gpio_init(u16 *iobase)
         it8712f_enter_conf();
         outb(IT8712F_CONFIG_REG_LDN, SIO_INDEX);
         outb(IT8712F_GPIO, SIO_DATA);
         it8712f_enter_conf();
         outb(IT8712F_CONFIG_REG_LDN, SIO_INDEX);
         outb(IT8712F_GPIO, SIO_DATA);

-        outb(0x62, SIO_INDEX); 
+        outb(0x62, SIO_INDEX);

         outb((*iobase >> 8), SIO_DATA);
         outb(0x63, SIO_INDEX);
         outb((*iobase & 0xff), SIO_DATA);
         outb((*iobase >> 8), SIO_DATA);
         outb(0x63, SIO_INDEX);
         outb((*iobase & 0xff), SIO_DATA);

diff --git a/src/mainboard/technexion/tim5690/speaker.c b/src/mainboard/technexion/tim5690/speaker.c
index ae11b3eb6343eaa059b728ec14572f8c5e37aaa7..b7f18647d30dc3124e88944a7402b7d79760b1ef 100644 (file)
--- a/src/mainboard/technexion/tim5690/speaker.c
+++ b/src/mainboard/technexion/tim5690/speaker.c
@@ -54,7 +54,7 @@ void speaker_init(uint8_t time) {
     * CounterSelect, bit[7:6]=10b, Select counter 2.
     */
    outb(0xb6, 0x43);
     * CounterSelect, bit[7:6]=10b, Select counter 2.
     */
    outb(0xb6, 0x43);

-   
+

 
    /* SB600 RRG.
     * TimerCh2- RW - 8 bits - [IO_Reg: 42h].
 
    /* SB600 RRG.
     * TimerCh2- RW - 8 bits - [IO_Reg: 42h].

diff --git a/src/mainboard/technexion/tim8690/mainboard.c b/src/mainboard/technexion/tim8690/mainboard.c
index 294c0f2590da6b9c212a1de60e0b5a6edcef955b..664372d8792df15dc7420d825833415fc851d783 100644 (file)
--- a/src/mainboard/technexion/tim8690/mainboard.c
+++ b/src/mainboard/technexion/tim8690/mainboard.c
@@ -48,7 +48,7 @@ uint64_t uma_memory_base, uma_memory_size;
 
 /***************************************************
 * This board, the TIM-8690 has two Marvel 88e5056 PCI-E
 
 /***************************************************
 * This board, the TIM-8690 has two Marvel 88e5056 PCI-E

-* 10/100/1000 chips on board. 
+* 10/100/1000 chips on board.

 * Both of their pin PERSTn pins are connected to GPIO 5 of the
 * SB600 southbridge.
 ****************************************************/
 * Both of their pin PERSTn pins are connected to GPIO 5 of the
 * SB600 southbridge.
 ****************************************************/

diff --git a/src/mainboard/technologic/Kconfig b/src/mainboard/technologic/Kconfig
index 32967fd3e5f4d1c889e2466f0996a821479e2c76..5756361863a143ee8a5c543f9b4f08367acdc8b7 100644 (file)
--- a/src/mainboard/technologic/Kconfig
+++ b/src/mainboard/technologic/Kconfig
@@ -1,7 +1,7 @@
 choice
        prompt "Mainboard model"
        depends on VENDOR_TECHNOLOGIC
 choice
        prompt "Mainboard model"
        depends on VENDOR_TECHNOLOGIC

-        
+

 source "src/mainboard/technologic/ts5300/Kconfig"
 
 endchoice
 source "src/mainboard/technologic/ts5300/Kconfig"
 
 endchoice

diff --git a/src/mainboard/technologic/ts5300/chip.h b/src/mainboard/technologic/ts5300/chip.h
index 97f92dd9155b0c54b6b0b533972c7c43a27c7532..ceb8af100a8efc29e9a55cae87568224fc4b06eb 100644 (file)
--- a/src/mainboard/technologic/ts5300/chip.h
+++ b/src/mainboard/technologic/ts5300/chip.h
@@ -1,5 +1,5 @@
 extern struct chip_operations mainboard_ops;
 
 struct mainboard_config {
 extern struct chip_operations mainboard_ops;
 
 struct mainboard_config {

-       
+

 };
 };

diff --git a/src/mainboard/technologic/ts5300/devicetree.cb b/src/mainboard/technologic/ts5300/devicetree.cb
index 65809cb2f48fedaf65d9126cf91179a3ad6e3bb8..a0f05791af2bfb8ccdd6aa6beaffaffe761c9e85 100644 (file)
--- a/src/mainboard/technologic/ts5300/devicetree.cb
+++ b/src/mainboard/technologic/ts5300/devicetree.cb
@@ -1,7 +1,7 @@
 chip cpu/amd/sc520
 chip cpu/amd/sc520

-       device pci_domain 0 on 
+       device pci_domain 0 on

                device pci 0.0 on end
                device pci 0.0 on end

-       
+

 #              register "com1" = "{1}"
 #              register "com1" = "{1, 0, 0x3f8, 4}"
        end
 #              register "com1" = "{1}"
 #              register "com1" = "{1, 0, 0x3f8, 4}"
        end

diff --git a/src/mainboard/technologic/ts5300/irq_tables.c b/src/mainboard/technologic/ts5300/irq_tables.c
index 9b49747ead30359473fabf4bd8a5e4076cd4b6e4..22d5820a62f30d38576efb6a6d0ae451d79aeea4 100644 (file)
--- a/src/mainboard/technologic/ts5300/irq_tables.c
+++ b/src/mainboard/technologic/ts5300/irq_tables.c
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!

    (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
  *
    (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
  *

diff --git a/src/mainboard/technologic/ts5300/mainboard.c b/src/mainboard/technologic/ts5300/mainboard.c
index 4b9ce16bf88ae5ce34481f6d1c51128920956868..58333b8f887805fd3558b80d57bd5d555ee699fc 100644 (file)
--- a/src/mainboard/technologic/ts5300/mainboard.c
+++ b/src/mainboard/technologic/ts5300/mainboard.c
@@ -17,10 +17,10 @@ static void irqdump(void)
   int i;
   int irqlist[] = {0xd00, 0xd02, 0xd03, 0xd04, 0xd08, 0xd0a,
                0xd14, 0xd18, 0xd1a, 0xd1b, 0xd1c,
   int i;
   int irqlist[] = {0xd00, 0xd02, 0xd03, 0xd04, 0xd08, 0xd0a,
                0xd14, 0xd18, 0xd1a, 0xd1b, 0xd1c,

-               0xd20, 0xd21, 0xd22, 0xd28, 0xd29, 
+               0xd20, 0xd21, 0xd22, 0xd28, 0xd29,

                0xd30, 0xd31, 0xd32, 0xd33,
                0xd30, 0xd31, 0xd32, 0xd33,

-               0xd40, 0xd41, 0xd42, 0xd43,0xd44, 0xd45, 0xd46, 
-               0xd50, 0xd51, 0xd52, 0xd53,0xd54, 0xd55, 0xd56, 0xd57,0xd58, 0xd59, 0xd5a, 
+               0xd40, 0xd41, 0xd42, 0xd43,0xd44, 0xd45, 0xd46,
+               0xd50, 0xd51, 0xd52, 0xd53,0xd54, 0xd55, 0xd56, 0xd57,0xd58, 0xd59, 0xd5a,

                -1};
   mmcr = (void *) 0xfffef000;
 
                -1};
   mmcr = (void *) 0xfffef000;
 


@@ -44,7 +44,7 @@ static void enable_dev(struct device *dev) {
 
        /* from fuctory bios */
        /* NOTE: the following interrupt settings made interrupts work
 
        /* from fuctory bios */
        /* NOTE: the following interrupt settings made interrupts work

-        * for hard drive, and serial, but not for ethernet 
+        * for hard drive, and serial, but not for ethernet

         */
 
        printk(BIOS_ERR, "Setting up PIC\n");
         */
 
        printk(BIOS_ERR, "Setting up PIC\n");


@@ -63,7 +63,7 @@ static void enable_dev(struct device *dev) {
        mmcr->pic.rtcmap  = 0x03;
        mmcr->pic.ferrmap = 0x00;
        mmcr->pic.intpinpol = 0x100;
        mmcr->pic.rtcmap  = 0x03;
        mmcr->pic.ferrmap = 0x00;
        mmcr->pic.intpinpol = 0x100;

-       
+

        mmcr->pic.gp0imap = 0x00;
        mmcr->pic.gp1imap = 0x02;
        mmcr->pic.gp2imap = 0x07;
        mmcr->pic.gp0imap = 0x00;
        mmcr->pic.gp1imap = 0x02;
        mmcr->pic.gp2imap = 0x07;


@@ -83,7 +83,7 @@ static void enable_dev(struct device *dev) {
        mmcr->sysarb.ctl = 0x00;
        mmcr->sysarb.menb = 0x1f;
        mmcr->sysarb.prictl = 0x40000f0f;
        mmcr->sysarb.ctl = 0x00;
        mmcr->sysarb.menb = 0x1f;
        mmcr->sysarb.prictl = 0x40000f0f;

-       
+

        /* this is bios setting, depends on sysarb above */
        mmcr->hostbridge.ctl = 0x0;
        mmcr->hostbridge.tgtirqctl = 0x0;
        /* this is bios setting, depends on sysarb above */
        mmcr->hostbridge.ctl = 0x0;
        mmcr->hostbridge.tgtirqctl = 0x0;


@@ -125,7 +125,7 @@ static void enable_dev(struct device *dev) {
        mmcr->gpctl.gprdoff = 0x02;
        mmcr->gpctl.gpwrw = 0x07;
        mmcr->gpctl.gpwroff = 0x02;
        mmcr->gpctl.gprdoff = 0x02;
        mmcr->gpctl.gpwrw = 0x07;
        mmcr->gpctl.gpwroff = 0x02;

-       
+

        //mmcr->reset.sysinfo = 0xdf;
        //mmcr->reset.rescfg = 0x5;
        /* their IRQ table is wrong. Just hardwire it */
        //mmcr->reset.sysinfo = 0xdf;
        //mmcr->reset.rescfg = 0x5;
        /* their IRQ table is wrong. Just hardwire it */

diff --git a/src/mainboard/technologic/ts5300/romstage.c b/src/mainboard/technologic/ts5300/romstage.c
index 4379c2457d319496655a8b689bdf724c8074b7cf..d0f0d4c61c430b6e26f3dfb13f933b910d660695 100644 (file)
--- a/src/mainboard/technologic/ts5300/romstage.c
+++ b/src/mainboard/technologic/ts5300/romstage.c
@@ -52,7 +52,7 @@ void setup_pars(void)
 static void identify_ts9500(void)
 {
        unsigned i, val;
 static void identify_ts9500(void)
 {
        unsigned i, val;

-       
+

        TS9500_LED_ON;
 
        print_err("TS-9500 add-on found:\n");
        TS9500_LED_ON;
 
        print_err("TS-9500 add-on found:\n");


@@ -61,23 +61,23 @@ static void identify_ts9500(void)
                print_err("  DIP");
                print_err_char(i+0x31);
                print_err(": ");
                print_err("  DIP");
                print_err_char(i+0x31);
                print_err(": ");

-               if((val&(1<<i))!=0) 
-                       print_err("on\n"); 
+               if((val&(1<<i))!=0)
+                       print_err("on\n");

                else
                else

-                       print_err("off\n"); 
+                       print_err("off\n");

        }
        print_err("\n");
        }
        print_err("\n");

-       
+

        val=inb(0x19a);
        val=inb(0x19a);

-       
+

        for (i=6; i<8; i++) {
                print_err("  JP");
                print_err_char(i+0x30-5);
                print_err(": ");
        for (i=6; i<8; i++) {
                print_err("  JP");
                print_err_char(i+0x30-5);
                print_err(": ");

-               if((val&(1<<i))!=0) 
-                       print_err("on\n"); 
+               if((val&(1<<i))!=0)
+                       print_err("on\n");

                else
                else

-                       print_err("off\n"); 
+                       print_err("off\n");

        }
        print_err("\n");
 
        }
        print_err("\n");
 


@@ -103,33 +103,33 @@ static void identify_system(void)
        print_err("  SRAM option:   ");
        if((val&1)==0) print_err("not ");
        print_err("installed\n");
        print_err("  SRAM option:   ");
        if((val&1)==0) print_err("not ");
        print_err("installed\n");

-       
+

        print_err("  RS-485 option: ");
        if((val&2)==0) print_err("not ");
        print_err("installed\n");
 
        val=inb(0x76);
        print_err("  Temp. range:   ");
        print_err("  RS-485 option: ");
        if((val&2)==0) print_err("not ");
        print_err("installed\n");
 
        val=inb(0x76);
        print_err("  Temp. range:   ");

-       if((val&2)==0) print_err("commercial\n"); 
+       if((val&2)==0) print_err("commercial\n");

        else print_err("industrial\n");
        else print_err("industrial\n");

-       
+

        print_err("\n");
        print_err("\n");

-       
+

        val=inb(0x77);
        for (i=1; i<8; i++) {
                print_err("  JP");
                print_err_char(i+0x30);
                print_err(": ");
        val=inb(0x77);
        for (i=1; i<8; i++) {
                print_err("  JP");
                print_err_char(i+0x30);
                print_err(": ");

-               if((val&(1<<i))!=0) 
-                       print_err("on\n"); 
+               if((val&(1<<i))!=0)
+                       print_err("on\n");

                else
                else

-                       print_err("off\n"); 
+                       print_err("off\n");

        }
        print_err("\n");
 
        /* Detect TS-9500 */
        val=inb(0x19d);
        }
        print_err("\n");
 
        /* Detect TS-9500 */
        val=inb(0x19d);

-       if(val==0x5f) 
+       if(val==0x5f)

                identify_ts9500();
 
 }
                identify_ts9500();
 
 }


@@ -144,18 +144,18 @@ static void main(unsigned long bist)
 {
        volatile int i;
        unsigned val;
 {
        volatile int i;
        unsigned val;

-       
+

        TS5300_LED_ON;
        TS5300_LED_ON;

-       
+

        // Let the hardware settle a bit.
        for(i = 0; i < 100; i++)
                ;
        // Let the hardware settle a bit.
        for(i = 0; i < 100; i++)
                ;

-       
+

         setupsc520();
         uart_init();
         console_init();
         setupsc520();
         uart_init();
         console_init();

-       
-       
+
+

        print_err("Technologic Systems TS5300 - http://www.embeddedx86.com/\n");
        staticmem();
        print_err("Memory initialized: 32MB\n");
        print_err("Technologic Systems TS5300 - http://www.embeddedx86.com/\n");
        staticmem();
        print_err("Memory initialized: 32MB\n");


@@ -170,7 +170,7 @@ static void main(unsigned long bist)
        ram_check(0x00000000, 0x000a0000);
        ram_check(0x000b0000, 0x02000000);
 #endif
        ram_check(0x00000000, 0x000a0000);
        ram_check(0x000b0000, 0x02000000);
 #endif

-       
+

        TS5300_LED_OFF;
 }
 
        TS5300_LED_OFF;
 }
 

diff --git a/src/mainboard/thomson/Kconfig b/src/mainboard/thomson/Kconfig
index 936ad3e71d3f307e1a547609cd3a90fb30872804..eb2caa09ff0f3bb7b3ec77115c0f71c60f5f340c 100644 (file)
--- a/src/mainboard/thomson/Kconfig
+++ b/src/mainboard/thomson/Kconfig
@@ -1,7 +1,7 @@
 choice
        prompt "Mainboard model"
        depends on VENDOR_THOMSON
 choice
        prompt "Mainboard model"
        depends on VENDOR_THOMSON

-        
+

 source "src/mainboard/thomson/ip1000/Kconfig"
 
 endchoice
 source "src/mainboard/thomson/ip1000/Kconfig"
 
 endchoice

diff --git a/src/mainboard/thomson/ip1000/gpio.c b/src/mainboard/thomson/ip1000/gpio.c
index 6a69bb539d06aefd6e9254b468fbcd38692afc79..1c5125a253d6107a7a79603f2f581ce8bae921a5 100644 (file)
--- a/src/mainboard/thomson/ip1000/gpio.c
+++ b/src/mainboard/thomson/ip1000/gpio.c
@@ -61,13 +61,13 @@ static void mb_gpio_init(void)
        outl(0x01, PME_IO_BASE_ADDR + 0x2c);
 
        /* GP30 - FAN2_TACH */
        outl(0x01, PME_IO_BASE_ADDR + 0x2c);
 
        /* GP30 - FAN2_TACH */

-       outl(0x05, PME_IO_BASE_ADDR + 0x33); 
+       outl(0x05, PME_IO_BASE_ADDR + 0x33);

 
        /* GP31 - FAN1_TACH */
        outl(0x05, PME_IO_BASE_ADDR + 0x34);
 
        /* GP32 - FAN2_CTRL */
 
        /* GP31 - FAN1_TACH */
        outl(0x05, PME_IO_BASE_ADDR + 0x34);
 
        /* GP32 - FAN2_CTRL */

-       outl(0x04, PME_IO_BASE_ADDR + 0x35); 
+       outl(0x04, PME_IO_BASE_ADDR + 0x35);

 
        /* GP33 - FAN1_CTRL */
        outl(0x04, PME_IO_BASE_ADDR + 0x36);
 
        /* GP33 - FAN1_CTRL */
        outl(0x04, PME_IO_BASE_ADDR + 0x36);


@@ -82,7 +82,7 @@ static void mb_gpio_init(void)
        outl(0x00, PME_IO_BASE_ADDR + 0x3a);
 
        /* GP42 - GPIO_PME_OUT */
        outl(0x00, PME_IO_BASE_ADDR + 0x3a);
 
        /* GP42 - GPIO_PME_OUT */

-       outl(0x00, PME_IO_BASE_ADDR + 0x3d); 
+       outl(0x00, PME_IO_BASE_ADDR + 0x3d);

 
        /* GP50 - SER2_RI */
        outl(0x05, PME_IO_BASE_ADDR + 0x3f);
 
        /* GP50 - SER2_RI */
        outl(0x05, PME_IO_BASE_ADDR + 0x3f);

diff --git a/src/mainboard/thomson/ip1000/mainboard.c b/src/mainboard/thomson/ip1000/mainboard.c
index c78a71032131ce5b41a192a06054d9d0d3a254e2..f6eee68440ce2a079603f9eaac890c66f9373b06 100644 (file)
--- a/src/mainboard/thomson/ip1000/mainboard.c
+++ b/src/mainboard/thomson/ip1000/mainboard.c
@@ -62,13 +62,13 @@ static void parport_gpios(void)
 
        printk(BIOS_DEBUG, "IP1000 GPIOs:\n");
        printk(BIOS_DEBUG, "  GPIO mask:  %02x\n", pp_gpios);
 
        printk(BIOS_DEBUG, "IP1000 GPIOs:\n");
        printk(BIOS_DEBUG, "  GPIO mask:  %02x\n", pp_gpios);

-       printk(BIOS_DEBUG, "  green led:  %s\n", 
+       printk(BIOS_DEBUG, "  green led:  %s\n",

                        (pp_gpios & PARPORT_GPIO_LED_GREEN) ? "off" : "on");
                        (pp_gpios & PARPORT_GPIO_LED_GREEN) ? "off" : "on");

-       printk(BIOS_DEBUG, "  orange led: %s\n", 
+       printk(BIOS_DEBUG, "  orange led: %s\n",

                        (pp_gpios & PARPORT_GPIO_LED_ORANGE) ? "off" : "on");
                        (pp_gpios & PARPORT_GPIO_LED_ORANGE) ? "off" : "on");

-       printk(BIOS_DEBUG, "  red led:    %s\n", 
+       printk(BIOS_DEBUG, "  red led:    %s\n",

                        (pp_gpios & PARPORT_GPIO_LED_RED) ? "off" : "on");
                        (pp_gpios & PARPORT_GPIO_LED_RED) ? "off" : "on");

-       printk(BIOS_DEBUG, "  IR port:    %s\n", 
+       printk(BIOS_DEBUG, "  IR port:    %s\n",

                        (pp_gpios & PARPORT_GPIO_IR_PORT) ? "off" : "on");
 }
 
                        (pp_gpios & PARPORT_GPIO_IR_PORT) ? "off" : "on");
 }
 


@@ -77,7 +77,7 @@ static void flash_gpios(void)
        u8 manufacturer_id = read8(0xffbc0000);
        u8 device_id = read8(0xffbc0001);
 
        u8 manufacturer_id = read8(0xffbc0000);
        u8 device_id = read8(0xffbc0001);
 

-       if ((manufacturer_id == 0x20) && 
+       if ((manufacturer_id == 0x20) &&

                ((device_id == 0x2c) || (device_id == 0x2d))) {
                printk(BIOS_DEBUG, "Detected ST M50FW0%c0 flash:\n",
                                (device_id==0x2c)?'4':'8');
                ((device_id == 0x2c) || (device_id == 0x2d))) {
                printk(BIOS_DEBUG, "Detected ST M50FW0%c0 flash:\n",
                                (device_id==0x2c)?'4':'8');

diff --git a/src/mainboard/thomson/ip1000/romstage.c b/src/mainboard/thomson/ip1000/romstage.c
index bf78a1d2d19d7f5ec696215ea81b6a14708728dc..66b92d14bd909f592bcaa44a2bfabe4396976152 100644 (file)
--- a/src/mainboard/thomson/ip1000/romstage.c
+++ b/src/mainboard/thomson/ip1000/romstage.c
@@ -89,7 +89,7 @@ static void mb_early_setup(void)
        /* CPU Frequency Strap */
        pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xd5, 0x02);
        /* ACPI base address and enable Resource Indicator */
        /* CPU Frequency Strap */
        pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xd5, 0x02);
        /* ACPI base address and enable Resource Indicator */

-       pci_write_config32(PCI_DEV(0, 0x1f, 0), PMBASE, (PMBASE_ADDR | 1)); 
+       pci_write_config32(PCI_DEV(0, 0x1f, 0), PMBASE, (PMBASE_ADDR | 1));

        /* Enable the SMBUS */
        enable_smbus();
        /*  ACPI Enable */
        /* Enable the SMBUS */
        enable_smbus();
        /*  ACPI Enable */

diff --git a/src/mainboard/tyan/Kconfig b/src/mainboard/tyan/Kconfig
index 93b6d9d4c251b13a65065feead1cbddd6946d75b..cd9646b38c6e8649f7342713ab27a1112ccdb180 100644 (file)
--- a/src/mainboard/tyan/Kconfig
+++ b/src/mainboard/tyan/Kconfig
@@ -21,7 +21,7 @@
 choice
        prompt "Mainboard model"
        depends on VENDOR_TYAN
 choice
        prompt "Mainboard model"
        depends on VENDOR_TYAN

-       
+

 source "src/mainboard/tyan/s1846/Kconfig"
 source "src/mainboard/tyan/s2735/Kconfig"
 source "src/mainboard/tyan/s2850/Kconfig"
 source "src/mainboard/tyan/s1846/Kconfig"
 source "src/mainboard/tyan/s2735/Kconfig"
 source "src/mainboard/tyan/s2850/Kconfig"

diff --git a/src/mainboard/tyan/s2735/Kconfig b/src/mainboard/tyan/s2735/Kconfig
index a0f739c0712d4d42613dcefe136c1a64529d7402..a387d1a4ba1c1bb7655efb202b874ee1866bfc22 100644 (file)
--- a/src/mainboard/tyan/s2735/Kconfig
+++ b/src/mainboard/tyan/s2735/Kconfig
@@ -26,12 +26,12 @@ config DCACHE_RAM_BASE
        hex
        default 0xcf000
        depends on BOARD_TYAN_S2735
        hex
        default 0xcf000
        depends on BOARD_TYAN_S2735

-       
+

 config DCACHE_RAM_SIZE
        hex
        default 0x1000
        depends on BOARD_TYAN_S2735
 config DCACHE_RAM_SIZE
        hex
        default 0x1000
        depends on BOARD_TYAN_S2735

-       
+

 config MAINBOARD_PART_NUMBER
        string
        default "S2735"
 config MAINBOARD_PART_NUMBER
        string
        default "S2735"

diff --git a/src/mainboard/tyan/s2735/cmos.layout b/src/mainboard/tyan/s2735/cmos.layout
index ccda70c8088391df84a0b005d82fd8ab95907b8a..608f02867caa3875bda2678efda28d9ff0e7689b 100644 (file)
--- a/src/mainboard/tyan/s2735/cmos.layout
+++ b/src/mainboard/tyan/s2735/cmos.layout
@@ -30,8 +30,8 @@ entries
 388          4       r       0        reboot_bits
 392          3       e       5        baud_rate
 395          1       e       2        hyper_threading
 388          4       r       0        reboot_bits
 392          3       e       5        baud_rate
 395          1       e       2        hyper_threading

-396          1       e       1        thermal_monitoring 
-397          1       e       1        remap_memory_high 
+396          1       e       1        thermal_monitoring
+397          1       e       1        remap_memory_high

 400          1       e       1        power_on_after_fail
 412          4       e       6        debug_level
 416          4       e       7        boot_first
 400          1       e       1        power_on_after_fail
 412          4       e       6        debug_level
 416          4       e       7        boot_first

diff --git a/src/mainboard/tyan/s2735/devicetree.cb b/src/mainboard/tyan/s2735/devicetree.cb
index 8ad5e0ecac82869cbdd9a688450999232d68d75d..1e8b12a79082b23c500ffd926b5f79ec56e5ce56 100644 (file)
--- a/src/mainboard/tyan/s2735/devicetree.cb
+++ b/src/mainboard/tyan/s2735/devicetree.cb
@@ -5,7 +5,7 @@ chip northbridge/intel/e7501
                device pci 2.0 on
                        chip southbridge/intel/i82870
                                device pci 1c.0 on end
                device pci 2.0 on
                        chip southbridge/intel/i82870
                                device pci 1c.0 on end

-                               device pci 1d.0 on 
+                               device pci 1d.0 on

                                         device pci 1.0 on end # intel lan
                                         device pci 1.1 on end
                                end
                                         device pci 1.0 on end # intel lan
                                         device pci 1.1 on end
                                end


@@ -20,7 +20,7 @@ chip northbridge/intel/e7501
                        device pci 1d.2 on end
                        device pci 1d.3 on end
                        device pci 1d.7 on end
                        device pci 1d.2 on end
                        device pci 1d.3 on end
                        device pci 1d.7 on end

-                       device pci 1e.0 on 
+                       device pci 1e.0 on

                                device pci 1.0 on end # intel lan 10/100
                                 device pci 2.0 on end # ati
                        end
                                device pci 1.0 on end # intel lan 10/100
                                 device pci 2.0 on end # ati
                        end


@@ -56,7 +56,7 @@ chip northbridge/intel/e7501
                                                 io 0x60 = 0x220
                                                 io 0x62 = 0x300
                                                 irq 0x70 = 9
                                                 io 0x60 = 0x220
                                                 io 0x62 = 0x300
                                                 irq 0x70 = 9

-                                        end                               
+                                        end

                                         device pnp 2e.8 off end #  GPIO2
                                         device pnp 2e.9 off end #  GPIO3
                                         device pnp 2e.a off end #  ACPI
                                         device pnp 2e.8 off end #  GPIO2
                                         device pnp 2e.9 off end #  GPIO3
                                         device pnp 2e.a off end #  ACPI

diff --git a/src/mainboard/tyan/s2735/irq_tables.c b/src/mainboard/tyan/s2735/irq_tables.c
index 4f6eb306dc11b475787e0ffdc4a3424a27349b37..036b8d0cb0fa352e0a4fa61824ef266a5319be85 100644 (file)
--- a/src/mainboard/tyan/s2735/irq_tables.c
+++ b/src/mainboard/tyan/s2735/irq_tables.c
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!

    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 
    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 

diff --git a/src/mainboard/tyan/s2735/mptable.c b/src/mainboard/tyan/s2735/mptable.c
index 6a73c6dc88fb9acd654820708003dd4aa15a4731..cde5c4e3b41e476849452674f8da8f539ad26208 100644 (file)
--- a/src/mainboard/tyan/s2735/mptable.c
+++ b/src/mainboard/tyan/s2735/mptable.c
@@ -48,18 +48,18 @@ static void *smp_write_config_table(void *v)
                         res = find_resource(dev, PCI_BASE_ADDRESS_0);
                         if (res) {
                                 smp_write_ioapic(mc, 0x09, 0x20, res->base);
                         res = find_resource(dev, PCI_BASE_ADDRESS_0);
                         if (res) {
                                 smp_write_ioapic(mc, 0x09, 0x20, res->base);

-                        }              
+                        }

                }
                dev = dev_find_slot(1, PCI_DEVFN(0x1c,0));
                if (dev) {
                         res = find_resource(dev, PCI_BASE_ADDRESS_0);
                         if (res) {
                                 smp_write_ioapic(mc, 0x0a, 0x20, res->base);
                }
                dev = dev_find_slot(1, PCI_DEVFN(0x1c,0));
                if (dev) {
                         res = find_resource(dev, PCI_BASE_ADDRESS_0);
                         if (res) {
                                 smp_write_ioapic(mc, 0x0a, 0x20, res->base);

-                        }              
+                        }

                }
        }
 /*I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN#
                }
        }
 /*I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN#

-*/     
+*/

        smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x5, 0x0, 0x8, 0x0);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x5, 0x1, 0x8, 0x1);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x5, 0x0, 0x8, 0x2);
        smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x5, 0x0, 0x8, 0x0);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x5, 0x1, 0x8, 0x1);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x5, 0x0, 0x8, 0x2);


@@ -149,7 +149,7 @@ Compatibility Bus Address
  predefined range: 0x00000000--
 Compatibility Bus Address
  bus ID: 0 address modifier: add
  predefined range: 0x00000000--
 Compatibility Bus Address
  bus ID: 0 address modifier: add

- predefined range: 0x00000001  // There is no extension information... 
+ predefined range: 0x00000001  // There is no extension information...

 */
        /* Compute the checksums */
        mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
 */
        /* Compute the checksums */
        mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);

diff --git a/src/mainboard/tyan/s2735/romstage.c b/src/mainboard/tyan/s2735/romstage.c
index f581de431e5ec5f73fefc686077d0b861991f1d2..de3124cb90773e3c8808db1681a52e85d63612e1 100644 (file)
--- a/src/mainboard/tyan/s2735/romstage.c
+++ b/src/mainboard/tyan/s2735/romstage.c
@@ -1,4 +1,4 @@
- 
+

 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>


@@ -50,7 +50,7 @@ void main(unsigned long bist)
                         .channel1 = { (0xa<<3)|4, (0xa<<3)|5, (0xa<<3)|6, 0 },
                 },
        };
                         .channel1 = { (0xa<<3)|4, (0xa<<3)|5, (0xa<<3)|6, 0 },
                 },
        };

-       
+

        if (bist == 0) {
                enable_lapic();
        }
        if (bist == 0) {
                enable_lapic();
        }

diff --git a/src/mainboard/tyan/s2850/devicetree.cb b/src/mainboard/tyan/s2850/devicetree.cb
index 264f8c7df6c1ebdf840c261dbf53cba47fec8ed4..98e6a28746f73c7f205faa7e43409bbcc6c00ae4 100644 (file)
--- a/src/mainboard/tyan/s2850/devicetree.cb
+++ b/src/mainboard/tyan/s2850/devicetree.cb
@@ -1,9 +1,9 @@
 chip northbridge/amd/amdk8/root_complex
 chip northbridge/amd/amdk8/root_complex

-        device apic_cluster 0 on                        
-                chip cpu/amd/socket_940                
-                        device apic 0 on end                    
-                end                                     
-        end 
+        device apic_cluster 0 on
+                chip cpu/amd/socket_940
+                        device apic 0 on end
+                end
+        end

        device pci_domain 0 on
                chip northbridge/amd/amdk8
                        device pci 18.0 on # LDT0
        device pci_domain 0 on
                chip northbridge/amd/amdk8
                        device pci 18.0 on # LDT0


@@ -51,7 +51,7 @@ chip northbridge/amd/amdk8/root_complex
                                                                io 0x60 = 0x220
                                                                io 0x62 = 0x300
                                                                irq 0x70 = 9
                                                                io 0x60 = 0x220
                                                                io 0x62 = 0x300
                                                                irq 0x70 = 9

-                                                       end  
+                                                       end

                                                        device pnp 2e.8 off end #  GPIO2
                                                        device pnp 2e.9 off end #  GPIO3
                                                        device pnp 2e.a off end #  ACPI
                                                        device pnp 2e.8 off end #  GPIO2
                                                        device pnp 2e.9 off end #  GPIO3
                                                        device pnp 2e.a off end #  ACPI


@@ -63,7 +63,7 @@ chip northbridge/amd/amdk8/root_complex
                                        end
                                        device pci 1.1 on end
                                        device pci 1.2 on end
                                        end
                                        device pci 1.1 on end
                                        device pci 1.2 on end

-                                       device pci 1.3 on 
+                                       device pci 1.3 on

                                                 chip drivers/generic/generic #dimm 0-0-0
                                                         device i2c 50 on end
                                                 end
                                                 chip drivers/generic/generic #dimm 0-0-0
                                                         device i2c 50 on end
                                                 end


@@ -82,14 +82,14 @@ chip northbridge/amd/amdk8/root_complex
                                         register "ide0_enable" = "1"
                                         register "ide1_enable" = "1"
                                end
                                         register "ide0_enable" = "1"
                                         register "ide1_enable" = "1"
                                end

-                       end #  device pci 18.0 
+                       end #  device pci 18.0

                        device pci 18.0 on end
                        device pci 18.0 on end
                        device pci 18.0 on end
                        device pci 18.0 on end

-                       
+

                        device pci 18.1 on end
                        device pci 18.2 on end
                        device pci 18.3 on end
                end
                        device pci 18.1 on end
                        device pci 18.2 on end
                        device pci 18.3 on end
                end

-       end 
+       end

 end
 
 end
 

diff --git a/src/mainboard/tyan/s2850/irq_tables.c b/src/mainboard/tyan/s2850/irq_tables.c
index 8c7e681ec2df5abc3b76bcd43c2fb9e1f772a300..d1179dcfae62a487ac102c03e69f99613f12e29c 100644 (file)
--- a/src/mainboard/tyan/s2850/irq_tables.c
+++ b/src/mainboard/tyan/s2850/irq_tables.c
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!

    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 
    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 

diff --git a/src/mainboard/tyan/s2850/mptable.c b/src/mainboard/tyan/s2850/mptable.c
index 0d4d6f9bc1a65faf955d3e566c42b9c1367057be..51c060126fb2b8961157aa8c4efa6b4a74f7389f 100644 (file)
--- a/src/mainboard/tyan/s2850/mptable.c
+++ b/src/mainboard/tyan/s2850/mptable.c
@@ -29,7 +29,7 @@ static unsigned node_link_to_bus(unsigned node, unsigned link)
                 dst_node = (config_map >> 4) & 7;
                 dst_link = (config_map >> 8) & 3;
                 bus_base = (config_map >> 16) & 0xff;
                 dst_node = (config_map >> 4) & 7;
                 dst_link = (config_map >> 8) & 3;
                 bus_base = (config_map >> 16) & 0xff;

-#if 0                           
+#if 0

                 printk(BIOS_DEBUG, "node.link=bus: %d.%d=%d 0x%2x->0x%08x\n",
                         dst_node, dst_link, bus_base,
                         reg, config_map);
                 printk(BIOS_DEBUG, "node.link=bus: %d.%d=%d 0x%2x->0x%08x\n",
                         dst_node, dst_link, bus_base,
                         reg, config_map);


@@ -90,8 +90,8 @@ static void *smp_write_config_table(void *v)
                         bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
                         bus_isa    = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
                         bus_isa++;
                         bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
                         bus_isa    = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
                         bus_isa++;

-                }     
-                else {  
+                }
+                else {

                         printk(BIOS_DEBUG, "ERROR - could not find PCI 1:01.0, using defaults\n");
 
                         bus_8111_1 = 2;
                         printk(BIOS_DEBUG, "ERROR - could not find PCI 1:01.0, using defaults\n");
 
                         bus_8111_1 = 2;


@@ -110,12 +110,12 @@ static void *smp_write_config_table(void *v)
 #if CONFIG_LOGICAL_CPUS==1
        apicid_base = get_apicid_base(1);
 #else
 #if CONFIG_LOGICAL_CPUS==1
        apicid_base = get_apicid_base(1);
 #else

-        apicid_base = CONFIG_MAX_PHYSICAL_CPUS; 
+        apicid_base = CONFIG_MAX_PHYSICAL_CPUS;

 #endif
 #endif

-        apicid_8111 = apicid_base+0; 
+        apicid_8111 = apicid_base+0;

 
        smp_write_ioapic(mc, apicid_8111, 0x11, 0xfec00000);
 
        smp_write_ioapic(mc, apicid_8111, 0x11, 0xfec00000);

-  
+

 /*I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN# */
 
         smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_8111, 0x0);
 /*I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN# */
 
         smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_8111, 0x0);


@@ -133,7 +133,7 @@ static void *smp_write_config_table(void *v)
 
 
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_chain_0, (2<<2)|3, apicid_8111, 0x13);
 
 
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_chain_0, (2<<2)|3, apicid_8111, 0x13);

-       
+

 //On Board AMD USB
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0<<2)|3, apicid_8111, 0x13);
 
 //On Board AMD USB
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0<<2)|3, apicid_8111, 0x13);
 

diff --git a/src/mainboard/tyan/s2850/romstage.c b/src/mainboard/tyan/s2850/romstage.c
index 6fbafa90cb6decb11afdaa4c6a60d56cfe5da5c7..4e75e3683238e33ef4a4db0107b5b0267670ce7a 100644 (file)
--- a/src/mainboard/tyan/s2850/romstage.c
+++ b/src/mainboard/tyan/s2850/romstage.c
@@ -1,4 +1,4 @@
- 
+

 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>


@@ -114,7 +114,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         }
 
 //     post_code(0x32);
         }
 
 //     post_code(0x32);

-       
+

        w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
         uart_init();
         console_init();
        w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
         uart_init();
         console_init();


@@ -125,7 +125,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         setup_default_resource_map();
 
        needs_reset = setup_coherent_ht_domain();
         setup_default_resource_map();
 
        needs_reset = setup_coherent_ht_domain();

-       
+

 #if CONFIG_LOGICAL_CPUS==1
         // It is said that we should start core1 after all core0 launched
         start_other_cores();
 #if CONFIG_LOGICAL_CPUS==1
         // It is said that we should start core1 after all core0 launched
         start_other_cores();

diff --git a/src/mainboard/tyan/s2875/devicetree.cb b/src/mainboard/tyan/s2875/devicetree.cb
index badb881777b8f3432cd14c12a4260fefb7cee9ba..edd4f6f784c6f6ab11dd6735bbb0c489f3b31833 100644 (file)
--- a/src/mainboard/tyan/s2875/devicetree.cb
+++ b/src/mainboard/tyan/s2875/devicetree.cb
@@ -6,7 +6,7 @@ chip northbridge/amd/amdk8/root_complex
         end
        device pci_domain 0 on
                chip northbridge/amd/amdk8
         end
        device pci_domain 0 on
                chip northbridge/amd/amdk8

-                       device pci 18.0 on #  northbridge 
+                       device pci 18.0 on #  northbridge

                                #  devices on link 0, link 0 == LDT 0
                                chip southbridge/amd/amd8151
                                        # the on/off keyword is mandatory
                                #  devices on link 0, link 0 == LDT 0
                                chip southbridge/amd/amd8151
                                        # the on/off keyword is mandatory


@@ -55,7 +55,7 @@ chip northbridge/amd/amdk8/root_complex
                                                                io 0x60 = 0x220
                                                                io 0x62 = 0x300
                                                                irq 0x70 = 9
                                                                io 0x60 = 0x220
                                                                io 0x62 = 0x300
                                                                irq 0x70 = 9

-                                                       end  
+                                                       end

                                                        device pnp 2e.8 off end #  GPIO2
                                                        device pnp 2e.9 off end #  GPIO3
                                                        device pnp 2e.a off end #  ACPI
                                                        device pnp 2e.8 off end #  GPIO2
                                                        device pnp 2e.9 off end #  GPIO3
                                                        device pnp 2e.a off end #  ACPI


@@ -73,15 +73,15 @@ chip northbridge/amd/amdk8/root_complex
                                         register "ide0_enable" = "1"
                                         register "ide1_enable" = "1"
                                end
                                         register "ide0_enable" = "1"
                                         register "ide1_enable" = "1"
                                end

-                       end #  device pci 18.0 
-                       
+                       end #  device pci 18.0
+

                        device pci 18.0 on end
                        device pci 18.0 on end
                        device pci 18.0 on end
                        device pci 18.0 on end

-                       
+

                        device pci 18.1 on end
                        device pci 18.2 on end
                        device pci 18.3 on end
                end
                        device pci 18.1 on end
                        device pci 18.2 on end
                        device pci 18.3 on end
                end

-       end 
+       end

 end
 
 end
 

diff --git a/src/mainboard/tyan/s2875/irq_tables.c b/src/mainboard/tyan/s2875/irq_tables.c
index db30d686c8082477a554c1a8e78744925c6c1ec6..d08aa6ca094235bd89177fa5246fbc0046b609e3 100644 (file)
--- a/src/mainboard/tyan/s2875/irq_tables.c
+++ b/src/mainboard/tyan/s2875/irq_tables.c
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!

    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 
    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 

diff --git a/src/mainboard/tyan/s2875/mptable.c b/src/mainboard/tyan/s2875/mptable.c
index 77afde6abf4955b88f6edc4d05a8a23310f37bca..c2a7012f139e2fc12a1936b2ccc4643bc9d15061 100644 (file)
--- a/src/mainboard/tyan/s2875/mptable.c
+++ b/src/mainboard/tyan/s2875/mptable.c
@@ -28,7 +28,7 @@ static unsigned node_link_to_bus(unsigned node, unsigned link)
                 dst_node = (config_map >> 4) & 7;
                 dst_link = (config_map >> 8) & 3;
                 bus_base = (config_map >> 16) & 0xff;
                 dst_node = (config_map >> 4) & 7;
                 dst_link = (config_map >> 8) & 3;
                 bus_base = (config_map >> 16) & 0xff;

-#if 0                           
+#if 0

                 printk(BIOS_DEBUG, "node.link=bus: %d.%d=%d 0x%2x->0x%08x\n",
                         dst_node, dst_link, bus_base,
                         reg, config_map);
                 printk(BIOS_DEBUG, "node.link=bus: %d.%d=%d 0x%2x->0x%08x\n",
                         dst_node, dst_link, bus_base,
                         reg, config_map);


@@ -104,15 +104,15 @@ static void *smp_write_config_table(void *v)
                 if (dev) {
                         bus_8151_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
                         printk(BIOS_DEBUG, "bus_8151_1=%d\n",bus_8151_1);
                 if (dev) {
                         bus_8151_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
                         printk(BIOS_DEBUG, "bus_8151_1=%d\n",bus_8151_1);

-   
+

                 }
                 else {
                         printk(BIOS_DEBUG, "ERROR - could not find PCI 1:02.0, using defaults\n");
 
                         bus_8151_1 = 2;
                 }
                 }
                 else {
                         printk(BIOS_DEBUG, "ERROR - could not find PCI 1:02.0, using defaults\n");
 
                         bus_8151_1 = 2;
                 }

-  
-   
+
+

         }
 
 /*Bus:         Bus ID  Type*/
         }
 
 /*Bus:         Bus ID  Type*/


@@ -126,11 +126,11 @@ static void *smp_write_config_table(void *v)
 #if CONFIG_LOGICAL_CPUS==1
        apicid_base = get_apicid_base(1);
 #else
 #if CONFIG_LOGICAL_CPUS==1
        apicid_base = get_apicid_base(1);
 #else

-        apicid_base = CONFIG_MAX_PHYSICAL_CPUS; 
+        apicid_base = CONFIG_MAX_PHYSICAL_CPUS;

 #endif
 #endif

-        apicid_8111 = apicid_base+0; 
+        apicid_8111 = apicid_base+0;

        smp_write_ioapic(mc, apicid_8111, 0x11, 0xfec00000);
        smp_write_ioapic(mc, apicid_8111, 0x11, 0xfec00000);

-  
+

 /*I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN#
 */     smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_8111, 0x0);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x1, apicid_8111, 0x1);
 /*I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN#
 */     smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_8111, 0x0);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x1, apicid_8111, 0x1);


@@ -156,7 +156,7 @@ static void *smp_write_config_table(void *v)
 //  AGP Display Adapter
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8151_1, 0x0, apicid_8111, 0x10);
 
 //  AGP Display Adapter
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8151_1, 0x0, apicid_8111, 0x10);
 

-// Onboard Serial ATA        
+// Onboard Serial ATA

        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0x05<<2)|0, apicid_8111, 0x13);
 //Onboard Firewire
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0x0a<<2)|0, apicid_8111, 0x11);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0x05<<2)|0, apicid_8111, 0x13);
 //Onboard Firewire
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0x0a<<2)|0, apicid_8111, 0x11);

diff --git a/src/mainboard/tyan/s2875/romstage.c b/src/mainboard/tyan/s2875/romstage.c
index 274f8dc7ca1405c5fe0920067fff54580c06ec1c..ead3655fae229cb741a9a33b7fb4aed7b76fd65e 100644 (file)
--- a/src/mainboard/tyan/s2875/romstage.c
+++ b/src/mainboard/tyan/s2875/romstage.c
@@ -1,4 +1,4 @@
- 
+

 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>


@@ -135,7 +135,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         setup_default_resource_map();
 
        needs_reset = setup_coherent_ht_domain();
         setup_default_resource_map();
 
        needs_reset = setup_coherent_ht_domain();

-       
+

 #if CONFIG_LOGICAL_CPUS==1
         // It is said that we should start core1 after all core0 launched
         start_other_cores();
 #if CONFIG_LOGICAL_CPUS==1
         // It is said that we should start core1 after all core0 launched
         start_other_cores();

diff --git a/src/mainboard/tyan/s2880/devicetree.cb b/src/mainboard/tyan/s2880/devicetree.cb
index 122648e137749bd0f1f6e8704c714c3c41ebd676..97dcae866af718ef79d71d615bc7f4ca709af6f8 100644 (file)
--- a/src/mainboard/tyan/s2880/devicetree.cb
+++ b/src/mainboard/tyan/s2880/devicetree.cb
@@ -6,7 +6,7 @@ chip northbridge/amd/amdk8/root_complex
         end
        device pci_domain 0 on
                chip northbridge/amd/amdk8
         end
        device pci_domain 0 on
                chip northbridge/amd/amdk8

-                       device pci 18.0 on #  northbridge 
+                       device pci 18.0 on #  northbridge

                                #  devices on link 0, link 0 == LDT 0
                                chip southbridge/amd/amd8131
                                        # the on/off keyword is mandatory
                                #  devices on link 0, link 0 == LDT 0
                                chip southbridge/amd/amd8131
                                        # the on/off keyword is mandatory


@@ -66,7 +66,7 @@ chip northbridge/amd/amdk8/root_complex
                                                                io 0x60 = 0x220
                                                                io 0x62 = 0x300
                                                                irq 0x70 = 9
                                                                io 0x60 = 0x220
                                                                io 0x62 = 0x300
                                                                irq 0x70 = 9

-                                                       end  
+                                                       end

                                                        device pnp 2e.8 off end #  GPIO2
                                                        device pnp 2e.9 off end #  GPIO3
                                                        device pnp 2e.a off end #  ACPI
                                                        device pnp 2e.8 off end #  GPIO2
                                                        device pnp 2e.9 off end #  GPIO3
                                                        device pnp 2e.a off end #  ACPI


@@ -84,15 +84,15 @@ chip northbridge/amd/amdk8/root_complex
                                         register "ide0_enable" = "1"
                                         register "ide1_enable" = "1"
                                end
                                         register "ide0_enable" = "1"
                                         register "ide1_enable" = "1"
                                end

-                       end #  device pci 18.0 
-                       
+                       end #  device pci 18.0
+

                        device pci 18.0 on end
                        device pci 18.0 on end
                        device pci 18.0 on end
                        device pci 18.0 on end

-                       
+

                        device pci 18.1 on end
                        device pci 18.2 on end
                        device pci 18.3 on end
                end
                        device pci 18.1 on end
                        device pci 18.2 on end
                        device pci 18.3 on end
                end

-       end 
+       end

 end
 
 end
 

diff --git a/src/mainboard/tyan/s2880/irq_tables.c b/src/mainboard/tyan/s2880/irq_tables.c
index 78c12016b44e3eeb732ecfb9f39fa59505ae184f..19149df14210509397fcebedc17ac995f43206f6 100644 (file)
--- a/src/mainboard/tyan/s2880/irq_tables.c
+++ b/src/mainboard/tyan/s2880/irq_tables.c
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!

    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 
    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 


@@ -37,5 +37,5 @@ const struct irq_routing_table intel_irq_routing_table = {
 };
 unsigned long write_pirq_routing_table(unsigned long addr)
 {
 };
 unsigned long write_pirq_routing_table(unsigned long addr)
 {

-       return copy_pirq_routing_table(addr);   
+       return copy_pirq_routing_table(addr);

 }
 }

diff --git a/src/mainboard/tyan/s2880/mptable.c b/src/mainboard/tyan/s2880/mptable.c
index a8f3859d7beedb46d14913c5dec782276858b505..94a150b0319ca6240851310f4c638832ae926b14 100644 (file)
--- a/src/mainboard/tyan/s2880/mptable.c
+++ b/src/mainboard/tyan/s2880/mptable.c
@@ -29,7 +29,7 @@ static unsigned node_link_to_bus(unsigned node, unsigned link)
                 dst_node = (config_map >> 4) & 7;
                 dst_link = (config_map >> 8) & 3;
                 bus_base = (config_map >> 16) & 0xff;
                 dst_node = (config_map >> 4) & 7;
                 dst_link = (config_map >> 8) & 3;
                 bus_base = (config_map >> 16) & 0xff;

-#if 0                           
+#if 0

                 printk(BIOS_DEBUG, "node.link=bus: %d.%d=%d 0x%2x->0x%08x\n",
                         dst_node, dst_link, bus_base,
                         reg, config_map);
                 printk(BIOS_DEBUG, "node.link=bus: %d.%d=%d 0x%2x->0x%08x\n",
                         dst_node, dst_link, bus_base,
                         reg, config_map);


@@ -60,7 +60,7 @@ static void *smp_write_config_table(void *v)
         unsigned apicid_8111;
         unsigned apicid_8131_1;
         unsigned apicid_8131_2;
         unsigned apicid_8111;
         unsigned apicid_8131_1;
         unsigned apicid_8131_2;

-  
+

         mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
         memset(mc, 0, sizeof(*mc));
 
         mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
         memset(mc, 0, sizeof(*mc));
 


@@ -89,14 +89,14 @@ static void *smp_write_config_table(void *v)
                         printk(BIOS_DEBUG, "ERROR - cound not find bus for node 0 chain 0, using defaults\n");
                         bus_chain_0 = 1;
                 }
                         printk(BIOS_DEBUG, "ERROR - cound not find bus for node 0 chain 0, using defaults\n");
                         bus_chain_0 = 1;
                 }

-                
+

                 /* 8111 */
                 dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x03,0));
                 if (dev) {
                         bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
                         bus_isa    = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
                 /* 8111 */
                 dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x03,0));
                 if (dev) {
                         bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
                         bus_isa    = pci_read_config8(dev, PCI_SUBORDINATE_BUS);

-                        bus_isa++; 
-                }       
+                        bus_isa++;
+                }

                 else {
                         printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
 
                 else {
                         printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
 


@@ -134,14 +134,14 @@ static void *smp_write_config_table(void *v)
         }
         smp_write_bus(mc, bus_isa, "ISA   ");
 
         }
         smp_write_bus(mc, bus_isa, "ISA   ");
 

-       
+

 /*I/O APICs:   APIC ID Version State           Address*/
 #if CONFIG_LOGICAL_CPUS==1
        apicid_base = get_apicid_base(3);
 #else
 /*I/O APICs:   APIC ID Version State           Address*/
 #if CONFIG_LOGICAL_CPUS==1
        apicid_base = get_apicid_base(3);
 #else

-        apicid_base = CONFIG_MAX_PHYSICAL_CPUS; 
+        apicid_base = CONFIG_MAX_PHYSICAL_CPUS;

 #endif
 #endif

-        apicid_8111 = apicid_base+0; 
+        apicid_8111 = apicid_base+0;

         apicid_8131_1 = apicid_base+1;
         apicid_8131_2 = apicid_base+2;
        smp_write_ioapic(mc, apicid_8111, 0x11, 0xfec00000);
         apicid_8131_1 = apicid_base+1;
         apicid_8131_2 = apicid_base+2;
        smp_write_ioapic(mc, apicid_8111, 0x11, 0xfec00000);


@@ -165,7 +165,7 @@ static void *smp_write_config_table(void *v)
                 }
 
        }
                 }
 
        }

-  
+

 /*I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN#
 */     smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_8111, 0x0);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x1, apicid_8111, 0x1);
 /*I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN#
 */     smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_8111, 0x0);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x1, apicid_8111, 0x1);


@@ -179,7 +179,7 @@ static void *smp_write_config_table(void *v)
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xd, apicid_8111, 0xd);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xe, apicid_8111, 0xe);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xf, apicid_8111, 0xf);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xd, apicid_8111, 0xd);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xe, apicid_8111, 0xe);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xf, apicid_8111, 0xf);

-       
+

 
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_chain_0, (4<<2)|0, apicid_8111, 0x13);
 
 
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_chain_0, (4<<2)|0, apicid_8111, 0x13);
 


@@ -205,7 +205,7 @@ static void *smp_write_config_table(void *v)
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (8<<2)|2, apicid_8131_1, 0x1);//
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (8<<2)|3, apicid_8131_1, 0x2);//
 
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (8<<2)|2, apicid_8131_1, 0x1);//
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (8<<2)|3, apicid_8131_1, 0x2);//
 

-//Slot 4 PCIX 100/66        
+//Slot 4 PCIX 100/66

        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (7<<2)|0, apicid_8131_1, 0x2);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (7<<2)|1, apicid_8131_1, 0x3);//
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (7<<2)|2, apicid_8131_1, 0x0);//
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (7<<2)|0, apicid_8131_1, 0x2);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (7<<2)|1, apicid_8131_1, 0x3);//
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (7<<2)|2, apicid_8131_1, 0x0);//

diff --git a/src/mainboard/tyan/s2880/romstage.c b/src/mainboard/tyan/s2880/romstage.c
index 7c0e4f2a2c1ad4aa16edc859c4130d5ce6493b9a..f75c541b9c856104f5c8a9d7af42f65818a379a7 100644 (file)
--- a/src/mainboard/tyan/s2880/romstage.c
+++ b/src/mainboard/tyan/s2880/romstage.c
@@ -1,4 +1,4 @@
- 
+

 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>


@@ -125,7 +125,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
                init_cpus(cpu_init_detectedx);
         }
 
                init_cpus(cpu_init_detectedx);
         }
 

-       
+

        w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
         uart_init();
         console_init();
        w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
         uart_init();
         console_init();


@@ -136,7 +136,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         setup_default_resource_map();
 
        needs_reset = setup_coherent_ht_domain();
         setup_default_resource_map();
 
        needs_reset = setup_coherent_ht_domain();

-       
+

 #if CONFIG_LOGICAL_CPUS==1
         // It is said that we should start core1 after all core0 launched
         start_other_cores();
 #if CONFIG_LOGICAL_CPUS==1
         // It is said that we should start core1 after all core0 launched
         start_other_cores();

diff --git a/src/mainboard/tyan/s2881/devicetree.cb b/src/mainboard/tyan/s2881/devicetree.cb
index 3c1f5bc276ee02d7a657fc40651c241b18be6df1..47b5d3777523b4ec66f7db4947b51191670111d1 100644 (file)
--- a/src/mainboard/tyan/s2881/devicetree.cb
+++ b/src/mainboard/tyan/s2881/devicetree.cb
@@ -8,11 +8,11 @@ chip northbridge/amd/amdk8/root_complex
                chip northbridge/amd/amdk8
                        device pci 18.0 on end # LDT0
                        device pci 18.0 on end # LDT1
                chip northbridge/amd/amdk8
                        device pci 18.0 on end # LDT0
                        device pci 18.0 on end # LDT1

-                       device pci 18.0 on #  northbridge 
+                       device pci 18.0 on #  northbridge

                                #  devices on link 2, link 2 == LDT 2
                                chip southbridge/amd/amd8131
                                        # the on/off keyword is mandatory
                                #  devices on link 2, link 2 == LDT 2
                                chip southbridge/amd/amd8131
                                        # the on/off keyword is mandatory

-                                       device pci 0.0 on 
+                                       device pci 0.0 on

                                                 device pci 9.0 on end # Broadcom 5704
                                                 device pci 9.1 on end
                                                 device pci a.0 on end # Adaptic
                                                 device pci 9.0 on end # Broadcom 5704
                                                 device pci 9.1 on end
                                                 device pci a.0 on end # Adaptic


@@ -65,7 +65,7 @@ chip northbridge/amd/amdk8/root_complex
                                                                io 0x60 = 0x220
                                                                io 0x62 = 0x300
                                                                irq 0x70 = 9
                                                                io 0x60 = 0x220
                                                                io 0x62 = 0x300
                                                                irq 0x70 = 9

-                                                       end  
+                                                       end

                                                        device pnp 2e.8 off end #  GPIO2
                                                        device pnp 2e.9 off end #  GPIO3
                                                        device pnp 2e.a off end #  ACPI
                                                        device pnp 2e.8 off end #  GPIO2
                                                        device pnp 2e.9 off end #  GPIO3
                                                        device pnp 2e.a off end #  ACPI


@@ -77,13 +77,13 @@ chip northbridge/amd/amdk8/root_complex
                                        end
                                        device pci 1.1 on end
                                        device pci 1.2 on end
                                        end
                                        device pci 1.1 on end
                                        device pci 1.2 on end

-                                        device pci 1.3 on 
+                                        device pci 1.3 on

                                                 chip drivers/generic/generic #dimm 0-0-0
                                                         device i2c 50 on end
                                                 end
                                                 chip drivers/generic/generic #dimm 0-0-1
                                                         device i2c 51 on end
                                                 chip drivers/generic/generic #dimm 0-0-0
                                                         device i2c 50 on end
                                                 end
                                                 chip drivers/generic/generic #dimm 0-0-1
                                                         device i2c 51 on end

-                                                end     
+                                                end

                                                 chip drivers/generic/generic #dimm 0-1-0
                                                         device i2c 52 on end
                                                 end
                                                 chip drivers/generic/generic #dimm 0-1-0
                                                         device i2c 52 on end
                                                 end


@@ -120,12 +120,12 @@ chip northbridge/amd/amdk8/root_complex
                                         register "ide0_enable" = "1"
                                         register "ide1_enable" = "1"
                                end
                                         register "ide0_enable" = "1"
                                         register "ide1_enable" = "1"
                                end

-                       end #  device pci 18.0 
-                       
+                       end #  device pci 18.0
+

                        device pci 18.1 on end
                        device pci 18.2 on end
                        device pci 18.3 on end
                end
                        device pci 18.1 on end
                        device pci 18.2 on end
                        device pci 18.3 on end
                end

-       end 
+       end

 end
 
 end
 

diff --git a/src/mainboard/tyan/s2881/get_bus_conf.c b/src/mainboard/tyan/s2881/get_bus_conf.c
index 758e3d809d567da7021e2487371c337e0611577c..562ba935d81f2722f429734314ae3487101338d6 100644 (file)
--- a/src/mainboard/tyan/s2881/get_bus_conf.c
+++ b/src/mainboard/tyan/s2881/get_bus_conf.c
@@ -23,7 +23,7 @@ unsigned apicid_8111 ;
 unsigned apicid_8131_1;
 unsigned apicid_8131_2;
 
 unsigned apicid_8131_1;
 unsigned apicid_8131_2;
 

-unsigned pci1234x[] = 
+unsigned pci1234x[] =

 {        //Here you only need to set value in pci1234 for HT-IO that could be installed or not
         //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
         0x0000ff0,
 {        //Here you only need to set value in pci1234 for HT-IO that could be installed or not
         //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
         0x0000ff0,


@@ -35,7 +35,7 @@ unsigned pci1234x[] =
 //        0x0000ff0,
 //        0x0000ff0
 };
 //        0x0000ff0,
 //        0x0000ff0
 };

-unsigned hcdnx[] = 
+unsigned hcdnx[] =

 { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
        0x20202020,
 //     0x20202020,
 { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
        0x20202020,
 //     0x20202020,


@@ -71,7 +71,7 @@ void get_bus_conf(void)
         }
 
         get_sblk_pci1234();
         }
 
         get_sblk_pci1234();

-       
+

        sysconf.sbdn = (sysconf.hcdn[0] >> 8) & 0xff;
        sbdn3 = sysconf.hcdn[0] & 0xff;
 
        sysconf.sbdn = (sysconf.hcdn[0] >> 8) & 0xff;
        sbdn3 = sysconf.hcdn[0] & 0xff;
 


@@ -119,8 +119,8 @@ void get_bus_conf(void)
 /*I/O APICs:   APIC ID Version State           Address*/
 #if CONFIG_LOGICAL_CPUS==1
        apicid_base = get_apicid_base(3);
 /*I/O APICs:   APIC ID Version State           Address*/
 #if CONFIG_LOGICAL_CPUS==1
        apicid_base = get_apicid_base(3);

-#else 
-       apicid_base = CONFIG_MAX_PHYSICAL_CPUS; 
+#else
+       apicid_base = CONFIG_MAX_PHYSICAL_CPUS;

 #endif
        apicid_8111 = apicid_base+0;
        apicid_8131_1 = apicid_base+1;
 #endif
        apicid_8111 = apicid_base+0;
        apicid_8131_1 = apicid_base+1;

diff --git a/src/mainboard/tyan/s2881/irq_tables.c b/src/mainboard/tyan/s2881/irq_tables.c
index af66ba9730e8d62b29a0e9c88e7e929cb0d62f0b..b53a9923a79ceb9ff8963a9ffefcb52dd2c249a8 100644 (file)
--- a/src/mainboard/tyan/s2881/irq_tables.c
+++ b/src/mainboard/tyan/s2881/irq_tables.c
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!

    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 
    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 


@@ -12,11 +12,11 @@
 
 #include <cpu/amd/amdk8_sysconf.h>
 
 
 #include <cpu/amd/amdk8_sysconf.h>
 

-static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0, 
+static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,

                uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
                uint8_t slot, uint8_t rfu)
 {
                uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
                uint8_t slot, uint8_t rfu)
 {

-        pirq_info->bus = bus; 
+        pirq_info->bus = bus;

         pirq_info->devfn = devfn;
                 pirq_info->irq[0].link = link0;
                 pirq_info->irq[0].bitmap = bitmap0;
         pirq_info->devfn = devfn;
                 pirq_info->irq[0].link = link0;
                 pirq_info->irq[0].bitmap = bitmap0;


@@ -62,22 +62,22 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 
        pirq = (void *)(addr);
        v = (uint8_t *)(addr);
 
        pirq = (void *)(addr);
        v = (uint8_t *)(addr);

-       
+

        pirq->signature = PIRQ_SIGNATURE;
        pirq->version  = PIRQ_VERSION;
        pirq->signature = PIRQ_SIGNATURE;
        pirq->version  = PIRQ_VERSION;

-       
+

        pirq->rtr_bus = bus_8111_0;
        pirq->rtr_devfn = ((sysconf.sbdn+1)<<3)|0;
 
        pirq->exclusive_irqs = 0;
        pirq->rtr_bus = bus_8111_0;
        pirq->rtr_devfn = ((sysconf.sbdn+1)<<3)|0;
 
        pirq->exclusive_irqs = 0;

-       
+

        pirq->rtr_vendor = 0x1022;
        pirq->rtr_device = 0x746b;
 
        pirq->miniport_data = 0;
 
        memset(pirq->rfu, 0, sizeof(pirq->rfu));
        pirq->rtr_vendor = 0x1022;
        pirq->rtr_device = 0x746b;
 
        pirq->miniport_data = 0;
 
        memset(pirq->rfu, 0, sizeof(pirq->rfu));

-       
+

        pirq_info = (void *) ( &pirq->checksum + 1);
        slot_num = 0;
 //pci bridge
        pirq_info = (void *) ( &pirq->checksum + 1);
        slot_num = 0;
 //pci bridge


@@ -88,11 +88,11 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 //        pirq_info++; slot_num++;
 
         pirq_info++; slot_num++;
 //        pirq_info++; slot_num++;
 
         pirq_info++; slot_num++;

-             
-       pirq->size = 32 + 16 * slot_num; 
+
+       pirq->size = 32 + 16 * slot_num;

 
         for (i = 0; i < pirq->size; i++)
 
         for (i = 0; i < pirq->size; i++)

-                sum += v[i];   
+                sum += v[i];

 
        sum = pirq->checksum - sum;
 
 
        sum = pirq->checksum - sum;
 

diff --git a/src/mainboard/tyan/s2881/mainboard.c b/src/mainboard/tyan/s2881/mainboard.c
index 5866577ce4429359fadc172d99ea9192ee1ae3ff..773f2540a4d2b3947e42fab9e84c26984130791d 100644 (file)
--- a/src/mainboard/tyan/s2881/mainboard.c
+++ b/src/mainboard/tyan/s2881/mainboard.c
@@ -59,7 +59,7 @@ static void adt7463_init(device_t dev)
        result = smbus_write_byte(adt7463, 0x5e, 0xc2);
 
        /* Make sure that our fans never stop when temp. falls below Tmin,
        result = smbus_write_byte(adt7463, 0x5e, 0xc2);
 
        /* Make sure that our fans never stop when temp. falls below Tmin,

-        * but rather keep going at minimum duty cycle (applies to automatic 
+        * but rather keep going at minimum duty cycle (applies to automatic

         * fan control mode only).
         */
        result = smbus_write_byte(adt7463, 0x62, 0xc0);
         * fan control mode only).
         */
        result = smbus_write_byte(adt7463, 0x62, 0xc0);

diff --git a/src/mainboard/tyan/s2881/mptable.c b/src/mainboard/tyan/s2881/mptable.c
index ca75c51a93ba65e8202b2d3e6682b8148a497003..a51384c6419c522e3ddba8f2621aa585e39b3ad9 100644 (file)
--- a/src/mainboard/tyan/s2881/mptable.c
+++ b/src/mainboard/tyan/s2881/mptable.c
@@ -30,7 +30,7 @@ static void *smp_write_config_table(void *v)
         unsigned char bus_num;
 
        int i;
         unsigned char bus_num;
 
        int i;

-  
+

         mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
         memset(mc, 0, sizeof(*mc));
 
         mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
         memset(mc, 0, sizeof(*mc));
 


@@ -51,7 +51,7 @@ static void *smp_write_config_table(void *v)
         smp_write_processors(mc);
 
        get_bus_conf();
         smp_write_processors(mc);
 
        get_bus_conf();

-       
+

 
 /*Bus:          Bus ID  Type*/
         /* define bus and isa numbers */
 
 /*Bus:          Bus ID  Type*/
         /* define bus and isa numbers */


@@ -60,7 +60,7 @@ static void *smp_write_config_table(void *v)
         }
         smp_write_bus(mc, bus_isa, "ISA   ");
 
         }
         smp_write_bus(mc, bus_isa, "ISA   ");
 

-       
+

 /*I/O APICs:   APIC ID Version State           Address*/
        smp_write_ioapic(mc, apicid_8111, 0x11, 0xfec00000);
         {
 /*I/O APICs:   APIC ID Version State           Address*/
        smp_write_ioapic(mc, apicid_8111, 0x11, 0xfec00000);
         {


@@ -82,7 +82,7 @@ static void *smp_write_config_table(void *v)
                 }
 
        }
                 }
 
        }

-  
+

 /*I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN#
 */     smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_8111, 0x0);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x1, apicid_8111, 0x1);
 /*I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN#
 */     smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_8111, 0x0);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x1, apicid_8111, 0x1);


@@ -96,7 +96,7 @@ static void *smp_write_config_table(void *v)
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xd, apicid_8111, 0xd);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xe, apicid_8111, 0xe);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xf, apicid_8111, 0xf);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xd, apicid_8111, 0xd);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xe, apicid_8111, 0xe);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xf, apicid_8111, 0xf);

-       
+

 //8111 LPC ????
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_0, ((sysconf.sbdn+1)<<2)|0, apicid_8111, 0x13);
 
 //8111 LPC ????
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_0, ((sysconf.sbdn+1)<<2)|0, apicid_8111, 0x13);
 

diff --git a/src/mainboard/tyan/s2881/resourcemap.c b/src/mainboard/tyan/s2881/resourcemap.c
index cecb79079562fcb778581e5f385d29816c041fe3..23ab936a5bcf31693f4abc574c8f9452a38df135 100644 (file)
--- a/src/mainboard/tyan/s2881/resourcemap.c
+++ b/src/mainboard/tyan/s2881/resourcemap.c
@@ -144,7 +144,7 @@ static void setup_s2881_resource_map(void)
         *         1 = base/limit registers i are read-only
         * [ 7: 4] Reserved
         * [31: 8] Memory-Mapped I/O Base Address i (39-16)
         *         1 = base/limit registers i are read-only
         * [ 7: 4] Reserved
         * [31: 8] Memory-Mapped I/O Base Address i (39-16)

-        *         This field defines the upper address bits of a 40bit address 
+        *         This field defines the upper address bits of a 40bit address

         *         that defines the start of memory-mapped I/O region i
         */
        PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,
         *         that defines the start of memory-mapped I/O region i
         */
        PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,


@@ -200,7 +200,7 @@ static void setup_s2881_resource_map(void)
         * [ 3: 2] Reserved
         * [ 4: 4] VGA Enable
         *         0 = VGA matches Disabled
         * [ 3: 2] Reserved
         * [ 4: 4] VGA Enable
         *         0 = VGA matches Disabled

-        *         1 = matches all address < 64K and where A[9:0] is in the 
+        *         1 = matches all address < 64K and where A[9:0] is in the

         *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
         * [ 5: 5] ISA Enable
         *         0 = ISA matches Disabled
         *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
         * [ 5: 5] ISA Enable
         *         0 = ISA matches Disabled


@@ -208,7 +208,7 @@ static void setup_s2881_resource_map(void)
         *             from matching agains this base/limit pair
         * [11: 6] Reserved
         * [24:12] PCI I/O Base i
         *             from matching agains this base/limit pair
         * [11: 6] Reserved
         * [24:12] PCI I/O Base i

-        *         This field defines the start of PCI I/O region n 
+        *         This field defines the start of PCI I/O region n

         * [31:25] Reserved
         */
        PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000003,
         * [31:25] Reserved
         */
        PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000003,

diff --git a/src/mainboard/tyan/s2881/romstage.c b/src/mainboard/tyan/s2881/romstage.c
index 1310c8e99bbc4cf73534123bb0b79ee6d4e8aad2..0a63486ffb15c9afc796bd00947232d8db95ee0b 100644 (file)
--- a/src/mainboard/tyan/s2881/romstage.c
+++ b/src/mainboard/tyan/s2881/romstage.c
@@ -3,7 +3,7 @@
 #if CONFIG_LOGICAL_CPUS==1
 #define SET_NB_CFG_54 1
 #endif
 #if CONFIG_LOGICAL_CPUS==1
 #define SET_NB_CFG_54 1
 #endif

- 
+

 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>


@@ -117,7 +117,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         }
 
 //     post_code(0x32);
         }
 
 //     post_code(0x32);

-       
+

        w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
         uart_init();
         console_init();
        w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
         uart_init();
         console_init();

diff --git a/src/mainboard/tyan/s2882/devicetree.cb b/src/mainboard/tyan/s2882/devicetree.cb
index d563232b2dbd057421779c12a53af95b476019a8..b8cbce28589b1a937092e53d489f64988134877a 100644 (file)
--- a/src/mainboard/tyan/s2882/devicetree.cb
+++ b/src/mainboard/tyan/s2882/devicetree.cb
@@ -7,7 +7,7 @@ chip northbridge/amd/amdk8/root_complex
 
        device pci_domain 0 on
                chip northbridge/amd/amdk8
 
        device pci_domain 0 on
                chip northbridge/amd/amdk8

-                       device pci 18.0 on #  northbridge 
+                       device pci 18.0 on #  northbridge

                                #  devices on link 0, link 0 == LDT 0
                                chip southbridge/amd/amd8131
                                        # the on/off keyword is mandatory
                                #  devices on link 0, link 0 == LDT 0
                                chip southbridge/amd/amd8131
                                        # the on/off keyword is mandatory


@@ -67,7 +67,7 @@ chip northbridge/amd/amdk8/root_complex
                                                                io 0x60 = 0x220
                                                                io 0x62 = 0x300
                                                                irq 0x70 = 9
                                                                io 0x60 = 0x220
                                                                io 0x62 = 0x300
                                                                irq 0x70 = 9

-                                                       end  
+                                                       end

                                                        device pnp 2e.8 off end #  GPIO2
                                                        device pnp 2e.9 off end #  GPIO3
                                                        device pnp 2e.a off end #  ACPI
                                                        device pnp 2e.8 off end #  GPIO2
                                                        device pnp 2e.9 off end #  GPIO3
                                                        device pnp 2e.a off end #  ACPI


@@ -80,13 +80,13 @@ chip northbridge/amd/amdk8/root_complex
                                        device pci 1.1 on end
                                        device pci 1.2 on end
                                        device pci 1.3 on end
                                        device pci 1.1 on end
                                        device pci 1.2 on end
                                        device pci 1.3 on end

-                                       device pci 1.3 on 
+                                       device pci 1.3 on

 #                                               chip drivers/generic/generic #dimm 0-0-0
 #                                                       device i2c 50 on end
 #                                               end
 #                                               chip drivers/generic/generic #dimm 0-0-1
 #                                                       device i2c 51 on end
 #                                               chip drivers/generic/generic #dimm 0-0-0
 #                                                       device i2c 50 on end
 #                                               end
 #                                               chip drivers/generic/generic #dimm 0-0-1
 #                                                       device i2c 51 on end

-#                                               end     
+#                                               end

 #                                               chip drivers/generic/generic #dimm 0-1-0
 #                                                       device i2c 52 on end
 #                                               end
 #                                               chip drivers/generic/generic #dimm 0-1-0
 #                                                       device i2c 52 on end
 #                                               end


@@ -111,11 +111,11 @@ chip northbridge/amd/amdk8/root_complex
                                        register "ide0_enable" = "1"
                                        register "ide1_enable" = "1"
                                end
                                        register "ide0_enable" = "1"
                                        register "ide1_enable" = "1"
                                end

-                       end #  device pci 18.0 
-                       
+                       end #  device pci 18.0
+

                        device pci 18.0 on end
                        device pci 18.0 on end
                        device pci 18.0 on end
                        device pci 18.0 on end

-                       
+

                        device pci 18.1 on end
                        device pci 18.2 on end
                        device pci 18.3 on end
                        device pci 18.1 on end
                        device pci 18.2 on end
                        device pci 18.3 on end

diff --git a/src/mainboard/tyan/s2882/irq_tables.c b/src/mainboard/tyan/s2882/irq_tables.c
index 3107ac8a8760565f5a9d25d86b7c922fb2423292..4ddd63eecb78e270f0ce1511e3df211ccc787092 100644 (file)
--- a/src/mainboard/tyan/s2882/irq_tables.c
+++ b/src/mainboard/tyan/s2882/irq_tables.c
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!

    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 
    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 


@@ -63,7 +63,7 @@ static unsigned node_link_to_bus(unsigned node, unsigned link)
                 dst_node = (config_map >> 4) & 7;
                 dst_link = (config_map >> 8) & 3;
                 bus_base = (config_map >> 16) & 0xff;
                 dst_node = (config_map >> 4) & 7;
                 dst_link = (config_map >> 8) & 3;
                 bus_base = (config_map >> 16) & 0xff;

-#if 0                           
+#if 0

                 printk(BIOS_DEBUG, "node.link=bus: %d.%d=%d 0x%2x->0x%08x\n",
                         dst_node, dst_link, bus_base,
                         reg, config_map);
                 printk(BIOS_DEBUG, "node.link=bus: %d.%d=%d 0x%2x->0x%08x\n",
                         dst_node, dst_link, bus_base,
                         reg, config_map);


@@ -76,11 +76,11 @@ static unsigned node_link_to_bus(unsigned node, unsigned link)
         return 0;
 }
 
         return 0;
 }
 

-static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0, 
+static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,

                uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
                uint8_t slot, uint8_t rfu)
 {
                uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
                uint8_t slot, uint8_t rfu)
 {

-        pirq_info->bus = bus; 
+        pirq_info->bus = bus;

         pirq_info->devfn = devfn;
                 pirq_info->irq[0].link = link0;
                 pirq_info->irq[0].bitmap = bitmap0;
         pirq_info->devfn = devfn;
                 pirq_info->irq[0].link = link0;
                 pirq_info->irq[0].bitmap = bitmap0;


@@ -162,15 +162,15 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 
        pirq = (void *)(addr);
        v = (uint8_t *)(addr);
 
        pirq = (void *)(addr);
        v = (uint8_t *)(addr);

-       
+

        pirq->signature = PIRQ_SIGNATURE;
        pirq->version  = PIRQ_VERSION;
        pirq->signature = PIRQ_SIGNATURE;
        pirq->version  = PIRQ_VERSION;

-       
+

        pirq->rtr_bus = bus_chain_0;
        pirq->rtr_devfn = (4<<3)|3;
 
        pirq->exclusive_irqs = 0;
        pirq->rtr_bus = bus_chain_0;
        pirq->rtr_devfn = (4<<3)|3;
 
        pirq->exclusive_irqs = 0;

-       
+

        pirq->rtr_vendor = 0x1022;
        pirq->rtr_device = 0x746b;
 
        pirq->rtr_vendor = 0x1022;
        pirq->rtr_device = 0x746b;
 


@@ -186,7 +186,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
                 dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x04,3));
                 if (dev) {
                         /* initialize PCI interupts - these assignments depend
                 dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x04,3));
                 if (dev) {
                         /* initialize PCI interupts - these assignments depend

-                        on the PCB routing of PINTA-D 
+                        on the PCB routing of PINTA-D

 
                         PINTA = IRQ5
                         PINTB = IRQ9
 
                         PINTA = IRQ5
                         PINTB = IRQ9


@@ -202,7 +202,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
         pci_assign_irqs(bus_chain_0, 4, slotIrqs_1_4);
         write_pirq_info(pirq_info, bus_chain_0,(4<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
        pirq_info++; slot_num++;
         pci_assign_irqs(bus_chain_0, 4, slotIrqs_1_4);
         write_pirq_info(pirq_info, bus_chain_0,(4<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
        pirq_info++; slot_num++;

-       
+

         printk(BIOS_DEBUG, "setting Onboard AMD USB \n");
         static const unsigned char slotIrqs_8111_1_0[4] = { 0, 0, 0, 10 };
         pci_assign_irqs(bus_8111_1, 0, slotIrqs_8111_1_0);
         printk(BIOS_DEBUG, "setting Onboard AMD USB \n");
         static const unsigned char slotIrqs_8111_1_0[4] = { 0, 0, 0, 10 };
         pci_assign_irqs(bus_8111_1, 0, slotIrqs_8111_1_0);


@@ -279,16 +279,16 @@ unsigned long write_pirq_routing_table(unsigned long addr)
        pirq_info++; slot_num++;
 #endif
 
        pirq_info++; slot_num++;
 #endif
 

-#if 0  
+#if 0

        //?? what's this?
         write_pirq_info(pirq_info, bus_8131_2,(5<<3)|0, 0x3, 0xdef8, 0x4, 0xdef8, 0x1, 0xdef8, 0x2, 0xdef8, 0x7, 0);
        pirq_info++; slot_num++;
 #endif
        //?? what's this?
         write_pirq_info(pirq_info, bus_8131_2,(5<<3)|0, 0x3, 0xdef8, 0x4, 0xdef8, 0x1, 0xdef8, 0x2, 0xdef8, 0x7, 0);
        pirq_info++; slot_num++;
 #endif

-                
-       pirq->size = 32 + 16 * slot_num; 
+
+       pirq->size = 32 + 16 * slot_num;

 
         for (i = 0; i < pirq->size; i++)
 
         for (i = 0; i < pirq->size; i++)

-                sum += v[i];   
+                sum += v[i];

 
        sum = pirq->checksum - sum;
 
 
        sum = pirq->checksum - sum;
 

diff --git a/src/mainboard/tyan/s2882/mptable.c b/src/mainboard/tyan/s2882/mptable.c
index f1d7a27179b9701b10c06653520a9eda863f07ff..43ccef62761d79bcfac7e4d061fa6b73250951ea 100644 (file)
--- a/src/mainboard/tyan/s2882/mptable.c
+++ b/src/mainboard/tyan/s2882/mptable.c
@@ -30,7 +30,7 @@ static unsigned node_link_to_bus(unsigned node, unsigned link)
                 dst_node = (config_map >> 4) & 7;
                 dst_link = (config_map >> 8) & 3;
                 bus_base = (config_map >> 16) & 0xff;
                 dst_node = (config_map >> 4) & 7;
                 dst_link = (config_map >> 8) & 3;
                 bus_base = (config_map >> 16) & 0xff;

-#if 0                           
+#if 0

                 printk(BIOS_DEBUG, "node.link=bus: %d.%d=%d 0x%2x->0x%08x\n",
                         dst_node, dst_link, bus_base,
                         reg, config_map);
                 printk(BIOS_DEBUG, "node.link=bus: %d.%d=%d 0x%2x->0x%08x\n",
                         dst_node, dst_link, bus_base,
                         reg, config_map);


@@ -60,7 +60,7 @@ static void *smp_write_config_table(void *v)
         unsigned apicid_8111;
         unsigned apicid_8131_1;
         unsigned apicid_8131_2;
         unsigned apicid_8111;
         unsigned apicid_8131_1;
         unsigned apicid_8131_2;

-        
+

        mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
         memset(mc, 0, sizeof(*mc));
 
        mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
         memset(mc, 0, sizeof(*mc));
 


@@ -95,8 +95,8 @@ static void *smp_write_config_table(void *v)
                         bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
                         bus_isa    = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
                         bus_isa++;
                         bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
                         bus_isa    = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
                         bus_isa++;

-                }     
-                else {  
+                }
+                else {

                         printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
 
                         bus_8111_1 = 4;
                         printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
 
                         bus_8111_1 = 4;


@@ -137,9 +137,9 @@ static void *smp_write_config_table(void *v)
 #if CONFIG_LOGICAL_CPUS==1
        apicid_base = get_apicid_base(3);
 #else
 #if CONFIG_LOGICAL_CPUS==1
        apicid_base = get_apicid_base(3);
 #else

-        apicid_base = CONFIG_MAX_PHYSICAL_CPUS; 
+        apicid_base = CONFIG_MAX_PHYSICAL_CPUS;

 #endif
 #endif

-        apicid_8111 = apicid_base+0; 
+        apicid_8111 = apicid_base+0;

         apicid_8131_1 = apicid_base+1;
         apicid_8131_2 = apicid_base+2;
 
         apicid_8131_1 = apicid_base+1;
         apicid_8131_2 = apicid_base+2;
 


@@ -163,7 +163,7 @@ static void *smp_write_config_table(void *v)
                 }
 
        }
                 }
 
        }

-  
+

 /*I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN# */
         smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_8111, 0x0);
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x1, apicid_8111, 0x1);
 /*I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN# */
         smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_8111, 0x0);
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x1, apicid_8111, 0x1);


@@ -180,7 +180,7 @@ static void *smp_write_config_table(void *v)
 
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_chain_0, (4<<2)|3, apicid_8111, 0x13);
 
 
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_chain_0, (4<<2)|3, apicid_8111, 0x13);
 

-       
+

 //On Board AMD USB
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0<<2)|3, apicid_8111, 0x13);
 
 //On Board AMD USB
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0<<2)|3, apicid_8111, 0x13);
 


@@ -209,7 +209,7 @@ static void *smp_write_config_table(void *v)
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (3<<2)|2, apicid_8131_1, 0x1);//
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (3<<2)|3, apicid_8131_1, 0x2);//
 
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (3<<2)|2, apicid_8131_1, 0x1);//
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (3<<2)|3, apicid_8131_1, 0x2);//
 

-//Slot 4 PCIX 100/66        
+//Slot 4 PCIX 100/66

         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (2<<2)|0, apicid_8131_1, 0x2);
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (2<<2)|1, apicid_8131_1, 0x3);//
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (2<<2)|2, apicid_8131_1, 0x0);//
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (2<<2)|0, apicid_8131_1, 0x2);
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (2<<2)|1, apicid_8131_1, 0x3);//
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (2<<2)|2, apicid_8131_1, 0x0);//

diff --git a/src/mainboard/tyan/s2882/romstage.c b/src/mainboard/tyan/s2882/romstage.c
index c49dff9f100c2f0d294ba889f88373e07f484692..d8816d4cff96988634f63ee32984b30ee9cff3c2 100644 (file)
--- a/src/mainboard/tyan/s2882/romstage.c
+++ b/src/mainboard/tyan/s2882/romstage.c
@@ -1,4 +1,4 @@
- 
+

 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>


@@ -129,7 +129,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
                init_cpus(cpu_init_detectedx);
         }
 
                init_cpus(cpu_init_detectedx);
         }
 

-       
+

        w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
         uart_init();
         console_init();
        w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
         uart_init();
         console_init();


@@ -140,7 +140,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         setup_default_resource_map();
 
        needs_reset = setup_coherent_ht_domain();
         setup_default_resource_map();
 
        needs_reset = setup_coherent_ht_domain();

-       
+

 #if CONFIG_LOGICAL_CPUS==1
         // It is said that we should start core1 after all core0 launched
         start_other_cores();
 #if CONFIG_LOGICAL_CPUS==1
         // It is said that we should start core1 after all core0 launched
         start_other_cores();

diff --git a/src/mainboard/tyan/s2885/devicetree.cb b/src/mainboard/tyan/s2885/devicetree.cb
index f8dc2215d98fd2e7aee4e3159900f004e72f6dce..7cdc728fbb2cb5d4715b1109e6baf137b8e325e0 100644 (file)
--- a/src/mainboard/tyan/s2885/devicetree.cb
+++ b/src/mainboard/tyan/s2885/devicetree.cb
@@ -14,11 +14,11 @@ chip northbridge/amd/amdk8/root_complex
                                end
                        end
                        device pci 18.0 on end # LDT1
                                end
                        end
                        device pci 18.0 on end # LDT1

-                       device pci 18.0 on #  northbridge 
+                       device pci 18.0 on #  northbridge

                                #  devices on link 2, link 2 == LDT 2
                                chip southbridge/amd/amd8131
                                        # the on/off keyword is mandatory
                                #  devices on link 2, link 2 == LDT 2
                                chip southbridge/amd/amd8131
                                        # the on/off keyword is mandatory

-                                       device pci 0.0 on 
+                                       device pci 0.0 on

                                                 device pci 9.0 on end # broadcom 5703
                                        end
                                        device pci 0.1 on end
                                                 device pci 9.0 on end # broadcom 5703
                                        end
                                        device pci 0.1 on end


@@ -67,7 +67,7 @@ chip northbridge/amd/amdk8/root_complex
                                                                io 0x60 = 0x220
                                                                io 0x62 = 0x300
                                                                irq 0x70 = 9
                                                                io 0x60 = 0x220
                                                                io 0x62 = 0x300
                                                                irq 0x70 = 9

-                                                       end                                             
+                                                       end

                                                        device pnp 2e.8 off end #  GPIO2
                                                        device pnp 2e.9 off end #  GPIO3
                                                        device pnp 2e.a off end #  ACPI
                                                        device pnp 2e.8 off end #  GPIO2
                                                        device pnp 2e.9 off end #  GPIO3
                                                        device pnp 2e.a off end #  ACPI


@@ -82,36 +82,36 @@ chip northbridge/amd/amdk8/root_complex
                                        device pci 1.3 on
                                                 chip drivers/generic/generic #dimm 0-0-0
                                                         device i2c 50 on end
                                        device pci 1.3 on
                                                 chip drivers/generic/generic #dimm 0-0-0
                                                         device i2c 50 on end

-                                                end              
+                                                end

                                                 chip drivers/generic/generic #dimm 0-0-1
                                                         device i2c 51 on end
                                                 chip drivers/generic/generic #dimm 0-0-1
                                                         device i2c 51 on end

-                                                end     
+                                                end

                                                 chip drivers/generic/generic #dimm 0-1-0
                                                         device i2c 52 on end
                                                 chip drivers/generic/generic #dimm 0-1-0
                                                         device i2c 52 on end

-                                                end             
+                                                end

                                                 chip drivers/generic/generic #dimm 0-1-1
                                                         device i2c 53 on end
                                                 chip drivers/generic/generic #dimm 0-1-1
                                                         device i2c 53 on end

-                                                end              
+                                                end

                                                 chip drivers/generic/generic #dimm 1-0-0
                                                         device i2c 54 on end
                                                 chip drivers/generic/generic #dimm 1-0-0
                                                         device i2c 54 on end

-                                                end     
+                                                end

                                                 chip drivers/generic/generic #dimm 1-0-1
                                                         device i2c 55 on end
                                                 end
                                                 chip drivers/generic/generic #dimm 1-1-0
                                                         device i2c 56 on end
                                                 chip drivers/generic/generic #dimm 1-0-1
                                                         device i2c 55 on end
                                                 end
                                                 chip drivers/generic/generic #dimm 1-1-0
                                                         device i2c 56 on end

-                                                end     
+                                                end

                                                 chip drivers/generic/generic #dimm 1-1-1
                                                         device i2c 57 on end
                                                 chip drivers/generic/generic #dimm 1-1-1
                                                         device i2c 57 on end

-                                                end 
+                                                end

                                        end # acpi
                                        device pci 1.5 on end
                                        device pci 1.6 off end
                                        register "ide0_enable" = "1"
                                        register "ide1_enable" = "1"
                                end
                                        end # acpi
                                        device pci 1.5 on end
                                        device pci 1.6 off end
                                        register "ide0_enable" = "1"
                                        register "ide1_enable" = "1"
                                end

-                       end #  device pci 18.0 
-                       
+                       end #  device pci 18.0
+

                        device pci 18.1 on end
                        device pci 18.2 on end
                        device pci 18.3 on end
                        device pci 18.1 on end
                        device pci 18.2 on end
                        device pci 18.3 on end


@@ -119,9 +119,9 @@ chip northbridge/amd/amdk8/root_complex
 
        end #pci_domain
 
 
        end #pci_domain
 

-#        chip drivers/generic/debug 
+#        chip drivers/generic/debug

 #                device pnp 0.0 off end
 #                device pnp 0.0 off end

-#                device pnp 0.1 off end 
+#                device pnp 0.1 off end

 #                device pnp 0.2 off end
 #                device pnp 0.3 off end
 #              device pnp 0.4 off end
 #                device pnp 0.2 off end
 #                device pnp 0.3 off end
 #              device pnp 0.4 off end

diff --git a/src/mainboard/tyan/s2885/get_bus_conf.c b/src/mainboard/tyan/s2885/get_bus_conf.c
index de4deb23d3aa6b918cfffb49f143f2634f5423b5..a511afa3955ac2624ebacff3319fa849c07ae6f2 100644 (file)
--- a/src/mainboard/tyan/s2885/get_bus_conf.c
+++ b/src/mainboard/tyan/s2885/get_bus_conf.c
@@ -24,7 +24,7 @@ unsigned apicid_8111 ;
 unsigned apicid_8131_1;
 unsigned apicid_8131_2;
 
 unsigned apicid_8131_1;
 unsigned apicid_8131_2;
 

-unsigned pci1234x[] = 
+unsigned pci1234x[] =

 {        //Here you only need to set value in pci1234 for HT-IO that could be installed or not
         //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
         0x0000ff0,
 {        //Here you only need to set value in pci1234 for HT-IO that could be installed or not
         //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
         0x0000ff0,


@@ -36,7 +36,7 @@ unsigned pci1234x[] =
 //        0x0000ff0,
 //        0x0000ff0
 };
 //        0x0000ff0,
 //        0x0000ff0
 };

-unsigned hcdnx[] = 
+unsigned hcdnx[] =

 { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
        0x20202020,
        0x20202020,
 { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
        0x20202020,
        0x20202020,


@@ -73,7 +73,7 @@ void get_bus_conf(void)
         }
 
         get_sblk_pci1234();
         }
 
         get_sblk_pci1234();

-       
+

        sysconf.sbdn = (sysconf.hcdn[0] >> 8) & 0xff;
        sbdn3 = sysconf.hcdn[0] & 0xff;
        sbdn5 = sysconf.hcdn[1] & 0xff;
        sysconf.sbdn = (sysconf.hcdn[0] >> 8) & 0xff;
        sbdn3 = sysconf.hcdn[0] & 0xff;
        sbdn5 = sysconf.hcdn[1] & 0xff;


@@ -135,8 +135,8 @@ void get_bus_conf(void)
 /*I/O APICs:   APIC ID Version State           Address*/
 #if CONFIG_LOGICAL_CPUS==1
        apicid_base = get_apicid_base(3);
 /*I/O APICs:   APIC ID Version State           Address*/
 #if CONFIG_LOGICAL_CPUS==1
        apicid_base = get_apicid_base(3);

-#else 
-       apicid_base = CONFIG_MAX_PHYSICAL_CPUS; 
+#else
+       apicid_base = CONFIG_MAX_PHYSICAL_CPUS;

 #endif
        apicid_8111 = apicid_base+0;
        apicid_8131_1 = apicid_base+1;
 #endif
        apicid_8111 = apicid_base+0;
        apicid_8131_1 = apicid_base+1;

diff --git a/src/mainboard/tyan/s2885/irq_tables.c b/src/mainboard/tyan/s2885/irq_tables.c
index f9a358e12520b179da5175e4d9e9f15fb613e86f..b272fda5329640fe9700f5c56953c310a6a312d4 100644 (file)
--- a/src/mainboard/tyan/s2885/irq_tables.c
+++ b/src/mainboard/tyan/s2885/irq_tables.c
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!

    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 
    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 


@@ -12,11 +12,11 @@
 
 #include <cpu/amd/amdk8_sysconf.h>
 
 
 #include <cpu/amd/amdk8_sysconf.h>
 

-static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0, 
+static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,

                uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
                uint8_t slot, uint8_t rfu)
 {
                uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
                uint8_t slot, uint8_t rfu)
 {

-        pirq_info->bus = bus; 
+        pirq_info->bus = bus;

         pirq_info->devfn = devfn;
                 pirq_info->irq[0].link = link0;
                 pirq_info->irq[0].bitmap = bitmap0;
         pirq_info->devfn = devfn;
                 pirq_info->irq[0].link = link0;
                 pirq_info->irq[0].bitmap = bitmap0;


@@ -65,22 +65,22 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 
        pirq = (void *)(addr);
        v = (uint8_t *)(addr);
 
        pirq = (void *)(addr);
        v = (uint8_t *)(addr);

-       
+

        pirq->signature = PIRQ_SIGNATURE;
        pirq->version  = PIRQ_VERSION;
        pirq->signature = PIRQ_SIGNATURE;
        pirq->version  = PIRQ_VERSION;

-       
+

        pirq->rtr_bus = bus_8111_0;
        pirq->rtr_devfn = ((sysconf.sbdn+1)<<3)|0;
 
        pirq->exclusive_irqs = 0;
        pirq->rtr_bus = bus_8111_0;
        pirq->rtr_devfn = ((sysconf.sbdn+1)<<3)|0;
 
        pirq->exclusive_irqs = 0;

-       
+

        pirq->rtr_vendor = 0x1022;
        pirq->rtr_device = 0x746b;
 
        pirq->miniport_data = 0;
 
        memset(pirq->rfu, 0, sizeof(pirq->rfu));
        pirq->rtr_vendor = 0x1022;
        pirq->rtr_device = 0x746b;
 
        pirq->miniport_data = 0;
 
        memset(pirq->rfu, 0, sizeof(pirq->rfu));

-       
+

        pirq_info = (void *) ( &pirq->checksum + 1);
        slot_num = 0;
 //pci bridge
        pirq_info = (void *) ( &pirq->checksum + 1);
        slot_num = 0;
 //pci bridge


@@ -90,14 +90,14 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 //        write_pirq_info(pirq_info, bus_8131_0, (sbdn3<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
 //        pirq_info++; slot_num++;
 //agp bridge
 //        write_pirq_info(pirq_info, bus_8131_0, (sbdn3<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
 //        pirq_info++; slot_num++;
 //agp bridge

-        write_pirq_info(pirq_info, bus_8151_0, (sbdn5<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0); 
+        write_pirq_info(pirq_info, bus_8151_0, (sbdn5<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);

 
         pirq_info++; slot_num++;
 
         pirq_info++; slot_num++;

-             
-       pirq->size = 32 + 16 * slot_num; 
+
+       pirq->size = 32 + 16 * slot_num;

 
         for (i = 0; i < pirq->size; i++)
 
         for (i = 0; i < pirq->size; i++)

-                sum += v[i];   
+                sum += v[i];

 
        sum = pirq->checksum - sum;
 
 
        sum = pirq->checksum - sum;
 

diff --git a/src/mainboard/tyan/s2885/mptable.c b/src/mainboard/tyan/s2885/mptable.c
index d096b07905bf0c5080bf9188b97368f9ea799a09..87c812fb134dbbf498f4a085769b0b3c82612ce4 100644 (file)
--- a/src/mainboard/tyan/s2885/mptable.c
+++ b/src/mainboard/tyan/s2885/mptable.c
@@ -83,7 +83,7 @@ static void *smp_write_config_table(void *v)
                        }
                 }
        }
                        }
                 }
        }

-  
+

 /*I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN#
 */     smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_8111, 0x0);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x1, apicid_8111, 0x1);
 /*I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN#
 */     smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_8111, 0x0);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x1, apicid_8111, 0x1);


@@ -100,7 +100,7 @@ static void *smp_write_config_table(void *v)
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0xf, apicid_8111, 0xf);
 //??? What
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_0, ((sysconf.sbdn+1)<<2)|3, apicid_8111, 0x13);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0xf, apicid_8111, 0xf);
 //??? What
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_0, ((sysconf.sbdn+1)<<2)|3, apicid_8111, 0x13);

-//Onboard AMD AC97 Audio 
+//Onboard AMD AC97 Audio

         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_0, ((sysconf.sbdn+1)<<2)|1, apicid_8111, 0x11);
 // Onboard AMD USB
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0<<2)|3, apicid_8111, 0x13);
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_0, ((sysconf.sbdn+1)<<2)|1, apicid_8111, 0x11);
 // Onboard AMD USB
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0<<2)|3, apicid_8111, 0x13);


@@ -108,7 +108,7 @@ static void *smp_write_config_table(void *v)
 //  AGP Display Adapter
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8151_1, 0x0, apicid_8111, 0x10);
 
 //  AGP Display Adapter
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8151_1, 0x0, apicid_8111, 0x10);
 

-//Onboard Serial ATA        
+//Onboard Serial ATA

        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0x0b<<2)|0, apicid_8111, 0x11);
 //Onboard Firewire
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0x0c<<2)|0, apicid_8111, 0x13);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0x0b<<2)|0, apicid_8111, 0x11);
 //Onboard Firewire
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0x0c<<2)|0, apicid_8111, 0x13);


@@ -127,7 +127,7 @@ static void *smp_write_config_table(void *v)
         }
 
 
         }
 
 

-//Slot 4 PCIX 100/66        
+//Slot 4 PCIX 100/66

         for(i=0;i<4;i++) {
                 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (7<<2)|i, apicid_8131_1, (2+i)%4); //26
         }
         for(i=0;i<4;i++) {
                 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (7<<2)|i, apicid_8131_1, (2+i)%4); //26
         }

diff --git a/src/mainboard/tyan/s2885/resourcemap.c b/src/mainboard/tyan/s2885/resourcemap.c
index 4a686020c88d5f76af087ba873798a870fc34bcf..af0ccabeb81b908559c98352c7ef1e5c5805207a 100644 (file)
--- a/src/mainboard/tyan/s2885/resourcemap.c
+++ b/src/mainboard/tyan/s2885/resourcemap.c
@@ -144,7 +144,7 @@ static void setup_s2885_resource_map(void)
                 *         1 = base/limit registers i are read-only
                 * [ 7: 4] Reserved
                 * [31: 8] Memory-Mapped I/O Base Address i (39-16)
                 *         1 = base/limit registers i are read-only
                 * [ 7: 4] Reserved
                 * [31: 8] Memory-Mapped I/O Base Address i (39-16)

-                *         This field defines the upper address bits of a 40bit address 
+                *         This field defines the upper address bits of a 40bit address

                 *         that defines the start of memory-mapped I/O region i
                 */
                PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,
                 *         that defines the start of memory-mapped I/O region i
                 */
                PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,


@@ -200,7 +200,7 @@ static void setup_s2885_resource_map(void)
                 * [ 3: 2] Reserved
                 * [ 4: 4] VGA Enable
                 *         0 = VGA matches Disabled
                 * [ 3: 2] Reserved
                 * [ 4: 4] VGA Enable
                 *         0 = VGA matches Disabled

-                *         1 = matches all address < 64K and where A[9:0] is in the 
+                *         1 = matches all address < 64K and where A[9:0] is in the

                 *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
                 * [ 5: 5] ISA Enable
                 *         0 = ISA matches Disabled
                 *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
                 * [ 5: 5] ISA Enable
                 *         0 = ISA matches Disabled


@@ -208,7 +208,7 @@ static void setup_s2885_resource_map(void)
                 *             from matching agains this base/limit pair
                 * [11: 6] Reserved
                 * [24:12] PCI I/O Base i
                 *             from matching agains this base/limit pair
                 * [11: 6] Reserved
                 * [24:12] PCI I/O Base i

-                *         This field defines the start of PCI I/O region n 
+                *         This field defines the start of PCI I/O region n

                 * [31:25] Reserved
                 */
 //             PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000003,
                 * [31:25] Reserved
                 */
 //             PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000003,

diff --git a/src/mainboard/tyan/s2885/romstage.c b/src/mainboard/tyan/s2885/romstage.c
index 7513c14e1baf88091306f9cfec7a9b3a2a7e747b..f7ea579f6edcc507d44f981765c45da3ec705f9e 100644 (file)
--- a/src/mainboard/tyan/s2885/romstage.c
+++ b/src/mainboard/tyan/s2885/romstage.c
@@ -1,4 +1,4 @@
- 
+

 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>


@@ -71,7 +71,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 #include "lib/generic_sdram.c"
 
  /* tyan does not want the default */
 #include "lib/generic_sdram.c"
 
  /* tyan does not want the default */

-#include "resourcemap.c" 
+#include "resourcemap.c"

 
 #if CONFIG_LOGICAL_CPUS==1
 #define SET_NB_CFG_54 1
 
 #if CONFIG_LOGICAL_CPUS==1
 #define SET_NB_CFG_54 1


@@ -119,13 +119,13 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         }
 
 //     post_code(0x32);
         }
 
 //     post_code(0x32);

-       
+

        w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
         uart_init();
         console_init();
 
 //     dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE);
        w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
         uart_init();
         console_init();
 
 //     dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE);

-       
+

        /* Halt if there was a built in self test failure */
        report_bist_failure(bist);
 
        /* Halt if there was a built in self test failure */
        report_bist_failure(bist);
 

diff --git a/src/mainboard/tyan/s2891/resourcemap.c b/src/mainboard/tyan/s2891/resourcemap.c
index f7929b96c02ab0e2959ca10403e6a4fa098bd630..d76f1d6f4740ea83c0d77e240a5405e3dbe5d41a 100644 (file)
--- a/src/mainboard/tyan/s2891/resourcemap.c
+++ b/src/mainboard/tyan/s2891/resourcemap.c
@@ -144,7 +144,7 @@ static void setup_s2891_resource_map(void)
                 *         1 = base/limit registers i are read-only
                 * [ 7: 4] Reserved
                 * [31: 8] Memory-Mapped I/O Base Address i (39-16)
                 *         1 = base/limit registers i are read-only
                 * [ 7: 4] Reserved
                 * [31: 8] Memory-Mapped I/O Base Address i (39-16)

-                *         This field defines the upper address bits of a 40bit address 
+                *         This field defines the upper address bits of a 40bit address

                 *         that defines the start of memory-mapped I/O region i
                 */
                PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,
                 *         that defines the start of memory-mapped I/O region i
                 */
                PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,


@@ -182,7 +182,7 @@ static void setup_s2891_resource_map(void)
                 * [31:25] Reserved
                 */
 //             PCI_ADDR(0, 0x18, 1, 0xC4), 0xFE000FC8, 0x01fff000,
                 * [31:25] Reserved
                 */
 //             PCI_ADDR(0, 0x18, 1, 0xC4), 0xFE000FC8, 0x01fff000,

-               PCI_ADDR(0, 0x18, 1, 0xCC), 0xFE000FC8, 0x00000000, 
+               PCI_ADDR(0, 0x18, 1, 0xCC), 0xFE000FC8, 0x00000000,

                PCI_ADDR(0, 0x18, 1, 0xD4), 0xFE000FC8, 0x00000000,
                PCI_ADDR(0, 0x18, 1, 0xDC), 0xFE000FC8, 0x00000000,
 
                PCI_ADDR(0, 0x18, 1, 0xD4), 0xFE000FC8, 0x00000000,
                PCI_ADDR(0, 0x18, 1, 0xDC), 0xFE000FC8, 0x00000000,
 


@@ -200,7 +200,7 @@ static void setup_s2891_resource_map(void)
                 * [ 3: 2] Reserved
                 * [ 4: 4] VGA Enable
                 *         0 = VGA matches Disabled
                 * [ 3: 2] Reserved
                 * [ 4: 4] VGA Enable
                 *         0 = VGA matches Disabled

-                *         1 = matches all address < 64K and where A[9:0] is in the 
+                *         1 = matches all address < 64K and where A[9:0] is in the

                 *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
                 * [ 5: 5] ISA Enable
                 *         0 = ISA matches Disabled
                 *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
                 * [ 5: 5] ISA Enable
                 *         0 = ISA matches Disabled


@@ -208,7 +208,7 @@ static void setup_s2891_resource_map(void)
                 *             from matching agains this base/limit pair
                 * [11: 6] Reserved
                 * [24:12] PCI I/O Base i
                 *             from matching agains this base/limit pair
                 * [11: 6] Reserved
                 * [24:12] PCI I/O Base i

-                *         This field defines the start of PCI I/O region n 
+                *         This field defines the start of PCI I/O region n

                 * [31:25] Reserved
                 */
 //             PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000033,
                 * [31:25] Reserved
                 */
 //             PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000033,


@@ -254,8 +254,8 @@ static void setup_s2891_resource_map(void)
                 */
 //             PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x07000003, /* link 0 of cpu 0 --> Nvidia CK 804 Pro */
 //             PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x7f080203, /* link 2 of cpu 0 --> AMD8131      */
                 */
 //             PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x07000003, /* link 0 of cpu 0 --> Nvidia CK 804 Pro */
 //             PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x7f080203, /* link 2 of cpu 0 --> AMD8131      */

-               PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x00000000, 
-               PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000, 
+               PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x00000000,
+               PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000,

 
        };
 
 
        };
 

diff --git a/src/mainboard/tyan/s2892/dsdt.asl b/src/mainboard/tyan/s2892/dsdt.asl
index 63a94bb9328181862f53bfee95075a8f33d530dc..d4242c3dc2da9ef7387e83bfe226bd50e015c557 100644 (file)
--- a/src/mainboard/tyan/s2892/dsdt.asl
+++ b/src/mainboard/tyan/s2892/dsdt.asl
@@ -6,22 +6,22 @@
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by

- * the Free Software Foundation; version 2 of the License. 
- * 
+ * the Free Software Foundation; version 2 of the License.
+ *

  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.

- * 
+ *

  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */

- 
+

 /*
  * ISA portions taken from QEMU acpi-dsdt.dsl.
  */
 /*
  * ISA portions taken from QEMU acpi-dsdt.dsl.
  */

- 
+

 DefinitionBlock ("DSDT.aml", "DSDT", 1, "CORE  ", "CB-DSDT ", 1)
 {
         #include "northbridge/amd/amdk8/amdk8_util.asl"
 DefinitionBlock ("DSDT.aml", "DSDT", 1, "CORE  ", "CB-DSDT ", 1)
 {
         #include "northbridge/amd/amdk8/amdk8_util.asl"

diff --git a/src/mainboard/tyan/s2895/dsdt.asl b/src/mainboard/tyan/s2895/dsdt.asl
index 268929fd9da0139a6827777297fee9a8a1118791..b3ac536d288273caba414f0da4c307aeb9b73f80 100644 (file)
--- a/src/mainboard/tyan/s2895/dsdt.asl
+++ b/src/mainboard/tyan/s2895/dsdt.asl
@@ -6,22 +6,22 @@
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by

- * the Free Software Foundation; version 2 of the License. 
- * 
+ * the Free Software Foundation; version 2 of the License.
+ *

  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.

- * 
+ *

  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */

- 
+

 /*
  * ISA portions taken from QEMU acpi-dsdt.dsl.
  */
 /*
  * ISA portions taken from QEMU acpi-dsdt.dsl.
  */

- 
+

 DefinitionBlock ("DSDT.aml", "DSDT", 1, "CORE  ", "CB-DSDT ", 1)
 {
         #include "northbridge/amd/amdk8/amdk8_util.asl"
 DefinitionBlock ("DSDT.aml", "DSDT", 1, "CORE  ", "CB-DSDT ", 1)
 {
         #include "northbridge/amd/amdk8/amdk8_util.asl"

diff --git a/src/mainboard/tyan/s2912/Kconfig b/src/mainboard/tyan/s2912/Kconfig
index 18fa5e2bc3e765ec4b85b6f030fa71d15d3fe9ac..c2a7ed00ddb8da777415f5c45a12710d100b75d0 100644 (file)
--- a/src/mainboard/tyan/s2912/Kconfig
+++ b/src/mainboard/tyan/s2912/Kconfig
@@ -15,7 +15,7 @@ config BOARD_TYAN_S2912
        select LIFT_BSP_APIC_ID
        select K8_REV_F_SUPPORT
        select BOARD_ROMSIZE_KB_512
        select LIFT_BSP_APIC_ID
        select K8_REV_F_SUPPORT
        select BOARD_ROMSIZE_KB_512

- 
+

 config MAINBOARD_DIR
        string
        default tyan/s2912
 config MAINBOARD_DIR
        string
        default tyan/s2912


@@ -25,7 +25,7 @@ config DCACHE_RAM_BASE
        hex
        default 0xc8000
        depends on BOARD_TYAN_S2912
        hex
        default 0xc8000
        depends on BOARD_TYAN_S2912

-       
+

 config DCACHE_RAM_SIZE
        hex
        default 0x08000
 config DCACHE_RAM_SIZE
        hex
        default 0x08000


@@ -37,7 +37,7 @@ config DCACHE_RAM_GLOBAL_VAR_SIZE
        depends on BOARD_TYAN_S2912
 
 config APIC_ID_OFFSET
        depends on BOARD_TYAN_S2912
 
 config APIC_ID_OFFSET

-       hex     
+       hex

        default 0x10
        depends on BOARD_TYAN_S2912
 
        default 0x10
        depends on BOARD_TYAN_S2912
 


@@ -77,7 +77,7 @@ config MAX_PHYSICAL_CPUS
        depends on BOARD_TYAN_S2912
 
 config HW_MEM_HOLE_SIZE_AUTO_INC
        depends on BOARD_TYAN_S2912
 
 config HW_MEM_HOLE_SIZE_AUTO_INC

-       bool    
+       bool

        default n
        depends on BOARD_TYAN_S2912
 
        default n
        depends on BOARD_TYAN_S2912
 


@@ -87,12 +87,12 @@ config HT_CHAIN_UNITID_BASE
        depends on BOARD_TYAN_S2912
 
 config HT_CHAIN_END_UNITID_BASE
        depends on BOARD_TYAN_S2912
 
 config HT_CHAIN_END_UNITID_BASE

-       hex     
+       hex

        default 0x20
        depends on BOARD_TYAN_S2912
 
 config SERIAL_CPU_INIT
        default 0x20
        depends on BOARD_TYAN_S2912
 
 config SERIAL_CPU_INIT

-       bool    
+       bool

        default n
        depends on BOARD_TYAN_S2912
 
        default n
        depends on BOARD_TYAN_S2912
 

diff --git a/src/mainboard/tyan/s2912/ap_romstage.c b/src/mainboard/tyan/s2912/ap_romstage.c
index a477b6891dc9353983b8013bfc88338021293025..41a4a6ee8d58ff5db2c66ce4520c628bc6b517c5 100644 (file)
--- a/src/mainboard/tyan/s2912/ap_romstage.c
+++ b/src/mainboard/tyan/s2912/ap_romstage.c
@@ -25,7 +25,7 @@
 #define RAMINIT_SYSINFO 1
 #define CACHE_AS_RAM_ADDRESS_DEBUG 0
 
 #define RAMINIT_SYSINFO 1
 #define CACHE_AS_RAM_ADDRESS_DEBUG 0
 

-#define SET_NB_CFG_54 1 
+#define SET_NB_CFG_54 1

 
 //used by raminit
 #define QRANK_DIMM_SUPPORT 1
 
 //used by raminit
 #define QRANK_DIMM_SUPPORT 1

diff --git a/src/mainboard/tyan/s2912/get_bus_conf.c b/src/mainboard/tyan/s2912/get_bus_conf.c
index b21b1af4a7fc850651b243265742357dfc4a192f..9ff59d24abc5e42a5bae008131598b386220aeeb 100644 (file)
--- a/src/mainboard/tyan/s2912/get_bus_conf.c
+++ b/src/mainboard/tyan/s2912/get_bus_conf.c
@@ -35,7 +35,7 @@
 struct mb_sysconf_t mb_sysconf;
 
 unsigned pci1234x[] =
 struct mb_sysconf_t mb_sysconf;
 
 unsigned pci1234x[] =

-{      
+{

        // Here you only need to set value in pci1234 for HT-IO that could be
        // installed or not.
        // You may need to preset pci1234 for HTIO board, please refer to
        // Here you only need to set value in pci1234 for HT-IO that could be
        // installed or not.
        // You may need to preset pci1234 for HTIO board, please refer to


@@ -50,7 +50,7 @@ unsigned pci1234x[] =
 //     0x0000ff0
 };
 unsigned hcdnx[] =
 //     0x0000ff0
 };
 unsigned hcdnx[] =

-{ 
+{

        // HT Chain device num, actually it is unit id base of every ht device
        // in chain, assume every chain only have 4 ht device at most
        0x20202020,
        // HT Chain device num, actually it is unit id base of every ht device
        // in chain, assume every chain only have 4 ht device at most
        0x20202020,

diff --git a/src/mainboard/tyan/s2912/mb_sysconf.h b/src/mainboard/tyan/s2912/mb_sysconf.h
index 83f9dbab28cb5e5d03e7483644cd82a95b39b9da..a2e6fc7ade7c8f3df1de373279bf00ee1dfae7a6 100644 (file)
--- a/src/mainboard/tyan/s2912/mb_sysconf.h
+++ b/src/mainboard/tyan/s2912/mb_sysconf.h
@@ -26,7 +26,7 @@ struct mb_sysconf_t {
        unsigned char bus_isa;
        unsigned char bus_mcp55[8]; //1
        unsigned apicid_mcp55;
        unsigned char bus_isa;
        unsigned char bus_mcp55[8]; //1
        unsigned apicid_mcp55;

-       unsigned bus_type[256]; 
+       unsigned bus_type[256];

 
 };
 
 
 };
 

diff --git a/src/mainboard/tyan/s2912_fam10/irq_tables.c b/src/mainboard/tyan/s2912_fam10/irq_tables.c
index bb14f3310b94c7e38e9658659ec286c6ab39d7e2..a1de4c4f57a17a7bcbd50b24e9ce74055204c7bc 100644 (file)
--- a/src/mainboard/tyan/s2912_fam10/irq_tables.c
+++ b/src/mainboard/tyan/s2912_fam10/irq_tables.c
@@ -19,7 +19,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 

-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!

  * (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 
  * (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 


@@ -34,11 +34,11 @@
 #include <cpu/amd/amdfam10_sysconf.h>
 #include "mb_sysconf.h"
 
 #include <cpu/amd/amdfam10_sysconf.h>
 #include "mb_sysconf.h"
 

-static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0, 
+static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,

                uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
                uint8_t slot, uint8_t rfu)
 {
                uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
                uint8_t slot, uint8_t rfu)
 {

-       pirq_info->bus = bus; 
+       pirq_info->bus = bus;

        pirq_info->devfn = devfn;
                pirq_info->irq[0].link = link0;
                pirq_info->irq[0].bitmap = bitmap0;
        pirq_info->devfn = devfn;
                pirq_info->irq[0].link = link0;
                pirq_info->irq[0].bitmap = bitmap0;


@@ -80,15 +80,15 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 
        pirq = (void *)(addr);
        v = (uint8_t *)(addr);
 
        pirq = (void *)(addr);
        v = (uint8_t *)(addr);

-       
+

        pirq->signature = PIRQ_SIGNATURE;
        pirq->version  = PIRQ_VERSION;
        pirq->signature = PIRQ_SIGNATURE;
        pirq->version  = PIRQ_VERSION;

-       
+

        pirq->rtr_bus = m->bus_mcp55[0];
        pirq->rtr_devfn = ((sbdn+6)<<3)|0;
 
        pirq->exclusive_irqs = 0;
        pirq->rtr_bus = m->bus_mcp55[0];
        pirq->rtr_devfn = ((sbdn+6)<<3)|0;
 
        pirq->exclusive_irqs = 0;

-       
+

        pirq->rtr_vendor = 0x10de;
        pirq->rtr_device = 0x0370;
 
        pirq->rtr_vendor = 0x10de;
        pirq->rtr_device = 0x0370;
 


@@ -101,7 +101,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 //pci bridge
        write_pirq_info(pirq_info, m->bus_mcp55[0], ((sbdn+6)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
        pirq_info++; slot_num++;
 //pci bridge
        write_pirq_info(pirq_info, m->bus_mcp55[0], ((sbdn+6)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
        pirq_info++; slot_num++;

-       
+

        for(i=1; i< sysconf.hc_possible_num; i++) {
                if(!(sysconf.pci1234[i] & 0x1) ) continue;
                unsigned busn = (sysconf.pci1234[i] >> 12) & 0xff;
        for(i=1; i< sysconf.hc_possible_num; i++) {
                if(!(sysconf.pci1234[i] & 0x1) ) continue;
                unsigned busn = (sysconf.pci1234[i] >> 12) & 0xff;


@@ -120,10 +120,10 @@ unsigned long write_pirq_routing_table(unsigned long addr)
        }
 #endif
 
        }
 #endif
 

-       pirq->size = 32 + 16 * slot_num; 
+       pirq->size = 32 + 16 * slot_num;

 
        for (i = 0; i < pirq->size; i++)
 
        for (i = 0; i < pirq->size; i++)

-               sum += v[i];    
+               sum += v[i];

 
        sum = pirq->checksum - sum;
 
 
        sum = pirq->checksum - sum;
 

diff --git a/src/mainboard/tyan/s2912_fam10/mb_sysconf.h b/src/mainboard/tyan/s2912_fam10/mb_sysconf.h
index 83f9dbab28cb5e5d03e7483644cd82a95b39b9da..a2e6fc7ade7c8f3df1de373279bf00ee1dfae7a6 100644 (file)
--- a/src/mainboard/tyan/s2912_fam10/mb_sysconf.h
+++ b/src/mainboard/tyan/s2912_fam10/mb_sysconf.h
@@ -26,7 +26,7 @@ struct mb_sysconf_t {
        unsigned char bus_isa;
        unsigned char bus_mcp55[8]; //1
        unsigned apicid_mcp55;
        unsigned char bus_isa;
        unsigned char bus_mcp55[8]; //1
        unsigned apicid_mcp55;

-       unsigned bus_type[256]; 
+       unsigned bus_type[256];

 
 };
 
 
 };
 

diff --git a/src/mainboard/tyan/s4880/devicetree.cb b/src/mainboard/tyan/s4880/devicetree.cb
index 4a08e45d1b2b1a22fb98cac299ef7531c6ce731a..4c2f2b59f48243df9e7f0a2544c32e1c8718a1d1 100644 (file)
--- a/src/mainboard/tyan/s4880/devicetree.cb
+++ b/src/mainboard/tyan/s4880/devicetree.cb
@@ -9,7 +9,7 @@ chip northbridge/amd/amdk8/root_complex
                chip northbridge/amd/amdk8
                        device pci 18.0 on end # LDT0
                        device pci 18.0 on end # LDT1
                chip northbridge/amd/amdk8
                        device pci 18.0 on end # LDT0
                        device pci 18.0 on end # LDT1

-                       device pci 18.0 on #  northbridge 
+                       device pci 18.0 on #  northbridge

                                #  devices on link 2, link 2 == LDT 2
                                chip southbridge/amd/amd8131
                                        # the on/off keyword is mandatory
                                #  devices on link 2, link 2 == LDT 2
                                chip southbridge/amd/amd8131
                                        # the on/off keyword is mandatory


@@ -68,7 +68,7 @@ chip northbridge/amd/amdk8/root_complex
                                                                io 0x60 = 0x220
                                                                io 0x62 = 0x300
                                                                irq 0x70 = 9
                                                                io 0x60 = 0x220
                                                                io 0x62 = 0x300
                                                                irq 0x70 = 9

-                                                       end  
+                                                       end

                                                        device pnp 2e.8 off end #  GPIO2
                                                        device pnp 2e.9 off end #  GPIO3
                                                        device pnp 2e.a off end #  ACPI
                                                        device pnp 2e.8 off end #  GPIO2
                                                        device pnp 2e.9 off end #  GPIO3
                                                        device pnp 2e.a off end #  ACPI


@@ -86,8 +86,8 @@ chip northbridge/amd/amdk8/root_complex
                                         register "ide0_enable" = "1"
                                         register "ide1_enable" = "1"
                                end
                                         register "ide0_enable" = "1"
                                         register "ide1_enable" = "1"
                                end

-                       end #  device pci 18.0 
-                       
+                       end #  device pci 18.0
+

                        device pci 18.1 on end
                        device pci 18.2 on end
                        device pci 18.3 on end
                        device pci 18.1 on end
                        device pci 18.2 on end
                        device pci 18.3 on end

diff --git a/src/mainboard/tyan/s4880/irq_tables.c b/src/mainboard/tyan/s4880/irq_tables.c
index e95038dc372cae6cdfb4a6e2f61f608594acf0df..352a7411e10b0491dfc367f7035ec461a6f71cd3 100644 (file)
--- a/src/mainboard/tyan/s4880/irq_tables.c
+++ b/src/mainboard/tyan/s4880/irq_tables.c
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!

    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 
    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 

diff --git a/src/mainboard/tyan/s4880/mptable.c b/src/mainboard/tyan/s4880/mptable.c
index 746d2a5d5e96d3ed4da4e61fdc84df49d0fe4720..a5094ba042842e73ad86932698db2fbe02428b71 100644 (file)
--- a/src/mainboard/tyan/s4880/mptable.c
+++ b/src/mainboard/tyan/s4880/mptable.c
@@ -28,7 +28,7 @@ static unsigned node_link_to_bus(unsigned node, unsigned link)
                 dst_node = (config_map >> 4) & 7;
                 dst_link = (config_map >> 8) & 3;
                 bus_base = (config_map >> 16) & 0xff;
                 dst_node = (config_map >> 4) & 7;
                 dst_link = (config_map >> 8) & 3;
                 bus_base = (config_map >> 16) & 0xff;

-#if 0                           
+#if 0

                 printk(BIOS_DEBUG, "node.link=bus: %d.%d=%d 0x%2x->0x%08x\n",
                         dst_node, dst_link, bus_base,
                         reg, config_map);
                 printk(BIOS_DEBUG, "node.link=bus: %d.%d=%d 0x%2x->0x%08x\n",
                         dst_node, dst_link, bus_base,
                         reg, config_map);


@@ -58,7 +58,7 @@ static void *smp_write_config_table(void *v)
         unsigned apicid_8111;
         unsigned apicid_8131_1;
         unsigned apicid_8131_2;
         unsigned apicid_8111;
         unsigned apicid_8131_1;
         unsigned apicid_8131_2;

-  
+

         mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
         memset(mc, 0, sizeof(*mc));
 
         mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
         memset(mc, 0, sizeof(*mc));
 


@@ -78,7 +78,7 @@ static void *smp_write_config_table(void *v)
 
         smp_write_processors(mc);
 
 
         smp_write_processors(mc);
 

-       
+

         {
                 device_t dev;
 
         {
                 device_t dev;
 


@@ -88,14 +88,14 @@ static void *smp_write_config_table(void *v)
                         printk(BIOS_DEBUG, "ERROR - cound not find bus for node 0 chain 0, using defaults\n");
                         bus_chain_0 = 1;
                 }
                         printk(BIOS_DEBUG, "ERROR - cound not find bus for node 0 chain 0, using defaults\n");
                         bus_chain_0 = 1;
                 }

-                
+

                 /* 8111 */
                 dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x03,0));
                 if (dev) {
                         bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
                         bus_isa    = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
                 /* 8111 */
                 dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x03,0));
                 if (dev) {
                         bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
                         bus_isa    = pci_read_config8(dev, PCI_SUBORDINATE_BUS);

-                        bus_isa++; 
-                }       
+                        bus_isa++;
+                }

                 else {
                         printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
 
                 else {
                         printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
 


@@ -133,14 +133,14 @@ static void *smp_write_config_table(void *v)
         }
         smp_write_bus(mc, bus_isa, "ISA   ");
 
         }
         smp_write_bus(mc, bus_isa, "ISA   ");
 

-       
+

 /*I/O APICs:   APIC ID Version State           Address*/
 #if CONFIG_LOGICAL_CPUS==1
        apicid_base = get_apicid_base(3);
 /*I/O APICs:   APIC ID Version State           Address*/
 #if CONFIG_LOGICAL_CPUS==1
        apicid_base = get_apicid_base(3);

-#else  
-        apicid_base = CONFIG_MAX_PHYSICAL_CPUS; 
+#else
+        apicid_base = CONFIG_MAX_PHYSICAL_CPUS;

 #endif
 #endif

-        apicid_8111 = apicid_base+0; 
+        apicid_8111 = apicid_base+0;

         apicid_8131_1 = apicid_base+1;
         apicid_8131_2 = apicid_base+2;
 
         apicid_8131_1 = apicid_base+1;
         apicid_8131_2 = apicid_base+2;
 


@@ -164,7 +164,7 @@ static void *smp_write_config_table(void *v)
                 }
 
        }
                 }
 
        }

-  
+

 /*I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN#
 */     smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_8111, 0x0);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x1, apicid_8111, 0x1);
 /*I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN#
 */     smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_8111, 0x0);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x1, apicid_8111, 0x1);


@@ -182,7 +182,7 @@ static void *smp_write_config_table(void *v)
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xd, apicid_8111, 0xd);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xe, apicid_8111, 0xe);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xf, apicid_8111, 0xf);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xd, apicid_8111, 0xd);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xe, apicid_8111, 0xe);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xf, apicid_8111, 0xf);

-       
+

 
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_chain_0, (4<<2)|0, apicid_8111, 0x13);
 
 
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_chain_0, (4<<2)|0, apicid_8111, 0x13);
 


@@ -214,7 +214,7 @@ static void *smp_write_config_table(void *v)
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (3<<2)|2, apicid_8131_1, 0x1);//
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (3<<2)|3, apicid_8131_1, 0x2);//
 
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (3<<2)|2, apicid_8131_1, 0x1);//
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (3<<2)|3, apicid_8131_1, 0x2);//
 

-//Slot 3 PCIX 100/66        
+//Slot 3 PCIX 100/66

        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (2<<2)|0, apicid_8131_1, 0x2);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (2<<2)|1, apicid_8131_1, 0x3);//
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (2<<2)|2, apicid_8131_1, 0x0);//
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (2<<2)|0, apicid_8131_1, 0x2);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (2<<2)|1, apicid_8131_1, 0x3);//
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (2<<2)|2, apicid_8131_1, 0x0);//

diff --git a/src/mainboard/tyan/s4880/resourcemap.c b/src/mainboard/tyan/s4880/resourcemap.c
index cf45d55532471678073572adf9bf60c3eb576fdf..5fa85784abc6c78afc878df77980058d218a6e29 100644 (file)
--- a/src/mainboard/tyan/s4880/resourcemap.c
+++ b/src/mainboard/tyan/s4880/resourcemap.c
@@ -144,7 +144,7 @@ static void setup_s4880_resource_map(void)
         *         1 = base/limit registers i are read-only
         * [ 7: 4] Reserved
         * [31: 8] Memory-Mapped I/O Base Address i (39-16)
         *         1 = base/limit registers i are read-only
         * [ 7: 4] Reserved
         * [31: 8] Memory-Mapped I/O Base Address i (39-16)

-        *         This field defines the upper address bits of a 40bit address 
+        *         This field defines the upper address bits of a 40bit address

         *         that defines the start of memory-mapped I/O region i
         */
        PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,
         *         that defines the start of memory-mapped I/O region i
         */
        PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,


@@ -200,7 +200,7 @@ static void setup_s4880_resource_map(void)
         * [ 3: 2] Reserved
         * [ 4: 4] VGA Enable
         *         0 = VGA matches Disabled
         * [ 3: 2] Reserved
         * [ 4: 4] VGA Enable
         *         0 = VGA matches Disabled

-        *         1 = matches all address < 64K and where A[9:0] is in the 
+        *         1 = matches all address < 64K and where A[9:0] is in the

         *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
         * [ 5: 5] ISA Enable
         *         0 = ISA matches Disabled
         *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
         * [ 5: 5] ISA Enable
         *         0 = ISA matches Disabled


@@ -208,7 +208,7 @@ static void setup_s4880_resource_map(void)
         *             from matching agains this base/limit pair
         * [11: 6] Reserved
         * [24:12] PCI I/O Base i
         *             from matching agains this base/limit pair
         * [11: 6] Reserved
         * [24:12] PCI I/O Base i

-        *         This field defines the start of PCI I/O region n 
+        *         This field defines the start of PCI I/O region n

         * [31:25] Reserved
         */
        PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000003,
         * [31:25] Reserved
         */
        PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000003,

diff --git a/src/mainboard/tyan/s4880/romstage.c b/src/mainboard/tyan/s4880/romstage.c
index 993330327893a0cc43782c428e0c2cacf931e53b..753328c06220449158bfb69be14631a2087f365d 100644 (file)
--- a/src/mainboard/tyan/s4880/romstage.c
+++ b/src/mainboard/tyan/s4880/romstage.c
@@ -1,4 +1,4 @@
- 
+

 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>


@@ -65,7 +65,7 @@ static inline void change_i2c_mux(unsigned device)
 {
 #define SMBUS_HUB 0x18
         int ret;
 {
 #define SMBUS_HUB 0x18
         int ret;

-        print_debug("change_i2c_mux i="); print_debug_hex8(device); print_debug("\n"); 
+        print_debug("change_i2c_mux i="); print_debug_hex8(device); print_debug("\n");

         ret = smbus_write_byte(SMBUS_HUB, 0x01, device);
         print_debug("change_i2c_mux 1 ret="); print_debug_hex32(ret); print_debug("\n");
         ret = smbus_write_byte(SMBUS_HUB, 0x03, 0);
         ret = smbus_write_byte(SMBUS_HUB, 0x01, device);
         print_debug("change_i2c_mux 1 ret="); print_debug_hex32(ret); print_debug("\n");
         ret = smbus_write_byte(SMBUS_HUB, 0x03, 0);


@@ -85,7 +85,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 #include "lib/generic_sdram.c"
 
  /* tyan does not want the default */
 #include "lib/generic_sdram.c"
 
  /* tyan does not want the default */

-#include "resourcemap.c" 
+#include "resourcemap.c"

 
 #if CONFIG_LOGICAL_CPUS==1
 #define SET_NB_CFG_54 1
 
 #if CONFIG_LOGICAL_CPUS==1
 #define SET_NB_CFG_54 1


@@ -185,7 +185,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         setup_s4880_resource_map();
 
        needs_reset = setup_coherent_ht_domain();
         setup_s4880_resource_map();
 
        needs_reset = setup_coherent_ht_domain();

-       
+

 #if CONFIG_LOGICAL_CPUS==1
         // It is said that we should start core1 after all core0 launched
         start_other_cores();
 #if CONFIG_LOGICAL_CPUS==1
         // It is said that we should start core1 after all core0 launched
         start_other_cores();

diff --git a/src/mainboard/tyan/s4882/devicetree.cb b/src/mainboard/tyan/s4882/devicetree.cb
index d2e5bbcf905f8efac385d34fbc24202fa7415316..66f8c73e00e3a2d06ae3b6daf4ce38440f887147 100644 (file)
--- a/src/mainboard/tyan/s4882/devicetree.cb
+++ b/src/mainboard/tyan/s4882/devicetree.cb
@@ -7,11 +7,11 @@ chip northbridge/amd/amdk8/root_complex
        device pci_domain 0 on
                chip northbridge/amd/amdk8
                        device pci 18.0 on end # LDT0
        device pci_domain 0 on
                chip northbridge/amd/amdk8
                        device pci 18.0 on end # LDT0

-                       device pci 18.0 on #  northbridge 
+                       device pci 18.0 on #  northbridge

                                #  devices on link 1, link 1 == LDT 1
                                chip southbridge/amd/amd8131
                                        # the on/off keyword is mandatory
                                #  devices on link 1, link 1 == LDT 1
                                chip southbridge/amd/amd8131
                                        # the on/off keyword is mandatory

-                                       device pci 0.0 on 
+                                       device pci 0.0 on

 #                                              chip drivers/lsi/53c1030
 #                                                      device pci 4.0 on end
 #                                                      device pci 4.1 on end
 #                                              chip drivers/lsi/53c1030
 #                                                      device pci 4.0 on end
 #                                                      device pci 4.1 on end


@@ -69,7 +69,7 @@ chip northbridge/amd/amdk8/root_complex
                                                                io 0x60 = 0x220
                                                                io 0x62 = 0x300
                                                                irq 0x70 = 9
                                                                io 0x60 = 0x220
                                                                io 0x62 = 0x300
                                                                irq 0x70 = 9

-                                                       end  
+                                                       end

                                                        device pnp 2e.8 off end #  GPIO2
                                                        device pnp 2e.9 off end #  GPIO3
                                                        device pnp 2e.a off end #  ACPI
                                                        device pnp 2e.8 off end #  GPIO2
                                                        device pnp 2e.9 off end #  GPIO3
                                                        device pnp 2e.a off end #  ACPI


@@ -81,12 +81,12 @@ chip northbridge/amd/amdk8/root_complex
                                        end
                                        device pci 1.1 on end
                                        device pci 1.2 on end
                                        end
                                        device pci 1.1 on end
                                        device pci 1.2 on end

-                                        device pci 1.3 on 
+                                        device pci 1.3 on

 #                                                chip drivers/i2c/i2cmux # pca9556 smbus mux
 #                                                        device i2c 18 on #0 pca9516 2, 1
 #                                                              chip drivers/i2c/lm63 #cpu0 temp
 #                                                                        device i2c 4c on end
 #                                                chip drivers/i2c/i2cmux # pca9556 smbus mux
 #                                                        device i2c 18 on #0 pca9516 2, 1
 #                                                              chip drivers/i2c/lm63 #cpu0 temp
 #                                                                        device i2c 4c on end

-#                                                                end 
+#                                                                end

 #                                                      end
 #                                                        device i2c 18 on #1 pca9516 1, 1
 #                                                                chip drivers/generic/generic #dimm 1-0-0
 #                                                      end
 #                                                        device i2c 18 on #1 pca9516 1, 1
 #                                                                chip drivers/generic/generic #dimm 1-0-0


@@ -163,7 +163,7 @@ chip northbridge/amd/amdk8/root_complex
 #                                                chip drivers/i2c/adm1027 # ADM1027 CPU1 vid and System FAN...
 #                                                        device i2c 2e on end
 #                                                end
 #                                                chip drivers/i2c/adm1027 # ADM1027 CPU1 vid and System FAN...
 #                                                        device i2c 2e on end
 #                                                end

-#                                                chip drivers/generic/generic # Winbond HWM 0x54 CPU0 vid 
+#                                                chip drivers/generic/generic # Winbond HWM 0x54 CPU0 vid

 #                                                        device i2c 2a on end
 #                                                end
 #                                                chip drivers/generic/generic # Winbond HWM 0x92
 #                                                        device i2c 2a on end
 #                                                end
 #                                                chip drivers/generic/generic # Winbond HWM 0x92


@@ -181,16 +181,16 @@ chip northbridge/amd/amdk8/root_complex
                                        register "ide0_enable" = "1"
                                         register "ide1_enable" = "1"
                                end
                                        register "ide0_enable" = "1"
                                         register "ide1_enable" = "1"
                                end

-                       end #  device pci 18.0 
-                       
+                       end #  device pci 18.0
+

                        device pci 18.0 on end
                        device pci 18.0 on end

-                       
+

                        device pci 18.1 on end
                        device pci 18.2 on end
                        device pci 18.3 on end
                end
 
                        device pci 18.1 on end
                        device pci 18.2 on end
                        device pci 18.3 on end
                end
 

-       end 
+       end

 #        chip drivers/generic/debug
 #                device pnp 0.0 off end # chip name
 #                device pnp 0.1 off end # pci_regs_all
 #        chip drivers/generic/debug
 #                device pnp 0.0 off end # chip name
 #                device pnp 0.1 off end # pci_regs_all

diff --git a/src/mainboard/tyan/s4882/irq_tables.c b/src/mainboard/tyan/s4882/irq_tables.c
index 4552b1f69cf8fefc8e9e959925cd102f785600cb..92695abf7b555d8dcaec2909aca5adbb604c1b62 100644 (file)
--- a/src/mainboard/tyan/s4882/irq_tables.c
+++ b/src/mainboard/tyan/s4882/irq_tables.c
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!

    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 
    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 

diff --git a/src/mainboard/tyan/s4882/mptable.c b/src/mainboard/tyan/s4882/mptable.c
index 4022dbdde1c142244e1cd69d0f130bb7641da0eb..81364262b756833120386bf9c10a85b08e01ed91 100644 (file)
--- a/src/mainboard/tyan/s4882/mptable.c
+++ b/src/mainboard/tyan/s4882/mptable.c
@@ -29,7 +29,7 @@ static unsigned node_link_to_bus(unsigned node, unsigned link)
                 dst_node = (config_map >> 4) & 7;
                 dst_link = (config_map >> 8) & 3;
                 bus_base = (config_map >> 16) & 0xff;
                 dst_node = (config_map >> 4) & 7;
                 dst_link = (config_map >> 8) & 3;
                 bus_base = (config_map >> 16) & 0xff;

-#if 0                           
+#if 0

                 printk(BIOS_DEBUG, "node.link=bus: %d.%d=%d 0x%2x->0x%08x\n",
                         dst_node, dst_link, bus_base,
                         reg, config_map);
                 printk(BIOS_DEBUG, "node.link=bus: %d.%d=%d 0x%2x->0x%08x\n",
                         dst_node, dst_link, bus_base,
                         reg, config_map);


@@ -59,7 +59,7 @@ static void *smp_write_config_table(void *v)
         unsigned apicid_8111;
         unsigned apicid_8131_1;
         unsigned apicid_8131_2;
         unsigned apicid_8111;
         unsigned apicid_8131_1;
         unsigned apicid_8131_2;

-  
+

         mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
         memset(mc, 0, sizeof(*mc));
 
         mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
         memset(mc, 0, sizeof(*mc));
 


@@ -79,24 +79,24 @@ static void *smp_write_config_table(void *v)
 
         smp_write_processors(mc);
 
 
         smp_write_processors(mc);
 

-       
+

         {
                 device_t dev;
         {
                 device_t dev;

-               
+

                 /* HT chain 0 */
                 bus_chain_0 = node_link_to_bus(0, 1);
                 if (bus_chain_0 == 0) {
                         printk(BIOS_DEBUG, "ERROR - cound not find bus for node 0 chain 0, using defaults\n");
                         bus_chain_0 = 1;
                 }
                 /* HT chain 0 */
                 bus_chain_0 = node_link_to_bus(0, 1);
                 if (bus_chain_0 == 0) {
                         printk(BIOS_DEBUG, "ERROR - cound not find bus for node 0 chain 0, using defaults\n");
                         bus_chain_0 = 1;
                 }

- 
+

                 /* 8111 */
                 dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x03,0));
                 if (dev) {
                         bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
                         bus_isa    = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
                 /* 8111 */
                 dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x03,0));
                 if (dev) {
                         bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
                         bus_isa    = pci_read_config8(dev, PCI_SUBORDINATE_BUS);

-                        bus_isa++; 
-                }       
+                        bus_isa++;
+                }

                 else {
                         printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
 
                 else {
                         printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
 


@@ -134,14 +134,14 @@ static void *smp_write_config_table(void *v)
         }
         smp_write_bus(mc, bus_isa, "ISA   ");
 
         }
         smp_write_bus(mc, bus_isa, "ISA   ");
 

-       
+

 /*I/O APICs:   APIC ID Version State           Address*/
 #if CONFIG_LOGICAL_CPUS==1
        apicid_base = get_apicid_base(3);
 /*I/O APICs:   APIC ID Version State           Address*/
 #if CONFIG_LOGICAL_CPUS==1
        apicid_base = get_apicid_base(3);

-#else        
-        apicid_base = CONFIG_MAX_PHYSICAL_CPUS; 
+#else
+        apicid_base = CONFIG_MAX_PHYSICAL_CPUS;

 #endif
 #endif

-        apicid_8111 = apicid_base+0; 
+        apicid_8111 = apicid_base+0;

         apicid_8131_1 = apicid_base+1;
         apicid_8131_2 = apicid_base+2;
        smp_write_ioapic(mc, apicid_8111, 0x11, 0xfec00000);
         apicid_8131_1 = apicid_base+1;
         apicid_8131_2 = apicid_base+2;
        smp_write_ioapic(mc, apicid_8111, 0x11, 0xfec00000);


@@ -164,7 +164,7 @@ static void *smp_write_config_table(void *v)
                 }
 
        }
                 }
 
        }

-  
+

 /*I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN#
 */     smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_8111, 0x0);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x1, apicid_8111, 0x1);
 /*I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN#
 */     smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_8111, 0x0);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x1, apicid_8111, 0x1);


@@ -182,7 +182,7 @@ static void *smp_write_config_table(void *v)
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xd, apicid_8111, 0xd);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xe, apicid_8111, 0xe);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xf, apicid_8111, 0xf);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xd, apicid_8111, 0xd);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xe, apicid_8111, 0xe);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xf, apicid_8111, 0xf);

-       
+

 
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_chain_0, (4<<2)|0, apicid_8111, 0x13);
 
 
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_chain_0, (4<<2)|0, apicid_8111, 0x13);
 


@@ -214,7 +214,7 @@ static void *smp_write_config_table(void *v)
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (3<<2)|2, apicid_8131_1, 0x1);//
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (3<<2)|3, apicid_8131_1, 0x2);//
 
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (3<<2)|2, apicid_8131_1, 0x1);//
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (3<<2)|3, apicid_8131_1, 0x2);//
 

-//Slot 3 PCIX 100/66        
+//Slot 3 PCIX 100/66

        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (2<<2)|0, apicid_8131_1, 0x2);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (2<<2)|1, apicid_8131_1, 0x3);//
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (2<<2)|2, apicid_8131_1, 0x0);//
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (2<<2)|0, apicid_8131_1, 0x2);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (2<<2)|1, apicid_8131_1, 0x3);//
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (2<<2)|2, apicid_8131_1, 0x0);//

diff --git a/src/mainboard/tyan/s4882/resourcemap.c b/src/mainboard/tyan/s4882/resourcemap.c
index 0e5be61a7cfb6d891a47c0d05b2111f0c702f3b6..2ee274960dac475f3415565d8e104ef4f7412f2d 100644 (file)
--- a/src/mainboard/tyan/s4882/resourcemap.c
+++ b/src/mainboard/tyan/s4882/resourcemap.c
@@ -144,7 +144,7 @@ static void setup_s4882_resource_map(void)
         *         1 = base/limit registers i are read-only
         * [ 7: 4] Reserved
         * [31: 8] Memory-Mapped I/O Base Address i (39-16)
         *         1 = base/limit registers i are read-only
         * [ 7: 4] Reserved
         * [31: 8] Memory-Mapped I/O Base Address i (39-16)

-        *         This field defines the upper address bits of a 40bit address 
+        *         This field defines the upper address bits of a 40bit address

         *         that defines the start of memory-mapped I/O region i
         */
        PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,
         *         that defines the start of memory-mapped I/O region i
         */
        PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,


@@ -200,7 +200,7 @@ static void setup_s4882_resource_map(void)
         * [ 3: 2] Reserved
         * [ 4: 4] VGA Enable
         *         0 = VGA matches Disabled
         * [ 3: 2] Reserved
         * [ 4: 4] VGA Enable
         *         0 = VGA matches Disabled

-        *         1 = matches all address < 64K and where A[9:0] is in the 
+        *         1 = matches all address < 64K and where A[9:0] is in the

         *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
         * [ 5: 5] ISA Enable
         *         0 = ISA matches Disabled
         *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
         * [ 5: 5] ISA Enable
         *         0 = ISA matches Disabled


@@ -208,7 +208,7 @@ static void setup_s4882_resource_map(void)
         *             from matching agains this base/limit pair
         * [11: 6] Reserved
         * [24:12] PCI I/O Base i
         *             from matching agains this base/limit pair
         * [11: 6] Reserved
         * [24:12] PCI I/O Base i

-        *         This field defines the start of PCI I/O region n 
+        *         This field defines the start of PCI I/O region n

         * [31:25] Reserved
         */
        PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000003,
         * [31:25] Reserved
         */
        PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000003,

diff --git a/src/mainboard/tyan/s4882/romstage.c b/src/mainboard/tyan/s4882/romstage.c
index e1931fc2d4cc9392480ebfd51a4697544a05ce78..9bec9de58b0c8e3d75c4dfbddb97aeafca230292 100644 (file)
--- a/src/mainboard/tyan/s4882/romstage.c
+++ b/src/mainboard/tyan/s4882/romstage.c
@@ -1,4 +1,4 @@
- 
+

 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>


@@ -70,7 +70,7 @@ static inline void change_i2c_mux(unsigned device)
 {
 #define SMBUS_HUB 0x18
         int ret, i;
 {
 #define SMBUS_HUB 0x18
         int ret, i;

-        print_debug("change_i2c_mux i="); print_debug_hex8(device); print_debug("\n"); 
+        print_debug("change_i2c_mux i="); print_debug_hex8(device); print_debug("\n");

         i=2;
         do {
                 ret = smbus_write_byte(SMBUS_HUB, 0x01, device);
         i=2;
         do {
                 ret = smbus_write_byte(SMBUS_HUB, 0x01, device);


@@ -93,7 +93,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 #include "lib/generic_sdram.c"
 
  /* tyan does not want the default */
 #include "lib/generic_sdram.c"
 
  /* tyan does not want the default */

-#include "resourcemap.c" 
+#include "resourcemap.c"

 
 #if CONFIG_LOGICAL_CPUS==1
 #define SET_NB_CFG_54 1
 
 #if CONFIG_LOGICAL_CPUS==1
 #define SET_NB_CFG_54 1


@@ -155,7 +155,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
                 bsp_apicid = init_cpus(cpu_init_detectedx);
         }
 
                 bsp_apicid = init_cpus(cpu_init_detectedx);
         }
 

-       
+

        w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
         uart_init();
         console_init();
        w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
         uart_init();
         console_init();


@@ -187,7 +187,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         nodes = get_nodes();
         //It's the time to set ctrl now;
         fill_mem_ctrl(nodes, ctrl, spd_addr);
         nodes = get_nodes();
         //It's the time to set ctrl now;
         fill_mem_ctrl(nodes, ctrl, spd_addr);

-       
+

        enable_smbus();
 
        memreset_setup();
        enable_smbus();
 
        memreset_setup();

diff --git a/src/mainboard/via/epia-cn/romstage.c b/src/mainboard/via/epia-cn/romstage.c
index 74cd29a5f4ff77eda3bc408b6c4497b588592fdb..6d37e6bdf9cbbe5515fbaf2925913e74d5a97847 100644 (file)
--- a/src/mainboard/via/epia-cn/romstage.c
+++ b/src/mainboard/via/epia-cn/romstage.c
@@ -47,7 +47,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 static void enable_mainboard_devices(void)
 {
        device_t dev;
 static void enable_mainboard_devices(void)
 {
        device_t dev;

- 
+

        dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT8237R_LPC), 0);
        if (dev == PCI_DEV_INVALID)
                die("Southbridge not found!!!\n");
        dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT8237R_LPC), 0);
        if (dev == PCI_DEV_INVALID)
                die("Southbridge not found!!!\n");

diff --git a/src/mainboard/via/epia-m/acpi_tables.c b/src/mainboard/via/epia-m/acpi_tables.c
index 69c526c1fe20e4b34a37526c9d4c4b68c64dffab..9e42bc25a588416967ca4613cea24011153e45f1 100644 (file)
--- a/src/mainboard/via/epia-m/acpi_tables.c
+++ b/src/mainboard/via/epia-m/acpi_tables.c
@@ -1,7 +1,7 @@
 /*
  * coreboot ACPI Table support
  * written by Stefan Reinauer <stepan@openbios.org>
 /*
  * coreboot ACPI Table support
  * written by Stefan Reinauer <stepan@openbios.org>

- * ACPI FADT, FACS, and DSDT table support added by 
+ * ACPI FADT, FACS, and DSDT table support added by

  * Nick Barker <nick.barker9@btinternet.com>, and those portions
  * (C) Copyright 2004 Nick Barker
  * (C) Copyright 2005 Stefan Reinauer
  * Nick Barker <nick.barker9@btinternet.com>, and those portions
  * (C) Copyright 2004 Nick Barker
  * (C) Copyright 2005 Stefan Reinauer


@@ -45,11 +45,11 @@ unsigned long write_acpi_tables(unsigned long start)
        acpi_fadt_t *fadt;
        acpi_facs_t *facs;
        acpi_header_t *dsdt;
        acpi_fadt_t *fadt;
        acpi_facs_t *facs;
        acpi_header_t *dsdt;

-       
+

        /* Align ACPI tables to 16byte */
        start   = ( start + 0x0f ) & -0x10;
        current = start;
        /* Align ACPI tables to 16byte */
        start   = ( start + 0x0f ) & -0x10;
        current = start;

-       
+

        printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx...\n", start);
 
        /* We need at least an RSDP and an RSDT Table */
        printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx...\n", start);
 
        /* We need at least an RSDP and an RSDT Table */


@@ -60,10 +60,10 @@ unsigned long write_acpi_tables(unsigned long start)
 
        /* clear all table memory */
        memset((void *)start, 0, current - start);
 
        /* clear all table memory */
        memset((void *)start, 0, current - start);

-       
+

        acpi_write_rsdp(rsdp, rsdt, NULL);
        acpi_write_rsdt(rsdt);
        acpi_write_rsdp(rsdp, rsdt, NULL);
        acpi_write_rsdt(rsdt);

-       
+

        /*
         * We explicitly add these tables later on:
         */
        /*
         * We explicitly add these tables later on:
         */

diff --git a/src/mainboard/via/epia-m/devicetree.cb b/src/mainboard/via/epia-m/devicetree.cb
index e49090e7891ba1b102e120385637c93463830b23..ed543a21aa7b534ad2d462539c30e298e37f5f26 100644 (file)
--- a/src/mainboard/via/epia-m/devicetree.cb
+++ b/src/mainboard/via/epia-m/devicetree.cb
@@ -2,7 +2,7 @@ chip northbridge/via/vt8623
 
        device apic_cluster 0 on
                chip cpu/via/model_c3
 
        device apic_cluster 0 on
                chip cpu/via/model_c3

-                       device apic 0 on  end 
+                       device apic 0 on  end

                end
        end
 
                end
        end
 


@@ -44,7 +44,7 @@ chip northbridge/via/vt8623
 
                                end
                        end
 
                                end
                        end

-                       
+

                        device pci 11.1 on  end # IDE
                        # 2-4 non existant?
                        device pci 11.5 on  end # AC97 Audio
                        device pci 11.1 on  end # IDE
                        # 2-4 non existant?
                        device pci 11.5 on  end # AC97 Audio


@@ -55,7 +55,7 @@ chip northbridge/via/vt8623
                chip southbridge/ricoh/rl5c476
                        register "enable_cf" = "1"
                        device pci 0a.0 on end
                chip southbridge/ricoh/rl5c476
                        register "enable_cf" = "1"
                        device pci 0a.0 on end

-                       device pci 0a.1 on end  
+                       device pci 0a.1 on end

                end
        end
 end
                end
        end
 end

diff --git a/src/mainboard/via/epia-m/dsdt.asl b/src/mainboard/via/epia-m/dsdt.asl
index b1b791d5f25981aca659af81e2d2427b6571b985..cbc8d24e41c1d07fddb72f6f3ecf0dddc8492b59 100644 (file)
--- a/src/mainboard/via/epia-m/dsdt.asl
+++ b/src/mainboard/via/epia-m/dsdt.asl
@@ -2,12 +2,12 @@
  * Minimalist ACPI DSDT table for EPIA-M / MII
  * (C) Copyright 2004 Nick Barker <Nick.Barker9@btinternet.com>
  *
  * Minimalist ACPI DSDT table for EPIA-M / MII
  * (C) Copyright 2004 Nick Barker <Nick.Barker9@btinternet.com>
  *

- * 
+ *

  */
 
 DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
 {
  */
 
 DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
 {

-       /*  
+       /*

         * Define the main processor
         */
        Scope (\_PR)
         * Define the main processor
         */
        Scope (\_PR)


@@ -26,7 +26,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
        /* Root of the bus hierarchy */
        Scope (\_SB)
        {
        /* Root of the bus hierarchy */
        Scope (\_SB)
        {

-               /* Define how interrupt Link A is plumbed in */ 
+               /* Define how interrupt Link A is plumbed in */

                Device (LNKA)
                {
                        Name (_HID, EisaId ("PNP0C0F"))
                Device (LNKA)
                {
                        Name (_HID, EisaId ("PNP0C0F"))


@@ -36,7 +36,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
                        {
                                Return (0x0B)
                        }
                        {
                                Return (0x0B)
                        }

-                       /* Current Resources - return irq set up in BIOS */  
+                       /* Current Resources - return irq set up in BIOS */

                        Method (_CRS, 0, NotSerialized)
                        {
                                Name (BUFF, ResourceTemplate ()
                        Method (_CRS, 0, NotSerialized)
                        {
                                Name (BUFF, ResourceTemplate ()


@@ -47,7 +47,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
                        }
                        /* Possible Resources - return the range of irqs
                         * we are using for PCI - only here to keep Linux ACPI
                        }
                        /* Possible Resources - return the range of irqs
                         * we are using for PCI - only here to keep Linux ACPI

-                        * happy 
+                        * happy

                         */
                        Method (_PRS, 0, NotSerialized)
                        {
                         */
                        Method (_PRS, 0, NotSerialized)
                        {


@@ -59,16 +59,16 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
                        }
                        /* Set Resources - dummy function to keep Linux ACPI happy
                          * Linux is more than happy not to tinker with irq
                        }
                        /* Set Resources - dummy function to keep Linux ACPI happy
                          * Linux is more than happy not to tinker with irq

-                        * assignments as long as the CRS and STA functions 
+                        * assignments as long as the CRS and STA functions

                         * return good values
                         */
                        Method (_SRS, 1, NotSerialized ) {}
                        /* Disable - dummy function to keep Linux ACPI happy */
                        Method (_DIS, 0, NotSerialized ) {}
                         * return good values
                         */
                        Method (_SRS, 1, NotSerialized ) {}
                        /* Disable - dummy function to keep Linux ACPI happy */
                        Method (_DIS, 0, NotSerialized ) {}

- 
-               } // End of LNKA 

 
 

-               /* Define how interrupt Link B is plumbed in */ 
+               } // End of LNKA
+
+               /* Define how interrupt Link B is plumbed in */

                Device (LNKB)
                {
                        Name (_HID, EisaId ("PNP0C0F"))
                Device (LNKB)
                {
                        Name (_HID, EisaId ("PNP0C0F"))


@@ -78,7 +78,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
                        {
                                Return (0x0B)
                        }
                        {
                                Return (0x0B)
                        }

-                       /* Current Resources - return irq set up in BIOS */  
+                       /* Current Resources - return irq set up in BIOS */

                        Method (_CRS, 0, NotSerialized)
                        {
                                Name (BUFF, ResourceTemplate ()
                        Method (_CRS, 0, NotSerialized)
                        {
                                Name (BUFF, ResourceTemplate ()


@@ -89,7 +89,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
                        }
                        /* Possible Resources - return the range of irqs
                         * we are using for PCI - only here to keep Linux ACPI
                        }
                        /* Possible Resources - return the range of irqs
                         * we are using for PCI - only here to keep Linux ACPI

-                        * happy 
+                        * happy

                         */
                        Method (_PRS, 0, NotSerialized)
                        {
                         */
                        Method (_PRS, 0, NotSerialized)
                        {


@@ -101,16 +101,16 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
                        }
                        /* Set Resources - dummy function to keep Linux ACPI happy
                          * Linux is more than happy not to tinker with irq
                        }
                        /* Set Resources - dummy function to keep Linux ACPI happy
                          * Linux is more than happy not to tinker with irq

-                        * assignments as long as the CRS and STA functions 
+                        * assignments as long as the CRS and STA functions

                         * return good values
                         */
                        Method (_SRS, 1, NotSerialized ) {}
                        /* Disable - dummy function to keep Linux ACPI happy */
                        Method (_DIS, 0, NotSerialized ) {}
                         * return good values
                         */
                        Method (_SRS, 1, NotSerialized ) {}
                        /* Disable - dummy function to keep Linux ACPI happy */
                        Method (_DIS, 0, NotSerialized ) {}

- 
+

                } // End of LNKB
 
                } // End of LNKB
 

-               /* Define how interrupt Link C is plumbed in */ 
+               /* Define how interrupt Link C is plumbed in */

                Device (LNKC)
                {
                        Name (_HID, EisaId ("PNP0C0F"))
                Device (LNKC)
                {
                        Name (_HID, EisaId ("PNP0C0F"))


@@ -120,7 +120,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
                        {
                                Return (0x0B)
                        }
                        {
                                Return (0x0B)
                        }

-                       /* Current Resources - return irq set up in BIOS */  
+                       /* Current Resources - return irq set up in BIOS */

                        Method (_CRS, 0, NotSerialized)
                        {
                                Name (BUFF, ResourceTemplate ()
                        Method (_CRS, 0, NotSerialized)
                        {
                                Name (BUFF, ResourceTemplate ()


@@ -131,7 +131,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
                        }
                        /* Possible Resources - return the range of irqs
                         * we are using for PCI - only here to keep Linux ACPI
                        }
                        /* Possible Resources - return the range of irqs
                         * we are using for PCI - only here to keep Linux ACPI

-                        * happy 
+                        * happy

                         */
                        Method (_PRS, 0, NotSerialized)
                        {
                         */
                        Method (_PRS, 0, NotSerialized)
                        {


@@ -143,16 +143,16 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
                        }
                        /* Set Resources - dummy function to keep Linux ACPI happy
                          * Linux is more than happy not to tinker with irq
                        }
                        /* Set Resources - dummy function to keep Linux ACPI happy
                          * Linux is more than happy not to tinker with irq

-                        * assignments as long as the CRS and STA functions 
+                        * assignments as long as the CRS and STA functions

                         * return good values
                         */
                        Method (_SRS, 1, NotSerialized ) {}
                        /* Disable - dummy function to keep Linux ACPI happy */
                        Method (_DIS, 0, NotSerialized ) {}
                         * return good values
                         */
                        Method (_SRS, 1, NotSerialized ) {}
                        /* Disable - dummy function to keep Linux ACPI happy */
                        Method (_DIS, 0, NotSerialized ) {}

- 
+

                } // End of LNKC
 
                } // End of LNKC
 

-               /* Define how interrupt Link D is plumbed in */ 
+               /* Define how interrupt Link D is plumbed in */

                Device (LNKD)
                {
                        Name (_HID, EisaId ("PNP0C0F"))
                Device (LNKD)
                {
                        Name (_HID, EisaId ("PNP0C0F"))


@@ -162,7 +162,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
                        {
                                Return (0x0B)
                        }
                        {
                                Return (0x0B)
                        }

-                       /* Current Resources - return irq set up in BIOS */  
+                       /* Current Resources - return irq set up in BIOS */

                        Method (_CRS, 0, NotSerialized)
                        {
                                Name (BUFF, ResourceTemplate ()
                        Method (_CRS, 0, NotSerialized)
                        {
                                Name (BUFF, ResourceTemplate ()


@@ -173,7 +173,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
                        }
                        /* Possible Resources - return the range of irqs
                         * we are using for PCI - only here to keep Linux ACPI
                        }
                        /* Possible Resources - return the range of irqs
                         * we are using for PCI - only here to keep Linux ACPI

-                        * happy 
+                        * happy

                         */
                        Method (_PRS, 0, NotSerialized)
                        {
                         */
                        Method (_PRS, 0, NotSerialized)
                        {


@@ -185,16 +185,16 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
                        }
                        /* Set Resources - dummy function to keep Linux ACPI happy
                          * Linux is more than happy not to tinker with irq
                        }
                        /* Set Resources - dummy function to keep Linux ACPI happy
                          * Linux is more than happy not to tinker with irq

-                        * assignments as long as the CRS and STA functions 
+                        * assignments as long as the CRS and STA functions

                         * return good values
                         */
                        Method (_SRS, 1, NotSerialized ) {}
                        /* Disable - dummy function to keep Linux ACPI happy */
                        Method (_DIS, 0, NotSerialized ) {}
                         * return good values
                         */
                        Method (_SRS, 1, NotSerialized ) {}
                        /* Disable - dummy function to keep Linux ACPI happy */
                        Method (_DIS, 0, NotSerialized ) {}

- 
-               } // End of LNKD 

 
 

- 
+               } // End of LNKD
+
+

                /* top PCI device */
                Device (PCI0)
                {
                /* top PCI device */
                Device (PCI0)
                {


@@ -226,12 +226,12 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
                                Package () {0x0011FFFF, 0x02, LNKC, 0x00}, // vt8623 Link C
                                Package () {0x0011FFFF, 0x03, LNKD, 0x00}, // vt8623 Link D
 
                                Package () {0x0011FFFF, 0x02, LNKC, 0x00}, // vt8623 Link C
                                Package () {0x0011FFFF, 0x03, LNKD, 0x00}, // vt8623 Link D
 

-                               Package () {0x0012FFFF, 0x00, LNKA, 0x00}, // LAN Link A 
+                               Package () {0x0012FFFF, 0x00, LNKA, 0x00}, // LAN Link A

                                Package () {0x0012FFFF, 0x01, LNKB, 0x00}, // LAN Link B
                                Package () {0x0012FFFF, 0x02, LNKC, 0x00}, // LAN Link C
                                Package () {0x0012FFFF, 0x03, LNKD, 0x00}, // LAN Link D
 
                                Package () {0x0012FFFF, 0x01, LNKB, 0x00}, // LAN Link B
                                Package () {0x0012FFFF, 0x02, LNKC, 0x00}, // LAN Link C
                                Package () {0x0012FFFF, 0x03, LNKD, 0x00}, // LAN Link D
 

-                               Package () {0x0013FFFF, 0x00, LNKA, 0x00}, // Riser slot LinkA 
+                               Package () {0x0013FFFF, 0x00, LNKA, 0x00}, // Riser slot LinkA

                                Package () {0x0013FFFF, 0x01, LNKB, 0x00}, // Riser slot LinkB
                                Package () {0x0013FFFF, 0x02, LNKC, 0x00}, // Riser slot LinkC
                                Package () {0x0013FFFF, 0x03, LNKD, 0x00}, // Riser slot LinkD
                                Package () {0x0013FFFF, 0x01, LNKB, 0x00}, // Riser slot LinkB
                                Package () {0x0013FFFF, 0x02, LNKC, 0x00}, // Riser slot LinkC
                                Package () {0x0013FFFF, 0x03, LNKD, 0x00}, // Riser slot LinkD


@@ -240,7 +240,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
                                Package () {0x0014FFFF, 0x01, LNKC, 0x00}, // Slot 1, Link C
                                Package () {0x0014FFFF, 0x02, LNKD, 0x00}, // Slot 1, Link D
                                Package () {0x0014FFFF, 0x03, LNKA, 0x00}, // Slot 1, Link A
                                Package () {0x0014FFFF, 0x01, LNKC, 0x00}, // Slot 1, Link C
                                Package () {0x0014FFFF, 0x02, LNKD, 0x00}, // Slot 1, Link D
                                Package () {0x0014FFFF, 0x03, LNKA, 0x00}, // Slot 1, Link A

-                
+

                                Package () {0x0001FFFF, 0x00, LNKA, 0x00}, // VGA Link A
                                Package () {0x0001FFFF, 0x01, LNKB, 0x00}, // VGA Link B
                                Package () {0x0001FFFF, 0x02, LNKC, 0x00}, // VGA Link C
                                Package () {0x0001FFFF, 0x00, LNKA, 0x00}, // VGA Link A
                                Package () {0x0001FFFF, 0x01, LNKB, 0x00}, // VGA Link B
                                Package () {0x0001FFFF, 0x02, LNKC, 0x00}, // VGA Link C

diff --git a/src/mainboard/via/epia-m/dsdt.c b/src/mainboard/via/epia-m/dsdt.c
index fa878250f5515e5a14e7fb3a62832bb356cdaee1..ca40651973c8fce538debac8120a8c983474598b 100644 (file)
--- a/src/mainboard/via/epia-m/dsdt.c
+++ b/src/mainboard/via/epia-m/dsdt.c
@@ -1,12 +1,12 @@
 /*
 /*

- * 
+ *

  * Intel ACPI Component Architecture
  * ASL Optimizing Compiler version 20060127 [Apr 23 2006]
  * Copyright (C) 2000 - 2006 Intel Corporation
  * Supports ACPI Specification Revision 3.0a
  * Intel ACPI Component Architecture
  * ASL Optimizing Compiler version 20060127 [Apr 23 2006]
  * Copyright (C) 2000 - 2006 Intel Corporation
  * Supports ACPI Specification Revision 3.0a

- * 
+ *

  * Compilation of "dsdt.asl" - Wed Sep  6 11:36:08 2006
  * Compilation of "dsdt.asl" - Wed Sep  6 11:36:08 2006

- * 
+ *

  * C source code output
  *
  */
  * C source code output
  *
  */

diff --git a/src/mainboard/via/epia-m/irq_tables.c b/src/mainboard/via/epia-m/irq_tables.c
index 551db214a8c4e36071176e43f12a9974276bfe1b..f7776f6d2081e977af8f6b44dd6c1e4f6cf2bb76 100644 (file)
--- a/src/mainboard/via/epia-m/irq_tables.c
+++ b/src/mainboard/via/epia-m/irq_tables.c
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!

    (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
  *
    (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
  *

diff --git a/src/mainboard/via/epia-m/romstage.c b/src/mainboard/via/epia-m/romstage.c
index 6a8446ac04cafc254aadf6a649f8aa0d2df487a1..54feb26552f88d484595cae45bcb20be1e423715 100644 (file)
--- a/src/mainboard/via/epia-m/romstage.c
+++ b/src/mainboard/via/epia-m/romstage.c
@@ -26,27 +26,27 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 #include "northbridge/via/vt8623/raminit.c"
 
 
 #include "northbridge/via/vt8623/raminit.c"
 

-static void enable_mainboard_devices(void) 
+static void enable_mainboard_devices(void)

 {
        device_t dev;
 {
        device_t dev;

-  
+

        dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_VIA,
                                PCI_DEVICE_ID_VIA_8235), 0);
        dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_VIA,
                                PCI_DEVICE_ID_VIA_8235), 0);

-  
+

        if (dev == PCI_DEV_INVALID) {
                die("Southbridge not found!!!\n");
        }
        pci_write_config8(dev, 0x50, 0x80);
        pci_write_config8(dev, 0x51, 0x1f);
 #if 0
        if (dev == PCI_DEV_INVALID) {
                die("Southbridge not found!!!\n");
        }
        pci_write_config8(dev, 0x50, 0x80);
        pci_write_config8(dev, 0x51, 0x1f);
 #if 0

-       // This early setup switches IDE into compatibility mode before PCI gets 
+       // This early setup switches IDE into compatibility mode before PCI gets

        // a chance to assign I/Os
        // movl    $CONFIG_ADDR(0, 0x89, 0x42), %eax
        // //      movb    $0x09, %dl
        // movb    $0x00, %dl
        // PCI_WRITE_CONFIG_BYTE
 #endif
        // a chance to assign I/Os
        // movl    $CONFIG_ADDR(0, 0x89, 0x42), %eax
        // //      movb    $0x09, %dl
        // movb    $0x00, %dl
        // PCI_WRITE_CONFIG_BYTE
 #endif

-       /* we do this here as in V2, we can not yet do raw operations 
+       /* we do this here as in V2, we can not yet do raw operations

         * to pci!
         */
         dev += 0x100; /* ICKY */
         * to pci!
         */
         dev += 0x100; /* ICKY */


@@ -58,7 +58,7 @@ static void enable_mainboard_devices(void)
        pci_write_config8(dev, 0x3d, 0);
 }
 
        pci_write_config8(dev, 0x3d, 0);
 }
 

-static void enable_shadow_ram(void) 
+static void enable_shadow_ram(void)

 {
        device_t dev = 0; /* no need to look up 0:0.0 */
        unsigned char shadowreg;
 {
        device_t dev = 0; /* no need to look up 0:0.0 */
        unsigned char shadowreg;


@@ -108,7 +108,7 @@ static void main(unsigned long bist)
        enable_shadow_ram();
 
        ddr_ram_setup((const struct mem_controller *)0);
        enable_shadow_ram();
 
        ddr_ram_setup((const struct mem_controller *)0);

-       
+

        /* Check all of memory */
 #if 0
        static const struct {
        /* Check all of memory */
 #if 0
        static const struct {


@@ -129,7 +129,7 @@ static void main(unsigned long bist)
        }
 
        //dump_pci_devices();
        }
 
        //dump_pci_devices();

-       
+

        print_spew("Leaving romstage.c:main()\n");
 }
 
        print_spew("Leaving romstage.c:main()\n");
 }
 

diff --git a/src/mainboard/via/epia-m700/romstage.c b/src/mainboard/via/epia-m700/romstage.c
index 2e51c958d047ae6229a7955ddf5f9453b5380a2b..ac2e202d6aec28b96d4cb2aaa9bfd15389032e51 100644 (file)
--- a/src/mainboard/via/epia-m700/romstage.c
+++ b/src/mainboard/via/epia-m700/romstage.c
@@ -547,7 +547,7 @@ void main(unsigned long bist)
        /*
         * For coreboot most time of S3 resume is the same as normal boot,
         * so some memory area under 1M become dirty, so before this happen,
        /*
         * For coreboot most time of S3 resume is the same as normal boot,
         * so some memory area under 1M become dirty, so before this happen,

-        * I need to backup the content of mem to top-mem. 
+        * I need to backup the content of mem to top-mem.

         *
         * I will reserve the 1M top-men in LBIO table in coreboot_table.c
         * and recovery the content of 1M-mem in wakeup.c.
         *
         * I will reserve the 1M top-men in LBIO table in coreboot_table.c
         * and recovery the content of 1M-mem in wakeup.c.


@@ -628,7 +628,7 @@ void main(unsigned long bist)
                );
 #endif
 
                );
 #endif
 

-               /* 
+               /*

                 * WAKE_MEM_INFO is inited in get_set_top_available_mem()
                 * in tables.c these two memcpy() not not be enabled if set
                 * the MTRR around this two lines.
                 * WAKE_MEM_INFO is inited in get_set_top_available_mem()
                 * in tables.c these two memcpy() not not be enabled if set
                 * the MTRR around this two lines.

diff --git a/src/mainboard/via/epia-n/acpi_tables.c b/src/mainboard/via/epia-n/acpi_tables.c
index 1944b18de6b995481dbe6cc97bf71e28bd5e84c4..7cfa15114c2b212ac61109c9b1b46933b568df9b 100644 (file)
--- a/src/mainboard/via/epia-n/acpi_tables.c
+++ b/src/mainboard/via/epia-n/acpi_tables.c
@@ -1,7 +1,7 @@
 /*
  * coreboot ACPI Table support
  * written by Stefan Reinauer <stepan@openbios.org>
 /*
  * coreboot ACPI Table support
  * written by Stefan Reinauer <stepan@openbios.org>

- * ACPI FADT, FACS, and DSDT table support added by 
+ * ACPI FADT, FACS, and DSDT table support added by

  * Nick Barker <nick.barker9@btinternet.com>, and those portions
  * (C) Copyright 2004 Nick Barker
  * (C) Copyright 2005 Stefan Reinauer
  * Nick Barker <nick.barker9@btinternet.com>, and those portions
  * (C) Copyright 2004 Nick Barker
  * (C) Copyright 2005 Stefan Reinauer


@@ -130,11 +130,11 @@ unsigned long write_acpi_tables(unsigned long start)
        acpi_fadt_t *fadt;
        acpi_facs_t *facs;
        acpi_header_t *dsdt;
        acpi_fadt_t *fadt;
        acpi_facs_t *facs;
        acpi_header_t *dsdt;

-       
+

        /* Align ACPI tables to 16byte */
        start   = ( start + 0x0f ) & -0x10;
        current = start;
        /* Align ACPI tables to 16byte */
        start   = ( start + 0x0f ) & -0x10;
        current = start;

-       
+

        printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx...\n", start);
 
        /* We need at least an RSDP and an RSDT Table */
        printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx...\n", start);
 
        /* We need at least an RSDP and an RSDT Table */


@@ -145,10 +145,10 @@ unsigned long write_acpi_tables(unsigned long start)
 
        /* clear all table memory */
        memset((void *)start, 0, current - start);
 
        /* clear all table memory */
        memset((void *)start, 0, current - start);

-       
+

        acpi_write_rsdp(rsdp, rsdt, NULL);
        acpi_write_rsdt(rsdt);
        acpi_write_rsdp(rsdp, rsdt, NULL);
        acpi_write_rsdt(rsdt);

-       
+

        /*
         * We explicitly add these tables later on:
         */
        /*
         * We explicitly add these tables later on:
         */

diff --git a/src/mainboard/via/epia-n/dsdt.asl b/src/mainboard/via/epia-n/dsdt.asl
index 90731501ed2d5a55bdf176255de10d0fd98c65bd..e50ee6b50c10659e1c61d9825ea4935ab396f8fd 100644 (file)
--- a/src/mainboard/via/epia-n/dsdt.asl
+++ b/src/mainboard/via/epia-n/dsdt.asl
@@ -3,7 +3,7 @@
  * (C) Copyright 2009 Jon Harrison <jon.harrison@blueyonder.co.uk>
  * Heavily based on EPIA-M dstd.asl
  * (C) Copyright 2004 Nick Barker <Nick.Barker9@btinternet.com>
  * (C) Copyright 2009 Jon Harrison <jon.harrison@blueyonder.co.uk>
  * Heavily based on EPIA-M dstd.asl
  * (C) Copyright 2004 Nick Barker <Nick.Barker9@btinternet.com>

- * 
+ *

  */
 DefinitionBlock ("dsdt.aml", "DSDT", 1, "CBT-V2", "CBT-DSDT", 1)
 {
  */
 DefinitionBlock ("dsdt.aml", "DSDT", 1, "CBT-V2", "CBT-DSDT", 1)
 {

diff --git a/src/mainboard/via/epia-n/romstage.c b/src/mainboard/via/epia-n/romstage.c
index 6ca72f293ed8b83ba7738b6b5ea7bc30d8224ac6..df9f82ea9b4c4474e66de23e72ebed07609dde35 100644 (file)
--- a/src/mainboard/via/epia-n/romstage.c
+++ b/src/mainboard/via/epia-n/romstage.c
@@ -41,8 +41,8 @@
 #define SERIAL_DEV PNP_DEV(0x2e, W83697HF_SP1)
 
 /*
 #define SERIAL_DEV PNP_DEV(0x2e, W83697HF_SP1)
 
 /*

- * NOOB ::                     
- * d0f0 - Device 0 Function 0 etc. 
+ * NOOB ::
+ * d0f0 - Device 0 Function 0 etc.

  */
 static const struct mem_controller ctrl = {
        .d0f0 = 0x0000,
  */
 static const struct mem_controller ctrl = {
        .d0f0 = 0x0000,


@@ -65,7 +65,7 @@ static void enable_mainboard_devices(void)
 {
        device_t dev;
        u8 reg;
 {
        device_t dev;
        u8 reg;

- 
+

        dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT8237R_LPC), 0);
        if (dev == PCI_DEV_INVALID)
                die("Southbridge not found!!!\n");
        dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT8237R_LPC), 0);
        if (dev == PCI_DEV_INVALID)
                die("Southbridge not found!!!\n");


@@ -95,10 +95,10 @@ static void enable_mainboard_devices(void)
        pci_write_config8(dev, 0x51, 0x9d);
 }
 
        pci_write_config8(dev, 0x51, 0x9d);
 }
 

-static void enable_shadow_ram(void) 
+static void enable_shadow_ram(void)

 {
        unsigned char shadowreg;
 {
        unsigned char shadowreg;

-       
+

        shadowreg = pci_read_config8(ctrl.d0f3, 0x82);
        /* 0xf0000-0xfffff Read/Write*/
        shadowreg |= 0x30;
        shadowreg = pci_read_config8(ctrl.d0f3, 0x82);
        /* 0xf0000-0xfffff Read/Write*/
        shadowreg |= 0x30;


@@ -133,10 +133,10 @@ static void main(unsigned long bist)
 
        print_debug("Enable F-ROM Shadow RAM\n");
        enable_shadow_ram();
 
        print_debug("Enable F-ROM Shadow RAM\n");
        enable_shadow_ram();

-       
+

        /* setup cpu */
        print_debug("Setup CPU Interface\n");
        /* setup cpu */
        print_debug("Setup CPU Interface\n");

-       c3_cpu_setup(ctrl.d0f2);        
+       c3_cpu_setup(ctrl.d0f2);

 
        ddr_ram_setup();
 
 
        ddr_ram_setup();
 


@@ -144,7 +144,7 @@ static void main(unsigned long bist)
                print_debug("doing early_mtrr\n");
                early_mtrr_init();
        }
                print_debug("doing early_mtrr\n");
                early_mtrr_init();
        }

-       
+

        //ram_check(0, 640 * 1024);
 
        print_spew("Leaving romstage.c:main()\n");
        //ram_check(0, 640 * 1024);
 
        print_spew("Leaving romstage.c:main()\n");

diff --git a/src/mainboard/via/epia/irq_tables.c b/src/mainboard/via/epia/irq_tables.c
index f3978d5e815c551e68d345b006dc9a2e674fbdcc..8b4352d25a2a7a6515eed600827fbe3ab10d58da 100644 (file)
--- a/src/mainboard/via/epia/irq_tables.c
+++ b/src/mainboard/via/epia/irq_tables.c
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!

    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 
    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 

diff --git a/src/mainboard/via/epia/romstage.c b/src/mainboard/via/epia/romstage.c
index 202b117a42b9a8dcb61384464bb65c92e1a2780a..66a8d203ed30803c602d9b85cd2ba4484e539609 100644 (file)
--- a/src/mainboard/via/epia/romstage.c
+++ b/src/mainboard/via/epia/romstage.c
@@ -27,13 +27,13 @@ static inline int spd_read_byte(unsigned device, unsigned address)
   #include "lib/generic_sdram.c"
 */
 
   #include "lib/generic_sdram.c"
 */
 

-static void enable_mainboard_devices(void) 
+static void enable_mainboard_devices(void)

 {
        device_t dev;
        /* dev 0 for southbridge */
 {
        device_t dev;
        /* dev 0 for southbridge */

-  
+

        dev = pci_locate_device(PCI_ID(0x1106,0x8231), 0);
        dev = pci_locate_device(PCI_ID(0x1106,0x8231), 0);

-  
+

        if (dev == PCI_DEV_INVALID) {
                die("Southbridge not found!!!\n");
        }
        if (dev == PCI_DEV_INVALID) {
                die("Southbridge not found!!!\n");
        }


@@ -41,7 +41,7 @@ static void enable_mainboard_devices(void)
        pci_write_config8(dev, 0x50, 7);
        pci_write_config8(dev, 0x51, 0xff);
 #if 0
        pci_write_config8(dev, 0x50, 7);
        pci_write_config8(dev, 0x51, 0xff);
 #if 0

-       // This early setup switches IDE into compatibility mode before PCI gets 
+       // This early setup switches IDE into compatibility mode before PCI gets

        // a chance to assign I/Os
        //   movl    $CONFIG_ADDR(0, 0x89, 0x42), %eax
        //   movb    $0x09, %dl
        // a chance to assign I/Os
        //   movl    $CONFIG_ADDR(0, 0x89, 0x42), %eax
        //   movb    $0x09, %dl


@@ -49,7 +49,7 @@ static void enable_mainboard_devices(void)
        //   PCI_WRITE_CONFIG_BYTE
        //
 #endif
        //   PCI_WRITE_CONFIG_BYTE
        //
 #endif

-       /* we do this here as in V2, we can not yet do raw operations 
+       /* we do this here as in V2, we can not yet do raw operations

         * to pci!
         */
        /* changed this to work correctly on later revisions of LB.
         * to pci!
         */
        /* changed this to work correctly on later revisions of LB.


@@ -64,7 +64,7 @@ static void enable_mainboard_devices(void)
        pci_write_config8(dev, 0x42, 0);
 }
 
        pci_write_config8(dev, 0x42, 0);
 }
 

-static void enable_shadow_ram(void) 
+static void enable_shadow_ram(void)

 {
        device_t dev = 0;
        unsigned char shadowreg;
 {
        device_t dev = 0;
        unsigned char shadowreg;


@@ -86,7 +86,7 @@ static void main(unsigned long bist)
 
        /* Halt if there was a built in self test failure */
        report_bist_failure(bist);
 
        /* Halt if there was a built in self test failure */
        report_bist_failure(bist);

-       
+

        enable_mainboard_devices();
        enable_smbus();
        enable_shadow_ram();
        enable_mainboard_devices();
        enable_smbus();
        enable_shadow_ram();


@@ -98,7 +98,7 @@ static void main(unsigned long bist)
        sdram_set_registers((const struct mem_controller *) 0);
        sdram_set_spd_registers((const struct mem_controller *) 0);
        sdram_enable(0, (const struct mem_controller *) 0);
        sdram_set_registers((const struct mem_controller *) 0);
        sdram_set_spd_registers((const struct mem_controller *) 0);
        sdram_enable(0, (const struct mem_controller *) 0);

-       
+

        /* Check all of memory */
 #if 0
        ram_check(0x00000000, msr.lo);
        /* Check all of memory */
 #if 0
        ram_check(0x00000000, msr.lo);

diff --git a/src/mainboard/via/vt8454c/acpi/irq-p2p-bridge.asl b/src/mainboard/via/vt8454c/acpi/irq-p2p-bridge.asl
index 4a294bcbaabbc3c059d0699d9038cf11ddc96317..1505683563f9ea437f2b30fa134042293499b96a 100644 (file)
--- a/src/mainboard/via/vt8454c/acpi/irq-p2p-bridge.asl
+++ b/src/mainboard/via/vt8454c/acpi/irq-p2p-bridge.asl
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
 /*
  * This file is part of the coreboot project.

- * 
+ *

  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or
  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or


@@ -22,67 +22,67 @@
 Name (PICM, Package () {
        //           _ADR        PIN   SRC   IDX
 
 Name (PICM, Package () {
        //           _ADR        PIN   SRC   IDX
 

-       Package () { 0x0003FFFF, 0x00, LNKA, 0x00 }, 
-       Package () { 0x0003FFFF, 0x01, LNKB, 0x00 }, 
-       Package () { 0x0003FFFF, 0x02, LNKC, 0x00 }, 
-       Package () { 0x0003FFFF, 0x03, LNKD, 0x00 }, 
-       
-       Package () { 0x0004FFFF, 0x00, LNKB, 0x00 }, 
-       Package () { 0x0004FFFF, 0x01, LNKC, 0x00 }, 
-       Package () { 0x0004FFFF, 0x02, LNKD, 0x00 }, 
-       Package () { 0x0004FFFF, 0x03, LNKA, 0x00 }, 
-       
-       Package () { 0x0005FFFF, 0x00, LNKC, 0x00 }, 
-       Package () { 0x0005FFFF, 0x01, LNKD, 0x00 }, 
-       Package () { 0x0005FFFF, 0x02, LNKA, 0x00 }, 
-       Package () { 0x0005FFFF, 0x03, LNKB, 0x00 }, 
-       
-       Package () { 0x0006FFFF, 0x00, LNKD, 0x00 }, 
-       Package () { 0x0006FFFF, 0x01, LNKA, 0x00 }, 
-       Package () { 0x0006FFFF, 0x02, LNKB, 0x00 }, 
-       Package () { 0x0006FFFF, 0x03, LNKC, 0x00 }, 
-       
-       Package () { 0x0007FFFF, 0x00, LNKA, 0x00 }, 
-       Package () { 0x0007FFFF, 0x01, LNKB, 0x00 }, 
-       Package () { 0x0007FFFF, 0x02, LNKC, 0x00 }, 
-       Package () { 0x0007FFFF, 0x03, LNKD, 0x00 }, 
-       
-       Package () { 0x0008FFFF, 0x00, LNKB, 0x00 }, 
-       Package () { 0x0008FFFF, 0x01, LNKC, 0x00 }, 
-       Package () { 0x0008FFFF, 0x02, LNKD, 0x00 }, 
-       Package () { 0x0008FFFF, 0x03, LNKA, 0x00 }, 
+       Package () { 0x0003FFFF, 0x00, LNKA, 0x00 },
+       Package () { 0x0003FFFF, 0x01, LNKB, 0x00 },
+       Package () { 0x0003FFFF, 0x02, LNKC, 0x00 },
+       Package () { 0x0003FFFF, 0x03, LNKD, 0x00 },
+
+       Package () { 0x0004FFFF, 0x00, LNKB, 0x00 },
+       Package () { 0x0004FFFF, 0x01, LNKC, 0x00 },
+       Package () { 0x0004FFFF, 0x02, LNKD, 0x00 },
+       Package () { 0x0004FFFF, 0x03, LNKA, 0x00 },
+
+       Package () { 0x0005FFFF, 0x00, LNKC, 0x00 },
+       Package () { 0x0005FFFF, 0x01, LNKD, 0x00 },
+       Package () { 0x0005FFFF, 0x02, LNKA, 0x00 },
+       Package () { 0x0005FFFF, 0x03, LNKB, 0x00 },
+
+       Package () { 0x0006FFFF, 0x00, LNKD, 0x00 },
+       Package () { 0x0006FFFF, 0x01, LNKA, 0x00 },
+       Package () { 0x0006FFFF, 0x02, LNKB, 0x00 },
+       Package () { 0x0006FFFF, 0x03, LNKC, 0x00 },
+
+       Package () { 0x0007FFFF, 0x00, LNKA, 0x00 },
+       Package () { 0x0007FFFF, 0x01, LNKB, 0x00 },
+       Package () { 0x0007FFFF, 0x02, LNKC, 0x00 },
+       Package () { 0x0007FFFF, 0x03, LNKD, 0x00 },
+
+       Package () { 0x0008FFFF, 0x00, LNKB, 0x00 },
+       Package () { 0x0008FFFF, 0x01, LNKC, 0x00 },
+       Package () { 0x0008FFFF, 0x02, LNKD, 0x00 },
+       Package () { 0x0008FFFF, 0x03, LNKA, 0x00 },

 })
 
 Name (APIC, Package () {
 })
 
 Name (APIC, Package () {

-       Package () { 0x0003FFFF, 0x00, 0x00, 0x10 }, 
-       Package () { 0x0003FFFF, 0x01, 0x00, 0x11 }, 
-       Package () { 0x0003FFFF, 0x02, 0x00, 0x12 }, 
-       Package () { 0x0003FFFF, 0x03, 0x00, 0x13 }, 
+       Package () { 0x0003FFFF, 0x00, 0x00, 0x10 },
+       Package () { 0x0003FFFF, 0x01, 0x00, 0x11 },
+       Package () { 0x0003FFFF, 0x02, 0x00, 0x12 },
+       Package () { 0x0003FFFF, 0x03, 0x00, 0x13 },

 
 

-       Package () { 0x0004FFFF, 0x00, 0x00, 0x11 }, 
-       Package () { 0x0004FFFF, 0x01, 0x00, 0x12 }, 
-       Package () { 0x0004FFFF, 0x02, 0x00, 0x13 }, 
-       Package () { 0x0004FFFF, 0x03, 0x00, 0x10 }, 
+       Package () { 0x0004FFFF, 0x00, 0x00, 0x11 },
+       Package () { 0x0004FFFF, 0x01, 0x00, 0x12 },
+       Package () { 0x0004FFFF, 0x02, 0x00, 0x13 },
+       Package () { 0x0004FFFF, 0x03, 0x00, 0x10 },

 
 

-       Package () { 0x0005FFFF, 0x00, 0x00, 0x12 }, 
-       Package () { 0x0005FFFF, 0x01, 0x00, 0x13 }, 
-       Package () { 0x0005FFFF, 0x02, 0x00, 0x10 }, 
-       Package () { 0x0005FFFF, 0x03, 0x00, 0x11 }, 
+       Package () { 0x0005FFFF, 0x00, 0x00, 0x12 },
+       Package () { 0x0005FFFF, 0x01, 0x00, 0x13 },
+       Package () { 0x0005FFFF, 0x02, 0x00, 0x10 },
+       Package () { 0x0005FFFF, 0x03, 0x00, 0x11 },

 
 

-       Package () { 0x0006FFFF, 0x00, 0x00, 0x13 }, 
-       Package () { 0x0006FFFF, 0x01, 0x00, 0x10 }, 
-       Package () { 0x0006FFFF, 0x02, 0x00, 0x11 }, 
-       Package () { 0x0006FFFF, 0x03, 0x00, 0x12 }, 
+       Package () { 0x0006FFFF, 0x00, 0x00, 0x13 },
+       Package () { 0x0006FFFF, 0x01, 0x00, 0x10 },
+       Package () { 0x0006FFFF, 0x02, 0x00, 0x11 },
+       Package () { 0x0006FFFF, 0x03, 0x00, 0x12 },

 
 

-       Package () { 0x0007FFFF, 0x00, 0x00, 0x10 }, 
-       Package () { 0x0007FFFF, 0x01, 0x00, 0x11 }, 
-       Package () { 0x0007FFFF, 0x02, 0x00, 0x12 }, 
-       Package () { 0x0007FFFF, 0x03, 0x00, 0x13 }, 
+       Package () { 0x0007FFFF, 0x00, 0x00, 0x10 },
+       Package () { 0x0007FFFF, 0x01, 0x00, 0x11 },
+       Package () { 0x0007FFFF, 0x02, 0x00, 0x12 },
+       Package () { 0x0007FFFF, 0x03, 0x00, 0x13 },

 
 

-       Package () { 0x0008FFFF, 0x00, 0x00, 0x11 }, 
-       Package () { 0x0008FFFF, 0x01, 0x00, 0x12 }, 
-       Package () { 0x0008FFFF, 0x02, 0x00, 0x13 }, 
-       Package () { 0x0008FFFF, 0x03, 0x00, 0x10 }, 
+       Package () { 0x0008FFFF, 0x00, 0x00, 0x11 },
+       Package () { 0x0008FFFF, 0x01, 0x00, 0x12 },
+       Package () { 0x0008FFFF, 0x02, 0x00, 0x13 },
+       Package () { 0x0008FFFF, 0x03, 0x00, 0x10 },

 })
 
 
 })
 
 

diff --git a/src/mainboard/via/vt8454c/acpi/irq.asl b/src/mainboard/via/vt8454c/acpi/irq.asl
index 63e64e61c04ea40bfa6ef745d3507038c374517e..a0bc380b78671e34d853c01b955a7c21b0eba435 100644 (file)
--- a/src/mainboard/via/vt8454c/acpi/irq.asl
+++ b/src/mainboard/via/vt8454c/acpi/irq.asl
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
 /*
  * This file is part of the coreboot project.

- * 
+ *

  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or
  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or


@@ -22,122 +22,122 @@
 Name (PICM, Package () {
        //           _ADR        PIN   SRC   IDX
 
 Name (PICM, Package () {
        //           _ADR        PIN   SRC   IDX
 

-       Package () { 0x0001FFFF, 0x00, LNKA, 0x00 }, 
-       Package () { 0x0001FFFF, 0x01, LNKB, 0x00 }, 
-       Package () { 0x0001FFFF, 0x02, LNKC, 0x00 }, 
-       Package () { 0x0001FFFF, 0x03, LNKD, 0x00 }, 
-       
-       Package () { 0x0008FFFF, 0x00, LNKB, 0x00 }, 
-       Package () { 0x0008FFFF, 0x01, LNKC, 0x00 }, 
-       Package () { 0x0008FFFF, 0x02, LNKD, 0x00 }, 
-       Package () { 0x0008FFFF, 0x03, LNKA, 0x00 }, 
-       
-       Package () { 0x0009FFFF, 0x00, LNKC, 0x00 }, 
-       Package () { 0x0009FFFF, 0x01, LNKD, 0x00 }, 
-       Package () { 0x0009FFFF, 0x02, LNKA, 0x00 }, 
-       Package () { 0x0009FFFF, 0x03, LNKB, 0x00 }, 
-       
-       Package () { 0x000AFFFF, 0x00, LNKD, 0x00 }, 
-       Package () { 0x000AFFFF, 0x01, LNKA, 0x00 }, 
-       Package () { 0x000AFFFF, 0x02, LNKB, 0x00 }, 
-       Package () { 0x000AFFFF, 0x03, LNKC, 0x00 }, 
-       
-       Package () { 0x000BFFFF, 0x00, LNKD, 0x00 }, 
-       Package () { 0x000BFFFF, 0x01, LNKA, 0x00 }, 
-       Package () { 0x000BFFFF, 0x02, LNKB, 0x00 }, 
-       Package () { 0x000BFFFF, 0x03, LNKC, 0x00 }, 
-       
-       Package () { 0x000CFFFF, 0x00, LNKA, 0x00 }, 
-       Package () { 0x000CFFFF, 0x01, LNKB, 0x00 }, 
-       Package () { 0x000CFFFF, 0x02, LNKC, 0x00 }, 
-       Package () { 0x000CFFFF, 0x03, LNKD, 0x00 }, 
-       
-       Package () { 0x000DFFFF, 0x00, LNKA, 0x00 }, 
-       Package () { 0x000DFFFF, 0x01, LNKB, 0x00 }, 
-       Package () { 0x000DFFFF, 0x02, LNKC, 0x00 }, 
-       Package () { 0x000DFFFF, 0x03, LNKD, 0x00 }, 
-
-       Package () { 0x000FFFFF, 0x00, LNKA, 0x00 }, 
-       Package () { 0x000FFFFF, 0x01, LNKB, 0x00 }, 
-       Package () { 0x000FFFFF, 0x02, LNKC, 0x00 }, 
+       Package () { 0x0001FFFF, 0x00, LNKA, 0x00 },
+       Package () { 0x0001FFFF, 0x01, LNKB, 0x00 },
+       Package () { 0x0001FFFF, 0x02, LNKC, 0x00 },
+       Package () { 0x0001FFFF, 0x03, LNKD, 0x00 },
+
+       Package () { 0x0008FFFF, 0x00, LNKB, 0x00 },
+       Package () { 0x0008FFFF, 0x01, LNKC, 0x00 },
+       Package () { 0x0008FFFF, 0x02, LNKD, 0x00 },
+       Package () { 0x0008FFFF, 0x03, LNKA, 0x00 },
+
+       Package () { 0x0009FFFF, 0x00, LNKC, 0x00 },
+       Package () { 0x0009FFFF, 0x01, LNKD, 0x00 },
+       Package () { 0x0009FFFF, 0x02, LNKA, 0x00 },
+       Package () { 0x0009FFFF, 0x03, LNKB, 0x00 },
+
+       Package () { 0x000AFFFF, 0x00, LNKD, 0x00 },
+       Package () { 0x000AFFFF, 0x01, LNKA, 0x00 },
+       Package () { 0x000AFFFF, 0x02, LNKB, 0x00 },
+       Package () { 0x000AFFFF, 0x03, LNKC, 0x00 },
+
+       Package () { 0x000BFFFF, 0x00, LNKD, 0x00 },
+       Package () { 0x000BFFFF, 0x01, LNKA, 0x00 },
+       Package () { 0x000BFFFF, 0x02, LNKB, 0x00 },
+       Package () { 0x000BFFFF, 0x03, LNKC, 0x00 },
+
+       Package () { 0x000CFFFF, 0x00, LNKA, 0x00 },
+       Package () { 0x000CFFFF, 0x01, LNKB, 0x00 },
+       Package () { 0x000CFFFF, 0x02, LNKC, 0x00 },
+       Package () { 0x000CFFFF, 0x03, LNKD, 0x00 },
+
+       Package () { 0x000DFFFF, 0x00, LNKA, 0x00 },
+       Package () { 0x000DFFFF, 0x01, LNKB, 0x00 },
+       Package () { 0x000DFFFF, 0x02, LNKC, 0x00 },
+       Package () { 0x000DFFFF, 0x03, LNKD, 0x00 },
+
+       Package () { 0x000FFFFF, 0x00, LNKA, 0x00 },
+       Package () { 0x000FFFFF, 0x01, LNKB, 0x00 },
+       Package () { 0x000FFFFF, 0x02, LNKC, 0x00 },

        Package () { 0x000FFFFF, 0x03, LNKD, 0x00 },
        Package () { 0x000FFFFF, 0x03, LNKD, 0x00 },

-       
+

        /* USB controller */
        /* USB controller */

-       Package () { 0x0010FFFF, 0x00, LNKA, 0x00 }, 
-       Package () { 0x0010FFFF, 0x01, LNKB, 0x00 }, 
-       Package () { 0x0010FFFF, 0x02, LNKC, 0x00 }, 
-       Package () { 0x0010FFFF, 0x03, LNKD, 0x00 }, 
-       
-       Package () { 0x0011FFFF, 0x00, LNKA, 0x00 }, 
-       Package () { 0x0011FFFF, 0x01, LNKB, 0x00 }, 
-       Package () { 0x0011FFFF, 0x02, LNKC, 0x00 }, 
-       Package () { 0x0011FFFF, 0x03, LNKD, 0x00 }, 
-       
-       Package () { 0x0012FFFF, 0x00, LNKA, 0x00 }, 
-       Package () { 0x0012FFFF, 0x01, LNKB, 0x00 }, 
-       Package () { 0x0012FFFF, 0x02, LNKC, 0x00 }, 
-       Package () { 0x0012FFFF, 0x03, LNKD, 0x00 } 
+       Package () { 0x0010FFFF, 0x00, LNKA, 0x00 },
+       Package () { 0x0010FFFF, 0x01, LNKB, 0x00 },
+       Package () { 0x0010FFFF, 0x02, LNKC, 0x00 },
+       Package () { 0x0010FFFF, 0x03, LNKD, 0x00 },
+
+       Package () { 0x0011FFFF, 0x00, LNKA, 0x00 },
+       Package () { 0x0011FFFF, 0x01, LNKB, 0x00 },
+       Package () { 0x0011FFFF, 0x02, LNKC, 0x00 },
+       Package () { 0x0011FFFF, 0x03, LNKD, 0x00 },
+
+       Package () { 0x0012FFFF, 0x00, LNKA, 0x00 },
+       Package () { 0x0012FFFF, 0x01, LNKB, 0x00 },
+       Package () { 0x0012FFFF, 0x02, LNKC, 0x00 },
+       Package () { 0x0012FFFF, 0x03, LNKD, 0x00 }

 })
 
 Name (APIC, Package () {
 })
 
 Name (APIC, Package () {

-       Package () { 0x0001FFFF, 0x00, 0x00, 0x10 }, 
-       Package () { 0x0001FFFF, 0x01, 0x00, 0x11 }, 
-       Package () { 0x0001FFFF, 0x02, 0x00, 0x12 }, 
-       Package () { 0x0001FFFF, 0x03, 0x00, 0x13 }, 
-
-       Package () { 0x0008FFFF, 0x00, 0x00, 0x11 }, 
-       Package () { 0x0008FFFF, 0x01, 0x00, 0x12 }, 
-       Package () { 0x0008FFFF, 0x02, 0x00, 0x13 }, 
-       Package () { 0x0008FFFF, 0x03, 0x00, 0x10 }, 
-       
-       Package () { 0x0009FFFF, 0x00, 0x00, 0x12 }, 
-       Package () { 0x0009FFFF, 0x01, 0x00, 0x13 }, 
-       Package () { 0x0009FFFF, 0x02, 0x00, 0x10 }, 
-       Package () { 0x0009FFFF, 0x03, 0x00, 0x11 }, 
-       
-       Package () { 0x000AFFFF, 0x00, 0x00, 0x13 }, 
-       Package () { 0x000AFFFF, 0x01, 0x00, 0x10 }, 
-       Package () { 0x000AFFFF, 0x02, 0x00, 0x11 }, 
-       Package () { 0x000AFFFF, 0x03, 0x00, 0x12 }, 
-       
-       Package () { 0x000BFFFF, 0x00, 0x00, 0x13 }, 
-       Package () { 0x000BFFFF, 0x01, 0x00, 0x10 }, 
-       Package () { 0x000BFFFF, 0x02, 0x00, 0x11 }, 
-       Package () { 0x000BFFFF, 0x03, 0x00, 0x12 }, 
-       
-       Package () { 0x000CFFFF, 0x00, 0x00, 0x10 }, 
-       Package () { 0x000CFFFF, 0x01, 0x00, 0x11 }, 
-       Package () { 0x000CFFFF, 0x02, 0x00, 0x12 }, 
-       Package () { 0x000CFFFF, 0x03, 0x00, 0x13 }, 
-       
-       Package () { 0x000DFFFF, 0x00, 0x00, 0x10 }, 
-       Package () { 0x000DFFFF, 0x01, 0x00, 0x11 }, 
-       Package () { 0x000DFFFF, 0x02, 0x00, 0x12 }, 
-       Package () { 0x000DFFFF, 0x03, 0x00, 0x13 }, 
-               
-       Package () { 0x000FFFFF, 0x00, LNKA, 0x00 }, 
-       Package () { 0x000FFFFF, 0x01, LNKA, 0x00 }, 
-       Package () { 0x000FFFFF, 0x02, LNKA, 0x00 }, 
+       Package () { 0x0001FFFF, 0x00, 0x00, 0x10 },
+       Package () { 0x0001FFFF, 0x01, 0x00, 0x11 },
+       Package () { 0x0001FFFF, 0x02, 0x00, 0x12 },
+       Package () { 0x0001FFFF, 0x03, 0x00, 0x13 },
+
+       Package () { 0x0008FFFF, 0x00, 0x00, 0x11 },
+       Package () { 0x0008FFFF, 0x01, 0x00, 0x12 },
+       Package () { 0x0008FFFF, 0x02, 0x00, 0x13 },
+       Package () { 0x0008FFFF, 0x03, 0x00, 0x10 },
+
+       Package () { 0x0009FFFF, 0x00, 0x00, 0x12 },
+       Package () { 0x0009FFFF, 0x01, 0x00, 0x13 },
+       Package () { 0x0009FFFF, 0x02, 0x00, 0x10 },
+       Package () { 0x0009FFFF, 0x03, 0x00, 0x11 },
+
+       Package () { 0x000AFFFF, 0x00, 0x00, 0x13 },
+       Package () { 0x000AFFFF, 0x01, 0x00, 0x10 },
+       Package () { 0x000AFFFF, 0x02, 0x00, 0x11 },
+       Package () { 0x000AFFFF, 0x03, 0x00, 0x12 },
+
+       Package () { 0x000BFFFF, 0x00, 0x00, 0x13 },
+       Package () { 0x000BFFFF, 0x01, 0x00, 0x10 },
+       Package () { 0x000BFFFF, 0x02, 0x00, 0x11 },
+       Package () { 0x000BFFFF, 0x03, 0x00, 0x12 },
+
+       Package () { 0x000CFFFF, 0x00, 0x00, 0x10 },
+       Package () { 0x000CFFFF, 0x01, 0x00, 0x11 },
+       Package () { 0x000CFFFF, 0x02, 0x00, 0x12 },
+       Package () { 0x000CFFFF, 0x03, 0x00, 0x13 },
+
+       Package () { 0x000DFFFF, 0x00, 0x00, 0x10 },
+       Package () { 0x000DFFFF, 0x01, 0x00, 0x11 },
+       Package () { 0x000DFFFF, 0x02, 0x00, 0x12 },
+       Package () { 0x000DFFFF, 0x03, 0x00, 0x13 },
+
+       Package () { 0x000FFFFF, 0x00, LNKA, 0x00 },
+       Package () { 0x000FFFFF, 0x01, LNKA, 0x00 },
+       Package () { 0x000FFFFF, 0x02, LNKA, 0x00 },

        Package () { 0x000FFFFF, 0x03, LNKA, 0x00 },
 
        /* USB controller. Hardwired in internal
            APIC mode, see PM pg. 137,
            "miscellaneous controls", footnote to
            "IDE interrupt select" */
        Package () { 0x000FFFFF, 0x03, LNKA, 0x00 },
 
        /* USB controller. Hardwired in internal
            APIC mode, see PM pg. 137,
            "miscellaneous controls", footnote to
            "IDE interrupt select" */

-       Package () { 0x0010FFFF, 0x00, 0x00, 0x14 }, 
-       Package () { 0x0010FFFF, 0x01, 0x00, 0x16 }, 
-       Package () { 0x0010FFFF, 0x02, 0x00, 0x15 }, 
-       Package () { 0x0010FFFF, 0x03, 0x00, 0x17 }, 
-       
-       Package () { 0x0011FFFF, 0x00, LNKA, 0x00 }, 
-       Package () { 0x0011FFFF, 0x01, LNKB, 0x00 }, 
-       Package () { 0x0011FFFF, 0x02, LNKC, 0x00 }, 
-       Package () { 0x0011FFFF, 0x03, LNKD, 0x00 }, 
-
-       Package () { 0x0012FFFF, 0x00, LNKD, 0x00 }, 
-       Package () { 0x0012FFFF, 0x01, LNKD, 0x00 }, 
-       Package () { 0x0012FFFF, 0x02, LNKD, 0x00 }, 
-       Package () { 0x0012FFFF, 0x03, LNKD, 0x00 }, 
+       Package () { 0x0010FFFF, 0x00, 0x00, 0x14 },
+       Package () { 0x0010FFFF, 0x01, 0x00, 0x16 },
+       Package () { 0x0010FFFF, 0x02, 0x00, 0x15 },
+       Package () { 0x0010FFFF, 0x03, 0x00, 0x17 },
+
+       Package () { 0x0011FFFF, 0x00, LNKA, 0x00 },
+       Package () { 0x0011FFFF, 0x01, LNKB, 0x00 },
+       Package () { 0x0011FFFF, 0x02, LNKC, 0x00 },
+       Package () { 0x0011FFFF, 0x03, LNKD, 0x00 },
+
+       Package () { 0x0012FFFF, 0x00, LNKD, 0x00 },
+       Package () { 0x0012FFFF, 0x01, LNKD, 0x00 },
+       Package () { 0x0012FFFF, 0x02, LNKD, 0x00 },
+       Package () { 0x0012FFFF, 0x03, LNKD, 0x00 },

 })
 
 
 })
 
 

diff --git a/src/mainboard/via/vt8454c/acpi_tables.c b/src/mainboard/via/vt8454c/acpi_tables.c
index d31d8c55eb3b2f686e92cd7f210861be9b49962e..737a5c8b12ca27756a6e0df25075203f272b5359 100644 (file)
--- a/src/mainboard/via/vt8454c/acpi_tables.c
+++ b/src/mainboard/via/vt8454c/acpi_tables.c
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
 /*
  * This file is part of the coreboot project.

- * 
+ *

  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or
  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or

diff --git a/src/mainboard/via/vt8454c/dsdt.asl b/src/mainboard/via/vt8454c/dsdt.asl
index ada6c9569017ccc6467c86218b991a8bd6af9d0c..d0ec7db2d00941afe3242073c30aa78636986896 100644 (file)
--- a/src/mainboard/via/vt8454c/dsdt.asl
+++ b/src/mainboard/via/vt8454c/dsdt.asl
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
 /*
  * This file is part of the coreboot project.

- * 
+ *

  * Copyright (C) 2004 Nick Barker <Nick.Barker9@btinternet.com>
  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * Copyright (C) 2004 Nick Barker <Nick.Barker9@btinternet.com>
  * Copyright (C) 2007-2009 coresystems GmbH
  *


@@ -22,7 +22,7 @@
 
 DefinitionBlock ("dsdt.aml", "DSDT", 1, "CX700 ", "COREBOOT", 0x00000001)
 {
 
 DefinitionBlock ("dsdt.aml", "DSDT", 1, "CX700 ", "COREBOOT", 0x00000001)
 {

-       /*  
+       /*

         * Define the main processor
         */
        Scope (\_PR)
         * Define the main processor
         */
        Scope (\_PR)


@@ -38,18 +38,18 @@ DefinitionBlock ("dsdt.aml", "DSDT", 1, "CX700 ", "COREBOOT", 0x00000001)
        Name (\_S0, Package () {0x00, 0x00, 0x00, 0x00 })
        Name (\_S5, Package () {0x02, 0x02, 0x00, 0x00 })
 
        Name (\_S0, Package () {0x00, 0x00, 0x00, 0x00 })
        Name (\_S5, Package () {0x02, 0x02, 0x00, 0x00 })
 

-       Scope (\) {     
-               Name (PICF , 0)         // Global flag indicating whether to use PIC or APIC mode  
+       Scope (\) {
+               Name (PICF , 0)         // Global flag indicating whether to use PIC or APIC mode

                Method ( _PIC,1)        // The OS is calling this
                {
                        Store( Arg0 , PICF)
                }
                Method ( _PIC,1)        // The OS is calling this
                {
                        Store( Arg0 , PICF)
                }

-       } // end of \ scope 
+       } // end of \ scope

 
        /* Root of the bus hierarchy */
        Scope (\_SB)
        {
 
        /* Root of the bus hierarchy */
        Scope (\_SB)
        {

-               /* Define how interrupt Link A is plumbed in */ 
+               /* Define how interrupt Link A is plumbed in */

                Device (LNKA)
                {
                        Name (_HID, EisaId ("PNP0C0F"))
                Device (LNKA)
                {
                        Name (_HID, EisaId ("PNP0C0F"))


@@ -61,7 +61,7 @@ DefinitionBlock ("dsdt.aml", "DSDT", 1, "CX700 ", "COREBOOT", 0x00000001)
                                Return (0x0B)
                        }
 
                                Return (0x0B)
                        }
 

-                       /* Current Resources - return irq set up in BIOS */  
+                       /* Current Resources - return irq set up in BIOS */

                        Method (_CRS, 0, NotSerialized)
                        {
                                Name (CRSP, ResourceTemplate () {
                        Method (_CRS, 0, NotSerialized)
                        {
                                Name (CRSP, ResourceTemplate () {


@@ -79,7 +79,7 @@ DefinitionBlock ("dsdt.aml", "DSDT", 1, "CX700 ", "COREBOOT", 0x00000001)
                        }
                        /* Possible Resources - return the range of irqs
                         * we are using for PCI - only here to keep Linux ACPI
                        }
                        /* Possible Resources - return the range of irqs
                         * we are using for PCI - only here to keep Linux ACPI

-                        * happy 
+                        * happy

                         */
                        Method (_PRS, 0, NotSerialized)
                        {
                         */
                        Method (_PRS, 0, NotSerialized)
                        {


@@ -99,16 +99,16 @@ DefinitionBlock ("dsdt.aml", "DSDT", 1, "CX700 ", "COREBOOT", 0x00000001)
                        }
                        /* Set Resources - dummy function to keep Linux ACPI happy
                          * Linux is more than happy not to tinker with irq
                        }
                        /* Set Resources - dummy function to keep Linux ACPI happy
                          * Linux is more than happy not to tinker with irq

-                        * assignments as long as the CRS and STA functions 
+                        * assignments as long as the CRS and STA functions

                         * return good values
                         */
                        Method (_SRS, 1, NotSerialized ) {}
                        /* Disable - dummy function to keep Linux ACPI happy */
                        Method (_DIS, 0, NotSerialized ) {}
                         * return good values
                         */
                        Method (_SRS, 1, NotSerialized ) {}
                        /* Disable - dummy function to keep Linux ACPI happy */
                        Method (_DIS, 0, NotSerialized ) {}

- 
-               } // End of LNKA 

 
 

-               /* Define how interrupt Link B is plumbed in */ 
+               } // End of LNKA
+
+               /* Define how interrupt Link B is plumbed in */

                Device (LNKB)
                {
                        Name (_HID, EisaId ("PNP0C0F"))
                Device (LNKB)
                {
                        Name (_HID, EisaId ("PNP0C0F"))


@@ -120,7 +120,7 @@ DefinitionBlock ("dsdt.aml", "DSDT", 1, "CX700 ", "COREBOOT", 0x00000001)
                                Return (0x0B)
                        }
 
                                Return (0x0B)
                        }
 

-                       /* Current Resources - return irq set up in BIOS */  
+                       /* Current Resources - return irq set up in BIOS */

                        Method (_CRS, 0, NotSerialized)
                        {
                                Name (CRSP, ResourceTemplate () {
                        Method (_CRS, 0, NotSerialized)
                        {
                                Name (CRSP, ResourceTemplate () {


@@ -138,7 +138,7 @@ DefinitionBlock ("dsdt.aml", "DSDT", 1, "CX700 ", "COREBOOT", 0x00000001)
                        }
                        /* Possible Resources - return the range of irqs
                         * we are using for PCI - only here to keep Linux ACPI
                        }
                        /* Possible Resources - return the range of irqs
                         * we are using for PCI - only here to keep Linux ACPI

-                        * happy 
+                        * happy

                         */
                        Method (_PRS, 0, NotSerialized)
                        {
                         */
                        Method (_PRS, 0, NotSerialized)
                        {


@@ -159,16 +159,16 @@ DefinitionBlock ("dsdt.aml", "DSDT", 1, "CX700 ", "COREBOOT", 0x00000001)
 
                        /* Set Resources - dummy function to keep Linux ACPI happy
                          * Linux is more than happy not to tinker with irq
 
                        /* Set Resources - dummy function to keep Linux ACPI happy
                          * Linux is more than happy not to tinker with irq

-                        * assignments as long as the CRS and STA functions 
+                        * assignments as long as the CRS and STA functions

                         * return good values
                         */
                        Method (_SRS, 1, NotSerialized ) {}
                        /* Disable - dummy function to keep Linux ACPI happy */
                        Method (_DIS, 0, NotSerialized ) {}
                         * return good values
                         */
                        Method (_SRS, 1, NotSerialized ) {}
                        /* Disable - dummy function to keep Linux ACPI happy */
                        Method (_DIS, 0, NotSerialized ) {}

- 
+

                } // End of LNKB
 
                } // End of LNKB
 

-               /* Define how interrupt Link C is plumbed in */ 
+               /* Define how interrupt Link C is plumbed in */

                Device (LNKC)
                {
                        Name (_HID, EisaId ("PNP0C0F"))
                Device (LNKC)
                {
                        Name (_HID, EisaId ("PNP0C0F"))


@@ -180,7 +180,7 @@ DefinitionBlock ("dsdt.aml", "DSDT", 1, "CX700 ", "COREBOOT", 0x00000001)
                                Return (0x0B)
                        }
 
                                Return (0x0B)
                        }
 

-                       /* Current Resources - return irq set up in BIOS */  
+                       /* Current Resources - return irq set up in BIOS */

                        Method (_CRS, 0, NotSerialized)
                        {
                                Name (CRSP, ResourceTemplate () {
                        Method (_CRS, 0, NotSerialized)
                        {
                                Name (CRSP, ResourceTemplate () {


@@ -198,7 +198,7 @@ DefinitionBlock ("dsdt.aml", "DSDT", 1, "CX700 ", "COREBOOT", 0x00000001)
                        }
                        /* Possible Resources - return the range of irqs
                         * we are using for PCI - only here to keep Linux ACPI
                        }
                        /* Possible Resources - return the range of irqs
                         * we are using for PCI - only here to keep Linux ACPI

-                        * happy 
+                        * happy

                         */
                        Method (_PRS, 0, NotSerialized)
                        {
                         */
                        Method (_PRS, 0, NotSerialized)
                        {


@@ -219,16 +219,16 @@ DefinitionBlock ("dsdt.aml", "DSDT", 1, "CX700 ", "COREBOOT", 0x00000001)
 
                        /* Set Resources - dummy function to keep Linux ACPI happy
                          * Linux is more than happy not to tinker with irq
 
                        /* Set Resources - dummy function to keep Linux ACPI happy
                          * Linux is more than happy not to tinker with irq

-                        * assignments as long as the CRS and STA functions 
+                        * assignments as long as the CRS and STA functions

                         * return good values
                         */
                        Method (_SRS, 1, NotSerialized ) {}
                        /* Disable - dummy function to keep Linux ACPI happy */
                        Method (_DIS, 0, NotSerialized ) {}
                         * return good values
                         */
                        Method (_SRS, 1, NotSerialized ) {}
                        /* Disable - dummy function to keep Linux ACPI happy */
                        Method (_DIS, 0, NotSerialized ) {}

- 
+

                } // End of LNKC
 
                } // End of LNKC
 

-               /* Define how interrupt Link D is plumbed in */ 
+               /* Define how interrupt Link D is plumbed in */

                Device (LNKD)
                {
                        Name (_HID, EisaId ("PNP0C0F"))
                Device (LNKD)
                {
                        Name (_HID, EisaId ("PNP0C0F"))


@@ -240,7 +240,7 @@ DefinitionBlock ("dsdt.aml", "DSDT", 1, "CX700 ", "COREBOOT", 0x00000001)
                                Return (0x0B)
                        }
 
                                Return (0x0B)
                        }
 

-                       /* Current Resources - return irq set up in BIOS */  
+                       /* Current Resources - return irq set up in BIOS */

                        Method (_CRS, 0, NotSerialized)
                        {
                                Name (CRSP, ResourceTemplate () {
                        Method (_CRS, 0, NotSerialized)
                        {
                                Name (CRSP, ResourceTemplate () {


@@ -258,7 +258,7 @@ DefinitionBlock ("dsdt.aml", "DSDT", 1, "CX700 ", "COREBOOT", 0x00000001)
                        }
                        /* Possible Resources - return the range of irqs
                         * we are using for PCI - only here to keep Linux ACPI
                        }
                        /* Possible Resources - return the range of irqs
                         * we are using for PCI - only here to keep Linux ACPI

-                        * happy 
+                        * happy

                         */
                        Method (_PRS, 0, NotSerialized)
                        {
                         */
                        Method (_PRS, 0, NotSerialized)
                        {


@@ -279,14 +279,14 @@ DefinitionBlock ("dsdt.aml", "DSDT", 1, "CX700 ", "COREBOOT", 0x00000001)
 
                        /* Set Resources - dummy function to keep Linux ACPI happy
                          * Linux is more than happy not to tinker with irq
 
                        /* Set Resources - dummy function to keep Linux ACPI happy
                          * Linux is more than happy not to tinker with irq

-                        * assignments as long as the CRS and STA functions 
+                        * assignments as long as the CRS and STA functions

                         * return good values
                         */
                        Method (_SRS, 1, NotSerialized ) {}
                        /* Disable - dummy function to keep Linux ACPI happy */
                        Method (_DIS, 0, NotSerialized ) {}
                         * return good values
                         */
                        Method (_SRS, 1, NotSerialized ) {}
                        /* Disable - dummy function to keep Linux ACPI happy */
                        Method (_DIS, 0, NotSerialized ) {}

- 
-               } // End of LNKD 
+
+               } // End of LNKD

 
                /* PCI Root Bridge */
                Device (PCI0)
 
                /* PCI Root Bridge */
                Device (PCI0)

diff --git a/src/mainboard/via/vt8454c/romstage.c b/src/mainboard/via/vt8454c/romstage.c
index dea85bc23421e16f036f9038689e2e06fd7adb1f..1a1efbf8f6f6b146bc1440136c8d58fde7f84449 100644 (file)
--- a/src/mainboard/via/vt8454c/romstage.c
+++ b/src/mainboard/via/vt8454c/romstage.c
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
 /*
  * This file is part of the coreboot project.

- * 
+ *

  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or
  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or


@@ -49,7 +49,7 @@ static void enable_mainboard_devices(void)
        if (dev == PCI_DEV_INVALID) {
                die("LPC bridge not found!!!\n");
        }
        if (dev == PCI_DEV_INVALID) {
                die("LPC bridge not found!!!\n");
        }

-       // Disable GP3 
+       // Disable GP3

        pci_write_config8(dev, 0x98, 0x00);
 
        // Disable mc97
        pci_write_config8(dev, 0x98, 0x00);
 
        // Disable mc97

diff --git a/src/mainboard/winent/pl6064/devicetree.cb b/src/mainboard/winent/pl6064/devicetree.cb
index 7f5a53fc29e998dc7eb708877414fa9b11362e85..713849a0985a63472487b5addb937dce99ad1770 100644 (file)
--- a/src/mainboard/winent/pl6064/devicetree.cb
+++ b/src/mainboard/winent/pl6064/devicetree.cb
@@ -20,7 +20,7 @@ chip northbridge/amd/lx
                        register "com2_address" = "0x2F8"
                        register "com2_irq" = "3"
                        register "unwanted_vpci[0]" = "0"       # End of list has a zero
                        register "com2_address" = "0x2F8"
                        register "com2_irq" = "3"
                        register "unwanted_vpci[0]" = "0"       # End of list has a zero

-                       
+

                        device pci d.0 on end                   # Ethernet 4
                        device pci a.0 on end                   # Ethernet 1
                        device pci b.0 on end                   # Ethernet 2
                        device pci d.0 on end                   # Ethernet 4
                        device pci a.0 on end                   # Ethernet 1
                        device pci b.0 on end                   # Ethernet 2

diff --git a/src/northbridge/amd/amdfam10/amdfam10_conf.c b/src/northbridge/amd/amdfam10/amdfam10_conf.c
index 567790cede0c41e3afd3145165c270084b00aa67..c5506eaca5f9f2f9ab6448f2d9137aaa50b6c743 100644 (file)
--- a/src/northbridge/amd/amdfam10/amdfam10_conf.c
+++ b/src/northbridge/amd/amdfam10/amdfam10_conf.c
@@ -316,7 +316,7 @@ static u32 hoist_memory(u32 hole_startk, u32 i, u32 one_DCT, u32 nodes)
 
        return carry_over;
 }
 
        return carry_over;
 }

-#endif 
+#endif

 #endif // CONFIG_AMDMCT
 
 
 #endif // CONFIG_AMDMCT
 
 

diff --git a/src/northbridge/amd/amdk8/amdk8_f.h b/src/northbridge/amd/amdk8/amdk8_f.h
index 580f27831b8741880e4a4d96f15dd6e2dbecd2cb..283e32e235e93e211bedf283fcd82ec4f558bef1 100644 (file)
--- a/src/northbridge/amd/amdk8/amdk8_f.h
+++ b/src/northbridge/amd/amdk8/amdk8_f.h
@@ -87,7 +87,7 @@
 #define DRAM_TIMING_LOW           0x88
 #define         DTL_TCL_SHIFT     0
 #define         DTL_TCL_MASK      7
 #define DRAM_TIMING_LOW           0x88
 #define         DTL_TCL_SHIFT     0
 #define         DTL_TCL_MASK      7

-#define          DTL_TCL_BASE     1 
+#define          DTL_TCL_BASE     1

 #define          DTL_TCL_MIN      3
 #define          DTL_TCL_MAX      6
 #define         DTL_TRCD_SHIFT    4
 #define          DTL_TCL_MIN      3
 #define          DTL_TCL_MAX      6
 #define         DTL_TRCD_SHIFT    4


@@ -125,7 +125,7 @@
 #define   DTL_TRRD_BASE    2
 #define   DTL_TRRD_MIN    2
 #define   DTL_TRRD_MAX     5
 #define   DTL_TRRD_BASE    2
 #define   DTL_TRRD_MIN    2
 #define   DTL_TRRD_MAX     5

-#define  DTL_MemClkDis_SHIFT 24    /* Channel A */ 
+#define  DTL_MemClkDis_SHIFT 24    /* Channel A */

 #define  DTL_MemClkDis3       (1 << 26)
 #define  DTL_MemClkDis2       (1 << 27)
 #define  DTL_MemClkDis1       (1 << 28)
 #define  DTL_MemClkDis3       (1 << 26)
 #define  DTL_MemClkDis2       (1 << 27)
 #define  DTL_MemClkDis1       (1 << 28)


@@ -135,16 +135,16 @@
 #define  DTL_MemClkDis0_S1g1      (0xa2 << 24)
 
 /* DTL_MemClkDis for m2 and s1g1 is different */
 #define  DTL_MemClkDis0_S1g1      (0xa2 << 24)
 
 /* DTL_MemClkDis for m2 and s1g1 is different */

- 
+

 #define DRAM_TIMING_HIGH   0x8c
 #define  DTH_TRWTTO_SHIFT  4
 #define  DTH_TRWTTO_MASK   7
 #define DRAM_TIMING_HIGH   0x8c
 #define  DTH_TRWTTO_SHIFT  4
 #define  DTH_TRWTTO_MASK   7

-#define   DTH_TRWTTO_BASE   2 
+#define   DTH_TRWTTO_BASE   2

 #define   DTH_TRWTTO_MIN    2
 #define   DTH_TRWTTO_MAX    9
 #define         DTH_TWTR_SHIFT    8
 #define         DTH_TWTR_MASK     3
 #define   DTH_TRWTTO_MIN    2
 #define   DTH_TRWTTO_MAX    9
 #define         DTH_TWTR_SHIFT    8
 #define         DTH_TWTR_MASK     3

-#define          DTH_TWTR_BASE    0 
+#define          DTH_TWTR_BASE    0

 #define          DTH_TWTR_MIN     1
 #define          DTH_TWTR_MAX     3
 #define         DTH_TWRRD_SHIFT   10
 #define          DTH_TWTR_MIN     1
 #define          DTH_TWTR_MAX     3
 #define         DTH_TWRRD_SHIFT   10


@@ -154,7 +154,7 @@
 #define          DTH_TWRRD_MAX    3
 #define  DTH_TWRWR_SHIFT   12
 #define  DTH_TWRWR_MASK    3
 #define          DTH_TWRRD_MAX    3
 #define  DTH_TWRWR_SHIFT   12
 #define  DTH_TWRWR_MASK    3

-#define   DTH_TWRWR_BASE   1 
+#define   DTH_TWRWR_BASE   1

 #define   DTH_TWRWR_MIN    1
 #define   DTH_TWRWR_MAX    3
 #define  DTH_TRDRD_SHIFT   14
 #define   DTH_TWRWR_MIN    1
 #define   DTH_TWRWR_MAX    3
 #define  DTH_TRDRD_SHIFT   14


@@ -167,7 +167,7 @@
 #define          DTH_TREF_7_8_US  2
 #define          DTH_TREF_3_9_US  3
 #define  DTH_TRFC0_SHIFT   20 /* for Logical DIMM0 */
 #define          DTH_TREF_7_8_US  2
 #define          DTH_TREF_3_9_US  3
 #define  DTH_TRFC0_SHIFT   20 /* for Logical DIMM0 */

-#define  DTH_TRFC_MASK      7  
+#define  DTH_TRFC_MASK      7

 #define          DTH_TRFC_75_256M   0
 #define          DTH_TRFC_105_512M  1
 #define   DTH_TRFC_127_5_1G  2
 #define          DTH_TRFC_75_256M   0
 #define          DTH_TRFC_105_512M  1
 #define   DTH_TRFC_127_5_1G  2


@@ -185,12 +185,12 @@
 #define   DCL_DramTerm_No   0
 #define   DCL_DramTerm_75_OH 1
 #define   DCL_DramTerm_150_OH 2
 #define   DCL_DramTerm_No   0
 #define   DCL_DramTerm_75_OH 1
 #define   DCL_DramTerm_150_OH 2

-#define   DCL_DramTerm_50_OH 3     
+#define   DCL_DramTerm_50_OH 3

 #define  DCL_DrvWeak      (1<<7)
 #define  DCL_ParEn        (1<<8)
 #define  DCL_SelfRefRateEn (1<<9)
 #define  DCL_BurstLength32 (1<<10)
 #define  DCL_DrvWeak      (1<<7)
 #define  DCL_ParEn        (1<<8)
 #define  DCL_SelfRefRateEn (1<<9)
 #define  DCL_BurstLength32 (1<<10)

-#define  DCL_Width128     (1<<11) 
+#define  DCL_Width128     (1<<11)

 #define  DCL_X4Dimm_SHIFT  12
 #define  DCL_X4Dimm_MASK   0xf
 #define  DCL_UnBuffDimm    (1<<16)
 #define  DCL_X4Dimm_SHIFT  12
 #define  DCL_X4Dimm_MASK   0xf
 #define  DCL_UnBuffDimm    (1<<16)


@@ -312,7 +312,7 @@
 #define  DATC_CkeFineDelay_MASK  0x1f
 #define   DATC_CkeFineDelay_BASE 0
 #define   DATC_CkeFineDelay_MIN  0
 #define  DATC_CkeFineDelay_MASK  0x1f
 #define   DATC_CkeFineDelay_BASE 0
 #define   DATC_CkeFineDelay_MIN  0

-#define   DATC_CkeFineDelay_MAX 31 
+#define   DATC_CkeFineDelay_MAX 31

 #define  DATC_CkeSetup (1<<5)
 #define  DATC_CsOdtFineDelay_SHIFT 8
 #define  DATC_CsOdtFineDelay_MASK  0x1f
 #define  DATC_CkeSetup (1<<5)
 #define  DATC_CsOdtFineDelay_SHIFT 8
 #define  DATC_CsOdtFineDelay_MASK  0x1f


@@ -320,7 +320,7 @@
 #define   DATC_CsOdtFineDelay_MIN  0
 #define   DATC_CsOdtFineDelay_MAX 31
 #define  DATC_CsOdtSetup   (1<<13)
 #define   DATC_CsOdtFineDelay_MIN  0
 #define   DATC_CsOdtFineDelay_MAX 31
 #define  DATC_CsOdtSetup   (1<<13)

-#define  DATC_AddrCmdFineDelay_SHIFT 16 
+#define  DATC_AddrCmdFineDelay_SHIFT 16

 #define  DATC_AddrCmdFineDelay_MASK  0x1f
 #define   DATC_AddrCmdFineDelay_BASE 0
 #define   DATC_AddrCmdFineDelay_MIN  0
 #define  DATC_AddrCmdFineDelay_MASK  0x1f
 #define   DATC_AddrCmdFineDelay_BASE 0
 #define   DATC_AddrCmdFineDelay_MIN  0


@@ -361,7 +361,7 @@
 #define DRAM_DQS_RECV_ENABLE_TIME2 0x16
 #define DRAM_DQS_RECV_ENABLE_TIME3 0x19
 
 #define DRAM_DQS_RECV_ENABLE_TIME2 0x16
 #define DRAM_DQS_RECV_ENABLE_TIME3 0x19
 

-/* there are index        0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x30, 0x33, 0x36, 0x39 
+/* there are index        0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x30, 0x33, 0x36, 0x39

 that are corresponding to 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x10, 0x13, 0x16, 0x19
 */
 #define DRAM_CTRL_MISC 0xa0
 that are corresponding to 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x10, 0x13, 0x16, 0x19
 */
 #define DRAM_CTRL_MISC 0xa0


@@ -417,7 +417,7 @@ that are corresponding to 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x10,
 #define          SCRUB_655_4us    15
 #define          SCRUB_1_31ms     16
 #define          SCRUB_2_62ms     17
 #define          SCRUB_655_4us    15
 #define          SCRUB_1_31ms     16
 #define          SCRUB_2_62ms     17

-#define          SCRUB_5_24ms     18 
+#define          SCRUB_5_24ms     18

 #define          SCRUB_10_49ms    19
 #define          SCRUB_20_97ms    20
 #define          SCRUB_42ms       21
 #define          SCRUB_10_49ms    19
 #define          SCRUB_20_97ms    20
 #define          SCRUB_42ms       21


@@ -530,7 +530,7 @@ static inline void wait_all_core0_mem_trained(struct sys_info *sysinfo)
        unsigned needs_reset = 0;
 
 
        unsigned needs_reset = 0;
 
 

-       if(sysinfo->nodes == 1) return; // in case only one cpu installed       
+       if(sysinfo->nodes == 1) return; // in case only one cpu installed

 
        for(i=1; i<sysinfo->nodes; i++) {
                /* Skip everything if I don't have any memory on this controller */
 
        for(i=1; i<sysinfo->nodes; i++) {
                /* Skip everything if I don't have any memory on this controller */


@@ -563,7 +563,7 @@ static inline void wait_all_core0_mem_trained(struct sys_info *sysinfo)
 #ifdef __PRE_RAM__
                print_debug("mem_trained["); print_debug_hex8(i); print_debug("]="); print_debug_hex8(sysinfo->mem_trained[i]); print_debug("\n");
 #else
 #ifdef __PRE_RAM__
                print_debug("mem_trained["); print_debug_hex8(i); print_debug("]="); print_debug_hex8(sysinfo->mem_trained[i]); print_debug("\n");
 #else

-               printk(BIOS_DEBUG, "mem_trained[%02x]=%02x\n", i, sysinfo->mem_trained[i]); 
+               printk(BIOS_DEBUG, "mem_trained[%02x]=%02x\n", i, sysinfo->mem_trained[i]);

 #endif
                switch(sysinfo->mem_trained[i]) {
                case 0: //don't need train
 #endif
                switch(sysinfo->mem_trained[i]) {
                case 0: //don't need train


@@ -581,7 +581,7 @@ static inline void wait_all_core0_mem_trained(struct sys_info *sysinfo)
                print_debug("mem trained failed\n");
                soft_reset();
 #else
                print_debug("mem trained failed\n");
                soft_reset();
 #else

-               printk(BIOS_DEBUG, "mem trained failed\n"); 
+               printk(BIOS_DEBUG, "mem trained failed\n");

                hard_reset();
 #endif
        }
                hard_reset();
 #endif
        }

diff --git a/src/northbridge/amd/amdk8/exit_from_self.c b/src/northbridge/amd/amdk8/exit_from_self.c
index e42158d92a36feb656aaeef1636bec36a63c7059..13c72fe84607e779981740feda4ee5af29975fe5 100644 (file)
--- a/src/northbridge/amd/amdk8/exit_from_self.c
+++ b/src/northbridge/amd/amdk8/exit_from_self.c
@@ -56,7 +56,7 @@ void exit_from_self(int controllers, const struct mem_controller *ctrl,
 
                printk(BIOS_DEBUG, "before resume errata #%d\n",
                             (is_post_rev_g) ? 270 : 125);
 
                printk(BIOS_DEBUG, "before resume errata #%d\n",
                             (is_post_rev_g) ? 270 : 125);

-               /* 
+               /*

                   1. Restore memory controller registers as normal.
                   2. Set the DisAutoRefresh bit (Dev:2x8C[18]). (270 only)
                   3. Set the EnDramInit bit (Dev:2x7C[31]), clear all other bits in the same register).
                   1. Restore memory controller registers as normal.
                   2. Set the DisAutoRefresh bit (Dev:2x8C[18]). (270 only)
                   3. Set the EnDramInit bit (Dev:2x7C[31]), clear all other bits in the same register).

diff --git a/src/northbridge/amd/amdk8/misc_control.c b/src/northbridge/amd/amdk8/misc_control.c
index 18b3109cf6a005b46b51968127c6a812d10be8cf..5d51f036cb69cf6c18437f4770ba7b6a38b3a2d7 100644 (file)
--- a/src/northbridge/amd/amdk8/misc_control.c
+++ b/src/northbridge/amd/amdk8/misc_control.c
@@ -4,7 +4,7 @@
  * devices which is done by the kernel
  *
  * written in 2003 by Eric Biederman
  * devices which is done by the kernel
  *
  * written in 2003 by Eric Biederman

- * 
+ *

  *  - Athlon64 workarounds by Stefan Reinauer
  *  - "reset once" logic by Yinghai Lu
  */
  *  - Athlon64 workarounds by Stefan Reinauer
  *  - "reset once" logic by Yinghai Lu
  */


@@ -24,7 +24,7 @@
 /**
  * @brief Read resources for AGP aperture
  *
 /**
  * @brief Read resources for AGP aperture
  *

- * @param 
+ * @param

  *
  * There is only one AGP aperture resource needed. The resoruce is added to
  * the northbridge of BSP.
  *
  * There is only one AGP aperture resource needed. The resoruce is added to
  * the northbridge of BSP.


@@ -64,7 +64,7 @@ static void mcf3_read_resources(device_t dev)
 static void set_agp_aperture(device_t dev)
 {
        struct resource *resource;
 static void set_agp_aperture(device_t dev)
 {
        struct resource *resource;

-               
+

        resource = probe_resource(dev, 0x94);
        if (resource) {
                device_t pdev;
        resource = probe_resource(dev, 0x94);
        if (resource) {
                device_t pdev;


@@ -78,7 +78,7 @@ static void set_agp_aperture(device_t dev)
 
                /* Get the base address */
                gart_base = ((resource->base) >> 25) & 0x00007fff;
 
                /* Get the base address */
                gart_base = ((resource->base) >> 25) & 0x00007fff;

-               
+

                /* Update the other northbriges */
                pdev = 0;
                while((pdev = dev_find_device(PCI_VENDOR_ID_AMD, 0x1103, pdev))) {
                /* Update the other northbriges */
                pdev = 0;
                while((pdev = dev_find_device(PCI_VENDOR_ID_AMD, 0x1103, pdev))) {


@@ -90,7 +90,7 @@ static void set_agp_aperture(device_t dev)
 
                        /* Don't set the GART Table base address */
                        pci_write_config32(pdev, 0x98, 0);
 
                        /* Don't set the GART Table base address */
                        pci_write_config32(pdev, 0x98, 0);

-                       
+

                        /* Report the resource has been stored... */
                        report_resource_stored(pdev, resource, " <gart>");
                }
                        /* Report the resource has been stored... */
                        report_resource_stored(pdev, resource, " <gart>");
                }


@@ -111,7 +111,7 @@ static void misc_control_init(struct device *dev)
        uint32_t cmd, cmd_ref;
        int needs_reset;
        struct device *f0_dev;
        uint32_t cmd, cmd_ref;
        int needs_reset;
        struct device *f0_dev;

-       
+

        printk(BIOS_DEBUG, "NB: Function 3 Misc Control.. ");
        needs_reset = 0;
 
        printk(BIOS_DEBUG, "NB: Function 3 Misc Control.. ");
        needs_reset = 0;
 


@@ -125,7 +125,7 @@ static void misc_control_init(struct device *dev)
        if (is_cpu_pre_c0()) {
 
                /* Errata 58
        if (is_cpu_pre_c0()) {
 
                /* Errata 58

-                * Disable CPU low power states C2, C1 and throttling 
+                * Disable CPU low power states C2, C1 and throttling

                 */
                cmd = pci_read_config32(dev, 0x80);
                cmd &= ~(1<<0);
                 */
                cmd = pci_read_config32(dev, 0x80);
                cmd &= ~(1<<0);


@@ -136,7 +136,7 @@ static void misc_control_init(struct device *dev)
                pci_write_config32(dev, 0x84, cmd );
 
                /* Errata 66
                pci_write_config32(dev, 0x84, cmd );
 
                /* Errata 66

-                * Limit the number of downstream posted requests to 1 
+                * Limit the number of downstream posted requests to 1

                 */
                cmd = pci_read_config32(dev, 0x70);
                if ((cmd & (3 << 0)) != 2) {
                 */
                cmd = pci_read_config32(dev, 0x70);
                if ((cmd & (3 << 0)) != 2) {


@@ -164,7 +164,7 @@ static void misc_control_init(struct device *dev)
                struct device *f2_dev;
                uint32_t dcl;
                f2_dev = dev_find_slot(0, dev->path.pci.devfn - 3 + 2);
                struct device *f2_dev;
                uint32_t dcl;
                f2_dev = dev_find_slot(0, dev->path.pci.devfn - 3 + 2);

-               /* Errata 98 
+               /* Errata 98

                 * Set Clk Ramp Hystersis to 7
                 * Clock Power/Timing Low
                 */
                 * Set Clk Ramp Hystersis to 7
                 * Clock Power/Timing Low
                 */


@@ -192,7 +192,7 @@ static void misc_control_init(struct device *dev)
                        reg = 0x98 + (link * 0x20);
                        link_type = pci_read_config32(f0_dev, reg);
                        /* Only handle coherent link here please */
                        reg = 0x98 + (link * 0x20);
                        link_type = pci_read_config32(f0_dev, reg);
                        /* Only handle coherent link here please */

-                       if ((link_type & (LinkConnected|InitComplete|NonCoherent)) 
+                       if ((link_type & (LinkConnected|InitComplete|NonCoherent))

                                == (LinkConnected|InitComplete))
                        {
                                cmd &= ~(0xff << (link *8));
                                == (LinkConnected|InitComplete))
                        {
                                cmd &= ~(0xff << (link *8));

diff --git a/src/northbridge/amd/amdk8/raminit.c b/src/northbridge/amd/amdk8/raminit.c
index ad257d0ed6ee9fef8f654f8099ce0e6f29fb42db..7ad1b8004c2c7b2b423012e34ad6843875518a78 100644 (file)
--- a/src/northbridge/amd/amdk8/raminit.c
+++ b/src/northbridge/amd/amdk8/raminit.c
@@ -567,7 +567,7 @@ static int is_opteron(const struct mem_controller *ctrl)
 {
        /* Test to see if I am an Opteron.  Socket 939 based Athlon64
         * have dual channel capability, too, so we need a better test
 {
        /* Test to see if I am an Opteron.  Socket 939 based Athlon64
         * have dual channel capability, too, so we need a better test

-        * for Opterons. 
+        * for Opterons.

         * However, all code uses is_opteron() to find out whether to
         * use dual channel, so if we really check for opteron here, we
         * need to fix up all code using this function, too.
         * However, all code uses is_opteron() to find out whether to
         * use dual channel, so if we really check for opteron here, we
         * need to fix up all code using this function, too.

diff --git a/src/northbridge/amd/amdk8/raminit_f.c b/src/northbridge/amd/amdk8/raminit_f.c
index 68728834169b978dd709a271e2576d97da5cde6a..b89aa38d6a63e102643297a70542b0b0a711fad2 100644 (file)
--- a/src/northbridge/amd/amdk8/raminit_f.c
+++ b/src/northbridge/amd/amdk8/raminit_f.c
@@ -393,7 +393,7 @@ static void sdram_set_registers(const struct mem_controller *ctrl, struct sys_in
         *         110 = 8 bus clocks
         *         111 = 9 bus clocks
         * [ 7: 7] Reserved
         *         110 = 8 bus clocks
         *         111 = 9 bus clocks
         * [ 7: 7] Reserved

-        * [ 9: 8] Twtr (Internal DRAM Write-to-Read Command Delay, 
+        * [ 9: 8] Twtr (Internal DRAM Write-to-Read Command Delay,

         * minium write-to-read delay when both access the same chip select)
         *         00 = Reserved
         *         01 = 1 bus clocks
         * minium write-to-read delay when both access the same chip select)
         *         00 = Reserved
         *         01 = 1 bus clocks


@@ -525,7 +525,7 @@ static void sdram_set_registers(const struct mem_controller *ctrl, struct sys_in
         *             registered DIMM is present
         * [19:19] Reserved
         * [20:20] SlowAccessMode (Slow Access Mode (2T Mode))
         *             registered DIMM is present
         * [19:19] Reserved
         * [20:20] SlowAccessMode (Slow Access Mode (2T Mode))

-        *         0 = DRAM address and control signals are driven for one 
+        *         0 = DRAM address and control signals are driven for one

         *             MEMCLK cycle
         *         1 = One additional MEMCLK of setup time is provided on all
         *             DRAM address and control signals except CS, CKE, and ODT;
         *             MEMCLK cycle
         *         1 = One additional MEMCLK of setup time is provided on all
         *             DRAM address and control signals except CS, CKE, and ODT;


@@ -720,7 +720,7 @@ static int is_opteron(const struct mem_controller *ctrl)
 {
        /* Test to see if I am an Opteron. M2 and S1G1 support dual
         * channel, too, but only support unbuffered DIMMs so we need a
 {
        /* Test to see if I am an Opteron. M2 and S1G1 support dual
         * channel, too, but only support unbuffered DIMMs so we need a

-        * better test for Opterons. 
+        * better test for Opterons.

         * However, all code uses is_opteron() to find out whether to
         * use dual channel, so if we really check for opteron here, we
         * need to fix up all code using this function, too.
         * However, all code uses is_opteron() to find out whether to
         * use dual channel, so if we really check for opteron here, we
         * need to fix up all code using this function, too.


@@ -1221,7 +1221,7 @@ static unsigned long order_chip_selects(const struct mem_controller *ctrl)
                        csbase = value;
                        canidate = index;
                }
                        csbase = value;
                        canidate = index;
                }

-               
+

                /* See if I have found a new canidate */
                if (csbase == 0) {
                        break;
                /* See if I have found a new canidate */
                if (csbase == 0) {
                        break;


@@ -1640,7 +1640,7 @@ static uint8_t get_exact_divisor(int i, uint8_t divisor)
          /*15*/   200, 160, 120, 100,
        };
 
          /*15*/   200, 160, 120, 100,
        };
 

-       
+

        int index;
        msr_t msr;
 
        int index;
        msr_t msr;
 


@@ -1659,7 +1659,7 @@ static uint8_t get_exact_divisor(int i, uint8_t divisor)
                unsigned fid_start;
                msr = rdmsr(0xc0010015);
                fid_start = (msr.lo & (0x3f << 24));
                unsigned fid_start;
                msr = rdmsr(0xc0010015);
                fid_start = (msr.lo & (0x3f << 24));

-               
+

                index = fid_start>>25;
        }
 
                index = fid_start>>25;
        }
 


@@ -1843,7 +1843,7 @@ static struct spd_set_memclk_result spd_set_memclk(const struct mem_controller *
                                continue;
                        }
                }
                                continue;
                        }
                }

-               
+

        }
        /* Make a second pass through the dimms and disable
         * any that cannot support the selected memclk and cas latency.
        }
        /* Make a second pass through the dimms and disable
         * any that cannot support the selected memclk and cas latency.


@@ -2060,7 +2060,7 @@ static int update_dimm_TT_1_4(const struct mem_controller *ctrl, const struct me
        if (clocks < TT_MIN) {
                clocks = TT_MIN;
        }
        if (clocks < TT_MIN) {
                clocks = TT_MIN;
        }

-       
+

        if (clocks > TT_MAX) {
                printk(BIOS_INFO, "warning spd byte : %x = %x > TT_MAX: %x, setting TT_MAX", SPD_TT, value, TT_MAX);
                clocks = TT_MAX;
        if (clocks > TT_MAX) {
                printk(BIOS_INFO, "warning spd byte : %x = %x > TT_MAX: %x, setting TT_MAX", SPD_TT, value, TT_MAX);
                clocks = TT_MAX;


@@ -3001,7 +3001,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl,
 #else
        int suspend = 0;
 #endif
 #else
        int suspend = 0;
 #endif

- 
+

 #if K8_REV_F_SUPPORT_F0_F1_WORKAROUND == 1
         unsigned cpu_f0_f1[8];
        /* FIXME: How about 32 node machine later? */
 #if K8_REV_F_SUPPORT_F0_F1_WORKAROUND == 1
         unsigned cpu_f0_f1[8];
        /* FIXME: How about 32 node machine later? */

diff --git a/src/northbridge/amd/amdk8/raminit_f_dqs.c b/src/northbridge/amd/amdk8/raminit_f_dqs.c
index 7b453bfc0905bfa2fd81d23216695c9500893796..c56e51deb05d2dcec477c42ec24aca4a580ee10b 100644 (file)
--- a/src/northbridge/amd/amdk8/raminit_f_dqs.c
+++ b/src/northbridge/amd/amdk8/raminit_f_dqs.c
@@ -436,7 +436,7 @@ static uint16_t get_exact_T1000(unsigned i)
                unsigned fid_start;
                msr = rdmsr(0xc0010015);
                fid_start = (msr.lo & (0x3f << 24));
                unsigned fid_start;
                msr = rdmsr(0xc0010015);
                fid_start = (msr.lo & (0x3f << 24));

-               
+

                index = fid_start>>25;
        }
 
                index = fid_start>>25;
        }
 


@@ -600,12 +600,12 @@ static unsigned TrainRcvrEn(const struct mem_controller *ctrl, unsigned Pass, st
        }
 
        for ( ; (channel < 2) && (!Errors); channel++)
        }
 
        for ( ; (channel < 2) && (!Errors); channel++)

-       { 
-               print_debug_dqs("\tTrainRcvEn51: channel ",channel, 1); 
-               
-               /* for each rank */ 
-               /* there are four recriver pairs, loosely associated with CS */ 
-               for( receiver = 0; (receiver < 8) && (!Errors); receiver+=2) 
+       {
+               print_debug_dqs("\tTrainRcvEn51: channel ",channel, 1);
+
+               /* for each rank */
+               /* there are four recriver pairs, loosely associated with CS */
+               for( receiver = 0; (receiver < 8) && (!Errors); receiver+=2)

                {
 
                        unsigned index=(receiver>>1) * 3 + 0x10;
                {
 
                        unsigned index=(receiver>>1) * 3 + 0x10;

diff --git a/src/northbridge/amd/amdk8/setup_resource_map.c b/src/northbridge/amd/amdk8/setup_resource_map.c
index 042bc9949b57f5b2dcdcfa975073e9b920ebe767..82622cdc4ca4d14aa40325eacd5b718bde0bd8c1 100644 (file)
--- a/src/northbridge/amd/amdk8/setup_resource_map.c
+++ b/src/northbridge/amd/amdk8/setup_resource_map.c
@@ -231,7 +231,7 @@ static void setup_mem_resource_map(const unsigned int *register_values, int max)
                unsigned where;
                unsigned long reg;
 #if 0
                unsigned where;
                unsigned long reg;
 #if 0

-               prink(BIOS_DEBUG, "%08x <-  %08x\n", 
+               prink(BIOS_DEBUG, "%08x <-  %08x\n",

                        register_values[i], register_values[i+2]);
 #endif
                where = register_values[i];
                        register_values[i], register_values[i+2]);
 #endif
                where = register_values[i];

diff --git a/src/northbridge/amd/amdmct/mct/mct_d.c b/src/northbridge/amd/amdmct/mct/mct_d.c
index fe4ae8c30cfea0bcb6b5fd354ecc3de803d649e9..3c4fa89e896b36f474456a579a83ade0d9448abc 100644 (file)
--- a/src/northbridge/amd/amdmct/mct/mct_d.c
+++ b/src/northbridge/amd/amdmct/mct/mct_d.c
@@ -3391,7 +3391,7 @@ static void SetODTTriState(struct MCTStatStruc *pMCTstat,
        u8 max_dimms;
 
        // FIXME: skip for Ax
        u8 max_dimms;
 
        // FIXME: skip for Ax

-       
+

        dev = pDCTstat->dev_dct;
 
        /* Tri-state unused ODTs when motherboard termination is available */
        dev = pDCTstat->dev_dct;
 
        /* Tri-state unused ODTs when motherboard termination is available */

diff --git a/src/northbridge/amd/gx1/northbridge.c b/src/northbridge/amd/gx1/northbridge.c
index 1b0214d9fde3239a1014c92f918cd60453fdecd8..1176744c87d3e3cecabe775219b170e95aa7e46f 100644 (file)
--- a/src/northbridge/amd/gx1/northbridge.c
+++ b/src/northbridge/amd/gx1/northbridge.c
@@ -40,10 +40,10 @@ static void enable_shadow(device_t dev)
        write32(GX_BASE+BC_XMAP_3, 0x77777777);
 }
 
        write32(GX_BASE+BC_XMAP_3, 0x77777777);
 }
 

-static void northbridge_init(device_t dev) 
+static void northbridge_init(device_t dev)

 {
        printk(BIOS_DEBUG, "northbridge: %s()\n", __func__);
 {
        printk(BIOS_DEBUG, "northbridge: %s()\n", __func__);

-       
+

        optimize_xbus(dev);
        enable_shadow(dev);
        printk(BIOS_SPEW, "Calling enable_cache()\n");
        optimize_xbus(dev);
        enable_shadow(dev);
        printk(BIOS_SPEW, "Calling enable_cache()\n");


@@ -63,7 +63,7 @@ static struct device_operations northbridge_operations = {
 static const struct pci_driver northbridge_driver __pci_driver = {
        .ops = &northbridge_operations,
        .vendor = PCI_VENDOR_ID_CYRIX,
 static const struct pci_driver northbridge_driver __pci_driver = {
        .ops = &northbridge_operations,
        .vendor = PCI_VENDOR_ID_CYRIX,

-       .device = PCI_DEVICE_ID_CYRIX_PCI_MASTER, 
+       .device = PCI_DEVICE_ID_CYRIX_PCI_MASTER,

 };
 
 static void ram_resource(device_t dev, unsigned long index,
 };
 
 static void ram_resource(device_t dev, unsigned long index,


@@ -132,7 +132,7 @@ static void pci_domain_set_resources(device_t dev)
                                continue;
                        ramreg += 1 << (((mem_config & (DIMM_SZ << i)) >> (i + 8)) + 2);
                }
                                continue;
                        ramreg += 1 << (((mem_config & (DIMM_SZ << i)) >> (i + 8)) + 2);
                }

-                       
+

                tomk = ramreg << 10;
 
                /* Sort out the framebuffer size */
                tomk = ramreg << 10;
 
                /* Sort out the framebuffer size */


@@ -172,7 +172,7 @@ static struct device_operations pci_domain_ops = {
         .enable_resources = enable_childrens_resources,
         .init             = 0,
         .scan_bus         = pci_domain_scan_bus,
         .enable_resources = enable_childrens_resources,
         .init             = 0,
         .scan_bus         = pci_domain_scan_bus,

-};  
+};

 
 static void cpu_bus_init(device_t dev)
 {
 
 static void cpu_bus_init(device_t dev)
 {


@@ -211,5 +211,5 @@ static void enable_dev(struct device *dev)
 
 struct chip_operations northbridge_amd_gx1_ops = {
        CHIP_NAME("AMD GX1 Northbridge")
 
 struct chip_operations northbridge_amd_gx1_ops = {
        CHIP_NAME("AMD GX1 Northbridge")

-       .enable_dev = enable_dev, 
+       .enable_dev = enable_dev,

 };
 };

diff --git a/src/northbridge/amd/gx1/raminit.c b/src/northbridge/amd/gx1/raminit.c
index f61a69b4f8b6f8f70aff518df427e5e14cda47f6..8525ce4d1ff1d72c7a27b77b5601c926184bd367 100644 (file)
--- a/src/northbridge/amd/gx1/raminit.c
+++ b/src/northbridge/amd/gx1/raminit.c
@@ -12,7 +12,7 @@ U.S. Government has rights to use, reproduce, and distribute this
 SOFTWARE.  The public may copy, distribute, prepare derivative works
 and publicly display this SOFTWARE without charge, provided that this
 Notice and any statement of authorship are reproduced on all copies.
 SOFTWARE.  The public may copy, distribute, prepare derivative works
 and publicly display this SOFTWARE without charge, provided that this
 Notice and any statement of authorship are reproduced on all copies.

-Neither the Government nor the University makes any warranty, express 
+Neither the Government nor the University makes any warranty, express

 or implied, or assumes any liability or responsibility for the use of
 this SOFTWARE.  If SOFTWARE is modified to produce derivative works,
 such modified SOFTWARE should be clearly marked, so as not to confuse
 or implied, or assumes any liability or responsibility for the use of
 this SOFTWARE.  If SOFTWARE is modified to produce derivative works,
 such modified SOFTWARE should be clearly marked, so as not to confuse


@@ -22,7 +22,7 @@ it with the version available from LANL.
  * rminnich@lanl.gov
  */
 
  * rminnich@lanl.gov
  */
 

-/*     SDRAM initialization for GX1 - translated from Christer Weinigel's 
+/*     SDRAM initialization for GX1 - translated from Christer Weinigel's

        assembler version into C.
 
        Hamish Guthrie 10/4/2005 hamish@prodigi.ch
        assembler version into C.
 
        Hamish Guthrie 10/4/2005 hamish@prodigi.ch


@@ -53,7 +53,7 @@ unsigned int tval, i;
                setGX1Mem(GX_BASE + MC_MEM_CNTRL1, tval);
        outb(0x72, 0x80);
 }
                setGX1Mem(GX_BASE + MC_MEM_CNTRL1, tval);
        outb(0x72, 0x80);
 }

-       
+

 
 void enable_dimm(void)
 {
 
 void enable_dimm(void)
 {


@@ -93,12 +93,12 @@ unsigned int tval, i;
        tval &= ~PROGRAM_SDRAM;
        setGX1Mem(GX_BASE + MC_MEM_CNTRL1, tval);
 
        tval &= ~PROGRAM_SDRAM;
        setGX1Mem(GX_BASE + MC_MEM_CNTRL1, tval);
 

-       /* Refresh memory again */      
+       /* Refresh memory again */

        tval = getGX1Mem(GX_BASE + MC_MEM_CNTRL1);
        tval |= RFSHTST;
        for(i=0; i>NUM_REFRESH; i++)
                setGX1Mem(GX_BASE + MC_MEM_CNTRL1, tval);
        tval = getGX1Mem(GX_BASE + MC_MEM_CNTRL1);
        tval |= RFSHTST;
        for(i=0; i>NUM_REFRESH; i++)
                setGX1Mem(GX_BASE + MC_MEM_CNTRL1, tval);

-       
+

        for(i=0; i<2000; i++)
                outb(0, 0xed);
        outb(0x74, 0x80);
        for(i=0; i<2000; i++)
                outb(0, 0xed);
        outb(0x74, 0x80);


@@ -132,7 +132,7 @@ int failed_flag = 1;
                return (0x0070 << dimm_shift);
        else
                return(getGX1Mem(GX_BASE + MC_BANK_CFG) & (DIMM_SZ << dimm_shift));
                return (0x0070 << dimm_shift);
        else
                return(getGX1Mem(GX_BASE + MC_BANK_CFG) & (DIMM_SZ << dimm_shift));

-               
+

 }
 
 static unsigned int module_banks(int dimm_shift)
 }
 
 static unsigned int module_banks(int dimm_shift)


@@ -229,7 +229,7 @@ unsigned int probe_config;
 #endif
                        return(page_size_config << dimm_shift);
                        }
 #endif
                        return(page_size_config << dimm_shift);
                        }

-               
+

                temp = ~(DIMM_PG_SZ << dimm_shift);
 
                probe_config = getGX1Mem(GX_BASE + MC_BANK_CFG);
                temp = ~(DIMM_PG_SZ << dimm_shift);
 
                probe_config = getGX1Mem(GX_BASE + MC_BANK_CFG);


@@ -300,23 +300,23 @@ static int size_memory(int dimm_shift, unsigned int mem_config)
 
        mem_config &= (~(DIMM_MOD_BNK << dimm_shift));
        mem_config |= (module_banks(dimm_shift));
 
        mem_config &= (~(DIMM_MOD_BNK << dimm_shift));
        mem_config |= (module_banks(dimm_shift));

-       
+

        print_debug("    Module Banks:    ");
        print_debug_char((((mem_config & (DIMM_MOD_BNK << dimm_shift)) >> (dimm_shift + 14)) ? 2 : 1) + 0x30);
        print_debug("\n");
 
        mem_config &= (~(DIMM_SZ << dimm_shift));
        mem_config |= (size_dimm(dimm_shift));
        print_debug("    Module Banks:    ");
        print_debug_char((((mem_config & (DIMM_MOD_BNK << dimm_shift)) >> (dimm_shift + 14)) ? 2 : 1) + 0x30);
        print_debug("\n");
 
        mem_config &= (~(DIMM_SZ << dimm_shift));
        mem_config |= (size_dimm(dimm_shift));

-       
+

        print_debug("    DIMM size:       ");
        print_debug("    DIMM size:       ");

-       print_debug_hex32(1 << 
+       print_debug_hex32(1 <<

                ((mem_config & (DIMM_SZ << dimm_shift)) >> (dimm_shift + 8)) + 22);
        print_debug("\n");
 
        return (mem_config);
 }
 
                ((mem_config & (DIMM_SZ << dimm_shift)) >> (dimm_shift + 8)) + 22);
        print_debug("\n");
 
        return (mem_config);
 }
 

-static void sdram_init(void) 
+static void sdram_init(void)

 {
 unsigned int mem_config = 0x00700070;
 
 {
 unsigned int mem_config = 0x00700070;
 


@@ -327,7 +327,7 @@ unsigned int mem_config = 0x00700070;
        setGX1Mem(GX_BASE + MC_MEM_CNTRL1, 0x92140000); /* MD_DS=2, MA_DS=2, CNTL_DS=2 SDCLKRATE=4 */
        setGX1Mem(GX_BASE + MC_BANK_CFG,   0x00700070); /* No DIMMS installed */
        setGX1Mem(GX_BASE + MC_SYNC_TIM1,  0x3a733225); /* LTMODE=3, RC=10, RAS=7, RP=3, RCD=3, RRD=2, DPL=2 */
        setGX1Mem(GX_BASE + MC_MEM_CNTRL1, 0x92140000); /* MD_DS=2, MA_DS=2, CNTL_DS=2 SDCLKRATE=4 */
        setGX1Mem(GX_BASE + MC_BANK_CFG,   0x00700070); /* No DIMMS installed */
        setGX1Mem(GX_BASE + MC_SYNC_TIM1,  0x3a733225); /* LTMODE=3, RC=10, RAS=7, RP=3, RCD=3, RRD=2, DPL=2 */

-       setGX1Mem(GX_BASE + MC_BANK_CFG,   0x57405740); /* Largest DIMM size 
+       setGX1Mem(GX_BASE + MC_BANK_CFG,   0x57405740); /* Largest DIMM size

                                                0x4000 -- 2 module banks
                                                0x1000 -- 4 component banks
                                                0x0700 -- DIMM size 512MB
                                                0x4000 -- 2 module banks
                                                0x1000 -- 4 component banks
                                                0x0700 -- DIMM size 512MB

diff --git a/src/northbridge/amd/gx2/chipsetinit.c b/src/northbridge/amd/gx2/chipsetinit.c
index 620f56452d49a2711f379961fc13abd3bfeca710..f0b99e7e9db038332dcff476d8ebbc69cce46309 100644 (file)
--- a/src/northbridge/amd/gx2/chipsetinit.c
+++ b/src/northbridge/amd/gx2/chipsetinit.c
@@ -61,7 +61,7 @@ static struct msrinit CS5536_CLOCK_GATING_TABLE[] = {
 
 #ifdef UNUSED_CODE
 struct acpiinit {
 
 #ifdef UNUSED_CODE
 struct acpiinit {

-       unsigned short ioreg; 
+       unsigned short ioreg;

        unsigned long regdata;
        unsigned short iolen;
 };
        unsigned long regdata;
        unsigned short iolen;
 };


@@ -116,21 +116,21 @@ static void pmChipsetInit(void)
        port =  (PMLogic_BASE + 0x034);
        val =  0x0A0            ; /*  5ms*/
        outl(val, port);
        port =  (PMLogic_BASE + 0x034);
        val =  0x0A0            ; /*  5ms*/
        outl(val, port);

-       
+

        /*  PM_WKD*/
        port =  (PMLogic_BASE + 0x030);
        outl(val, port);
        /*  PM_WKD*/
        port =  (PMLogic_BASE + 0x030);
        outl(val, port);

-               
+

        /*  PM_SED*/
        port =  (PMLogic_BASE + 0x014);
        val =  0x04601          ; /*  5ms*/
        outl(val, port);
        /*  PM_SED*/
        port =  (PMLogic_BASE + 0x014);
        val =  0x04601          ; /*  5ms*/
        outl(val, port);

-       
+

        /*  PM_SIDD*/
        port =  (PMLogic_BASE + 0x020);
        val =  0x08C02          ; /*  10ms*/
        outl(val, port);
        /*  PM_SIDD*/
        port =  (PMLogic_BASE + 0x020);
        val =  0x08C02          ; /*  10ms*/
        outl(val, port);

-       
+

        /* GPIO24 OUT_AUX1 function is the external signal for 5535's
         * vsb_working_aux which is de-asserted when 5535 enters Standby (S3 or
         * S5) state.  On Hawk, GPIO24 controls all voltage rails except Vmem
        /* GPIO24 OUT_AUX1 function is the external signal for 5535's
         * vsb_working_aux which is de-asserted when 5535 enters Standby (S3 or
         * S5) state.  On Hawk, GPIO24 controls all voltage rails except Vmem


@@ -154,7 +154,7 @@ static void pmChipsetInit(void)
         * Programming of GPIO11 will be done by VSA PM code.  During VSA
         * Init. BIOS writes PM Core Virual Register indicating if S1 Clocks
         * should be On or Off. This is based on a Setup item.  We do not want
         * Programming of GPIO11 will be done by VSA PM code.  During VSA
         * Init. BIOS writes PM Core Virual Register indicating if S1 Clocks
         * should be On or Off. This is based on a Setup item.  We do not want

-        * to leave GPIO11 enabled because of a Hawk board problem.  With 
+        * to leave GPIO11 enabled because of a Hawk board problem.  With

         * GPIO11 enabled in S3, something is back-driving GPIO11 causing it
         * to float to 1.6-1.7V.
         */
         * GPIO11 enabled in S3, something is back-driving GPIO11 causing it
         * to float to 1.6-1.7V.
         */


@@ -188,7 +188,7 @@ static uint32_t FlashPort[] = {
  *     ChipsetFlashSetup
  *
  *     Flash LBARs need to be setup before VSA init so the PCI BARs have
  *     ChipsetFlashSetup
  *
  *     Flash LBARs need to be setup before VSA init so the PCI BARs have

- *     correct size info.  Call this routine only if flash needs to be 
+ *     correct size info.  Call this routine only if flash needs to be

  *     configured (don't call it if you want IDE).
  *
  **************************************************************************/
  *     configured (don't call it if you want IDE).
  *
  **************************************************************************/


@@ -240,16 +240,16 @@ static void ChipsetFlashSetup(void)
 }
 
 
 }
 
 

- 
+

 /****************************************************************************
 /****************************************************************************

- * 
+ *

  *     ChipsetGeodeLinkInit
  *
  *     Handle chipset specific GeodeLink settings here.
  *     Called from GeodeLink init code.
  *     ChipsetGeodeLinkInit
  *
  *     Handle chipset specific GeodeLink settings here.
  *     Called from GeodeLink init code.

- * 
+ *

  ****************************************************************************/
  ****************************************************************************/

-static void 
+static void

 ChipsetGeodeLinkInit(void)
 {
        msr_t msr;
 ChipsetGeodeLinkInit(void)
 {
        msr_t msr;


@@ -269,7 +269,7 @@ ChipsetGeodeLinkInit(void)
                return;
 
        totalmem = sizeram() << 20 - 1;
                return;
 
        totalmem = sizeram() << 20 - 1;

-       totalmem >>= 12; 
+       totalmem >>= 12;

        totalmem = ~totalmem;
        totalmem &= 0xfffff;
        msr.lo = totalmem;
        totalmem = ~totalmem;
        totalmem &= 0xfffff;
        msr.lo = totalmem;


@@ -292,7 +292,7 @@ gx2_chipsetinit (struct northbridge_amd_gx2_config *nb)
        printk(BIOS_DEBUG, "Companion is a %s\n", is_5536()?"CS5536":"CS5535");
 
 #ifdef UNUSED_CODE
        printk(BIOS_DEBUG, "Companion is a %s\n", is_5536()?"CS5536":"CS5535");
 
 #ifdef UNUSED_CODE

-       /* we hope NEVER to be in coreboot when S3 resumes 
+       /* we hope NEVER to be in coreboot when S3 resumes

        if (! IsS3Resume()) */
        {
                struct acpiinit *aci = acpi_init_table;
        if (! IsS3Resume()) */
        {
                struct acpiinit *aci = acpi_init_table;


@@ -319,14 +319,14 @@ gx2_chipsetinit (struct northbridge_amd_gx2_config *nb)
                msrnum = MSR_SB_USB2 + 8;
                wrmsr(msrnum, msr);
        }
                msrnum = MSR_SB_USB2 + 8;
                wrmsr(msrnum, msr);
        }

-       
+

        /* set hd IRQ */
        outl    (GPIOL_2_SET, GPIOL_INPUT_ENABLE);
        outl    (GPIOL_2_SET, GPIOL_IN_AUX1_SELECT);
 
        /*  Allow IO read and writes during a ATA DMA operation. */
        /*   This could be done in the HD rom but do it here for easier debugging. */
        /* set hd IRQ */
        outl    (GPIOL_2_SET, GPIOL_INPUT_ENABLE);
        outl    (GPIOL_2_SET, GPIOL_IN_AUX1_SELECT);
 
        /*  Allow IO read and writes during a ATA DMA operation. */
        /*   This could be done in the HD rom but do it here for easier debugging. */

-       
+

        msrnum = ATA_SB_GLD_MSR_ERR;
        msr = rdmsr(msrnum);
        msr.lo &= ~0x100;
        msrnum = ATA_SB_GLD_MSR_ERR;
        msr = rdmsr(msrnum);
        msr.lo &= ~0x100;

diff --git a/src/northbridge/amd/gx2/grphinit.c b/src/northbridge/amd/gx2/grphinit.c
index a30ba78373ce38ea49e6870d07d891ace061792a..e59a838afe0abc1bc60ce774544a6eb77f54c666 100644 (file)
--- a/src/northbridge/amd/gx2/grphinit.c
+++ b/src/northbridge/amd/gx2/grphinit.c
@@ -4,7 +4,7 @@
 #include <device/device.h>
 #include "chip.h"
 #include "northbridge.h"
 #include <device/device.h>
 #include "chip.h"
 #include "northbridge.h"

- 
+

 // FIXME handle UMA properly.
 #define VIDEO_MB       8                                       // MB of video memory
 
 // FIXME handle UMA properly.
 #define VIDEO_MB       8                                       // MB of video memory
 

diff --git a/src/northbridge/amd/gx2/northbridge.c b/src/northbridge/amd/gx2/northbridge.c
index e74a8e33f8fa63c0084b4651dc5aec6dadb1682e..98acbc9f9559de68f8cb5a55f680b9e259e84bb5 100644 (file)
--- a/src/northbridge/amd/gx2/northbridge.c
+++ b/src/northbridge/amd/gx2/northbridge.c
@@ -19,7 +19,7 @@
 
 #define NORTHBRIDGE_FILE "northbridge.c"
 
 
 #define NORTHBRIDGE_FILE "northbridge.c"
 

-/* todo: add a resource record. We don't do this here because this may be called when 
+/* todo: add a resource record. We don't do this here because this may be called when

   * very little of the platform is actually working.
   */
 int
   * very little of the platform is actually working.
   */
 int


@@ -128,7 +128,7 @@ static void irq_init_steering(struct device *dev, u16 irq_map) {
        printk(BIOS_DEBUG, "%s(%p [%08X], %04X)\n", __func__, dev, pciAddr, irq_map);
 
        /* The IRQ steering values (in hex) are effectively dcba, where:
        printk(BIOS_DEBUG, "%s(%p [%08X], %04X)\n", __func__, dev, pciAddr, irq_map);
 
        /* The IRQ steering values (in hex) are effectively dcba, where:

-        *    <a> represents the IRQ for INTA, 
+        *    <a> represents the IRQ for INTA,

         *    <b> represents the IRQ for INTB,
         *    <c> represents the IRQ for INTC, and
         *    <d> represents the IRQ for INTD.
         *    <b> represents the IRQ for INTB,
         *    <c> represents the IRQ for INTC, and
         *    <d> represents the IRQ for INTD.


@@ -146,10 +146,10 @@ static void irq_init_steering(struct device *dev, u16 irq_map) {
 /*
  * setup_gx2_cache
  *
 /*
  * setup_gx2_cache
  *

- * Returns the amount of memory (in KB) available to the system.  This is the 
+ * Returns the amount of memory (in KB) available to the system.  This is the

  * total amount of memory less the amount of memory reserved for SMM use.
  *
  * total amount of memory less the amount of memory reserved for SMM use.
  *

- */ 
+ */

 static int
 setup_gx2_cache(void)
 {
 static int
 setup_gx2_cache(void)
 {


@@ -200,13 +200,13 @@ setup_gx2(void)
 
        membytes = size_kb * 1024;
        /* NOTE! setup_gx2_cache returns the SIZE OF RAM - RAMADJUST!
 
        membytes = size_kb * 1024;
        /* NOTE! setup_gx2_cache returns the SIZE OF RAM - RAMADJUST!

-         * so it is safe to use. You should NOT at this point call     
-         * sizeram() directly. 
+         * so it is safe to use. You should NOT at this point call
+         * sizeram() directly.

          */
 
        /* we need to set 0x10000028 and 0x40000029 */
        /*
          */
 
        /* we need to set 0x10000028 and 0x40000029 */
        /*

-        * These two descriptors cover the range from 1 MB (0x100000) to 
+        * These two descriptors cover the range from 1 MB (0x100000) to

         * SYSTOP (a.k.a. TOM, or Top of Memory)
         */
 
         * SYSTOP (a.k.a. TOM, or Top of Memory)
         */
 


@@ -271,16 +271,16 @@ setup_gx2(void)
 
 static void enable_shadow(device_t dev)
 {
 
 static void enable_shadow(device_t dev)
 {

-       
+

 }
 
 }
 

-static void northbridge_init(device_t dev) 
+static void northbridge_init(device_t dev)

 {
        unsigned long m;
 
        struct northbridge_amd_gx2_config *nb = (struct northbridge_amd_gx2_config *)dev->chip_info;
        printk(BIOS_DEBUG, "northbridge: %s()\n", __func__);
 {
        unsigned long m;
 
        struct northbridge_amd_gx2_config *nb = (struct northbridge_amd_gx2_config *)dev->chip_info;
        printk(BIOS_DEBUG, "northbridge: %s()\n", __func__);

-       
+

        enable_shadow(dev);
        irq_init_steering(dev, nb->irqmap);
 
        enable_shadow(dev);
        irq_init_steering(dev, nb->irqmap);
 


@@ -421,7 +421,7 @@ static void pci_domain_set_resources(device_t dev)
                                continue;
                        ramreg += 1 << (((mem_config & (DIMM_SZ << i)) >> (i + 8)) + 2);
                }
                                continue;
                        ramreg += 1 << (((mem_config & (DIMM_SZ << i)) >> (i + 8)) + 2);
                }

-                       
+

                tomk = ramreg << 10;
 
                /* Sort out the framebuffer size */
                tomk = ramreg << 10;
 
                /* Sort out the framebuffer size */


@@ -455,7 +455,7 @@ static struct device_operations pci_domain_ops = {
         .enable_resources = enable_childrens_resources,
         .init             = 0,
         .scan_bus         = pci_domain_scan_bus,
         .enable_resources = enable_childrens_resources,
         .init             = 0,
         .scan_bus         = pci_domain_scan_bus,

-};  
+};

 
 static void cpu_bus_init(device_t dev)
 {
 
 static void cpu_bus_init(device_t dev)
 {


@@ -516,5 +516,5 @@ static void enable_dev(struct device *dev)
 
 struct chip_operations northbridge_amd_gx2_ops = {
        CHIP_NAME("AMD GX (previously GX2) Northbridge")
 
 struct chip_operations northbridge_amd_gx2_ops = {
        CHIP_NAME("AMD GX (previously GX2) Northbridge")

-       .enable_dev = enable_dev, 
+       .enable_dev = enable_dev,

 };
 };

diff --git a/src/northbridge/amd/gx2/northbridgeinit.c b/src/northbridge/amd/gx2/northbridgeinit.c
index 4ad5af23bc9c207c0a364845c4e1ab8e6167f56d..7053f5e5d9f42f4f1805af27caf7e47b593ef365 100644 (file)
--- a/src/northbridge/amd/gx2/northbridgeinit.c
+++ b/src/northbridge/amd/gx2/northbridgeinit.c
@@ -126,14 +126,14 @@ ShadowInit(struct gliutable *gl)
        msr = rdmsr(gl->desc_name);
 
        if (msr.lo == 0) {
        msr = rdmsr(gl->desc_name);
 
        if (msr.lo == 0) {

-               writeglmsr(gl); 
+               writeglmsr(gl);

        }
 }
 
        }
 }
 

-/* NOTE: transcribed from assembly code. There is the usual redundant assembly nonsense in here. 
+/* NOTE: transcribed from assembly code. There is the usual redundant assembly nonsense in here.

   * CLEAN ME UP
    */
   * CLEAN ME UP
    */

-/* yes, this duplicates later code, but it seems that is how they want it done. 
+/* yes, this duplicates later code, but it seems that is how they want it done.

   */
 static void
 SysmemInit(struct gliutable *gl)
   */
 static void
 SysmemInit(struct gliutable *gl)


@@ -141,8 +141,8 @@ SysmemInit(struct gliutable *gl)
        msr_t msr;
        int sizembytes, sizebytes;
 
        msr_t msr;
        int sizembytes, sizebytes;
 

-       /* 
-        * Figure out how much RAM is in the machine and alocate all to the 
+       /*
+        * Figure out how much RAM is in the machine and alocate all to the

         * system. We will adjust for SMM and DMM now and Frame Buffer later.
         */
        sizembytes = sizeram();
         * system. We will adjust for SMM and DMM now and Frame Buffer later.
         */
        sizembytes = sizeram();


@@ -165,7 +165,7 @@ SysmemInit(struct gliutable *gl)
        msr = rdmsr(gl->desc_name);
        printk(BIOS_DEBUG, "%s: AFTER write msr 0x%08lx, val 0x%08x:0x%08x\n", __func__,
                                gl->desc_name, msr.hi, msr.lo);
        msr = rdmsr(gl->desc_name);
        printk(BIOS_DEBUG, "%s: AFTER write msr 0x%08lx, val 0x%08x:0x%08x\n", __func__,
                                gl->desc_name, msr.hi, msr.lo);

-       
+

 }
 static void
 DMMGL0Init(struct gliutable *gl) {
 }
 static void
 DMMGL0Init(struct gliutable *gl) {


@@ -188,11 +188,11 @@ DMMGL0Init(struct gliutable *gl) {
        msr.hi |= (DMM_OFFSET >> 24);
        msr.lo = DMM_OFFSET << 8;
        msr.lo |= ((~(DMM_SIZE*1024)+1)>>12)&0xfffff;
        msr.hi |= (DMM_OFFSET >> 24);
        msr.lo = DMM_OFFSET << 8;
        msr.lo |= ((~(DMM_SIZE*1024)+1)>>12)&0xfffff;

-       
+

        wrmsr(gl->desc_name, msr);      // MSR - See table above
        msr = rdmsr(gl->desc_name);
        printk(BIOS_DEBUG, "%s: AFTER write msr 0x%08lx, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo);
        wrmsr(gl->desc_name, msr);      // MSR - See table above
        msr = rdmsr(gl->desc_name);
        printk(BIOS_DEBUG, "%s: AFTER write msr 0x%08lx, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo);

-       
+

 }
 static void
 DMMGL1Init(struct gliutable *gl) {
 }
 static void
 DMMGL1Init(struct gliutable *gl) {


@@ -211,7 +211,7 @@ DMMGL1Init(struct gliutable *gl) {
        /* hmm. AMD source has SMM here ... SMM, not DMM? We think DMM */
        printk(BIOS_ERR, "%s: warning, using DMM_SIZE even though AMD used SMM_SIZE\n", __func__);
        msr.lo |= ((~(DMM_SIZE*1024)+1)>>12)&0xfffff;
        /* hmm. AMD source has SMM here ... SMM, not DMM? We think DMM */
        printk(BIOS_ERR, "%s: warning, using DMM_SIZE even though AMD used SMM_SIZE\n", __func__);
        msr.lo |= ((~(DMM_SIZE*1024)+1)>>12)&0xfffff;

-       
+

        wrmsr(gl->desc_name, msr);      // MSR - See table above
        msr = rdmsr(gl->desc_name);
        printk(BIOS_DEBUG, "%s: AFTER write msr 0x%08lx, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo);
        wrmsr(gl->desc_name, msr);      // MSR - See table above
        msr = rdmsr(gl->desc_name);
        printk(BIOS_DEBUG, "%s: AFTER write msr 0x%08lx, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo);


@@ -238,7 +238,7 @@ SMMGL0Init(struct gliutable *gl) {
 
        msr.lo = SMM_OFFSET << 8;
        msr.lo |= ((~(SMM_SIZE*1024)+1)>>12)&0xfffff;
 
        msr.lo = SMM_OFFSET << 8;
        msr.lo |= ((~(SMM_SIZE*1024)+1)>>12)&0xfffff;

-       
+

        wrmsr(gl->desc_name, msr);      // MSR - See table above
        msr = rdmsr(gl->desc_name);
        printk(BIOS_DEBUG, "%s: AFTER write msr 0x%08lx, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo);
        wrmsr(gl->desc_name, msr);      // MSR - See table above
        msr = rdmsr(gl->desc_name);
        printk(BIOS_DEBUG, "%s: AFTER write msr 0x%08lx, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo);


@@ -254,7 +254,7 @@ SMMGL1Init(struct gliutable *gl) {
        msr.hi |= (SMM_OFFSET >> 24);
        msr.lo = SMM_OFFSET << 8;
        msr.lo |= ((~(SMM_SIZE*1024)+1)>>12)&0xfffff;
        msr.hi |= (SMM_OFFSET >> 24);
        msr.lo = SMM_OFFSET << 8;
        msr.lo |= ((~(SMM_SIZE*1024)+1)>>12)&0xfffff;

-       
+

        wrmsr(gl->desc_name, msr);      // MSR - See table above
        msr = rdmsr(gl->desc_name);
        printk(BIOS_DEBUG, "%s: AFTER write msr 0x%08lx, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo);
        wrmsr(gl->desc_name, msr);      // MSR - See table above
        msr = rdmsr(gl->desc_name);
        printk(BIOS_DEBUG, "%s: AFTER write msr 0x%08lx, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo);


@@ -265,31 +265,31 @@ GLIUInit(struct gliutable *gl){
 
        while (gl->desc_type != GL_END){
                switch(gl->desc_type){
 
        while (gl->desc_type != GL_END){
                switch(gl->desc_type){

-               default: 
+               default:

                        /* For Unknown types: Write then read MSR */
                        writeglmsr(gl);
                case SC_SHADOW: /*  Check for a Shadow entry*/
                        ShadowInit(gl);
                        break;
                        /* For Unknown types: Write then read MSR */
                        writeglmsr(gl);
                case SC_SHADOW: /*  Check for a Shadow entry*/
                        ShadowInit(gl);
                        break;

-       
+

                case R_SYSMEM: /*  check for a SYSMEM entry*/
                        SysmemInit(gl);
                        break;
                case R_SYSMEM: /*  check for a SYSMEM entry*/
                        SysmemInit(gl);
                        break;

-       
+

                case BMO_DMM: /*  check for a DMM entry*/
                        DMMGL0Init(gl);
                        break;
                case BMO_DMM: /*  check for a DMM entry*/
                        DMMGL0Init(gl);
                        break;

-       
+

                case BM_DMM     : /*  check for a DMM entry*/
                        DMMGL1Init(gl);
                        break;
                case BM_DMM     : /*  check for a DMM entry*/
                        DMMGL1Init(gl);
                        break;

-       
+

                case BMO_SMM    : /*  check for a SMM entry*/
                        SMMGL0Init(gl);
                        break;
                case BMO_SMM    : /*  check for a SMM entry*/
                        SMMGL0Init(gl);
                        break;

-       
+

                case BM_SMM     : /*  check for a SMM entry*/
                case BM_SMM     : /*  check for a SMM entry*/

-                       SMMGL1Init(gl); 
+                       SMMGL1Init(gl);

                        break;
                }
                gl++;
                        break;
                }
                gl++;


@@ -413,7 +413,7 @@ static void GLPCIInit(void){
 
        /* */
        /* 5535 NB Init*/
 
        /* */
        /* 5535 NB Init*/

-       /* */   
+       /* */

        msrnum = GLPCI_ARB;
        msr = rdmsr(msrnum);
        msr.hi |=  GLPCI_ARB_UPPER_PRE0_SET | GLPCI_ARB_UPPER_PRE1_SET;
        msrnum = GLPCI_ARB;
        msr = rdmsr(msrnum);
        msr.hi |=  GLPCI_ARB_UPPER_PRE0_SET | GLPCI_ARB_UPPER_PRE1_SET;


@@ -432,19 +432,19 @@ static void GLPCIInit(void){
 
        msr.lo &=  ~ (0x07 << GLPCI_CTRL_LOWER_IRFT_SHIFT);
        msr.lo |=  0x06 << GLPCI_CTRL_LOWER_IRFT_SHIFT;
 
        msr.lo &=  ~ (0x07 << GLPCI_CTRL_LOWER_IRFT_SHIFT);
        msr.lo |=  0x06 << GLPCI_CTRL_LOWER_IRFT_SHIFT;

-       
+

        msr.hi &=  ~ (0x0f << GLPCI_CTRL_UPPER_FTH_SHIFT);
        msr.hi |=  0x0F << GLPCI_CTRL_UPPER_FTH_SHIFT;
        msr.hi &=  ~ (0x0f << GLPCI_CTRL_UPPER_FTH_SHIFT);
        msr.hi |=  0x0F << GLPCI_CTRL_UPPER_FTH_SHIFT;

-       
+

        msr.hi &=  ~ (0x0f << GLPCI_CTRL_UPPER_RTH_SHIFT);
        msr.hi |=  0x0F << GLPCI_CTRL_UPPER_RTH_SHIFT;
        msr.hi &=  ~ (0x0f << GLPCI_CTRL_UPPER_RTH_SHIFT);
        msr.hi |=  0x0F << GLPCI_CTRL_UPPER_RTH_SHIFT;

-       
+

        msr.hi &=  ~ (0x0f << GLPCI_CTRL_UPPER_SBRTH_SHIFT);
        msr.hi |=  0x0F << GLPCI_CTRL_UPPER_SBRTH_SHIFT;
        msr.hi &=  ~ (0x0f << GLPCI_CTRL_UPPER_SBRTH_SHIFT);
        msr.hi |=  0x0F << GLPCI_CTRL_UPPER_SBRTH_SHIFT;

-       
+

        msr.hi &=  ~ (0x03 << GLPCI_CTRL_UPPER_WTO_SHIFT);
        msr.hi |=  0x06 << GLPCI_CTRL_UPPER_WTO_SHIFT;
        msr.hi &=  ~ (0x03 << GLPCI_CTRL_UPPER_WTO_SHIFT);
        msr.hi |=  0x06 << GLPCI_CTRL_UPPER_WTO_SHIFT;

-       
+

        msr.hi &=  ~ (0x03 << GLPCI_CTRL_UPPER_ILTO_SHIFT);
        msr.hi |=  0x00 << GLPCI_CTRL_UPPER_ILTO_SHIFT;
        wrmsr(msrnum, msr);
        msr.hi &=  ~ (0x03 << GLPCI_CTRL_UPPER_ILTO_SHIFT);
        msr.hi |=  0x00 << GLPCI_CTRL_UPPER_ILTO_SHIFT;
        wrmsr(msrnum, msr);


@@ -478,7 +478,7 @@ static void GLPCIInit(void){
        /* *    Modified:*/
        /* **/
        /* ***************************************************************************/
        /* *    Modified:*/
        /* **/
        /* ***************************************************************************/

-static void 
+static void

 ClockGatingInit (void){
        msr_t msr;
        struct msrinit *gating = ClockGatingDefault;
 ClockGatingInit (void){
        msr_t msr;
        struct msrinit *gating = ClockGatingDefault;


@@ -489,7 +489,7 @@ ClockGatingInit (void){
        NOSTACK bx, GetNVRAMValueBX
        cmp     al, TVALUE_CG_OFF
        je      gatingdone
        NOSTACK bx, GetNVRAMValueBX
        cmp     al, TVALUE_CG_OFF
        je      gatingdone

-       
+

        cmp     al, TVALUE_CG_DEFAULT
        jb      allon
        ja      performance
        cmp     al, TVALUE_CG_DEFAULT
        jb      allon
        ja      performance


@@ -517,7 +517,7 @@ performance:
 
 }
 
 
 }
 

-static void 
+static void

 GeodeLinkPriority(void){
        msr_t msr;
        struct msrinit *prio = GeodeLinkPriorityTable;
 GeodeLinkPriority(void){
        msr_t msr;
        struct msrinit *prio = GeodeLinkPriorityTable;


@@ -537,7 +537,7 @@ GeodeLinkPriority(void){
 }
 
 
 }
 
 

-       
+

 /*
  *     Get the GLIU0 shadow register settings
  *     If the setShadow function is used then all shadow descriptors
 /*
  *     Get the GLIU0 shadow register settings
  *     If the setShadow function is used then all shadow descriptors


@@ -613,7 +613,7 @@ static void setShadowRCONF(uint32_t shadowHi, uint32_t shadowLo)
 static void setShadowGLPCI(uint32_t shadowHi, uint32_t shadowLo)
 {
        msr_t msr;
 static void setShadowGLPCI(uint32_t shadowHi, uint32_t shadowLo)
 {
        msr_t msr;

-       
+

 // Set the Enable Register.
 
        msr = rdmsr(GLPCI_REN);
 // Set the Enable Register.
 
        msr = rdmsr(GLPCI_REN);


@@ -667,7 +667,7 @@ static void setShadow(uint64_t shadowSettings)
  *     Destroys:
  *
  **************************************************************************/
  *     Destroys:
  *
  **************************************************************************/

-static void 
+static void

 shadowRom(void)
 {
        uint64_t shadowSettings = getShadow();
 shadowRom(void)
 {
        uint64_t shadowSettings = getShadow();


@@ -688,7 +688,7 @@ shadowRom(void)
  *  ROMBASE(36:55) = 0FFFC0h ; Top of PCI/bottom of rom chipselect area
  *  DEVRC(35:28) =  39h         ; cache disabled in PCI memory + WS bit on + Write Combine + write burst.
  *  SYSTOP(27:8) = top of system memory
  *  ROMBASE(36:55) = 0FFFC0h ; Top of PCI/bottom of rom chipselect area
  *  DEVRC(35:28) =  39h         ; cache disabled in PCI memory + WS bit on + Write Combine + write burst.
  *  SYSTOP(27:8) = top of system memory

- *  SYSRC(7:0) = 00h            ; writeback, can set to 08h to make writethrough 
+ *  SYSRC(7:0) = 00h            ; writeback, can set to 08h to make writethrough

  *
  ***************************************************************************/
 #define SYSMEM_RCONF_WRITETHROUGH 8
  *
  ***************************************************************************/
 #define SYSMEM_RCONF_WRITETHROUGH 8


@@ -716,17 +716,17 @@ RCONFInit(void)
                while (1);
        }
 
                while (1);
        }
 

-// sysdescfound:       
+// sysdescfound:

        /* found the descriptor... get its contents */
        msr = rdmsr(gl->desc_name);
 
        /* found the descriptor... get its contents */
        msr = rdmsr(gl->desc_name);
 

-       /* 20 bit address -  The bottom 12 bits go into bits 20-31 in eax, the 
-        * top 8 bits go into 0-7 of edx. 
+       /* 20 bit address -  The bottom 12 bits go into bits 20-31 in eax, the
+        * top 8 bits go into 0-7 of edx.

         */
        msr.lo = (msr.lo & 0xFFFFFF00) | (msr.hi & 0xFF);
        msr.lo = ((msr.lo << 12) | (msr.lo >> 20)) & 0x000FFFFF;
        msr.lo <<= RCONF_DEFAULT_LOWER_SYSTOP_SHIFT;    // 8
         */
        msr.lo = (msr.lo & 0xFFFFFF00) | (msr.hi & 0xFF);
        msr.lo = ((msr.lo << 12) | (msr.lo >> 20)) & 0x000FFFFF;
        msr.lo <<= RCONF_DEFAULT_LOWER_SYSTOP_SHIFT;    // 8

-       
+

        // Set Default SYSMEM region properties
        msr.lo &= ~SYSMEM_RCONF_WRITETHROUGH;   // 8 (or ~8)
 
        // Set Default SYSMEM region properties
        msr.lo &= ~SYSMEM_RCONF_WRITETHROUGH;   // 8 (or ~8)
 


@@ -739,7 +739,7 @@ RCONFInit(void)
 
        // Set ROMBASE cache properties.
        msr.hi |= ((ROMRC_RCONF_DEFAULT >> 8) | (ROMRC_RCONF_DEFAULT << 24));
 
        // Set ROMBASE cache properties.
        msr.hi |= ((ROMRC_RCONF_DEFAULT >> 8) | (ROMRC_RCONF_DEFAULT << 24));

-       
+

        // now program RCONF_DEFAULT
        wrmsr(CPU_RCONF_DEFAULT, msr);
 
        // now program RCONF_DEFAULT
        wrmsr(CPU_RCONF_DEFAULT, msr);
 


@@ -776,15 +776,15 @@ northbridgeinit(void)
                GLIUInit(gliutables[i]);
 
        GeodeLinkPriority();
                GLIUInit(gliutables[i]);
 
        GeodeLinkPriority();

-       
+

        shadowRom();
        shadowRom();

-       
-       // GeodeROM ensures that the BIOS waits the required 1 second before 
+
+       // GeodeROM ensures that the BIOS waits the required 1 second before

        // allowing anything to access PCI
        // PCIDelay();
        // allowing anything to access PCI
        // PCIDelay();

-       
+

        RCONFInit();
        RCONFInit();

-       
+

        // The cacheInit function in GeodeROM tests cache and, among other things,
        // makes sure all INVD instructions are treated as WBINVD.  We do this
        // because we've found some programs which require this behavior.
        // The cacheInit function in GeodeROM tests cache and, among other things,
        // makes sure all INVD instructions are treated as WBINVD.  We do this
        // because we've found some programs which require this behavior.


@@ -792,7 +792,7 @@ northbridgeinit(void)
        msr = rdmsr(CPU_DM_CONFIG0);
        msr.lo |= DM_CONFIG0_LOWER_WBINVD_SET;
        wrmsr(CPU_DM_CONFIG0, msr);
        msr = rdmsr(CPU_DM_CONFIG0);
        msr.lo |= DM_CONFIG0_LOWER_WBINVD_SET;
        wrmsr(CPU_DM_CONFIG0, msr);

-       
+

        /*  Now that the descriptor to memory is set up.*/
        /*  The memory controller needs one read to synch its lines before it can be used.*/
        i = *(int *) 0;
        /*  Now that the descriptor to memory is set up.*/
        /*  The memory controller needs one read to synch its lines before it can be used.*/
        i = *(int *) 0;

diff --git a/src/northbridge/amd/gx2/pll_reset.c b/src/northbridge/amd/gx2/pll_reset.c
index 898e31dcd4a30b7addffd3926057820f8fa173d3..c1b22a28a0428f074dcbd4c36a9c3bea37362962 100644 (file)
--- a/src/northbridge/amd/gx2/pll_reset.c
+++ b/src/northbridge/amd/gx2/pll_reset.c
@@ -125,7 +125,7 @@ static unsigned int get_memory_speed(void)
 
 #define DEFAULT_MDIV   3
 #define DEFAULT_VDIV   2
 
 #define DEFAULT_MDIV   3
 #define DEFAULT_VDIV   2

-#define DEFAULT_FBDIV  22      // 366/244 ; 24 400/266 018 ;300/200 
+#define DEFAULT_FBDIV  22      // 366/244 ; 24 400/266 018 ;300/200

 
 static void pll_reset(void)
 {
 
 static void pll_reset(void)
 {


@@ -134,10 +134,10 @@ static void pll_reset(void)
        unsigned SyncBits;                      // store the sync bits in up ebx
 
        // clear the Bypass bit
        unsigned SyncBits;                      // store the sync bits in up ebx
 
        // clear the Bypass bit

-       
+

        // If the straps say we are in bypass and the syspll is not AND there are no software
        // bits set then FS2 or something set up the PLL and we should not change it.
        // If the straps say we are in bypass and the syspll is not AND there are no software
        // bits set then FS2 or something set up the PLL and we should not change it.

-       
+

        msrGlcpSysRstpll = rdmsr(GLCP_SYS_RSTPLL);
        msrGlcpSysRstpll.lo &= ~RSTPPL_LOWER_BYPASS_SET;
        wrmsr(GLCP_SYS_RSTPLL, msrGlcpSysRstpll);
        msrGlcpSysRstpll = rdmsr(GLCP_SYS_RSTPLL);
        msrGlcpSysRstpll.lo &= ~RSTPPL_LOWER_BYPASS_SET;
        wrmsr(GLCP_SYS_RSTPLL, msrGlcpSysRstpll);


@@ -145,15 +145,15 @@ static void pll_reset(void)
        // If the "we've already been here" flag is set, don't reconfigure the pll
        if ( !(msrGlcpSysRstpll.lo & PLLCHECK_COMPLETED ) )
        { // we haven't configured the PLL; do it now
        // If the "we've already been here" flag is set, don't reconfigure the pll
        if ( !(msrGlcpSysRstpll.lo & PLLCHECK_COMPLETED ) )
        { // we haven't configured the PLL; do it now

-       
+

                // Store PCI33(0)/66(1), SDR(0)/DDR(1), and CRT(0)/TFT(1) in upper esi to get to the
                // correct Strap Table.
                post_code(POST_PLL_INIT);
                // Store PCI33(0)/66(1), SDR(0)/DDR(1), and CRT(0)/TFT(1) in upper esi to get to the
                // correct Strap Table.
                post_code(POST_PLL_INIT);

-               
+

                // configure for DDR
                msrGlcpSysRstpll.lo &= ~(1 << RSTPPL_LOWER_SDRMODE_SHIFT);
                wrmsr(GLCP_SYS_RSTPLL, msrGlcpSysRstpll);
                // configure for DDR
                msrGlcpSysRstpll.lo &= ~(1 << RSTPPL_LOWER_SDRMODE_SHIFT);
                wrmsr(GLCP_SYS_RSTPLL, msrGlcpSysRstpll);

-               
+

                // Use Manual settings
                //      UseManual:
                post_code(POST_PLL_MANUAL);
                // Use Manual settings
                //      UseManual:
                post_code(POST_PLL_MANUAL);


@@ -161,7 +161,7 @@ static void pll_reset(void)
                // DIV settings manually entered.
                // ax = VDIV, upper eax = MDIV, upper ecx = FbDIV
                // use gs and fs since we don't need them.
                // DIV settings manually entered.
                // ax = VDIV, upper eax = MDIV, upper ecx = FbDIV
                // use gs and fs since we don't need them.

-               
+

                //      ProgramClocks:
                // ax = VDIV, upper eax = MDIV, upper ecx = FbDIV
                // move everything into ebx
                //      ProgramClocks:
                // ax = VDIV, upper eax = MDIV, upper ecx = FbDIV
                // move everything into ebx


@@ -174,7 +174,7 @@ static void pll_reset(void)
                // FbDIV
                MDIV_VDIV_FBDIV |= (plldiv2fbdiv[DEFAULT_FBDIV] << RSTPLL_UPPER_FBDIV_SHIFT);
 
                // FbDIV
                MDIV_VDIV_FBDIV |= (plldiv2fbdiv[DEFAULT_FBDIV] << RSTPLL_UPPER_FBDIV_SHIFT);
 

-               // write GLCP_SYS_RSTPPL (GLCP reg 0x14) with clock values  
+               // write GLCP_SYS_RSTPPL (GLCP reg 0x14) with clock values

                msrGlcpSysRstpll.lo &= ~(1 << RSTPPL_LOWER_SDRMODE_SHIFT);
                wrmsr(GLCP_SYS_RSTPLL, msrGlcpSysRstpll);
 
                msrGlcpSysRstpll.lo &= ~(1 << RSTPPL_LOWER_SDRMODE_SHIFT);
                wrmsr(GLCP_SYS_RSTPLL, msrGlcpSysRstpll);
 


@@ -192,15 +192,15 @@ static void pll_reset(void)
                // Check for Bypass mode.
                if (msrGlcpSysRstpll.lo & RSTPPL_LOWER_BYPASS_SET)
                {
                // Check for Bypass mode.
                if (msrGlcpSysRstpll.lo & RSTPPL_LOWER_BYPASS_SET)
                {

-                       // If we are in BYPASS PCI may or may not be sync'd but CPU and GeodeLink will. 
+                       // If we are in BYPASS PCI may or may not be sync'd but CPU and GeodeLink will.

                        SyncBits |= RSTPPL_LOWER_CPU_SEMI_SYNC_SET;
                }
                else
                {
                        SyncBits |= RSTPPL_LOWER_CPU_SEMI_SYNC_SET;
                }
                else
                {

-                       //      CheckPCIsync:   
+                       //      CheckPCIsync:

                        // If FBdiv/Mdiv is evenly divisible then set the PCI semi-sync. FB is always greater
                        // look up the real divider... if we get a 0 we have serious problems
                        // If FBdiv/Mdiv is evenly divisible then set the PCI semi-sync. FB is always greater
                        // look up the real divider... if we get a 0 we have serious problems

-                       if ( !(fbdiv2plldiv[((msrGlcpSysRstpll.hi >> RSTPLL_UPPER_FBDIV_SHIFT) & 0x3f)] % 
+                       if ( !(fbdiv2plldiv[((msrGlcpSysRstpll.hi >> RSTPLL_UPPER_FBDIV_SHIFT) & 0x3f)] %

                                (((msrGlcpSysRstpll.hi >> RSTPLL_UPPER_MDIV_SHIFT) & 0x0F) + 2)) )
                        {
                                SyncBits |= RSTPPL_LOWER_PCI_SEMI_SYNC_SET;
                                (((msrGlcpSysRstpll.hi >> RSTPLL_UPPER_MDIV_SHIFT) & 0x0F) + 2)) )
                        {
                                SyncBits |= RSTPPL_LOWER_PCI_SEMI_SYNC_SET;


@@ -234,13 +234,13 @@ static void pll_reset(void)
                msrGlcpSysRstpll.lo |= (RSTPPL_LOWER_PLL_RESET_SET + RSTPPL_LOWER_PD_SET);
                msrGlcpSysRstpll.lo |= RSTPPL_LOWER_CHIP_RESET_SET;
                wrmsr(GLCP_SYS_RSTPLL, msrGlcpSysRstpll);
                msrGlcpSysRstpll.lo |= (RSTPPL_LOWER_PLL_RESET_SET + RSTPPL_LOWER_PD_SET);
                msrGlcpSysRstpll.lo |= RSTPPL_LOWER_CHIP_RESET_SET;
                wrmsr(GLCP_SYS_RSTPLL, msrGlcpSysRstpll);

-               
+

                // You should never get here..... The chip has reset.
                post_code(POST_PLL_RESET_FAIL);
                while (1);
 
        } // we haven't configured the PLL; do it now
                // You should never get here..... The chip has reset.
                post_code(POST_PLL_RESET_FAIL);
                while (1);
 
        } // we haven't configured the PLL; do it now

-       
+

 }
 // End of Goodrich version of pll_reset
 ///////////////////////////////////////////////////////////////////////////////
 }
 // End of Goodrich version of pll_reset
 ///////////////////////////////////////////////////////////////////////////////

diff --git a/src/northbridge/amd/gx2/raminit.c b/src/northbridge/amd/gx2/raminit.c
index b1cb1af6b3c6fb5ee1f7422783e616e07cdea8a1..3f99cab8ee639d0bf679522319a1566da58db7e3 100644 (file)
--- a/src/northbridge/amd/gx2/raminit.c
+++ b/src/northbridge/amd/gx2/raminit.c
@@ -61,7 +61,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
        //print_debug("sdram_enable step 6\n");
 
        /* 7. Reset DLL, Bit 27 is undocumented in GX datasheet,
        //print_debug("sdram_enable step 6\n");
 
        /* 7. Reset DLL, Bit 27 is undocumented in GX datasheet,

-        * it is documented in LX datasheet  */ 
+        * it is documented in LX datasheet  */

        /* load Mode Register by set and clear PROG_DRAM */
        msr = rdmsr(0x20000018);
        msr.lo |=  ((0x01 << 27) | 0x01);
        /* load Mode Register by set and clear PROG_DRAM */
        msr = rdmsr(0x20000018);
        msr.lo |=  ((0x01 << 27) | 0x01);


@@ -85,10 +85,10 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
        /* load RDSYNC */
        msr = rdmsr(0x2000001f);
        msr.hi = 0x000ff310;
        /* load RDSYNC */
        msr = rdmsr(0x2000001f);
        msr.hi = 0x000ff310;

-       /* the above setting is supposed to be good for "slow" ram. We have found that for 
-        * some dram, at some clock rates, e.g. hynix at 366/244, this will actually 
+       /* the above setting is supposed to be good for "slow" ram. We have found that for
+        * some dram, at some clock rates, e.g. hynix at 366/244, this will actually

         * cause errors. The fix is to just set it to 0x310. Tested on 3 boards
         * cause errors. The fix is to just set it to 0x310. Tested on 3 boards

-        * with 3 different type of dram -- Hynix, PSC, infineon. 
+        * with 3 different type of dram -- Hynix, PSC, infineon.

         * I am leaving this comment here so that at some future time nobody is tempted
         * to mess with this setting -- RGM, 9/2006
         */
         * I am leaving this comment here so that at some future time nobody is tempted
         * to mess with this setting -- RGM, 9/2006
         */

diff --git a/src/northbridge/amd/lx/Kconfig b/src/northbridge/amd/lx/Kconfig
index 57a485eedcd4222c804429e7ab780703d73ee7e4..09eba0791aff3fb624f018a89d3eca92f0a3a092 100644 (file)
--- a/src/northbridge/amd/lx/Kconfig
+++ b/src/northbridge/amd/lx/Kconfig
@@ -2,7 +2,7 @@ config NORTHBRIDGE_AMD_LX
        bool
        select HAVE_HIGH_TABLES
        select GEODE_VSA
        bool
        select HAVE_HIGH_TABLES
        select GEODE_VSA

-       
+

 config VIDEO_MB
        int
        default 8
 config VIDEO_MB
        int
        default 8

diff --git a/src/northbridge/amd/lx/grphinit.c b/src/northbridge/amd/lx/grphinit.c
index 85e6a45ba02bd2561c4f45c7899f133f2cc64aca..b245eea06207ea3ce3248d5e2c0aa75b7dc97e65 100644 (file)
--- a/src/northbridge/amd/lx/grphinit.c
+++ b/src/northbridge/amd/lx/grphinit.c
@@ -35,7 +35,7 @@ struct msrinit {
 };
 
 static const struct msrinit geodelx_vga_msr[] = {
 };
 
 static const struct msrinit geodelx_vga_msr[] = {

-       /* Enable the GLIU Memory routing to the hardware 
+       /* Enable the GLIU Memory routing to the hardware

        * PDID1 : Port 4, GLIU0
        * PBASE : 0x000A0
        * PMASK : 0xFFFE0
        * PDID1 : Port 4, GLIU0
        * PBASE : 0x000A0
        * PMASK : 0xFFFE0


@@ -71,9 +71,9 @@ void graphics_init(void)
 
        /* SoftVG initialization */
        printk(BIOS_DEBUG, "Graphics init...\n");
 
        /* SoftVG initialization */
        printk(BIOS_DEBUG, "Graphics init...\n");

-   
+

        geodelx_vga_msr_init();
        geodelx_vga_msr_init();

-   
+

        /* Call SoftVG with the main configuration parameters. */
        /* NOTE: SoftVG expects the memory size to be given in 2MB blocks */
 
        /* Call SoftVG with the main configuration parameters. */
        /* NOTE: SoftVG expects the memory size to be given in 2MB blocks */
 


@@ -94,7 +94,7 @@ void graphics_init(void)
         *   so we can add the real value in megabytes
         */
 
         *   so we can add the real value in megabytes
         */
 

-       wData = VG_CFG_DRIVER | VG_CFG_PRIORITY | 
+       wData = VG_CFG_DRIVER | VG_CFG_PRIORITY |

                        VG_CFG_DSCRT | (CONFIG_VIDEO_MB & VG_MEM_MASK);
        vrWrite(wClassIndex, wData);
 
                        VG_CFG_DSCRT | (CONFIG_VIDEO_MB & VG_MEM_MASK);
        vrWrite(wClassIndex, wData);
 

diff --git a/src/northbridge/amd/lx/northbridge.c b/src/northbridge/amd/lx/northbridge.c
index 4dd29d134f4be47f7f6adcfd37e5e9d26a756949..6eba99d9df8b2044ef4b3278ca38dd5824bf289c 100644 (file)
--- a/src/northbridge/amd/lx/northbridge.c
+++ b/src/northbridge/amd/lx/northbridge.c
@@ -262,7 +262,7 @@ void print_conf(void)
 #endif                         //CONFIG_DEFAULT_CONSOLE_LOGLEVEL >= BIOS_ERR
 }
 
 #endif                         //CONFIG_DEFAULT_CONSOLE_LOGLEVEL >= BIOS_ERR
 }
 

-/* todo: add a resource record. We don't do this here because this may be called when 
+/* todo: add a resource record. We don't do this here because this may be called when

   * very little of the platform is actually working.
   */
 int sizeram(void)
   * very little of the platform is actually working.
   */
 int sizeram(void)

diff --git a/src/northbridge/amd/lx/raminit.c b/src/northbridge/amd/lx/raminit.c
index 75d77f0305f3ab8f9ef22eb4973259729dc1bf1a..9014fb1de3d6fc976210680540aaa43a3f83eec9 100644 (file)
--- a/src/northbridge/amd/lx/raminit.c
+++ b/src/northbridge/amd/lx/raminit.c
@@ -22,9 +22,9 @@
 #include <spd.h>
 #include "southbridge/amd/cs5536/cs5536.h"
 
 #include <spd.h>
 #include "southbridge/amd/cs5536/cs5536.h"
 

-static const unsigned char NumColAddr[] = { 
-       0x00, 0x10, 0x11, 0x00, 0x00, 0x00, 0x00, 0x07, 
-       0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F 
+static const unsigned char NumColAddr[] = {
+       0x00, 0x10, 0x11, 0x00, 0x00, 0x00, 0x00, 0x07,
+       0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F

 };
 
 static void banner(const char *s)
 };
 
 static void banner(const char *s)


@@ -35,8 +35,8 @@ static void banner(const char *s)
 static void hcf(void)
 {
        print_emerg("DIE\n");
 static void hcf(void)
 {
        print_emerg("DIE\n");

-       /* this guarantees we flush the UART fifos (if any) and also 
-        * ensures that things, in general, keep going so no debug output 
+       /* this guarantees we flush the UART fifos (if any) and also
+        * ensures that things, in general, keep going so no debug output

         * is lost
         */
        while (1)
         * is lost
         */
        while (1)


@@ -231,7 +231,7 @@ static void set_refresh_rate(void)
        }
 
        msr = rdmsr(MC_CF07_DATA);
        }
 
        msr = rdmsr(MC_CF07_DATA);

-       msr.lo |= ((rate0 * (GeodeLinkSpeed() / 2)) / 16) 
+       msr.lo |= ((rate0 * (GeodeLinkSpeed() / 2)) / 16)

                        << CF07_LOWER_REF_INT_SHIFT;
        wrmsr(MC_CF07_DATA, msr);
 }
                        << CF07_LOWER_REF_INT_SHIFT;
        wrmsr(MC_CF07_DATA, msr);
 }


@@ -649,7 +649,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
 
        /* If both Page Size = "Not Installed" we have a problems and should halt. */
        msr = rdmsr(MC_CF07_DATA);
 
        /* If both Page Size = "Not Installed" we have a problems and should halt. */
        msr = rdmsr(MC_CF07_DATA);

-       if ((msr.hi & ((7 << CF07_UPPER_D1_PSZ_SHIFT) | (7 << CF07_UPPER_D0_PSZ_SHIFT))) == 
+       if ((msr.hi & ((7 << CF07_UPPER_D1_PSZ_SHIFT) | (7 << CF07_UPPER_D0_PSZ_SHIFT))) ==

                        ((7 << CF07_UPPER_D1_PSZ_SHIFT) | (7 << CF07_UPPER_D0_PSZ_SHIFT))) {
                print_emerg("No memory in the system\n");
                post_code(ERROR_NO_DIMMS);
                        ((7 << CF07_UPPER_D1_PSZ_SHIFT) | (7 << CF07_UPPER_D0_PSZ_SHIFT))) {
                print_emerg("No memory in the system\n");
                post_code(ERROR_NO_DIMMS);

diff --git a/src/northbridge/intel/e7501/debug.c b/src/northbridge/intel/e7501/debug.c
index 500ea3e1380dec49859ae132415d2bcd65de5644..c116cb62965909f94a60a90c88606bc0c9e470db 100644 (file)
--- a/src/northbridge/intel/e7501/debug.c
+++ b/src/northbridge/intel/e7501/debug.c
@@ -16,8 +16,8 @@ static void print_debug_pci_dev(unsigned dev)
 static inline void print_pci_devices(void)
 {
        device_t dev;
 static inline void print_pci_devices(void)
 {
        device_t dev;

-       for(dev = PCI_DEV(0, 0, 0); 
-               dev <= PCI_DEV(0xff, 0x1f, 0x7); 
+       for(dev = PCI_DEV(0, 0, 0);
+               dev <= PCI_DEV(0xff, 0x1f, 0x7);

                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);
                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);


@@ -35,7 +35,7 @@ static void dump_pci_device(unsigned dev)
 {
        int i;
        print_debug_pci_dev(dev);
 {
        int i;
        print_debug_pci_dev(dev);

-       
+

        for(i = 0; i < 256; i++) {
                unsigned char val;
                if ((i & 0x0f) == 0) {
        for(i = 0; i < 256; i++) {
                unsigned char val;
                if ((i & 0x0f) == 0) {


@@ -61,8 +61,8 @@ static void dump_pci_device(unsigned dev)
 static inline void dump_pci_devices(void)
 {
        device_t dev;
 static inline void dump_pci_devices(void)
 {
        device_t dev;

-       for(dev = PCI_DEV(0, 0, 0); 
-               dev <= PCI_DEV(0xff, 0x1f, 0x7); 
+       for(dev = PCI_DEV(0, 0, 0);
+               dev <= PCI_DEV(0xff, 0x1f, 0x7);

                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);
                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);


@@ -104,8 +104,8 @@ static inline void dump_spd_registers(const struct mem_controller *ctrl)
 #if CONFIG_USE_PRINTK_IN_CAR
                        printk(BIOS_DEBUG, "dimm: %02x.0: %02x", i, device);
 #else
 #if CONFIG_USE_PRINTK_IN_CAR
                        printk(BIOS_DEBUG, "dimm: %02x.0: %02x", i, device);
 #else

-                       print_debug("dimm: "); 
-                       print_debug_hex8(i); 
+                       print_debug("dimm: ");
+                       print_debug_hex8(i);

                        print_debug(".0: ");
                        print_debug_hex8(device);
 #endif
                        print_debug(".0: ");
                        print_debug_hex8(device);
 #endif


@@ -141,8 +141,8 @@ static inline void dump_spd_registers(const struct mem_controller *ctrl)
 #if CONFIG_USE_PRINTK_IN_CAR
                         printk(BIOS_DEBUG, "dimm: %02x.1: %02x", i, device);
 #else
 #if CONFIG_USE_PRINTK_IN_CAR
                         printk(BIOS_DEBUG, "dimm: %02x.1: %02x", i, device);
 #else

-                       print_debug("dimm: "); 
-                       print_debug_hex8(i); 
+                       print_debug("dimm: ");
+                       print_debug_hex8(i);

                        print_debug(".1: ");
                        print_debug_hex8(device);
 #endif
                        print_debug(".1: ");
                        print_debug_hex8(device);
 #endif


@@ -188,7 +188,7 @@ static inline void dump_smbus_registers(void)
                 print_debug_hex8(device);
 #endif
                 for(j = 0; j < 256; j++) {
                 print_debug_hex8(device);
 #endif
                 for(j = 0; j < 256; j++) {

-                       int status; 
+                       int status;

                         unsigned char byte;
                         status = smbus_read_byte(device, j);
                         if (status < 0) {
                         unsigned char byte;
                         status = smbus_read_byte(device, j);
                         if (status < 0) {


@@ -212,10 +212,10 @@ static inline void dump_smbus_registers(void)
 #endif
                 }
                 print_debug("\n");
 #endif
                 }
                 print_debug("\n");

-       }       
+       }

 }
 
 }
 

-static inline void dump_io_resources(unsigned port) 
+static inline void dump_io_resources(unsigned port)

 {
 
        int i;
 {
 
        int i;


@@ -257,13 +257,13 @@ static inline void dump_mem(unsigned start, unsigned end)
                if((i & 0xf)==0) {
 #if CONFIG_USE_PRINTK_IN_CAR
                        printk(BIOS_DEBUG, "\n%08x:", i);
                if((i & 0xf)==0) {
 #if CONFIG_USE_PRINTK_IN_CAR
                        printk(BIOS_DEBUG, "\n%08x:", i);

-#else  
+#else

                        print_debug("\n");
                        print_debug_hex32(i);
                        print_debug(":");
 #endif
                }
                        print_debug("\n");
                        print_debug_hex32(i);
                        print_debug(":");
 #endif
                }

-#if CONFIG_USE_PRINTK_IN_CAR   
+#if CONFIG_USE_PRINTK_IN_CAR

                printk(BIOS_DEBUG, " %02x", (unsigned char)*((unsigned char *)i));
 #else
                print_debug(" ");
                printk(BIOS_DEBUG, " %02x", (unsigned char)*((unsigned char *)i));
 #else
                print_debug(" ");

diff --git a/src/northbridge/intel/e7501/northbridge.c b/src/northbridge/intel/e7501/northbridge.c
index c3b373c926438008bf16b51c9921114d3a70c425..a2e4b245eef65ebed47dee02c99350de10c45a0a 100644 (file)
--- a/src/northbridge/intel/e7501/northbridge.c
+++ b/src/northbridge/intel/e7501/northbridge.c
@@ -112,11 +112,11 @@ static void pci_domain_set_resources(device_t dev)
                remapbase_r = pci_read_config16(mc_dev, 0xc6);
                remapbase_r = (remapbasek >> 16) | (remapbase_r & 0xfc00);
                pci_write_config16(mc_dev, 0xc6, remapbase_r);
                remapbase_r = pci_read_config16(mc_dev, 0xc6);
                remapbase_r = (remapbasek >> 16) | (remapbase_r & 0xfc00);
                pci_write_config16(mc_dev, 0xc6, remapbase_r);

-               
+

                remaplimit_r = pci_read_config16(mc_dev, 0xc8);
                remaplimit_r = (remaplimitk >> 16) | (remaplimit_r & 0xfc00);
                pci_write_config16(mc_dev, 0xc8, remaplimit_r);
                remaplimit_r = pci_read_config16(mc_dev, 0xc8);
                remaplimit_r = (remaplimitk >> 16) | (remaplimit_r & 0xfc00);
                pci_write_config16(mc_dev, 0xc8, remaplimit_r);

-               
+

                /* Report the memory regions */
                idx = 10;
                ram_resource(dev, idx++, 0, 640);
                /* Report the memory regions */
                idx = 10;
                ram_resource(dev, idx++, 0, 640);


@@ -145,7 +145,7 @@ static struct device_operations pci_domain_ops = {
         .init             = 0,
         .scan_bus         = pci_domain_scan_bus,
        .ops_pci_bus      = &pci_cf8_conf1,
         .init             = 0,
         .scan_bus         = pci_domain_scan_bus,
        .ops_pci_bus      = &pci_cf8_conf1,

-};  
+};

 
 static void cpu_bus_init(device_t dev)
 {
 
 static void cpu_bus_init(device_t dev)
 {

diff --git a/src/northbridge/intel/e7501/raminit.c b/src/northbridge/intel/e7501/raminit.c
index 9f757e0f794cad216ff79ab3b66f32e3046a2662..ac3bd418662a4856f3ab929f4d6ff11cb8000c54 100644 (file)
--- a/src/northbridge/intel/e7501/raminit.c
+++ b/src/northbridge/intel/e7501/raminit.c
@@ -1,9 +1,9 @@
 /* This was originally for the e7500, modified for e7501
 /* This was originally for the e7500, modified for e7501

- * The primary differences are that 7501 apparently can 
+ * The primary differences are that 7501 apparently can

  * support single channel RAM (i haven't tested),
  * CAS1.5 is no longer supported, The ECC scrubber
  * now supports a mode to zero RAM and init ECC in one step
  * support single channel RAM (i haven't tested),
  * CAS1.5 is no longer supported, The ECC scrubber
  * now supports a mode to zero RAM and init ECC in one step

- * and the undocumented registers at 0x80 require new 
+ * and the undocumented registers at 0x80 require new

  * (undocumented) values determined by guesswork and
  * comparison w/ OEM BIOS values.
  * Steven James 02/06/2003
  * (undocumented) values determined by guesswork and
  * comparison w/ OEM BIOS values.
  * Steven James 02/06/2003


@@ -17,7 +17,7 @@
 #include <stdlib.h>
 #include "e7501.h"
 
 #include <stdlib.h>
 #include "e7501.h"
 

-// Uncomment this to enable run-time checking of DIMM parameters 
+// Uncomment this to enable run-time checking of DIMM parameters

 // for dual-channel operation
 // Unfortunately the code seems to chew up several K of space.
 //#define VALIDATE_DIMM_COMPATIBILITY
 // for dual-channel operation
 // Unfortunately the code seems to chew up several K of space.
 //#define VALIDATE_DIMM_COMPATIBILITY


@@ -52,10 +52,10 @@ struct dimm_size {
 /**********************************************************************************/
 
 static const uint32_t refresh_frequency[] = {
 /**********************************************************************************/
 
 static const uint32_t refresh_frequency[] = {

-       /* Relative frequency (array value) of each E7501 Refresh Mode Select 
+       /* Relative frequency (array value) of each E7501 Refresh Mode Select

         * (RMS) value (array index)
         * 0 == least frequent refresh (longest interval between refreshes)
         * (RMS) value (array index)
         * 0 == least frequent refresh (longest interval between refreshes)

-        * [0] disabled  -> 0 
+        * [0] disabled  -> 0

         * [1] 15.6 usec -> 2
         * [2]  7.8 usec -> 3
         * [3] 64   usec -> 1
         * [1] 15.6 usec -> 2
         * [2]  7.8 usec -> 3
         * [3] 64   usec -> 1


@@ -68,10 +68,10 @@ static const uint32_t refresh_frequency[] = {
 };
 
 static const uint32_t refresh_rate_map[] = {
 };
 
 static const uint32_t refresh_rate_map[] = {

-       /* Map the JEDEC spd refresh rates (array index) to E7501 Refresh Mode 
+       /* Map the JEDEC spd refresh rates (array index) to E7501 Refresh Mode

         * Select values (array value)
         * These are all the rates defined by JESD21-C Appendix D, Rev. 1.0
         * Select values (array value)
         * These are all the rates defined by JESD21-C Appendix D, Rev. 1.0

-        * The E7501 supports only 15.6 us (1), 7.8 us (2), 64 us (3), and 
+        * The E7501 supports only 15.6 us (1), 7.8 us (2), 64 us (3), and

         * 64 clock (481 ns) (7) refresh.
         * [0] ==  15.625 us -> 15.6 us
         * [1] ==   3.9   us -> 481  ns
         * 64 clock (481 ns) (7) refresh.
         * [0] ==  15.625 us -> 15.6 us
         * [1] ==   3.9   us -> 481  ns


@@ -110,7 +110,7 @@ static const long constant_register_values[] = {
         */
        // Not everyone wants to be Super Micro Computer, Inc.
        // The mainboard should set this if desired.
         */
        // Not everyone wants to be Super Micro Computer, Inc.
        // The mainboard should set this if desired.

-       // 0x2c, 0, (0x15d9 << 0) | (0x3580 << 16),            
+       // 0x2c, 0, (0x15d9 << 0) | (0x3580 << 16),

 
        /* Undocumented
         * (DRAM Read Timing Control, if similar to 855PM?)
 
        /* Undocumented
         * (DRAM Read Timing Control, if similar to 855PM?)


@@ -125,11 +125,11 @@ static const long constant_register_values[] = {
         * CAS 2.0 values taken from Intel BIOS settings, others are a guess
         * and may be terribly wrong. Old values preserved as comments until I
         * figure this out for sure.
         * CAS 2.0 values taken from Intel BIOS settings, others are a guess
         * and may be terribly wrong. Old values preserved as comments until I
         * figure this out for sure.

-        * e7501 docs claim that CAS1.5 is unsupported, so it may or may not 
+        * e7501 docs claim that CAS1.5 is unsupported, so it may or may not

         * work at all.
         * Steven James 02/06/2003
         */
         * work at all.
         * Steven James 02/06/2003
         */

-       /* NOTE: values now configured in configure_e7501_cas_latency() based 
+       /* NOTE: values now configured in configure_e7501_cas_latency() based

         *       on SPD info and total number of DIMMs (per Intel)
         */
 
         *       on SPD info and total number of DIMMs (per Intel)
         */
 


@@ -168,8 +168,8 @@ static const long constant_register_values[] = {
        /* DRB - DRAM Row Boundary Registers
         * 0x60 - 0x6F
         *     An array of 8 byte registers, which hold the ending
        /* DRB - DRAM Row Boundary Registers
         * 0x60 - 0x6F
         *     An array of 8 byte registers, which hold the ending

-        *     memory address assigned  to each pair of DIMMS, in 64MB 
-        *     granularity.   
+        *     memory address assigned  to each pair of DIMMS, in 64MB
+        *     granularity.

         */
        // Conservatively say each row has 64MB of ram, we will fix this up later
        // NOTE: These defaults allow us to prime all of the DIMMs on the board
         */
        // Conservatively say each row has 64MB of ram, we will fix this up later
        // NOTE: These defaults allow us to prime all of the DIMMs on the board


@@ -178,7 +178,7 @@ static const long constant_register_values[] = {
        0x60, 0x00000000, (0x01 << 0) | (0x02 << 8) | (0x03 << 16) | (0x04 << 24),
        0x64, 0x00000000, (0x05 << 0) | (0x06 << 8) | (0x07 << 16) | (0x08 << 24),
 
        0x60, 0x00000000, (0x01 << 0) | (0x02 << 8) | (0x03 << 16) | (0x04 << 24),
        0x64, 0x00000000, (0x05 << 0) | (0x06 << 8) | (0x07 << 16) | (0x08 << 24),
 

-       /* DRA - DRAM Row Attribute Register 
+       /* DRA - DRAM Row Attribute Register

         * 0x70 Row 0,1
         * 0x71 Row 2,3
         * 0x72 Row 4,5
         * 0x70 Row 0,1
         * 0x71 Row 2,3
         * 0x72 Row 4,5


@@ -312,7 +312,7 @@ static const long constant_register_values[] = {
 //      .long 0x7c, 0xff8cfcff, (1<<22)|(2 << 20)|(1 << 17)|(1 << 16)| (0 << 8),
 //      .long 0x7c, 0xff80fcff, (1<<22)|(2 << 20)|(1 << 18)|(1 << 17)|(1 << 16)| (0 << 8),
 
 //      .long 0x7c, 0xff8cfcff, (1<<22)|(2 << 20)|(1 << 17)|(1 << 16)| (0 << 8),
 //      .long 0x7c, 0xff80fcff, (1<<22)|(2 << 20)|(1 << 18)|(1 << 17)|(1 << 16)| (0 << 8),
 

-       // Default to dual-channel mode, ECC, 1-clock address/cmd hold 
+       // Default to dual-channel mode, ECC, 1-clock address/cmd hold

        // NOTE: configure_e7501_dram_controller_mode() configures further
        0x7c, 0xff8ef8ff, (1 << 22) | (2 << 20) | (1 << 16) | (0 << 8),
 
        // NOTE: configure_e7501_dram_controller_mode() configures further
        0x7c, 0xff8ef8ff, (1 << 22) | (2 << 20) | (1 << 16) | (0 << 8),
 


@@ -425,7 +425,7 @@ static const long constant_register_values[] = {
        0xf4, 0x3f8ffffd, 0x40300002,
 
 #ifdef SUSPICIOUS_LOOKING_CODE
        0xf4, 0x3f8ffffd, 0x40300002,
 
 #ifdef SUSPICIOUS_LOOKING_CODE

-       // SJM: Undocumented. 
+       // SJM: Undocumented.

        //              This will access D2:F0:0x50, is this correct??
        0x1050, 0xffffffcf, 0x00000030,
 #endif
        //              This will access D2:F0:0x50, is this correct??
        0x1050, 0xffffffcf, 0x00000030,
 #endif


@@ -606,11 +606,11 @@ static struct dimm_size sdram_spd_get_width(uint16_t dimm_socket_address)
 // Parameters:          dimm_socket_address - SMBus address of DIMM socket to interrogate
 // Return Value:        dimm_size - log2(number of bits) for each side of the DIMM
 // Description:         Calculate the log base 2 size in bits of both DIMM sides.
 // Parameters:          dimm_socket_address - SMBus address of DIMM socket to interrogate
 // Return Value:        dimm_size - log2(number of bits) for each side of the DIMM
 // Description:         Calculate the log base 2 size in bits of both DIMM sides.

-//                      log2(# bits) = (# columns) + log2(data width) + 
+//                      log2(# bits) = (# columns) + log2(data width) +

 //                                         (# rows) + log2(banks per SDRAM)
 //
 //                                         (# rows) + log2(banks per SDRAM)
 //

-//                      Note that it might be easier to use SPD byte 31 here, it has the 
-//                      DIMM size as a multiple of 4MB.  The way we do it now we can size 
+//                      Note that it might be easier to use SPD byte 31 here, it has the
+//                      DIMM size as a multiple of 4MB.  The way we do it now we can size

 //                      both sides of an asymmetric dimm.
 //
 static struct dimm_size spd_get_dimm_size(unsigned dimm_socket_address)
 //                      both sides of an asymmetric dimm.
 //
 static struct dimm_size spd_get_dimm_size(unsigned dimm_socket_address)


@@ -653,7 +653,7 @@ static struct dimm_size spd_get_dimm_size(unsigned dimm_socket_address)
 #ifdef VALIDATE_DIMM_COMPATIBILITY
 //----------------------------------------------------------------------------------
 // Function:            are_spd_values_equal
 #ifdef VALIDATE_DIMM_COMPATIBILITY
 //----------------------------------------------------------------------------------
 // Function:            are_spd_values_equal

-// Parameters:          spd_byte_number - 
+// Parameters:          spd_byte_number -

 //                      dimmN_address - SMBus addresses of DIMM sockets to interrogate
 // Return Value:        1 if both DIMM sockets report the same value for the specified
 //                      SPD parameter; 0 if the values differed or an error occurred.
 //                      dimmN_address - SMBus addresses of DIMM sockets to interrogate
 // Return Value:        1 if both DIMM sockets report the same value for the specified
 //                      SPD parameter; 0 if the values differed or an error occurred.


@@ -834,7 +834,7 @@ static uint8_t spd_get_supported_dimms(const struct mem_controller *ctrl)
 
 //----------------------------------------------------------------------------------
 // Function:            do_ram_command
 
 //----------------------------------------------------------------------------------
 // Function:            do_ram_command

-// Parameters:          
+// Parameters:

 //                                      command - specifies the command to be sent to the DIMMs:
 //                                              RAM_COMMAND_NOP                 - No Operation
 //                                              RAM_COMMAND_PRECHARGE   - Precharge all banks
 //                                      command - specifies the command to be sent to the DIMMs:
 //                                              RAM_COMMAND_NOP                 - No Operation
 //                                              RAM_COMMAND_PRECHARGE   - Precharge all banks


@@ -860,7 +860,7 @@ static void do_ram_command(uint8_t command, uint16_t jedec_mode_bits)
        dram_controller_mode |= command;
        pci_write_config32(PCI_DEV(0, 0, 0), DRC, dram_controller_mode);
 
        dram_controller_mode |= command;
        pci_write_config32(PCI_DEV(0, 0, 0), DRC, dram_controller_mode);
 

-       // RAM_COMMAND_NORMAL is an exception. 
+       // RAM_COMMAND_NORMAL is an exception.

        // It affects only the memory controller and does not need to be "sent" to the DIMMs.
 
        if (command != RAM_COMMAND_NORMAL) {
        // It affects only the memory controller and does not need to be "sent" to the DIMMs.
 
        if (command != RAM_COMMAND_NORMAL) {


@@ -897,7 +897,7 @@ static void do_ram_command(uint8_t command, uint16_t jedec_mode_bits)
                                // NOTE: 0x40 * 64 MB == 4 GB
                                ASSERT(dimm_start_64M_multiple < 0x40);
 
                                // NOTE: 0x40 * 64 MB == 4 GB
                                ASSERT(dimm_start_64M_multiple < 0x40);
 

-                               // NOTE: 2^26 == 64 MB 
+                               // NOTE: 2^26 == 64 MB

 
                                uint32_t dimm_start_address =
                                    dimm_start_64M_multiple << 26;
 
                                uint32_t dimm_start_address =
                                    dimm_start_64M_multiple << 26;


@@ -921,7 +921,7 @@ static void do_ram_command(uint8_t command, uint16_t jedec_mode_bits)
 // Parameters:          jedec_mode_bits - for mode register set & extended mode register set
 //                      commands, bits 0-12 contain the register value in JEDEC format.
 // Return Value:        None
 // Parameters:          jedec_mode_bits - for mode register set & extended mode register set
 //                      commands, bits 0-12 contain the register value in JEDEC format.
 // Return Value:        None

-// Description:         Set the mode register of all DIMMs. The proper CAS# latency 
+// Description:         Set the mode register of all DIMMs. The proper CAS# latency

 //                                      setting is added to the mode bits specified by the caller.
 //
 static void set_ram_mode(uint16_t jedec_mode_bits)
 //                                      setting is added to the mode bits specified by the caller.
 //
 static void set_ram_mode(uint16_t jedec_mode_bits)


@@ -954,11 +954,11 @@ static void set_ram_mode(uint16_t jedec_mode_bits)
 
 //----------------------------------------------------------------------------------
 // Function:            configure_dimm_row_boundaries
 
 //----------------------------------------------------------------------------------
 // Function:            configure_dimm_row_boundaries

-// Parameters:          
+// Parameters:

 //                      dimm_log2_num_bits - log2(number of bits) for each side of the DIMM
 //                      dimm_log2_num_bits - log2(number of bits) for each side of the DIMM

-//                      total_dram_64M_multiple - total DRAM in the system (as a 
+//                      total_dram_64M_multiple - total DRAM in the system (as a

 //                      multiple of 64 MB) for DIMMs < dimm_index
 //                      multiple of 64 MB) for DIMMs < dimm_index

-//                      dimm_index - which DIMM pair is being processed 
+//                      dimm_index - which DIMM pair is being processed

 //                      (0..MAX_DIMM_SOCKETS_PER_CHANNEL)
 // Return Value:        New multiple of 64 MB total DRAM in the system
 // Description:         Configure the E7501's DRAM Row Boundary registers for the memory
 //                      (0..MAX_DIMM_SOCKETS_PER_CHANNEL)
 // Return Value:        New multiple of 64 MB total DRAM in the system
 // Description:         Configure the E7501's DRAM Row Boundary registers for the memory


@@ -975,7 +975,7 @@ static uint8_t configure_dimm_row_boundaries(struct dimm_size dimm_log2_num_bits
        ASSERT((dimm_log2_num_bits.side2 == 0)
               || (dimm_log2_num_bits.side2 >= 28));
 
        ASSERT((dimm_log2_num_bits.side2 == 0)
               || (dimm_log2_num_bits.side2 >= 28));
 

-       // In dual-channel mode, we are called only once for each pair of DIMMs. 
+       // In dual-channel mode, we are called only once for each pair of DIMMs.

        // Each time we process twice the capacity of a single DIMM.
 
        // Convert single DIMM capacity to paired DIMM capacity
        // Each time we process twice the capacity of a single DIMM.
 
        // Convert single DIMM capacity to paired DIMM capacity


@@ -994,7 +994,7 @@ static uint8_t configure_dimm_row_boundaries(struct dimm_size dimm_log2_num_bits
        pci_write_config8(PCI_DEV(0, 0, 0), DRB_ROW_0 + (dimm_index << 1),
                          total_dram_64M_multiple);
 
        pci_write_config8(PCI_DEV(0, 0, 0), DRB_ROW_0 + (dimm_index << 1),
                          total_dram_64M_multiple);
 

-       // If the DIMMs are double-sided, add the capacity of side 2 this DIMM pair 
+       // If the DIMMs are double-sided, add the capacity of side 2 this DIMM pair

        // (as a multiple of 64 MB) to the total capacity of the system
        if (dimm_log2_num_bits.side2 >= 29)
                total_dram_64M_multiple +=
        // (as a multiple of 64 MB) to the total capacity of the system
        if (dimm_log2_num_bits.side2 >= 29)
                total_dram_64M_multiple +=


@@ -1021,12 +1021,12 @@ static uint8_t configure_dimm_row_boundaries(struct dimm_size dimm_log2_num_bits
 // Function:            configure_e7501_ram_addresses
 // Parameters:          ctrl - PCI addresses of memory controller functions, and
 //                                              SMBus addresses of DIMM slots on the mainboard
 // Function:            configure_e7501_ram_addresses
 // Parameters:          ctrl - PCI addresses of memory controller functions, and
 //                                              SMBus addresses of DIMM slots on the mainboard

-//                                      dimm_mask - bitmask of populated DIMMs on the board - see 
+//                                      dimm_mask - bitmask of populated DIMMs on the board - see

 //                                                              spd_get_supported_dimms()
 // Return Value:        None
 //                                                              spd_get_supported_dimms()
 // Return Value:        None

-// Description:         Program the E7501's DRAM row boundary addresses and its Top Of 
-//                                      Low Memory (TOLM). If necessary, set up a remap window so we 
-//                                      don't waste DRAM that ordinarily would lie behind addresses 
+// Description:         Program the E7501's DRAM row boundary addresses and its Top Of
+//                                      Low Memory (TOLM). If necessary, set up a remap window so we
+//                                      don't waste DRAM that ordinarily would lie behind addresses

 //                                      reserved for memory-mapped I/O.
 //
 static void configure_e7501_ram_addresses(const struct mem_controller
 //                                      reserved for memory-mapped I/O.
 //
 static void configure_e7501_ram_addresses(const struct mem_controller


@@ -1181,11 +1181,11 @@ static void initialize_ecc(void)
 // Function:            configure_e7501_dram_timing
 // Parameters:          ctrl - PCI addresses of memory controller functions, and
 //                                              SMBus addresses of DIMM slots on the mainboard
 // Function:            configure_e7501_dram_timing
 // Parameters:          ctrl - PCI addresses of memory controller functions, and
 //                                              SMBus addresses of DIMM slots on the mainboard

-//                                      dimm_mask - bitmask of populated DIMMs on the board - see 
+//                                      dimm_mask - bitmask of populated DIMMs on the board - see

 //                                                              spd_get_supported_dimms()
 // Return Value:        None
 //                                                              spd_get_supported_dimms()
 // Return Value:        None

-// Description:         Program the DRAM Timing register of the E7501 (except for CAS# 
-//                                      latency, which is assumed to have been programmed already), based 
+// Description:         Program the DRAM Timing register of the E7501 (except for CAS#
+//                                      latency, which is assumed to have been programmed already), based

 //                                      on the parameters of the various installed DIMMs.
 //
 static void configure_e7501_dram_timing(const struct mem_controller *ctrl,
 //                                      on the parameters of the various installed DIMMs.
 //
 static void configure_e7501_dram_timing(const struct mem_controller *ctrl,


@@ -1255,7 +1255,7 @@ static void configure_e7501_dram_timing(const struct mem_controller *ctrl,
        if (slowest_row_precharge > ((22 << 2) | (2 << 0)))
                die("unsupported DIMM tRP");    // > 22.5 ns: 4 or more clocks
        else if (slowest_row_precharge > (15 << 2))
        if (slowest_row_precharge > ((22 << 2) | (2 << 0)))
                die("unsupported DIMM tRP");    // > 22.5 ns: 4 or more clocks
        else if (slowest_row_precharge > (15 << 2))

-               dram_timing &= ~(1 << 0);       // > 15.0 ns: 3 clocks 
+               dram_timing &= ~(1 << 0);       // > 15.0 ns: 3 clocks

        else
                dram_timing |= (1 << 0);        // <= 15.0 ns: 2 clocks
 
        else
                dram_timing |= (1 << 0);        // <= 15.0 ns: 2 clocks
 


@@ -1267,7 +1267,7 @@ static void configure_e7501_dram_timing(const struct mem_controller *ctrl,
        if (slowest_ras_cas_delay > ((22 << 2) | (2 << 0)))
                die("unsupported DIMM tRCD");   // > 22.5 ns: 4 or more clocks
        else if (slowest_ras_cas_delay > (15 << 2))
        if (slowest_ras_cas_delay > ((22 << 2) | (2 << 0)))
                die("unsupported DIMM tRCD");   // > 22.5 ns: 4 or more clocks
        else if (slowest_ras_cas_delay > (15 << 2))

-               dram_timing |= (2 << 1);        // > 15.0 ns: 3 clocks 
+               dram_timing |= (2 << 1);        // > 15.0 ns: 3 clocks

        else
                dram_timing |= ((1 << 3) | (3 << 1));   // <= 15.0 ns: 2 clocks
 
        else
                dram_timing |= ((1 << 3) | (3 << 1));   // <= 15.0 ns: 2 clocks
 


@@ -1280,7 +1280,7 @@ static void configure_e7501_dram_timing(const struct mem_controller *ctrl,
        if (slowest_active_to_precharge_delay > 52)
                die("unsupported DIMM tRAS");   // > 52 ns:      8 or more clocks
        else if (slowest_active_to_precharge_delay > 45)
        if (slowest_active_to_precharge_delay > 52)
                die("unsupported DIMM tRAS");   // > 52 ns:      8 or more clocks
        else if (slowest_active_to_precharge_delay > 45)

-               dram_timing |= (0 << 9);        // 46-52 ns: 7 clocks 
+               dram_timing |= (0 << 9);        // 46-52 ns: 7 clocks

        else if (slowest_active_to_precharge_delay > 37)
                dram_timing |= (1 << 9);        // 38-45 ns: 6 clocks
        else
        else if (slowest_active_to_precharge_delay > 37)
                dram_timing |= (1 << 9);        // 38-45 ns: 6 clocks
        else


@@ -1318,7 +1318,7 @@ static void configure_e7501_dram_timing(const struct mem_controller *ctrl,
 // Function:            configure_e7501_cas_latency
 // Parameters:          ctrl - PCI addresses of memory controller functions, and
 //                                              SMBus addresses of DIMM slots on the mainboard
 // Function:            configure_e7501_cas_latency
 // Parameters:          ctrl - PCI addresses of memory controller functions, and
 //                                              SMBus addresses of DIMM slots on the mainboard

-//                                      dimm_mask - bitmask of populated DIMMs on the board - see 
+//                                      dimm_mask - bitmask of populated DIMMs on the board - see

 //                                                              spd_get_supported_dimms()
 // Return Value:        None
 // Description:         Determine the shortest CAS# latency that the E7501 and all DIMMs
 //                                                              spd_get_supported_dimms()
 // Return Value:        None
 // Description:         Determine the shortest CAS# latency that the E7501 and all DIMMs


@@ -1475,7 +1475,7 @@ static void configure_e7501_cas_latency(const struct mem_controller *ctrl,
 // Function:            configure_e7501_dram_controller_mode
 // Parameters:          ctrl - PCI addresses of memory controller functions, and
 //                                              SMBus addresses of DIMM slots on the mainboard
 // Function:            configure_e7501_dram_controller_mode
 // Parameters:          ctrl - PCI addresses of memory controller functions, and
 //                                              SMBus addresses of DIMM slots on the mainboard

-//                                      dimm_mask - bitmask of populated DIMMs on the board - see 
+//                                      dimm_mask - bitmask of populated DIMMs on the board - see

 //                                                              spd_get_supported_dimms()
 // Return Value:        None
 // Description:         Configure the refresh interval so that we refresh no more often
 //                                                              spd_get_supported_dimms()
 // Return Value:        None
 // Description:         Configure the refresh interval so that we refresh no more often


@@ -1583,7 +1583,7 @@ static void configure_e7501_dram_controller_mode(const struct
 // Function:            configure_e7501_row_attributes
 // Parameters:          ctrl - PCI addresses of memory controller functions, and
 //                                              SMBus addresses of DIMM slots on the mainboard
 // Function:            configure_e7501_row_attributes
 // Parameters:          ctrl - PCI addresses of memory controller functions, and
 //                                              SMBus addresses of DIMM slots on the mainboard

-//                                      dimm_mask - bitmask of populated DIMMs on the board - see 
+//                                      dimm_mask - bitmask of populated DIMMs on the board - see

 //                                                              spd_get_supported_dimms()
 // Return Value:        None
 // Description:         Configure the E7501's DRAM Row Attributes (DRA) registers
 //                                                              spd_get_supported_dimms()
 // Return Value:        None
 // Description:         Configure the E7501's DRAM Row Attributes (DRA) registers


@@ -1636,7 +1636,7 @@ static void configure_e7501_row_attributes(const struct mem_controller
 
 //----------------------------------------------------------------------------------
 // Function:            enable_e7501_clocks
 
 //----------------------------------------------------------------------------------
 // Function:            enable_e7501_clocks

-// Parameters:          dimm_mask - bitmask of populated DIMMs on the board - see 
+// Parameters:          dimm_mask - bitmask of populated DIMMs on the board - see

 //                                                              spd_get_supported_dimms()
 // Return Value:        None
 // Description:         Enable clock signals for populated DIMM sockets and disable them
 //                                                              spd_get_supported_dimms()
 // Return Value:        None
 // Description:         Enable clock signals for populated DIMM sockets and disable them


@@ -1690,8 +1690,8 @@ static void RAM_RESET_DDR_PTR(void)
 // Description:         Set E7501 registers that are either independent of DIMM specifics,
 //                                      or establish default settings that will be overridden when we
 //                                      learn the specifics.
 // Description:         Set E7501 registers that are either independent of DIMM specifics,
 //                                      or establish default settings that will be overridden when we
 //                                      learn the specifics.

-//                                      This sets PCI configuration registers to known good values based 
-//                                      on the table 'constant_register_values', which are a triple of 
+//                                      This sets PCI configuration registers to known good values based
+//                                      on the table 'constant_register_values', which are a triple of

 //                                      configuration register offset, mask, and bits to set.
 //
 static void ram_set_d0f0_regs(void)
 //                                      configuration register offset, mask, and bits to set.
 //
 static void ram_set_d0f0_regs(void)


@@ -1748,8 +1748,8 @@ static void write_8dwords(const uint32_t * src_addr, uint32_t dst_addr)
 // Parameters:          None
 // Return Value:        None
 // Description:         Set the E7501's (undocumented) RCOMP registers.
 // Parameters:          None
 // Return Value:        None
 // Description:         Set the E7501's (undocumented) RCOMP registers.

-//                                      Per the 855PM datasheet and IXP2800 HW Initialization Reference 
-//                                      Manual, RCOMP registers appear to affect drive strength, 
+//                                      Per the 855PM datasheet and IXP2800 HW Initialization Reference
+//                                      Manual, RCOMP registers appear to affect drive strength,

 //                                      pullup/pulldown offset, and slew rate of various signal groups.
 //                                      Comments below are conjecture based on apparent similarity
 //                                      between the E7501 and these two chips.
 //                                      pullup/pulldown offset, and slew rate of various signal groups.
 //                                      Comments below are conjecture based on apparent similarity
 //                                      between the E7501 and these two chips.


@@ -1980,9 +1980,9 @@ static void sdram_enable(int controllers,
 // Parameters:          ctrl - PCI addresses of memory controller functions, and
 //                                              SMBus addresses of DIMM slots on the mainboard
 // Return Value:        None
 // Parameters:          ctrl - PCI addresses of memory controller functions, and
 //                                              SMBus addresses of DIMM slots on the mainboard
 // Return Value:        None

-// Description:         Configure SDRAM controller parameters that depend on 
-//                                      characteristics of the DIMMs installed in the system. These 
-//                                      characteristics are read from the DIMMs via the standard Serial 
+// Description:         Configure SDRAM controller parameters that depend on
+//                                      characteristics of the DIMMs installed in the system. These
+//                                      characteristics are read from the DIMMs via the standard Serial

 //                                      Presence Detect (SPD) interface.
 //
 static void sdram_set_spd_registers(const struct mem_controller *ctrl)
 //                                      Presence Detect (SPD) interface.
 //
 static void sdram_set_spd_registers(const struct mem_controller *ctrl)


@@ -2011,7 +2011,7 @@ static void sdram_set_spd_registers(const struct mem_controller *ctrl)
        }
 
        /* NOTE: configure_e7501_ram_addresses() is NOT called here.
        }
 
        /* NOTE: configure_e7501_ram_addresses() is NOT called here.

-        * We want to keep the default 64 MB/row mapping until sdram_enable() is called, 
+        * We want to keep the default 64 MB/row mapping until sdram_enable() is called,

         * even though the default mapping is almost certainly incorrect.
         * The default mapping makes it easy to initialize all of the DIMMs
         * even if the total system memory is > 4 GB.
         * even though the default mapping is almost certainly incorrect.
         * The default mapping makes it easy to initialize all of the DIMMs
         * even if the total system memory is > 4 GB.


@@ -2028,7 +2028,7 @@ static void sdram_set_spd_registers(const struct mem_controller *ctrl)
 // Parameters:          ctrl - PCI addresses of memory controller functions, and
 //                             SMBus addresses of DIMM slots on the mainboard
 // Return Value:        None
 // Parameters:          ctrl - PCI addresses of memory controller functions, and
 //                             SMBus addresses of DIMM slots on the mainboard
 // Return Value:        None

-// Description:         Do basic ram setup that does NOT depend on serial presence detect 
+// Description:         Do basic ram setup that does NOT depend on serial presence detect

 //                      information (i.e. independent of DIMM specifics).
 //
 static void sdram_set_registers(const struct mem_controller *ctrl)
 //                      information (i.e. independent of DIMM specifics).
 //
 static void sdram_set_registers(const struct mem_controller *ctrl)

diff --git a/src/northbridge/intel/e7501/raminit.h b/src/northbridge/intel/e7501/raminit.h
index 0d094149048af23a315ecd6f005d90ca9b7c4070..df0e9291a35307ca5d238bb3c05c5f50f042a7de 100644 (file)
--- a/src/northbridge/intel/e7501/raminit.h
+++ b/src/northbridge/intel/e7501/raminit.h
@@ -6,12 +6,12 @@
 #define MAX_DIMM_SOCKETS (MAX_NUM_CHANNELS * MAX_DIMM_SOCKETS_PER_CHANNEL)
 
 struct mem_controller {
 #define MAX_DIMM_SOCKETS (MAX_NUM_CHANNELS * MAX_DIMM_SOCKETS_PER_CHANNEL)
 
 struct mem_controller {

-       device_t d0, d0f1;                                      // PCI bus/device/fcns of E7501 memory controller 
+       device_t d0, d0f1;                                      // PCI bus/device/fcns of E7501 memory controller

 
        // SMBus addresses of DIMM slots for each channel,
        // in order from closest to MCH to furthest away
        // 0 == not present
 
        // SMBus addresses of DIMM slots for each channel,
        // in order from closest to MCH to furthest away
        // 0 == not present

-       uint16_t channel0[MAX_DIMM_SOCKETS_PER_CHANNEL];        
+       uint16_t channel0[MAX_DIMM_SOCKETS_PER_CHANNEL];

        uint16_t channel1[MAX_DIMM_SOCKETS_PER_CHANNEL];
 };
 
        uint16_t channel1[MAX_DIMM_SOCKETS_PER_CHANNEL];
 };
 

diff --git a/src/northbridge/intel/e7501/reset_test.c b/src/northbridge/intel/e7501/reset_test.c
index 79a5cdaee1676a54a56e584eb94b3da8e24ca751..1c0dad5ed9093445bf712f3cabfd7fc77fd2f8cd 100644 (file)
--- a/src/northbridge/intel/e7501/reset_test.c
+++ b/src/northbridge/intel/e7501/reset_test.c
@@ -7,12 +7,12 @@
         */
 static int bios_reset_detected(void) {
        uint32_t dword;
         */
 static int bios_reset_detected(void) {
        uint32_t dword;

-       
+

        dword = pci_read_config32(PCI_DEV(0, 0, 0), MCH_DRC);
        dword = pci_read_config32(PCI_DEV(0, 0, 0), MCH_DRC);

-       
+

        if( (dword & DRC_DONE) != 0 ) {
                return 1;
        if( (dword & DRC_DONE) != 0 ) {
                return 1;

-       } 
-       
+       }
+

        return 0;
 }
        return 0;
 }

diff --git a/src/northbridge/intel/e7520/memory_initialized.c b/src/northbridge/intel/e7520/memory_initialized.c
index 133d1c4f8860e844cadc73d4487c6d49bd94e29e..d7a8048567e82d45439e6526bbc26c4e8dbfd193 100644 (file)
--- a/src/northbridge/intel/e7520/memory_initialized.c
+++ b/src/northbridge/intel/e7520/memory_initialized.c
@@ -10,4 +10,4 @@ static inline int memory_initialized(void)
         //print_debug("\n");
 
        return (drc & (1<<29));
         //print_debug("\n");
 
        return (drc & (1<<29));

-}      
+}

diff --git a/src/northbridge/intel/e7520/northbridge.c b/src/northbridge/intel/e7520/northbridge.c
index efb7f0263bf8555f67868d2cc948421d68ab4826..93604b6cf798f6cdd19a5a5ed280727da24305e1 100644 (file)
--- a/src/northbridge/intel/e7520/northbridge.c
+++ b/src/northbridge/intel/e7520/northbridge.c
@@ -16,7 +16,7 @@
 
 static unsigned int max_bus;
 
 
 static unsigned int max_bus;
 

-static void ram_resource(device_t dev, unsigned long index, 
+static void ram_resource(device_t dev, unsigned long index,

        unsigned long basek, unsigned long sizek)
 {
        struct resource *resource;
        unsigned long basek, unsigned long sizek)
 {
        struct resource *resource;


@@ -195,7 +195,7 @@ static void mc_set_resources(device_t dev)
 
 static void intel_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 {
 
 static void intel_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 {

-       pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, 
+       pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,

                ((device & 0xffff) << 16) | (vendor & 0xffff));
 }
 
                ((device & 0xffff) << 16) | (vendor & 0xffff));
 }
 

diff --git a/src/northbridge/intel/e7520/pciexp_porta.c b/src/northbridge/intel/e7520/pciexp_porta.c
index 07440e368eaad8b0faffe2a44658ac0d81136040..ab73a713c22fd54df87aced1e60ecc1298154078 100644 (file)
--- a/src/northbridge/intel/e7520/pciexp_porta.c
+++ b/src/northbridge/intel/e7520/pciexp_porta.c
@@ -7,16 +7,16 @@
 #include <arch/io.h>
 #include "chip.h"
 #include <reset.h>
 #include <arch/io.h>
 #include "chip.h"
 #include <reset.h>

-                                                           
+

 typedef struct northbridge_intel_e7520_config config_t;
 
 static void pcie_init(struct device *dev)
 {
         config_t *config;
 typedef struct northbridge_intel_e7520_config config_t;
 
 static void pcie_init(struct device *dev)
 {
         config_t *config;

-                                                                                
+

         /* Get the chip configuration */
         config = dev->chip_info;
         /* Get the chip configuration */
         config = dev->chip_info;

-                                                                                
+

         if(config->intrline) {
                 pci_write_config32(dev, 0x3c, config->intrline);
         }
         if(config->intrline) {
                 pci_write_config32(dev, 0x3c, config->intrline);
         }


@@ -58,5 +58,5 @@ static const struct pci_driver pci_driver __pci_driver = {
         .vendor = PCI_VENDOR_ID_INTEL,
         .device = PCI_DEVICE_ID_INTEL_PCIE_PA,
 };
         .vendor = PCI_VENDOR_ID_INTEL,
         .device = PCI_DEVICE_ID_INTEL_PCIE_PA,
 };

-                                                                                
+

 
 

diff --git a/src/northbridge/intel/e7520/pciexp_porta1.c b/src/northbridge/intel/e7520/pciexp_porta1.c
index 26605df8abf08e6fae36dc3834deeca05e87c189..c79535fbb07222b240da555f9739f7e0bd3a0f61 100644 (file)
--- a/src/northbridge/intel/e7520/pciexp_porta1.c
+++ b/src/northbridge/intel/e7520/pciexp_porta1.c
@@ -6,16 +6,16 @@
 #include <device/pciexp.h>
 #include <arch/io.h>
 #include "chip.h"
 #include <device/pciexp.h>
 #include <arch/io.h>
 #include "chip.h"

-                                                           
+

 typedef struct northbridge_intel_e7520_config config_t;
 
 static void pcie_init(struct device *dev)
 {
         config_t *config;
 typedef struct northbridge_intel_e7520_config config_t;
 
 static void pcie_init(struct device *dev)
 {
         config_t *config;

-                                                                                
+

         /* Get the chip configuration */
         config = dev->chip_info;
         /* Get the chip configuration */
         config = dev->chip_info;

-                                                                                
+

         if(config->intrline) {
                 pci_write_config32(dev, 0x3c, config->intrline);
         }
         if(config->intrline) {
                 pci_write_config32(dev, 0x3c, config->intrline);
         }


@@ -37,5 +37,5 @@ static const struct pci_driver pci_driver __pci_driver = {
         .vendor = PCI_VENDOR_ID_INTEL,
         .device = PCI_DEVICE_ID_INTEL_PCIE_PA1,
 };
         .vendor = PCI_VENDOR_ID_INTEL,
         .device = PCI_DEVICE_ID_INTEL_PCIE_PA1,
 };

-                                                                                
+

 
 

diff --git a/src/northbridge/intel/e7520/pciexp_portb.c b/src/northbridge/intel/e7520/pciexp_portb.c
index 668c66598874f67de79f1b9f4f55e095fe702329..b20abdee6ff376ffa32ddf98c72ce536c2015c62 100644 (file)
--- a/src/northbridge/intel/e7520/pciexp_portb.c
+++ b/src/northbridge/intel/e7520/pciexp_portb.c
@@ -7,16 +7,16 @@
 #include <device/pciexp.h>
 #include <arch/io.h>
 #include "chip.h"
 #include <device/pciexp.h>
 #include <arch/io.h>
 #include "chip.h"

-                                                           
+

 typedef struct northbridge_intel_e7520_config config_t;
 
 static void pcie_init(struct device *dev)
 {
         config_t *config;
 typedef struct northbridge_intel_e7520_config config_t;
 
 static void pcie_init(struct device *dev)
 {
         config_t *config;

-                                                                                
+

         /* Get the chip configuration */
         config = dev->chip_info;
         /* Get the chip configuration */
         config = dev->chip_info;

-                                                                                
+

         if(config->intrline) {
                 pci_write_config32(dev, 0x3c, config->intrline);
         }
         if(config->intrline) {
                 pci_write_config32(dev, 0x3c, config->intrline);
         }


@@ -38,5 +38,5 @@ static const struct pci_driver pci_driver __pci_driver = {
         .vendor = PCI_VENDOR_ID_INTEL,
         .device = PCI_DEVICE_ID_INTEL_PCIE_PB,
 };
         .vendor = PCI_VENDOR_ID_INTEL,
         .device = PCI_DEVICE_ID_INTEL_PCIE_PB,
 };

-                                                                                
+

 
 

diff --git a/src/northbridge/intel/e7520/pciexp_portc.c b/src/northbridge/intel/e7520/pciexp_portc.c
index fe55e661ece3ea655dfa8c2925147af4d21c87a9..d2706d13640391273c039a6a3b316f574779f621 100644 (file)
--- a/src/northbridge/intel/e7520/pciexp_portc.c
+++ b/src/northbridge/intel/e7520/pciexp_portc.c
@@ -6,16 +6,16 @@
 #include <device/pciexp.h>
 #include <arch/io.h>
 #include "chip.h"
 #include <device/pciexp.h>
 #include <arch/io.h>
 #include "chip.h"

-                                                           
+

 typedef struct northbridge_intel_e7520_config config_t;
 
 static void pcie_init(struct device *dev)
 {
         config_t *config;
 typedef struct northbridge_intel_e7520_config config_t;
 
 static void pcie_init(struct device *dev)
 {
         config_t *config;

-                                                                                
+

         /* Get the chip configuration */
         config = dev->chip_info;
         /* Get the chip configuration */
         config = dev->chip_info;

-                                                                                
+

         if(config->intrline) {
                 pci_write_config32(dev, 0x3c, config->intrline);
         }
         if(config->intrline) {
                 pci_write_config32(dev, 0x3c, config->intrline);
         }


@@ -37,5 +37,5 @@ static const struct pci_driver pci_driver __pci_driver = {
         .vendor = PCI_VENDOR_ID_INTEL,
         .device = PCI_DEVICE_ID_INTEL_PCIE_PC,
 };
         .vendor = PCI_VENDOR_ID_INTEL,
         .device = PCI_DEVICE_ID_INTEL_PCIE_PC,
 };

-                                                                                
+

 
 

diff --git a/src/northbridge/intel/e7520/raminit.c b/src/northbridge/intel/e7520/raminit.c
index 836e6f8c7c7f123b3d0c7891ac8d942e354978e8..7f1b9d500aa5cdf347c48802ce300383dd2fba27 100644 (file)
--- a/src/northbridge/intel/e7520/raminit.c
+++ b/src/northbridge/intel/e7520/raminit.c
@@ -33,13 +33,13 @@ static void sdram_set_registers(const struct mem_controller *ctrl)
                /* CKDIS 0x8c disable clocks */
        PCI_ADDR(0, 0x00, 0, CKDIS), 0xffff0000, 0x0000ffff,
 
                /* CKDIS 0x8c disable clocks */
        PCI_ADDR(0, 0x00, 0, CKDIS), 0xffff0000, 0x0000ffff,
 

-               /* 0x9c Device present and extended RAM control 
+               /* 0x9c Device present and extended RAM control

                 * DEVPRES is very touchy, hard code the initialization
                 * of PCI-E ports here.
                 */
        PCI_ADDR(0, 0x00, 0, DEVPRES), 0x00000000, 0x07020801 | DEVPRES_CONFIG,
 
                 * DEVPRES is very touchy, hard code the initialization
                 * of PCI-E ports here.
                 */
        PCI_ADDR(0, 0x00, 0, DEVPRES), 0x00000000, 0x07020801 | DEVPRES_CONFIG,
 

-               /* 0xc8 Remap RAM base and limit off */ 
+               /* 0xc8 Remap RAM base and limit off */

        PCI_ADDR(0, 0x00, 0, REMAPLIMIT), 0x00000000, 0x03df0000,
 
                /* ??? */
        PCI_ADDR(0, 0x00, 0, REMAPLIMIT), 0x00000000, 0x03df0000,
 
                /* ??? */


@@ -57,7 +57,7 @@ static void sdram_set_registers(const struct mem_controller *ctrl)
        PCI_ADDR(0, 0x00, 0, DEVPRES1), 0xffbffff, (1<<22)|(6<<2) | DEVPRES1_CONFIG,
 
                /* 0x14 */
        PCI_ADDR(0, 0x00, 0, DEVPRES1), 0xffbffff, (1<<22)|(6<<2) | DEVPRES1_CONFIG,
 
                /* 0x14 */

-       PCI_ADDR(0, 0x00, 0, IURBASE), 0x00000fff, BAR |0,  
+       PCI_ADDR(0, 0x00, 0, IURBASE), 0x00000fff, BAR |0,

        };
        int i;
        int max;
        };
        int i;
        int max;


@@ -122,7 +122,7 @@ static struct dimm_size spd_get_dimm_size(unsigned device)
        if (value < 0) goto hw_err;
        value &= 0xff;
        value <<= 8;
        if (value < 0) goto hw_err;
        value &= 0xff;
        value <<= 8;

-       
+

        low = spd_read_byte(device, 6); /* (low byte) */
        if (low < 0) goto hw_err;
        value = value | (low & 0xff);
        low = spd_read_byte(device, 6); /* (low byte) */
        if (low < 0) goto hw_err;
        value = value | (low & 0xff);


@@ -169,7 +169,7 @@ static long spd_set_ram_size(const struct mem_controller *ctrl, long dimm_mask)
 {
        int i;
        int cum;
 {
        int i;
        int cum;

-       
+

        for(i = cum = 0; i < DIMM_SOCKETS; i++) {
                struct dimm_size sz;
                if (dimm_mask & (1 << i)) {
        for(i = cum = 0; i < DIMM_SOCKETS; i++) {
                struct dimm_size sz;
                if (dimm_mask & (1 << i)) {


@@ -233,7 +233,7 @@ static unsigned int spd_detect_dimms(const struct mem_controller *ctrl)
 }
 
 
 }
 
 

-static int spd_set_row_attributes(const struct mem_controller *ctrl, 
+static int spd_set_row_attributes(const struct mem_controller *ctrl,

                long dimm_mask)
 {
 
                long dimm_mask)
 {
 


@@ -264,22 +264,22 @@ static int spd_set_row_attributes(const struct mem_controller *ctrl,
                reg += log2(value & 0xff);
 
                /* Get the device width and convert it to a power of two */
                reg += log2(value & 0xff);
 
                /* Get the device width and convert it to a power of two */

-               value = spd_read_byte(ctrl->channel0[cnt], 13); 
+               value = spd_read_byte(ctrl->channel0[cnt], 13);

                if (value < 0) goto hw_err;
                value = log2(value & 0xff);
                reg += value;
                if(reg < 27) goto hw_err;
                reg -= 27;
                reg += (value << 2);
                if (value < 0) goto hw_err;
                value = log2(value & 0xff);
                reg += value;
                if(reg < 27) goto hw_err;
                reg -= 27;
                reg += (value << 2);

-       
+

                dra += reg << (cnt*8);
                value = spd_read_byte(ctrl->channel0[cnt], 5);
                if (value & 2)
                dra += reg << (cnt*8);
                value = spd_read_byte(ctrl->channel0[cnt], 5);
                if (value & 2)

-                       dra += reg << ((cnt*8)+4);      
+                       dra += reg << ((cnt*8)+4);

        }
 
        /* 0x70 DRA */
        }
 
        /* 0x70 DRA */

-       pci_write_config32(PCI_DEV(0, 0x00, 0), DRA, dra);      
+       pci_write_config32(PCI_DEV(0, 0x00, 0), DRA, dra);

        goto out;
 
  val_err:
        goto out;
 
  val_err:


@@ -293,7 +293,7 @@ hw_err:
 }
 
 
 }
 
 

-static int spd_set_drt_attributes(const struct mem_controller *ctrl, 
+static int spd_set_drt_attributes(const struct mem_controller *ctrl,

                long dimm_mask, uint32_t drc)
 {
        int value;
                long dimm_mask, uint32_t drc)
 {
        int value;


@@ -305,23 +305,23 @@ static int spd_set_drt_attributes(const struct mem_controller *ctrl,
        int latency;
        uint32_t index = 0;
        uint32_t index2 = 0;
        int latency;
        uint32_t index = 0;
        uint32_t index2 = 0;

-       static const unsigned char cycle_time[3] = {0x75,0x60,0x50}; 
+       static const unsigned char cycle_time[3] = {0x75,0x60,0x50};

        static const int latency_indicies[] = { 26, 23, 9 };
 
        /* 0x78 DRT */
        drt = pci_read_config32(PCI_DEV(0, 0x00, 0), DRT);
        drt &= 3;  /* save bits 1:0 */
        static const int latency_indicies[] = { 26, 23, 9 };
 
        /* 0x78 DRT */
        drt = pci_read_config32(PCI_DEV(0, 0x00, 0), DRT);
        drt &= 3;  /* save bits 1:0 */

-       
+

        for(first_dimm = 0; first_dimm < 4; first_dimm++) {
        for(first_dimm = 0; first_dimm < 4; first_dimm++) {

-               if (dimm_mask & (1 << first_dimm)) 
+               if (dimm_mask & (1 << first_dimm))

                        break;
        }
                        break;
        }

-       
+

        /* get dimm type */
        value = spd_read_byte(ctrl->channel0[first_dimm], 2);
        if(value == 8) {
                drt |= (3<<5); /* back to bark write turn around & cycle add */
        /* get dimm type */
        value = spd_read_byte(ctrl->channel0[first_dimm], 2);
        if(value == 8) {
                drt |= (3<<5); /* back to bark write turn around & cycle add */

-       }       
+       }

 
        drt |= (3<<18);  /* Trasmax */
 
 
        drt |= (3<<18);  /* Trasmax */
 


@@ -332,22 +332,22 @@ static int spd_set_drt_attributes(const struct mem_controller *ctrl,
                reg = spd_read_byte(ctrl->channel0[cnt], 18); /* CAS Latency */
                /* Compute the lowest cas latency supported */
                latency = log2(reg) -2;
                reg = spd_read_byte(ctrl->channel0[cnt], 18); /* CAS Latency */
                /* Compute the lowest cas latency supported */
                latency = log2(reg) -2;

-       
+

                /* Loop through and find a fast clock with a low latency */
                for(index = 0; index < 3; index++, latency++) {
                        if ((latency < 2) || (latency > 4) ||
                                (!(reg & (1 << latency)))) {
                                continue;
                        }
                /* Loop through and find a fast clock with a low latency */
                for(index = 0; index < 3; index++, latency++) {
                        if ((latency < 2) || (latency > 4) ||
                                (!(reg & (1 << latency)))) {
                                continue;
                        }

-                       value = spd_read_byte(ctrl->channel0[cnt], 
+                       value = spd_read_byte(ctrl->channel0[cnt],

                                        latency_indicies[index]);
                                        latency_indicies[index]);

-         
+

                        if(value <= cycle_time[drc&3]) {
                                if( latency > cas_latency) {
                                        cas_latency = latency;
                                }
                                break;
                        if(value <= cycle_time[drc&3]) {
                                if( latency > cas_latency) {
                                        cas_latency = latency;
                                }
                                break;

-                       }       
+                       }

                }
        }
        index = (cas_latency-2);
                }
        }
        index = (cas_latency-2);


@@ -401,7 +401,7 @@ static int spd_set_drt_attributes(const struct mem_controller *ctrl,
                } else {
                        drt |= (2<<8);  /* Trp RAS Precharg */
                }
                } else {
                        drt |= (2<<8);  /* Trp RAS Precharg */
                }

-               
+

                /* Trcd RAS to CAS delay */
                if((index2&0x0ff)<=0x03c) {
                        drt |= (0<<10);
                /* Trcd RAS to CAS delay */
                if((index2&0x0ff)<=0x03c) {
                        drt |= (0<<10);


@@ -411,7 +411,7 @@ static int spd_set_drt_attributes(const struct mem_controller *ctrl,
 
                /* Tdal Write auto precharge recovery delay */
                drt |= (1<<12);
 
                /* Tdal Write auto precharge recovery delay */
                drt |= (1<<12);

-       
+

                /* Trc TRS min */
                if((index2&0x0ff00)<=0x03700)
                        drt |= (0<<14);
                /* Trc TRS min */
                if((index2&0x0ff00)<=0x03700)
                        drt |= (0<<14);


@@ -419,9 +419,9 @@ static int spd_set_drt_attributes(const struct mem_controller *ctrl,
                        drt |= (1<<14);
                else
                        drt |= (2<<14); /* spd 41 */
                        drt |= (1<<14);
                else
                        drt |= (2<<14); /* spd 41 */

-               
+

                drt |= (2<<16);  /* Twr not defined for DDR docs say use 2 */
                drt |= (2<<16);  /* Twr not defined for DDR docs say use 2 */

-               
+

                /* Trrd Row Delay */
                if((index&0x0ff0000)<=0x0140000) {
                        drt |= (0<<20);
                /* Trrd Row Delay */
                if((index&0x0ff0000)<=0x0140000) {
                        drt |= (0<<20);


@@ -432,7 +432,7 @@ static int spd_set_drt_attributes(const struct mem_controller *ctrl,
                } else {
                        drt |= (3<<20);
                }
                } else {
                        drt |= (3<<20);
                }

-               
+

                /* Trfc Auto refresh cycle time */
                if((index2&0x0ff0000)<=0x04b0000) {
                        drt |= (0<<22);
                /* Trfc Auto refresh cycle time */
                if((index2&0x0ff0000)<=0x04b0000) {
                        drt |= (0<<22);


@@ -446,14 +446,14 @@ static int spd_set_drt_attributes(const struct mem_controller *ctrl,
        }
        else if(value <= 0x60) { /* 167 Mhz */
                /* according to new documentation CAS latency is 00
        }
        else if(value <= 0x60) { /* 167 Mhz */
                /* according to new documentation CAS latency is 00

-                * for bits 3:2 for all 167 Mhz 
+                * for bits 3:2 for all 167 Mhz

                drt |= ((index&3)<<2); */  /* set CAS latency */
                if((index&0x0ff00)<=0x03000) {
                        drt |= (1<<8);  /* Trp RAS Precharg */
                } else {
                        drt |= (2<<8);  /* Trp RAS Precharg */
                }
                drt |= ((index&3)<<2); */  /* set CAS latency */
                if((index&0x0ff00)<=0x03000) {
                        drt |= (1<<8);  /* Trp RAS Precharg */
                } else {
                        drt |= (2<<8);  /* Trp RAS Precharg */
                }

-               
+

                /* Trcd RAS to CAS delay */
                if((index2&0x0ff)<=0x030) {
                        drt |= (0<<10);
                /* Trcd RAS to CAS delay */
                if((index2&0x0ff)<=0x030) {
                        drt |= (0<<10);


@@ -462,13 +462,13 @@ static int spd_set_drt_attributes(const struct mem_controller *ctrl,
                }
 
                /* Tdal Write auto precharge recovery delay */
                }
 
                /* Tdal Write auto precharge recovery delay */

-               drt |= (2<<12); 
-               
+               drt |= (2<<12);
+

                /* Trc TRS min */
                drt |= (2<<14); /* spd 41, but only one choice */
                /* Trc TRS min */
                drt |= (2<<14); /* spd 41, but only one choice */

-               
+

                drt |= (2<<16);  /* Twr not defined for DDR docs say 2 */
                drt |= (2<<16);  /* Twr not defined for DDR docs say 2 */

-               
+

                /* Trrd Row Delay */
                if((index&0x0ff0000)<=0x0180000) {
                        drt |= (0<<20);
                /* Trrd Row Delay */
                if((index&0x0ff0000)<=0x0180000) {
                        drt |= (0<<20);


@@ -477,7 +477,7 @@ static int spd_set_drt_attributes(const struct mem_controller *ctrl,
                } else {
                        drt |= (2<<20);
                }
                } else {
                        drt |= (2<<20);
                }

-               
+

                /* Trfc Auto refresh cycle time */
                if((index2&0x0ff0000)<=0x0480000) {
                        drt |= (0<<22);
                /* Trfc Auto refresh cycle time */
                if((index2&0x0ff0000)<=0x0480000) {
                        drt |= (0<<22);


@@ -505,13 +505,13 @@ static int spd_set_drt_attributes(const struct mem_controller *ctrl,
                }
 
                /* Tdal Write auto precharge recovery delay */
                }
 
                /* Tdal Write auto precharge recovery delay */

-               drt |= (1<<12); 
-               
+               drt |= (1<<12);
+

                /* Trc TRS min */
                drt |= (2<<14); /* spd 41, but only one choice */
                /* Trc TRS min */
                drt |= (2<<14); /* spd 41, but only one choice */

-               
+

                drt |= (1<<16);  /* Twr not defined for DDR docs say 1 */
                drt |= (1<<16);  /* Twr not defined for DDR docs say 1 */

-               
+

                /* Trrd Row Delay */
                if((index&0x0ff0000)<=0x01e0000) {
                        drt |= (0<<20);
                /* Trrd Row Delay */
                if((index&0x0ff0000)<=0x01e0000) {
                        drt |= (0<<20);


@@ -520,7 +520,7 @@ static int spd_set_drt_attributes(const struct mem_controller *ctrl,
                } else {
                        drt |= (2<<20);
                }
                } else {
                        drt |= (2<<20);
                }

-               
+

                /* Trfc Auto refresh cycle time */
                if((index2&0x0ff0000)<=0x04b0000) {
                        drt |= (0<<22);
                /* Trfc Auto refresh cycle time */
                if((index2&0x0ff0000)<=0x04b0000) {
                        drt |= (0<<22);


@@ -529,13 +529,13 @@ static int spd_set_drt_attributes(const struct mem_controller *ctrl,
                } else {
                        drt |= (2<<22);
                }
                } else {
                        drt |= (2<<22);
                }

-               
+

                /* Based on CAS latency */
                if(index&7)
                        drt |= (0x099<<24);
                else
                        drt |= (0x055<<24);
                /* Based on CAS latency */
                if(index&7)
                        drt |= (0x099<<24);
                else
                        drt |= (0x055<<24);

-               
+

        }
        else {
                die("Invalid SPD 9 bus speed.\n");
        }
        else {
                die("Invalid SPD 9 bus speed.\n");


@@ -547,7 +547,7 @@ static int spd_set_drt_attributes(const struct mem_controller *ctrl,
        return(cas_latency);
 }
 
        return(cas_latency);
 }
 

-static int spd_set_dram_controller_mode(const struct mem_controller *ctrl, 
+static int spd_set_dram_controller_mode(const struct mem_controller *ctrl,

                long dimm_mask)
 {
        int value;
                long dimm_mask)
 {
        int value;


@@ -558,12 +558,12 @@ static int spd_set_dram_controller_mode(const struct mem_controller *ctrl,
        unsigned char dram_type = 0xff;
        unsigned char ecc = 0xff;
        unsigned char rate = 62;
        unsigned char dram_type = 0xff;
        unsigned char ecc = 0xff;
        unsigned char rate = 62;

-       static const unsigned char spd_rates[6] = {15,3,7,7,62,62}; 
+       static const unsigned char spd_rates[6] = {15,3,7,7,62,62};

        static const unsigned char drc_rates[5] = {0,15,7,62,3};
        static const unsigned char fsb_conversion[4] = {3,1,3,2};
 
        /* 0x7c DRC */
        static const unsigned char drc_rates[5] = {0,15,7,62,3};
        static const unsigned char fsb_conversion[4] = {3,1,3,2};
 
        /* 0x7c DRC */

-       drc = pci_read_config32(PCI_DEV(0, 0x00, 0), DRC);      
+       drc = pci_read_config32(PCI_DEV(0, 0x00, 0), DRC);

        for(cnt=0; cnt < 4; cnt++) {
                if (!(dimm_mask & (1 << cnt))) {
                        continue;
        for(cnt=0; cnt < 4; cnt++) {
                if (!(dimm_mask & (1 << cnt))) {
                        continue;


@@ -578,7 +578,7 @@ static int spd_set_dram_controller_mode(const struct mem_controller *ctrl,
                                else if (ecc == 1) {
                                        die("ERROR - Mixed DDR & DDR2 RAM\n");
                                }
                                else if (ecc == 1) {
                                        die("ERROR - Mixed DDR & DDR2 RAM\n");
                                }

-                       } 
+                       }

                        else if ( reg == 7 ) {
                                if ( ecc == 0xff) {
                                        ecc = 1;
                        else if ( reg == 7 ) {
                                if ( ecc == 0xff) {
                                        ecc = 1;


@@ -586,7 +586,7 @@ static int spd_set_dram_controller_mode(const struct mem_controller *ctrl,
                                else if ( ecc > 1 ) {
                                        die("ERROR - Mixed DDR & DDR2 RAM\n");
                                }
                                else if ( ecc > 1 ) {
                                        die("ERROR - Mixed DDR & DDR2 RAM\n");
                                }

-                       }       
+                       }

                        else {
                                die("ERROR - RAM not DDR\n");
                        }
                        else {
                                die("ERROR - RAM not DDR\n");
                        }


@@ -650,7 +650,7 @@ static int spd_set_dram_controller_mode(const struct mem_controller *ctrl,
        drc |= (fsb_conversion[value] << 2);
        drc &= ~(3 << 0); /* set the dram type */
        drc |= (dram_type << 0);
        drc |= (fsb_conversion[value] << 2);
        drc &= ~(3 << 0); /* set the dram type */
        drc |= (dram_type << 0);

-               
+

        goto out;
 
  val_err:
        goto out;
 
  val_err:


@@ -662,7 +662,7 @@ hw_err:
        return drc;
 }
 
        return drc;
 }
 

-static void sdram_set_spd_registers(const struct mem_controller *ctrl) 
+static void sdram_set_spd_registers(const struct mem_controller *ctrl)

 {
        long dimm_mask;
 
 {
        long dimm_mask;
 


@@ -681,7 +681,7 @@ static void do_delay(void)
        unsigned char b;
        for(i=0;i<16;i++)
                b=inb(0x80);
        unsigned char b;
        for(i=0;i<16;i++)
                b=inb(0x80);

-}      
+}

 
 static void pll_setup(uint32_t drc)
 {
 
 static void pll_setup(uint32_t drc)
 {


@@ -710,7 +710,7 @@ static void pll_setup(uint32_t drc)
        }
        mainboard_set_e7520_pll(pins);
        return;
        }
        mainboard_set_e7520_pll(pins);
        return;

-}      
+}

 
 #define TIMEOUT_LOOPS 300000
 
 
 #define TIMEOUT_LOOPS 300000
 


@@ -724,7 +724,7 @@ static void set_on_dimm_termination_enable(const struct mem_controller *ctrl)
         unsigned int dimm,i;
         unsigned int data32;
        unsigned int t4;
         unsigned int dimm,i;
         unsigned int data32;
        unsigned int t4;

- 
+

        /* Set up northbridge values */
        /* ODT enable */
        pci_write_config32(PCI_DEV(0, 0x00, 0), 0x88, 0xf0000180);
        /* Set up northbridge values */
        /* ODT enable */
        pci_write_config32(PCI_DEV(0, 0x00, 0), 0x88, 0xf0000180);


@@ -741,10 +741,10 @@ static void set_on_dimm_termination_enable(const struct mem_controller *ctrl)
        for(i=0;i<1;i++) {
            if((t4&0x0f) == 1) {
                if( ((t4>>8)&0x0f) == 0 ) {
        for(i=0;i<1;i++) {
            if((t4&0x0f) == 1) {
                if( ((t4>>8)&0x0f) == 0 ) {

-                       data32 = 0x00000010; /* EEES */ 
+                       data32 = 0x00000010; /* EEES */

                        break;
                }
                        break;
                }

-               if ( ((t4>>16)&0x0f) == 0 ) { 
+               if ( ((t4>>16)&0x0f) == 0 ) {

                        data32 = 0x00003132; /* EESS */
                        break;
                }
                        data32 = 0x00003132; /* EESS */
                        break;
                }


@@ -757,7 +757,7 @@ static void set_on_dimm_termination_enable(const struct mem_controller *ctrl)
            }
            if((t4&0x0f) == 2) {
                if( ((t4>>8)&0x0f) == 0 ) {
            }
            if((t4&0x0f) == 2) {
                if( ((t4>>8)&0x0f) == 0 ) {

-                       data32 = 0x00003132; /* EEED */ 
+                       data32 = 0x00003132; /* EEED */

                        break;
                }
                if ( ((t4>>8)&0x0f) == 2 ) {
                        break;
                }
                if ( ((t4>>8)&0x0f) == 2 ) {


@@ -784,14 +784,14 @@ static void set_on_dimm_termination_enable(const struct mem_controller *ctrl)
 
                write32(BAR+DCALADDR, 0x0b840001);
                write32(BAR+DCALCSR, 0x83000003 | (dimm << 20));
 
                write32(BAR+DCALADDR, 0x0b840001);
                write32(BAR+DCALCSR, 0x83000003 | (dimm << 20));

-               
+

                for(i=0;i<1001;i++) {
                        data32 = read32(BAR+DCALCSR);
                        if(!(data32 & (1<<31)))
                                break;
                }
        }
                for(i=0;i<1001;i++) {
                        data32 = read32(BAR+DCALCSR);
                        if(!(data32 & (1<<31)))
                                break;
                }
        }

-}      
+}

 static void set_receive_enable(const struct mem_controller *ctrl)
 {
        unsigned int i;
 static void set_receive_enable(const struct mem_controller *ctrl)
 {
        unsigned int i;


@@ -799,7 +799,7 @@ static void set_receive_enable(const struct mem_controller *ctrl)
        uint32_t recena=0;
        uint32_t recenb=0;
 
        uint32_t recena=0;
        uint32_t recenb=0;
 

-       {       
+       {

        unsigned int dimm;
        unsigned int edge;
        int32_t data32;
        unsigned int dimm;
        unsigned int edge;
        int32_t data32;


@@ -817,7 +817,7 @@ static void set_receive_enable(const struct mem_controller *ctrl)
                if(!(dimm&1)) {
                        write32(BAR+DCALDATA+(17*4), 0x04020000);
                        write32(BAR+DCALCSR, 0x83800004 | (dimm << 20));
                if(!(dimm&1)) {
                        write32(BAR+DCALDATA+(17*4), 0x04020000);
                        write32(BAR+DCALCSR, 0x83800004 | (dimm << 20));

-               
+

                        for(i=0;i<1001;i++) {
                                data32 = read32(BAR+DCALCSR);
                                if(!(data32 & (1<<31)))
                        for(i=0;i<1001;i++) {
                                data32 = read32(BAR+DCALCSR);
                                if(!(data32 & (1<<31)))


@@ -825,7 +825,7 @@ static void set_receive_enable(const struct mem_controller *ctrl)
                        }
                        if(i>=1000)
                                continue;
                        }
                        if(i>=1000)
                                continue;

-               
+

                        dcal_data32_0 = read32(BAR+DCALDATA + 0);
                        dcal_data32_1 = read32(BAR+DCALDATA + 4);
                        dcal_data32_2 = read32(BAR+DCALDATA + 8);
                        dcal_data32_0 = read32(BAR+DCALDATA + 0);
                        dcal_data32_1 = read32(BAR+DCALDATA + 4);
                        dcal_data32_2 = read32(BAR+DCALDATA + 8);


@@ -914,7 +914,7 @@ static void set_receive_enable(const struct mem_controller *ctrl)
                                data32++;
                        }
                        /* test for frame edge cross overs */
                                data32++;
                        }
                        /* test for frame edge cross overs */

-                       if((edge == 1) && (data32 > 12) && 
+                       if((edge == 1) && (data32 > 12) &&

                            (((recen+16)-data32) < 3)) {
                                data32 = 0;
                                cnt += 2;
                            (((recen+16)-data32) < 3)) {
                                data32 = 0;
                                cnt += 2;


@@ -1063,15 +1063,15 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
                /* FSB 200 DIMM 400 */
        {{ 0x00000001, 0x00000000, 0x00000001, 0x00000000}},
        };
                /* FSB 200 DIMM 400 */
        {{ 0x00000001, 0x00000000, 0x00000001, 0x00000000}},
        };

-       
+

        static const uint32_t dqs_data[] = {
        static const uint32_t dqs_data[] = {

-               0xffffffff, 0xffffffff, 0x000000ff, 
-               0xffffffff, 0xffffffff, 0x000000ff, 
+               0xffffffff, 0xffffffff, 0x000000ff,
+               0xffffffff, 0xffffffff, 0x000000ff,

                0xffffffff, 0xffffffff, 0x000000ff,
                0xffffffff, 0xffffffff, 0x000000ff,
                0xffffffff, 0xffffffff, 0x000000ff,
                0xffffffff, 0xffffffff, 0x000000ff,

-               0xffffffff, 0xffffffff, 0x000000ff, 
-               0xffffffff, 0xffffffff, 0x000000ff, 
-               0xffffffff, 0xffffffff, 0x000000ff, 
+               0xffffffff, 0xffffffff, 0x000000ff,
+               0xffffffff, 0xffffffff, 0x000000ff,
+               0xffffffff, 0xffffffff, 0x000000ff,

                0xffffffff, 0xffffffff, 0x000000ff};
 
        mask = spd_detect_dimms(ctrl);
                0xffffffff, 0xffffffff, 0x000000ff};
 
        mask = spd_detect_dimms(ctrl);


@@ -1101,24 +1101,24 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
        }
        /* 0x7c DRC */
        pci_write_config32(PCI_DEV(0, 0x00, 0), DRC, data32);
        }
        /* 0x7c DRC */
        pci_write_config32(PCI_DEV(0, 0x00, 0), DRC, data32);

-       
+

                /* turn the clocks on */
        /* 0x8c CKDIS */
        pci_write_config16(PCI_DEV(0, 0x00, 0), CKDIS, 0x0000);
                /* turn the clocks on */
        /* 0x8c CKDIS */
        pci_write_config16(PCI_DEV(0, 0x00, 0), CKDIS, 0x0000);

-       
+

                /* 0x9a DDRCSR Take subsystem out of idle */
        data16 = pci_read_config16(PCI_DEV(0, 0x00, 0), DDRCSR);
        data16 &= ~(7 << 12);
        data16 |= (3 << 12);   /* use dual channel lock step */
        pci_write_config16(PCI_DEV(0, 0x00, 0), DDRCSR, data16);
                /* 0x9a DDRCSR Take subsystem out of idle */
        data16 = pci_read_config16(PCI_DEV(0, 0x00, 0), DDRCSR);
        data16 &= ~(7 << 12);
        data16 |= (3 << 12);   /* use dual channel lock step */
        pci_write_config16(PCI_DEV(0, 0x00, 0), DDRCSR, data16);

-       
+

                /* program row size DRB */
        spd_set_ram_size(ctrl, mask);
 
                /* program page size DRA */
        spd_set_row_attributes(ctrl, mask);
 
                /* program row size DRB */
        spd_set_ram_size(ctrl, mask);
 
                /* program page size DRA */
        spd_set_row_attributes(ctrl, mask);
 

-               /* program DRT timing values */ 
+               /* program DRT timing values */

        cas_latency = spd_set_drt_attributes(ctrl, mask, drc);
 
        for(i=0;i<8;i++) { /* loop throught each dimm to test for row */
        cas_latency = spd_set_drt_attributes(ctrl, mask, drc);
 
        for(i=0;i<8;i++) { /* loop throught each dimm to test for row */


@@ -1127,7 +1127,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
                print_debug("\n");
                /* Apply NOP */
                do_delay();
                print_debug("\n");
                /* Apply NOP */
                do_delay();

-               
+

                write32(BAR + 0x100, (0x03000000 | (i<<20)));
 
                write32(BAR+0x100, (0x83000000 | (i<<20)));
                write32(BAR + 0x100, (0x03000000 | (i<<20)));
 
                write32(BAR+0x100, (0x83000000 | (i<<20)));


@@ -1137,12 +1137,12 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
                        data32 = read32(BAR+DCALCSR);
 
        }
                        data32 = read32(BAR+DCALCSR);
 
        }

-       
+

        /* Apply NOP */
        do_delay();
 
        /* Apply NOP */
        do_delay();
 

-       for(cs=0;cs<8;cs++) {   
-               write32(BAR + DCALCSR, (0x83000000 | (cs<<20))); 
+       for(cs=0;cs<8;cs++) {
+               write32(BAR + DCALCSR, (0x83000000 | (cs<<20)));

                data32 = read32(BAR+DCALCSR);
                while(data32 & 0x80000000)
                        data32 = read32(BAR+DCALCSR);
                data32 = read32(BAR+DCALCSR);
                while(data32 & 0x80000000)
                        data32 = read32(BAR+DCALCSR);


@@ -1150,7 +1150,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
 
        /* Precharg all banks */
        do_delay();
 
        /* Precharg all banks */
        do_delay();

-       for(cs=0;cs<8;cs++) {   
+       for(cs=0;cs<8;cs++) {

                if ((drc & 3) == 2) /* DDR2  */
                         write32(BAR+DCALADDR, 0x04000000);
                 else   /* DDR1  */
                if ((drc & 3) == 2) /* DDR2  */
                         write32(BAR+DCALADDR, 0x04000000);
                 else   /* DDR1  */


@@ -1160,10 +1160,10 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
                while(data32 & 0x80000000)
                        data32 = read32(BAR+DCALCSR);
        }
                while(data32 & 0x80000000)
                        data32 = read32(BAR+DCALCSR);
        }

-               
+

        /* EMRS dll's enabled */
        do_delay();
        /* EMRS dll's enabled */
        do_delay();

-       for(cs=0;cs<8;cs++) {   
+       for(cs=0;cs<8;cs++) {

                if ((drc & 3) == 2) /* DDR2  */
                        /* fixme hard code AL additive latency */
                         write32(BAR+DCALADDR, 0x0b940001);
                if ((drc & 3) == 2) /* DDR2  */
                        /* fixme hard code AL additive latency */
                         write32(BAR+DCALADDR, 0x0b940001);


@@ -1188,7 +1188,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
                 else  /*  CAS Latency 2.5 */
                         mode_reg = 0x016a0000;
         }
                 else  /*  CAS Latency 2.5 */
                         mode_reg = 0x016a0000;
         }

-       for(cs=0;cs<8;cs++) {   
+       for(cs=0;cs<8;cs++) {

                write32(BAR+DCALADDR, mode_reg);
                write32(BAR+DCALCSR, (0x83000003 | (cs<<20)));
                data32 = read32(BAR+DCALCSR);
                write32(BAR+DCALADDR, mode_reg);
                write32(BAR+DCALCSR, (0x83000003 | (cs<<20)));
                data32 = read32(BAR+DCALCSR);


@@ -1200,7 +1200,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
        do_delay();
        do_delay();
        do_delay();
        do_delay();
        do_delay();
        do_delay();

-       for(cs=0;cs<8;cs++) {   
+       for(cs=0;cs<8;cs++) {

                if ((drc & 3) == 2) /* DDR2  */
                         write32(BAR+DCALADDR, 0x04000000);
                 else   /* DDR1  */
                if ((drc & 3) == 2) /* DDR2  */
                         write32(BAR+DCALADDR, 0x04000000);
                 else   /* DDR1  */


@@ -1210,17 +1210,17 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
                while(data32 & 0x80000000)
                        data32 = read32(BAR+DCALCSR);
        }
                while(data32 & 0x80000000)
                        data32 = read32(BAR+DCALCSR);
        }

-       
+

        /* Do 2 refreshes */
        do_delay();
        /* Do 2 refreshes */
        do_delay();

-       for(cs=0;cs<8;cs++) {   
+       for(cs=0;cs<8;cs++) {

                write32(BAR+DCALCSR, (0x83000001 | (cs<<20)));
                data32 = read32(BAR+DCALCSR);
                while(data32 & 0x80000000)
                        data32 = read32(BAR+DCALCSR);
        }
        do_delay();
                write32(BAR+DCALCSR, (0x83000001 | (cs<<20)));
                data32 = read32(BAR+DCALCSR);
                while(data32 & 0x80000000)
                        data32 = read32(BAR+DCALCSR);
        }
        do_delay();

-       for(cs=0;cs<8;cs++) {   
+       for(cs=0;cs<8;cs++) {

                write32(BAR+DCALCSR, (0x83000001 | (cs<<20)));
                data32 = read32(BAR+DCALCSR);
                while(data32 & 0x80000000)
                write32(BAR+DCALCSR, (0x83000001 | (cs<<20)));
                data32 = read32(BAR+DCALCSR);
                while(data32 & 0x80000000)


@@ -1228,33 +1228,33 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
        }
        do_delay();
        /* for good luck do 6 more */
        }
        do_delay();
        /* for good luck do 6 more */

-       for(cs=0;cs<8;cs++) {   
+       for(cs=0;cs<8;cs++) {

                write32(BAR+DCALCSR, (0x83000001 | (cs<<20)));
        }
        do_delay();
                write32(BAR+DCALCSR, (0x83000001 | (cs<<20)));
        }
        do_delay();

-       for(cs=0;cs<8;cs++) {   
+       for(cs=0;cs<8;cs++) {

                write32(BAR+DCALCSR, (0x83000001 | (cs<<20)));
        }
        do_delay();
                write32(BAR+DCALCSR, (0x83000001 | (cs<<20)));
        }
        do_delay();

-       for(cs=0;cs<8;cs++) {   
+       for(cs=0;cs<8;cs++) {

                write32(BAR+DCALCSR, (0x83000001 | (cs<<20)));
        }
        do_delay();
                write32(BAR+DCALCSR, (0x83000001 | (cs<<20)));
        }
        do_delay();

-       for(cs=0;cs<8;cs++) {   
+       for(cs=0;cs<8;cs++) {

                write32(BAR+DCALCSR, (0x83000001 | (cs<<20)));
        }
        do_delay();
                write32(BAR+DCALCSR, (0x83000001 | (cs<<20)));
        }
        do_delay();

-       for(cs=0;cs<8;cs++) {   
+       for(cs=0;cs<8;cs++) {

                write32(BAR+DCALCSR, (0x83000001 | (cs<<20)));
        }
        do_delay();
                write32(BAR+DCALCSR, (0x83000001 | (cs<<20)));
        }
        do_delay();

-       for(cs=0;cs<8;cs++) {   
+       for(cs=0;cs<8;cs++) {

                write32(BAR+DCALCSR, (0x83000001 | (cs<<20)));
        }
        do_delay();
        /* MRS reset dll's normal */
        do_delay();
                write32(BAR+DCALCSR, (0x83000001 | (cs<<20)));
        }
        do_delay();
        /* MRS reset dll's normal */
        do_delay();

-       for(cs=0;cs<8;cs++) {   
+       for(cs=0;cs<8;cs++) {

                write32(BAR+DCALADDR, (mode_reg & ~(1<<24)));
                write32(BAR+DCALCSR, (0x83000003 | (cs<<20)));
                data32 = read32(BAR+DCALCSR);
                write32(BAR+DCALADDR, (mode_reg & ~(1<<24)));
                write32(BAR+DCALCSR, (0x83000003 | (cs<<20)));
                data32 = read32(BAR+DCALCSR);


@@ -1279,7 +1279,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
        write32(BAR+DCALCSR, 0x0000000f);
 
        /* DDR1 This is test code to copy some codes in the factory setup */
        write32(BAR+DCALCSR, 0x0000000f);
 
        /* DDR1 This is test code to copy some codes in the factory setup */

-       
+

        write32(BAR, 0x00100000);
 
         if ((drc & 3) == 2) { /* DDR2  */
        write32(BAR, 0x00100000);
 
         if ((drc & 3) == 2) { /* DDR2  */


@@ -1292,9 +1292,9 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
 
        /* receive enable calibration */
        set_receive_enable(ctrl);
 
        /* receive enable calibration */
        set_receive_enable(ctrl);

-       
+

        /* DQS */
        /* DQS */

-       pci_write_config32(PCI_DEV(0, 0x00, 0), 0x94, 0x3904a100 ); 
+       pci_write_config32(PCI_DEV(0, 0x00, 0), 0x94, 0x3904a100 );

        for(i = 0, cnt = (BAR+0x200); i < 24; i++, cnt+=4) {
                write32(cnt, dqs_data[i]);
        }
        for(i = 0, cnt = (BAR+0x200); i < 24; i++, cnt+=4) {
                write32(cnt, dqs_data[i]);
        }


@@ -1303,7 +1303,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
        /* Enable refresh */
        /* 0x7c DRC */
        data32 = drc & ~(3 << 20);  /* clear ECC mode */
        /* Enable refresh */
        /* 0x7c DRC */
        data32 = drc & ~(3 << 20);  /* clear ECC mode */

-       pci_write_config32(PCI_DEV(0, 0x00, 0), DRC, data32);   
+       pci_write_config32(PCI_DEV(0, 0x00, 0), DRC, data32);

        write32(BAR+DCALCSR, 0x0008000f);
 
        /* clear memory and init ECC */
        write32(BAR+DCALCSR, 0x0008000f);
 
        /* clear memory and init ECC */


@@ -1311,7 +1311,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
        for(i=0;i<64;i+=4) {
                write32(BAR+DCALDATA+i, 0x00000000);
        }
        for(i=0;i<64;i+=4) {
                write32(BAR+DCALDATA+i, 0x00000000);
        }

-       
+

        for(cs=0;cs<8;cs++) {
                write32(BAR+DCALCSR, (0x830831d8 | (cs<<20)));
                data32 = read32(BAR+DCALCSR);
        for(cs=0;cs<8;cs++) {
                write32(BAR+DCALCSR, (0x830831d8 | (cs<<20)));
                data32 = read32(BAR+DCALCSR);


@@ -1331,22 +1331,22 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
                        break;
        }
        print_debug("Done\n");
                        break;
        }
        print_debug("Done\n");

-       
+

        /* Set initialization complete */
        /* 0x7c DRC */
        drc |= (1 << 29);
        data32 = drc & ~(3 << 20);  /* clear ECC mode */
        /* Set initialization complete */
        /* 0x7c DRC */
        drc |= (1 << 29);
        data32 = drc & ~(3 << 20);  /* clear ECC mode */

-       pci_write_config32(PCI_DEV(0, 0x00, 0), DRC, data32);   
+       pci_write_config32(PCI_DEV(0, 0x00, 0), DRC, data32);

 
        /* Set the ecc mode */
 
        /* Set the ecc mode */

-       pci_write_config32(PCI_DEV(0, 0x00, 0), DRC, drc);      
+       pci_write_config32(PCI_DEV(0, 0x00, 0), DRC, drc);

 
        /* Enable memory scrubbing */
 
        /* Enable memory scrubbing */

-       /* 0x52 MCHSCRB */      
+       /* 0x52 MCHSCRB */

        data16 = pci_read_config16(PCI_DEV(0, 0x00, 0), MCHSCRB);
        data16 &= ~0x0f;
        data16 |= ((2 << 2) | (2 << 0));
        data16 = pci_read_config16(PCI_DEV(0, 0x00, 0), MCHSCRB);
        data16 &= ~0x0f;
        data16 |= ((2 << 2) | (2 << 0));

-       pci_write_config16(PCI_DEV(0, 0x00, 0), MCHSCRB, data16);       
+       pci_write_config16(PCI_DEV(0, 0x00, 0), MCHSCRB, data16);

 
        /* The memory is now setup, use it */
        cache_lbmem(MTRR_TYPE_WRBACK);
 
        /* The memory is now setup, use it */
        cache_lbmem(MTRR_TYPE_WRBACK);

diff --git a/src/northbridge/intel/e7525/memory_initialized.c b/src/northbridge/intel/e7525/memory_initialized.c
index 6eb31a8ca30acf90954136ac3108ec460b8bacfe..69bfdf32dd07a9fdabf4d09ba537b4b5dd67da8e 100644 (file)
--- a/src/northbridge/intel/e7525/memory_initialized.c
+++ b/src/northbridge/intel/e7525/memory_initialized.c
@@ -6,4 +6,4 @@ static inline int memory_initialized(void)
        uint32_t drc;
         drc = pci_read_config32(NB_DEV, DRC);
        return (drc & (1<<29));
        uint32_t drc;
         drc = pci_read_config32(NB_DEV, DRC);
        return (drc & (1<<29));

-}      
+}

diff --git a/src/northbridge/intel/e7525/northbridge.c b/src/northbridge/intel/e7525/northbridge.c
index 02bf119b9689862ea165f03435515d9d059abdb3..559dc15b8bf7e8cac729f91707a018f6e4fd2660 100644 (file)
--- a/src/northbridge/intel/e7525/northbridge.c
+++ b/src/northbridge/intel/e7525/northbridge.c
@@ -16,7 +16,7 @@
 
 static unsigned int max_bus;
 
 
 static unsigned int max_bus;
 

-static void ram_resource(device_t dev, unsigned long index, 
+static void ram_resource(device_t dev, unsigned long index,

        unsigned long basek, unsigned long sizek)
 {
        struct resource *resource;
        unsigned long basek, unsigned long sizek)
 {
        struct resource *resource;


@@ -195,7 +195,7 @@ static void mc_set_resources(device_t dev)
 
 static void intel_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 {
 
 static void intel_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 {

-       pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, 
+       pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,

                ((device & 0xffff) << 16) | (vendor & 0xffff));
 }
 
                ((device & 0xffff) << 16) | (vendor & 0xffff));
 }
 

diff --git a/src/northbridge/intel/e7525/pciexp_porta.c b/src/northbridge/intel/e7525/pciexp_porta.c
index 3efc378ce041e4b719efdb43d3c2e6774616d4f3..4bae287df4961f42b824e858b31474f9553a70ad 100644 (file)
--- a/src/northbridge/intel/e7525/pciexp_porta.c
+++ b/src/northbridge/intel/e7525/pciexp_porta.c
@@ -6,16 +6,16 @@
 #include <device/pciexp.h>
 #include <arch/io.h>
 #include "chip.h"
 #include <device/pciexp.h>
 #include <arch/io.h>
 #include "chip.h"

-                                                           
+

 typedef struct northbridge_intel_e7525_config config_t;
 
 static void pcie_init(struct device *dev)
 {
         config_t *config;
 typedef struct northbridge_intel_e7525_config config_t;
 
 static void pcie_init(struct device *dev)
 {
         config_t *config;

-                                                                                
+

         /* Get the chip configuration */
         config = dev->chip_info;
         /* Get the chip configuration */
         config = dev->chip_info;

-                                                                                
+

         if(config->intrline) {
                 pci_write_config32(dev, 0x3c, config->intrline);
         }
         if(config->intrline) {
                 pci_write_config32(dev, 0x3c, config->intrline);
         }


@@ -37,5 +37,5 @@ static const struct pci_driver pci_driver __pci_driver = {
         .vendor = PCI_VENDOR_ID_INTEL,
         .device = PCI_DEVICE_ID_INTEL_PCIE_PA,
 };
         .vendor = PCI_VENDOR_ID_INTEL,
         .device = PCI_DEVICE_ID_INTEL_PCIE_PA,
 };

-                                                                                
+

 
 

diff --git a/src/northbridge/intel/e7525/pciexp_porta1.c b/src/northbridge/intel/e7525/pciexp_porta1.c
index 4f4204b7ad417a094e3c2ce0712eee7768c52420..b54ee8add6ec2f6d41598fa4e08f6ade10407739 100644 (file)
--- a/src/northbridge/intel/e7525/pciexp_porta1.c
+++ b/src/northbridge/intel/e7525/pciexp_porta1.c
@@ -6,16 +6,16 @@
 #include <device/pciexp.h>
 #include <arch/io.h>
 #include "chip.h"
 #include <device/pciexp.h>
 #include <arch/io.h>
 #include "chip.h"

-                                                           
+

 typedef struct northbridge_intel_e7525_config config_t;
 
 static void pcie_init(struct device *dev)
 {
         config_t *config;
 typedef struct northbridge_intel_e7525_config config_t;
 
 static void pcie_init(struct device *dev)
 {
         config_t *config;

-                                                                                
+

         /* Get the chip configuration */
         config = dev->chip_info;
         /* Get the chip configuration */
         config = dev->chip_info;

-                                                                                
+

         if(config->intrline) {
                 pci_write_config32(dev, 0x3c, config->intrline);
         }
         if(config->intrline) {
                 pci_write_config32(dev, 0x3c, config->intrline);
         }


@@ -37,5 +37,5 @@ static const struct pci_driver pci_driver __pci_driver = {
         .vendor = PCI_VENDOR_ID_INTEL,
         .device = PCI_DEVICE_ID_INTEL_PCIE_PA1,
 };
         .vendor = PCI_VENDOR_ID_INTEL,
         .device = PCI_DEVICE_ID_INTEL_PCIE_PA1,
 };

-                                                                                
+

 
 

diff --git a/src/northbridge/intel/e7525/pciexp_portb.c b/src/northbridge/intel/e7525/pciexp_portb.c
index faf34dcfae2c5cb6be401312be47fd373f492ffa..7b78b42e078fdf0f7e1c3fe6c129252bd818c546 100644 (file)
--- a/src/northbridge/intel/e7525/pciexp_portb.c
+++ b/src/northbridge/intel/e7525/pciexp_portb.c
@@ -6,16 +6,16 @@
 #include <device/pciexp.h>
 #include <arch/io.h>
 #include "chip.h"
 #include <device/pciexp.h>
 #include <arch/io.h>
 #include "chip.h"

-                                                           
+

 typedef struct northbridge_intel_e7525_config config_t;
 
 static void pcie_init(struct device *dev)
 {
         config_t *config;
 typedef struct northbridge_intel_e7525_config config_t;
 
 static void pcie_init(struct device *dev)
 {
         config_t *config;

-                                                                                
+

         /* Get the chip configuration */
         config = dev->chip_info;
         /* Get the chip configuration */
         config = dev->chip_info;

-                                                                                
+

         if(config->intrline) {
                 pci_write_config32(dev, 0x3c, config->intrline);
         }
         if(config->intrline) {
                 pci_write_config32(dev, 0x3c, config->intrline);
         }


@@ -37,5 +37,5 @@ static const struct pci_driver pci_driver __pci_driver = {
         .vendor = PCI_VENDOR_ID_INTEL,
         .device = PCI_DEVICE_ID_INTEL_PCIE_PB,
 };
         .vendor = PCI_VENDOR_ID_INTEL,
         .device = PCI_DEVICE_ID_INTEL_PCIE_PB,
 };

-                                                                                
+

 
 

diff --git a/src/northbridge/intel/e7525/pciexp_portc.c b/src/northbridge/intel/e7525/pciexp_portc.c
index d7d75a2f9c5030fb5dd322605605d25b13327658..da6eaf70dea7751c9bb13752a3a5175c410ffc19 100644 (file)
--- a/src/northbridge/intel/e7525/pciexp_portc.c
+++ b/src/northbridge/intel/e7525/pciexp_portc.c
@@ -6,16 +6,16 @@
 #include <device/pciexp.h>
 #include <arch/io.h>
 #include "chip.h"
 #include <device/pciexp.h>
 #include <arch/io.h>
 #include "chip.h"

-                                                           
+

 typedef struct northbridge_intel_e7525_config config_t;
 
 static void pcie_init(struct device *dev)
 {
         config_t *config;
 typedef struct northbridge_intel_e7525_config config_t;
 
 static void pcie_init(struct device *dev)
 {
         config_t *config;

-                                                                                
+

         /* Get the chip configuration */
         config = dev->chip_info;
         /* Get the chip configuration */
         config = dev->chip_info;

-                                                                                
+

         if(config->intrline) {
                 pci_write_config32(dev, 0x3c, config->intrline);
         }
         if(config->intrline) {
                 pci_write_config32(dev, 0x3c, config->intrline);
         }


@@ -37,5 +37,5 @@ static const struct pci_driver pci_driver __pci_driver = {
         .vendor = PCI_VENDOR_ID_INTEL,
         .device = PCI_DEVICE_ID_INTEL_PCIE_PC,
 };
         .vendor = PCI_VENDOR_ID_INTEL,
         .device = PCI_DEVICE_ID_INTEL_PCIE_PC,
 };

-                                                                                
+

 
 

diff --git a/src/northbridge/intel/e7525/raminit.c b/src/northbridge/intel/e7525/raminit.c
index 0d180220208d4a837024b43e39a813a0239c6b56..be44434bf58ab7d8267b6fa99596e6352cc9be60 100644 (file)
--- a/src/northbridge/intel/e7525/raminit.c
+++ b/src/northbridge/intel/e7525/raminit.c
@@ -33,13 +33,13 @@ static void sdram_set_registers(const struct mem_controller *ctrl)
                /* CKDIS 0x8c disable clocks */
        PCI_ADDR(0, 0x00, 0, CKDIS), 0xffff0000, 0x0000ffff,
 
                /* CKDIS 0x8c disable clocks */
        PCI_ADDR(0, 0x00, 0, CKDIS), 0xffff0000, 0x0000ffff,
 

-               /* 0x9c Device present and extended RAM control 
+               /* 0x9c Device present and extended RAM control

                 * DEVPRES is very touchy, hard code the initialization
                 * of PCI-E ports here.
                 */
        PCI_ADDR(0, 0x00, 0, DEVPRES), 0x00000000, 0x07020801 | DEVPRES_CONFIG,
 
                 * DEVPRES is very touchy, hard code the initialization
                 * of PCI-E ports here.
                 */
        PCI_ADDR(0, 0x00, 0, DEVPRES), 0x00000000, 0x07020801 | DEVPRES_CONFIG,
 

-               /* 0xc8 Remap RAM base and limit off */ 
+               /* 0xc8 Remap RAM base and limit off */

        PCI_ADDR(0, 0x00, 0, REMAPLIMIT), 0x00000000, 0x03df0000,
 
                /* ??? */
        PCI_ADDR(0, 0x00, 0, REMAPLIMIT), 0x00000000, 0x03df0000,
 
                /* ??? */


@@ -57,7 +57,7 @@ static void sdram_set_registers(const struct mem_controller *ctrl)
        PCI_ADDR(0, 0x00, 0, DEVPRES1), 0xffbffff, (1<<22)|(6<<2) | DEVPRES1_CONFIG,
 
                /* 0x14 */
        PCI_ADDR(0, 0x00, 0, DEVPRES1), 0xffbffff, (1<<22)|(6<<2) | DEVPRES1_CONFIG,
 
                /* 0x14 */

-       PCI_ADDR(0, 0x00, 0, IURBASE), 0x00000fff, BAR |0,  
+       PCI_ADDR(0, 0x00, 0, IURBASE), 0x00000fff, BAR |0,

        };
        int i;
        int max;
        };
        int i;
        int max;


@@ -122,7 +122,7 @@ static struct dimm_size spd_get_dimm_size(unsigned device)
        if (value < 0) goto hw_err;
        value &= 0xff;
        value <<= 8;
        if (value < 0) goto hw_err;
        value &= 0xff;
        value <<= 8;

-       
+

        low = spd_read_byte(device, 6); /* (low byte) */
        if (low < 0) goto hw_err;
        value = value | (low & 0xff);
        low = spd_read_byte(device, 6); /* (low byte) */
        if (low < 0) goto hw_err;
        value = value | (low & 0xff);


@@ -169,7 +169,7 @@ static long spd_set_ram_size(const struct mem_controller *ctrl, long dimm_mask)
 {
        int i;
        int cum;
 {
        int i;
        int cum;

-       
+

        for(i = cum = 0; i < DIMM_SOCKETS; i++) {
                struct dimm_size sz;
                if (dimm_mask & (1 << i)) {
        for(i = cum = 0; i < DIMM_SOCKETS; i++) {
                struct dimm_size sz;
                if (dimm_mask & (1 << i)) {


@@ -233,7 +233,7 @@ static unsigned int spd_detect_dimms(const struct mem_controller *ctrl)
 }
 
 
 }
 
 

-static int spd_set_row_attributes(const struct mem_controller *ctrl, 
+static int spd_set_row_attributes(const struct mem_controller *ctrl,

                long dimm_mask)
 {
 
                long dimm_mask)
 {
 


@@ -264,22 +264,22 @@ static int spd_set_row_attributes(const struct mem_controller *ctrl,
                reg += log2(value & 0xff);
 
                /* Get the device width and convert it to a power of two */
                reg += log2(value & 0xff);
 
                /* Get the device width and convert it to a power of two */

-               value = spd_read_byte(ctrl->channel0[cnt], 13); 
+               value = spd_read_byte(ctrl->channel0[cnt], 13);

                if (value < 0) goto hw_err;
                value = log2(value & 0xff);
                reg += value;
                if(reg < 27) goto hw_err;
                reg -= 27;
                reg += (value << 2);
                if (value < 0) goto hw_err;
                value = log2(value & 0xff);
                reg += value;
                if(reg < 27) goto hw_err;
                reg -= 27;
                reg += (value << 2);

-       
+

                dra += reg << (cnt*8);
                value = spd_read_byte(ctrl->channel0[cnt], 5);
                if (value & 2)
                dra += reg << (cnt*8);
                value = spd_read_byte(ctrl->channel0[cnt], 5);
                if (value & 2)

-                       dra += reg << ((cnt*8)+4);      
+                       dra += reg << ((cnt*8)+4);

        }
 
        /* 0x70 DRA */
        }
 
        /* 0x70 DRA */

-       pci_write_config32(ctrl->f0, DRA, dra); 
+       pci_write_config32(ctrl->f0, DRA, dra);

        goto out;
 
  val_err:
        goto out;
 
  val_err:


@@ -293,7 +293,7 @@ hw_err:
 }
 
 
 }
 
 

-static int spd_set_drt_attributes(const struct mem_controller *ctrl, 
+static int spd_set_drt_attributes(const struct mem_controller *ctrl,

                long dimm_mask, uint32_t drc)
 {
        int value;
                long dimm_mask, uint32_t drc)
 {
        int value;


@@ -305,23 +305,23 @@ static int spd_set_drt_attributes(const struct mem_controller *ctrl,
        int latency;
        uint32_t index = 0;
        uint32_t index2 = 0;
        int latency;
        uint32_t index = 0;
        uint32_t index2 = 0;

-       static const unsigned char cycle_time[3] = {0x75,0x60,0x50}; 
+       static const unsigned char cycle_time[3] = {0x75,0x60,0x50};

        static const int latency_indicies[] = { 26, 23, 9 };
 
        /* 0x78 DRT */
        drt = pci_read_config32(ctrl->f0, DRT);
        drt &= 3;  /* save bits 1:0 */
        static const int latency_indicies[] = { 26, 23, 9 };
 
        /* 0x78 DRT */
        drt = pci_read_config32(ctrl->f0, DRT);
        drt &= 3;  /* save bits 1:0 */

-       
+

        for(first_dimm = 0; first_dimm < 4; first_dimm++) {
        for(first_dimm = 0; first_dimm < 4; first_dimm++) {

-               if (dimm_mask & (1 << first_dimm)) 
+               if (dimm_mask & (1 << first_dimm))

                        break;
        }
                        break;
        }

-       
+

        /* get dimm type */
        value = spd_read_byte(ctrl->channel0[first_dimm], 2);
        if(value == 8) {
                drt |= (3<<5); /* back to bark write turn around & cycle add */
        /* get dimm type */
        value = spd_read_byte(ctrl->channel0[first_dimm], 2);
        if(value == 8) {
                drt |= (3<<5); /* back to bark write turn around & cycle add */

-       }       
+       }

 
        drt |= (3<<18);  /* Trasmax */
 
 
        drt |= (3<<18);  /* Trasmax */
 


@@ -332,22 +332,22 @@ static int spd_set_drt_attributes(const struct mem_controller *ctrl,
                reg = spd_read_byte(ctrl->channel0[cnt], 18); /* CAS Latency */
                /* Compute the lowest cas latency supported */
                latency = log2(reg) -2;
                reg = spd_read_byte(ctrl->channel0[cnt], 18); /* CAS Latency */
                /* Compute the lowest cas latency supported */
                latency = log2(reg) -2;

-       
+

                /* Loop through and find a fast clock with a low latency */
                for(index = 0; index < 3; index++, latency++) {
                        if ((latency < 2) || (latency > 4) ||
                                (!(reg & (1 << latency)))) {
                                continue;
                        }
                /* Loop through and find a fast clock with a low latency */
                for(index = 0; index < 3; index++, latency++) {
                        if ((latency < 2) || (latency > 4) ||
                                (!(reg & (1 << latency)))) {
                                continue;
                        }

-                       value = spd_read_byte(ctrl->channel0[cnt], 
+                       value = spd_read_byte(ctrl->channel0[cnt],

                                        latency_indicies[index]);
                                        latency_indicies[index]);

-         
+

                        if(value <= cycle_time[drc&3]) {
                                if( latency > cas_latency) {
                                        cas_latency = latency;
                                }
                                break;
                        if(value <= cycle_time[drc&3]) {
                                if( latency > cas_latency) {
                                        cas_latency = latency;
                                }
                                break;

-                       }       
+                       }

                }
        }
        index = (cas_latency-2);
                }
        }
        index = (cas_latency-2);


@@ -401,7 +401,7 @@ static int spd_set_drt_attributes(const struct mem_controller *ctrl,
                } else {
                        drt |= (2<<8);  /* Trp RAS Precharg */
                }
                } else {
                        drt |= (2<<8);  /* Trp RAS Precharg */
                }

-               
+

                /* Trcd RAS to CAS delay */
                if((index2&0x0ff)<=0x03c) {
                        drt |= (0<<10);
                /* Trcd RAS to CAS delay */
                if((index2&0x0ff)<=0x03c) {
                        drt |= (0<<10);


@@ -411,7 +411,7 @@ static int spd_set_drt_attributes(const struct mem_controller *ctrl,
 
                /* Tdal Write auto precharge recovery delay */
                drt |= (1<<12);
 
                /* Tdal Write auto precharge recovery delay */
                drt |= (1<<12);

-       
+

                /* Trc TRS min */
                if((index2&0x0ff00)<=0x03700)
                        drt |= (0<<14);
                /* Trc TRS min */
                if((index2&0x0ff00)<=0x03700)
                        drt |= (0<<14);


@@ -419,9 +419,9 @@ static int spd_set_drt_attributes(const struct mem_controller *ctrl,
                        drt |= (1<<14);
                else
                        drt |= (2<<14); /* spd 41 */
                        drt |= (1<<14);
                else
                        drt |= (2<<14); /* spd 41 */

-               
+

                drt |= (2<<16);  /* Twr not defined for DDR docs say use 2 */
                drt |= (2<<16);  /* Twr not defined for DDR docs say use 2 */

-               
+

                /* Trrd Row Delay */
                if((index&0x0ff0000)<=0x0140000) {
                        drt |= (0<<20);
                /* Trrd Row Delay */
                if((index&0x0ff0000)<=0x0140000) {
                        drt |= (0<<20);


@@ -432,7 +432,7 @@ static int spd_set_drt_attributes(const struct mem_controller *ctrl,
                } else {
                        drt |= (3<<20);
                }
                } else {
                        drt |= (3<<20);
                }

-               
+

                /* Trfc Auto refresh cycle time */
                if((index2&0x0ff0000)<=0x04b0000) {
                        drt |= (0<<22);
                /* Trfc Auto refresh cycle time */
                if((index2&0x0ff0000)<=0x04b0000) {
                        drt |= (0<<22);


@@ -446,14 +446,14 @@ static int spd_set_drt_attributes(const struct mem_controller *ctrl,
        }
        else if(value <= 0x60) { /* 167 Mhz */
                /* according to new documentation CAS latency is 00
        }
        else if(value <= 0x60) { /* 167 Mhz */
                /* according to new documentation CAS latency is 00

-                * for bits 3:2 for all 167 Mhz 
+                * for bits 3:2 for all 167 Mhz

                drt |= ((index&3)<<2); */  /* set CAS latency */
                if((index&0x0ff00)<=0x03000) {
                        drt |= (1<<8);  /* Trp RAS Precharg */
                } else {
                        drt |= (2<<8);  /* Trp RAS Precharg */
                }
                drt |= ((index&3)<<2); */  /* set CAS latency */
                if((index&0x0ff00)<=0x03000) {
                        drt |= (1<<8);  /* Trp RAS Precharg */
                } else {
                        drt |= (2<<8);  /* Trp RAS Precharg */
                }

-               
+

                /* Trcd RAS to CAS delay */
                if((index2&0x0ff)<=0x030) {
                        drt |= (0<<10);
                /* Trcd RAS to CAS delay */
                if((index2&0x0ff)<=0x030) {
                        drt |= (0<<10);


@@ -462,13 +462,13 @@ static int spd_set_drt_attributes(const struct mem_controller *ctrl,
                }
 
                /* Tdal Write auto precharge recovery delay */
                }
 
                /* Tdal Write auto precharge recovery delay */

-               drt |= (2<<12); 
-               
+               drt |= (2<<12);
+

                /* Trc TRS min */
                drt |= (2<<14); /* spd 41, but only one choice */
                /* Trc TRS min */
                drt |= (2<<14); /* spd 41, but only one choice */

-               
+

                drt |= (2<<16);  /* Twr not defined for DDR docs say 2 */
                drt |= (2<<16);  /* Twr not defined for DDR docs say 2 */

-               
+

                /* Trrd Row Delay */
                if((index&0x0ff0000)<=0x0180000) {
                        drt |= (0<<20);
                /* Trrd Row Delay */
                if((index&0x0ff0000)<=0x0180000) {
                        drt |= (0<<20);


@@ -477,7 +477,7 @@ static int spd_set_drt_attributes(const struct mem_controller *ctrl,
                } else {
                        drt |= (2<<20);
                }
                } else {
                        drt |= (2<<20);
                }

-               
+

                /* Trfc Auto refresh cycle time */
                if((index2&0x0ff0000)<=0x0480000) {
                        drt |= (0<<22);
                /* Trfc Auto refresh cycle time */
                if((index2&0x0ff0000)<=0x0480000) {
                        drt |= (0<<22);


@@ -505,13 +505,13 @@ static int spd_set_drt_attributes(const struct mem_controller *ctrl,
                }
 
                /* Tdal Write auto precharge recovery delay */
                }
 
                /* Tdal Write auto precharge recovery delay */

-               drt |= (1<<12); 
-               
+               drt |= (1<<12);
+

                /* Trc TRS min */
                drt |= (2<<14); /* spd 41, but only one choice */
                /* Trc TRS min */
                drt |= (2<<14); /* spd 41, but only one choice */

-               
+

                drt |= (1<<16);  /* Twr not defined for DDR docs say 1 */
                drt |= (1<<16);  /* Twr not defined for DDR docs say 1 */

-               
+

                /* Trrd Row Delay */
                if((index&0x0ff0000)<=0x01e0000) {
                        drt |= (0<<20);
                /* Trrd Row Delay */
                if((index&0x0ff0000)<=0x01e0000) {
                        drt |= (0<<20);


@@ -520,7 +520,7 @@ static int spd_set_drt_attributes(const struct mem_controller *ctrl,
                } else {
                        drt |= (2<<20);
                }
                } else {
                        drt |= (2<<20);
                }

-               
+

                /* Trfc Auto refresh cycle time */
                if((index2&0x0ff0000)<=0x04b0000) {
                        drt |= (0<<22);
                /* Trfc Auto refresh cycle time */
                if((index2&0x0ff0000)<=0x04b0000) {
                        drt |= (0<<22);


@@ -529,13 +529,13 @@ static int spd_set_drt_attributes(const struct mem_controller *ctrl,
                } else {
                        drt |= (2<<22);
                }
                } else {
                        drt |= (2<<22);
                }

-               
+

                /* Based on CAS latency */
                if(index&7)
                        drt |= (0x099<<24);
                else
                        drt |= (0x055<<24);
                /* Based on CAS latency */
                if(index&7)
                        drt |= (0x099<<24);
                else
                        drt |= (0x055<<24);

-               
+

        }
        else {
                die("Invalid SPD 9 bus speed.\n");
        }
        else {
                die("Invalid SPD 9 bus speed.\n");


@@ -547,7 +547,7 @@ static int spd_set_drt_attributes(const struct mem_controller *ctrl,
        return(cas_latency);
 }
 
        return(cas_latency);
 }
 

-static int spd_set_dram_controller_mode(const struct mem_controller *ctrl, 
+static int spd_set_dram_controller_mode(const struct mem_controller *ctrl,

                long dimm_mask)
 {
        int value;
                long dimm_mask)
 {
        int value;


@@ -558,12 +558,12 @@ static int spd_set_dram_controller_mode(const struct mem_controller *ctrl,
        unsigned char dram_type = 0xff;
        unsigned char ecc = 0xff;
        unsigned char rate = 62;
        unsigned char dram_type = 0xff;
        unsigned char ecc = 0xff;
        unsigned char rate = 62;

-       static const unsigned char spd_rates[6] = {15,3,7,7,62,62}; 
+       static const unsigned char spd_rates[6] = {15,3,7,7,62,62};

        static const unsigned char drc_rates[5] = {0,15,7,62,3};
        static const unsigned char fsb_conversion[4] = {3,1,3,2};
 
        /* 0x7c DRC */
        static const unsigned char drc_rates[5] = {0,15,7,62,3};
        static const unsigned char fsb_conversion[4] = {3,1,3,2};
 
        /* 0x7c DRC */

-       drc = pci_read_config32(ctrl->f0, DRC); 
+       drc = pci_read_config32(ctrl->f0, DRC);

        for(cnt=0; cnt < 4; cnt++) {
                if (!(dimm_mask & (1 << cnt))) {
                        continue;
        for(cnt=0; cnt < 4; cnt++) {
                if (!(dimm_mask & (1 << cnt))) {
                        continue;


@@ -578,7 +578,7 @@ static int spd_set_dram_controller_mode(const struct mem_controller *ctrl,
                                else if (ecc == 1) {
                                        die("ERROR - Mixed DDR & DDR2 RAM\n");
                                }
                                else if (ecc == 1) {
                                        die("ERROR - Mixed DDR & DDR2 RAM\n");
                                }

-                       } 
+                       }

                        else if ( reg == 7 ) {
                                if ( ecc == 0xff) {
                                        ecc = 1;
                        else if ( reg == 7 ) {
                                if ( ecc == 0xff) {
                                        ecc = 1;


@@ -586,7 +586,7 @@ static int spd_set_dram_controller_mode(const struct mem_controller *ctrl,
                                else if ( ecc > 1 ) {
                                        die("ERROR - Mixed DDR & DDR2 RAM\n");
                                }
                                else if ( ecc > 1 ) {
                                        die("ERROR - Mixed DDR & DDR2 RAM\n");
                                }

-                       }       
+                       }

                        else {
                                die("ERROR - RAM not DDR\n");
                        }
                        else {
                                die("ERROR - RAM not DDR\n");
                        }


@@ -650,7 +650,7 @@ static int spd_set_dram_controller_mode(const struct mem_controller *ctrl,
        drc |= (fsb_conversion[value] << 2);
        drc &= ~(3 << 0); /* set the dram type */
        drc |= (dram_type << 0);
        drc |= (fsb_conversion[value] << 2);
        drc &= ~(3 << 0); /* set the dram type */
        drc |= (dram_type << 0);

-               
+

        goto out;
 
  val_err:
        goto out;
 
  val_err:


@@ -662,7 +662,7 @@ hw_err:
        return drc;
 }
 
        return drc;
 }
 

-static void sdram_set_spd_registers(const struct mem_controller *ctrl) 
+static void sdram_set_spd_registers(const struct mem_controller *ctrl)

 {
        long dimm_mask;
 
 {
        long dimm_mask;
 


@@ -681,7 +681,7 @@ static void do_delay(void)
        unsigned char b;
        for(i=0;i<16;i++)
                b=inb(0x80);
        unsigned char b;
        for(i=0;i<16;i++)
                b=inb(0x80);

-}      
+}

 
 #define TIMEOUT_LOOPS 300000
 
 
 #define TIMEOUT_LOOPS 300000
 


@@ -695,7 +695,7 @@ static void set_on_dimm_termination_enable(const struct mem_controller *ctrl)
         unsigned int dimm,i;
         unsigned int data32;
        unsigned int t4;
         unsigned int dimm,i;
         unsigned int data32;
        unsigned int t4;

- 
+

        /* Set up northbridge values */
        /* ODT enable */
        pci_write_config32(ctrl->f0, 0x88, 0xf0000180);
        /* Set up northbridge values */
        /* ODT enable */
        pci_write_config32(ctrl->f0, 0x88, 0xf0000180);


@@ -712,10 +712,10 @@ static void set_on_dimm_termination_enable(const struct mem_controller *ctrl)
        for(i=0;i<1;i++) {
            if((t4&0x0f) == 1) {
                if( ((t4>>8)&0x0f) == 0 ) {
        for(i=0;i<1;i++) {
            if((t4&0x0f) == 1) {
                if( ((t4>>8)&0x0f) == 0 ) {

-                       data32 = 0x00000010; /* EEES */ 
+                       data32 = 0x00000010; /* EEES */

                        break;
                }
                        break;
                }

-               if ( ((t4>>16)&0x0f) == 0 ) { 
+               if ( ((t4>>16)&0x0f) == 0 ) {

                        data32 = 0x00003132; /* EESS */
                        break;
                }
                        data32 = 0x00003132; /* EESS */
                        break;
                }


@@ -728,7 +728,7 @@ static void set_on_dimm_termination_enable(const struct mem_controller *ctrl)
            }
            if((t4&0x0f) == 2) {
                if( ((t4>>8)&0x0f) == 0 ) {
            }
            if((t4&0x0f) == 2) {
                if( ((t4>>8)&0x0f) == 0 ) {

-                       data32 = 0x00003132; /* EEED */ 
+                       data32 = 0x00003132; /* EEED */

                        break;
                }
                if ( ((t4>>8)&0x0f) == 2 ) {
                        break;
                }
                if ( ((t4>>8)&0x0f) == 2 ) {


@@ -755,14 +755,14 @@ static void set_on_dimm_termination_enable(const struct mem_controller *ctrl)
 
                write32(BAR+DCALADDR, 0x0b840001);
                write32(BAR+DCALCSR, 0x83000003 | (dimm << 20));
 
                write32(BAR+DCALADDR, 0x0b840001);
                write32(BAR+DCALCSR, 0x83000003 | (dimm << 20));

-               
+

                for(i=0;i<1001;i++) {
                        data32 = read32(BAR+DCALCSR);
                        if(!(data32 & (1<<31)))
                                break;
                }
        }
                for(i=0;i<1001;i++) {
                        data32 = read32(BAR+DCALCSR);
                        if(!(data32 & (1<<31)))
                                break;
                }
        }

-}      
+}

 static void set_receive_enable(const struct mem_controller *ctrl)
 {
        unsigned int i;
 static void set_receive_enable(const struct mem_controller *ctrl)
 {
        unsigned int i;


@@ -770,7 +770,7 @@ static void set_receive_enable(const struct mem_controller *ctrl)
        uint32_t recena=0;
        uint32_t recenb=0;
 
        uint32_t recena=0;
        uint32_t recenb=0;
 

-       {       
+       {

        unsigned int dimm;
        unsigned int edge;
        int32_t data32;
        unsigned int dimm;
        unsigned int edge;
        int32_t data32;


@@ -788,7 +788,7 @@ static void set_receive_enable(const struct mem_controller *ctrl)
                if(!(dimm&1)) {
                        write32(BAR+DCALDATA+(17*4), 0x04020000);
                        write32(BAR+DCALCSR, 0x83800004 | (dimm << 20));
                if(!(dimm&1)) {
                        write32(BAR+DCALDATA+(17*4), 0x04020000);
                        write32(BAR+DCALCSR, 0x83800004 | (dimm << 20));

-               
+

                        for(i=0;i<1001;i++) {
                                data32 = read32(BAR+DCALCSR);
                                if(!(data32 & (1<<31)))
                        for(i=0;i<1001;i++) {
                                data32 = read32(BAR+DCALCSR);
                                if(!(data32 & (1<<31)))


@@ -796,7 +796,7 @@ static void set_receive_enable(const struct mem_controller *ctrl)
                        }
                        if(i>=1000)
                                continue;
                        }
                        if(i>=1000)
                                continue;

-               
+

                        dcal_data32_0 = read32(BAR+DCALDATA + 0);
                        dcal_data32_1 = read32(BAR+DCALDATA + 4);
                        dcal_data32_2 = read32(BAR+DCALDATA + 8);
                        dcal_data32_0 = read32(BAR+DCALDATA + 0);
                        dcal_data32_1 = read32(BAR+DCALDATA + 4);
                        dcal_data32_2 = read32(BAR+DCALDATA + 8);


@@ -883,7 +883,7 @@ static void set_receive_enable(const struct mem_controller *ctrl)
                                data32++;
                        }
                        /* test for frame edge cross overs */
                                data32++;
                        }
                        /* test for frame edge cross overs */

-                       if((edge == 1) && (data32 > 12) && 
+                       if((edge == 1) && (data32 > 12) &&

                            (((recen+16)-data32) < 3)) {
                                data32 = 0;
                                cnt += 2;
                            (((recen+16)-data32) < 3)) {
                                data32 = 0;
                                cnt += 2;


@@ -1034,15 +1034,15 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
                /* FSB 200 DIMM 400 */
        {{ 0x00000001, 0x00000000, 0x00000001, 0x00000000}},
        };
                /* FSB 200 DIMM 400 */
        {{ 0x00000001, 0x00000000, 0x00000001, 0x00000000}},
        };

-       
+

        static const uint32_t dqs_data[] = {
        static const uint32_t dqs_data[] = {

-               0xffffffff, 0xffffffff, 0x000000ff, 
-               0xffffffff, 0xffffffff, 0x000000ff, 
+               0xffffffff, 0xffffffff, 0x000000ff,
+               0xffffffff, 0xffffffff, 0x000000ff,

                0xffffffff, 0xffffffff, 0x000000ff,
                0xffffffff, 0xffffffff, 0x000000ff,
                0xffffffff, 0xffffffff, 0x000000ff,
                0xffffffff, 0xffffffff, 0x000000ff,

-               0xffffffff, 0xffffffff, 0x000000ff, 
-               0xffffffff, 0xffffffff, 0x000000ff, 
-               0xffffffff, 0xffffffff, 0x000000ff, 
+               0xffffffff, 0xffffffff, 0x000000ff,
+               0xffffffff, 0xffffffff, 0x000000ff,
+               0xffffffff, 0xffffffff, 0x000000ff,

                0xffffffff, 0xffffffff, 0x000000ff};
 
        mask = spd_detect_dimms(ctrl);
                0xffffffff, 0xffffffff, 0x000000ff};
 
        mask = spd_detect_dimms(ctrl);


@@ -1071,24 +1071,24 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
        }
        /* 0x7c DRC */
        pci_write_config32(ctrl->f0, DRC, data32);
        }
        /* 0x7c DRC */
        pci_write_config32(ctrl->f0, DRC, data32);

-       
+

                /* turn the clocks on */
        /* 0x8c CKDIS */
        pci_write_config16(ctrl->f0, CKDIS, 0x0000);
                /* turn the clocks on */
        /* 0x8c CKDIS */
        pci_write_config16(ctrl->f0, CKDIS, 0x0000);

-       
+

                /* 0x9a DDRCSR Take subsystem out of idle */
        data16 = pci_read_config16(ctrl->f0, DDRCSR);
        data16 &= ~(7 << 12);
        data16 |= (3 << 12);   /* use dual channel lock step */
        pci_write_config16(ctrl->f0, DDRCSR, data16);
                /* 0x9a DDRCSR Take subsystem out of idle */
        data16 = pci_read_config16(ctrl->f0, DDRCSR);
        data16 &= ~(7 << 12);
        data16 |= (3 << 12);   /* use dual channel lock step */
        pci_write_config16(ctrl->f0, DDRCSR, data16);

-       
+

                /* program row size DRB */
        spd_set_ram_size(ctrl, mask);
 
                /* program page size DRA */
        spd_set_row_attributes(ctrl, mask);
 
                /* program row size DRB */
        spd_set_ram_size(ctrl, mask);
 
                /* program page size DRA */
        spd_set_row_attributes(ctrl, mask);
 

-               /* program DRT timing values */ 
+               /* program DRT timing values */

        cas_latency = spd_set_drt_attributes(ctrl, mask, drc);
 
        for(i=0;i<8;i++) { /* loop throught each dimm to test for row */
        cas_latency = spd_set_drt_attributes(ctrl, mask, drc);
 
        for(i=0;i<8;i++) { /* loop throught each dimm to test for row */


@@ -1097,7 +1097,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
                print_debug("\n");
                /* Apply NOP */
                do_delay();
                print_debug("\n");
                /* Apply NOP */
                do_delay();

-               
+

                write32(BAR + 0x100, (0x03000000 | (i<<20)));
 
                write32(BAR+0x100, (0x83000000 | (i<<20)));
                write32(BAR + 0x100, (0x03000000 | (i<<20)));
 
                write32(BAR+0x100, (0x83000000 | (i<<20)));


@@ -1107,12 +1107,12 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
                        data32 = read32(BAR+DCALCSR);
 
        }
                        data32 = read32(BAR+DCALCSR);
 
        }

-       
+

        /* Apply NOP */
        do_delay();
 
        /* Apply NOP */
        do_delay();
 

-       for(cs=0;cs<8;cs++) {   
-               write32(BAR + DCALCSR, (0x83000000 | (cs<<20))); 
+       for(cs=0;cs<8;cs++) {
+               write32(BAR + DCALCSR, (0x83000000 | (cs<<20)));

                data32 = read32(BAR+DCALCSR);
                while(data32 & 0x80000000)
                        data32 = read32(BAR+DCALCSR);
                data32 = read32(BAR+DCALCSR);
                while(data32 & 0x80000000)
                        data32 = read32(BAR+DCALCSR);


@@ -1120,7 +1120,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
 
        /* Precharg all banks */
        do_delay();
 
        /* Precharg all banks */
        do_delay();

-       for(cs=0;cs<8;cs++) {   
+       for(cs=0;cs<8;cs++) {

                if ((drc & 3) == 2) /* DDR2  */
                         write32(BAR+DCALADDR, 0x04000000);
                 else   /* DDR1  */
                if ((drc & 3) == 2) /* DDR2  */
                         write32(BAR+DCALADDR, 0x04000000);
                 else   /* DDR1  */


@@ -1130,10 +1130,10 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
                while(data32 & 0x80000000)
                        data32 = read32(BAR+DCALCSR);
        }
                while(data32 & 0x80000000)
                        data32 = read32(BAR+DCALCSR);
        }

-               
+

        /* EMRS dll's enabled */
        do_delay();
        /* EMRS dll's enabled */
        do_delay();

-       for(cs=0;cs<8;cs++) {   
+       for(cs=0;cs<8;cs++) {

                if ((drc & 3) == 2) /* DDR2  */
                        /* fixme hard code AL additive latency */
                         write32(BAR+DCALADDR, 0x0b940001);
                if ((drc & 3) == 2) /* DDR2  */
                        /* fixme hard code AL additive latency */
                         write32(BAR+DCALADDR, 0x0b940001);


@@ -1158,7 +1158,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
                 else  /*  CAS Latency 2.5 */
                         mode_reg = 0x016a0000;
         }
                 else  /*  CAS Latency 2.5 */
                         mode_reg = 0x016a0000;
         }

-       for(cs=0;cs<8;cs++) {   
+       for(cs=0;cs<8;cs++) {

                write32(BAR+DCALADDR, mode_reg);
                write32(BAR+DCALCSR, (0x83000003 | (cs<<20)));
                data32 = read32(BAR+DCALCSR);
                write32(BAR+DCALADDR, mode_reg);
                write32(BAR+DCALCSR, (0x83000003 | (cs<<20)));
                data32 = read32(BAR+DCALCSR);


@@ -1170,7 +1170,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
        do_delay();
        do_delay();
        do_delay();
        do_delay();
        do_delay();
        do_delay();

-       for(cs=0;cs<8;cs++) {   
+       for(cs=0;cs<8;cs++) {

                if ((drc & 3) == 2) /* DDR2  */
                         write32(BAR+DCALADDR, 0x04000000);
                 else   /* DDR1  */
                if ((drc & 3) == 2) /* DDR2  */
                         write32(BAR+DCALADDR, 0x04000000);
                 else   /* DDR1  */


@@ -1180,17 +1180,17 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
                while(data32 & 0x80000000)
                        data32 = read32(BAR+DCALCSR);
        }
                while(data32 & 0x80000000)
                        data32 = read32(BAR+DCALCSR);
        }

-       
+

        /* Do 2 refreshes */
        do_delay();
        /* Do 2 refreshes */
        do_delay();

-       for(cs=0;cs<8;cs++) {   
+       for(cs=0;cs<8;cs++) {

                write32(BAR+DCALCSR, (0x83000001 | (cs<<20)));
                data32 = read32(BAR+DCALCSR);
                while(data32 & 0x80000000)
                        data32 = read32(BAR+DCALCSR);
        }
        do_delay();
                write32(BAR+DCALCSR, (0x83000001 | (cs<<20)));
                data32 = read32(BAR+DCALCSR);
                while(data32 & 0x80000000)
                        data32 = read32(BAR+DCALCSR);
        }
        do_delay();

-       for(cs=0;cs<8;cs++) {   
+       for(cs=0;cs<8;cs++) {

                write32(BAR+DCALCSR, (0x83000001 | (cs<<20)));
                data32 = read32(BAR+DCALCSR);
                while(data32 & 0x80000000)
                write32(BAR+DCALCSR, (0x83000001 | (cs<<20)));
                data32 = read32(BAR+DCALCSR);
                while(data32 & 0x80000000)


@@ -1198,33 +1198,33 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
        }
        do_delay();
        /* for good luck do 6 more */
        }
        do_delay();
        /* for good luck do 6 more */

-       for(cs=0;cs<8;cs++) {   
+       for(cs=0;cs<8;cs++) {

                write32(BAR+DCALCSR, (0x83000001 | (cs<<20)));
        }
        do_delay();
                write32(BAR+DCALCSR, (0x83000001 | (cs<<20)));
        }
        do_delay();

-       for(cs=0;cs<8;cs++) {   
+       for(cs=0;cs<8;cs++) {

                write32(BAR+DCALCSR, (0x83000001 | (cs<<20)));
        }
        do_delay();
                write32(BAR+DCALCSR, (0x83000001 | (cs<<20)));
        }
        do_delay();

-       for(cs=0;cs<8;cs++) {   
+       for(cs=0;cs<8;cs++) {

                write32(BAR+DCALCSR, (0x83000001 | (cs<<20)));
        }
        do_delay();
                write32(BAR+DCALCSR, (0x83000001 | (cs<<20)));
        }
        do_delay();

-       for(cs=0;cs<8;cs++) {   
+       for(cs=0;cs<8;cs++) {

                write32(BAR+DCALCSR, (0x83000001 | (cs<<20)));
        }
        do_delay();
                write32(BAR+DCALCSR, (0x83000001 | (cs<<20)));
        }
        do_delay();

-       for(cs=0;cs<8;cs++) {   
+       for(cs=0;cs<8;cs++) {

                write32(BAR+DCALCSR, (0x83000001 | (cs<<20)));
        }
        do_delay();
                write32(BAR+DCALCSR, (0x83000001 | (cs<<20)));
        }
        do_delay();

-       for(cs=0;cs<8;cs++) {   
+       for(cs=0;cs<8;cs++) {

                write32(BAR+DCALCSR, (0x83000001 | (cs<<20)));
        }
        do_delay();
        /* MRS reset dll's normal */
        do_delay();
                write32(BAR+DCALCSR, (0x83000001 | (cs<<20)));
        }
        do_delay();
        /* MRS reset dll's normal */
        do_delay();

-       for(cs=0;cs<8;cs++) {   
+       for(cs=0;cs<8;cs++) {

                write32(BAR+DCALADDR, (mode_reg & ~(1<<24)));
                write32(BAR+DCALCSR, (0x83000003 | (cs<<20)));
                data32 = read32(BAR+DCALCSR);
                write32(BAR+DCALADDR, (mode_reg & ~(1<<24)));
                write32(BAR+DCALCSR, (0x83000003 | (cs<<20)));
                data32 = read32(BAR+DCALCSR);


@@ -1249,7 +1249,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
        write32(BAR+DCALCSR, 0x0000000f);
 
        /* DDR1 This is test code to copy some codes in the factory setup */
        write32(BAR+DCALCSR, 0x0000000f);
 
        /* DDR1 This is test code to copy some codes in the factory setup */

-       
+

        write32(BAR, 0x00100000);
 
         if ((drc & 3) == 2) { /* DDR2  */
        write32(BAR, 0x00100000);
 
         if ((drc & 3) == 2) { /* DDR2  */


@@ -1259,9 +1259,9 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
 
        /* receive enable calibration */
        set_receive_enable(ctrl);
 
        /* receive enable calibration */
        set_receive_enable(ctrl);

-       
+

        /* DQS */
        /* DQS */

-       pci_write_config32(ctrl->f0, 0x94, 0x3904a100 ); 
+       pci_write_config32(ctrl->f0, 0x94, 0x3904a100 );

        for(i = 0, cnt = (BAR+0x200); i < 24; i++, cnt+=4) {
                write32(cnt, dqs_data[i]);
        }
        for(i = 0, cnt = (BAR+0x200); i < 24; i++, cnt+=4) {
                write32(cnt, dqs_data[i]);
        }


@@ -1270,7 +1270,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
        /* Enable refresh */
        /* 0x7c DRC */
        data32 = drc & ~(3 << 20);  /* clear ECC mode */
        /* Enable refresh */
        /* 0x7c DRC */
        data32 = drc & ~(3 << 20);  /* clear ECC mode */

-       pci_write_config32(ctrl->f0, DRC, data32);      
+       pci_write_config32(ctrl->f0, DRC, data32);

        write32(BAR+DCALCSR, 0x0008000f);
 
        /* clear memory and init ECC */
        write32(BAR+DCALCSR, 0x0008000f);
 
        /* clear memory and init ECC */


@@ -1278,7 +1278,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
        for(i=0;i<64;i+=4) {
                write32(BAR+DCALDATA+i, 0x00000000);
        }
        for(i=0;i<64;i+=4) {
                write32(BAR+DCALDATA+i, 0x00000000);
        }

-       
+

        for(cs=0;cs<8;cs++) {
                write32(BAR+DCALCSR, (0x830831d8 | (cs<<20)));
                data32 = read32(BAR+DCALCSR);
        for(cs=0;cs<8;cs++) {
                write32(BAR+DCALCSR, (0x830831d8 | (cs<<20)));
                data32 = read32(BAR+DCALCSR);


@@ -1298,22 +1298,22 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
                        break;
        }
        print_debug("Done\n");
                        break;
        }
        print_debug("Done\n");

-       
+

        /* Set initialization complete */
        /* 0x7c DRC */
        drc |= (1 << 29);
        data32 = drc & ~(3 << 20);  /* clear ECC mode */
        /* Set initialization complete */
        /* 0x7c DRC */
        drc |= (1 << 29);
        data32 = drc & ~(3 << 20);  /* clear ECC mode */

-       pci_write_config32(ctrl->f0, DRC, data32);      
+       pci_write_config32(ctrl->f0, DRC, data32);

 
        /* Set the ecc mode */
 
        /* Set the ecc mode */

-       pci_write_config32(ctrl->f0, DRC, drc); 
+       pci_write_config32(ctrl->f0, DRC, drc);

 
        /* Enable memory scrubbing */
 
        /* Enable memory scrubbing */

-       /* 0x52 MCHSCRB */      
+       /* 0x52 MCHSCRB */

        data16 = pci_read_config16(ctrl->f0, MCHSCRB);
        data16 &= ~0x0f;
        data16 |= ((2 << 2) | (2 << 0));
        data16 = pci_read_config16(ctrl->f0, MCHSCRB);
        data16 &= ~0x0f;
        data16 |= ((2 << 2) | (2 << 0));

-       pci_write_config16(ctrl->f0, MCHSCRB, data16);  
+       pci_write_config16(ctrl->f0, MCHSCRB, data16);

 
        /* The memory is now setup, use it */
        cache_lbmem(MTRR_TYPE_WRBACK);
 
        /* The memory is now setup, use it */
        cache_lbmem(MTRR_TYPE_WRBACK);

diff --git a/src/northbridge/intel/i3100/pciexp_porta_ep80579.c b/src/northbridge/intel/i3100/pciexp_porta_ep80579.c
index d6400d58590450abdfaa1ac63743e48faecede1a..42f624aaf7f4d065d01d9c46a378f5b994ee7d8f 100644 (file)
--- a/src/northbridge/intel/i3100/pciexp_porta_ep80579.c
+++ b/src/northbridge/intel/i3100/pciexp_porta_ep80579.c
@@ -59,7 +59,7 @@ static void pcie_bus_enable_resources(struct device *dev)
        if (dev->link[0].bridge_ctrl & PCI_BRIDGE_CTL_VGA) {
                printk(BIOS_SPEW, "Enable VGA IO/MEM forwarding on PCIe port\n");
                pci_write_config8(dev, PCI_BRIDGE_CONTROL, 8);
        if (dev->link[0].bridge_ctrl & PCI_BRIDGE_CTL_VGA) {
                printk(BIOS_SPEW, "Enable VGA IO/MEM forwarding on PCIe port\n");
                pci_write_config8(dev, PCI_BRIDGE_CONTROL, 8);

-               
+

                dev->command |= PCI_COMMAND_IO;
                dev->command |= PCI_COMMAND_MEMORY;
        }
                dev->command |= PCI_COMMAND_IO;
                dev->command |= PCI_COMMAND_MEMORY;
        }

diff --git a/src/northbridge/intel/i3100/raminit_ep80579.c b/src/northbridge/intel/i3100/raminit_ep80579.c
index 5a4a328e44073df2c6a9b9f46c37b90363d93d1c..7aeef29c84e7e1c6f35605cdaa28123f1d755b2e 100644 (file)
--- a/src/northbridge/intel/i3100/raminit_ep80579.c
+++ b/src/northbridge/intel/i3100/raminit_ep80579.c
@@ -34,7 +34,7 @@ static void sdram_set_registers(const struct mem_controller *ctrl)
                PCI_ADDR(0, 0x00, 0, PAM-1), 0xcccccc7f, 0x33333000,
                PCI_ADDR(0, 0x00, 0, PAM+3), 0xcccccccc, 0x33333333,
                PCI_ADDR(0, 0x00, 0, DEVPRES1), 0xffffffff, 0x0040003a,
                PCI_ADDR(0, 0x00, 0, PAM-1), 0xcccccc7f, 0x33333000,
                PCI_ADDR(0, 0x00, 0, PAM+3), 0xcccccccc, 0x33333333,
                PCI_ADDR(0, 0x00, 0, DEVPRES1), 0xffffffff, 0x0040003a,

-               PCI_ADDR(0, 0x00, 0, SMRBASE), 0x00000fff, BAR | 0,  
+               PCI_ADDR(0, 0x00, 0, SMRBASE), 0x00000fff, BAR | 0,

        };
        int i;
        int max;
        };
        int i;
        int max;


@@ -89,7 +89,7 @@ static struct dimm_size spd_get_dimm_size(u16 device)
        if (value < 0) goto hw_err;
        value &= 0xff;
        value <<= 8;
        if (value < 0) goto hw_err;
        value &= 0xff;
        value <<= 8;

-       
+

        low = spd_read_byte(device, SPD_MODULE_DATA_WIDTH_LSB);
        if (low < 0) goto hw_err;
        value = value | (low & 0xff);
        low = spd_read_byte(device, SPD_MODULE_DATA_WIDTH_LSB);
        if (low < 0) goto hw_err;
        value = value | (low & 0xff);


@@ -143,7 +143,7 @@ static long spd_set_ram_size(const struct mem_controller *ctrl, u8 dimm_mask)
 {
        int i;
        int cum;
 {
        int i;
        int cum;

-       
+

        for (i = cum = 0; i < DIMM_SOCKETS; i++) {
                struct dimm_size sz;
                if (dimm_mask & (1 << i)) {
        for (i = cum = 0; i < DIMM_SOCKETS; i++) {
                struct dimm_size sz;
                if (dimm_mask & (1 << i)) {


@@ -212,7 +212,7 @@ static u8 spd_detect_dimms(const struct mem_controller *ctrl)
 }
 
 
 }
 
 

-static int spd_set_row_attributes(const struct mem_controller *ctrl, 
+static int spd_set_row_attributes(const struct mem_controller *ctrl,

                                  u8 dimm_mask)
 {
        int value;
                                  u8 dimm_mask)
 {
        int value;


@@ -258,7 +258,7 @@ static int spd_set_row_attributes(const struct mem_controller *ctrl,
                /* set device width (x8) */
                dra |= (1 << 4);
                dra |= (1 << 10);
                /* set device width (x8) */
                dra |= (1 << 4);
                dra |= (1 << 10);

-       
+

                /* set device type (registered) */
                dra |= (1 << 14);
 
                /* set device type (registered) */
                dra |= (1 << 14);
 


@@ -278,7 +278,7 @@ static int spd_set_row_attributes(const struct mem_controller *ctrl,
 }
 
 
 }
 
 

-static u32 spd_set_drt_attributes(const struct mem_controller *ctrl, 
+static u32 spd_set_drt_attributes(const struct mem_controller *ctrl,

                u8 dimm_mask, u32 drc)
 {
        int i;
                u8 dimm_mask, u32 drc)
 {
        int i;


@@ -409,7 +409,7 @@ static u32 spd_set_drt_attributes(const struct mem_controller *ctrl,
        return val;
 }
 
        return val;
 }
 

-static int spd_set_dram_controller_mode(const struct mem_controller *ctrl, 
+static int spd_set_dram_controller_mode(const struct mem_controller *ctrl,

                                        u8 dimm_mask)
 {
        int value;
                                        u8 dimm_mask)
 {
        int value;


@@ -486,7 +486,7 @@ static int spd_set_dram_controller_mode(const struct mem_controller *ctrl,
        return drc;
 }
 
        return drc;
 }
 

-static void sdram_set_spd_registers(const struct mem_controller *ctrl) 
+static void sdram_set_spd_registers(const struct mem_controller *ctrl)

 {
        u8 dimm_mask;
        int i;
 {
        u8 dimm_mask;
        int i;


@@ -506,7 +506,7 @@ static void set_on_dimm_termination_enable(const struct mem_controller *ctrl)
         u32 dimm,i;
         u32 data32;
        u32 t4;
         u32 dimm,i;
         u32 data32;
        u32 t4;

- 
+

        /* Set up northbridge values */
        /* ODT enable */
        pci_write_config32(ctrl->f0, SDRC, 0xa0002c30);
        /* Set up northbridge values */
        /* ODT enable */
        pci_write_config32(ctrl->f0, SDRC, 0xa0002c30);


@@ -581,17 +581,17 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
        data32 = data32 | (3 << 5);  /* temp turn off ODT */
        /* Set DRAM controller mode */
        pci_write_config32(ctrl->f0, DRC, data32);
        data32 = data32 | (3 << 5);  /* temp turn off ODT */
        /* Set DRAM controller mode */
        pci_write_config32(ctrl->f0, DRC, data32);

-       
+

        /* Turn the clocks on */
        pci_write_config16(ctrl->f0, CKDIS, 0x0000);
        /* Turn the clocks on */
        pci_write_config16(ctrl->f0, CKDIS, 0x0000);

-       
+

        /* Program row size */
        spd_set_ram_size(ctrl, mask);
        /* Program row size */
        spd_set_ram_size(ctrl, mask);

-       
+

        /* Program row attributes */
        spd_set_row_attributes(ctrl, mask);
 
        /* Program row attributes */
        spd_set_row_attributes(ctrl, mask);
 

-       /* Program timing values */     
+       /* Program timing values */

        mode_reg = spd_set_drt_attributes(ctrl, mask, drc);
 
        dump_dcal_regs();
        mode_reg = spd_set_drt_attributes(ctrl, mask, drc);
 
        dump_dcal_regs();


@@ -608,14 +608,14 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
                while (data32 & 0x80000000)
                        data32 = read32(BAR+DCALCSR);
        }
                while (data32 & 0x80000000)
                        data32 = read32(BAR+DCALCSR);
        }

-       
+

        /* Apply NOP */
        udelay(16);
        for (cs = 0; cs < 2; cs++) {
                print_debug("NOP CS");
                print_debug_hex8(cs);
                print_debug("\n");
        /* Apply NOP */
        udelay(16);
        for (cs = 0; cs < 2; cs++) {
                print_debug("NOP CS");
                print_debug_hex8(cs);
                print_debug("\n");

-               write32(BAR + DCALCSR, (0x80000000 | ((cs+1)<<21))); 
+               write32(BAR + DCALCSR, (0x80000000 | ((cs+1)<<21)));

                data32 = read32(BAR+DCALCSR);
                while (data32 & 0x80000000)
                        data32 = read32(BAR+DCALCSR);
                data32 = read32(BAR+DCALCSR);
                while (data32 & 0x80000000)
                        data32 = read32(BAR+DCALCSR);


@@ -623,7 +623,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
 
        /* Precharge all banks */
        udelay(16);
 
        /* Precharge all banks */
        udelay(16);

-       for (cs = 0; cs < 2; cs++) {    
+       for (cs = 0; cs < 2; cs++) {

                print_debug("Precharge CS");
                print_debug_hex8(cs);
                print_debug("\n");
                print_debug("Precharge CS");
                print_debug_hex8(cs);
                print_debug("\n");


@@ -633,10 +633,10 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
                while (data32 & 0x80000000)
                        data32 = read32(BAR+DCALCSR);
        }
                while (data32 & 0x80000000)
                        data32 = read32(BAR+DCALCSR);
        }

-               
+

        /* EMRS: Enable DLLs, set OCD calibration mode to default */
        udelay(16);
        /* EMRS: Enable DLLs, set OCD calibration mode to default */
        udelay(16);

-       for (cs = 0; cs < 2; cs++) {    
+       for (cs = 0; cs < 2; cs++) {

                print_debug("EMRS CS");
                print_debug_hex8(cs);
                print_debug("\n");
                print_debug("EMRS CS");
                print_debug_hex8(cs);
                print_debug("\n");


@@ -648,7 +648,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
        }
        /* MRS: Reset DLLs */
        udelay(16);
        }
        /* MRS: Reset DLLs */
        udelay(16);

-       for (cs = 0; cs < 2; cs++) {    
+       for (cs = 0; cs < 2; cs++) {

                print_debug("MRS CS");
                print_debug_hex8(cs);
                print_debug("\n");
                print_debug("MRS CS");
                print_debug_hex8(cs);
                print_debug("\n");


@@ -661,7 +661,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
 
        /* Precharge all banks */
        udelay(48);
 
        /* Precharge all banks */
        udelay(48);

-       for (cs = 0; cs < 2; cs++) {    
+       for (cs = 0; cs < 2; cs++) {

                print_debug("Precharge CS");
                print_debug_hex8(cs);
                print_debug("\n");
                print_debug("Precharge CS");
                print_debug_hex8(cs);
                print_debug("\n");


@@ -671,11 +671,11 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
                while (data32 & 0x80000000)
                        data32 = read32(BAR+DCALCSR);
        }
                while (data32 & 0x80000000)
                        data32 = read32(BAR+DCALCSR);
        }

-       
+

        /* Do 2 refreshes */
        for (i = 0; i < 2; i++) {
                udelay(16);
        /* Do 2 refreshes */
        for (i = 0; i < 2; i++) {
                udelay(16);

-               for (cs = 0; cs < 2; cs++) {    
+               for (cs = 0; cs < 2; cs++) {

                        print_debug("Refresh CS");
                        print_debug_hex8(cs);
                        print_debug("\n");
                        print_debug("Refresh CS");
                        print_debug_hex8(cs);
                        print_debug("\n");


@@ -688,7 +688,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
 
        /* MRS: Set DLLs to normal */
        udelay(16);
 
        /* MRS: Set DLLs to normal */
        udelay(16);

-       for (cs = 0; cs < 2; cs++) {    
+       for (cs = 0; cs < 2; cs++) {

                print_debug("MRS CS");
                print_debug_hex8(cs);
                print_debug("\n");
                print_debug("MRS CS");
                print_debug_hex8(cs);
                print_debug("\n");


@@ -734,7 +734,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
                while (data32 & 0x80000000)
                        data32 = read32(BAR+DCALCSR);
        }
                while (data32 & 0x80000000)
                        data32 = read32(BAR+DCALCSR);
        }

-       
+

        dump_dcal_regs();
 
        /* Adjust RCOMP */
        dump_dcal_regs();
 
        /* Adjust RCOMP */


@@ -746,11 +746,11 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
        dump_dcal_regs();
 
        data32 = drc & ~(3 << 20);  /* clear ECC mode */
        dump_dcal_regs();
 
        data32 = drc & ~(3 << 20);  /* clear ECC mode */

-       pci_write_config32(ctrl->f0, DRC, data32);      
+       pci_write_config32(ctrl->f0, DRC, data32);

        write32(BAR+DCALCSR, 0x0008000f);
 
        /* Clear memory and init ECC */
        write32(BAR+DCALCSR, 0x0008000f);
 
        /* Clear memory and init ECC */

-       for (cs = 0; cs < 2; cs++) {    
+       for (cs = 0; cs < 2; cs++) {

                if (!(mask & (1<<cs)))
                        continue;
                print_debug("clear memory CS");
                if (!(mask & (1<<cs)))
                        continue;
                print_debug("clear memory CS");


@@ -779,10 +779,10 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
        drc |= (1 << 29);
        drc |= (3 << 30);
        data32 = drc & ~(3 << 20);  /* clear ECC mode */
        drc |= (1 << 29);
        drc |= (3 << 30);
        data32 = drc & ~(3 << 20);  /* clear ECC mode */

-       pci_write_config32(ctrl->f0, DRC, data32);      
+       pci_write_config32(ctrl->f0, DRC, data32);

 
        /* Set the ECC mode */
 
        /* Set the ECC mode */

-       pci_write_config32(ctrl->f0, DRC, drc); 
+       pci_write_config32(ctrl->f0, DRC, drc);

 
        /* The memory is now set up--use it */
        cache_lbmem(MTRR_TYPE_WRBACK);
 
        /* The memory is now set up--use it */
        cache_lbmem(MTRR_TYPE_WRBACK);

diff --git a/src/northbridge/intel/i440bx/Kconfig b/src/northbridge/intel/i440bx/Kconfig
index 4de84d34722555b588899ee322de6f12b52aa2b9..99f043f778eb595d4186475425683ae859bb5848 100644 (file)
--- a/src/northbridge/intel/i440bx/Kconfig
+++ b/src/northbridge/intel/i440bx/Kconfig
@@ -30,7 +30,7 @@ config SDRAMPWR_4DIMM
          This option affects how the SDRAMC register is programmed.
          Memory clock signals will not be routed properly if this option
          is set wrong.
          This option affects how the SDRAMC register is programmed.
          Memory clock signals will not be routed properly if this option
          is set wrong.

-       
+

          If your board has 4 DIMM slots, you must use select this option, in
          your Kconfig file of the board. On boards with 3 DIMM slots,
          do _not_ select this option.
          If your board has 4 DIMM slots, you must use select this option, in
          your Kconfig file of the board. On boards with 3 DIMM slots,
          do _not_ select this option.

diff --git a/src/northbridge/intel/i440bx/debug.c b/src/northbridge/intel/i440bx/debug.c
index b43775521319b50911d162ce46959709955686e0..34f4fd4fed611cfeb231a9447f0049249db341ce 100644 (file)
--- a/src/northbridge/intel/i440bx/debug.c
+++ b/src/northbridge/intel/i440bx/debug.c
@@ -8,8 +8,8 @@ static void dump_spd_registers(void)
                device = DIMM_SPD_BASE + i;
                if (device) {
                        int j;
                device = DIMM_SPD_BASE + i;
                if (device) {
                        int j;

-                       print_debug("dimm: "); 
-                       print_debug_hex8(i); 
+                       print_debug("dimm: ");
+                       print_debug_hex8(i);

                        print_debug(".0: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {
                        print_debug(".0: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {

diff --git a/src/northbridge/intel/i440bx/i440bx.h b/src/northbridge/intel/i440bx/i440bx.h
index 97311c5fdf23af911f622fea1a6760a77c2499d2..2edbe8ba3f7bb6c4fbd9bb508d0730e34f7a0f26 100644 (file)
--- a/src/northbridge/intel/i440bx/i440bx.h
+++ b/src/northbridge/intel/i440bx/i440bx.h
@@ -72,10 +72,10 @@
 #define AGPCTRL 0xb0 /* AGP Control Register (0x00000000) */
 #define APSIZE  0xb4 /* Aperture Size Control Register (0x00) */
 #define ATTBASE 0xb8 /* Aperture Translation Table (0x00000000) */
 #define AGPCTRL 0xb0 /* AGP Control Register (0x00000000) */
 #define APSIZE  0xb4 /* Aperture Size Control Register (0x00) */
 #define ATTBASE 0xb8 /* Aperture Translation Table (0x00000000) */

- 
+

 #define MBFS    0xca /* Memory Buffer Frequency Select (0x000000). */
 #define BSPAD   0xd0 /* BIOS Scratch Pad (0x000..000). */
 #define MBFS    0xca /* Memory Buffer Frequency Select (0x000000). */
 #define BSPAD   0xd0 /* BIOS Scratch Pad (0x000..000). */

-#define BSPAD0  0xd0 /* These are free for our use. */ 
+#define BSPAD0  0xd0 /* These are free for our use. */

 #define BSPAD1  0xd1
 #define BSPAD2  0xd2
 #define BSPAD3  0xd3
 #define BSPAD1  0xd1
 #define BSPAD2  0xd2
 #define BSPAD3  0xd3

diff --git a/src/northbridge/intel/i440lx/Makefile.inc b/src/northbridge/intel/i440lx/Makefile.inc
index f4ef7d49c274fbe2c21018f7efe9aec8fb8f66a1..c6b480940f681dcfc4a0da7ace60202812ada08f 100644 (file)
--- a/src/northbridge/intel/i440lx/Makefile.inc
+++ b/src/northbridge/intel/i440lx/Makefile.inc
@@ -18,5 +18,5 @@
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 ##
 
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 ##
 

-driver-y += northbridge.o 
+driver-y += northbridge.o

 
 

diff --git a/src/northbridge/intel/i440lx/northbridge.c b/src/northbridge/intel/i440lx/northbridge.c
index ebe38afd51b71a9b015e17c8377dec26f28f2d4d..7ebc002c721c2ea9fb9ca477e58e4aab0735555e 100644 (file)
--- a/src/northbridge/intel/i440lx/northbridge.c
+++ b/src/northbridge/intel/i440lx/northbridge.c
@@ -33,7 +33,7 @@
 #include "northbridge.h"
 #include "i440lx.h"
 
 #include "northbridge.h"
 #include "i440lx.h"
 

-/* This code is mostly same as 440BX created by Uwe Hermann, 
+/* This code is mostly same as 440BX created by Uwe Hermann,

  * i done only very minor changes like renamed functions to 440lx etc
  * Maciej
  */
  * i done only very minor changes like renamed functions to 440lx etc
  * Maciej
  */

diff --git a/src/northbridge/intel/i440lx/raminit.c b/src/northbridge/intel/i440lx/raminit.c
index 61ddde98ca5d089c886cf48dfcf735d0b5c4fdc8..d8cebb28081b1d86be2ac5a2293e34677a55fc59 100644 (file)
--- a/src/northbridge/intel/i440lx/raminit.c
+++ b/src/northbridge/intel/i440lx/raminit.c
@@ -61,14 +61,14 @@ static const long register_values[] = {
        //  0x04 == bit 10
        // BASE is 0x8A but we dont want bit 9 or 10 have ENABLED so 0x8C
        PACCFG + 1, 0x38, 0x8c,
        //  0x04 == bit 10
        // BASE is 0x8A but we dont want bit 9 or 10 have ENABLED so 0x8C
        PACCFG + 1, 0x38, 0x8c,

-       
+

        DBC, 0x00, 0xC3,
 
        DRT,   0x00, 0xFF,
        DRT+1, 0x00, 0xFF,
 
        DRAMC, 0x00, 0x00, /* disable refresh for now. */
        DBC, 0x00, 0xC3,
 
        DRT,   0x00, 0xFF,
        DRT+1, 0x00, 0xFF,
 
        DRAMC, 0x00, 0x00, /* disable refresh for now. */

-       DRAMT, 0x00, 0x00, 
+       DRAMT, 0x00, 0x00,

 
        PAM0, 0x00, 0x30, // everything is a mem
        PAM1, 0x00, 0x33,
 
        PAM0, 0x00, 0x30, // everything is a mem
        PAM1, 0x00, 0x33,


@@ -109,7 +109,7 @@ static void do_ram_command(u32 command)
        u32 addr, addr_offset;
 
        /* Configure the RAM command. */
        u32 addr, addr_offset;
 
        /* Configure the RAM command. */

-       reg16 = pci_read_config16(NB, DRAMXC); 
+       reg16 = pci_read_config16(NB, DRAMXC);

        reg16 &= 0xff1f;                /* Clear bits 7-5. */
        reg16 |= (u16) (command << 5);  /* Write command into bits 7-5. */
        pci_write_config16(NB, DRAMXC, reg16);
        reg16 &= 0xff1f;                /* Clear bits 7-5. */
        reg16 |= (u16) (command << 5);  /* Write command into bits 7-5. */
        pci_write_config16(NB, DRAMXC, reg16);


@@ -127,7 +127,7 @@ static void do_ram_command(u32 command)
                 addr_offset = 0;
                 caslatency = 3; /* TODO: Dynamically get CAS latency later. */
 
                 addr_offset = 0;
                 caslatency = 3; /* TODO: Dynamically get CAS latency later. */
 

-               /* before translation it is 
+               /* before translation it is

                 *
                 * M[02:00] Burst Length
                 * M[03:03] Burst Type
                 *
                 * M[02:00] Burst Length
                 * M[03:03] Burst Type


@@ -153,7 +153,7 @@ static void do_ram_command(u32 command)
                 * must be left shifted by 3
                 * so possible formula is (caslatency <<4)|(burst_type << 1)|(burst length)
                 * then << 3 shift to compensate shift in Memory Controller
                 * must be left shifted by 3
                 * so possible formula is (caslatency <<4)|(burst_type << 1)|(burst length)
                 * then << 3 shift to compensate shift in Memory Controller

-                */ 
+                */

                if (command == RAM_COMMAND_MRS) {
                        if (caslatency == 3)
                                addr_offset = 0x1d0;
                if (command == RAM_COMMAND_MRS) {
                        if (caslatency == 3)
                                addr_offset = 0x1d0;


@@ -194,7 +194,7 @@ static void spd_enable_refresh(void)
        /* this chipset offer only two choices regarding refresh
         * refresh disabled, or refresh normal
         */
        /* this chipset offer only two choices regarding refresh
         * refresh disabled, or refresh normal
         */

-       
+

        pci_write_config8(NB, DRAMC, reg | 0x01);
        reg = pci_read_config8(NB, DRAMC);
 
        pci_write_config8(NB, DRAMC, reg | 0x01);
        reg = pci_read_config8(NB, DRAMC);
 


@@ -216,10 +216,10 @@ static void northbridge_init(void)
        pci_write_config32(NB, APBASE, reg32);
 
        #ifdef DEBUG_RAM_SETUP
        pci_write_config32(NB, APBASE, reg32);
 
        #ifdef DEBUG_RAM_SETUP

-       /* 
-        * apbase dont get set still, no idea what i have doing wrong yet, 
+       /*
+        * apbase dont get set still, no idea what i have doing wrong yet,

         * i am almost sure that somehow i set it by mistake once, but can't
         * i am almost sure that somehow i set it by mistake once, but can't

-        * repeat that. 
+        * repeat that.

         */
        reg32 = pci_read_config32(NB, APBASE);
        PRINT_DEBUG("APBASE ");
         */
        reg32 = pci_read_config32(NB, APBASE);
        PRINT_DEBUG("APBASE ");


@@ -238,11 +238,11 @@ static void sdram_set_registers(void)
        int i, max;
 
        /* nice banner with FSB shown? do we have
        int i, max;
 
        /* nice banner with FSB shown? do we have

-        * any standart policy about such things? 
+        * any standart policy about such things?

         */
 #if 0
        uint16_t reg16;
         */
 #if 0
        uint16_t reg16;

-       reg16 = pci_read_config16(NB, PACCFG); 
+       reg16 = pci_read_config16(NB, PACCFG);

        printk(BIOS_DEBUG, "i82443LX Host Freq: 6%C MHz\n", (reg16 & 0x4000) ? '0' : '6');
 #endif
 
        printk(BIOS_DEBUG, "i82443LX Host Freq: 6%C MHz\n", (reg16 & 0x4000) ? '0' : '6');
 #endif
 


@@ -261,8 +261,8 @@ static void sdram_set_registers(void)
                reg |= register_values[i + 2] & ~(register_values[i + 1]);
                pci_write_config8(NB, register_values[i], reg);
 
                reg |= register_values[i + 2] & ~(register_values[i + 1]);
                pci_write_config8(NB, register_values[i], reg);
 

-               /* 
-                * i am not sure if that is needed, but was usefull 
+               /*
+                * i am not sure if that is needed, but was usefull

                 * for me to confirm what got written
                 */
 #ifdef DEBUG_RAM_SETUP
                 * for me to confirm what got written
                 */
 #ifdef DEBUG_RAM_SETUP


@@ -282,7 +282,7 @@ static void sdram_set_registers(void)
 #endif
        }
 
 #endif
        }
 

-       PRINT_DEBUG("Northbridge atexit sdram set registers\n");        
+       PRINT_DEBUG("Northbridge atexit sdram set registers\n");

        DUMPNORTH();
 }
 
        DUMPNORTH();
 }
 


@@ -293,9 +293,9 @@ static void sdram_set_spd_registers(void)
        u16 memsize = 0;
 
        for (i = 0; i < DIMM_SOCKETS; i++) {
        u16 memsize = 0;
 
        for (i = 0; i < DIMM_SOCKETS; i++) {

-               uint16_t ds = 0; // dimm size 
+               uint16_t ds = 0; // dimm size

                int j;
                int j;

-               /* this code skips second bank on each socket (no idea how to fix it now) 
+               /* this code skips second bank on each socket (no idea how to fix it now)

                 */
 
                PRINT_DEBUG("DIMM");
                 */
 
                PRINT_DEBUG("DIMM");


@@ -321,8 +321,8 @@ static void sdram_set_spd_registers(void)
 
 
                /* This is more or less crude hack
 
 
                /* This is more or less crude hack

-                * allowing to run this target under qemu (even if that is not really 
-                * same hardware emulated), 
+                * allowing to run this target under qemu (even if that is not really
+                * same hardware emulated),

                 * probably some kconfig expert option should be added to enable/disable
                 * this nicelly
                 */
                 * probably some kconfig expert option should be added to enable/disable
                 * this nicelly
                 */


@@ -333,10 +333,10 @@ static void sdram_set_spd_registers(void)
 
 
                // todo: support for bank with not equal sizes as per jedec standart?
 
 
                // todo: support for bank with not equal sizes as per jedec standart?

-               
+

                /*
                 * because density is reported in units of 4Mbyte
                /*
                 * because density is reported in units of 4Mbyte

-                * and rows in device are just value, 
+                * and rows in device are just value,

                 * and for setting registers we need value in 8Mbyte units
                 */
 
                 * and for setting registers we need value in 8Mbyte units
                 */
 


@@ -348,7 +348,7 @@ static void sdram_set_spd_registers(void)
                pci_write_config8(NB, DRB + (2*i), memsize);
                pci_write_config8(NB, DRB + (2*i) + 1, memsize);
                if (ds > 0) {
                pci_write_config8(NB, DRB + (2*i), memsize);
                pci_write_config8(NB, DRB + (2*i) + 1, memsize);
                if (ds > 0) {

-                       /* i have no idea why pci_read_config16 not work for 
+                       /* i have no idea why pci_read_config16 not work for

                         * me correctly here
                         */
                        ds = pci_read_config8(NB, DRT+1);
                         * me correctly here
                         */
                        ds = pci_read_config8(NB, DRT+1);


@@ -364,9 +364,9 @@ static void sdram_set_spd_registers(void)
                        PRINT_DEBUG_HEX16(ds);
                        PRINT_DEBUG("\n");
 
                        PRINT_DEBUG_HEX16(ds);
                        PRINT_DEBUG("\n");
 

-                       /* 
+                       /*

                         * modify DRT register if current row isn't empty
                         * modify DRT register if current row isn't empty

-                        * code assume its SDRAM plugged (should check if its sdram or EDO, 
+                        * code assume its SDRAM plugged (should check if its sdram or EDO,

                         * edo would have 0x00 as constand instead 0x10 for SDRAM
                         * also this code is buggy because ignores second row of each dimm socket
                         */
                         * edo would have 0x00 as constand instead 0x10 for SDRAM
                         * also this code is buggy because ignores second row of each dimm socket
                         */


@@ -400,7 +400,7 @@ static void sdram_set_spd_registers(void)
        pci_write_config8(NB, DRAMC, 0x00);
 
        /* Cas latency 3, and other shouldbe properly from spd too */
        pci_write_config8(NB, DRAMC, 0x00);
 
        /* Cas latency 3, and other shouldbe properly from spd too */

-       pci_write_config8(NB, DRAMT, 0xAC); 
+       pci_write_config8(NB, DRAMT, 0xAC);

 
        /* TODO? */
        pci_write_config8(NB, PCI_LATENCY_TIMER, 0x40);
 
        /* TODO? */
        pci_write_config8(NB, PCI_LATENCY_TIMER, 0x40);

diff --git a/src/northbridge/intel/i82810/debug.c b/src/northbridge/intel/i82810/debug.c
index 87b039f5f5fc3396bf250081a6d48ca0906acc12..5bddbb60a329ebafec8955324bf7d882dfd8896c 100644 (file)
--- a/src/northbridge/intel/i82810/debug.c
+++ b/src/northbridge/intel/i82810/debug.c
@@ -8,8 +8,8 @@ static void dump_spd_registers(void)
                device = DIMM_SPD_BASE + i;
                if (device) {
                        int j;
                device = DIMM_SPD_BASE + i;
                if (device) {
                        int j;

-                       print_debug("dimm: "); 
-                       print_debug_hex8(i); 
+                       print_debug("dimm: ");
+                       print_debug_hex8(i);

                        print_debug(".0: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {
                        print_debug(".0: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {

diff --git a/src/northbridge/intel/i82810/raminit.c b/src/northbridge/intel/i82810/raminit.c
index fbb64f60880efb3d0989945781ea3728ccc541b6..81148e313dc055b9c05bcf9b3f17f7213507a46c 100644 (file)
--- a/src/northbridge/intel/i82810/raminit.c
+++ b/src/northbridge/intel/i82810/raminit.c
@@ -312,7 +312,7 @@ static void set_dram_buffer_strength(void)
                                        SPD_NUM_DIMM_BANKS) > 1;
                d1.ss = !d1.ds;
        }
                                        SPD_NUM_DIMM_BANKS) > 1;
                d1.ss = !d1.ds;
        }

-       
+

        buff_sc = 0;
 
        /* Tame the beast... */
        buff_sc = 0;
 
        /* Tame the beast... */


@@ -350,7 +350,7 @@ static void set_dram_buffer_strength(void)
                buff_sc |= 1 << 14;
        if (!d0.size && d1.size)
                buff_sc |= 1 << 15;
                buff_sc |= 1 << 14;
        if (!d0.size && d1.size)
                buff_sc |= 1 << 15;

-       
+

        print_debug("BUFF_SC calculated to 0x");
        print_debug_hex16(buff_sc);
        print_debug("\n");
        print_debug("BUFF_SC calculated to 0x");
        print_debug_hex16(buff_sc);
        print_debug("\n");


@@ -371,7 +371,7 @@ static void sdram_set_registers(void)
 
        /* Ideally, this should be R/W for as many ranges as possible. */
        pci_write_config8(PCI_DEV(0, 0, 0), PAMR, 0xff);
 
        /* Ideally, this should be R/W for as many ranges as possible. */
        pci_write_config8(PCI_DEV(0, 0, 0), PAMR, 0xff);

-       
+

        /* Set size for onboard-VGA framebuffer. */
        reg8 = pci_read_config8(PCI_DEV(0, 0, 0), SMRAM);
        reg8 &= 0x3f;                        /* Disable graphics (for now). */
        /* Set size for onboard-VGA framebuffer. */
        reg8 = pci_read_config8(PCI_DEV(0, 0, 0), SMRAM);
        reg8 &= 0x3f;                        /* Disable graphics (for now). */

diff --git a/src/northbridge/intel/i82810/raminit.h b/src/northbridge/intel/i82810/raminit.h
index 5a06dd171df3fbfc0ec9979fee6740bd9a17f6b3..8c558a5699196c479394f4c39893d373673a60ca 100644 (file)
--- a/src/northbridge/intel/i82810/raminit.h
+++ b/src/northbridge/intel/i82810/raminit.h
@@ -27,7 +27,7 @@
 /* DIMM0 is at 0x50, DIMM1 is at 0x51. */
 #define DIMM_SPD_BASE 0x50
 
 /* DIMM0 is at 0x50, DIMM1 is at 0x51. */
 #define DIMM_SPD_BASE 0x50
 

-/* The following table has been bumped over to this header to avoid clutter in 
+/* The following table has been bumped over to this header to avoid clutter in

  * raminit.c. It's used to translate the value read from SPD Byte 31 to a value
  * the northbridge can understand in DRP, aka Rx52[7:4], [3:0]. Where most
  * northbridges have some sort of simple calculation that can be done for this,
  * raminit.c. It's used to translate the value read from SPD Byte 31 to a value
  * the northbridge can understand in DRP, aka Rx52[7:4], [3:0]. Where most
  * northbridges have some sort of simple calculation that can be done for this,


@@ -38,7 +38,7 @@
 /* TODO: Find a better way of doing this. */
 
 static const uint8_t translate_spd_to_i82810[] = {
 /* TODO: Find a better way of doing this. */
 
 static const uint8_t translate_spd_to_i82810[] = {

-       /* Note: 4MB sizes are not supported, so dual-sided DIMMs with a 4MB 
+       /* Note: 4MB sizes are not supported, so dual-sided DIMMs with a 4MB

         * side can't be either, at least for now.
         */
        /* TODO: For above case, only use the other side if > 4MB, and get some
         * side can't be either, at least for now.
         */
        /* TODO: For above case, only use the other side if > 4MB, and get some

diff --git a/src/northbridge/intel/i82830/i82830_smihandler.c b/src/northbridge/intel/i82830/i82830_smihandler.c
index 515be54acc4bb194d5094f58d834040eb66e1f77..c9c7bcb27fc27fe946611bb0272234ad233ac18f 100644 (file)
--- a/src/northbridge/intel/i82830/i82830_smihandler.c
+++ b/src/northbridge/intel/i82830/i82830_smihandler.c
@@ -194,10 +194,10 @@ static void mbi_call(u8 subf, banner_id_t *banner_id)
                                i+=16;
                                continue;
                        }
                                i+=16;
                                continue;
                        }

-                       
+

                        mbi_header = (mbi_header_t *)&mbi[i];
                        len = ALIGN((mbi_header->size * 16) + sizeof(mbi_header) + mbi_header->name_len, 16);
                        mbi_header = (mbi_header_t *)&mbi[i];
                        len = ALIGN((mbi_header->size * 16) + sizeof(mbi_header) + mbi_header->name_len, 16);

-                       
+

                        if (obj_header->objnum == count) {
 #ifdef DEBUG_SMI_I82830
                                if (mbi_header->name_len == 0xff) {
                        if (obj_header->objnum == count) {
 #ifdef DEBUG_SMI_I82830
                                if (mbi_header->name_len == 0xff) {


@@ -224,7 +224,7 @@ static void mbi_call(u8 subf, banner_id_t *banner_id)
                        i += len;
                        count++;
                }
                        i += len;
                        count++;
                }

-               if (obj_header->banner.retsts == MSH_IF_NOT_FOUND) 
+               if (obj_header->banner.retsts == MSH_IF_NOT_FOUND)

                        printk(BIOS_DEBUG, "|     |- MBI object #%d not found.\n", obj_header->objnum);
                break;
        }
                        printk(BIOS_DEBUG, "|     |- MBI object #%d not found.\n", obj_header->objnum);
                break;
        }


@@ -251,10 +251,10 @@ static void mbi_call(u8 subf, banner_id_t *banner_id)
                                i+=16;
                                continue;
                        }
                                i+=16;
                                continue;
                        }

-                       
+

                        mbi_header = (mbi_header_t *)&mbi[i];
                        len = ALIGN((mbi_header->size * 16) + sizeof(mbi_header) + mbi_header->name_len, 16);
                        mbi_header = (mbi_header_t *)&mbi[i];
                        len = ALIGN((mbi_header->size * 16) + sizeof(mbi_header) + mbi_header->name_len, 16);

-                       
+

                        if (getobj->objnum == count) {
                                printk(BIOS_DEBUG, "|  |- len = %x\n", len);
                                memcpy((void *)(getobj->buffer + OBJ_OFFSET),
                        if (getobj->objnum == count) {
                                printk(BIOS_DEBUG, "|  |- len = %x\n", len);
                                memcpy((void *)(getobj->buffer + OBJ_OFFSET),


@@ -270,7 +270,7 @@ static void mbi_call(u8 subf, banner_id_t *banner_id)
                        i += len;
                        count++;
                }
                        i += len;
                        count++;
                }

-               if (getobj->banner.retsts == MSH_IF_NOT_FOUND) 
+               if (getobj->banner.retsts == MSH_IF_NOT_FOUND)

                        printk(BIOS_DEBUG, "MBI module %d not found.\n", getobj->objnum);
                break;
        }
                        printk(BIOS_DEBUG, "MBI module %d not found.\n", getobj->objnum);
                break;
        }

diff --git a/src/northbridge/intel/i82830/vga.c b/src/northbridge/intel/i82830/vga.c
index 66b591b548f848399a7d728b2d7e50c133f16df0..21c677960ec64c2ea8257324f83224b1427ec3cb 100644 (file)
--- a/src/northbridge/intel/i82830/vga.c
+++ b/src/northbridge/intel/i82830/vga.c
@@ -68,7 +68,7 @@ static void vga_init(device_t dev)
 #define PIPE_A_TV      (1 << 3)
 #define PIPE_B_CRT     (1 << 8)
 #define PIPE_B_TV      (1 << 10)
 #define PIPE_A_TV      (1 << 3)
 #define PIPE_B_CRT     (1 << 8)
 #define PIPE_B_TV      (1 << 10)

-       printk(BIOS_DEBUG, "Enabling TV-Out\n"); 
+       printk(BIOS_DEBUG, "Enabling TV-Out\n");

        void runInt10(void);
        M.x86.R_AX = 0x5f64;
        M.x86.R_BX = 0x0001; // Set Display Device, force execution
        void runInt10(void);
        M.x86.R_AX = 0x5f64;
        M.x86.R_BX = 0x0001; // Set Display Device, force execution

diff --git a/src/northbridge/intel/i855/debug.c b/src/northbridge/intel/i855/debug.c
index c353776c12298ad4f49d48b181585beb929fe724..2f7d5342a1b7bb0bc4a6578746afe18c76d58ebc 100644 (file)
--- a/src/northbridge/intel/i855/debug.c
+++ b/src/northbridge/intel/i855/debug.c
@@ -31,8 +31,8 @@ static void print_debug_pci_dev(unsigned dev)
 static inline void print_pci_devices(void)
 {
        device_t dev;
 static inline void print_pci_devices(void)
 {
        device_t dev;

-       for(dev = PCI_DEV(0, 0, 0); 
-               dev <= PCI_DEV(0, 0x1f, 0x7); 
+       for(dev = PCI_DEV(0, 0, 0);
+               dev <= PCI_DEV(0, 0x1f, 0x7);

                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);
                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);


@@ -51,7 +51,7 @@ static void dump_pci_device(unsigned dev)
        int i;
        print_debug_pci_dev(dev);
        print_debug("\n");
        int i;
        print_debug_pci_dev(dev);
        print_debug("\n");

-       
+

        for(i = 0; i <= 255; i++) {
                unsigned char val;
                if ((i & 0x0f) == 0) {
        for(i = 0; i <= 255; i++) {
                unsigned char val;
                if ((i & 0x0f) == 0) {


@@ -70,8 +70,8 @@ static void dump_pci_device(unsigned dev)
 static inline void dump_pci_devices(void)
 {
        device_t dev;
 static inline void dump_pci_devices(void)
 {
        device_t dev;

-       for(dev = PCI_DEV(0, 0, 0); 
-               dev <= PCI_DEV(0, 0x1f, 0x7); 
+       for(dev = PCI_DEV(0, 0, 0);
+               dev <= PCI_DEV(0, 0x1f, 0x7);

                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);
                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);


@@ -93,8 +93,8 @@ static inline void dump_spd_registers(const struct mem_controller *ctrl)
                device = ctrl->channel0[i];
                if (device) {
                        int j;
                device = ctrl->channel0[i];
                if (device) {
                        int j;

-                       print_debug("dimm: "); 
-                       print_debug_hex8(i); 
+                       print_debug("dimm: ");
+                       print_debug_hex8(i);

                        print_debug(".0: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {
                        print_debug(".0: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {


@@ -130,7 +130,7 @@ static inline void dump_smbus_registers(void)
                 print_debug("smbus: ");
                 print_debug_hex8(device);
                 for(j = 0; j < 256; j++) {
                 print_debug("smbus: ");
                 print_debug_hex8(device);
                 for(j = 0; j < 256; j++) {

-                       int status; 
+                       int status;

                         unsigned char byte;
                         if ((j & 0xf) == 0) {
                                print_debug("\n");
                         unsigned char byte;
                         if ((j & 0xf) == 0) {
                                print_debug("\n");


@@ -147,5 +147,5 @@ static inline void dump_smbus_registers(void)
                         print_debug_char(' ');
                 }
                 print_debug("\n");
                         print_debug_char(' ');
                 }
                 print_debug("\n");

-       }       
+       }

 }
 }

diff --git a/src/northbridge/intel/i855/northbridge.c b/src/northbridge/intel/i855/northbridge.c
index 03bf3a93b60fdb5bf4177ac0b1aec8b56fbdeca6..3495fb6cfbe0ba038c2b7477df30a7f0f70fa3a3 100644 (file)
--- a/src/northbridge/intel/i855/northbridge.c
+++ b/src/northbridge/intel/i855/northbridge.c
@@ -79,15 +79,15 @@ static void pci_domain_set_resources(device_t dev)
 {
        device_t mc_dev;
         uint32_t pci_tolm;
 {
        device_t mc_dev;
         uint32_t pci_tolm;

-        
+

         printk(BIOS_DEBUG, "Entered with dev vid = %x\n", dev->vendor);
        printk(BIOS_DEBUG, "Entered with dev did = %x\n", dev->device);
 
         printk(BIOS_DEBUG, "Entered with dev vid = %x\n", dev->vendor);
        printk(BIOS_DEBUG, "Entered with dev did = %x\n", dev->device);
 

-        pci_tolm = find_pci_tolm(&dev->link[0]);       
+        pci_tolm = find_pci_tolm(&dev->link[0]);

        mc_dev = dev->link[0].children->sibling;
        printk(BIOS_DEBUG, "MC dev vendor = %x\n", mc_dev->vendor);
        printk(BIOS_DEBUG, "MC dev device = %x\n", mc_dev->device);
        mc_dev = dev->link[0].children->sibling;
        printk(BIOS_DEBUG, "MC dev vendor = %x\n", mc_dev->vendor);
        printk(BIOS_DEBUG, "MC dev device = %x\n", mc_dev->device);

-       
+

        if (mc_dev) {
                /* Figure out which areas are/should be occupied by RAM.
                 * This is all computed in kilobytes and converted to/from
        if (mc_dev) {
                /* Figure out which areas are/should be occupied by RAM.
                 * This is all computed in kilobytes and converted to/from


@@ -117,7 +117,7 @@ static void pci_domain_set_resources(device_t dev)
                /* Write the ram configuration registers,
                 * preserving the reserved bits.
                 */
                /* Write the ram configuration registers,
                 * preserving the reserved bits.
                 */

-                
+

                /* Report the memory regions */
                printk(BIOS_DEBUG, "tomk = %ld\n", tomk);
                printk(BIOS_DEBUG, "tolmk = %ld\n", tolmk);
                /* Report the memory regions */
                printk(BIOS_DEBUG, "tomk = %ld\n", tomk);
                printk(BIOS_DEBUG, "tolmk = %ld\n", tolmk);


@@ -143,7 +143,7 @@ static struct device_operations pci_domain_ops = {
         .enable_resources = enable_childrens_resources,
         .init             = 0,
         .scan_bus         = pci_domain_scan_bus,
         .enable_resources = enable_childrens_resources,
         .init             = 0,
         .scan_bus         = pci_domain_scan_bus,

-};  
+};

 
 static void cpu_bus_init(device_t dev)
 {
 
 static void cpu_bus_init(device_t dev)
 {

diff --git a/src/northbridge/intel/i855/raminit.c b/src/northbridge/intel/i855/raminit.c
index 5d71a27ca17ab392b38b62a904fb5ba5e9843792..386eda10bb18c3520034137cf3baa1ac9d193245 100644 (file)
--- a/src/northbridge/intel/i855/raminit.c
+++ b/src/northbridge/intel/i855/raminit.c
@@ -17,7 +17,7 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */

- 
+

 #include <sdram_mode.h>
 #include <delay.h>
 
 #include <sdram_mode.h>
 #include <delay.h>
 


@@ -28,7 +28,7 @@
   * Set only what I need until it works, then make it figure things out on boot
   * assumes only one dimm is populated
   */
   * Set only what I need until it works, then make it figure things out on boot
   * assumes only one dimm is populated
   */

- 
+

 static void sdram_set_registers(const struct mem_controller *ctrl)
 {
        /*
 static void sdram_set_registers(const struct mem_controller *ctrl)
 {
        /*


@@ -40,7 +40,7 @@ static void sdram_set_registers(const struct mem_controller *ctrl)
 static void spd_set_row_attributes(const struct mem_controller *ctrl)
 {
        uint16_t dra_reg;
 static void spd_set_row_attributes(const struct mem_controller *ctrl)
 {
        uint16_t dra_reg;

-       
+

        dra_reg = 0x7733;
        pci_write_config16(ctrl->d0, 0x50, dra_reg);
 }
        dra_reg = 0x7733;
        pci_write_config16(ctrl->d0, 0x50, dra_reg);
 }


@@ -48,7 +48,7 @@ static void spd_set_row_attributes(const struct mem_controller *ctrl)
 static void spd_set_dram_controller_mode(const struct mem_controller *ctrl)
 {
        uint32_t drc_reg;
 static void spd_set_dram_controller_mode(const struct mem_controller *ctrl)
 {
        uint32_t drc_reg;

-       
+

        /* drc_reg = 0x00009101; */
        drc_reg = 0x00009901;
        pci_write_config32(ctrl->d0, 0x70, drc_reg);
        /* drc_reg = 0x00009101; */
        drc_reg = 0x00009901;
        pci_write_config32(ctrl->d0, 0x70, drc_reg);


@@ -57,7 +57,7 @@ static void spd_set_dram_controller_mode(const struct mem_controller *ctrl)
 static void spd_set_dram_timing(const struct mem_controller *ctrl)
 {
        uint32_t drt_reg;
 static void spd_set_dram_timing(const struct mem_controller *ctrl)
 {
        uint32_t drt_reg;

-       
+

        drt_reg = 0x2a004405;
        pci_write_config32(ctrl->d0, 0x60, drt_reg);
 }
        drt_reg = 0x2a004405;
        pci_write_config32(ctrl->d0, 0x60, drt_reg);
 }


@@ -73,7 +73,7 @@ static void spd_set_dram_size(const struct mem_controller *ctrl)
 static void spd_set_dram_pwr_management(const struct mem_controller *ctrl)
 {
        uint32_t pwrmg_reg;
 static void spd_set_dram_pwr_management(const struct mem_controller *ctrl)
 {
        uint32_t pwrmg_reg;

-       
+

        pwrmg_reg = 0x10f10430;
        pci_write_config32(ctrl->d0, 0x68, pwrmg_reg);
 }
        pwrmg_reg = 0x10f10430;
        pci_write_config32(ctrl->d0, 0x68, pwrmg_reg);
 }


@@ -97,31 +97,31 @@ static void spd_set_undocumented_registers(const struct mem_controller *ctrl)
        pci_write_config32(PCI_DEV(0, 0, 0), 0x2c, 0x35808086);
        pci_write_config32(PCI_DEV(0, 0, 0), 0x48, 0xfec10000);
        pci_write_config32(PCI_DEV(0, 0, 0), 0x50, 0x00440100);
        pci_write_config32(PCI_DEV(0, 0, 0), 0x2c, 0x35808086);
        pci_write_config32(PCI_DEV(0, 0, 0), 0x48, 0xfec10000);
        pci_write_config32(PCI_DEV(0, 0, 0), 0x50, 0x00440100);

-       
+

        pci_write_config32(PCI_DEV(0, 0, 0), 0x58, 0x11111000);
        pci_write_config32(PCI_DEV(0, 0, 0), 0x58, 0x11111000);

-       
+

        pci_write_config16(PCI_DEV(0, 0, 0), 0x52, 0x0002);
        */
        pci_write_config16(PCI_DEV(0, 0, 0), 0x52, 0x0044);
        /*
        pci_write_config16(PCI_DEV(0, 0, 0), 0x52, 0x0000);
        */
        pci_write_config16(PCI_DEV(0, 0, 0), 0x52, 0x0002);
        */
        pci_write_config16(PCI_DEV(0, 0, 0), 0x52, 0x0044);
        /*
        pci_write_config16(PCI_DEV(0, 0, 0), 0x52, 0x0000);
        */

-       pci_write_config32(PCI_DEV(0, 0, 0), 0x58, 0x33333000); 
+       pci_write_config32(PCI_DEV(0, 0, 0), 0x58, 0x33333000);

        pci_write_config32(PCI_DEV(0, 0, 0), 0x5c, 0x33333333);
        /*
        pci_write_config32(PCI_DEV(0, 0, 0), 0x60, 0x0000390a);
        pci_write_config32(PCI_DEV(0, 0, 0), 0x74, 0x02006056);
        pci_write_config32(PCI_DEV(0, 0, 0), 0x78, 0x00800001);
        */
        pci_write_config32(PCI_DEV(0, 0, 0), 0x5c, 0x33333333);
        /*
        pci_write_config32(PCI_DEV(0, 0, 0), 0x60, 0x0000390a);
        pci_write_config32(PCI_DEV(0, 0, 0), 0x74, 0x02006056);
        pci_write_config32(PCI_DEV(0, 0, 0), 0x78, 0x00800001);
        */

-       pci_write_config32(PCI_DEV(0, 0, 0), 0xa8, 0x00000001); 
-       
+       pci_write_config32(PCI_DEV(0, 0, 0), 0xa8, 0x00000001);
+

        pci_write_config32(PCI_DEV(0, 0, 0), 0xbc, 0x00001020);
        /*
        pci_write_config32(PCI_DEV(0, 0, 0), 0xfc, 0x00000109);
        */
 
        /* 0:0.1 */
        pci_write_config32(PCI_DEV(0, 0, 0), 0xbc, 0x00001020);
        /*
        pci_write_config32(PCI_DEV(0, 0, 0), 0xfc, 0x00000109);
        */
 
        /* 0:0.1 */

-       pci_write_config32(ctrl->d0, 0x74, 0x00000001); 
+       pci_write_config32(ctrl->d0, 0x74, 0x00000001);

        pci_write_config32(ctrl->d0, 0x78, 0x001fe974);
        pci_write_config32(ctrl->d0, 0x80, 0x00af0039);
        pci_write_config32(ctrl->d0, 0x84, 0x0000033c);
        pci_write_config32(ctrl->d0, 0x78, 0x001fe974);
        pci_write_config32(ctrl->d0, 0x80, 0x00af0039);
        pci_write_config32(ctrl->d0, 0x84, 0x0000033c);


@@ -133,7 +133,7 @@ static void spd_set_undocumented_registers(const struct mem_controller *ctrl)
        pci_write_config32(ctrl->d0, 0xb8, 0x000055d4);
        pci_write_config32(ctrl->d0, 0xbc, 0x024acd38);
        pci_write_config32(ctrl->d0, 0xc0, 0x00000003);
        pci_write_config32(ctrl->d0, 0xb8, 0x000055d4);
        pci_write_config32(ctrl->d0, 0xbc, 0x024acd38);
        pci_write_config32(ctrl->d0, 0xc0, 0x00000003);

-       
+

        /* 0:0.3 */
        /*
        pci_write_config32(PCI_DEV(0, 0, 3), 0x2c, 0x35858086);
        /* 0:0.3 */
        /*
        pci_write_config32(PCI_DEV(0, 0, 3), 0x2c, 0x35858086);


@@ -147,12 +147,12 @@ static void spd_set_undocumented_registers(const struct mem_controller *ctrl)
        pci_write_config32(PCI_DEV(0, 0, 3), 0x7c, 0x0284007f);
        pci_write_config32(PCI_DEV(0, 0, 3), 0x84, 0x000000ef);
        */
        pci_write_config32(PCI_DEV(0, 0, 3), 0x7c, 0x0284007f);
        pci_write_config32(PCI_DEV(0, 0, 3), 0x84, 0x000000ef);
        */

-       
+

        /*
        pci_write_config16(PCI_DEV(0, 0, 3), 0xc0, 0x0200);
        pci_write_config16(PCI_DEV(0, 0, 3), 0xc0, 0x0400);
        */
        /*
        pci_write_config16(PCI_DEV(0, 0, 3), 0xc0, 0x0200);
        pci_write_config16(PCI_DEV(0, 0, 3), 0xc0, 0x0400);
        */

-       
+

        /*
        pci_write_config32(PCI_DEV(0, 0, 3), 0xc4, 0x00000000);
        pci_write_config32(PCI_DEV(0, 0, 3), 0xd8, 0xff00c308);
        /*
        pci_write_config32(PCI_DEV(0, 0, 3), 0xc4, 0x00000000);
        pci_write_config32(PCI_DEV(0, 0, 3), 0xd8, 0xff00c308);


@@ -180,7 +180,7 @@ static void ram_command(const struct mem_controller *ctrl,
                        uint32_t addr)
 {
        uint32_t drc_reg;
                        uint32_t addr)
 {
        uint32_t drc_reg;

-       
+

        drc_reg = pci_read_config32(ctrl->d0, 0x70);
        drc_reg &= ~(7 << 4);
        drc_reg |= (command << 4);
        drc_reg = pci_read_config32(ctrl->d0, 0x70);
        drc_reg &= ~(7 << 4);
        drc_reg |= (command << 4);


@@ -195,12 +195,12 @@ static void ram_command_mrs(const struct mem_controller *ctrl,
 {
        uint32_t drc_reg;
        uint32_t adjusted_mode;
 {
        uint32_t drc_reg;
        uint32_t adjusted_mode;

-       
+

        drc_reg = pci_read_config32(ctrl->d0, 0x70);
        drc_reg &= ~(7 << 4);
        drc_reg |= (command << 4);
        pci_write_config8(ctrl->d0, 0x70, drc_reg);
        drc_reg = pci_read_config32(ctrl->d0, 0x70);
        drc_reg &= ~(7 << 4);
        drc_reg |= (command << 4);
        pci_write_config8(ctrl->d0, 0x70, drc_reg);

-       /* Host address lines [13:3] map to DIMM address lines [11, 9:0] */     
+       /* Host address lines [13:3] map to DIMM address lines [11, 9:0] */

        adjusted_mode = ((mode & 0x800) << (13 - 11)) | ((mode & 0x3ff) << (12 - 9));
        print_debug("Setting mode: ");
        print_debug_hex32(adjusted_mode + addr);
        adjusted_mode = ((mode & 0x800) << (13 - 11)) | ((mode & 0x3ff) << (12 - 9));
        print_debug("Setting mode: ");
        print_debug_hex32(adjusted_mode + addr);


@@ -211,7 +211,7 @@ static void ram_command_mrs(const struct mem_controller *ctrl,
 static void set_initialize_complete(const struct mem_controller *ctrl)
 {
        uint32_t drc_reg;
 static void set_initialize_complete(const struct mem_controller *ctrl)
 {
        uint32_t drc_reg;

-       
+

        drc_reg = pci_read_config32(ctrl->d0, 0x70);
        drc_reg |= (1 << 29);
        pci_write_config32(ctrl->d0, 0x70, drc_reg);
        drc_reg = pci_read_config32(ctrl->d0, 0x70);
        drc_reg |= (1 << 29);
        pci_write_config32(ctrl->d0, 0x70, drc_reg);


@@ -224,7 +224,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
        print_debug("Ram enable 1\n");
        delay();
        delay();
        print_debug("Ram enable 1\n");
        delay();
        delay();

-       
+

        print_debug("Ram enable 2\n");
        ram_command(ctrl, 1, 0);
        ram_command(ctrl, 1, rank1);
        print_debug("Ram enable 2\n");
        ram_command(ctrl, 1, 0);
        ram_command(ctrl, 1, rank1);


@@ -242,17 +242,17 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
        ram_command_mrs(ctrl, 4, SDRAM_EXTMODE_DLL_ENABLE, rank1);
        delay();
        delay();
        ram_command_mrs(ctrl, 4, SDRAM_EXTMODE_DLL_ENABLE, rank1);
        delay();
        delay();

-       
+

        print_debug("Ram enable 5\n");
        ram_command_mrs(ctrl, 3, VG85X_MODE | SDRAM_MODE_DLL_RESET, 0);
        ram_command_mrs(ctrl, 3, VG85X_MODE | SDRAM_MODE_DLL_RESET, rank1);
        print_debug("Ram enable 5\n");
        ram_command_mrs(ctrl, 3, VG85X_MODE | SDRAM_MODE_DLL_RESET, 0);
        ram_command_mrs(ctrl, 3, VG85X_MODE | SDRAM_MODE_DLL_RESET, rank1);

-       
+

        print_debug("Ram enable 6\n");
        ram_command(ctrl, 2, 0);
        ram_command(ctrl, 2, rank1);
        delay();
        delay();
        print_debug("Ram enable 6\n");
        ram_command(ctrl, 2, 0);
        ram_command(ctrl, 2, rank1);
        delay();
        delay();

-       
+

        print_debug("Ram enable 7\n");
        for(i = 0; i < 8; i++) {
                ram_command(ctrl, 6, 0);
        print_debug("Ram enable 7\n");
        for(i = 0; i < 8; i++) {
                ram_command(ctrl, 6, 0);


@@ -270,19 +270,19 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
        ram_command(ctrl, 7, rank1);
        delay();
        delay();
        ram_command(ctrl, 7, rank1);
        delay();
        delay();

-       
+

        print_debug("Ram enable 9\n");
        set_initialize_complete(ctrl);
        print_debug("Ram enable 9\n");
        set_initialize_complete(ctrl);

-       
+

        delay();
        delay();
        delay();
        delay();
        delay();
        delay();

-       
+

        print_debug("After configuration:\n");
        /* dump_pci_devices(); */
        print_debug("After configuration:\n");
        /* dump_pci_devices(); */

-       
+

        /*
        /*

-       print_debug("\n\n***** RAM TEST *****\n");      
+       print_debug("\n\n***** RAM TEST *****\n");

        ram_check(0, 0xa0000);
        ram_check(0x100000, 0x40000000);
        */
        ram_check(0, 0xa0000);
        ram_check(0x100000, 0x40000000);
        */

diff --git a/src/northbridge/intel/i855/reset_test.c b/src/northbridge/intel/i855/reset_test.c
index b48b4a3764c6682207ad7ad48d759cdb7f617401..40f2f8997309cf7415b5ff90127a88ce6c429ae1 100644 (file)
--- a/src/northbridge/intel/i855/reset_test.c
+++ b/src/northbridge/intel/i855/reset_test.c
@@ -28,12 +28,12 @@
 static int bios_reset_detected(void)
 {
        uint32_t dword;
 static int bios_reset_detected(void)
 {
        uint32_t dword;

-       
+

        dword = pci_read_config32(PCI_DEV(0, 0, 0), MCH_DRC);
        dword = pci_read_config32(PCI_DEV(0, 0, 0), MCH_DRC);

-       
+

        if( (dword & DRC_DONE) != 0 ) {
                return 1;
        if( (dword & DRC_DONE) != 0 ) {
                return 1;

-       } 
-       
+       }
+

        return 0;
 }
        return 0;
 }

diff --git a/src/northbridge/intel/i945/debug.c b/src/northbridge/intel/i945/debug.c
index 6002a76876f975a31a78f3b2932e82263010019b..dd095ca7b37f1c6a896fcff96b5422355837bde6 100644 (file)
--- a/src/northbridge/intel/i945/debug.c
+++ b/src/northbridge/intel/i945/debug.c
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
 /*
  * This file is part of the coreboot project.

- * 
+ *

  * Copyright (C) 2007-2008 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or
  * Copyright (C) 2007-2008 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or


@@ -26,8 +26,8 @@
 static inline void print_pci_devices(void)
 {
        device_t dev;
 static inline void print_pci_devices(void)
 {
        device_t dev;

-       for(dev = PCI_DEV(0, 0, 0); 
-               dev <= PCI_DEV(0, 0x1f, 0x7); 
+       for(dev = PCI_DEV(0, 0, 0);
+               dev <= PCI_DEV(0, 0x1f, 0x7);

                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);
                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);


@@ -64,8 +64,8 @@ static inline void dump_pci_device(unsigned dev)
 static inline void dump_pci_devices(void)
 {
        device_t dev;
 static inline void dump_pci_devices(void)
 {
        device_t dev;

-       for(dev = PCI_DEV(0, 0, 0); 
-               dev <= PCI_DEV(0, 0x1f, 0x7); 
+       for(dev = PCI_DEV(0, 0, 0);
+               dev <= PCI_DEV(0, 0x1f, 0x7);

                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);
                dev += PCI_DEV(0,0,1)) {
                uint32_t id;
                id = pci_read_config32(dev, PCI_VENDOR_ID);


@@ -86,7 +86,7 @@ static inline void dump_spd_registers(void)
                 int status = 0;
                 int i;
                printk(BIOS_DEBUG, "\ndimm %02x", device);
                 int status = 0;
                 int i;
                printk(BIOS_DEBUG, "\ndimm %02x", device);

-               
+

                 for(i = 0; (i < 256) ; i++) {
                         if ((i % 16) == 0) {
                                printk(BIOS_DEBUG, "\n%02x: ", i);
                 for(i = 0; (i < 256) ; i++) {
                         if ((i % 16) == 0) {
                                printk(BIOS_DEBUG, "\n%02x: ", i);


@@ -94,7 +94,7 @@ static inline void dump_spd_registers(void)
                        status = smbus_read_byte(device, i);
                         if (status < 0) {
                                 printk(BIOS_DEBUG, "bad device: %02x\n", -status);
                        status = smbus_read_byte(device, i);
                         if (status < 0) {
                                 printk(BIOS_DEBUG, "bad device: %02x\n", -status);

-                                break; 
+                                break;

                        }
                        printk(BIOS_DEBUG, "%02x ", status);
                }
                        }
                        printk(BIOS_DEBUG, "%02x ", status);
                }

diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index db24c93a0d3d0d5c8d7c1b63cf925f552352a362..3c54b98855735836d6baccda4fea07bff9a51e78 100644 (file)
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -199,7 +199,7 @@ static int sdram_capabilities_two_dimms_per_channel(void)
        return (reg8 != 0);
 }
 
        return (reg8 != 0);
 }
 

-// TODO check if we ever need this function 
+// TODO check if we ever need this function

 #if 0
 static int sdram_capabilities_MEM4G_disable(void)
 {
 #if 0
 static int sdram_capabilities_MEM4G_disable(void)
 {

diff --git a/src/northbridge/via/cn400/northbridge.c b/src/northbridge/via/cn400/northbridge.c
index 80dcc8d1a93caf5b3077926973af7f6671770a94..3fbc358de51ec62cca130d9408798e50941dac2a 100644 (file)
--- a/src/northbridge/via/cn400/northbridge.c
+++ b/src/northbridge/via/cn400/northbridge.c
@@ -45,7 +45,7 @@ static void memctrl_init(device_t dev)
        /* vlink mirror */
        vlink_dev = dev_find_device(PCI_VENDOR_ID_VIA,
                                    PCI_DEVICE_ID_VIA_CN400_VLINK, 0);
        /* vlink mirror */
        vlink_dev = dev_find_device(PCI_VENDOR_ID_VIA,
                                    PCI_DEVICE_ID_VIA_CN400_VLINK, 0);

-       
+

        /* Setup Low Memory Top */
        /* 0x47 == HA(32:25)    */
        /* 0x84/85 == HA(31:20) << 4 | DRAM Granularity */
        /* Setup Low Memory Top */
        /* 0x47 == HA(32:25)    */
        /* 0x84/85 == HA(31:20) << 4 | DRAM Granularity */


@@ -104,7 +104,7 @@ static void memctrl_init(device_t dev)
                pci_write_config8(vlink_dev, 0x63, shadowreg);
 
        /* Activate VGA Frame Buffer */
                pci_write_config8(vlink_dev, 0x63, shadowreg);
 
        /* Activate VGA Frame Buffer */

-       
+

        reg8 = pci_read_config8(dev, 0xA0);
        reg8 |= 0x01;
        pci_write_config8(dev, 0xA0, reg8);
        reg8 = pci_read_config8(dev, 0xA0);
        reg8 |= 0x01;
        pci_write_config8(dev, 0xA0, reg8);


@@ -268,7 +268,7 @@ static void cn400_domain_set_resources(device_t dev)
                             (tolmk - 768 - CONFIG_VIDEO_MB * 1024));
        }
        assign_resources(&dev->link[0]);
                             (tolmk - 768 - CONFIG_VIDEO_MB * 1024));
        }
        assign_resources(&dev->link[0]);

-       
+

        printk(BIOS_SPEW, "Leaving %s.\n", __func__);
 }
 
        printk(BIOS_SPEW, "Leaving %s.\n", __func__);
 }
 

diff --git a/src/northbridge/via/cn400/raminit.c b/src/northbridge/via/cn400/raminit.c
index a0b3aab1c5410300425e705914155a22157ad71a..7081c78744d200025e78584ca35676dd25b46e47 100644 (file)
--- a/src/northbridge/via/cn400/raminit.c
+++ b/src/northbridge/via/cn400/raminit.c
@@ -19,7 +19,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 

-/* 
+/*

   Automatically detect and set up ddr dram on the CN400 chipset.
   Assumes DDR400 memory as no attempt is made to clock
   the chipset down if slower memory is installed.
   Automatically detect and set up ddr dram on the CN400 chipset.
   Assumes DDR400 memory as no attempt is made to clock
   the chipset down if slower memory is installed.


@@ -33,9 +33,9 @@
 #include <cpu/x86/mtrr.h>
 #include "cn400.h"
 
 #include <cpu/x86/mtrr.h>
 #include "cn400.h"
 

-static void dimm_read(unsigned long bank,unsigned long x) 
+static void dimm_read(unsigned long bank,unsigned long x)

 {
 {

-       //unsigned long eax; 
+       //unsigned long eax;

        volatile unsigned long y;
        //eax =  x;
        y = * (volatile unsigned long *) (x+ bank) ;
        volatile unsigned long y;
        //eax =  x;
        y = * (volatile unsigned long *) (x+ bank) ;


@@ -50,7 +50,7 @@ static void print_val(char *str, int val)
 }
 
 /**
 }
 
 /**

- * Configure the bus between the CPU and the northbridge. This might be able to 
+ * Configure the bus between the CPU and the northbridge. This might be able to

  * be moved to post-ram code in the future. For the most part, these registers
  * should not be messed around with. These are too complex to explain short of
  * copying the datasheets into the comments, but most of these values are from
  * be moved to post-ram code in the future. For the most part, these registers
  * should not be messed around with. These are too complex to explain short of
  * copying the datasheets into the comments, but most of these values are from


@@ -66,27 +66,27 @@ static void c3_cpu_setup(device_t dev)
        /* Host bus interface registers (D0F2 0x50-0x67) */
        /* Taken from CN700 and updated from running CN400 */
        uint8_t reg8;
        /* Host bus interface registers (D0F2 0x50-0x67) */
        /* Taken from CN700 and updated from running CN400 */
        uint8_t reg8;

-       
+

        /* Host Bus I/O Circuit (see datasheet) */
        /* Host Address Pullup/down Driving */
        pci_write_config8(dev, 0x70, 0x33);
        pci_write_config8(dev, 0x71, 0x44);
        pci_write_config8(dev, 0x72, 0x33);
        pci_write_config8(dev, 0x73, 0x44);
        /* Host Bus I/O Circuit (see datasheet) */
        /* Host Address Pullup/down Driving */
        pci_write_config8(dev, 0x70, 0x33);
        pci_write_config8(dev, 0x71, 0x44);
        pci_write_config8(dev, 0x72, 0x33);
        pci_write_config8(dev, 0x73, 0x44);

-       
+

        /* Output Delay Stagger Control */
        pci_write_config8(dev, 0x74, 0x70);
        /* Output Delay Stagger Control */
        pci_write_config8(dev, 0x74, 0x70);

-       
+

        /* AGTL+ I/O Circuit */
        pci_write_config8(dev, 0x75, 0x08);
        /* AGTL+ I/O Circuit */
        pci_write_config8(dev, 0x75, 0x08);

-       
+

        /* AGTL+ Compensation Status */
        pci_write_config8(dev, 0x76, 0x74);
        /* AGTL+ Compensation Status */
        pci_write_config8(dev, 0x76, 0x74);

-       
+

        /* AGTL+ Auto Compensation Offest */
        pci_write_config8(dev, 0x77, 0x00);
        pci_write_config8(dev, 0x78, 0x94);
        /* AGTL+ Auto Compensation Offest */
        pci_write_config8(dev, 0x77, 0x00);
        pci_write_config8(dev, 0x78, 0x94);

-       
+

        /* Request phase control */
        pci_write_config8(dev, 0x50, 0xA8);
 
        /* Request phase control */
        pci_write_config8(dev, 0x50, 0xA8);
 


@@ -94,71 +94,71 @@ static void c3_cpu_setup(device_t dev)
        pci_write_config8(dev, 0x60, 0x00);
        pci_write_config8(dev, 0x61, 0x00);
        pci_write_config8(dev, 0x62, 0x00);
        pci_write_config8(dev, 0x60, 0x00);
        pci_write_config8(dev, 0x61, 0x00);
        pci_write_config8(dev, 0x62, 0x00);

-       
+

        /* QW DRDY# Timing Control */
        pci_write_config8(dev, 0x63, 0x00);
        pci_write_config8(dev, 0x64, 0x00);
        pci_write_config8(dev, 0x65, 0x00);
        /* QW DRDY# Timing Control */
        pci_write_config8(dev, 0x63, 0x00);
        pci_write_config8(dev, 0x64, 0x00);
        pci_write_config8(dev, 0x65, 0x00);

-       
+

        /* Read Line Burst DRDY# Timing Control */
        pci_write_config8(dev, 0x66, 0x00);
        pci_write_config8(dev, 0x67, 0x00);
        /* Read Line Burst DRDY# Timing Control */
        pci_write_config8(dev, 0x66, 0x00);
        pci_write_config8(dev, 0x67, 0x00);

-       
+

        /* CPU Interface Control */
        pci_write_config8(dev, 0x51, 0xFE);
        pci_write_config8(dev, 0x52, 0xEF);
        /* CPU Interface Control */
        pci_write_config8(dev, 0x51, 0xFE);
        pci_write_config8(dev, 0x52, 0xEF);

-       
+

        /* Arbitration */
        pci_write_config8(dev, 0x53, 0x88);
        /* Arbitration */
        pci_write_config8(dev, 0x53, 0x88);

-               
+

        /* Write Policy & Reorder Latecy */
        pci_write_config8(dev, 0x56, 0x00);
        /* Write Policy & Reorder Latecy */
        pci_write_config8(dev, 0x56, 0x00);

-       
+

        /* Delivery-Trigger Control */
        pci_write_config8(dev, 0x58, 0x00);
        /* Delivery-Trigger Control */
        pci_write_config8(dev, 0x58, 0x00);

-               
+

        /* IPI Control */
        pci_write_config8(dev, 0x59, 0x30);
        /* IPI Control */
        pci_write_config8(dev, 0x59, 0x30);

-       
+

        /* CPU Misc Control */
        pci_write_config8(dev, 0x5C, 0x00);
        /* CPU Misc Control */
        pci_write_config8(dev, 0x5C, 0x00);

-       
+

        /* Write Policy */
        pci_write_config8(dev, 0x5d, 0xb2);
        /* Write Policy */
        pci_write_config8(dev, 0x5d, 0xb2);

-       
+

        /* Bandwidth Timer */
        pci_write_config8(dev, 0x5e, 0x88);
        /* Bandwidth Timer */
        pci_write_config8(dev, 0x5e, 0x88);

-       
+

        /* CPU Miscellaneous Control */
        pci_write_config8(dev, 0x5f, 0xc7);
        /* CPU Miscellaneous Control */
        pci_write_config8(dev, 0x5f, 0xc7);

-       
+

        /* CPU Miscellaneous Control */
        pci_write_config8(dev, 0x55, 0x28);
        pci_write_config8(dev, 0x57, 0x69);
        /* CPU Miscellaneous Control */
        pci_write_config8(dev, 0x55, 0x28);
        pci_write_config8(dev, 0x57, 0x69);

-       
+

        /* CPU Host Bus Final Setup */
        reg8 = pci_read_config8(dev, 0x54);
        reg8 |= 0x08;
        pci_write_config8(dev, 0x54, reg8);
 
 }
        /* CPU Host Bus Final Setup */
        reg8 = pci_read_config8(dev, 0x54);
        reg8 |= 0x08;
        pci_write_config8(dev, 0x54, reg8);
 
 }

- 
-static void ddr_ram_setup(void) 
+
+static void ddr_ram_setup(void)

 {
        uint8_t b, c, bank, ma;
        uint16_t i;
        unsigned long bank_address;
 {
        uint8_t b, c, bank, ma;
        uint16_t i;
        unsigned long bank_address;

-       
-       
-       print_debug("CN400 RAM init starting\n");       
+
+
+       print_debug("CN400 RAM init starting\n");

 
        pci_write_config8(ctrl.d0f7, 0x75, 0x08);
 
        pci_write_config8(ctrl.d0f7, 0x75, 0x08);

-       
-               
+
+

        /* No  Interleaving or Multi Page */
        pci_write_config8(ctrl.d0f3, 0x69, 0x00);
        /* No  Interleaving or Multi Page */
        pci_write_config8(ctrl.d0f3, 0x69, 0x00);

-       pci_write_config8(ctrl.d0f3, 0x6b, 0x10);       
-       
+       pci_write_config8(ctrl.d0f3, 0x6b, 0x10);
+

 /*
     DRAM MA Map Type  Device 0  Fn3 Offset 50-51
 
 /*
     DRAM MA Map Type  Device 0  Fn3 Offset 50-51
 


@@ -186,14 +186,14 @@ static void ddr_ram_setup(void)
                bank = 0x40;
                b = smbus_read_byte(0x50, SPD_NUM_ROWS);
                //print_val("\nNumber of Rows ", b);
                bank = 0x40;
                b = smbus_read_byte(0x50, SPD_NUM_ROWS);
                //print_val("\nNumber of Rows ", b);

-               
+

                if( b >= 0x0d ){        // 256/512Mb
                if( b >= 0x0d ){        // 256/512Mb

-               
+

                        if (b == 0x0e)
                                bank = 0x48;
                        else
                                bank = 0x44;
                        if (b == 0x0e)
                                bank = 0x48;
                        else
                                bank = 0x44;

-                        
+

                        /*
                        Read SPD byte 13, Primary DRAM width.
                        */
                        /*
                        Read SPD byte 13, Primary DRAM width.
                        */


@@ -205,7 +205,7 @@ static void ddr_ram_setup(void)
 
                /*
                Read SPD byte 4, Number of column addresses.
 
                /*
                Read SPD byte 4, Number of column addresses.

-               */              
+               */

                b = smbus_read_byte(0x50, SPD_NUM_COLUMNS);
                //print_val("\nNo Columns ",b);
                if( b == 10 || b == 11 || b == 12) c |= 0x60;   // 10/11 bit col addr
                b = smbus_read_byte(0x50, SPD_NUM_COLUMNS);
                //print_val("\nNo Columns ",b);
                if( b == 10 || b == 11 || b == 12) c |= 0x60;   // 10/11 bit col addr


@@ -240,11 +240,11 @@ static void ddr_ram_setup(void)
        //c = 0;
        b = smbus_read_byte(0x50, SPD_DENSITY_OF_EACH_ROW_ON_MODULE);
        if( b & 0x02 )
        //c = 0;
        b = smbus_read_byte(0x50, SPD_DENSITY_OF_EACH_ROW_ON_MODULE);
        if( b & 0x02 )

-       { 
+       {

                c = 0x40;                                       // 2GB
                bank |= 0x02;
        }
                c = 0x40;                                       // 2GB
                bank |= 0x02;
        }

-       else if( b & 0x01) 
+       else if( b & 0x01)

        {
                c = 0x20;                                       // 1GB
                if (bank == 0x48) bank |= 0x01;
        {
                c = 0x20;                                       // 1GB
                if (bank == 0x48) bank |= 0x01;


@@ -255,12 +255,12 @@ static void ddr_ram_setup(void)
                c = 0x10;                                       // 512MB
                if (bank == 0x44) bank |= 0x02;
        }
                c = 0x10;                                       // 512MB
                if (bank == 0x44) bank |= 0x02;
        }

-       else if( b & 0x40) 
-       {       
+       else if( b & 0x40)
+       {

                c = 0x08;                                       // 256MB
                if (bank == 0x44) bank |= 0x01;
                else bank |= 0x03;
                c = 0x08;                                       // 256MB
                if (bank == 0x44) bank |= 0x01;
                else bank |= 0x03;

-       } 
+       }

        else if( b & 0x20)
        {
                c = 0x04;                                       // 128MB
        else if( b & 0x20)
        {
                c = 0x04;                                       // 128MB


@@ -276,7 +276,7 @@ static void ddr_ram_setup(void)
 
        // set bank zero size
        pci_write_config8(ctrl.d0f3, 0x40, c);
 
        // set bank zero size
        pci_write_config8(ctrl.d0f3, 0x40, c);

-       
+

        // SPD byte 5  # of physical banks
        b = smbus_read_byte(0x50, SPD_NUM_DIMM_BANKS);
 
        // SPD byte 5  # of physical banks
        b = smbus_read_byte(0x50, SPD_NUM_DIMM_BANKS);
 


@@ -288,7 +288,7 @@ static void ddr_ram_setup(void)
        }
 /*     else
        {
        }
 /*     else
        {

-               die("Only a single DIMM is supported by EPIA-N(L)\n");  
+               die("Only a single DIMM is supported by EPIA-N(L)\n");

        }
 */
        // set banks 1,2,3...
        }
 */
        // set banks 1,2,3...


@@ -299,13 +299,13 @@ static void ddr_ram_setup(void)
        pci_write_config8(ctrl.d0f3, 0x45,c);
        pci_write_config8(ctrl.d0f3, 0x46,c);
        pci_write_config8(ctrl.d0f3, 0x47,c);
        pci_write_config8(ctrl.d0f3, 0x45,c);
        pci_write_config8(ctrl.d0f3, 0x46,c);
        pci_write_config8(ctrl.d0f3, 0x47,c);

-       
+

        /* Top Rank Address Mirrored to the South Bridge */
        /* over the VLink                                                                */
        pci_write_config8(ctrl.d0f7, 0x57, (c << 1));
 
        ma = bank;
        /* Top Rank Address Mirrored to the South Bridge */
        /* over the VLink                                                                */
        pci_write_config8(ctrl.d0f7, 0x57, (c << 1));
 
        ma = bank;

-               
+

        /* Read SPD byte 18 CAS Latency */
        b = smbus_read_byte(0x50, SPD_ACCEPTABLE_CAS_LATENCIES);
 /*     print_debug("\nCAS Supported ");
        /* Read SPD byte 18 CAS Latency */
        b = smbus_read_byte(0x50, SPD_ACCEPTABLE_CAS_LATENCIES);
 /*     print_debug("\nCAS Supported ");


@@ -322,7 +322,7 @@ static void ddr_ram_setup(void)
        print_val("\nCycle time at CL X-0.5 (nS)", c);
        c = smbus_read_byte(0x50, SPD_SDRAM_CYCLE_TIME_3RD);
        print_val("\nCycle time at CL X-1   (nS)", c);
        print_val("\nCycle time at CL X-0.5 (nS)", c);
        c = smbus_read_byte(0x50, SPD_SDRAM_CYCLE_TIME_3RD);
        print_val("\nCycle time at CL X-1   (nS)", c);

-*/     
+*/

        /* Scaling of Cycle Time SPD data */
        /* 7      4 3       0             */
        /*    ns     x0.1ns               */
        /* Scaling of Cycle Time SPD data */
        /* 7      4 3       0             */
        /*    ns     x0.1ns               */


@@ -353,7 +353,7 @@ static void ddr_ram_setup(void)
                                c = 0x10;
                        }
                }
                                c = 0x10;
                        }
                }

-       }       
+       }

 
        /* Scale DRAM Cycle Time to tRP/tRCD */
        /* 7      2 1       0             */
 
        /* Scale DRAM Cycle Time to tRP/tRCD */
        /* 7      2 1       0             */


@@ -384,7 +384,7 @@ static void ddr_ram_setup(void)
 */
 
        b = smbus_read_byte(0x50, SPD_MIN_ROW_PRECHARGE_TIME);
 */
 
        b = smbus_read_byte(0x50, SPD_MIN_ROW_PRECHARGE_TIME);

-       
+

        //print_val("\ntRP ",b);
        if ( b >= (5 * bank)) {
                c |= 0x03;              // set tRP = 5T
        //print_val("\ntRP ",b);
        if ( b >= (5 * bank)) {
                c |= 0x03;              // set tRP = 5T


@@ -425,16 +425,16 @@ static void ddr_ram_setup(void)
        if ( b >= (9 * bank)) c |= 0xC0;                // set tRAS = 9T
        else if ( b >= (8 * bank)) c |= 0x80;   // set tRAS = 8T
        else if ( b >= (7 * bank)) c |= 0x40;   // set tRAS = 7T
        if ( b >= (9 * bank)) c |= 0xC0;                // set tRAS = 9T
        else if ( b >= (8 * bank)) c |= 0x80;   // set tRAS = 8T
        else if ( b >= (7 * bank)) c |= 0x40;   // set tRAS = 7T

-       
+

        /* Write DRAM Timing All Banks I */
        pci_write_config8(ctrl.d0f3, 0x56, c);
        /* Write DRAM Timing All Banks I */
        pci_write_config8(ctrl.d0f3, 0x56, c);

-       
+

        /* TWrite DRAM Timing All Banks II */
        pci_write_config8(ctrl.d0f3, 0x57, 0x1a);
        /* TWrite DRAM Timing All Banks II */
        pci_write_config8(ctrl.d0f3, 0x57, 0x1a);

-       
+

        /* DRAM arbitration timer */
        pci_write_config8(ctrl.d0f3, 0x65, 0x99);
        /* DRAM arbitration timer */
        pci_write_config8(ctrl.d0f3, 0x65, 0x99);

-               
+

 /*
     DRAM Clock  Device 0 Fn 3 Offset 68
 */
 /*
     DRAM Clock  Device 0 Fn 3 Offset 68
 */


@@ -453,7 +453,7 @@ static void ddr_ram_setup(void)
                /* 133MHz FSB / DDR333.  See also c3_cpu_setup */
                pci_write_config8(ctrl.d0f3, 0x68, 0x81);
        }
                /* 133MHz FSB / DDR333.  See also c3_cpu_setup */
                pci_write_config8(ctrl.d0f3, 0x68, 0x81);
        }

-       else 
+       else

        {
                /* DRAM DDR Control Alert! Alert! This hardwires to */
                /* 133MHz FSB / DDR266.  See also c3_cpu_setup */
        {
                /* DRAM DDR Control Alert! Alert! This hardwires to */
                /* 133MHz FSB / DDR266.  See also c3_cpu_setup */


@@ -475,7 +475,7 @@ static void ddr_ram_setup(void)
 
        /* 4-Way Interleave With Multi-Paging (From Running System)*/
        pci_write_config8(ctrl.d0f3, 0x69, c);
 
        /* 4-Way Interleave With Multi-Paging (From Running System)*/
        pci_write_config8(ctrl.d0f3, 0x69, c);

-       
+

        /*DRAM Controller Internal Options */
        pci_write_config8(ctrl.d0f3, 0x54, 0x01);
 
        /*DRAM Controller Internal Options */
        pci_write_config8(ctrl.d0f3, 0x54, 0x01);
 


@@ -484,7 +484,7 @@ static void ddr_ram_setup(void)
 
        /* DRAM Control */
        pci_write_config8(ctrl.d0f3, 0x6e, 0x80);
 
        /* DRAM Control */
        pci_write_config8(ctrl.d0f3, 0x6e, 0x80);

-       
+

        /* Disable refresh for now */
        pci_write_config8(ctrl.d0f3, 0x6a, 0x00);
 
        /* Disable refresh for now */
        pci_write_config8(ctrl.d0f3, 0x6a, 0x00);
 


@@ -497,7 +497,7 @@ static void ddr_ram_setup(void)
 
        /* DRAM Bus Turn-Around Setting */
        pci_write_config8(ctrl.d0f3, 0x60, 0x01);
 
        /* DRAM Bus Turn-Around Setting */
        pci_write_config8(ctrl.d0f3, 0x60, 0x01);

-       
+

        /* Disable DRAM refresh */
        pci_write_config8(ctrl.d0f3,0x6a,0x0);
 
        /* Disable DRAM refresh */
        pci_write_config8(ctrl.d0f3,0x6a,0x0);
 


@@ -524,7 +524,7 @@ static void ddr_ram_setup(void)
        c = b | 0x40;
 
        pci_write_config8(ctrl.d0f3, 0xb0, c);
        c = b | 0x40;
 
        pci_write_config8(ctrl.d0f3, 0xb0, c);

-       
+

        /* Set RAM Decode method */
        pci_write_config8(ctrl.d0f3, 0x55, 0x0a);
 
        /* Set RAM Decode method */
        pci_write_config8(ctrl.d0f3, 0x55, 0x0a);
 


@@ -542,14 +542,14 @@ static void ddr_ram_setup(void)
 
                        CPU FSB Operating Frequency (bits 7:5)
                        000 : 100MHz    001 : 133MHz
 
                        CPU FSB Operating Frequency (bits 7:5)
                        000 : 100MHz    001 : 133MHz

-                       010 : 200MHz    
+                       010 : 200MHz

                                011->111 : Reserved
                                011->111 : Reserved

-                 
+

                        SDRAM BL8 (4)
                        SDRAM BL8 (4)

-                       
+

                        Don't change Frequency from power up defaults
                        This seems to lockup the RAM interface
                        Don't change Frequency from power up defaults
                        This seems to lockup the RAM interface

-               */      
+               */

                c = pci_read_config8(ctrl.d0f2, 0x54);
                c |= 0x10;
                pci_write_config8(ctrl.d0f2, 0x54, c);
                c = pci_read_config8(ctrl.d0f2, 0x54);
                c |= 0x10;
                pci_write_config8(ctrl.d0f2, 0x54, c);


@@ -566,7 +566,7 @@ static void ddr_ram_setup(void)
                c = pci_read_config8(ctrl.d0f3, DRAM_MISC_CTL);
                c &= 0xf8;              /* Clear bits 2-0. */
                c |= RAM_COMMAND_NOP;
                c = pci_read_config8(ctrl.d0f3, DRAM_MISC_CTL);
                c &= 0xf8;              /* Clear bits 2-0. */
                c |= RAM_COMMAND_NOP;

-               pci_write_config8(ctrl.d0f3, DRAM_MISC_CTL, c);         
+               pci_write_config8(ctrl.d0f3, DRAM_MISC_CTL, c);

 
                /* read a double word from any address of the dimm */
                dimm_read(bank_address,0x1f000);
 
                /* read a double word from any address of the dimm */
                dimm_read(bank_address,0x1f000);


@@ -576,7 +576,7 @@ static void ddr_ram_setup(void)
                c = pci_read_config8(ctrl.d0f3, DRAM_MISC_CTL);
                c &= 0xf8;              /* Clear bits 2-0. */
                c |= RAM_COMMAND_PRECHARGE;
                c = pci_read_config8(ctrl.d0f3, DRAM_MISC_CTL);
                c &= 0xf8;              /* Clear bits 2-0. */
                c |= RAM_COMMAND_PRECHARGE;

-               pci_write_config8(ctrl.d0f3, DRAM_MISC_CTL, c);         
+               pci_write_config8(ctrl.d0f3, DRAM_MISC_CTL, c);

                dimm_read(bank_address,0x1f000);
 
 
                dimm_read(bank_address,0x1f000);
 
 


@@ -584,8 +584,8 @@ static void ddr_ram_setup(void)
                c = pci_read_config8(ctrl.d0f3, DRAM_MISC_CTL);
                c &= 0xf8;              /* Clear bits 2-0. */
                c |= RAM_COMMAND_MSR_LOW;
                c = pci_read_config8(ctrl.d0f3, DRAM_MISC_CTL);
                c &= 0xf8;              /* Clear bits 2-0. */
                c |= RAM_COMMAND_MSR_LOW;

-               pci_write_config8(ctrl.d0f3, DRAM_MISC_CTL, c); 
-               /* TODO: Bank Addressing for Different Numbers of Row Addresses */      
+               pci_write_config8(ctrl.d0f3, DRAM_MISC_CTL, c);
+               /* TODO: Bank Addressing for Different Numbers of Row Addresses */

                dimm_read(bank_address,0x2000);
                udelay(1);
                dimm_read(bank_address,0x800);
                dimm_read(bank_address,0x2000);
                udelay(1);
                dimm_read(bank_address,0x800);


@@ -595,14 +595,14 @@ static void ddr_ram_setup(void)
                c = pci_read_config8(ctrl.d0f3, DRAM_MISC_CTL);
                c &= 0xf8;              /* Clear bits 2-0. */
                c |= RAM_COMMAND_PRECHARGE;
                c = pci_read_config8(ctrl.d0f3, DRAM_MISC_CTL);
                c &= 0xf8;              /* Clear bits 2-0. */
                c |= RAM_COMMAND_PRECHARGE;

-               pci_write_config8(ctrl.d0f3, DRAM_MISC_CTL, c);         
+               pci_write_config8(ctrl.d0f3, DRAM_MISC_CTL, c);

                dimm_read(bank_address,0x1f200);
 
                /* CBR Cycle Enable */
                c = pci_read_config8(ctrl.d0f3, DRAM_MISC_CTL);
                c &= 0xf8;              /* Clear bits 2-0. */
                c |= RAM_COMMAND_CBR;
                dimm_read(bank_address,0x1f200);
 
                /* CBR Cycle Enable */
                c = pci_read_config8(ctrl.d0f3, DRAM_MISC_CTL);
                c &= 0xf8;              /* Clear bits 2-0. */
                c |= RAM_COMMAND_CBR;

-               pci_write_config8(ctrl.d0f3, DRAM_MISC_CTL, c);         
+               pci_write_config8(ctrl.d0f3, DRAM_MISC_CTL, c);

 
                /* Read 8 times */
                for (c=0;c<8;c++) {
 
                /* Read 8 times */
                for (c=0;c<8;c++) {


@@ -614,10 +614,10 @@ static void ddr_ram_setup(void)
                c = pci_read_config8(ctrl.d0f3, DRAM_MISC_CTL);
                c &= 0xf8;              /* Clear bits 2-0. */
                c |= RAM_COMMAND_MSR_LOW;
                c = pci_read_config8(ctrl.d0f3, DRAM_MISC_CTL);
                c &= 0xf8;              /* Clear bits 2-0. */
                c |= RAM_COMMAND_MSR_LOW;

-               pci_write_config8(ctrl.d0f3, DRAM_MISC_CTL, c);         
+               pci_write_config8(ctrl.d0f3, DRAM_MISC_CTL, c);

 
 
 
 

-/* 
+/*

     Mode Register Definition
     with adjustement so that address calculation is correct - 64 bit technology, therefore
     a0-a2 refer to byte within a 64 bit long word, and a3 is the first address line presented
     Mode Register Definition
     with adjustement so that address calculation is correct - 64 bit technology, therefore
     a0-a2 refer to byte within a 64 bit long word, and a3 is the first address line presented


@@ -626,9 +626,9 @@ static void ddr_ram_setup(void)
     MR[9-7]   CAS Latency
     MR[6]     Burst Type 0 = sequential, 1 = interleaved
     MR[5-3]   burst length 001 = 2, 010 = 4, 011 = 8, others reserved
     MR[9-7]   CAS Latency
     MR[6]     Burst Type 0 = sequential, 1 = interleaved
     MR[5-3]   burst length 001 = 2, 010 = 4, 011 = 8, others reserved

-    MR[0-2]   dont care 
+    MR[0-2]   dont care

 
 

-    CAS Latency 
+    CAS Latency

     000       reserved
     001       reserved
     010       2
     000       reserved
     001       reserved
     010       2


@@ -657,24 +657,24 @@ static void ddr_ram_setup(void)
                c &= 0xf8;              /* Clear bits 2-0. */
                c |= RAM_COMMAND_NORMAL;
                pci_write_config8(ctrl.d0f3, DRAM_MISC_CTL, c);
                c &= 0xf8;              /* Clear bits 2-0. */
                c |= RAM_COMMAND_NORMAL;
                pci_write_config8(ctrl.d0f3, DRAM_MISC_CTL, c);

-                               
+

                bank_address = pci_read_config8(ctrl.d0f3,0x40+bank) * 0x2000000;
        } // end of for each bank
 
                bank_address = pci_read_config8(ctrl.d0f3,0x40+bank) * 0x2000000;
        } // end of for each bank
 

-       
+

        /* Set DRAM DQS Output Control */
        pci_write_config8(ctrl.d0f3, 0x79, 0x11);
        /* Set DRAM DQS Output Control */
        pci_write_config8(ctrl.d0f3, 0x79, 0x11);

-       
+

        /* Set DQS A/B Input delay to defaults */
        pci_write_config8(ctrl.d0f3, 0x7A, 0xA1);
        /* Set DQS A/B Input delay to defaults */
        pci_write_config8(ctrl.d0f3, 0x7A, 0xA1);

-       pci_write_config8(ctrl.d0f3, 0x7B, 0x62);       
+       pci_write_config8(ctrl.d0f3, 0x7B, 0x62);

 
        /* DQS Duty Cycle Control */
        pci_write_config8(ctrl.d0f3, 0xED, 0x11);
 
        /* SPD byte 5  # of physical banks */
        b = smbus_read_byte(0x50, SPD_NUM_DIMM_BANKS) -1;
 
        /* DQS Duty Cycle Control */
        pci_write_config8(ctrl.d0f3, 0xED, 0x11);
 
        /* SPD byte 5  # of physical banks */
        b = smbus_read_byte(0x50, SPD_NUM_DIMM_BANKS) -1;

-       
+

        /* determine low bond */
        if( b == 2)
                bank_address = pci_read_config8(ctrl.d0f3,0x40) * 0x2000000;
        /* determine low bond */
        if( b == 2)
                bank_address = pci_read_config8(ctrl.d0f3,0x40) * 0x2000000;


@@ -720,10 +720,10 @@ static void ddr_ram_setup(void)
 
                // if everything verified then found low bond
                break;
 
                // if everything verified then found low bond
                break;

-               
+

        }
        }

-       print_val("\nLow Bond ",i);     
-       if( i < 0xff ){ 
+       print_val("\nLow Bond ",i);
+       if( i < 0xff ){

                c = i++;
                for(  ; i <0xff ; i++){
                        pci_write_config8(ctrl.d0f3,0x70, i);
                c = i++;
                for(  ; i <0xff ; i++){
                        pci_write_config8(ctrl.d0f3,0x70, i);


@@ -774,24 +774,24 @@ static void ddr_ram_setup(void)
 
        /* Set DQS ChA Data Output Delay to the default */
        pci_write_config8(ctrl.d0f3, 0x71, 0x65);
 
        /* Set DQS ChA Data Output Delay to the default */
        pci_write_config8(ctrl.d0f3, 0x71, 0x65);

-       
+

        /* Set Ch B DQS Output Delays */
        pci_write_config8(ctrl.d0f3, 0x72, 0x2a);
        pci_write_config8(ctrl.d0f3, 0x73, 0x29);
        /* Set Ch B DQS Output Delays */
        pci_write_config8(ctrl.d0f3, 0x72, 0x2a);
        pci_write_config8(ctrl.d0f3, 0x73, 0x29);

-       
+

        pci_write_config8(ctrl.d0f3, 0x78, 0x03);
 
        /* Mystery Value */
        pci_write_config8(ctrl.d0f3, 0x67, 0x50);
        pci_write_config8(ctrl.d0f3, 0x78, 0x03);
 
        /* Mystery Value */
        pci_write_config8(ctrl.d0f3, 0x67, 0x50);

-       
+

        /* Enable Toggle Limiting */
        pci_write_config8(ctrl.d0f4, 0xA3, 0x80);
        /* Enable Toggle Limiting */
        pci_write_config8(ctrl.d0f4, 0xA3, 0x80);

-       
+

 /*
     DRAM refresh rate  Device 0 F3 Offset 6a
 /*
     DRAM refresh rate  Device 0 F3 Offset 6a

-       TODO :: Fix for different DRAM technologies 
-       other than 512Mb and DRAM Freq 
-    Units of 16 DRAM clock cycles - 1. 
+       TODO :: Fix for different DRAM technologies
+       other than 512Mb and DRAM Freq
+    Units of 16 DRAM clock cycles - 1.

 */
        //c = pci_read_config8(ctrl.d0f3, 0x68);
        //c &= 0x07;
 */
        //c = pci_read_config8(ctrl.d0f3, 0x68);
        //c &= 0x07;


@@ -799,13 +799,13 @@ static void ddr_ram_setup(void)
        //print_val("SPD_REFRESH = ", b);
 
        pci_write_config8(ctrl.d0f3,0x6a,0x65);
        //print_val("SPD_REFRESH = ", b);
 
        pci_write_config8(ctrl.d0f3,0x6a,0x65);

-       
+

        /* SMM and APIC decoding, we do not use SMM */
        b = 0x29;
        pci_write_config8(ctrl.d0f3, 0x86, b);
        /* SMM and APIC decoding mirror */
        pci_write_config8(ctrl.d0f7, 0xe6, b);
        /* SMM and APIC decoding, we do not use SMM */
        b = 0x29;
        pci_write_config8(ctrl.d0f3, 0x86, b);
        /* SMM and APIC decoding mirror */
        pci_write_config8(ctrl.d0f7, 0xe6, b);

-       
+

        /* Open Up the Rest of the Shadow RAM */
        pci_write_config8(ctrl.d0f3,0x80,0xff);
        pci_write_config8(ctrl.d0f3,0x81,0xff);
        /* Open Up the Rest of the Shadow RAM */
        pci_write_config8(ctrl.d0f3,0x80,0xff);
        pci_write_config8(ctrl.d0f3,0x81,0xff);


@@ -816,10 +816,10 @@ static void ddr_ram_setup(void)
        pci_write_config8(ctrl.d0f7,0x76,0x50);
 
        pci_write_config8(ctrl.d0f7,0x71,0xc8);
        pci_write_config8(ctrl.d0f7,0x76,0x50);
 
        pci_write_config8(ctrl.d0f7,0x71,0xc8);

-       
+

 
        /* VGA device. */
        pci_write_config16(ctrl.d0f3, 0xa0, (1 << 15));
        pci_write_config16(ctrl.d0f3, 0xa4, 0x0010);
     print_debug("CN400 raminit.c done\n");
 
        /* VGA device. */
        pci_write_config16(ctrl.d0f3, 0xa0, (1 << 15));
        pci_write_config16(ctrl.d0f3, 0xa4, 0x0010);
     print_debug("CN400 raminit.c done\n");

-}      
+}

diff --git a/src/northbridge/via/cn400/vga.c b/src/northbridge/via/cn400/vga.c
index cf9c54be2321cbcc082920439a40aaac48e1fde3..511079b03a48633cda95ba0896f7639ecaff1c49 100644 (file)
--- a/src/northbridge/via/cn400/vga.c
+++ b/src/northbridge/via/cn400/vga.c
@@ -62,7 +62,7 @@ static int via_cn400_int15_handler(struct eregs *regs)
        case 0x5f02:
                regs->eax=0x5f;
                regs->ebx= (regs->ebx & 0xffff0000) | 2;
        case 0x5f02:
                regs->eax=0x5f;
                regs->ebx= (regs->ebx & 0xffff0000) | 2;

-               regs->ecx= (regs->ecx & 0xffff0000) | 0x401;  // PAL + crt only 
+               regs->ecx= (regs->ecx & 0xffff0000) | 0x401;  // PAL + crt only

                regs->edx= (regs->edx & 0xffff0000) | 0;  // TV Layout - default
                res=0;
                break;
                regs->edx= (regs->edx & 0xffff0000) | 0;  // TV Layout - default
                res=0;
                break;


@@ -70,7 +70,7 @@ static int via_cn400_int15_handler(struct eregs *regs)
                regs->eax=0x860f;
                break;
         default:
                regs->eax=0x860f;
                break;
         default:

-               printk(BIOS_DEBUG, "Unknown INT15 function %04x!\n", 
+               printk(BIOS_DEBUG, "Unknown INT15 function %04x!\n",

                                regs->eax & 0xffff);
                break;
        }
                                regs->eax & 0xffff);
                break;
        }

diff --git a/src/northbridge/via/cn700/raminit.c b/src/northbridge/via/cn700/raminit.c
index 63dab5b3e014f9a79297c3be4fb29bb2d82d7cf0..20b0afeb6ecc0d5a546ee82b00649ddf68c51984 100644 (file)
--- a/src/northbridge/via/cn700/raminit.c
+++ b/src/northbridge/via/cn700/raminit.c
@@ -51,7 +51,7 @@ static void do_ram_command(device_t dev, u8 command)
 }
 
 /**
 }
 
 /**

- * Configure the bus between the CPU and the northbridge. This might be able to 
+ * Configure the bus between the CPU and the northbridge. This might be able to

  * be moved to post-ram code in the future. For the most part, these registers
  * should not be messed around with. These are too complex to explain short of
  * copying the datasheets into the comments, but most of these values are from
  * be moved to post-ram code in the future. For the most part, these registers
  * should not be messed around with. These are too complex to explain short of
  * copying the datasheets into the comments, but most of these values are from


@@ -244,7 +244,7 @@ static void sdram_set_size(const struct mem_controller *ctrl)
 }
 
 /**
 }
 
 /**

- * Set up various RAM and other control registers statically. Some of these may 
+ * Set up various RAM and other control registers statically. Some of these may

  * not be needed, other should be done with SPD info, but that's a project for
  * the future.
  */
  * not be needed, other should be done with SPD info, but that's a project for
  * the future.
  */


@@ -422,7 +422,7 @@ static void sdram_enable(device_t dev, unsigned long rank_address)
        PRINT_DEBUG_MEM("RAM Enable 4: Mode register set\n");
        /* Safe value for now, BL=8, WR=5, CAS=4 */
        /*
        PRINT_DEBUG_MEM("RAM Enable 4: Mode register set\n");
        /* Safe value for now, BL=8, WR=5, CAS=4 */
        /*

-        * (E)MRS values are from the BPG. No direct explanation is given, but 
+        * (E)MRS values are from the BPG. No direct explanation is given, but

         * they should somehow conform to the JEDEC DDR2 SDRAM Specification
         * (JESD79-2C).
         */
         * they should somehow conform to the JEDEC DDR2 SDRAM Specification
         * (JESD79-2C).
         */

diff --git a/src/northbridge/via/cn700/vga.c b/src/northbridge/via/cn700/vga.c
index 69f188b01e47e6343995fb874de9dc6998ca3bea..33d1fe007106082758d91a386f34ce28e6497ac3 100644 (file)
--- a/src/northbridge/via/cn700/vga.c
+++ b/src/northbridge/via/cn700/vga.c
@@ -62,7 +62,7 @@ static int via_cn700_int15_handler(struct eregs *regs)
        case 0x5f02:
                regs->eax=0x5f;
                regs->ebx= (regs->ebx & 0xffff0000) | 2;
        case 0x5f02:
                regs->eax=0x5f;
                regs->ebx= (regs->ebx & 0xffff0000) | 2;

-               regs->ecx= (regs->ecx & 0xffff0000) | 0x401;  // PAL + crt only 
+               regs->ecx= (regs->ecx & 0xffff0000) | 0x401;  // PAL + crt only

                regs->edx= (regs->edx & 0xffff0000) | 0;  // TV Layout - default
                res=0;
                break;
                regs->edx= (regs->edx & 0xffff0000) | 0;  // TV Layout - default
                res=0;
                break;


@@ -70,7 +70,7 @@ static int via_cn700_int15_handler(struct eregs *regs)
                regs->eax=0x860f;
                break;
         default:
                regs->eax=0x860f;
                break;
         default:

-               printk(BIOS_DEBUG, "Unknown INT15 function %04x!\n", 
+               printk(BIOS_DEBUG, "Unknown INT15 function %04x!\n",

                                regs->eax & 0xffff);
                break;
        }
                                regs->eax & 0xffff);
                break;
        }

diff --git a/src/northbridge/via/cx700/cx700_early_serial.c b/src/northbridge/via/cx700/cx700_early_serial.c
index a0d7301e20367676e0cc5a77f6094d15d297c390..3f5020f67039cdefda9af10ac4adf45a0efaf774 100644 (file)
--- a/src/northbridge/via/cx700/cx700_early_serial.c
+++ b/src/northbridge/via/cx700/cx700_early_serial.c
@@ -61,7 +61,7 @@ static void enable_cx700_serial(void)
        // turn on pnp
        cx700_writepnpaddr(0x87);
        cx700_writepnpaddr(0x87);
        // turn on pnp
        cx700_writepnpaddr(0x87);
        cx700_writepnpaddr(0x87);

-       // now go ahead and set up com1. 
+       // now go ahead and set up com1.

        // set address
        cx700_writepnpaddr(0x7);
        cx700_writepnpdata(0x2);
        // set address
        cx700_writepnpaddr(0x7);
        cx700_writepnpdata(0x2);

diff --git a/src/northbridge/via/cx700/cx700_vga.c b/src/northbridge/via/cx700/cx700_vga.c
index e36062d9d26627b26aa4a5f3a4dfa9ca9723ad3c..2999907616fc81a683f022c5e117c314f4596248 100644 (file)
--- a/src/northbridge/via/cx700/cx700_vga.c
+++ b/src/northbridge/via/cx700/cx700_vga.c
@@ -120,7 +120,7 @@ static int via_cx700_int15_handler(struct eregs *regs)
                break;
 
         default:
                break;
 
         default:

-               printk(BIOS_DEBUG, "Unknown INT15 function %04x!\n", 
+               printk(BIOS_DEBUG, "Unknown INT15 function %04x!\n",

                                regs->eax & 0xffff);
                break;
        }
                                regs->eax & 0xffff);
                break;
        }


@@ -170,7 +170,7 @@ static void vga_init(device_t dev)
        //   call_bios_interrupt(0x10,0x4f1f,0x8003,1,0);
        // this is how it looks:
        vga_enable_console();
        //   call_bios_interrupt(0x10,0x4f1f,0x8003,1,0);
        // this is how it looks:
        vga_enable_console();

-       
+

        /* It's not clear if these need to be programmed before or after
         * the VGA bios runs. Try both, clean up later */
        /* Set memory rate to 200MHz */
        /* It's not clear if these need to be programmed before or after
         * the VGA bios runs. Try both, clean up later */
        /* Set memory rate to 200MHz */

diff --git a/src/northbridge/via/cx700/raminit.c b/src/northbridge/via/cx700/raminit.c
index 6693724ad448e708a3a0824158905f09e17e497f..5694ea31aafd547e4de7c8533dd9010c21fdbaad 100644 (file)
--- a/src/northbridge/via/cx700/raminit.c
+++ b/src/northbridge/via/cx700/raminit.c
@@ -452,7 +452,7 @@ static void sdram_set_safe_values(const struct mem_controller *ctrl)
        /* To store DDRII frequence */
        pci_write_config8(PCI_DEV(0, 0, 4), SCRATCH_DRAM_FREQ, val);
 
        /* To store DDRII frequence */
        pci_write_config8(PCI_DEV(0, 0, 4), SCRATCH_DRAM_FREQ, val);
 

-       /* Manual reset and adjust DLL when DRAM change frequency 
+       /* Manual reset and adjust DLL when DRAM change frequency

         * This is a necessary sequence.
         */
        udelay(2000);
         * This is a necessary sequence.
         */
        udelay(2000);


@@ -1623,7 +1623,7 @@ static void sdram_enable(const struct mem_controller *ctrl)
                u8 mask;
                u8 val;
        } b0d1f0[] = {
                u8 mask;
                u8 val;
        } b0d1f0[] = {

-               { 0x40, 0x00, 0x8b}, 
+               { 0x40, 0x00, 0x8b},

                { 0x41, 0x80, 0x43},
                { 0x42, 0x00, 0x62},
                { 0x43, 0x00, 0x44},
                { 0x41, 0x80, 0x43},
                { 0x42, 0x00, 0x62},
                { 0x43, 0x00, 0x44},

diff --git a/src/northbridge/via/vt8601/northbridge.c b/src/northbridge/via/vt8601/northbridge.c
index 5af7836a9371903bb9300a3bd8ebe87613fdb778..8fca0eae2c116e764a46e4c272a0e9d06b4edb51 100644 (file)
--- a/src/northbridge/via/vt8601/northbridge.c
+++ b/src/northbridge/via/vt8601/northbridge.c
@@ -18,7 +18,7 @@
  * slower than normal, ethernet drops packets).
  * Apparently these registers govern some sort of bus master behavior.
  */
  * slower than normal, ethernet drops packets).
  * Apparently these registers govern some sort of bus master behavior.
  */

-static void northbridge_init(device_t dev) 
+static void northbridge_init(device_t dev)

 {
        printk(BIOS_SPEW, "VT8601 random fixup ...\n");
        pci_write_config8(dev, 0x70, 0xc0);
 {
        printk(BIOS_SPEW, "VT8601 random fixup ...\n");
        pci_write_config8(dev, 0x70, 0xc0);


@@ -108,16 +108,16 @@ static void pci_domain_set_resources(device_t dev)
                for(rambits = 0, i = 0; i < ARRAY_SIZE(ramregs); i++) {
                        unsigned char reg;
                        reg = pci_read_config8(mc_dev, ramregs[i]);
                for(rambits = 0, i = 0; i < ARRAY_SIZE(ramregs); i++) {
                        unsigned char reg;
                        reg = pci_read_config8(mc_dev, ramregs[i]);

-                       /* these are ENDING addresses, not sizes. 
+                       /* these are ENDING addresses, not sizes.

                         * if there is memory in this slot, then reg will be > rambits.
                         * if there is memory in this slot, then reg will be > rambits.

-                        * So we just take the max, that gives us total. 
+                        * So we just take the max, that gives us total.

                         * We take the highest one to cover for once and future coreboot
                         * bugs. We warn about bugs.
                         */
                        if (reg > rambits)
                                rambits = reg;
                        if (reg < rambits)
                         * We take the highest one to cover for once and future coreboot
                         * bugs. We warn about bugs.
                         */
                        if (reg > rambits)
                                rambits = reg;
                        if (reg < rambits)

-                               printk(BIOS_ERR, "ERROR! register 0x%x is not set!\n", 
+                               printk(BIOS_ERR, "ERROR! register 0x%x is not set!\n",

                                        ramregs[i]);
                }
                printk(BIOS_DEBUG, "I would set ram size to 0x%x Kbytes\n", (rambits)*8*1024);
                                        ramregs[i]);
                }
                printk(BIOS_DEBUG, "I would set ram size to 0x%x Kbytes\n", (rambits)*8*1024);


@@ -149,7 +149,7 @@ static struct device_operations pci_domain_ops = {
         .enable_resources = enable_childrens_resources,
         .init             = 0,
         .scan_bus         = pci_domain_scan_bus,
         .enable_resources = enable_childrens_resources,
         .init             = 0,
         .scan_bus         = pci_domain_scan_bus,

-};  
+};

 
 static void cpu_bus_init(device_t dev)
 {
 
 static void cpu_bus_init(device_t dev)
 {


@@ -182,5 +182,5 @@ static void enable_dev(struct device *dev)
 
 struct chip_operations northbridge_via_vt8601_ops = {
        CHIP_NAME("VIA VT8601 Northbridge")
 
 struct chip_operations northbridge_via_vt8601_ops = {
        CHIP_NAME("VIA VT8601 Northbridge")

-       .enable_dev = enable_dev, 
+       .enable_dev = enable_dev,

 };
 };

diff --git a/src/northbridge/via/vt8601/raminit.c b/src/northbridge/via/vt8601/raminit.c
index cb13ad4e98003e433c1d61db8a88de4bd7a866d2..2365b8d8fb6a283034c9be5077fc6f10ef697a64 100644 (file)
--- a/src/northbridge/via/vt8601/raminit.c
+++ b/src/northbridge/via/vt8601/raminit.c
@@ -13,7 +13,7 @@ U.S. Government has rights to use, reproduce, and distribute this
 SOFTWARE.  The public may copy, distribute, prepare derivative works
 and publicly display this SOFTWARE without charge, provided that this
 Notice and any statement of authorship are reproduced on all copies.
 SOFTWARE.  The public may copy, distribute, prepare derivative works
 and publicly display this SOFTWARE without charge, provided that this
 Notice and any statement of authorship are reproduced on all copies.

-Neither the Government nor the University makes any warranty, express 
+Neither the Government nor the University makes any warranty, express

 or implied, or assumes any liability or responsibility for the use of
 this SOFTWARE.  If SOFTWARE is modified to produce derivative works,
 such modified SOFTWARE should be clearly marked, so as not to confuse
 or implied, or assumes any liability or responsibility for the use of
 this SOFTWARE.  If SOFTWARE is modified to produce derivative works,
 such modified SOFTWARE should be clearly marked, so as not to confuse


@@ -107,14 +107,14 @@ static void sdram_set_registers(const struct mem_controller *ctrl)
        pci_write_config8(north, 0x78, 0x01);
        print_debug_hex8(pci_read_config8(north, 0x78));
 
        pci_write_config8(north, 0x78, 0x01);
        print_debug_hex8(pci_read_config8(north, 0x78));
 

-       // dram control, see the book. 
+       // dram control, see the book.

 #if DIMM_PC133
        pci_write_config8(north, 0x68, 0x52);
 #else
        pci_write_config8(north, 0x68, 0x42);
 #endif
 
 #if DIMM_PC133
        pci_write_config8(north, 0x68, 0x52);
 #else
        pci_write_config8(north, 0x68, 0x42);
 #endif
 

-       // dram control, see the book. 
+       // dram control, see the book.

        pci_write_config8(north, 0x6B, 0x0c);
 
        // Initial setting, 256MB in each bank, will be rewritten later.
        pci_write_config8(north, 0x6B, 0x0c);
 
        // Initial setting, 256MB in each bank, will be rewritten later.


@@ -125,7 +125,7 @@ static void sdram_set_registers(const struct mem_controller *ctrl)
        pci_write_config8(north, 0x5D, 0x80);
        pci_write_config8(north, 0x5E, 0xA0);
        pci_write_config8(north, 0x5F, 0xC0);
        pci_write_config8(north, 0x5D, 0x80);
        pci_write_config8(north, 0x5E, 0xA0);
        pci_write_config8(north, 0x5F, 0xC0);

-       // It seems we have to take care of these 2 registers as if 
+       // It seems we have to take care of these 2 registers as if

        // they are bank 6 and 7.
        pci_write_config8(north, 0x56, 0xC0);
        pci_write_config8(north, 0x57, 0xC0);
        // they are bank 6 and 7.
        pci_write_config8(north, 0x56, 0xC0);
        pci_write_config8(north, 0x57, 0xC0);


@@ -149,7 +149,7 @@ static void sdram_set_registers(const struct mem_controller *ctrl)
 #endif
 
        // dram frequency select.
 #endif
 
        // dram frequency select.

-       // enable 4K pages for 64M dram. 
+       // enable 4K pages for 64M dram.

 #if DIMM_PC133
        pci_write_config8(north, 0x69, 0x3c);
 #else
 #if DIMM_PC133
        pci_write_config8(north, 0x69, 0x3c);
 #else


@@ -181,8 +181,8 @@ static unsigned long spd_module_size(unsigned char slot)
        /* unsigned int module = ((0x50 + slot) << 1) + 1; */
        unsigned int module = 0x50 + slot;
 
        /* unsigned int module = ((0x50 + slot) << 1) + 1; */
        unsigned int module = 0x50 + slot;
 

-       /* is the module there? if byte 2 is not 4, then we'll assume it 
-        * is useless. 
+       /* is the module there? if byte 2 is not 4, then we'll assume it
+        * is useless.

         */
        print_info("Slot ");
        print_info_hex8(slot);
         */
        print_info("Slot ");
        print_info_hex8(slot);


@@ -292,7 +292,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
        pci_write_config8(north, 0x6C, 0x01);
        print_debug("NOP\n");
        /* wait 200us */
        pci_write_config8(north, 0x6C, 0x01);
        print_debug("NOP\n");
        /* wait 200us */

-       // You need to do the memory reference. That causes the nop cycle. 
+       // You need to do the memory reference. That causes the nop cycle.

        dimms_read(0);
        udelay(400);
        print_debug("PRECHARGE\n");
        dimms_read(0);
        udelay(400);
        print_debug("PRECHARGE\n");


@@ -340,7 +340,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
        dimms_read(0);
        udelay(200);
        print_debug("set ref. rate\n");
        dimms_read(0);
        udelay(200);
        print_debug("set ref. rate\n");

-       // Set the refresh rate. 
+       // Set the refresh rate.

 #if DIMM_PC133
        pci_write_config8(north, 0x6A, 0x86);
 #else
 #if DIMM_PC133
        pci_write_config8(north, 0x6A, 0x86);
 #else


@@ -370,7 +370,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
 
                /* Set the MA map type.
                 *
 
                /* Set the MA map type.
                 *

-                * 0xa should be another option, but when 
+                * 0xa should be another option, but when

                 * it would be used is unknown.
                 */
 
                 * it would be used is unknown.
                 */
 

diff --git a/src/northbridge/via/vt8623/northbridge.c b/src/northbridge/via/vt8623/northbridge.c
index 4920ec3973739e0b6ba0d37319ffd9d00712e6d8..7ba9cd63164d8c7af9290ba4517c32f9b136cdf2 100644 (file)
--- a/src/northbridge/via/vt8623/northbridge.c
+++ b/src/northbridge/via/vt8623/northbridge.c
@@ -21,7 +21,7 @@
  * Apparently these registers govern some sort of bus master behavior.
  */
 
  * Apparently these registers govern some sort of bus master behavior.
  */
 

-static void northbridge_init(device_t dev) 
+static void northbridge_init(device_t dev)

 {
        device_t fb_dev;
        unsigned long fb;
 {
        device_t fb_dev;
        unsigned long fb;


@@ -40,7 +40,7 @@ static void northbridge_init(device_t dev)
        pci_write_config8(dev,  0x84, 0x80);
        pci_write_config16(dev, 0x80, 0x610f);
        pci_write_config32(dev, 0x88, 0x00000002);
        pci_write_config8(dev,  0x84, 0x80);
        pci_write_config16(dev, 0x80, 0x610f);
        pci_write_config32(dev, 0x88, 0x00000002);

-       
+

        fb_dev = dev_find_device(PCI_VENDOR_ID_VIA, 0x3122, 0);
        if (fb_dev) {
                /* Fixup GART and framebuffer addresses properly.
        fb_dev = dev_find_device(PCI_VENDOR_ID_VIA, 0x3122, 0);
        if (fb_dev) {
                /* Fixup GART and framebuffer addresses properly.


@@ -168,16 +168,16 @@ static void pci_domain_set_resources(device_t dev)
                for(rambits = 0, i = 0; i < ARRAY_SIZE(ramregs); i++) {
                        unsigned char reg;
                        reg = pci_read_config8(mc_dev, ramregs[i]);
                for(rambits = 0, i = 0; i < ARRAY_SIZE(ramregs); i++) {
                        unsigned char reg;
                        reg = pci_read_config8(mc_dev, ramregs[i]);

-                       /* these are ENDING addresses, not sizes. 
+                       /* these are ENDING addresses, not sizes.

                         * if there is memory in this slot, then reg will be > rambits.
                         * if there is memory in this slot, then reg will be > rambits.

-                        * So we just take the max, that gives us total. 
+                        * So we just take the max, that gives us total.

                         * We take the highest one to cover for once and future coreboot
                         * bugs. We warn about bugs.
                         */
                        if (reg > rambits)
                                rambits = reg;
                        if (reg < rambits)
                         * We take the highest one to cover for once and future coreboot
                         * bugs. We warn about bugs.
                         */
                        if (reg > rambits)
                                rambits = reg;
                        if (reg < rambits)

-                               printk(BIOS_ERR, "ERROR! register 0x%x is not set!\n", 
+                               printk(BIOS_ERR, "ERROR! register 0x%x is not set!\n",

                                        ramregs[i]);
                }
                printk(BIOS_DEBUG, "I would set ram size to 0x%x Kbytes\n", (rambits)*16*1024);
                                        ramregs[i]);
                }
                printk(BIOS_DEBUG, "I would set ram size to 0x%x Kbytes\n", (rambits)*16*1024);


@@ -210,7 +210,7 @@ static struct device_operations pci_domain_ops = {
         .enable_resources = enable_childrens_resources,
         .init             = 0,
         .scan_bus         = pci_domain_scan_bus,
         .enable_resources = enable_childrens_resources,
         .init             = 0,
         .scan_bus         = pci_domain_scan_bus,

-};  
+};

 
 static void cpu_bus_init(device_t dev)
 {
 
 static void cpu_bus_init(device_t dev)
 {

diff --git a/src/northbridge/via/vt8623/raminit.c b/src/northbridge/via/vt8623/raminit.c
index f57127b3daf68268f9389656bae846c509d89446..295011b78539b6de71b95deb3ef1caa5bafe69a5 100644 (file)
--- a/src/northbridge/via/vt8623/raminit.c
+++ b/src/northbridge/via/vt8623/raminit.c
@@ -18,7 +18,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 

-/* 
+/*

   Automatically detect and set up ddr dram on the CLE266 chipset.
   Assumes DDR memory, though chipset also supports SDRAM
   Assumes at least 266Mhz memory as no attempt is made to clock
   Automatically detect and set up ddr dram on the CLE266 chipset.
   Assumes DDR memory, though chipset also supports SDRAM
   Assumes at least 266Mhz memory as no attempt is made to clock


@@ -35,9 +35,9 @@
 
 
 
 
 
 

-void dimm_read(unsigned long bank,unsigned long x) 
+void dimm_read(unsigned long bank,unsigned long x)

 {
 {

-       //unsigned long eax; 
+       //unsigned long eax;

        volatile unsigned long y;
        //eax =  x;
        y = * (volatile unsigned long *) (x+ bank) ;
        volatile unsigned long y;
        //eax =  x;
        y = * (volatile unsigned long *) (x+ bank) ;


@@ -46,7 +46,7 @@ void dimm_read(unsigned long bank,unsigned long x)
 
 
 void
 
 
 void

-dumpnorth(device_t north) 
+dumpnorth(device_t north)

 {
        uint16_t r, c;
        for(r = 0; r < 256; r += 16) {
 {
        uint16_t r, c;
        for(r = 0; r < 256; r += 16) {


@@ -65,7 +65,7 @@ void print_val(char *str, int val)
        print_debug_hex8(val);
 }
 
        print_debug_hex8(val);
 }
 

-static void ddr_ram_setup(const struct mem_controller *ctrl) 
+static void ddr_ram_setup(const struct mem_controller *ctrl)

 {
        device_t north = (device_t) 0;
        uint8_t b, c, bank;
 {
        device_t north = (device_t) 0;
        uint8_t b, c, bank;


@@ -75,7 +75,7 @@ static void ddr_ram_setup(const struct mem_controller *ctrl)
        print_debug("vt8623 init starting\n");
        north = pci_locate_device(PCI_ID(0x1106, 0x3123), 0);
        north = 0;
        print_debug("vt8623 init starting\n");
        north = pci_locate_device(PCI_ID(0x1106, 0x3123), 0);
        north = 0;

-       
+

 
        pci_write_config8(north,0x75,0x08);
 
 
        pci_write_config8(north,0x75,0x08);
 


@@ -105,7 +105,7 @@ static void ddr_ram_setup(const struct mem_controller *ctrl)
        print_val("Detecting Memory\nNumber of Banks ",b);
 
        if( b != 2 ){            // not 16 Mb type
        print_val("Detecting Memory\nNumber of Banks ",b);
 
        if( b != 2 ){            // not 16 Mb type

-       
+

 /*
     Read SPD byte 3, Number of row addresses.
 */
 /*
     Read SPD byte 3, Number of row addresses.
 */


@@ -126,7 +126,7 @@ static void ddr_ram_setup(const struct mem_controller *ctrl)
     64/128Mb chip
 
     Read SPD byte 4, Number of column addresses.
     64/128Mb chip
 
     Read SPD byte 4, Number of column addresses.

-*/             
+*/

                b = smbus_read_byte(0xa0,4);
                print_val("\nNo Columns ",b);
                if( b == 10 || b == 11 ) c |= 0x60;   // 10/11 bit col addr
                b = smbus_read_byte(0xa0,4);
                print_val("\nNo Columns ",b);
                if( b == 10 || b == 11 ) c |= 0x60;   // 10/11 bit col addr


@@ -153,7 +153,7 @@ static void ddr_ram_setup(const struct mem_controller *ctrl)
        if( b & 0x02 ) c = 0x80;         // 2GB
        else if( b & 0x01) c = 0x40;     // 1GB
        else if( b & 0x80) c = 0x20;     // 512Mb
        if( b & 0x02 ) c = 0x80;         // 2GB
        else if( b & 0x01) c = 0x40;     // 1GB
        else if( b & 0x80) c = 0x20;     // 512Mb

-       else if( b & 0x40) c = 0x10;     // 256Mb 
+       else if( b & 0x40) c = 0x10;     // 256Mb

        else if( b & 0x20) c = 0x08;     // 128Mb
        else if( b & 0x10) c = 0x04;     // 64Mb
        else if( b & 0x08) c = 0x02;     // 32Mb
        else if( b & 0x20) c = 0x08;     // 128Mb
        else if( b & 0x10) c = 0x04;     // 64Mb
        else if( b & 0x08) c = 0x02;     // 32Mb


@@ -191,7 +191,7 @@ static void ddr_ram_setup(const struct mem_controller *ctrl)
        print_val("\nCycle time at CL X     (nS)",smbus_read_byte(0xa0,9));
        print_val("\nCycle time at CL X-0.5 (nS)",smbus_read_byte(0xa0,23));
        print_val("\nCycle time at CL X-1   (nS)",smbus_read_byte(0xa0,25));
        print_val("\nCycle time at CL X     (nS)",smbus_read_byte(0xa0,9));
        print_val("\nCycle time at CL X-0.5 (nS)",smbus_read_byte(0xa0,23));
        print_val("\nCycle time at CL X-1   (nS)",smbus_read_byte(0xa0,25));

-       
+

 
        if( b & 0x10 ){             // DDR offering optional CAS 3
                print_debug("\nStarting at CAS 3");
 
        if( b & 0x10 ){             // DDR offering optional CAS 3
                print_debug("\nStarting at CAS 3");


@@ -405,7 +405,7 @@ static void ddr_ram_setup(const struct mem_controller *ctrl)
                /* MSR Enable */
                pci_write_config8(north,0x6b,0x13);
 
                /* MSR Enable */
                pci_write_config8(north,0x6b,0x13);
 

-/* 
+/*

     Mode Register Definition
     with adjustement so that address calculation is correct - 64 bit technology, therefore
     a0-a2 refer to byte within a 64 bit long word, and a3 is the first address line presented
     Mode Register Definition
     with adjustement so that address calculation is correct - 64 bit technology, therefore
     a0-a2 refer to byte within a 64 bit long word, and a3 is the first address line presented


@@ -414,9 +414,9 @@ static void ddr_ram_setup(const struct mem_controller *ctrl)
     MR[9-7]   CAS Latency
     MR[6]     Burst Type 0 = sequential, 1 = interleaved
     MR[5-3]   burst length 001 = 2, 010 = 4, 011 = 8, others reserved
     MR[9-7]   CAS Latency
     MR[6]     Burst Type 0 = sequential, 1 = interleaved
     MR[5-3]   burst length 001 = 2, 010 = 4, 011 = 8, others reserved

-    MR[0-2]   dont care 
+    MR[0-2]   dont care

 
 

-    CAS Latency 
+    CAS Latency

     000       reserved
     001       reserved
     010       2
     000       reserved
     001       reserved
     010       2


@@ -498,10 +498,10 @@ static void ddr_ram_setup(const struct mem_controller *ctrl)
 
                // if everything verified then found low bond
                break;
 
                // if everything verified then found low bond
                break;

-               
+

        }
        }

-       print_val("\nLow Bond ",i);     
-       if( i < 0xff ){ 
+       print_val("\nLow Bond ",i);
+       if( i < 0xff ){

                c = i++;
                for(  ; i <0xff ; i++){
                        pci_write_config8(north,0x68,i ^ (i>>1) );
                c = i++;
                for(  ; i <0xff ; i++){
                        pci_write_config8(north,0x68,i ^ (i>>1) );


@@ -588,7 +588,7 @@ static void ddr_ram_setup(const struct mem_controller *ctrl)
 
 
        pci_write_config8(north,0x71,0xc8);
 
 
        pci_write_config8(north,0x71,0xc8);

-       
+

 
        /* graphics aperture base */
 
 
        /* graphics aperture base */
 

diff --git a/src/northbridge/via/vt8623/vga.c b/src/northbridge/via/vt8623/vga.c
index 7dbb7831b17c5e8436a9c2c94bfffbca69efcb5c..78ffe0aa9439c2f288322b0767f9d7fa6b0f3c22 100644 (file)
--- a/src/northbridge/via/vt8623/vga.c
+++ b/src/northbridge/via/vt8623/vga.c
@@ -57,7 +57,7 @@ static int via_vt8623_int15_handler(struct eregs *regs)
        case 0x5f02:
                regs->eax=0x5f;
                regs->ebx= (regs->ebx & 0xffff0000) | 2;
        case 0x5f02:
                regs->eax=0x5f;
                regs->ebx= (regs->ebx & 0xffff0000) | 2;

-               regs->ecx= (regs->ecx & 0xffff0000) | 0x401;  // PAL + crt only 
+               regs->ecx= (regs->ecx & 0xffff0000) | 0x401;  // PAL + crt only

                regs->edx= (regs->edx & 0xffff0000) | 0;  // TV Layout - default
                res=0;
                break;
                regs->edx= (regs->edx & 0xffff0000) | 0;  // TV Layout - default
                res=0;
                break;


@@ -65,7 +65,7 @@ static int via_vt8623_int15_handler(struct eregs *regs)
                regs->eax=0x860f;
                break;
         default:
                regs->eax=0x860f;
                break;
         default:

-               printk(BIOS_DEBUG, "Unknown INT15 function %04x!\n", 
+               printk(BIOS_DEBUG, "Unknown INT15 function %04x!\n",

                                regs->eax & 0xffff);
                break;
        }
                                regs->eax & 0xffff);
                break;
        }


@@ -122,11 +122,11 @@ static void vga_init(device_t dev)
        //   call_bios_interrupt(0x10,0x4f1f,0x8003,1,0);
        // this is how it looks:
        vga_enable_console();
        //   call_bios_interrupt(0x10,0x4f1f,0x8003,1,0);
        // this is how it looks:
        vga_enable_console();

-       
+

 #ifdef MEASURE_VGA_INIT_TIME
        clocks2 = rdmsr(0x10);
        instructions = rdmsr(0xc2);
 #ifdef MEASURE_VGA_INIT_TIME
        clocks2 = rdmsr(0x10);
        instructions = rdmsr(0xc2);

-       
+

        printk(BIOS_DEBUG, "Clocks 1 = %08x:%08x\n",clocks1.hi,clocks1.lo);
        printk(BIOS_DEBUG, "Clocks 2 = %08x:%08x\n",clocks2.hi,clocks2.lo);
        printk(BIOS_DEBUG, "Instructions = %08x:%08x\n",instructions.hi,instructions.lo);
        printk(BIOS_DEBUG, "Clocks 1 = %08x:%08x\n",clocks1.hi,clocks1.lo);
        printk(BIOS_DEBUG, "Clocks 2 = %08x:%08x\n",clocks2.hi,clocks2.lo);
        printk(BIOS_DEBUG, "Instructions = %08x:%08x\n",instructions.hi,instructions.lo);

diff --git a/src/northbridge/via/vx800/dev_init.c b/src/northbridge/via/vx800/dev_init.c
index c3097cf2cbb8a1b7ea5d76388d1af3dc78b73c92..172a8de148377b2c49a3cf2b0e9fa6ad2e6f9bab 100644 (file)
--- a/src/northbridge/via/vx800/dev_init.c
+++ b/src/northbridge/via/vx800/dev_init.c
@@ -30,8 +30,8 @@ CB_STATUS VerifyChc(void);
 
 /*===================================================================
 Function   : DRAMRegInitValue()
 
 /*===================================================================
 Function   : DRAMRegInitValue()

-Precondition : 
-Input      :  
+Precondition :
+Input      :

                   DramAttr:  pointer point to  DRAM_SYS_ATTR  which consist the DDR and Dimm information
                                    in MotherBoard
 Output     : Void
                   DramAttr:  pointer point to  DRAM_SYS_ATTR  which consist the DDR and Dimm information
                                    in MotherBoard
 Output     : Void


@@ -68,7 +68,7 @@ static const u8 DramRegTbl[][3] = {
        // {0x79, 0x00, 0x8F },
        {0x85, 0x00, 0x00},
        // {0x90, 0x87, 0x78 },
        // {0x79, 0x00, 0x8F },
        {0x85, 0x00, 0x00},
        // {0x90, 0x87, 0x78 },

-       // {0x91, 0x00, 0x46 }, 
+       // {0x91, 0x00, 0x46 },

        {0x40, 0x00, 0x00},
 
        {0, 0, 0}
        {0x40, 0x00, 0x00},
 
        {0, 0, 0}


@@ -155,8 +155,8 @@ void DRAMRegInitValue(DRAM_SYS_ATTR *DramAttr)
 
 /*===================================================================
 Function   : DRAMInitializeProc()
 
 /*===================================================================
 Function   : DRAMInitializeProc()

-Precondition : 
-Input      :  
+Precondition :
+Input      :

                   DramAttr:  pointer point to  DRAM_SYS_ATTR  which consist the DDR and Dimm information
                                    in MotherBoard
 Output     : Void
                   DramAttr:  pointer point to  DRAM_SYS_ATTR  which consist the DDR and Dimm information
                                    in MotherBoard
 Output     : Void


@@ -176,7 +176,7 @@ static BOOLEAN ChkForExistLowBank(void)
        Address = (u32 *) 4;
        *Address = EXIST_TEST_PATTERN;
 
        Address = (u32 *) 4;
        *Address = EXIST_TEST_PATTERN;
 

-       // _asm {WBINVD}   
+       // _asm {WBINVD}

        WaitMicroSec(100);
        Address = (u32 *) 8;
        data32 = *Address;
        WaitMicroSec(100);
        Address = (u32 *) 8;
        data32 = *Address;


@@ -223,7 +223,7 @@ void DRAMInitializeProc(DRAM_SYS_ATTR *DramAttr)
                        SetEndingAddr(DramAttr, idx, 0x10); /* Assume 1G size */
                        if (idx < 4) /* CHA init */
                                InitDDR2CHA(DramAttr);  // temp wjb 2007/1 only for compiling
                        SetEndingAddr(DramAttr, idx, 0x10); /* Assume 1G size */
                        if (idx < 4) /* CHA init */
                                InitDDR2CHA(DramAttr);  // temp wjb 2007/1 only for compiling

-                       // in the function InitDDR2,the parameter is no need   
+                       // in the function InitDDR2,the parameter is no need

                        Status = ChkForExistLowBank();
                        if (Status == TRUE) {
                                PRINT_DEBUG_MEM(" S\r");
                        Status = ChkForExistLowBank();
                        if (Status == TRUE) {
                                PRINT_DEBUG_MEM(" S\r");


@@ -247,8 +247,8 @@ void DRAMInitializeProc(DRAM_SYS_ATTR *DramAttr)
 
 /*===================================================================
 Function   : DRAMSetVRNUM()
 
 /*===================================================================
 Function   : DRAMSetVRNUM()

-Precondition : 
-Input      :  
+Precondition :
+Input      :

                   DramAttr:  pointer point to  DRAM_SYS_ATTR  which consist the DDR and Dimm information
                                    in MotherBoard
                  PhyRank:   Physical Rank number
                   DramAttr:  pointer point to  DRAM_SYS_ATTR  which consist the DDR and Dimm information
                                    in MotherBoard
                  PhyRank:   Physical Rank number


@@ -285,14 +285,14 @@ void DRAMSetVRNum(DRAM_SYS_ATTR *DramAttr, u8 PhyRank /* physical rank */,
 
 /*===================================================================
 Function   : SetEndingAddr()
 
 /*===================================================================
 Function   : SetEndingAddr()

-Precondition : 
-Input      :  
+Precondition :
+Input      :

                   DramAttr:  pointer point to  DRAM_SYS_ATTR  which consist the DDR and Dimm information
                                    in MotherBoard
                  VirRank:    Virtual Rank number
                   DramAttr:  pointer point to  DRAM_SYS_ATTR  which consist the DDR and Dimm information
                                    in MotherBoard
                  VirRank:    Virtual Rank number

-                 Value:       (value) add or subtract value to this and after banks 
+                 Value:       (value) add or subtract value to this and after banks

 Output     : Void
 Output     : Void

-Purpose   : Set ending address of virtual rank specified by VirRank 
+Purpose   : Set ending address of virtual rank specified by VirRank

 ===================================================================*/
 
 void SetEndingAddr(DRAM_SYS_ATTR *DramAttr, u8 VirRank /* ending address
 ===================================================================*/
 
 void SetEndingAddr(DRAM_SYS_ATTR *DramAttr, u8 VirRank /* ending address


@@ -312,8 +312,8 @@ void SetEndingAddr(DRAM_SYS_ATTR *DramAttr, u8 VirRank /* ending address
 
 /*===================================================================
 Function   : InitDDR2()
 
 /*===================================================================
 Function   : InitDDR2()

-Precondition : 
-Input      :  
+Precondition :
+Input      :

                   DramAttr:  pointer point to  DRAM_SYS_ATTR  which consist the DDR and Dimm information
                                    in MotherBoard
 Output     : Void
                   DramAttr:  pointer point to  DRAM_SYS_ATTR  which consist the DDR and Dimm information
                                    in MotherBoard
 Output     : Void


@@ -522,13 +522,13 @@ void InitDDR2CHA(DRAM_SYS_ATTR *DramAttr)
 
 /*===================================================================
 Function   : InitDDR2_CHB()
 
 /*===================================================================
 Function   : InitDDR2_CHB()

-Precondition : 
-Input      :  
+Precondition :
+Input      :

                   DramAttr:  pointer point to  DRAM_SYS_ATTR  which consist the DDR and Dimm information
                                    in MotherBoard
 Output     : Void
 Purpose   : Initialize DDR2 of CHB by standard sequence
                   DramAttr:  pointer point to  DRAM_SYS_ATTR  which consist the DDR and Dimm information
                                    in MotherBoard
 Output     : Void
 Purpose   : Initialize DDR2 of CHB by standard sequence

-Reference  : 
+Reference  :

 ===================================================================*/
 /*//                            DLL:         Enable                              Reset
 static const  u32 CHB_MRS_DLL_150[2] = { 0x00020200 | (1 << 20), 0x00000800 }; // with 150 ohm (A17=1, A9=1), (A11=1)(cpu address)
 ===================================================================*/
 /*//                            DLL:         Enable                              Reset
 static const  u32 CHB_MRS_DLL_150[2] = { 0x00020200 | (1 << 20), 0x00000800 }; // with 150 ohm (A17=1, A9=1), (A11=1)(cpu address)


@@ -569,7 +569,7 @@ void InitDDR2CHB(
 
     Data = 0x80;
     pci_write_config8(MEMCTRL, 0x54, Data);
 
     Data = 0x80;
     pci_write_config8(MEMCTRL, 0x54, Data);

-       
+

     // step3.
     //disable bank paging and multi page
     Data=pci_read_config8(MEMCTRL, 0x69);
     // step3.
     //disable bank paging and multi page
     Data=pci_read_config8(MEMCTRL, 0x69);


@@ -579,18 +579,18 @@ void InitDDR2CHB(
     Data=pci_read_config8(MEMCTRL, 0xd3);
     Data |= 0x80;
     pci_write_config8(MEMCTRL, 0xd3, Data);
     Data=pci_read_config8(MEMCTRL, 0xd3);
     Data |= 0x80;
     pci_write_config8(MEMCTRL, 0xd3, Data);

-       
+

     //step 4. Initialize CHB begin
     Data=pci_read_config8(MEMCTRL, 0xd3);
     Data |= 0x40;
     pci_write_config8(MEMCTRL, 0xd3, Data);
     //step 4. Initialize CHB begin
     Data=pci_read_config8(MEMCTRL, 0xd3);
     Data |= 0x40;
     pci_write_config8(MEMCTRL, 0xd3, Data);

-       
+

     //Step 5. NOP command enable
     Data=pci_read_config8(MEMCTRL, 0xd7);
     Data &= 0xC7;
     Data  |= 0x08;
     pci_write_config8(MEMCTRL, 0xd7, Data);
     //Step 5. NOP command enable
     Data=pci_read_config8(MEMCTRL, 0xd7);
     Data &= 0xC7;
     Data  |= 0x08;
     pci_write_config8(MEMCTRL, 0xd7, Data);

-   
+

     //Step 6.  issue a nop cycle,RegD3[7]  0 -> 1
     Data=pci_read_config8(MEMCTRL, 0xd3);
     Data &= 0x7F;
     //Step 6.  issue a nop cycle,RegD3[7]  0 -> 1
     Data=pci_read_config8(MEMCTRL, 0xd3);
     Data &= 0x7F;


@@ -604,7 +604,7 @@ void InitDDR2CHB(
     // Loop 200us
     for (Idx = 0; Idx < 0x10; Idx++)
         WaitMicroSec(10);
     // Loop 200us
     for (Idx = 0; Idx < 0x10; Idx++)
         WaitMicroSec(10);

-       
+

     // Step 8.
     // all banks precharge command enable
     Data=pci_read_config8(MEMCTRL, 0xd7);
     // Step 8.
     // all banks precharge command enable
     Data=pci_read_config8(MEMCTRL, 0xd7);


@@ -618,7 +618,7 @@ void InitDDR2CHB(
     pci_write_config8(MEMCTRL, 0xd3, Data);
     Data |=  0x80;
     pci_write_config8(MEMCTRL, 0xd3, Data);
     pci_write_config8(MEMCTRL, 0xd3, Data);
     Data |=  0x80;
     pci_write_config8(MEMCTRL, 0xd3, Data);

-       
+

    //step10. EMRS enable
     Data=pci_read_config8(MEMCTRL, 0xd7);
     Data &= 0xC7;
    //step10. EMRS enable
     Data=pci_read_config8(MEMCTRL, 0xd7);
     Data &= 0xC7;


@@ -661,7 +661,7 @@ void InitDDR2CHB(
     Data |= 0x00;
     pci_write_config8(MEMCTRL, 0xd3, Data);
 
     Data |= 0x00;
     pci_write_config8(MEMCTRL, 0xd3, Data);
 

-    //step 14. MSR DLL Reset 
+    //step 14. MSR DLL Reset

     AccessAddr = CHB_MRS_DLL_150[1] >> 3;
     Data =(u8) (AccessAddr & 0xff);
     pci_write_config8(MEMCTRL, 0xd9, Data);
     AccessAddr = CHB_MRS_DLL_150[1] >> 3;
     Data =(u8) (AccessAddr & 0xff);
     pci_write_config8(MEMCTRL, 0xd9, Data);


@@ -691,7 +691,7 @@ void InitDDR2CHB(
     Data |= 0x10;
     pci_write_config8(MEMCTRL, 0xd7, Data);
 
     Data |= 0x10;
     pci_write_config8(MEMCTRL, 0xd7, Data);
 

-   
+

    // step17. issue precharge all cycle
     Data=pci_read_config8(MEMCTRL, 0xd3);
     Data &= 0x7F;
    // step17. issue precharge all cycle
     Data=pci_read_config8(MEMCTRL, 0xd3);
     Data &= 0x7F;


@@ -718,7 +718,7 @@ void InitDDR2CHB(
 
     WaitMicroSec(200);
     }
 
     WaitMicroSec(200);
     }

-       
+

     //step22. MSR enable
     Data=pci_read_config8(MEMCTRL, 0xd7);
     Data &= 0xC7;
     //step22. MSR enable
     Data=pci_read_config8(MEMCTRL, 0xd7);
     Data &= 0xC7;


@@ -730,7 +730,7 @@ void InitDDR2CHB(
     Data |= 0x00;
     pci_write_config8(MEMCTRL, 0xd3, Data);
 
     Data |= 0x00;
     pci_write_config8(MEMCTRL, 0xd3, Data);
 

-  
+

     //the SDRAM parameters.(Burst Length, CAS# Latency , Write recovery etc.)
     //-------------------------------------------------------------
     //Burst Length : really offset Rx6c[1]
     //the SDRAM parameters.(Burst Length, CAS# Latency , Write recovery etc.)
     //-------------------------------------------------------------
     //Burst Length : really offset Rx6c[1]


@@ -773,7 +773,7 @@ void InitDDR2CHB(
     pci_write_config8(MEMCTRL, 0xd3, Data);
     Data |=  0x80;
     pci_write_config8(MEMCTRL, 0xd3, Data);
     pci_write_config8(MEMCTRL, 0xd3, Data);
     Data |=  0x80;
     pci_write_config8(MEMCTRL, 0xd3, Data);

-       
+

     //step 25. EMRS enable
     Data=pci_read_config8(MEMCTRL, 0xd7);
     Data &= 0xC7;
     //step 25. EMRS enable
     Data=pci_read_config8(MEMCTRL, 0xd7);
     Data &= 0xC7;


@@ -784,7 +784,7 @@ void InitDDR2CHB(
     Data &= 0xC7;
     Data |= 0x08;
     pci_write_config8(MEMCTRL, 0xd3, Data);
     Data &= 0xC7;
     Data |= 0x08;
     pci_write_config8(MEMCTRL, 0xd3, Data);

-       
+

 
     //step 26. OCD default
      AccessAddr = (CHB_OCD_Default_150ohm) >> 3;
 
     //step 26. OCD default
      AccessAddr = (CHB_OCD_Default_150ohm) >> 3;


@@ -805,7 +805,7 @@ void InitDDR2CHB(
     pci_write_config8(MEMCTRL, 0xd3, Data);
     Data |=  0x80;
     pci_write_config8(MEMCTRL, 0xd3, Data);
     pci_write_config8(MEMCTRL, 0xd3, Data);
     Data |=  0x80;
     pci_write_config8(MEMCTRL, 0xd3, Data);

-       
+

      //step 25. EMRS enable
     Data=pci_read_config8(MEMCTRL, 0xd7);
     Data &= 0xC7;
      //step 25. EMRS enable
     Data=pci_read_config8(MEMCTRL, 0xd7);
     Data &= 0xC7;


@@ -859,12 +859,12 @@ void InitDDR2CHB(
     Data |= 0x00;
     pci_write_config8(MEMCTRL, 0xd3, Data);
 
     Data |= 0x00;
     pci_write_config8(MEMCTRL, 0xd3, Data);
 

-    //step 31.  exit the initialization mode 
+    //step 31.  exit the initialization mode

     Data=pci_read_config8(MEMCTRL, 0xd3);
     Data &= 0xBF;
     pci_write_config8(MEMCTRL, 0xd3, Data);
 
     Data=pci_read_config8(MEMCTRL, 0xd3);
     Data &= 0xBF;
     pci_write_config8(MEMCTRL, 0xd3, Data);
 

-       
+

     //step 32. Enable bank paging and multi page
     Data=pci_read_config8(MEMCTRL, 0x69);
     Data |= 0x03;
     //step 32. Enable bank paging and multi page
     Data=pci_read_config8(MEMCTRL, 0x69);
     Data |= 0x03;


@@ -874,13 +874,13 @@ void InitDDR2CHB(
 
 /*===================================================================
 Function   : InitDDR2CHC()
 
 /*===================================================================
 Function   : InitDDR2CHC()

-Precondition : 
-Input      :  
+Precondition :
+Input      :

                   DramAttr:  pointer point to  DRAM_SYS_ATTR  which consist the DDR and Dimm information
                                    in MotherBoard
 Output     : Void
 Purpose   : Initialize DDR2 of CHC by standard sequence
                   DramAttr:  pointer point to  DRAM_SYS_ATTR  which consist the DDR and Dimm information
                                    in MotherBoard
 Output     : Void
 Purpose   : Initialize DDR2 of CHC by standard sequence

-Reference  : 
+Reference  :

 ===================================================================*/
 //                      DDR2                 CL=2          CL=3 CL=4   CL=5     (Burst type=interleave)(WR fine tune in code)
 static const u16 CHC_MRS_table[4] = { 0x22B, 0x23B, 0x24B, 0x25B };    // Use 1X-bandwidth MA table to init DRAM
 ===================================================================*/
 //                      DDR2                 CL=2          CL=3 CL=4   CL=5     (Burst type=interleave)(WR fine tune in code)
 static const u16 CHC_MRS_table[4] = { 0x22B, 0x23B, 0x24B, 0x25B };    // Use 1X-bandwidth MA table to init DRAM


@@ -1102,7 +1102,7 @@ void InitDDR2CHC(DRAM_SYS_ATTR *DramAttr)
        Status = VerifyChc();
        if (Status != CB_SUCCESS)
                PRINT_DEBUG_MEM("Error!!!!CHC init error!\r");
        Status = VerifyChc();
        if (Status != CB_SUCCESS)
                PRINT_DEBUG_MEM("Error!!!!CHC init error!\r");

-       //step 31.  exit the initialization mode 
+       //step 31.  exit the initialization mode

        Data = pci_read_config8(MEMCTRL, 0xdb);
        Data &= 0x9F;
        pci_write_config8(MEMCTRL, 0xdb, Data);
        Data = pci_read_config8(MEMCTRL, 0xdb);
        Data &= 0x9F;
        pci_write_config8(MEMCTRL, 0xdb, Data);

diff --git a/src/northbridge/via/vx800/dqs_search.c b/src/northbridge/via/vx800/dqs_search.c
index 785d775bafe2633b0947a775191e7c745214c7f5..c4971d1b17f1317f73916a35578a94822779b8eb 100644 (file)
--- a/src/northbridge/via/vx800/dqs_search.c
+++ b/src/northbridge/via/vx800/dqs_search.c
@@ -22,8 +22,8 @@ void SetDQSOutputCHB(DRAM_SYS_ATTR * DramAttr);
 
 /*===================================================================
 Function   : DRAMDQSOutputSearchCHA()
 
 /*===================================================================
 Function   : DRAMDQSOutputSearchCHA()

-Precondition : 
-Input      :  
+Precondition :
+Input      :

                   DramAttr:  pointer point to  DRAM_SYS_ATTR  which consist the DDR and Dimm information
                                    in MotherBoard
 Output     : Void
                   DramAttr:  pointer point to  DRAM_SYS_ATTR  which consist the DDR and Dimm information
                                    in MotherBoard
 Output     : Void


@@ -40,12 +40,12 @@ void DRAMDQSOutputSearch(DRAM_SYS_ATTR * DramAttr)
 
 /*===================================================================
 Function   : SetDQSOutputCHA()
 
 /*===================================================================
 Function   : SetDQSOutputCHA()

-Precondition : 
-Input      :  
+Precondition :
+Input      :

                   DramAttr:  pointer point to  DRAM_SYS_ATTR  which consist the DDR and Dimm information
                                    in MotherBoard
 Output     : Void
                   DramAttr:  pointer point to  DRAM_SYS_ATTR  which consist the DDR and Dimm information
                                    in MotherBoard
 Output     : Void

-Purpose   :  according the frequence set CHA DQS output 
+Purpose   :  according the frequence set CHA DQS output

 ===================================================================*/
 void SetDQSOutputCHA(DRAM_SYS_ATTR * DramAttr)
 {
 ===================================================================*/
 void SetDQSOutputCHA(DRAM_SYS_ATTR * DramAttr)
 {


@@ -80,8 +80,8 @@ void SetDQSOutputCHA(DRAM_SYS_ATTR * DramAttr)
 
 /*===================================================================
 Function   : DRAMDQSInputSearch()
 
 /*===================================================================
 Function   : DRAMDQSInputSearch()

-Precondition : 
-Input      :  
+Precondition :
+Input      :

                   DramAttr:  pointer point to  DRAM_SYS_ATTR  which consist the DDR and Dimm information
                                    in MotherBoard
 Output     : Void
                   DramAttr:  pointer point to  DRAM_SYS_ATTR  which consist the DDR and Dimm information
                                    in MotherBoard
 Output     : Void

diff --git a/src/northbridge/via/vx800/dram_util.c b/src/northbridge/via/vx800/dram_util.c
index 342a6e0454ae6b063931161b987333ac9e2da39f..7688ab34a8226f47b5c30a5fc108c655a6ba2b11 100644 (file)
--- a/src/northbridge/via/vx800/dram_util.c
+++ b/src/northbridge/via/vx800/dram_util.c
@@ -30,11 +30,11 @@ void WaitMicroSec(UINTN MicroSeconds)
 
 /*===================================================================
 Function   : via_write_phys()
 
 /*===================================================================
 Function   : via_write_phys()

-Precondition : 
+Precondition :

 Input      :  addr
                   value
 Output     : void
 Input      :  addr
                   value
 Output     : void

-Purpose    : 
+Purpose    :

 Reference  : None
 ===================================================================*/
 
 Reference  : None
 ===================================================================*/
 


@@ -47,10 +47,10 @@ void via_write_phys(volatile u32 addr, volatile u32 value)
 
 /*===================================================================
 Function   : via_read_phys()
 
 /*===================================================================
 Function   : via_read_phys()

-Precondition : 
+Precondition :

 Input      :  addr
 Input      :  addr

-Output     : u32 
-Purpose    : 
+Output     : u32
+Purpose    :

 Reference  : None
 ===================================================================*/
 
 Reference  : None
 ===================================================================*/
 


@@ -63,10 +63,10 @@ u32 via_read_phys(volatile u32 addr)
 
 /*===================================================================
 Function   : DimmRead()
 
 /*===================================================================
 Function   : DimmRead()

-Precondition : 
+Precondition :

 Input      :  x
 Input      :  x

-Output     : u32 
-Purpose    : 
+Output     : u32
+Purpose    :

 Reference  : None
 ===================================================================*/
 
 Reference  : None
 ===================================================================*/
 


@@ -80,13 +80,13 @@ u32 DimmRead(volatile u32 x)
 
 /*===================================================================
 Function   : DramBaseTest()
 
 /*===================================================================
 Function   : DramBaseTest()

-Precondition : this function used to verify memory  
-Input      :  
+Precondition : this function used to verify memory
+Input      :

                  BaseAdd,
                  length,
                  mode
 Output     : u32
                  BaseAdd,
                  length,
                  mode
 Output     : u32

-Purpose    :write into and read out to verify if dram is correct 
+Purpose    :write into and read out to verify if dram is correct

 Reference  : None
 ===================================================================*/
 BOOLEAN DramBaseTest(u32 BaseAdd, u32 Length,
 Reference  : None
 ===================================================================*/
 BOOLEAN DramBaseTest(u32 BaseAdd, u32 Length,


@@ -170,8 +170,8 @@ BOOLEAN DramBaseTest(u32 BaseAdd, u32 Length,
 
 /*===================================================================
 Function   : DumpRegisters()
 
 /*===================================================================
 Function   : DumpRegisters()

-Precondition : 
-Input      :  
+Precondition :
+Input      :

                 pPCIPPI,
                 DevNum,
                 FuncNum
                 pPCIPPI,
                 DevNum,
                 FuncNum


@@ -209,8 +209,8 @@ void DumpRegisters(INTN DevNum, INTN FuncNum)
 
 /*===================================================================
 Function   : dumpnorth()
 
 /*===================================================================
 Function   : dumpnorth()

-Precondition : 
-Input      :  
+Precondition :
+Input      :

                 pPCIPPI,
                 Func
 Output     : Void
                 pPCIPPI,
                 Func
 Output     : Void

diff --git a/src/northbridge/via/vx800/driving_setting.c b/src/northbridge/via/vx800/driving_setting.c
index c6a7edda056b7584127e20057a3f87dfe54318fa..bdba494d8561eada84882fdc86877e690962d690 100644 (file)
--- a/src/northbridge/via/vx800/driving_setting.c
+++ b/src/northbridge/via/vx800/driving_setting.c
@@ -58,7 +58,7 @@ void DRAMDriving(DRAM_SYS_ATTR * DramAttr)
 /*
 ODT    Control for DQ/DQS/CKE/SCMD/DCLKO in ChA & ChB
 which include driving enable/range and strong/weak selection
 /*
 ODT    Control for DQ/DQS/CKE/SCMD/DCLKO in ChA & ChB
 which include driving enable/range and strong/weak selection

- 
+

 Processing: According to DRAM frequency to ODT control bits.
                Because function enable bit must be the last one to be set.
                So the register VIA_NB3DRAM_REGD4 and VIA_NB3DRAM_REGD3 should be
 Processing: According to DRAM frequency to ODT control bits.
                Because function enable bit must be the last one to be set.
                So the register VIA_NB3DRAM_REGD4 and VIA_NB3DRAM_REGD3 should be


@@ -125,7 +125,7 @@ static const u8 ODTLookup_TBL[ODTLookup_Tbl_count][3] = {
 };
 
 #define ODT_Table_Width_DDR2           4
 };
 
 #define ODT_Table_Width_DDR2           4

-//                                                                                               RxD6   RxD3 
+//                                                                                               RxD6   RxD3

 static const u8 ODT_Control_DDR2[ODT_Table_Width_DDR2] = { 0xFC, 0x01 };
 
 void DrivingODT(DRAM_SYS_ATTR * DramAttr)
 static const u8 ODT_Control_DDR2[ODT_Table_Width_DDR2] = { 0xFC, 0x01 };
 
 void DrivingODT(DRAM_SYS_ATTR * DramAttr)

diff --git a/src/northbridge/via/vx800/examples/driving_clk_phase_data.c b/src/northbridge/via/vx800/examples/driving_clk_phase_data.c
index a93c9a03c43b75a1958a00e119a43ba95f4991bb..5e8e214d1faad2b1e2dbc9451da00abdee74a686 100644 (file)
--- a/src/northbridge/via/vx800/examples/driving_clk_phase_data.c
+++ b/src/northbridge/via/vx800/examples/driving_clk_phase_data.c
@@ -20,7 +20,7 @@
 
  #include "northbridge/via/vx800/driving_clk_phase_data.h"
 
 
  #include "northbridge/via/vx800/driving_clk_phase_data.h"
 

-// DQS Driving  
+// DQS Driving

 //Reg0xE0, 0xE1
 // According to #Bank to set DRAM DQS Driving
 //                               #Bank    1     2     3     4     5     6     7     8
 //Reg0xE0, 0xE1
 // According to #Bank to set DRAM DQS Driving
 //                               #Bank    1     2     3     4     5     6     7     8


@@ -161,7 +161,7 @@ static const  u8 DDR2_ChA_WrtData_Phase_Table[WrtData_REG_NUM ][WrtData_FREQ_NUM
         {0x8C,  0xFC,  0x03,  0x03,  0x03,  0x03 }
     };
 
         {0x8C,  0xFC,  0x03,  0x03,  0x03,  0x03 }
     };
 

-/*static const  u8 DDR2_ChB_WrtData_Phase_Table[WrtData_REG_NUM ][WrtData_FREQ_NUM] = 
+/*static const  u8 DDR2_ChB_WrtData_Phase_Table[WrtData_REG_NUM ][WrtData_FREQ_NUM] =

     {
         //    (And NOT) DDR800 DDR667 DDR533 DDR400
         //Reg  Mask  Value Value Value Value
     {
         //    (And NOT) DDR800 DDR667 DDR533 DDR400
         //Reg  Mask  Value Value Value Value

diff --git a/src/northbridge/via/vx800/examples/romstage.c b/src/northbridge/via/vx800/examples/romstage.c
index 8db60237b743f45a1bd7ea7f8cd2cac5c5e6187b..63755c3181c44c3c0537b813f60f18f5d55dc151 100644 (file)
--- a/src/northbridge/via/vx800/examples/romstage.c
+++ b/src/northbridge/via/vx800/examples/romstage.c
@@ -362,7 +362,7 @@ g)      Rx73h = 32h
        /* decide if this is a s3 wakeup or a normal boot */
        boot_mode = acpi_is_wakeup_early_via_vx800();
        /*add this, to transfer "cpu restart" to "cold boot"
        /* decide if this is a s3 wakeup or a normal boot */
        boot_mode = acpi_is_wakeup_early_via_vx800();
        /*add this, to transfer "cpu restart" to "cold boot"

-          When this boot is not a S3 resume, and PCI registers had been written, 
+          When this boot is not a S3 resume, and PCI registers had been written,

           then this must be a cpu restart(result of os reboot cmd). so we need a real "cold boot". */
        if ((boot_mode != 3)
            && (pci_read_config8(PCI_DEV(0, 0, 3), 0x80) != 0)) {
           then this must be a cpu restart(result of os reboot cmd). so we need a real "cold boot". */
        if ((boot_mode != 3)
            && (pci_read_config8(PCI_DEV(0, 0, 3), 0x80) != 0)) {


@@ -371,7 +371,7 @@ g)      Rx73h = 32h
 
        /*x86 cold boot I/O cmd */
        enable_smbus();
 
        /*x86 cold boot I/O cmd */
        enable_smbus();

-       //smbus_fixup(&ctrl);// this fix does help vx800!, but vx855 no need this 
+       //smbus_fixup(&ctrl);// this fix does help vx800!, but vx855 no need this

 
        if (bist == 0) {
                // CAR need mtrr untill mem is ok, so i disable this early_mtrr_init();
 
        if (bist == 0) {
                // CAR need mtrr untill mem is ok, so i disable this early_mtrr_init();


@@ -441,7 +441,7 @@ g)      Rx73h = 32h
 
        /*
           For coreboot most time of S3 resume is the same as normal boot, so some memory area under 1M become dirty,
 
        /*
           For coreboot most time of S3 resume is the same as normal boot, so some memory area under 1M become dirty,

-          so before this happen, I need to backup the content of mem to top-mem. 
+          so before this happen, I need to backup the content of mem to top-mem.

           I will reserve the 1M top-men in LBIO table in coreboot_table.c and recovery the content of 1M-mem in wakeup.c
         */
 #if PAYLOAD_IS_SEABIOS==1      //
           I will reserve the 1M top-men in LBIO table in coreboot_table.c and recovery the content of 1M-mem in wakeup.c
         */
 #if PAYLOAD_IS_SEABIOS==1      //


@@ -449,7 +449,7 @@ g)      Rx73h = 32h
                /*   some idea of Libo.Feng at amd.com in  http://www.coreboot.org/pipermail/coreboot/2008-December/043111.html
                   I want move the 1M data, I have to set some MTRRs myself. */
                /* seting mtrr before back memoy save s3 resume time about 0.14 seconds */
                /*   some idea of Libo.Feng at amd.com in  http://www.coreboot.org/pipermail/coreboot/2008-December/043111.html
                   I want move the 1M data, I have to set some MTRRs myself. */
                /* seting mtrr before back memoy save s3 resume time about 0.14 seconds */

-               /*because CAR stack use cache, and here to use cache , must be careful, 
+               /*because CAR stack use cache, and here to use cache , must be careful,

                   1 during these mtrr code, must no function call, (after this mtrr, I think it should be ok to use function)
                   2 before stack switch, no use variable that have value set before this
                   3 due to 2, take care of "cpu_reset", I directlly set it to ZERO.
                   1 during these mtrr code, must no function call, (after this mtrr, I think it should be ok to use function)
                   2 before stack switch, no use variable that have value set before this
                   3 due to 2, take care of "cpu_reset", I directlly set it to ZERO.


@@ -462,7 +462,7 @@ g)      Rx73h = 32h
                u32 memtop4 =
                    *(u32 *) WAKE_MEM_INFO - 64 * 1024 - 0x100000 +
                    0xe0000;
                u32 memtop4 =
                    *(u32 *) WAKE_MEM_INFO - 64 * 1024 - 0x100000 +
                    0xe0000;

-               /*      __asm__ volatile (              
+               /*      __asm__ volatile (

                   "movl    $0x204, %%ecx\n\t"
                   "xorl    %%edx, %%edx\n\t"
                   "movl     %0,%%eax\n\t"
                   "movl    $0x204, %%ecx\n\t"
                   "xorl    %%edx, %%edx\n\t"
                   "movl     %0,%%eax\n\t"


@@ -478,7 +478,7 @@ g)      Rx73h = 32h
                   "wrmsr\n\t"
                   ::"g"(memtop2)
                   );
                   "wrmsr\n\t"
                   ::"g"(memtop2)
                   );

-                  __asm__ volatile (           
+                  __asm__ volatile (

                   "movl    $0x206, %%ecx\n\t"
                   "xorl    %%edx, %%edx\n\t"
                   "movl     %0,%%eax\n\t"
                   "movl    $0x206, %%ecx\n\t"
                   "xorl    %%edx, %%edx\n\t"
                   "movl     %0,%%eax\n\t"


@@ -494,7 +494,7 @@ g)      Rx73h = 32h
                   "wrmsr\n\t"
                   ::"g"(memtop1)
                   );
                   "wrmsr\n\t"
                   ::"g"(memtop1)
                   );

-                  __asm__ volatile (       
+                  __asm__ volatile (

                   "movl    $0x208, %ecx\n\t"
                   "xorl    %edx, %edx\n\t"
                   "movl    $0,%eax\n\t"
                   "movl    $0x208, %ecx\n\t"
                   "xorl    %edx, %edx\n\t"
                   "movl    $0,%eax\n\t"


@@ -512,21 +512,21 @@ g)      Rx73h = 32h
                 */
                // WAKE_MEM_INFO is  inited in get_set_top_available_mem in tables.c
                // these two memcpy not not be enabled if set the MTRR around this two lines.
                 */
                // WAKE_MEM_INFO is  inited in get_set_top_available_mem in tables.c
                // these two memcpy not not be enabled if set the MTRR around this two lines.

-               /*__asm__ volatile (            
+               /*__asm__ volatile (

                                "movl    $0, %%esi\n\t"
         "movl    %0, %%edi\n\t"
                "movl    $0xa0000, %%ecx\n\t"
                "shrl    $2, %%ecx\n\t"
                                "movl    $0, %%esi\n\t"
         "movl    %0, %%edi\n\t"
                "movl    $0xa0000, %%ecx\n\t"
                "shrl    $2, %%ecx\n\t"

-        "rep movsd\n\t"    
-        ::"g"(memtop3)        
+        "rep movsd\n\t"
+        ::"g"(memtop3)

        );
        );

-       __asm__ volatile (              
+       __asm__ volatile (

                                "movl    $0xe0000, %%esi\n\t"
         "movl    %0, %%edi\n\t"
                "movl    $0x20000, %%ecx\n\t"
                "shrl    $2, %%ecx\n\t"
                                "movl    $0xe0000, %%esi\n\t"
         "movl    %0, %%edi\n\t"
                "movl    $0x20000, %%ecx\n\t"
                "shrl    $2, %%ecx\n\t"

-        "rep movsd\n\t"    
-        ::"g"(memtop4)        
+        "rep movsd\n\t"
+        ::"g"(memtop4)

        );*/
                print_debug("copy memory to high memory to protect s3 wakeup vector code \n");  //this can have function call, because no variable used before this
                memcpy((unsigned char *) ((*(u32 *) WAKE_MEM_INFO) -
        );*/
                print_debug("copy memory to high memory to protect s3 wakeup vector code \n");  //this can have function call, because no variable used before this
                memcpy((unsigned char *) ((*(u32 *) WAKE_MEM_INFO) -


@@ -537,22 +537,22 @@ g)      Rx73h = 32h
                       (unsigned char *) 0xe0000, 0x20000);
 
                /* restore the MTRR previously modified. */
                       (unsigned char *) 0xe0000, 0x20000);
 
                /* restore the MTRR previously modified. */

-/*             __asm__ volatile (      
-        "wbinvd\n\t"                           
+/*             __asm__ volatile (
+        "wbinvd\n\t"

         "xorl    %edx, %edx\n\t"
                "xorl    %eax, %eax\n\t"
                "movl    $0x204, %ecx\n\t"
         "wrmsr\n\t"
         "xorl    %edx, %edx\n\t"
                "xorl    %eax, %eax\n\t"
                "movl    $0x204, %ecx\n\t"
         "wrmsr\n\t"

-                               "movl    $0x205, %ecx\n\t"                                      
-        "wrmsr\n\t"        
+                               "movl    $0x205, %ecx\n\t"
+        "wrmsr\n\t"

                                "movl    $0x206, %ecx\n\t"
         "wrmsr\n\t"
                                "movl    $0x206, %ecx\n\t"
         "wrmsr\n\t"

-                               "movl    $0x207, %ecx\n\t"                     
-        "wrmsr\n\t"        
-                               "movl    $0x208, %ecx\n\t"                     
-        "wrmsr\n\t"        
-                               "movl    $0x209, %ecx\n\t"                     
-        "wrmsr\n\t"        
+                               "movl    $0x207, %ecx\n\t"
+        "wrmsr\n\t"
+                               "movl    $0x208, %ecx\n\t"
+        "wrmsr\n\t"
+                               "movl    $0x209, %ecx\n\t"
+        "wrmsr\n\t"

                );*/
        }
 #endif
                );*/
        }
 #endif

diff --git a/src/northbridge/via/vx800/final_setting.c b/src/northbridge/via/vx800/final_setting.c
index 97cc21820a957a20d824f738d9d87beced4e7d8f..9ec31b58da6f454b7e5db6246a825c3c9fe81e51 100644 (file)
--- a/src/northbridge/via/vx800/final_setting.c
+++ b/src/northbridge/via/vx800/final_setting.c
@@ -64,8 +64,8 @@ void DRAMRefreshCounter(DRAM_SYS_ATTR * DramAttr)
 
 /*===================================================================
 Function   : DRAMRegFinalValue()
 
 /*===================================================================
 Function   : DRAMRegFinalValue()

-Precondition : 
-Input      :  
+Precondition :
+Input      :

                   DramAttr:  pointer point to  DRAM_SYS_ATTR  which consist the DDR and Dimm information
                                    in MotherBoard
 Output     : Void
                   DramAttr:  pointer point to  DRAM_SYS_ATTR  which consist the DDR and Dimm information
                                    in MotherBoard
 Output     : Void

diff --git a/src/northbridge/via/vx800/freq_setting.c b/src/northbridge/via/vx800/freq_setting.c
index 47a99c3cc11a7ee36083880ba2fb9382b442501e..03daeec3428d17b942275b836113ee896d454bef 100644 (file)
--- a/src/northbridge/via/vx800/freq_setting.c
+++ b/src/northbridge/via/vx800/freq_setting.c
@@ -230,7 +230,7 @@ void CalcCLAndFreq(DRAM_SYS_ATTR * DramAttr)
                DramAttr->DramFreq = DIMMFREQ_200;
                DramAttr->DramCyc = 1000;
        }
                DramAttr->DramFreq = DIMMFREQ_200;
                DramAttr->DramCyc = 1000;
        }

-       //if set the frequence mannul                
+       //if set the frequence mannul

        PRINT_DEBUG_MEM("Dram Frequency:");
        PRINT_DEBUG_MEM_HEX16(DramAttr->DramFreq);
        PRINT_DEBUG_MEM(" \r");
        PRINT_DEBUG_MEM("Dram Frequency:");
        PRINT_DEBUG_MEM_HEX16(DramAttr->DramFreq);
        PRINT_DEBUG_MEM(" \r");

diff --git a/src/northbridge/via/vx800/northbridge.c b/src/northbridge/via/vx800/northbridge.c
index 4dfe843bae562f146228cc8ef6231e805abfe2df..37e559c02646e4028baba56c9bfc1c0d5ad1484b 100644 (file)
--- a/src/northbridge/via/vx800/northbridge.c
+++ b/src/northbridge/via/vx800/northbridge.c
@@ -118,7 +118,7 @@ static u32 find_pci_tolm(struct bus *bus)
 
 static void pci_domain_set_resources(device_t dev)
 {
 
 static void pci_domain_set_resources(device_t dev)
 {

-       /* 
+       /*

         * the order is important to find the correct ram size.
         */
        u8 ramregs[] = { 0x43, 0x42, 0x41, 0x40 };
         * the order is important to find the correct ram size.
         */
        u8 ramregs[] = { 0x43, 0x42, 0x41, 0x40 };

diff --git a/src/northbridge/via/vx800/rank_map.c b/src/northbridge/via/vx800/rank_map.c
index 6c88c68953893f8d2d1ea8890e5231443c39f81f..3eada63329220cdf2f80fecc6f60fe0649303cd4 100644 (file)
--- a/src/northbridge/via/vx800/rank_map.c
+++ b/src/northbridge/via/vx800/rank_map.c
@@ -32,8 +32,8 @@ void DRAMPRToVRMapping(DRAM_SYS_ATTR * DramAttr);
 
 /*===================================================================
 Function   : DRAMBankInterleave()
 
 /*===================================================================
 Function   : DRAMBankInterleave()

-Precondition : 
-Input        : 
+Precondition :
+Input        :

                   DramAttr: pointer point to  DRAMSYSATTR  which consist the DDR and Dimm information in MotherBoard
 Output     :  Void
 Purpose   :  STEP 13 Set Bank Interleave  VIANB3DRAMREG69[7:6] 00:No Interleave 01:2 Bank 10:4 Bank    11:8 Bank
                   DramAttr: pointer point to  DRAMSYSATTR  which consist the DDR and Dimm information in MotherBoard
 Output     :  Void
 Purpose   :  STEP 13 Set Bank Interleave  VIANB3DRAMREG69[7:6] 00:No Interleave 01:2 Bank 10:4 Bank    11:8 Bank


@@ -85,11 +85,11 @@ void DRAMBankInterleave(DRAM_SYS_ATTR * DramAttr)
 
 /*===================================================================
 Function   : DRAMSizingMATypeM()
 
 /*===================================================================
 Function   : DRAMSizingMATypeM()

-Precondition : 
+Precondition :

 Input        :
                   DramAttr: pointer point to  DRAMSYSATTR  which consist the DDR and Dimm information in MotherBoard
 Output     :  Void
 Input        :
                   DramAttr: pointer point to  DRAMSYSATTR  which consist the DDR and Dimm information in MotherBoard
 Output     :  Void

- Purpose  : STEP 14  1 DRAM Sizing 2  Fill MA type 3 Prank to vrankMapping 
+ Purpose  : STEP 14  1 DRAM Sizing 2  Fill MA type 3 Prank to vrankMapping

 ===================================================================*/
 void DRAMSizingMATypeM(DRAM_SYS_ATTR * DramAttr)
 {
 ===================================================================*/
 void DRAMSizingMATypeM(DRAM_SYS_ATTR * DramAttr)
 {


@@ -103,8 +103,8 @@ void DRAMSizingMATypeM(DRAM_SYS_ATTR * DramAttr)
 
 /*===================================================================
 Function   : DRAMClearEndingAddress()
 
 /*===================================================================
 Function   : DRAMClearEndingAddress()

-Precondition : 
-Input        : 
+Precondition :
+Input        :

                   DramAttr: pointer point to  DRAMSYSATTR  which consist the DDR and Dimm information in MotherBoard
 Output     : Void
 Purpose   : clear Ending and Start adress from 0x40-4f to zero
                   DramAttr: pointer point to  DRAMSYSATTR  which consist the DDR and Dimm information in MotherBoard
 Output     : Void
 Purpose   : clear Ending and Start adress from 0x40-4f to zero


@@ -120,8 +120,8 @@ void DRAMClearEndingAddress(DRAM_SYS_ATTR * DramAttr)
 
 /*===================================================================
 Function   : DRAMSizingEachRank()
 
 /*===================================================================
 Function   : DRAMSizingEachRank()

-Precondition : 
-Input        : 
+Precondition :
+Input        :

                   DramAttr: pointer point to  DRAMSYSATTR  which consist the DDR and Dimm information in MotherBoard
 Output     : Void
 Purpose   : Sizing each Rank invidually, by number of rows column banks pins, be care about 128bit
                   DramAttr: pointer point to  DRAMSYSATTR  which consist the DDR and Dimm information in MotherBoard
 Output     : Void
 Purpose   : Sizing each Rank invidually, by number of rows column banks pins, be care about 128bit


@@ -189,8 +189,8 @@ void DRAMSizingEachRank(DRAM_SYS_ATTR * DramAttr)
 
 /*===================================================================
 Function   : DRAMSetRankMAType()
 
 /*===================================================================
 Function   : DRAMSetRankMAType()

-Precondition : 
-Input       : 
+Precondition :
+Input       :

                  DramAttr: pointer point to  DRAMSYSATTR  which consist the DDR and Dimm information in MotherBoard
 Output     : Void
 Purpose   : set the matype Reg by MAMapTypeTbl, which the rule can be found in memoryinit
                  DramAttr: pointer point to  DRAMSYSATTR  which consist the DDR and Dimm information in MotherBoard
 Output     : Void
 Purpose   : set the matype Reg by MAMapTypeTbl, which the rule can be found in memoryinit


@@ -258,11 +258,11 @@ void DRAMSetRankMAType(DRAM_SYS_ATTR * DramAttr)
 
 /*===================================================================
 Function   : DRAMSetEndingAddress()
 
 /*===================================================================
 Function   : DRAMSetEndingAddress()

-Precondition : 
-Input      :  
+Precondition :
+Input      :

                  DramAttr: pointer point to  DRAMSYSATTR  which consist the DDR and Dimm information in MotherBoard
 Output     : Void
                  DramAttr: pointer point to  DRAMSYSATTR  which consist the DDR and Dimm information in MotherBoard
 Output     : Void

-Purpose   : realize the Vrank 40...Reg (Start and Ending Regs). Vrank have  same order with phy Rank, Size is actual Size  
+Purpose   : realize the Vrank 40...Reg (Start and Ending Regs). Vrank have  same order with phy Rank, Size is actual Size

 ===================================================================*/
 void DRAMSetEndingAddress(DRAM_SYS_ATTR * DramAttr)
 {
 ===================================================================*/
 void DRAMSetEndingAddress(DRAM_SYS_ATTR * DramAttr)
 {


@@ -311,8 +311,8 @@ void DRAMSetEndingAddress(DRAM_SYS_ATTR * DramAttr)
 
 /*===================================================================
 Function   : DRAMPRToVRMapping()
 
 /*===================================================================
 Function   : DRAMPRToVRMapping()

-Precondition : 
-Input       : 
+Precondition :
+Input       :

                  DramAttr: pointer point to  DRAMSYSATTR  which consist the DDR and Dimm information in MotherBoard
 Output     : Void
 Purpose   : set the Vrank-prank map with the same order
                  DramAttr: pointer point to  DRAMSYSATTR  which consist the DDR and Dimm information in MotherBoard
 Output     : Void
 Purpose   : set the Vrank-prank map with the same order

diff --git a/src/northbridge/via/vx800/timing_setting.c b/src/northbridge/via/vx800/timing_setting.c
index a1d8e748123236880900cd1c9f2090320457423a..7668b22e0baebafd1bf76f980eaeab59bbf353fb 100644 (file)
--- a/src/northbridge/via/vx800/timing_setting.c
+++ b/src/northbridge/via/vx800/timing_setting.c
@@ -72,7 +72,7 @@ void DRAMTimingSetting(DRAM_SYS_ATTR * DramAttr)
 
 /*
 Set DRAM Timing: CAS Latency for DDR1
 
 /*
 Set DRAM Timing: CAS Latency for DDR1

-D0F3RX62 bit[0:2] for CAS Latency; 
+D0F3RX62 bit[0:2] for CAS Latency;

 */
 void SetCL(DRAM_SYS_ATTR * DramAttr)
 {
 */
 void SetCL(DRAM_SYS_ATTR * DramAttr)
 {

diff --git a/src/northbridge/via/vx800/uma_ram_setting.c b/src/northbridge/via/vx800/uma_ram_setting.c
index 72420981ffec07b43ccb452be84aa926602a5107..6fe81949228e8916fb7b36c1ab3895c50ffabd8f 100644 (file)
--- a/src/northbridge/via/vx800/uma_ram_setting.c
+++ b/src/northbridge/via/vx800/uma_ram_setting.c
@@ -139,7 +139,7 @@ void SetUMARam(void)
 
 //      vga_dev = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VX855_VGA, 0);
 
 
 //      vga_dev = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VX855_VGA, 0);
 

-       //RxB2 may be for S.L. and RxB1 may be for L. L. 
+       //RxB2 may be for S.L. and RxB1 may be for L. L.

        // It is different from Spec.
        ByteVal = SLD1F0Val;
        pci_write_config8(vga_dev, 0xb2, ByteVal);
        // It is different from Spec.
        ByteVal = SLD1F0Val;
        pci_write_config8(vga_dev, 0xb2, ByteVal);


@@ -256,7 +256,7 @@ void SetUMARam(void)
        }
        outb(ByteVal, 0x03d5);
 
        }
        outb(ByteVal, 0x03d5);
 

-       // Set frame buffer size 
+       // Set frame buffer size

        outb(0x39, 0x03c4);
        outb(1 << SLD0F3Val, 0x03c5);
 
        outb(0x39, 0x03c4);
        outb(1 << SLD0F3Val, 0x03c5);
 


@@ -295,7 +295,7 @@ void SetUMARam(void)
        SLBase = (RamSize << 26) - (UmaSize << 20);
 
        outb(0x6D, 0x03c4);
        SLBase = (RamSize << 26) - (UmaSize << 20);
 
        outb(0x6D, 0x03c4);

-       //SL Base[28:21] 
+       //SL Base[28:21]

        outb((u8) ((SLBase >> 21) & 0xFF), 0x03c5);
 
        outb(0x6e, 0x03c4);
        outb((u8) ((SLBase >> 21) & 0xFF), 0x03c5);
 
        outb(0x6e, 0x03c4);

diff --git a/src/northbridge/via/vx800/vga.c b/src/northbridge/via/vx800/vga.c
index 3897e010b593fbbff29254157d8a252fa61eacf3..7bdc3418f1d86bff1f963b16b0424299fa2dd422 100644 (file)
--- a/src/northbridge/via/vx800/vga.c
+++ b/src/northbridge/via/vx800/vga.c
@@ -62,19 +62,19 @@ static int via_vx800_int15_handler(struct eregs *regs)
        case 0x5f18:
        {
                /*
        case 0x5f18:
        {
                /*

-                * BL Bit[7:4] 
-                * Memory Data Rate 
-                * 0000: 66MHz 
-                * 0001: 100MHz 
-                * 0010: 133MHz 
-                * 0011: 200MHz ( DDR200 ) 
-                * 0100: 266MHz ( DDR266 ) 
-                * 0101: 333MHz ( DDR333 ) 
-                * 0110: 400MHz ( DDR400 ) 
-                * 0111: 533MHz ( DDR I/II 533 
+                * BL Bit[7:4]
+                * Memory Data Rate
+                * 0000: 66MHz
+                * 0001: 100MHz
+                * 0010: 133MHz
+                * 0011: 200MHz ( DDR200 )
+                * 0100: 266MHz ( DDR266 )
+                * 0101: 333MHz ( DDR333 )
+                * 0110: 400MHz ( DDR400 )
+                * 0111: 533MHz ( DDR I/II 533

                 * 1000: 667MHz ( DDR I/II 667)
                 * 1000: 667MHz ( DDR I/II 667)

-                * Bit[3:0]  
-                * N:  Frame Buffer Size 2^N  MB 
+                * Bit[3:0]
+                * N:  Frame Buffer Size 2^N  MB

                 */
                u8 i;
                device_t dev;
                 */
                u8 i;
                device_t dev;


@@ -109,7 +109,7 @@ static int via_vx800_int15_handler(struct eregs *regs)
        case 0x5f02:
                regs->eax=0x5f;
                regs->ebx= (regs->ebx & 0xffff0000) | 2;
        case 0x5f02:
                regs->eax=0x5f;
                regs->ebx= (regs->ebx & 0xffff0000) | 2;

-               regs->ecx= (regs->ecx & 0xffff0000) | 0x401;  // PAL + crt only 
+               regs->ecx= (regs->ecx & 0xffff0000) | 0x401;  // PAL + crt only

                regs->edx= (regs->edx & 0xffff0000) | 0;  // TV Layout - default
                res=0;
                break;
                regs->edx= (regs->edx & 0xffff0000) | 0;  // TV Layout - default
                res=0;
                break;


@@ -118,7 +118,7 @@ static int via_vx800_int15_handler(struct eregs *regs)
                res = 0;
                break;
         default:
                res = 0;
                break;
         default:

-               printk(BIOS_DEBUG, "Unknown INT15 function %04x!\n", 
+               printk(BIOS_DEBUG, "Unknown INT15 function %04x!\n",

                                regs->eax & 0xffff);
                regs->eax = 0;
                break;
                                regs->eax & 0xffff);
                regs->eax = 0;
                break;

diff --git a/src/northbridge/via/vx800/vx800_early_serial.c b/src/northbridge/via/vx800/vx800_early_serial.c
index 6462a2d295b7eb46712e517e35be4f518c145aa7..8bac43ff123350742bb3b27b094f7c4be46b7ba3 100644 (file)
--- a/src/northbridge/via/vx800/vx800_early_serial.c
+++ b/src/northbridge/via/vx800/vx800_early_serial.c
@@ -70,7 +70,7 @@ static void enable_vx800_serial(void)
        // turn on pnp
        vx800_writepnpaddr(0x87);
        vx800_writepnpaddr(0x87);
        // turn on pnp
        vx800_writepnpaddr(0x87);
        vx800_writepnpaddr(0x87);

-       // now go ahead and set up com1. 
+       // now go ahead and set up com1.

        // set address
        vx800_writepnpaddr(0x7);
        vx800_writepnpdata(0x2);
        // set address
        vx800_writepnpaddr(0x7);
        vx800_writepnpdata(0x2);

diff --git a/src/northbridge/via/vx800/vx800_early_smbus.c b/src/northbridge/via/vx800/vx800_early_smbus.c
index 7ba9b41acb6b513664c5863172ee702a300f4be7..e40d54d721f87e27cf8355562161610be24c519b 100644 (file)
--- a/src/northbridge/via/vx800/vx800_early_smbus.c
+++ b/src/northbridge/via/vx800/vx800_early_smbus.c
@@ -171,10 +171,10 @@ static void enable_smbus(void)
 }
 
 /**
 }
 
 /**

- * A fixup for some systems that need time for the SMBus to "warm up". This is 
- * needed on some VT823x based systems, where the SMBus spurts out bad data for 
- * a short time after power on. This has been seen on the VIA Epia series and 
- * Jetway J7F2-series. It reads the ID byte from SMBus, looking for 
+ * A fixup for some systems that need time for the SMBus to "warm up". This is
+ * needed on some VT823x based systems, where the SMBus spurts out bad data for
+ * a short time after power on. This has been seen on the VIA Epia series and
+ * Jetway J7F2-series. It reads the ID byte from SMBus, looking for

  * known-good data from a slot/address. Exits on either good data or a timeout.
  *
  * TODO: This should probably go into some global file, but one would need to
  * known-good data from a slot/address. Exits on either good data or a timeout.
  *
  * TODO: This should probably go into some global file, but one would need to

diff --git a/src/northbridge/via/vx800/vx800_lpc.c b/src/northbridge/via/vx800/vx800_lpc.c
index 874f32fbbd5a9bd387f6906d1d985ba8bc9f82b4..ce2d8229461da793052301e82c6dd103bd9818e3 100644 (file)
--- a/src/northbridge/via/vx800/vx800_lpc.c
+++ b/src/northbridge/via/vx800/vx800_lpc.c
@@ -42,9 +42,9 @@ static const unsigned char sd_ms_ctrl_Pins[4] = { 'B', 'C', 'D', 'A' };       //only I
 static const unsigned char ce_ata_nf_ctrl_Pins[4] = { 'C', 'C', 'D', 'A' };    //only INTA
 static const unsigned char idePins[4] = { 'B', 'C', 'D', 'A' };        //only INTA
 
 static const unsigned char ce_ata_nf_ctrl_Pins[4] = { 'C', 'C', 'D', 'A' };    //only INTA
 static const unsigned char idePins[4] = { 'B', 'C', 'D', 'A' };        //only INTA
 

-static const unsigned char usbPins[4] = { 'A', 'B', 'C', 'D' };        //all 4 
+static const unsigned char usbPins[4] = { 'A', 'B', 'C', 'D' };        //all 4

 
 

-static const unsigned char hdacaudioPins[4] = { 'B', 'C', 'D', 'A' };  //only INTA 
+static const unsigned char hdacaudioPins[4] = { 'B', 'C', 'D', 'A' };  //only INTA

 
 static unsigned char *pin_to_irq(const unsigned char *pin)
 {
 
 static unsigned char *pin_to_irq(const unsigned char *pin)
 {


@@ -218,7 +218,7 @@ static void S3_ps2_kb_ms_wakeup(struct device *dev)
        pci_write_config8(dev, 0x51, enables);
 
        outb(inb(VX800_ACPI_IO_BASE + 0x02) | 0x20, VX800_ACPI_IO_BASE + 0x02); //ACPI golabe enable for sci smi trigger
        pci_write_config8(dev, 0x51, enables);
 
        outb(inb(VX800_ACPI_IO_BASE + 0x02) | 0x20, VX800_ACPI_IO_BASE + 0x02); //ACPI golabe enable for sci smi trigger

-       outw(inw(VX800_ACPI_IO_BASE + 0x22) | 0x204, VX800_ACPI_IO_BASE + 0x22);        //ACPI SCI on Internal KBC PME and mouse PME  
+       outw(inw(VX800_ACPI_IO_BASE + 0x22) | 0x204, VX800_ACPI_IO_BASE + 0x22);        //ACPI SCI on Internal KBC PME and mouse PME

 
 }
 
 
 }
 


@@ -354,17 +354,17 @@ static void southbridge_init(struct device *dev)
                fadt->pm2_cnt_len = 1;//to support cpu-c3
        #2
                ssdt? ->every cpu has a P_BLK address. set it to 0x10 (so that "Read Processor Level3 register(PMIORx15<7:0>) to enter C3 state"---VIA vx800 P SPEC )
                fadt->pm2_cnt_len = 1;//to support cpu-c3
        #2
                ssdt? ->every cpu has a P_BLK address. set it to 0x10 (so that "Read Processor Level3 register(PMIORx15<7:0>) to enter C3 state"---VIA vx800 P SPEC )

-       #3    write 0x17 in to PMIO=VX800_ACPI_IO_BASE + 0x26, following the describtion in the P-spec. 
+       #3    write 0x17 in to PMIO=VX800_ACPI_IO_BASE + 0x26, following the describtion in the P-spec.

               1  enable SLP# asserts in C3 state  PMIORx26<1> =1
                2    enable CPUSTP# asserts in C3 state;  PMIORx26<2> =1
                3  CLKRUN# is always asserted  PMIORx26<3> =0
               1  enable SLP# asserts in C3 state  PMIORx26<1> =1
                2    enable CPUSTP# asserts in C3 state;  PMIORx26<2> =1
                3  CLKRUN# is always asserted  PMIORx26<3> =0

-               4    Disable PCISTP# When CLKRUN# is asserted 
-               1: PCISTP# will not assert When CLKRUN# is asserted 
+               4    Disable PCISTP# When CLKRUN# is asserted
+               1: PCISTP# will not assert When CLKRUN# is asserted

                PMIORx26<4> =1
                PMIORx26<4> =1

-               5  This bit controls whether the CPU voltage is lowered when in C3/S1 state.     
-               VRDSLP will be active in either this bit set in C3 or LVL4 register read 
+               5  This bit controls whether the CPU voltage is lowered when in C3/S1 state.
+               VRDSLP will be active in either this bit set in C3 or LVL4 register read

                PMIORx26<0> =0
                PMIORx26<0> =0

-               6  Read Processor Level3 register(PMIORx15<7:0>) to enter C3 state  PMIORx15 
+               6  Read Processor Level3 register(PMIORx15<7:0>) to enter C3 state  PMIORx15

        */
        outb(0x17, VX800_ACPI_IO_BASE + 0x26);
 
        */
        outb(0x17, VX800_ACPI_IO_BASE + 0x26);
 

diff --git a/src/pc80/Makefile.inc b/src/pc80/Makefile.inc
index 43190fd07102e288014f5bc6e16905af867a7495..358c2218568e6937784879d28012ce0cfd4020f7 100644 (file)
--- a/src/pc80/Makefile.inc
+++ b/src/pc80/Makefile.inc
@@ -1,6 +1,6 @@
 obj-y += mc146818rtc.o
 obj-y += isa-dma.o
 obj-y += mc146818rtc.o
 obj-y += isa-dma.o

-obj-y += i8259.o 
+obj-y += i8259.o

 obj-$(CONFIG_UDELAY_IO) += udelay_io.o
 obj-y += keyboard.o
 
 obj-$(CONFIG_UDELAY_IO) += udelay_io.o
 obj-y += keyboard.o
 

diff --git a/src/pc80/i8259.c b/src/pc80/i8259.c
index 330b7c642827ad089350606175f07138af0dd8e4..66988753cfe3152ccf5d682e96ac1273339efbf9 100644 (file)
--- a/src/pc80/i8259.c
+++ b/src/pc80/i8259.c
@@ -75,7 +75,7 @@ void setup_i8259(void)
        outb(INT_VECTOR_MASTER | IRQ0, MASTER_PIC_ICW2);
        outb(INT_VECTOR_SLAVE  | IRQ8, SLAVE_PIC_ICW2);
 
        outb(INT_VECTOR_MASTER | IRQ0, MASTER_PIC_ICW2);
        outb(INT_VECTOR_SLAVE  | IRQ8, SLAVE_PIC_ICW2);
 

-       /* Now the interrupt controller expects us to write to ICW3. 
+       /* Now the interrupt controller expects us to write to ICW3.

         *
         * The normal scenario is to set up cascading on IRQ2 on the master
         * i8259 and assign the slave ID 2 to the slave i8259.
         *
         * The normal scenario is to set up cascading on IRQ2 on the master
         * i8259 and assign the slave ID 2 to the slave i8259.


@@ -89,9 +89,9 @@ void setup_i8259(void)
         * operating as part of an x86 architecture based chipset
         */
        outb(MICROPROCESSOR_MODE, MASTER_PIC_ICW2);
         * operating as part of an x86 architecture based chipset
         */
        outb(MICROPROCESSOR_MODE, MASTER_PIC_ICW2);

-       outb(MICROPROCESSOR_MODE, SLAVE_PIC_ICW2);              
+       outb(MICROPROCESSOR_MODE, SLAVE_PIC_ICW2);

 
 

-       /* Now clear the interrupts through OCW1. 
+       /* Now clear the interrupts through OCW1.

         * First we mask off all interrupts on the slave interrupt controller
         * then we mask off all interrupts but interrupt 2 on the master
         * controller. This way the cascading stays alife.
         * First we mask off all interrupts on the slave interrupt controller
         * then we mask off all interrupts but interrupt 2 on the master
         * controller. This way the cascading stays alife.

diff --git a/src/pc80/mc146818rtc.c b/src/pc80/mc146818rtc.c
index 4bee1cdffe5d94a3cacd83f16317ededbc3a94a3..078bde273c793fc0f233d795dac1116e1265e269 100644 (file)
--- a/src/pc80/mc146818rtc.c
+++ b/src/pc80/mc146818rtc.c
@@ -156,7 +156,7 @@ void rtc_init(int invalid)
 
        if (invalid || cmos_invalid || checksum_invalid) {
                printk(BIOS_WARNING, "RTC:%s%s%s zeroing cmos\n",
 
        if (invalid || cmos_invalid || checksum_invalid) {
                printk(BIOS_WARNING, "RTC:%s%s%s zeroing cmos\n",

-                       invalid?" Clear requested":"", 
+                       invalid?" Clear requested":"",

                        cmos_invalid?" Power Problem":"",
                        checksum_invalid?" Checksum invalid":"");
 #if 0
                        cmos_invalid?" Power Problem":"",
                        checksum_invalid?" Checksum invalid":"");
 #if 0


@@ -166,7 +166,7 @@ void rtc_init(int invalid)
                for(i = 10; i < 48; i++) {
                        cmos_write(0, i);
                }
                for(i = 10; i < 48; i++) {
                        cmos_write(0, i);
                }

-               
+

                if (cmos_invalid) {
                        /* Now setup a default date of Sat 1 January 2000 */
                        cmos_write(0, 0x00); /* seconds */
                if (cmos_invalid) {
                        /* Now setup a default date of Sat 1 January 2000 */
                        cmos_write(0, 0x00); /* seconds */


@@ -218,7 +218,7 @@ static int get_cmos_value(unsigned long bit, unsigned long length, void *vret)
        unsigned long i;
        unsigned char uchar;
 
        unsigned long i;
        unsigned char uchar;
 

-       /* The table is checked when it is built to ensure all 
+       /* The table is checked when it is built to ensure all

                values are valid. */
        ret = vret;
        byte=bit/8;     /* find the byte where the data starts */
                values are valid. */
        ret = vret;
        byte=bit/8;     /* find the byte where the data starts */


@@ -248,7 +248,7 @@ int get_option(void *dest, const char *name)
 
        /* Figure out how long name is */
        namelen = strnlen(name, CMOS_MAX_NAME_LENGTH);
 
        /* Figure out how long name is */
        namelen = strnlen(name, CMOS_MAX_NAME_LENGTH);

-       
+

        /* find the requested entry record */
        ct=&option_table;
        ce=(struct cmos_entries*)((unsigned char *)ct + ct->header_length);
        /* find the requested entry record */
        ct=&option_table;
        ce=(struct cmos_entries*)((unsigned char *)ct + ct->header_length);


@@ -263,7 +263,7 @@ int get_option(void *dest, const char *name)
                printk(BIOS_DEBUG, "WARNING: No CMOS option '%s'.\n", name);
                return(-2);
        }
                printk(BIOS_DEBUG, "WARNING: No CMOS option '%s'.\n", name);
                return(-2);
        }

-       
+

        if(get_cmos_value(ce->bit, ce->length, dest))
                return(-3);
        if(!rtc_checksum_valid(LB_CKS_RANGE_START,
        if(get_cmos_value(ce->bit, ce->length, dest))
                return(-3);
        if(!rtc_checksum_valid(LB_CKS_RANGE_START,

diff --git a/src/pc80/mc146818rtc_early.c b/src/pc80/mc146818rtc_early.c
index 87fc3f0a61b7d6d8e9678f27ac6b9f6a8506a9d0..fa1f388804b5ac0812827eee607ae3f5946ff695 100644 (file)
--- a/src/pc80/mc146818rtc_early.c
+++ b/src/pc80/mc146818rtc_early.c
@@ -88,7 +88,7 @@ static inline int do_normal_boot(void)
 
        /* The RTC_BOOT_BYTE is now o.k. see where to go. */
        byte = cmos_read(RTC_BOOT_BYTE);
 
        /* The RTC_BOOT_BYTE is now o.k. see where to go. */
        byte = cmos_read(RTC_BOOT_BYTE);

-       
+

        /* Are we in normal mode? */
        if (byte & 1) {
                byte &= 0x0f; /* yes, clear the boot count */
        /* Are we in normal mode? */
        if (byte & 1) {
                byte &= 0x0f; /* yes, clear the boot count */

diff --git a/src/pc80/serial.c b/src/pc80/serial.c
index 837d1123382ce8b6fd4491acb88b7f1a5d557e48..b4d05428249d2493414bd654398c5f2e0e37bb1c 100644 (file)
--- a/src/pc80/serial.c
+++ b/src/pc80/serial.c
@@ -53,14 +53,14 @@ static int uart_can_tx_byte(void)
 
 static void uart_wait_to_tx_byte(void)
 {
 
 static void uart_wait_to_tx_byte(void)
 {

-       while(!uart_can_tx_byte()) 
+       while(!uart_can_tx_byte())

        ;
 }
 
 static void uart_wait_until_sent(void)
 {
        while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
        ;
 }
 
 static void uart_wait_until_sent(void)
 {
        while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))

-       ; 
+       ;

 }
 
 static void uart_tx_byte(unsigned char data)
 }
 
 static void uart_tx_byte(unsigned char data)


@@ -109,6 +109,6 @@ void uart_init(void)
        uart8250_init(CONFIG_TTYS0_BASE, ttys0_div, UART_LCS);
 #else
        uart8250_init(CONFIG_TTYS0_BASE, CONFIG_TTYS0_DIV, UART_LCS);
        uart8250_init(CONFIG_TTYS0_BASE, ttys0_div, UART_LCS);
 #else
        uart8250_init(CONFIG_TTYS0_BASE, CONFIG_TTYS0_DIV, UART_LCS);

-#endif 
+#endif

 }
 #endif
 }
 #endif

diff --git a/src/southbridge/amd/amd8111/amd8111.c b/src/southbridge/amd/amd8111/amd8111.c
index 1390065c094a0f1fa868bc0e4f12b7c23abaef7c..2707ca6b4337f41075c8b764e919c6740d93bcb4 100644 (file)
--- a/src/southbridge/amd/amd8111/amd8111.c
+++ b/src/southbridge/amd/amd8111/amd8111.c
@@ -13,8 +13,8 @@ void amd8111_enable(device_t dev)
 
        /* See if we are on the bus behind the amd8111 pci bridge */
        bus_dev = dev->bus->dev;
 
        /* See if we are on the bus behind the amd8111 pci bridge */
        bus_dev = dev->bus->dev;

-       if ((bus_dev->vendor == PCI_VENDOR_ID_AMD) && 
-           (bus_dev->device == PCI_DEVICE_ID_AMD_8111_PCI)) 
+       if ((bus_dev->vendor == PCI_VENDOR_ID_AMD) &&
+           (bus_dev->device == PCI_DEVICE_ID_AMD_8111_PCI))

        {
                unsigned devfn;
                devfn = bus_dev->path.pci.devfn + (1 << 3);
        {
                unsigned devfn;
                devfn = bus_dev->path.pci.devfn + (1 << 3);


@@ -33,7 +33,7 @@ void amd8111_enable(device_t dev)
                return;
        }
        if ((lpc_dev->vendor != PCI_VENDOR_ID_AMD) ||
                return;
        }
        if ((lpc_dev->vendor != PCI_VENDOR_ID_AMD) ||

-           (lpc_dev->device != PCI_DEVICE_ID_AMD_8111_ISA)) 
+           (lpc_dev->device != PCI_DEVICE_ID_AMD_8111_ISA))

        {
                uint32_t id;
                id = pci_read_config32(lpc_dev, PCI_VENDOR_ID);
        {
                uint32_t id;
                id = pci_read_config32(lpc_dev, PCI_VENDOR_ID);


@@ -66,7 +66,7 @@ void amd8111_enable(device_t dev)
 
 struct chip_operations southbridge_amd_amd8111_ops = {
        CHIP_NAME("AMD-8111 Southbridge")
 
 struct chip_operations southbridge_amd_amd8111_ops = {
        CHIP_NAME("AMD-8111 Southbridge")

-       /* This only called when this device is listed in the 
+       /* This only called when this device is listed in the

        * static device tree.
        */
        .enable_dev = amd8111_enable,
        * static device tree.
        */
        .enable_dev = amd8111_enable,

diff --git a/src/southbridge/amd/amd8111/amd8111_ac97.c b/src/southbridge/amd/amd8111/amd8111_ac97.c
index 697915e002a213ddc9ee34ccd6fcecdcce9e9769..f49c9bfd5f95798fe175bcb32c63f3ab63f114f2 100644 (file)
--- a/src/southbridge/amd/amd8111/amd8111_ac97.c
+++ b/src/southbridge/amd/amd8111/amd8111_ac97.c
@@ -10,7 +10,7 @@
 
 static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 {
 
 static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 {

-       pci_write_config32(dev, 0x2c, 
+       pci_write_config32(dev, 0x2c,

                ((device & 0xffff) << 16) | (vendor & 0xffff));
 }
 
                ((device & 0xffff) << 16) | (vendor & 0xffff));
 }
 

diff --git a/src/southbridge/amd/amd8111/amd8111_acpi.c b/src/southbridge/amd/amd8111/amd8111_acpi.c
index 32e3808a984c968158b35b72e4f7887510fb25e0..2ad54b78f6717c084ca4798c60a38465b70c58ec 100644 (file)
--- a/src/southbridge/amd/amd8111/amd8111_acpi.c
+++ b/src/southbridge/amd/amd8111/amd8111_acpi.c
@@ -28,7 +28,7 @@ static int lsmbus_recv_byte(device_t dev)
 
        device = dev->path.i2c.device;
        res = find_resource(get_pbus_smbus(dev)->dev, 0x58);
 
        device = dev->path.i2c.device;
        res = find_resource(get_pbus_smbus(dev)->dev, 0x58);

-       
+

        return do_smbus_recv_byte(res->base, device);
 }
 
        return do_smbus_recv_byte(res->base, device);
 }
 


@@ -51,7 +51,7 @@ static int lsmbus_read_byte(device_t dev, uint8_t address)
 
        device = dev->path.i2c.device;
        res = find_resource(get_pbus_smbus(dev)->dev, 0x58);
 
        device = dev->path.i2c.device;
        res = find_resource(get_pbus_smbus(dev)->dev, 0x58);

-       
+

        return do_smbus_read_byte(res->base, device, address);
 }
 
        return do_smbus_read_byte(res->base, device, address);
 }
 


@@ -62,7 +62,7 @@ static int lsmbus_write_byte(device_t dev, uint8_t address, uint8_t val)
 
        device = dev->path.i2c.device;
        res = find_resource(get_pbus_smbus(dev)->dev, 0x58);
 
        device = dev->path.i2c.device;
        res = find_resource(get_pbus_smbus(dev)->dev, 0x58);

-       
+

        return do_smbus_write_byte(res->base, device, address, val);
 }
 
        return do_smbus_write_byte(res->base, device, address, val);
 }
 


@@ -109,7 +109,7 @@ static void acpi_init(struct device *dev)
         */
        byte = pci_read_config8(dev, 0x41);
        pci_write_config8(dev, 0x41, byte | (1<<6)|(1<<5));
         */
        byte = pci_read_config8(dev, 0x41);
        pci_write_config8(dev, 0x41, byte | (1<<6)|(1<<5));

-       
+

        /* power on after power fail */
        on = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;
        get_option(&on, "power_on_after_fail");
        /* power on after power fail */
        on = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;
        get_option(&on, "power_on_after_fail");


@@ -126,7 +126,7 @@ static void acpi_init(struct device *dev)
         */
        byte = pci_read_config8(dev, 0x4a);
        pci_write_config8(dev, 0x4a, byte | (1<<6));
         */
        byte = pci_read_config8(dev, 0x4a);
        pci_write_config8(dev, 0x4a, byte | (1<<6));

-       
+

        /* Throttle the CPU speed down for testing */
        on = SLOW_CPU_OFF;
        get_option(&on, "slow_cpu");
        /* Throttle the CPU speed down for testing */
        on = SLOW_CPU_OFF;
        get_option(&on, "slow_cpu");


@@ -177,12 +177,12 @@ static void acpi_enable_resources(device_t dev)
 
        /* Set the class code */
        pci_write_config32(dev, 0x60, 0x06800000);
 
        /* Set the class code */
        pci_write_config32(dev, 0x60, 0x06800000);

-       
+

 }
 
 static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 {
 }
 
 static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 {

-       pci_write_config32(dev, 0x7c, 
+       pci_write_config32(dev, 0x7c,

                ((device & 0xffff) << 16) | (vendor & 0xffff));
 }
 
                ((device & 0xffff) << 16) | (vendor & 0xffff));
 }
 


@@ -204,7 +204,7 @@ static struct device_operations acpi_ops  = {
        .init             = acpi_init,
        .scan_bus         = scan_static_bus,
        /*  We don't need amd8111_enable, chip ops takes care of it.
        .init             = acpi_init,
        .scan_bus         = scan_static_bus,
        /*  We don't need amd8111_enable, chip ops takes care of it.

-        *  It could be useful if these devices were not 
+        *  It could be useful if these devices were not

         *  enabled by default.
         */
 //     .enable           = amd8111_enable,
         *  enabled by default.
         */
 //     .enable           = amd8111_enable,

diff --git a/src/southbridge/amd/amd8111/amd8111_ide.c b/src/southbridge/amd/amd8111/amd8111_ide.c
index 3b6f5a0a655cb785ac09bbc86f15efdd3dd16990..329987518789f84ff555bb60527a0ac12f0d3710 100644 (file)
--- a/src/southbridge/amd/amd8111/amd8111_ide.c
+++ b/src/southbridge/amd/amd8111/amd8111_ide.c
@@ -42,7 +42,7 @@ static void ide_init(struct device *dev)
 
 static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 {
 
 static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 {

-       pci_write_config32(dev, 0x70, 
+       pci_write_config32(dev, 0x70,

                ((device & 0xffff) << 16) | (vendor & 0xffff));
 }
 static struct pci_operations lops_pci = {
                ((device & 0xffff) << 16) | (vendor & 0xffff));
 }
 static struct pci_operations lops_pci = {

diff --git a/src/southbridge/amd/amd8111/amd8111_lpc.c b/src/southbridge/amd/amd8111/amd8111_lpc.c
index 85e217bb659bee088d777508a07f81f5523bd36e..8fe4982721ef8c4032961d82d55a087578162be4 100644 (file)
--- a/src/southbridge/amd/amd8111/amd8111_lpc.c
+++ b/src/southbridge/amd/amd8111/amd8111_lpc.c
@@ -19,11 +19,11 @@
 static void enable_hpet(struct device *dev)
 {
        unsigned long hpet_address;
 static void enable_hpet(struct device *dev)
 {
        unsigned long hpet_address;

-       
+

        pci_write_config32(dev,0xa0, 0xfed00001);
        hpet_address = pci_read_config32(dev,0xa0)& 0xfffffffe;
        printk(BIOS_DEBUG, "enabling HPET @0x%lx\n", hpet_address);
        pci_write_config32(dev,0xa0, 0xfed00001);
        hpet_address = pci_read_config32(dev,0xa0)& 0xfffffffe;
        printk(BIOS_DEBUG, "enabling HPET @0x%lx\n", hpet_address);

-       
+

 }
 
 static void lpc_init(struct device *dev)
 }
 
 static void lpc_init(struct device *dev)


@@ -40,7 +40,7 @@ static void lpc_init(struct device *dev)
 
        /* posted memory write enable */
        byte = pci_read_config8(dev, 0x46);
 
        /* posted memory write enable */
        byte = pci_read_config8(dev, 0x46);

-       pci_write_config8(dev, 0x46, byte | (1<<0)); 
+       pci_write_config8(dev, 0x46, byte | (1<<0));

 
        /* Enable 5Mib Rom window */
        byte = pci_read_config8(dev, 0x43);
 
        /* Enable 5Mib Rom window */
        byte = pci_read_config8(dev, 0x43);


@@ -65,11 +65,11 @@ static void lpc_init(struct device *dev)
        pci_write_config8(dev, 0x40, byte);
        nmi_option = NMI_OFF;
        get_option(&nmi_option, "nmi");
        pci_write_config8(dev, 0x40, byte);
        nmi_option = NMI_OFF;
        get_option(&nmi_option, "nmi");

-       if (nmi_option) {                       
+       if (nmi_option) {

                byte |= (1 << 7); /* set NMI */
                pci_write_config8(dev, 0x40, byte);
        }
                byte |= (1 << 7); /* set NMI */
                pci_write_config8(dev, 0x40, byte);
        }

-       
+

        /* Initialize the real time clock */
        rtc_init(0);
 
        /* Initialize the real time clock */
        rtc_init(0);
 


@@ -114,7 +114,7 @@ static void amd8111_lpc_enable_resources(device_t dev)
 
 static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 {
 
 static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 {

-       pci_write_config32(dev, 0x70, 
+       pci_write_config32(dev, 0x70,

                           ((device & 0xffff) << 16) | (vendor & 0xffff));
 }
 
                           ((device & 0xffff) << 16) | (vendor & 0xffff));
 }
 

diff --git a/src/southbridge/amd/amd8111/amd8111_nic.c b/src/southbridge/amd/amd8111/amd8111_nic.c
index 8818b51b407abcf17704b3ce04b7eabae3548f96..4ab7212eda4f309d77a4a24f6ae4aad51e79b443 100644 (file)
--- a/src/southbridge/amd/amd8111/amd8111_nic.c
+++ b/src/southbridge/amd/amd8111/amd8111_nic.c
@@ -25,20 +25,20 @@ typedef enum {
        ASF_INIT_DONE_ALIAS     = (1 << 29),
        /* VAL2 */
        JUMBO                   = (1 << 21),
        ASF_INIT_DONE_ALIAS     = (1 << 29),
        /* VAL2 */
        JUMBO                   = (1 << 21),

-       VSIZE                   = (1 << 20),    
+       VSIZE                   = (1 << 20),

        VLONLY                  = (1 << 19),
        VLONLY                  = (1 << 19),

-       VL_TAG_DEL              = (1 << 18),    
+       VL_TAG_DEL              = (1 << 18),

        /* VAL1 */
        /* VAL1 */

-       EN_PMGR                 = (1 << 14),                    
+       EN_PMGR                 = (1 << 14),

        INTLEVEL                = (1 << 13),
        INTLEVEL                = (1 << 13),

-       FORCE_FULL_DUPLEX       = (1 << 12),    
-       FORCE_LINK_STATUS       = (1 << 11),    
-       APEP                    = (1 << 10),    
-       MPPLBA                  = (1 << 9),     
+       FORCE_FULL_DUPLEX       = (1 << 12),
+       FORCE_LINK_STATUS       = (1 << 11),
+       APEP                    = (1 << 10),
+       MPPLBA                  = (1 << 9),

        /* VAL0 */
        /* VAL0 */

-       RESET_PHY_PULSE         = (1 << 2),     
-       RESET_PHY               = (1 << 1),     
-       PHY_RST_POL             = (1 << 0),     
+       RESET_PHY_PULSE         = (1 << 2),
+       RESET_PHY               = (1 << 1),
+       PHY_RST_POL             = (1 << 0),

 }CMD3_BITS;
 
 static void nic_init(struct device *dev)
 }CMD3_BITS;
 
 static void nic_init(struct device *dev)


@@ -72,7 +72,7 @@ static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 static struct pci_operations lops_pci = {
        .set_subsystem = lpci_set_subsystem,
 };
 static struct pci_operations lops_pci = {
        .set_subsystem = lpci_set_subsystem,
 };

-       
+

 static struct device_operations nic_ops  = {
        .read_resources   = pci_dev_read_resources,
        .set_resources    = pci_dev_set_resources,
 static struct device_operations nic_ops  = {
        .read_resources   = pci_dev_read_resources,
        .set_resources    = pci_dev_set_resources,

diff --git a/src/southbridge/amd/amd8111/amd8111_reset.c b/src/southbridge/amd/amd8111/amd8111_reset.c
index 9b26bcb90d43f424953105eac81e8523ae1b26b0..c96e898aea7688fb3ef439669e1e1cb33042411e 100644 (file)
--- a/src/southbridge/amd/amd8111/amd8111_reset.c
+++ b/src/southbridge/amd/amd8111/amd8111_reset.c
@@ -67,7 +67,7 @@ void hard_reset(void)
         */
        bus = node_link_to_bus(node, link);
        dev = pci_locate_device_on_bus(
         */
        bus = node_link_to_bus(node, link);
        dev = pci_locate_device_on_bus(

-               PCI_ID(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_ISA), 
+               PCI_ID(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_ISA),

                bus);
 
        /* Reset */
                bus);
 
        /* Reset */

diff --git a/src/southbridge/amd/amd8111/amd8111_smbus.c b/src/southbridge/amd/amd8111/amd8111_smbus.c
index 2554fd0c5e1c9f8518df64bab70c003fe5ca229b..0a0c58dce3b85510f934e57c40f72d415efabf0a 100644 (file)
--- a/src/southbridge/amd/amd8111/amd8111_smbus.c
+++ b/src/southbridge/amd/amd8111/amd8111_smbus.c
@@ -13,7 +13,7 @@
 
 static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 {
 
 static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 {

-       pci_write_config32(dev, 0x44, 
+       pci_write_config32(dev, 0x44,

                ((device & 0xffff) << 16) | (vendor & 0xffff));
 }
 
                ((device & 0xffff) << 16) | (vendor & 0xffff));
 }
 

diff --git a/src/southbridge/amd/amd8111/amd8111_smbus.h b/src/southbridge/amd/amd8111/amd8111_smbus.h
index b5799666e9290018dceb8396627220a7926df546..fe9b3bff8cd3ff36ab48b7a3d85dec0d7f0b7aa7 100644 (file)
--- a/src/southbridge/amd/amd8111/amd8111_smbus.h
+++ b/src/southbridge/amd/amd8111/amd8111_smbus.h
@@ -27,7 +27,7 @@ static int smbus_wait_until_ready(unsigned smbus_io_base)
                        break;
                }
                if(loops == (SMBUS_TIMEOUT / 2)) {
                        break;
                }
                if(loops == (SMBUS_TIMEOUT / 2)) {

-                       outw(inw(smbus_io_base + SMBGSTATUS), 
+                       outw(inw(smbus_io_base + SMBGSTATUS),

                                smbus_io_base + SMBGSTATUS);
                }
        } while(--loops);
                                smbus_io_base + SMBGSTATUS);
                }
        } while(--loops);


@@ -41,7 +41,7 @@ static int smbus_wait_until_done(unsigned smbus_io_base)
        do {
                unsigned short val;
                smbus_delay();
        do {
                unsigned short val;
                smbus_delay();

-               
+

                val = inw(smbus_io_base + SMBGSTATUS);
                if (((val & 0x8) == 0) | ((val & 0x0037) != 0)) {
                        break;
                val = inw(smbus_io_base + SMBGSTATUS);
                if (((val & 0x8) == 0) | ((val & 0x0037) != 0)) {
                        break;


@@ -58,7 +58,7 @@ static int do_smbus_recv_byte(unsigned smbus_io_base, unsigned device)
        if (smbus_wait_until_ready(smbus_io_base) < 0) {
                return SMBUS_WAIT_UNTIL_READY_TIMEOUT;
        }
        if (smbus_wait_until_ready(smbus_io_base) < 0) {
                return SMBUS_WAIT_UNTIL_READY_TIMEOUT;
        }

-       
+

        /* setup transaction */
        /* disable interrupts */
        outw(inw(smbus_io_base + SMBGCTL) & ~((1<<10)|(1<<9)|(1<<8)|(1<<4)), smbus_io_base + SMBGCTL);
        /* setup transaction */
        /* disable interrupts */
        outw(inw(smbus_io_base + SMBGCTL) & ~((1<<10)|(1<<9)|(1<<8)|(1<<4)), smbus_io_base + SMBGCTL);


@@ -103,7 +103,7 @@ static int do_smbus_send_byte(unsigned smbus_io_base, unsigned device, unsigned
        if (smbus_wait_until_ready(smbus_io_base) < 0) {
                return SMBUS_WAIT_UNTIL_READY_TIMEOUT;
        }
        if (smbus_wait_until_ready(smbus_io_base) < 0) {
                return SMBUS_WAIT_UNTIL_READY_TIMEOUT;
        }

-       
+

        /* setup transaction */
        /* disable interrupts */
        outw(inw(smbus_io_base + SMBGCTL) & ~((1<<10)|(1<<9)|(1<<8)|(1<<4)), smbus_io_base + SMBGCTL);
        /* setup transaction */
        /* disable interrupts */
        outw(inw(smbus_io_base + SMBGCTL) & ~((1<<10)|(1<<9)|(1<<8)|(1<<4)), smbus_io_base + SMBGCTL);


@@ -146,7 +146,7 @@ static int do_smbus_read_byte(unsigned smbus_io_base, unsigned device, unsigned
        if (smbus_wait_until_ready(smbus_io_base) < 0) {
                return SMBUS_WAIT_UNTIL_READY_TIMEOUT;
        }
        if (smbus_wait_until_ready(smbus_io_base) < 0) {
                return SMBUS_WAIT_UNTIL_READY_TIMEOUT;
        }

-       
+

        /* setup transaction */
        /* disable interrupts */
        outw(inw(smbus_io_base + SMBGCTL) & ~((1<<10)|(1<<9)|(1<<8)|(1<<4)), smbus_io_base + SMBGCTL);
        /* setup transaction */
        /* disable interrupts */
        outw(inw(smbus_io_base + SMBGCTL) & ~((1<<10)|(1<<9)|(1<<8)|(1<<4)), smbus_io_base + SMBGCTL);

diff --git a/src/southbridge/amd/amd8111/amd8111_usb.c b/src/southbridge/amd/amd8111/amd8111_usb.c
index f1c331dbafe83b41748cf702939970efd3b9a688..13dccf435b97583dc17d34fef134900ab999f1a3 100644 (file)
--- a/src/southbridge/amd/amd8111/amd8111_usb.c
+++ b/src/southbridge/amd/amd8111/amd8111_usb.c
@@ -12,7 +12,7 @@
 
 static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 {
 
 static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 {

-       pci_write_config32(dev, 0x70, 
+       pci_write_config32(dev, 0x70,

                ((device & 0xffff) << 16) | (vendor & 0xffff));
 }
 
                ((device & 0xffff) << 16) | (vendor & 0xffff));
 }
 

diff --git a/src/southbridge/amd/amd8111/amd8111_usb2.c b/src/southbridge/amd/amd8111/amd8111_usb2.c
index 3aa5211dd0e30043efbcee6eae8c5ec86e28730a..89115c3bbe86b94f4537001440b45279b8394ccc 100644 (file)
--- a/src/southbridge/amd/amd8111/amd8111_usb2.c
+++ b/src/southbridge/amd/amd8111/amd8111_usb2.c
@@ -11,7 +11,7 @@
 
 static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 {
 
 static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 {

-       pci_write_config32(dev, 0x70, 
+       pci_write_config32(dev, 0x70,

                ((device & 0xffff) << 16) | (vendor & 0xffff));
 }
 
                ((device & 0xffff) << 16) | (vendor & 0xffff));
 }
 


@@ -23,7 +23,7 @@ static struct pci_operations lops_pci = {
 
 static void amd8111_usb2_enable(device_t dev)
 {
 
 static void amd8111_usb2_enable(device_t dev)
 {

-       // Due to buggy USB2 we force it to disable. 
+       // Due to buggy USB2 we force it to disable.

        dev->enabled = 0;
        amd8111_enable(dev);
        printk(BIOS_DEBUG, "USB2 disabled.\n");
        dev->enabled = 0;
        amd8111_enable(dev);
        printk(BIOS_DEBUG, "USB2 disabled.\n");

diff --git a/src/southbridge/amd/amd8111/chip.h b/src/southbridge/amd/amd8111/chip.h
index 6c97ef2232fe181c5eb2b3900b200bbb999caf89..601038c4410a5ec411a7ae1d5960a381def20f2f 100644 (file)
--- a/src/southbridge/amd/amd8111/chip.h
+++ b/src/southbridge/amd/amd8111/chip.h
@@ -1,7 +1,7 @@
 #ifndef AMD8111_CHIP_H
 #define AMD8111_CHIP_H
 
 #ifndef AMD8111_CHIP_H
 #define AMD8111_CHIP_H
 

-struct southbridge_amd_amd8111_config 
+struct southbridge_amd_amd8111_config

 {
        unsigned int ide0_enable : 1;
        unsigned int ide1_enable : 1;
 {
        unsigned int ide0_enable : 1;
        unsigned int ide1_enable : 1;

diff --git a/src/southbridge/amd/amd8131-disable/amd8131_bridge.c b/src/southbridge/amd/amd8131-disable/amd8131_bridge.c
index bcb89fa22a307c69ec094afebd8332ce9c7acd7b..e90f497d958952f544566b219baeb080e639eede 100644 (file)
--- a/src/southbridge/amd/amd8131-disable/amd8131_bridge.c
+++ b/src/southbridge/amd/amd8131-disable/amd8131_bridge.c
@@ -112,5 +112,5 @@ static const struct pci_driver ioapic_driver __pci_driver = {
        .ops    = &ioapic_ops,
        .vendor = PCI_VENDOR_ID_AMD,
        .device = 0x7451,
        .ops    = &ioapic_ops,
        .vendor = PCI_VENDOR_ID_AMD,
        .device = 0x7451,

-       
+

 };
 };

diff --git a/src/southbridge/amd/amd8131/amd8131_bridge.c b/src/southbridge/amd/amd8131/amd8131_bridge.c
index 04930517e681bc7d1ca4207b0f90bd8057c9cf78..ae2c4cffcb698475b052dd47d7fde499bcfe8800 100644 (file)
--- a/src/southbridge/amd/amd8131/amd8131_bridge.c
+++ b/src/southbridge/amd/amd8131/amd8131_bridge.c
@@ -121,7 +121,7 @@ static void amd8131_pcix_tune_dev(device_t dev, void *ptr)
                }
        }
        /* Errata #56 additional limits when the bus runs at 133Mhz */
                }
        }
        /* Errata #56 additional limits when the bus runs at 133Mhz */

-       if (info->errata_56 && 
+       if (info->errata_56 &&

                (PCI_X_SSTATUS_MFREQ(info->sstatus) == PCI_X_SSTATUS_MODE1_133MHZ))
        {
                unsigned limit_read;
                (PCI_X_SSTATUS_MFREQ(info->sstatus) == PCI_X_SSTATUS_MODE1_133MHZ))
        {
                unsigned limit_read;


@@ -131,7 +131,7 @@ static void amd8131_pcix_tune_dev(device_t dev, void *ptr)
                if (sib_funcs == 0) {
                        /* 2k reads */
                        limit_read = 2;
                if (sib_funcs == 0) {
                        /* 2k reads */
                        limit_read = 2;

-               } 
+               }

                else if (sib_funcs <= 1) {
                        /* 1k reads */
                        limit_read = 1;
                else if (sib_funcs <= 1) {
                        /* 1k reads */
                        limit_read = 1;


@@ -226,8 +226,8 @@ static unsigned int amd8131_scan_bus(struct bus *bus,
         * we are running at 133Mhz and have a 4 function device.
         * see errata #56
         */
         * we are running at 133Mhz and have a 4 function device.
         * see errata #56
         */

-       if (!bus->children || 
-               (info.errata_56 && 
+       if (!bus->children ||
+               (info.errata_56 &&

                        (info.max_func >= 3) &&
                        (PCI_X_SSTATUS_MFREQ(info.sstatus) == PCI_X_SSTATUS_MODE1_133MHZ)))
        {
                        (info.max_func >= 3) &&
                        (PCI_X_SSTATUS_MFREQ(info.sstatus) == PCI_X_SSTATUS_MODE1_133MHZ)))
        {


@@ -242,7 +242,7 @@ static unsigned int amd8131_scan_bus(struct bus *bus,
                pcix_misc = pci_read_config32(bus->dev, 0x40);
                pcix_misc &= ~(0x1f << 16);
                pci_write_config32(bus->dev, 0x40, pcix_misc);
                pcix_misc = pci_read_config32(bus->dev, 0x40);
                pcix_misc &= ~(0x1f << 16);
                pci_write_config32(bus->dev, 0x40, pcix_misc);

-               
+

                return max;
        }
 
                return max;
        }
 


@@ -284,7 +284,7 @@ static void amd8131_pcix_init(device_t dev)
        byte = pci_read_config8(dev, 0x04);
         byte |= 0x10;
         pci_write_config8(dev, 0x04, byte);
        byte = pci_read_config8(dev, 0x04);
         byte |= 0x10;
         pci_write_config8(dev, 0x04, byte);

-       
+

        /* Set drive strength */
        word = pci_read_config16(dev, 0xe0);
         word = 0x0404;
        /* Set drive strength */
        word = pci_read_config16(dev, 0xe0);
         word = 0x0404;


@@ -292,7 +292,7 @@ static void amd8131_pcix_init(device_t dev)
        word = pci_read_config16(dev, 0xe4);
         word = 0x0404;
         pci_write_config16(dev, 0xe4, word);
        word = pci_read_config16(dev, 0xe4);
         word = 0x0404;
         pci_write_config16(dev, 0xe4, word);

-       
+

        /* Set impedance */
        word = pci_read_config16(dev, 0xe8);
         word = 0x0404;
        /* Set impedance */
        word = pci_read_config16(dev, 0xe8);
         word = 0x0404;


@@ -303,7 +303,7 @@ static void amd8131_pcix_init(device_t dev)
        word = pci_read_config16(dev, 0x4c);
         word |= 1;
         pci_write_config16(dev, 0x4c, word);
        word = pci_read_config16(dev, 0x4c);
         word |= 1;
         pci_write_config16(dev, 0x4c, word);

-       
+

        /* Set split transaction limits */
        word = pci_read_config16(dev, 0xa8);
         pci_write_config16(dev, 0xaa, word);
        /* Set split transaction limits */
        word = pci_read_config16(dev, 0xa8);
         pci_write_config16(dev, 0xaa, word);


@@ -315,12 +315,12 @@ static void amd8131_pcix_init(device_t dev)
        dword = pci_read_config32(dev, 0x04);
         dword |= (1<<8);
         pci_write_config32(dev, 0x04, dword);
        dword = pci_read_config32(dev, 0x04);
         dword |= (1<<8);
         pci_write_config32(dev, 0x04, dword);

-       
+

        /* system and error parity enable */
        dword = pci_read_config32(dev, 0x3c);
         dword |= (3<<16);
         pci_write_config32(dev, 0x3c, dword);
        /* system and error parity enable */
        dword = pci_read_config32(dev, 0x3c);
         dword |= (3<<16);
         pci_write_config32(dev, 0x3c, dword);

-       
+

        /* NMI enable */
        nmi_option = NMI_OFF;
        get_option(&nmi_option, "nmi");
        /* NMI enable */
        nmi_option = NMI_OFF;
        get_option(&nmi_option, "nmi");


@@ -329,7 +329,7 @@ static void amd8131_pcix_init(device_t dev)
                dword |= (1<<0);
                pci_write_config32(dev, 0x44, dword);
        }
                dword |= (1<<0);
                pci_write_config32(dev, 0x44, dword);
        }

-       
+

        /* Set up CRC flood enable */
        dword = pci_read_config32(dev, 0xc0);
        if(dword) {  /* do device A only */
        /* Set up CRC flood enable */
        dword = pci_read_config32(dev, 0xc0);
        if(dword) {  /* do device A only */


@@ -349,7 +349,7 @@ static void bridge_read_resources(struct device *dev)
 {
        struct resource *res;
        pci_bus_read_resources(dev);
 {
        struct resource *res;
        pci_bus_read_resources(dev);

-       res = find_resource(dev, PCI_MEMORY_BASE);      
+       res = find_resource(dev, PCI_MEMORY_BASE);

        if (res) {
                res->limit = 0xffffffffffULL;
        }
        if (res) {
                res->limit = 0xffffffffffULL;
        }


@@ -428,5 +428,5 @@ static const struct pci_driver ioapic_driver __pci_driver = {
        .ops    = &ioapic_ops,
        .vendor = PCI_VENDOR_ID_AMD,
        .device = 0x7451,
        .ops    = &ioapic_ops,
        .vendor = PCI_VENDOR_ID_AMD,
        .device = 0x7451,

-       
+

 };
 };

diff --git a/src/southbridge/amd/amd8132/amd8132_bridge.c b/src/southbridge/amd/amd8132/amd8132_bridge.c
index 2c18c5ebcb26491fe9e8525335fc8c35f34d2d56..e8283baa5051dbc5f2389b773537fd0f2daa1d79 100644 (file)
--- a/src/southbridge/amd/amd8132/amd8132_bridge.c
+++ b/src/southbridge/amd/amd8132/amd8132_bridge.c
@@ -114,7 +114,7 @@ static void amd8132_pcix_tune_dev(device_t dev, void *ptr)
        max_read = (status & PCI_X_STATUS_MAX_READ) >> 21;
        max_tran = (status & PCI_X_STATUS_MAX_SPLIT) >> 23;
 
        max_read = (status & PCI_X_STATUS_MAX_READ) >> 21;
        max_tran = (status & PCI_X_STATUS_MAX_SPLIT) >> 23;
 

-       if (info->rev == 0x01) { // only a1 need it 
+       if (info->rev == 0x01) { // only a1 need it

                /* Errata #53 Limit the number of split transactions to avoid starvation */
                if (sibs >= 2) {
                        /* At most 2 outstanding split transactions when we have
                /* Errata #53 Limit the number of split transactions to avoid starvation */
                if (sibs >= 2) {
                        /* At most 2 outstanding split transactions when we have


@@ -186,7 +186,7 @@ static unsigned int amd8132_scan_bus(struct bus *bus,
        amd8132_walk_children(bus, amd8132_count_dev, &info);
 
 #if 0
        amd8132_walk_children(bus, amd8132_count_dev, &info);
 
 #if 0

-       /* Disable the bus if there are no devices on it 
+       /* Disable the bus if there are no devices on it

         */
        if (!bus->children)
        {
         */
        if (!bus->children)
        {


@@ -201,7 +201,7 @@ static unsigned int amd8132_scan_bus(struct bus *bus,
                pcix_misc = pci_read_config32(bus->dev, 0x40);
                pcix_misc &= ~(0x1f << 16);
                pci_write_config32(bus->dev, 0x40, pcix_misc);
                pcix_misc = pci_read_config32(bus->dev, 0x40);
                pcix_misc &= ~(0x1f << 16);
                pci_write_config32(bus->dev, 0x40, pcix_misc);

-               
+

                return max;
        }
 #endif
                return max;
        }
 #endif


@@ -229,7 +229,7 @@ static void amd8132_pcix_init(device_t dev)
        uint32_t dword;
        uint8_t byte;
        unsigned chip_rev;
        uint32_t dword;
        uint8_t byte;
        unsigned chip_rev;

-        
+

        /* Find the revision of the 8132 */
         chip_rev = pci_read_config8(dev, PCI_CLASS_REVISION);
 
        /* Find the revision of the 8132 */
         chip_rev = pci_read_config8(dev, PCI_CLASS_REVISION);
 


@@ -259,7 +259,7 @@ static void amd8132_pcix_init(device_t dev)
        dword = pci_read_config32(dev, 0x04);
         dword |= (1<<8);
         pci_write_config32(dev, 0x04, dword);
        dword = pci_read_config32(dev, 0x04);
         dword |= (1<<8);
         pci_write_config32(dev, 0x04, dword);

-       
+

        /* system and error parity enable */
        dword = pci_read_config32(dev, 0x3c);
         dword |= (3<<16);
        /* system and error parity enable */
        dword = pci_read_config32(dev, 0x3c);
         dword |= (3<<16);


@@ -267,7 +267,7 @@ static void amd8132_pcix_init(device_t dev)
 
         dword = pci_read_config32(dev, 0x40);
 //        dword &= ~(1<<31); /* WriteChainEnable */
 
         dword = pci_read_config32(dev, 0x40);
 //        dword &= ~(1<<31); /* WriteChainEnable */

-       dword |= (1<<31); 
+       dword |= (1<<31);

        dword |= (1<<7);// must set to 1
        dword |= (3<<21); //PCIErrorSerrDisable
         pci_write_config32(dev, 0x40, dword);
        dword |= (1<<7);// must set to 1
        dword |= (3<<21); //PCIErrorSerrDisable
         pci_write_config32(dev, 0x40, dword);


@@ -335,7 +335,7 @@ static void bridge_read_resources(struct device *dev)
 {
        struct resource *res;
        pci_bus_read_resources(dev);
 {
        struct resource *res;
        pci_bus_read_resources(dev);

-       res = find_resource(dev, PCI_MEMORY_BASE);      
+       res = find_resource(dev, PCI_MEMORY_BASE);

        if (res) {
                res->limit = 0xffffffffffULL;
        }
        if (res) {
                res->limit = 0xffffffffffULL;
        }


@@ -450,5 +450,5 @@ static const struct pci_driver ioapic_driver __pci_driver = {
        .ops    = &ioapic_ops,
        .vendor = PCI_VENDOR_ID_AMD,
        .device = 0x7459,
        .ops    = &ioapic_ops,
        .vendor = PCI_VENDOR_ID_AMD,
        .device = 0x7459,

-       
+

 };
 };

diff --git a/src/southbridge/amd/amd8151/amd8151_agp3.c b/src/southbridge/amd/amd8151/amd8151_agp3.c
index 93c7992810986f7dc3bc9263cb8e05430ce27767..5d673f6ae8c986c98c1dc5d03a297b8a80064c62 100644 (file)
--- a/src/southbridge/amd/amd8151/amd8151_agp3.c
+++ b/src/southbridge/amd/amd8151/amd8151_agp3.c
@@ -38,7 +38,7 @@ static const struct pci_driver agp3bridge_driver __pci_driver = {
 static void agp3dev_enable(device_t dev)
 {
        uint32_t value;
 static void agp3dev_enable(device_t dev)
 {
        uint32_t value;

-       
+

        /* AGP enable */
        value = pci_read_config32(dev, 0xa8);
        value |= (3<<8)|2; //AGP 8x
        /* AGP enable */
        value = pci_read_config32(dev, 0xa8);
        value |= (3<<8)|2; //AGP 8x


@@ -71,5 +71,5 @@ static struct device_operations agp3dev_ops = {
 static const struct pci_driver agp3dev_driver __pci_driver = {
        .ops    = &agp3dev_ops,
        .vendor = PCI_VENDOR_ID_AMD,
 static const struct pci_driver agp3dev_driver __pci_driver = {
        .ops    = &agp3dev_ops,
        .vendor = PCI_VENDOR_ID_AMD,

-       .device = 0x7454, //AGP Device  
+       .device = 0x7454, //AGP Device

 };
 };

diff --git a/src/southbridge/amd/cs5535/cs5535.c b/src/southbridge/amd/cs5535/cs5535.c
index 6f203558e37805c154e9434cb1ae66a1cc9a2ef6..50b62df0c3dd43a1f0da56c917d443be63810060 100644 (file)
--- a/src/southbridge/amd/cs5535/cs5535.c
+++ b/src/southbridge/amd/cs5535/cs5535.c
@@ -21,7 +21,7 @@ static void nvram_on(struct device *dev)
        /* Set positive decode on ROM */
        /* Also, there is no apparent reason to turn off the devoce on the */
        /* IDE devices */
        /* Set positive decode on ROM */
        /* Also, there is no apparent reason to turn off the devoce on the */
        /* IDE devices */

-       
+

        reg = pci_read_config8(dev, 0x5b);
        reg |= 1 << 5;  /* ROM Decode */
        reg |= 1 << 3;  /* Primary IDE decode */
        reg = pci_read_config8(dev, 0x5b);
        reg |= 1 << 5;  /* ROM Decode */
        reg |= 1 << 3;  /* Primary IDE decode */


@@ -43,7 +43,7 @@ static void nvram_on(struct device *dev)
 #endif
 }
 
 #endif
 }
 

-       
+

 static void southbridge_init(struct device *dev)
 {
        printk(BIOS_SPEW, "cs5535: %s\n", __func__);
 static void southbridge_init(struct device *dev)
 {
        printk(BIOS_SPEW, "cs5535: %s\n", __func__);

diff --git a/src/southbridge/amd/cs5535/cs5535_early_setup.c b/src/southbridge/amd/cs5535/cs5535_early_setup.c
index fbb3647578c15891eb273f1f4d5f964d9e9a3953..91dc852012c80a5b1af6488fb9e249d7ddbc3a99 100644 (file)
--- a/src/southbridge/amd/cs5535/cs5535_early_setup.c
+++ b/src/southbridge/amd/cs5535/cs5535_early_setup.c
@@ -8,13 +8,13 @@
  *
  */
 
  *
  */
 

-#define CS5535_GLINK_PORT_NUM  0x02    /* the geode link port number to the CS5535 */       
+#define CS5535_GLINK_PORT_NUM  0x02    /* the geode link port number to the CS5535 */

 #define CS5535_DEV_NUM                 0x0F    /* default PCI device number for CS5535 */
 
 /**
  * @brief Setup PCI IDSEL for CS5535
  *
 #define CS5535_DEV_NUM                 0x0F    /* default PCI device number for CS5535 */
 
 /**
  * @brief Setup PCI IDSEL for CS5535
  *

- * 
+ *

  */
 
 static void cs5535_setup_extmsr(void)
  */
 
 static void cs5535_setup_extmsr(void)

diff --git a/src/southbridge/amd/cs5535/cs5535_early_smbus.c b/src/southbridge/amd/cs5535/cs5535_early_smbus.c
index 6ff46338f6dc073595ef25e842d7a7eb7a122209..ec801f02a8997322ad4953c2de8a65467a8bee2d 100644 (file)
--- a/src/southbridge/amd/cs5535/cs5535_early_smbus.c
+++ b/src/southbridge/amd/cs5535/cs5535_early_smbus.c
@@ -18,7 +18,7 @@ static int cs5535_enable_smbus(void)
        /* Setup SMBus host controller address to 0xEF */
        val = inb(SMBUS_IO_BASE + SMB_ADD);
        val |= (0xEF | SMB_ADD_SAEN);
        /* Setup SMBus host controller address to 0xEF */
        val = inb(SMBUS_IO_BASE + SMB_ADD);
        val |= (0xEF | SMB_ADD_SAEN);

-       outb(val, SMBUS_IO_BASE + SMB_ADD); 
+       outb(val, SMBUS_IO_BASE + SMB_ADD);

 }
 
 static int smbus_read_byte(unsigned device, unsigned address)
 }
 
 static int smbus_read_byte(unsigned device, unsigned address)

diff --git a/src/southbridge/amd/cs5535/cs5535_smbus.h b/src/southbridge/amd/cs5535/cs5535_smbus.h
index 9cf55ba29c71e190a0abc788d4eff701d2d569cd..799e226f5e458e954e35c0b1be95a3a86a490c2f 100644 (file)
--- a/src/southbridge/amd/cs5535/cs5535_smbus.h
+++ b/src/southbridge/amd/cs5535/cs5535_smbus.h
@@ -105,7 +105,7 @@ static int smbus_send_slave_address(unsigned smbus_io_base, unsigned char device
        unsigned char val;
        unsigned long loops;
        loops = SMBUS_TIMEOUT;
        unsigned char val;
        unsigned long loops;
        loops = SMBUS_TIMEOUT;

-                        
+

        /* send the slave address */
        outb(device, smbus_io_base + SMB_SDA);
 
        /* send the slave address */
        outb(device, smbus_io_base + SMB_SDA);
 


@@ -123,7 +123,7 @@ static int smbus_send_slave_address(unsigned smbus_io_base, unsigned char device
                        break;
                }
        } while(--loops);
                        break;
                }
        } while(--loops);

-       return loops?0:SMBUS_WAIT_UNTIL_READY_TIMEOUT;  
+       return loops?0:SMBUS_WAIT_UNTIL_READY_TIMEOUT;

 }
 
 static int smbus_send_command(unsigned smbus_io_base, unsigned char command)
 }
 
 static int smbus_send_command(unsigned smbus_io_base, unsigned char command)


@@ -149,7 +149,7 @@ static int smbus_send_command(unsigned smbus_io_base, unsigned char command)
                        break;
                }
        } while(--loops);
                        break;
                }
        } while(--loops);

-       return loops?0:SMBUS_WAIT_UNTIL_READY_TIMEOUT;  
+       return loops?0:SMBUS_WAIT_UNTIL_READY_TIMEOUT;

 }
 
 static unsigned char do_smbus_read_byte(unsigned smbus_io_base, unsigned char device, unsigned char address)
 }
 
 static unsigned char do_smbus_read_byte(unsigned smbus_io_base, unsigned char device, unsigned char address)

diff --git a/src/southbridge/amd/cs5536/Kconfig b/src/southbridge/amd/cs5536/Kconfig
index b6884b7fa907574a13d9ad0d1e939716c8674c37..e7caf5e27ae91436cc699d8a0fae1712aea91b62 100644 (file)
--- a/src/southbridge/amd/cs5536/Kconfig
+++ b/src/southbridge/amd/cs5536/Kconfig
@@ -26,5 +26,5 @@ config UDELAY_TSC
        default y
        depends on SOUTHBRIDGE_AMD_CS5536
 
        default y
        depends on SOUTHBRIDGE_AMD_CS5536
 

-       
+

 
 

diff --git a/src/southbridge/amd/cs5536/cs5536.c b/src/southbridge/amd/cs5536/cs5536.c
index 43f3b1290e9a1331f49500882e00c8a02f0d7a01..11679278f89fe9227481029f478f7987f142ebc8 100644 (file)
--- a/src/southbridge/amd/cs5536/cs5536.c
+++ b/src/southbridge/amd/cs5536/cs5536.c
@@ -247,7 +247,7 @@ static void lpc_init(struct southbridge_amd_cs5536_config *sb)
 
        isa_dma_init();
 }
 
        isa_dma_init();
 }

-                       
+

 
 /**
  * Depending on settings in the config struct, enable COM1 or COM2 or both.
 
 /**
  * Depending on settings in the config struct, enable COM1 or COM2 or both.


@@ -263,8 +263,8 @@ static void uarts_init(struct southbridge_amd_cs5536_config *sb)
        u16 addr = 0;
        u32 gpio_addr;
        device_t dev;
        u16 addr = 0;
        u32 gpio_addr;
        device_t dev;

-       
-       dev = dev_find_device(PCI_VENDOR_ID_AMD, 
+
+       dev = dev_find_device(PCI_VENDOR_ID_AMD,

                        PCI_DEVICE_ID_AMD_CS5536_ISA, 0);
        gpio_addr = pci_read_config32(dev, PCI_BASE_ADDRESS_1);
        gpio_addr &= ~1;        /* Clear I/O bit */
                        PCI_DEVICE_ID_AMD_CS5536_ISA, 0);
        gpio_addr = pci_read_config32(dev, PCI_BASE_ADDRESS_1);
        gpio_addr &= ~1;        /* Clear I/O bit */


@@ -431,7 +431,7 @@ static void enable_USB_port4(struct southbridge_amd_cs5536_config *sb)
        msr_t msr;
        device_t dev;
 
        msr_t msr;
        device_t dev;
 

-       dev = dev_find_device(PCI_VENDOR_ID_AMD, 
+       dev = dev_find_device(PCI_VENDOR_ID_AMD,

                        PCI_DEVICE_ID_AMD_CS5536_EHCI, 0);
        if (dev) {
 
                        PCI_DEVICE_ID_AMD_CS5536_EHCI, 0);
        if (dev) {
 


@@ -452,7 +452,7 @@ static void enable_USB_port4(struct southbridge_amd_cs5536_config *sb)
                write32(bar + HCCPARAMS, 0x00005012);
        }
 
                write32(bar + HCCPARAMS, 0x00005012);
        }
 

-       dev = dev_find_device(PCI_VENDOR_ID_AMD, 
+       dev = dev_find_device(PCI_VENDOR_ID_AMD,

                        PCI_DEVICE_ID_AMD_CS5536_OTG, 0);
        if (dev) {
                bar = pci_read_config32(dev, PCI_BASE_ADDRESS_0);
                        PCI_DEVICE_ID_AMD_CS5536_OTG, 0);
        if (dev) {
                bar = pci_read_config32(dev, PCI_BASE_ADDRESS_0);


@@ -480,7 +480,7 @@ static void enable_USB_port4(struct southbridge_amd_cs5536_config *sb)
         * - set PADEN (former OTGPADEN) bit in uoc register
         * - set APU bit in uoc register */
        if (sb->enable_USBP4_device) {
         * - set PADEN (former OTGPADEN) bit in uoc register
         * - set APU bit in uoc register */
        if (sb->enable_USBP4_device) {

-               dev = dev_find_device(PCI_VENDOR_ID_AMD, 
+               dev = dev_find_device(PCI_VENDOR_ID_AMD,

                                PCI_DEVICE_ID_AMD_CS5536_UDC, 0);
                if (dev) {
                        bar = pci_read_config32(dev, PCI_BASE_ADDRESS_0);
                                PCI_DEVICE_ID_AMD_CS5536_UDC, 0);
                if (dev) {
                        bar = pci_read_config32(dev, PCI_BASE_ADDRESS_0);


@@ -499,13 +499,13 @@ static void enable_USB_port4(struct southbridge_amd_cs5536_config *sb)
        }
 
        /* Disable virtual PCI UDC and OTG headers */
        }
 
        /* Disable virtual PCI UDC and OTG headers */

-       dev = dev_find_device(PCI_VENDOR_ID_AMD, 
+       dev = dev_find_device(PCI_VENDOR_ID_AMD,

                        PCI_DEVICE_ID_AMD_CS5536_UDC, 0);
        if (dev) {
                pci_write_config32(dev, 0x7C, 0xDEADBEEF);
        }
 
                        PCI_DEVICE_ID_AMD_CS5536_UDC, 0);
        if (dev) {
                pci_write_config32(dev, 0x7C, 0xDEADBEEF);
        }
 

-       dev = dev_find_device(PCI_VENDOR_ID_AMD, 
+       dev = dev_find_device(PCI_VENDOR_ID_AMD,

                        PCI_DEVICE_ID_AMD_CS5536_OTG, 0);
        if (dev) {
                pci_write_config32(dev, 0x7C, 0xDEADBEEF);
                        PCI_DEVICE_ID_AMD_CS5536_OTG, 0);
        if (dev) {
                pci_write_config32(dev, 0x7C, 0xDEADBEEF);


@@ -513,14 +513,14 @@ static void enable_USB_port4(struct southbridge_amd_cs5536_config *sb)
 }
 
 /****************************************************************************
 }
 
 /****************************************************************************

- * 
- *     ChipsetInit 
+ *
+ *     ChipsetInit

  *
  *     Called from northbridge init (Pre-VSA).
  *
  *     NOTE! This function is NOT called if the CS5536 is combined with
  *     an AMD Geode GX2. It's ONLY used on Geode LX based systems.
  *
  *     Called from northbridge init (Pre-VSA).
  *
  *     NOTE! This function is NOT called if the CS5536 is combined with
  *     an AMD Geode GX2. It's ONLY used on Geode LX based systems.

- * 
+ *

  ****************************************************************************/
 void chipsetinit(void)
 {
  ****************************************************************************/
 void chipsetinit(void)
 {


@@ -530,7 +530,7 @@ void chipsetinit(void)
        struct southbridge_amd_cs5536_config *sb;
        struct msrinit *csi;
 
        struct southbridge_amd_cs5536_config *sb;
        struct msrinit *csi;
 

-       dev = dev_find_device(PCI_VENDOR_ID_AMD, 
+       dev = dev_find_device(PCI_VENDOR_ID_AMD,

                        PCI_DEVICE_ID_AMD_CS5536_ISA, 0);
 
        if (!dev) {
                        PCI_DEVICE_ID_AMD_CS5536_ISA, 0);
 
        if (!dev) {

diff --git a/src/southbridge/amd/cs5536/cs5536.h b/src/southbridge/amd/cs5536/cs5536.h
index 073bb3ea597755e164901e8287e7fc55902f29f4..797ac92764f1bdb6b57e8c50ebb5edea5cabd223 100644 (file)
--- a/src/southbridge/amd/cs5536/cs5536.h
+++ b/src/southbridge/amd/cs5536/cs5536.h
@@ -465,7 +465,7 @@
 #define FLASH_IO_256B          0x0000FF00
 
 #if !defined(ASSEMBLY) && !defined(__ROMCC__)
 #define FLASH_IO_256B          0x0000FF00
 
 #if !defined(ASSEMBLY) && !defined(__ROMCC__)

-#if defined(__PRE_RAM__) 
+#if defined(__PRE_RAM__)

 void cs5536_setup_onchipuart(int uart);
 void cs5536_disable_internal_uart(void);
 #else
 void cs5536_setup_onchipuart(int uart);
 void cs5536_disable_internal_uart(void);
 #else

diff --git a/src/southbridge/amd/cs5536/cs5536_smbus2.h b/src/southbridge/amd/cs5536/cs5536_smbus2.h
index 3613b3d37b71a457753d6cdfcbcfb21f2486212c..dea08a437c7af485716c958e3134ba321d0d77ac 100644 (file)
--- a/src/southbridge/amd/cs5536/cs5536_smbus2.h
+++ b/src/southbridge/amd/cs5536/cs5536_smbus2.h
@@ -309,7 +309,7 @@ static inline int do_smbus_write_byte(unsigned smbus_io_base,
                        (unsigned char *)&data, 1);
 }
 
                        (unsigned char *)&data, 1);
 }
 

-static inline int do_smbus_write_word(unsigned smbus_io_base, 
+static inline int do_smbus_write_word(unsigned smbus_io_base,

                unsigned char device, unsigned char address, unsigned short data)
 {
        return _dowrite(smbus_io_base, device, address, (unsigned char *)&data,
                unsigned char device, unsigned char address, unsigned short data)
 {
        return _dowrite(smbus_io_base, device, address, (unsigned char *)&data,

diff --git a/src/southbridge/broadcom/bcm5780/bcm5780_pcix.c b/src/southbridge/broadcom/bcm5780/bcm5780_pcix.c
index f83e54b682a65c30ef4e2c300737590c7528be55..ece7e794eb7c61a7eee141de41843ea00f13f3ac 100644 (file)
--- a/src/southbridge/broadcom/bcm5780/bcm5780_pcix.c
+++ b/src/southbridge/broadcom/bcm5780/bcm5780_pcix.c
@@ -10,8 +10,8 @@
 #include <device/pci_ops.h>
 
 static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 #include <device/pci_ops.h>
 
 static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)

-{       
-        pci_write_config32(dev, 0x40, 
+{
+        pci_write_config32(dev, 0x40,

                 ((device & 0xffff) << 16) | (vendor & 0xffff));
 }
 static struct pci_operations lops_pci = {
                 ((device & 0xffff) << 16) | (vendor & 0xffff));
 }
 static struct pci_operations lops_pci = {

diff --git a/src/southbridge/broadcom/bcm5785/bcm5785.c b/src/southbridge/broadcom/bcm5785/bcm5785.c
index 3ac28e59ca33f4b4cbee7015a89abe3751dcf0e3..3f92be7decf7f9f978b9ce9a06252f7dc25a8fe0 100644 (file)
--- a/src/southbridge/broadcom/bcm5785/bcm5785.c
+++ b/src/southbridge/broadcom/bcm5785/bcm5785.c
@@ -16,7 +16,7 @@ void bcm5785_enable(device_t dev)
 
        /* See if we are on the behind the pcix bridge */
        bus_dev = dev->bus->dev;
 
        /* See if we are on the behind the pcix bridge */
        bus_dev = dev->bus->dev;

-       if ((bus_dev->vendor == PCI_VENDOR_ID_SERVERWORKS) && 
+       if ((bus_dev->vendor == PCI_VENDOR_ID_SERVERWORKS) &&

                (bus_dev->device == 0x0036 )) // device under PCI-X Bridge
        {
                unsigned devfn;
                (bus_dev->device == 0x0036 )) // device under PCI-X Bridge
        {
                unsigned devfn;


@@ -34,7 +34,7 @@ void bcm5785_enable(device_t dev)
        else { // same bus
                unsigned devfn;
                devfn = (dev->path.pci.devfn) & ~7;
        else { // same bus
                unsigned devfn;
                devfn = (dev->path.pci.devfn) & ~7;

-               if( dev->vendor == PCI_VENDOR_ID_SERVERWORKS ) { 
+               if( dev->vendor == PCI_VENDOR_ID_SERVERWORKS ) {

                        if(dev->device == 0x0036) //PCI-X Bridge
                        { devfn += (1<<3); }
                        else if(dev->device == 0x0223) // USB
                        if(dev->device == 0x0036) //PCI-X Bridge
                        { devfn += (1<<3); }
                        else if(dev->device == 0x0223) // USB

diff --git a/src/southbridge/broadcom/bcm5785/bcm5785_early_setup.c b/src/southbridge/broadcom/bcm5785/bcm5785_early_setup.c
index fd2f3ed114f1c25f46ed2c531b23328add811363..d448bf67c3c4183d13a845cb766850d6732e937f 100644 (file)
--- a/src/southbridge/broadcom/bcm5785/bcm5785_early_setup.c
+++ b/src/southbridge/broadcom/bcm5785/bcm5785_early_setup.c
@@ -85,7 +85,7 @@ static unsigned get_sbdn(unsigned bus)
 
 static void enable_fid_change_on_sb(unsigned sbbusn, unsigned sbdn)
 {
 
 static void enable_fid_change_on_sb(unsigned sbbusn, unsigned sbdn)
 {

-       //ACPI Decode Enable    
+       //ACPI Decode Enable

        outb(0x0e, 0xcd6);
        outb((1<<3), 0xcd7);
 
        outb(0x0e, 0xcd6);
        outb((1<<3), 0xcd7);
 

diff --git a/src/southbridge/broadcom/bcm5785/bcm5785_early_smbus.c b/src/southbridge/broadcom/bcm5785/bcm5785_early_smbus.c
index 2638e97d5ca0af4c48f6e4e952f3533ab5e17cfb..a55ddd82e88837ab7eab1dbe20b236dee29ee1d6 100644 (file)
--- a/src/southbridge/broadcom/bcm5785/bcm5785_early_smbus.c
+++ b/src/southbridge/broadcom/bcm5785/bcm5785_early_smbus.c
@@ -15,11 +15,11 @@ static void enable_smbus(void)
        if (dev == PCI_DEV_INVALID) {
                die("SMBUS controller not found\n");
        }
        if (dev == PCI_DEV_INVALID) {
                die("SMBUS controller not found\n");
        }

-       
+

        print_debug("SMBus controller enabled\n");
        /* set smbus iobase */
        pci_write_config32(dev, 0x90, SMBUS_IO_BASE | 1);
        print_debug("SMBus controller enabled\n");
        /* set smbus iobase */
        pci_write_config32(dev, 0x90, SMBUS_IO_BASE | 1);

-       /* Set smbus iospace enable */ 
+       /* Set smbus iospace enable */

        pci_write_config8(dev, 0xd2, 0x03);
        /* clear any lingering errors, so the transaction will run */
        outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT);
        pci_write_config8(dev, 0xd2, 0x03);
        /* clear any lingering errors, so the transaction will run */
        outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT);

diff --git a/src/southbridge/broadcom/bcm5785/bcm5785_lpc.c b/src/southbridge/broadcom/bcm5785/bcm5785_lpc.c
index e76dd3a45a168fe144e1e62a49bfc1af16e00a25..29c08ab74ee5003af3e5f7599276a0c3388db6d0 100644 (file)
--- a/src/southbridge/broadcom/bcm5785/bcm5785_lpc.c
+++ b/src/southbridge/broadcom/bcm5785/bcm5785_lpc.c
@@ -52,25 +52,25 @@ static void bcm5785_lpc_read_resources(device_t dev)
        res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 }
 
        res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 }
 

-/**     
+/**

  * @brief Enable resources for children devices
  * @brief Enable resources for children devices

- *      
+ *

  * @param dev the device whos children's resources are to be enabled
  * @param dev the device whos children's resources are to be enabled

- *      
+ *

  * This function is call by the global enable_resources() indirectly via the
  * device_operation::enable_resources() method of devices.
  * This function is call by the global enable_resources() indirectly via the
  * device_operation::enable_resources() method of devices.

- *      
+ *

  * Indirect mutual recursion:
  *      enable_childrens_resources() -> enable_resources()
  *      enable_resources() -> device_operation::enable_resources()
  *      device_operation::enable_resources() -> enable_children_resources()
  * Indirect mutual recursion:
  *      enable_childrens_resources() -> enable_resources()
  *      enable_resources() -> device_operation::enable_resources()
  *      device_operation::enable_resources() -> enable_children_resources()

- */     
+ */

 static void bcm5785_lpc_enable_childrens_resources(device_t dev)
 static void bcm5785_lpc_enable_childrens_resources(device_t dev)

-{       
-        unsigned link; 
+{
+        unsigned link;

        uint32_t reg;
        int i;
        uint32_t reg;
        int i;

-       
+

        reg = pci_read_config8(dev, 0x44);
 
         for (link = 0; link < dev->links; link++) {
        reg = pci_read_config8(dev, 0x44);
 
         for (link = 0; link < dev->links; link++) {


@@ -93,10 +93,10 @@ static void bcm5785_lpc_enable_childrens_resources(device_t dev)
                                        case 0x3f8: // COM1
                                                reg |= (1<<6);  break;
                                        case 0x2f8: // COM2
                                        case 0x3f8: // COM1
                                                reg |= (1<<6);  break;
                                        case 0x2f8: // COM2

-                                               reg |= (1<<7);  break; 
+                                               reg |= (1<<7);  break;

                                        case 0x378: // Parallal 1
                                                reg |= (1<<0); break;
                                        case 0x378: // Parallal 1
                                                reg |= (1<<0); break;

-                                       case 0x3f0: // FD0 
+                                       case 0x3f0: // FD0

                                                reg |= (1<<26); break;
                                        case 0x220:  // Aduio 0
                                                reg |= (1<<14); break;
                                                reg |= (1<<26); break;
                                        case 0x220:  // Aduio 0
                                                reg |= (1<<14); break;


@@ -108,7 +108,7 @@ static void bcm5785_lpc_enable_childrens_resources(device_t dev)
                 }
         }
        pci_write_config32(dev, 0x44, reg);
                 }
         }
        pci_write_config32(dev, 0x44, reg);

-       
+

 
 }
 
 
 }
 

diff --git a/src/southbridge/broadcom/bcm5785/bcm5785_sata.c b/src/southbridge/broadcom/bcm5785/bcm5785_sata.c
index ec92ecf7e9f0bc08e7a1758e164b298a2d39dc3a..58d5ff5bb754fd41d772a2d481a2f610e0193b2e 100644 (file)
--- a/src/southbridge/broadcom/bcm5785/bcm5785_sata.c
+++ b/src/southbridge/broadcom/bcm5785/bcm5785_sata.c
@@ -44,7 +44,7 @@ static void sata_init(struct device *dev)
 
                printk(BIOS_DEBUG, "init PHY...\n");
                for(i=0; i<4; i++) {
 
                printk(BIOS_DEBUG, "init PHY...\n");
                for(i=0; i<4; i++) {

-                       mmio = res->base + 0x100 * i; 
+                       mmio = res->base + 0x100 * i;

                        byte = read8(mmio + 0x40);
                        printk(BIOS_DEBUG, "port %d PHY status = %02x\n", i, byte);
                        if(byte & 0x4) {// bit 2 is set
                        byte = read8(mmio + 0x40);
                        printk(BIOS_DEBUG, "port %d PHY status = %02x\n", i, byte);
                        if(byte & 0x4) {// bit 2 is set

diff --git a/src/southbridge/broadcom/bcm5785/bcm5785_sb_pci_main.c b/src/southbridge/broadcom/bcm5785/bcm5785_sb_pci_main.c
index a13e9f3fd05e9df47137c6bcd35699a83ab37275..4f518b6a54967041edc0682d57c0691cba4283a6 100644 (file)
--- a/src/southbridge/broadcom/bcm5785/bcm5785_sb_pci_main.c
+++ b/src/southbridge/broadcom/bcm5785/bcm5785_sb_pci_main.c
@@ -30,7 +30,7 @@ static void sb_init(device_t dev)
        byte_old = byte;
        nmi_option = NMI_OFF;
        get_option(&nmi_option, "nmi");
        byte_old = byte;
        nmi_option = NMI_OFF;
        get_option(&nmi_option, "nmi");

-       if (nmi_option) {                       
+       if (nmi_option) {

                byte &= ~(1 << 7); /* set NMI */
        } else {
                byte |= ( 1 << 7); // Can not mask NMI from PCI-E and NMI_NOW
                byte &= ~(1 << 7); /* set NMI */
        } else {
                byte |= ( 1 << 7); // Can not mask NMI from PCI-E and NMI_NOW


@@ -47,16 +47,16 @@ static void bcm5785_sb_read_resources(device_t dev)
        struct resource *res;
 
        /* Get the normal pci resources of this device */
        struct resource *res;
 
        /* Get the normal pci resources of this device */

-       pci_dev_read_resources(dev);            
-       /* Get Resource for SMBUS */    
-       pci_get_resource(dev, 0x90);    
+       pci_dev_read_resources(dev);
+       /* Get Resource for SMBUS */
+       pci_get_resource(dev, 0x90);

 
 

-       compact_resources(dev); 
+       compact_resources(dev);

 
         /* Add an extra subtractive resource for both memory and I/O */
         res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
         res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
 
         /* Add an extra subtractive resource for both memory and I/O */
         res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
         res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;

-        
+

         res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
         res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
 
         res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
         res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
 


@@ -75,7 +75,7 @@ static int lsmbus_recv_byte(device_t dev)
 
         return do_smbus_recv_byte(res->base, device);
 }
 
         return do_smbus_recv_byte(res->base, device);
 }

-        
+

 static int lsmbus_send_byte(device_t dev, uint8_t val)
 {
         unsigned device;
 static int lsmbus_send_byte(device_t dev, uint8_t val)
 {
         unsigned device;

diff --git a/src/southbridge/broadcom/bcm5785/bcm5785_smbus.h b/src/southbridge/broadcom/bcm5785/bcm5785_smbus.h
index 5f2f7717a06064ec364ec03fb41fcbfbbaab7bc4..e71bb5cbee84f6a2f58884949fef36a1c4ca7bfa 100644 (file)
--- a/src/southbridge/broadcom/bcm5785/bcm5785_smbus.h
+++ b/src/southbridge/broadcom/bcm5785/bcm5785_smbus.h
@@ -19,7 +19,7 @@
 #define SMBSLVDAT 0xc
 
 
 #define SMBSLVDAT 0xc
 
 

-/* Between 1-10 seconds, We should never timeout normally 
+/* Between 1-10 seconds, We should never timeout normally

  * Longer than this is just painful when a timeout condition occurs.
  */
 #define SMBUS_TIMEOUT (100*1000*10)
  * Longer than this is just painful when a timeout condition occurs.
  */
 #define SMBUS_TIMEOUT (100*1000*10)


@@ -36,7 +36,7 @@ static int smbus_wait_until_ready(unsigned smbus_io_base)
        do {
                unsigned char val;
                val = inb(smbus_io_base + SMBHSTSTAT);
        do {
                unsigned char val;
                val = inb(smbus_io_base + SMBHSTSTAT);

-               val &= 0x1f; 
+               val &= 0x1f;

                if (val == 0) { // ready now
                        return 0;
                }
                if (val == 0) { // ready now
                        return 0;
                }


@@ -51,7 +51,7 @@ static int smbus_wait_until_done(unsigned smbus_io_base)
        loops = SMBUS_TIMEOUT;
        do {
                unsigned char val;
        loops = SMBUS_TIMEOUT;
        do {
                unsigned char val;

-               
+

                val = inb(smbus_io_base + SMBHSTSTAT);
                val &= 0x1f; // mask off reserved bits
                if ( val & 0x1c) {
                val = inb(smbus_io_base + SMBHSTSTAT);
                val &= 0x1f; // mask off reserved bits
                if ( val & 0x1c) {


@@ -68,7 +68,7 @@ static int smbus_wait_until_done(unsigned smbus_io_base)
 static int do_smbus_recv_byte(unsigned smbus_io_base, unsigned device)
 {
        uint8_t byte;
 static int do_smbus_recv_byte(unsigned smbus_io_base, unsigned device)
 {
        uint8_t byte;

-       
+

         if (smbus_wait_until_ready(smbus_io_base) < 0) {
                 return -2; // not ready
         }
         if (smbus_wait_until_ready(smbus_io_base) < 0) {
                 return -2; // not ready
         }


@@ -128,7 +128,7 @@ static int do_smbus_read_byte(unsigned smbus_io_base, unsigned device, unsigned
        if (smbus_wait_until_ready(smbus_io_base) < 0) {
                return -2; // not ready
        }
        if (smbus_wait_until_ready(smbus_io_base) < 0) {
                return -2; // not ready
        }

-       
+

        /* set the command/address... */
        outb(address & 0xff, smbus_io_base + SMBHSTCMD);
 
        /* set the command/address... */
        outb(address & 0xff, smbus_io_base + SMBHSTCMD);
 

diff --git a/src/southbridge/broadcom/bcm5785/bcm5785_usb.c b/src/southbridge/broadcom/bcm5785/bcm5785_usb.c
index c2e7366272a5f97fb93d4c6016fd2a8b5c21623f..15295d8329d82c8d7a18e6d36ddf31639571a540 100644 (file)
--- a/src/southbridge/broadcom/bcm5785/bcm5785_usb.c
+++ b/src/southbridge/broadcom/bcm5785/bcm5785_usb.c
@@ -23,8 +23,8 @@ static void usb_init(struct device *dev)
 }
 
 static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 }
 
 static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)

-{       
-        pci_write_config32(dev, 0x40, 
+{
+        pci_write_config32(dev, 0x40,

                 ((device & 0xffff) << 16) | (vendor & 0xffff));
 }
 static struct pci_operations lops_pci = {
                 ((device & 0xffff) << 16) | (vendor & 0xffff));
 }
 static struct pci_operations lops_pci = {

diff --git a/src/southbridge/broadcom/bcm5785/chip.h b/src/southbridge/broadcom/bcm5785/chip.h
index 4aa2ce3217fb0e7b283650d49912585a56440ac7..3106f60c24e5d97ed7ccf887925d16832e459c46 100644 (file)
--- a/src/southbridge/broadcom/bcm5785/chip.h
+++ b/src/southbridge/broadcom/bcm5785/chip.h
@@ -1,7 +1,7 @@
 #ifndef BCM5785_CHIP_H
 #define BCM5785_CHIP_H
 
 #ifndef BCM5785_CHIP_H
 #define BCM5785_CHIP_H
 

-struct southbridge_broadcom_bcm5785_config 
+struct southbridge_broadcom_bcm5785_config

 {
         unsigned int ide0_enable : 1;
         unsigned int ide1_enable : 1;
 {
         unsigned int ide0_enable : 1;
         unsigned int ide1_enable : 1;

diff --git a/src/southbridge/intel/esb6300/chip.h b/src/southbridge/intel/esb6300/chip.h
index ff74e615fdabc0f59929767d1412759d36a9a136..4082769cce7c7f81fb7257c870c62686997f2095 100644 (file)
--- a/src/southbridge/intel/esb6300/chip.h
+++ b/src/southbridge/intel/esb6300/chip.h
@@ -1,4 +1,4 @@
-struct southbridge_intel_esb6300_config 
+struct southbridge_intel_esb6300_config

 {
 #define ESB6300_GPIO_USE_MASK      0x03
 #define ESB6300_GPIO_USE_DEFAULT   0x00
 {
 #define ESB6300_GPIO_USE_MASK      0x03
 #define ESB6300_GPIO_USE_DEFAULT   0x00

diff --git a/src/southbridge/intel/esb6300/esb6300.c b/src/southbridge/intel/esb6300/esb6300.c
index 786daea23b562a2410a36bec92452415a071e207..5d8f5e412ddb6dfea1c511803d5b7404a78f588c 100644 (file)
--- a/src/southbridge/intel/esb6300/esb6300.c
+++ b/src/southbridge/intel/esb6300/esb6300.c
@@ -25,7 +25,7 @@ void esb6300_enable(device_t dev)
                (lpc_dev->device != PCI_DEVICE_ID_INTEL_6300ESB_LPC)) {
                uint32_t id;
                id = pci_read_config32(lpc_dev, PCI_VENDOR_ID);
                (lpc_dev->device != PCI_DEVICE_ID_INTEL_6300ESB_LPC)) {
                uint32_t id;
                id = pci_read_config32(lpc_dev, PCI_VENDOR_ID);

-               if (id != (PCI_VENDOR_ID_INTEL | 
+               if (id != (PCI_VENDOR_ID_INTEL |

                                (PCI_DEVICE_ID_INTEL_6300ESB_LPC << 16))) {
                        return;
                }
                                (PCI_DEVICE_ID_INTEL_6300ESB_LPC << 16))) {
                        return;
                }


@@ -39,7 +39,7 @@ void esb6300_enable(device_t dev)
        if (reg != reg_old) {
                pci_write_config16(lpc_dev, 0xf2, reg);
        }
        if (reg != reg_old) {
                pci_write_config16(lpc_dev, 0xf2, reg);
        }

-       
+

 }
 
 struct chip_operations southbridge_intel_esb6300_ops = {
 }
 
 struct chip_operations southbridge_intel_esb6300_ops = {

diff --git a/src/southbridge/intel/esb6300/esb6300_ac97.c b/src/southbridge/intel/esb6300/esb6300_ac97.c
index 231f8129ada80f7b9737ea4b25d1239e920310c3..7b7795f5df5e09ddd72c71747c0b5ea43516bf76 100644 (file)
--- a/src/southbridge/intel/esb6300/esb6300_ac97.c
+++ b/src/southbridge/intel/esb6300/esb6300_ac97.c
@@ -8,7 +8,7 @@
 static void ac97_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 {
        /* Write the subsystem vendor and device id */
 static void ac97_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 {
        /* Write the subsystem vendor and device id */

-       pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, 
+       pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,

                ((device & 0xffff) << 16) | (vendor & 0xffff));
 }
 
                ((device & 0xffff) << 16) | (vendor & 0xffff));
 }
 

diff --git a/src/southbridge/intel/esb6300/esb6300_early_smbus.c b/src/southbridge/intel/esb6300/esb6300_early_smbus.c
index ae7cfcd2272816ab2e659c55be61fdb4bd67dc9a..d804fde038d19d72a1323d6ccbb48e30f24baa4b 100644 (file)
--- a/src/southbridge/intel/esb6300/esb6300_early_smbus.c
+++ b/src/southbridge/intel/esb6300/esb6300_early_smbus.c
@@ -12,7 +12,7 @@ static void enable_smbus(void)
        pci_write_config8(dev, 0x4, 1);
        /* SMBALERT_DIS */
        pci_write_config8(dev, 0x11, 4);
        pci_write_config8(dev, 0x4, 1);
        /* SMBALERT_DIS */
        pci_write_config8(dev, 0x11, 4);

-       
+

        /* Disable interrupt generation */
        outb(0, SMBUS_IO_BASE + SMBHSTCTL);
 }
        /* Disable interrupt generation */
        outb(0, SMBUS_IO_BASE + SMBHSTCTL);
 }


@@ -30,7 +30,7 @@ static void smbus_write_byte(unsigned device, unsigned address, unsigned char va
        return;
 }
 
        return;
 }
 

-static int smbus_write_block(unsigned device, unsigned length, unsigned cmd, 
+static int smbus_write_block(unsigned device, unsigned length, unsigned cmd,

                 unsigned data1, unsigned data2)
 {
        unsigned char global_control_register;
                 unsigned data1, unsigned data2)
 {
        unsigned char global_control_register;


@@ -41,11 +41,11 @@ static int smbus_write_block(unsigned device, unsigned length, unsigned cmd,
 
        /* chear the PM timeout flags, SECOND_TO_STS */
        outw(inw(0x0400 + 0x66), 0x0400 + 0x66);
 
        /* chear the PM timeout flags, SECOND_TO_STS */
        outw(inw(0x0400 + 0x66), 0x0400 + 0x66);

-       
+

        if (smbus_wait_until_ready(SMBUS_IO_BASE) < 0) {
                return -2;
        }
        if (smbus_wait_until_ready(SMBUS_IO_BASE) < 0) {
                return -2;
        }

-       
+

        /* setup transaction */
        /* Obtain ownership */
        outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT);
        /* setup transaction */
        /* Obtain ownership */
        outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT);


@@ -56,39 +56,39 @@ static int smbus_write_block(unsigned device, unsigned length, unsigned cmd,
        outb(0x80, SMBUS_IO_BASE + SMBHSTSTAT);
        /* disable interrupts */
        outb(inb(SMBUS_IO_BASE + SMBHSTCTL) & (~1), SMBUS_IO_BASE + SMBHSTCTL);
        outb(0x80, SMBUS_IO_BASE + SMBHSTSTAT);
        /* disable interrupts */
        outb(inb(SMBUS_IO_BASE + SMBHSTCTL) & (~1), SMBUS_IO_BASE + SMBHSTCTL);

-       
+

        /* set the device I'm talking too */
        outb(((device & 0x7f) << 1), SMBUS_IO_BASE + SMBXMITADD);
        /* set the device I'm talking too */
        outb(((device & 0x7f) << 1), SMBUS_IO_BASE + SMBXMITADD);

-       
+

        /* set the command address */
        outb(cmd & 0xFF, SMBUS_IO_BASE + SMBHSTCMD);
        /* set the command address */
        outb(cmd & 0xFF, SMBUS_IO_BASE + SMBHSTCMD);

-       
+

        /* set the block length */
        outb(length & 0xFF, SMBUS_IO_BASE + SMBHSTDAT0);
        /* set the block length */
        outb(length & 0xFF, SMBUS_IO_BASE + SMBHSTDAT0);

-       
+

        /* try sending out the first byte of data here */
        byte=(data1>>(0))&0x0ff;
        outb(byte,SMBUS_IO_BASE + SMBBLKDAT);
        /* issue a block write command */
        /* try sending out the first byte of data here */
        byte=(data1>>(0))&0x0ff;
        outb(byte,SMBUS_IO_BASE + SMBBLKDAT);
        /* issue a block write command */

-       outb((inb(SMBUS_IO_BASE + SMBHSTCTL) & 0xE3) | (0x5 << 2) | 0x40, 
+       outb((inb(SMBUS_IO_BASE + SMBHSTCTL) & 0xE3) | (0x5 << 2) | 0x40,

                        SMBUS_IO_BASE + SMBHSTCTL);
 
        for(i=0;i<length;i++) {
                        SMBUS_IO_BASE + SMBHSTCTL);
 
        for(i=0;i<length;i++) {

-               
+

                /* poll for transaction completion */
                if (smbus_wait_until_blk_done(SMBUS_IO_BASE) < 0) {
                        return -3;
                }
                /* poll for transaction completion */
                if (smbus_wait_until_blk_done(SMBUS_IO_BASE) < 0) {
                        return -3;
                }

-               
+

                /* load the next byte */
                if(i>3)
                        byte=(data2>>(i%4))&0x0ff;
                else
                        byte=(data1>>(i))&0x0ff;
                outb(byte,SMBUS_IO_BASE + SMBBLKDAT);
                /* load the next byte */
                if(i>3)
                        byte=(data2>>(i%4))&0x0ff;
                else
                        byte=(data1>>(i))&0x0ff;
                outb(byte,SMBUS_IO_BASE + SMBBLKDAT);

-               
+

                /* clear the done bit */
                /* clear the done bit */

-               outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), 
+               outb(inb(SMBUS_IO_BASE + SMBHSTSTAT),

                                SMBUS_IO_BASE + SMBHSTSTAT);
        }
 
                                SMBUS_IO_BASE + SMBHSTSTAT);
        }
 

diff --git a/src/southbridge/intel/esb6300/esb6300_ehci.c b/src/southbridge/intel/esb6300/esb6300_ehci.c
index 8c20c0325f5a45f605e5a8dbd7f662de6e8ef69c..c103c4bd2f296911da2e6d0ebb8f43b45ab23d16 100644 (file)
--- a/src/southbridge/intel/esb6300/esb6300_ehci.c
+++ b/src/southbridge/intel/esb6300/esb6300_ehci.c
@@ -11,7 +11,7 @@ static void ehci_init(struct device *dev)
 
        printk(BIOS_DEBUG, "EHCI: Setting up controller.. ");
        cmd = pci_read_config32(dev, PCI_COMMAND);
 
        printk(BIOS_DEBUG, "EHCI: Setting up controller.. ");
        cmd = pci_read_config32(dev, PCI_COMMAND);

-       pci_write_config32(dev, PCI_COMMAND, 
+       pci_write_config32(dev, PCI_COMMAND,

                cmd | PCI_COMMAND_MASTER);
 
        printk(BIOS_DEBUG, "done.\n");
                cmd | PCI_COMMAND_MASTER);
 
        printk(BIOS_DEBUG, "done.\n");


@@ -24,7 +24,7 @@ static void ehci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
        /* Enable writes to protected registers */
        pci_write_config8(dev, 0x80, access_cntl | 1);
        /* Write the subsystem vendor and device id */
        /* Enable writes to protected registers */
        pci_write_config8(dev, 0x80, access_cntl | 1);
        /* Write the subsystem vendor and device id */

-       pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, 
+       pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,

                ((device & 0xffff) << 16) | (vendor & 0xffff));
        /* Restore protection */
        pci_write_config8(dev, 0x80, access_cntl);
                ((device & 0xffff) << 16) | (vendor & 0xffff));
        /* Restore protection */
        pci_write_config8(dev, 0x80, access_cntl);

diff --git a/src/southbridge/intel/esb6300/esb6300_ide.c b/src/southbridge/intel/esb6300/esb6300_ide.c
index 543468dabb921ace47a4f6eeba1d81c4d30e8d7e..abe86a811d7be84f2a65e5809c4ae2a1da2a9396 100644 (file)
--- a/src/southbridge/intel/esb6300/esb6300_ide.c
+++ b/src/southbridge/intel/esb6300/esb6300_ide.c
@@ -16,7 +16,7 @@ static void ide_init(struct device *dev)
         pci_write_config8(dev, 0x48, 0x05);
         pci_write_config16(dev, 0x4a, 0x0101);
         pci_write_config16(dev, 0x54, 0x5055);
         pci_write_config8(dev, 0x48, 0x05);
         pci_write_config16(dev, 0x4a, 0x0101);
         pci_write_config16(dev, 0x54, 0x5055);

- 
+

 #if 0
        uint16_t word;
        word = pci_read_config16(dev, 0x40);
 #if 0
        uint16_t word;
        word = pci_read_config16(dev, 0x40);


@@ -32,7 +32,7 @@ static void ide_init(struct device *dev)
 static void esb6300_ide_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 {
        /* This value is also visible in uchi[0-2] and smbus functions */
 static void esb6300_ide_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 {
        /* This value is also visible in uchi[0-2] and smbus functions */

-       pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, 
+       pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,

                ((device & 0xffff) << 16) | (vendor & 0xffff));
 }
 
                ((device & 0xffff) << 16) | (vendor & 0xffff));
 }
 

diff --git a/src/southbridge/intel/esb6300/esb6300_lpc.c b/src/southbridge/intel/esb6300/esb6300_lpc.c
index fe035bb2c4d9ad6754cab1df9f377b7a599a881c..66ac62bb3fa3f9251bdac95be7ec928b91ba283d 100644 (file)
--- a/src/southbridge/intel/esb6300/esb6300_lpc.c
+++ b/src/southbridge/intel/esb6300/esb6300_lpc.c
@@ -96,7 +96,7 @@ static void set_esb6300_gpio_direction(
                switch(config->gpio[i] & ESB6300_GPIO_SEL_MASK) {
                case ESB6300_GPIO_SEL_OUTPUT: val = 0; break;
                case ESB6300_GPIO_SEL_INPUT:  val = 1; break;
                switch(config->gpio[i] & ESB6300_GPIO_SEL_MASK) {
                case ESB6300_GPIO_SEL_OUTPUT: val = 0; break;
                case ESB6300_GPIO_SEL_INPUT:  val = 1; break;

-               default: 
+               default:

                        continue;
                }
                /* The caller is responsible for not playing with unimplemented bits */
                        continue;
                }
                /* The caller is responsible for not playing with unimplemented bits */


@@ -133,7 +133,7 @@ static void set_esb6300_gpio_level(
                case ESB6300_GPIO_LVL_LOW:   val = 0; blink = 0; break;
                case ESB6300_GPIO_LVL_HIGH:  val = 1; blink = 0; break;
                case ESB6300_GPIO_LVL_BLINK: val = 1; blink = 1; break;
                case ESB6300_GPIO_LVL_LOW:   val = 0; blink = 0; break;
                case ESB6300_GPIO_LVL_HIGH:  val = 1; blink = 0; break;
                case ESB6300_GPIO_LVL_BLINK: val = 1; blink = 1; break;

-               default: 
+               default:

                        continue;
                }
                /* The caller is responsible for not playing with unimplemented bits */
                        continue;
                }
                /* The caller is responsible for not playing with unimplemented bits */


@@ -166,7 +166,7 @@ static void set_esb6300_gpio_inv(
                switch(config->gpio[i] & ESB6300_GPIO_INV_MASK) {
                case ESB6300_GPIO_INV_OFF: val = 0; break;
                case ESB6300_GPIO_INV_ON:  val = 1; break;
                switch(config->gpio[i] & ESB6300_GPIO_INV_MASK) {
                case ESB6300_GPIO_INV_OFF: val = 0; break;
                case ESB6300_GPIO_INV_ON:  val = 1; break;

-               default: 
+               default:

                        continue;
                }
                gpio_inv &= ~( 1 << i);
                        continue;
                }
                gpio_inv &= ~( 1 << i);


@@ -210,7 +210,7 @@ static void esb6300_gpio_init(device_t dev)
        /* Find the GPIO bar */
        res = find_resource(dev, GPIO_BAR);
        if (!res) {
        /* Find the GPIO bar */
        res = find_resource(dev, GPIO_BAR);
        if (!res) {

-               return; 
+               return;

        }
 
        /* Set the use selects */
        }
 
        /* Set the use selects */


@@ -274,7 +274,7 @@ static void lpc_init(struct device *dev)
        pci_write_config8(dev, 0xa0, 0x20);
        pci_write_config8(dev, 0xad, 0x03);
        pci_write_config8(dev, 0xbb, 0x09);
        pci_write_config8(dev, 0xa0, 0x20);
        pci_write_config8(dev, 0xad, 0x03);
        pci_write_config8(dev, 0xbb, 0x09);

-       
+

        esb6300_enable_serial_irqs(dev);
 
        esb6300_pci_dma_cfg(dev);
        esb6300_enable_serial_irqs(dev);
 
        esb6300_pci_dma_cfg(dev);


@@ -292,7 +292,7 @@ static void lpc_init(struct device *dev)
 
        /* Set up the PIRQ */
        esb6300_pirq_init(dev);
 
        /* Set up the PIRQ */
        esb6300_pirq_init(dev);

-       
+

        /* Set the state of the gpio lines */
        esb6300_gpio_init(dev);
 
        /* Set the state of the gpio lines */
        esb6300_gpio_init(dev);
 


@@ -346,7 +346,7 @@ static void esb6300_lpc_enable_resources(device_t dev)
        acpi_cntl = pci_read_config8(dev, 0x44);
        acpi_cntl |= (1 << 4);
        pci_write_config8(dev, 0x44, acpi_cntl);
        acpi_cntl = pci_read_config8(dev, 0x44);
        acpi_cntl |= (1 << 4);
        pci_write_config8(dev, 0x44, acpi_cntl);

-       
+

        /* Enable the GPIO bar */
        gpio_cntl = pci_read_config8(dev, 0x5c);
        gpio_cntl |= (1 << 4);
        /* Enable the GPIO bar */
        gpio_cntl = pci_read_config8(dev, 0x5c);
        gpio_cntl |= (1 << 4);

diff --git a/src/southbridge/intel/esb6300/esb6300_pic.c b/src/southbridge/intel/esb6300/esb6300_pic.c
index 9d02536cd42e5b82964fae285c9a347e5c0056f9..5bbf317411d555b665589e0964276e1940339ddc 100644 (file)
--- a/src/southbridge/intel/esb6300/esb6300_pic.c
+++ b/src/southbridge/intel/esb6300/esb6300_pic.c
@@ -40,7 +40,7 @@ static void pic_read_resources(device_t dev)
        res->limit = res->base + res->size -1;
        res->align = 8;
        res->gran  = 8;
        res->limit = res->base + res->size -1;
        res->align = 8;
        res->gran  = 8;

-       res->flags = IORESOURCE_MEM | IORESOURCE_FIXED | 
+       res->flags = IORESOURCE_MEM | IORESOURCE_FIXED |

                IORESOURCE_STORED | IORESOURCE_ASSIGNED;
        dev->command |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER;
 }
                IORESOURCE_STORED | IORESOURCE_ASSIGNED;
        dev->command |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER;
 }

diff --git a/src/southbridge/intel/esb6300/esb6300_sata.c b/src/southbridge/intel/esb6300/esb6300_sata.c
index 5818df1819c0f738ab0d779a1dbee09d8d1016aa..6dce2d2f3a73b2bdce3db5aeb6448f15252cf240 100644 (file)
--- a/src/southbridge/intel/esb6300/esb6300_sata.c
+++ b/src/southbridge/intel/esb6300/esb6300_sata.c
@@ -15,37 +15,37 @@ static void sata_init(struct device *dev)
         /* SATA configuration */
         pci_write_config8(dev, 0x04, 0x07);
         pci_write_config8(dev, 0x09, 0x8f);
         /* SATA configuration */
         pci_write_config8(dev, 0x04, 0x07);
         pci_write_config8(dev, 0x09, 0x8f);

-                                                                                
+

         /* Set timmings */
         pci_write_config16(dev, 0x40, 0x0a307);
         pci_write_config16(dev, 0x42, 0x0a307);
         /* Set timmings */
         pci_write_config16(dev, 0x40, 0x0a307);
         pci_write_config16(dev, 0x42, 0x0a307);

-                                                                                
+

         /* Sync DMA */
         pci_write_config16(dev, 0x48, 0x000f);
         pci_write_config16(dev, 0x4a, 0x1111);
         /* Sync DMA */
         pci_write_config16(dev, 0x48, 0x000f);
         pci_write_config16(dev, 0x4a, 0x1111);

-                                                                                
+

         /* 66 mhz */
         pci_write_config16(dev, 0x54, 0xf00f);
         /* 66 mhz */
         pci_write_config16(dev, 0x54, 0xf00f);

-                                                                                
+

         /* Combine ide - sata configuration */
         pci_write_config8(dev, 0x90, 0x0);
         /* Combine ide - sata configuration */
         pci_write_config8(dev, 0x90, 0x0);

-                                                                                
+

         /* port 0 & 1 enable */
         pci_write_config8(dev, 0x92, 0x33);
         /* port 0 & 1 enable */
         pci_write_config8(dev, 0x92, 0x33);

-                                                                                
+

         /* initialize SATA  */
         pci_write_config16(dev, 0xa0, 0x0018);
         pci_write_config32(dev, 0xa4, 0x00000264);
         pci_write_config16(dev, 0xa0, 0x0040);
         pci_write_config32(dev, 0xa4, 0x00220043);
         /* initialize SATA  */
         pci_write_config16(dev, 0xa0, 0x0018);
         pci_write_config32(dev, 0xa4, 0x00000264);
         pci_write_config16(dev, 0xa0, 0x0040);
         pci_write_config32(dev, 0xa4, 0x00220043);

-                                                                                
+

        printk(BIOS_DEBUG, "SATA Enabled\n");
 }
 
 static void esb6300_sata_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 {
        /* This value is also visible in usb1, usb2 and smbus functions */
        printk(BIOS_DEBUG, "SATA Enabled\n");
 }
 
 static void esb6300_sata_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 {
        /* This value is also visible in usb1, usb2 and smbus functions */

-       pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, 
+       pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,

                ((device & 0xffff) << 16) | (vendor & 0xffff));
 }
 
                ((device & 0xffff) << 16) | (vendor & 0xffff));
 }
 


@@ -66,7 +66,7 @@ static const struct pci_driver sata_driver __pci_driver = {
         .vendor = PCI_VENDOR_ID_INTEL,
         .device = PCI_DEVICE_ID_INTEL_6300ESB_SATA,
 };
         .vendor = PCI_VENDOR_ID_INTEL,
         .device = PCI_DEVICE_ID_INTEL_6300ESB_SATA,
 };

-                                                                                
+

 static const struct pci_driver sata_driver_nr __pci_driver = {
         .ops    = &sata_ops,
         .vendor = PCI_VENDOR_ID_INTEL,
 static const struct pci_driver sata_driver_nr __pci_driver = {
         .ops    = &sata_ops,
         .vendor = PCI_VENDOR_ID_INTEL,

diff --git a/src/southbridge/intel/esb6300/esb6300_smbus.h b/src/southbridge/intel/esb6300/esb6300_smbus.h
index 0b793c37f97851e5356846969db487a53b9171d7..e7a0d5c711520e6936c7624ed8a6bf4016a91f66 100644 (file)
--- a/src/southbridge/intel/esb6300/esb6300_smbus.h
+++ b/src/southbridge/intel/esb6300/esb6300_smbus.h
@@ -10,7 +10,7 @@
 #define SMBTRNSADD 0x9
 #define SMBSLVDATA 0xa
 #define SMLINK_PIN_CTL 0xe
 #define SMBTRNSADD 0x9
 #define SMBSLVDATA 0xa
 #define SMLINK_PIN_CTL 0xe

-#define SMBUS_PIN_CTL  0xf 
+#define SMBUS_PIN_CTL  0xf

 
 #define SMBUS_TIMEOUT (100*1000*10)
 
 
 #define SMBUS_TIMEOUT (100*1000*10)
 

diff --git a/src/southbridge/intel/esb6300/esb6300_uhci.c b/src/southbridge/intel/esb6300/esb6300_uhci.c
index 10b1dfa1cc53e3b2c3b9f7782887e424da73541d..a8bcd888f19bd5485f6bb235d7ae677b98991109 100644 (file)
--- a/src/southbridge/intel/esb6300/esb6300_uhci.c
+++ b/src/southbridge/intel/esb6300/esb6300_uhci.c
@@ -12,7 +12,7 @@ static void uhci_init(struct device *dev)
 #if 1
        printk(BIOS_DEBUG, "UHCI: Setting up controller.. ");
        cmd = pci_read_config32(dev, PCI_COMMAND);
 #if 1
        printk(BIOS_DEBUG, "UHCI: Setting up controller.. ");
        cmd = pci_read_config32(dev, PCI_COMMAND);

-       pci_write_config32(dev, PCI_COMMAND, 
+       pci_write_config32(dev, PCI_COMMAND,

                cmd | PCI_COMMAND_MASTER);
 
 
                cmd | PCI_COMMAND_MASTER);
 
 

diff --git a/src/southbridge/intel/i3100/i3100_lpc.c b/src/southbridge/intel/i3100/i3100_lpc.c
index d629e2f144bc53b7cef9b130a60ec09a19f3e869..eaa81e40c7ec2c28449c57073160f1cee365f56d 100644 (file)
--- a/src/southbridge/intel/i3100/i3100_lpc.c
+++ b/src/southbridge/intel/i3100/i3100_lpc.c
@@ -230,9 +230,9 @@ static void i3100_power_options(device_t dev) {
   /* avoid #S4 assertions */
   reg8 |= (3 << 4);
   /* minimum asssertion is 1 to 2 RTCCLK */
   /* avoid #S4 assertions */
   reg8 |= (3 << 4);
   /* minimum asssertion is 1 to 2 RTCCLK */

-  reg8 &= ~(1 << 3);   
+  reg8 &= ~(1 << 3);

   pci_write_config8(dev, GEN_PMCON_3, reg8);
   pci_write_config8(dev, GEN_PMCON_3, reg8);

-  printk(BIOS_INFO, "set power %s after power fail\n", pwr_on ? "on" : "off");  
+  printk(BIOS_INFO, "set power %s after power fail\n", pwr_on ? "on" : "off");

 
   /* Set up NMI on errors. */
   reg8 = inb(0x61);
 
   /* Set up NMI on errors. */
   reg8 = inb(0x61);


@@ -245,14 +245,14 @@ static void i3100_power_options(device_t dev) {
   /* PCI SERR# Disable for now */
   reg8 |= (1 << 2);
   outb(reg8, 0x61);
   /* PCI SERR# Disable for now */
   reg8 |= (1 << 2);
   outb(reg8, 0x61);

-  
+

   reg8 = inb(0x70);
   nmi_option = NMI_OFF;
   get_option(&nmi_option, "nmi");
   if (nmi_option) {
     /* Set NMI. */
     printk(BIOS_INFO, "NMI sources enabled.\n");
   reg8 = inb(0x70);
   nmi_option = NMI_OFF;
   get_option(&nmi_option, "nmi");
   if (nmi_option) {
     /* Set NMI. */
     printk(BIOS_INFO, "NMI sources enabled.\n");

-    reg8 &= ~(1 << 7); 
+    reg8 &= ~(1 << 7);

   } else {
     /* Can't mask NMI from PCI-E and NMI_NOW */
     printk(BIOS_INFO, "NMI sources disabled.\n");
   } else {
     /* Can't mask NMI from PCI-E and NMI_NOW */
     printk(BIOS_INFO, "NMI sources disabled.\n");


@@ -267,7 +267,7 @@ static void i3100_power_options(device_t dev) {
   /* CLKRUN_EN */
   // reg16 |= (1 << 2);
   pci_write_config16(dev, GEN_PMCON_1, reg16);
   /* CLKRUN_EN */
   // reg16 |= (1 << 2);
   pci_write_config16(dev, GEN_PMCON_1, reg16);

-  
+

   // Set the board's GPI routing.
   // i82801gx_gpi_routing(dev);
 }
   // Set the board's GPI routing.
   // i82801gx_gpi_routing(dev);
 }


@@ -321,7 +321,7 @@ static void lpc_init(struct device *dev)
 
        // TODO this code sets int 0 of the IOAPIC in Virtual Wire Mode
        // (register 0x10/0x11) while the old code used int 1 (register 0x12)
 
        // TODO this code sets int 0 of the IOAPIC in Virtual Wire Mode
        // (register 0x10/0x11) while the old code used int 1 (register 0x12)

-       // ... Why? 
+       // ... Why?

        setup_ioapic(IO_APIC_ADDR, 0); // Don't rename IOAPIC ID
 
        /* Decode 0xffc00000 - 0xffffffff to fwh idsel 0 */
        setup_ioapic(IO_APIC_ADDR, 0); // Don't rename IOAPIC ID
 
        /* Decode 0xffc00000 - 0xffffffff to fwh idsel 0 */

diff --git a/src/southbridge/intel/i3100/i3100_sata.c b/src/southbridge/intel/i3100/i3100_sata.c
index cafb68fe0d669b3bfd4c268d3aec1d811c205f8e..14c13da29023e9f73f9315816df59fef470279bf 100644 (file)
--- a/src/southbridge/intel/i3100/i3100_sata.c
+++ b/src/southbridge/intel/i3100/i3100_sata.c
@@ -73,29 +73,29 @@ static void sata_init(struct device *dev)
 
          /* IDE I/O configuration */
          pci_write_config32(dev, SATA_IIOC, 0);
 
          /* IDE I/O configuration */
          pci_write_config32(dev, SATA_IIOC, 0);

-         
+

        } else {
          /* SATA configuration */
          pci_write_config8(dev, SATA_CMD, 0x07);
          pci_write_config8(dev, SATA_PI, 0x8f);
        } else {
          /* SATA configuration */
          pci_write_config8(dev, SATA_CMD, 0x07);
          pci_write_config8(dev, SATA_PI, 0x8f);

-         
+

          /* Set timings */
          pci_write_config16(dev, SATA_PTIM, 0x0a307);
          pci_write_config16(dev, SATA_STIM, 0x0a307);
          /* Set timings */
          pci_write_config16(dev, SATA_PTIM, 0x0a307);
          pci_write_config16(dev, SATA_STIM, 0x0a307);

-         
+

          /* Sync DMA */
          pci_write_config8(dev, SATA_SYNCC, 0x0f);
          pci_write_config16(dev, SATA_SYNCTIM, 0x1111);
          /* Sync DMA */
          pci_write_config8(dev, SATA_SYNCC, 0x0f);
          pci_write_config16(dev, SATA_SYNCTIM, 0x1111);

-         
+

          /* Fast ATA */
          pci_write_config16(dev, SATA_IIOC, 0x1000);
          /* Fast ATA */
          pci_write_config16(dev, SATA_IIOC, 0x1000);

-         
+

          /* Select IDE mode */
          pci_write_config8(dev, SATA_MAP, 0x00);
          /* Select IDE mode */
          pci_write_config8(dev, SATA_MAP, 0x00);

-         
+

          /* Enable ports 0-3 */
          pci_write_config8(dev, SATA_PCS + 1, 0x0f);
          /* Enable ports 0-3 */
          pci_write_config8(dev, SATA_PCS + 1, 0x0f);

-         
+

        }
        printk(BIOS_DEBUG, "SATA Enabled\n");
 }
        }
        printk(BIOS_DEBUG, "SATA Enabled\n");
 }

diff --git a/src/southbridge/intel/i82371eb/i82371eb_smbus.h b/src/southbridge/intel/i82371eb/i82371eb_smbus.h
index a1ede98eb63c8e23abdd1b04a9c2d11563f6ba0b..1c6f26a47d5923c185791184bd779a0e3cea4930 100644 (file)
--- a/src/southbridge/intel/i82371eb/i82371eb_smbus.h
+++ b/src/southbridge/intel/i82371eb/i82371eb_smbus.h
@@ -31,9 +31,9 @@ static int smbus_wait_until_ready(unsigned smbus_io_base)
                if ((val & 0x1) == 0) {
                        break;
                }
                if ((val & 0x1) == 0) {
                        break;
                }

-#if 0          
+#if 0

                if(loops == (SMBUS_TIMEOUT / 2)) {
                if(loops == (SMBUS_TIMEOUT / 2)) {

-                       outw(inw(smbus_io_base + SMBHST_STATUS), 
+                       outw(inw(smbus_io_base + SMBHST_STATUS),

                                smbus_io_base + SMBHST_STATUS);
                }
 #endif
                                smbus_io_base + SMBHST_STATUS);
                }
 #endif


@@ -48,10 +48,10 @@ static int smbus_wait_until_done(unsigned smbus_io_base)
        do {
                unsigned short val;
                smbus_delay();
        do {
                unsigned short val;
                smbus_delay();

-               
+

                val = inb(smbus_io_base + SMBHST_STATUS);
                // Make sure the command is done
                val = inb(smbus_io_base + SMBHST_STATUS);
                // Make sure the command is done

-               if ((val & 0x1) != 0) { 
+               if ((val & 0x1) != 0) {

                        continue;
                }
                // Don't break out until one of the interrupt
                        continue;
                }
                // Don't break out until one of the interrupt


@@ -71,7 +71,7 @@ static int do_smbus_recv_byte(unsigned smbus_io_base, unsigned device)
        if (smbus_wait_until_ready(smbus_io_base) < 0) {
                return SMBUS_WAIT_UNTIL_READY_TIMEOUT;
        }
        if (smbus_wait_until_ready(smbus_io_base) < 0) {
                return SMBUS_WAIT_UNTIL_READY_TIMEOUT;
        }

-       
+

        /* setup transaction */
        /* disable interrupts */
        outw(inw(smbus_io_base + SMBHST_CTL) & ~((1<<10)|(1<<9)|(1<<8)|(1<<4)), smbus_io_base + SMBHST_CTL);
        /* setup transaction */
        /* disable interrupts */
        outw(inw(smbus_io_base + SMBHST_CTL) & ~((1<<10)|(1<<9)|(1<<8)|(1<<4)), smbus_io_base + SMBHST_CTL);


@@ -117,7 +117,7 @@ static int do_smbus_send_byte(unsigned smbus_io_base, unsigned device, unsigned
        if (smbus_wait_until_ready(smbus_io_base) < 0) {
                return SMBUS_WAIT_UNTIL_READY_TIMEOUT;
        }
        if (smbus_wait_until_ready(smbus_io_base) < 0) {
                return SMBUS_WAIT_UNTIL_READY_TIMEOUT;
        }

-       
+

        /* setup transaction */
        /* disable interrupts */
        outw(inw(smbus_io_base + SMBHST_CTL) & ~((1<<10)|(1<<9)|(1<<8)|(1<<4)), smbus_io_base + SMBHST_CTL);
        /* setup transaction */
        /* disable interrupts */
        outw(inw(smbus_io_base + SMBHST_CTL) & ~((1<<10)|(1<<9)|(1<<8)|(1<<4)), smbus_io_base + SMBHST_CTL);


@@ -160,7 +160,7 @@ static int do_smbus_read_byte(unsigned smbus_io_base, unsigned device, unsigned
        if (smbus_wait_until_ready(smbus_io_base) < 0) {
                return SMBUS_WAIT_UNTIL_READY_TIMEOUT;
        }
        if (smbus_wait_until_ready(smbus_io_base) < 0) {
                return SMBUS_WAIT_UNTIL_READY_TIMEOUT;
        }

-       
+

        /* setup transaction */
 
        /* clear any lingering errors, so the transaction will run */
        /* setup transaction */
 
        /* clear any lingering errors, so the transaction will run */

diff --git a/src/southbridge/intel/i82801ax/i82801ax_ide.c b/src/southbridge/intel/i82801ax/i82801ax_ide.c
index 2daa986bd429f4dc94839c45e2256607f6f70311..da3e404d26071f7fd33b970cbd526e31f45d9fc6 100644 (file)
--- a/src/southbridge/intel/i82801ax/i82801ax_ide.c
+++ b/src/southbridge/intel/i82801ax/i82801ax_ide.c
@@ -32,7 +32,7 @@ typedef struct southbridge_intel_i82801ax_config config_t;
 static void ide_init(struct device *dev)
 {
        /* Get the chip configuration */
 static void ide_init(struct device *dev)
 {
        /* Get the chip configuration */

-       config_t *config = dev->chip_info; 
+       config_t *config = dev->chip_info;

 
        /* TODO: Needs to be tested for compatibility with ICH5(R). */
        /* Enable IDE devices so the Linux IDE driver will work. */
 
        /* TODO: Needs to be tested for compatibility with ICH5(R). */
        /* Enable IDE devices so the Linux IDE driver will work. */

diff --git a/src/southbridge/intel/i82801ax/i82801ax_lpc.c b/src/southbridge/intel/i82801ax/i82801ax_lpc.c
index 8fccdf0983056074f34562a9241a1143eec041a4..50be866be32c7f06a04725cd0627077e15de6f9c 100644 (file)
--- a/src/southbridge/intel/i82801ax/i82801ax_lpc.c
+++ b/src/southbridge/intel/i82801ax/i82801ax_lpc.c
@@ -68,8 +68,8 @@ typedef struct southbridge_intel_i82801ax_config config_t;
 #define PIRQG 0x0A
 #define PIRQH 0x0B
 
 #define PIRQG 0x0A
 #define PIRQH 0x0B
 

-/* 
- * Use 0x0ef8 for a bitmap to cover all these IRQ's. 
+/*
+ * Use 0x0ef8 for a bitmap to cover all these IRQ's.

  * Use the defined IRQ values above or set mainboard
  * specific IRQ values in your mainboards Config.lb.
 */
  * Use the defined IRQ values above or set mainboard
  * specific IRQ values in your mainboards Config.lb.
 */

diff --git a/src/southbridge/intel/i82801bx/i82801bx_ide.c b/src/southbridge/intel/i82801bx/i82801bx_ide.c
index ffbaf80dbda6c2ebbe392a4d545321dffbaeec6a..9d287b2b9b8f5406a07f5f326b024d217edced43 100644 (file)
--- a/src/southbridge/intel/i82801bx/i82801bx_ide.c
+++ b/src/southbridge/intel/i82801bx/i82801bx_ide.c
@@ -32,7 +32,7 @@ typedef struct southbridge_intel_i82801bx_config config_t;
 static void ide_init(struct device *dev)
 {
        /* Get the chip configuration */
 static void ide_init(struct device *dev)
 {
        /* Get the chip configuration */

-       config_t *config = dev->chip_info; 
+       config_t *config = dev->chip_info;

 
        /* TODO: Needs to be tested for compatibility with ICH5(R). */
        /* Enable IDE devices so the Linux IDE driver will work. */
 
        /* TODO: Needs to be tested for compatibility with ICH5(R). */
        /* Enable IDE devices so the Linux IDE driver will work. */

diff --git a/src/southbridge/intel/i82801bx/i82801bx_lpc.c b/src/southbridge/intel/i82801bx/i82801bx_lpc.c
index c63de08c2a16515d24dd931b470b94faff4c5336..96dbd54e3721ef2279914c8b530102b3850adb72 100644 (file)
--- a/src/southbridge/intel/i82801bx/i82801bx_lpc.c
+++ b/src/southbridge/intel/i82801bx/i82801bx_lpc.c
@@ -68,8 +68,8 @@ typedef struct southbridge_intel_i82801bx_config config_t;
 #define PIRQG 0x0A
 #define PIRQH 0x0B
 
 #define PIRQG 0x0A
 #define PIRQH 0x0B
 

-/* 
- * Use 0x0ef8 for a bitmap to cover all these IRQ's. 
+/*
+ * Use 0x0ef8 for a bitmap to cover all these IRQ's.

  * Use the defined IRQ values above or set mainboard
  * specific IRQ values in your mainboards Config.lb.
 */
  * Use the defined IRQ values above or set mainboard
  * specific IRQ values in your mainboards Config.lb.
 */

diff --git a/src/southbridge/intel/i82801bx/i82801bx_smbus.h b/src/southbridge/intel/i82801bx/i82801bx_smbus.h
index e4ec70bc5f1f85201153076bced4b29830f789a4..6287b631afcec7f6d690a13c855a3379fcc2d04b 100644 (file)
--- a/src/southbridge/intel/i82801bx/i82801bx_smbus.h
+++ b/src/southbridge/intel/i82801bx/i82801bx_smbus.h
@@ -110,7 +110,7 @@ static int do_smbus_read_byte(unsigned device, unsigned address)
        return byte;
 }
 
        return byte;
 }
 

-/* This function is neither used nor tested by me (Corey Osgood), the author 
+/* This function is neither used nor tested by me (Corey Osgood), the author

 (Yinghai) probably tested/used it on i82801er */
 static int do_smbus_write_block(unsigned device, unsigned length, unsigned cmd,
                                unsigned data1, unsigned data2)
 (Yinghai) probably tested/used it on i82801er */
 static int do_smbus_write_block(unsigned device, unsigned length, unsigned cmd,
                                unsigned data1, unsigned data2)

diff --git a/src/southbridge/intel/i82801cx/chip.h b/src/southbridge/intel/i82801cx/chip.h
index 99b069e82db8676c1dcea20b3dfccce68fbed37b..88415e0556368a715f7c9aec50f0c313dd751ec4 100644 (file)
--- a/src/southbridge/intel/i82801cx/chip.h
+++ b/src/southbridge/intel/i82801cx/chip.h
@@ -1,7 +1,7 @@
 #ifndef I82801CX_CHIP_H
 #define I82801CX_CHIP_H
 
 #ifndef I82801CX_CHIP_H
 #define I82801CX_CHIP_H
 

-struct southbridge_intel_i82801cx_config 
+struct southbridge_intel_i82801cx_config

 {
 };
 extern struct chip_operations southbridge_intel_i82801cx_ops;
 {
 };
 extern struct chip_operations southbridge_intel_i82801cx_ops;

diff --git a/src/southbridge/intel/i82801cx/i82801cx.c b/src/southbridge/intel/i82801cx/i82801cx.c
index ddbbc7da37044b03e143cc65efd819da1753ce0f..685c931fc89b3aca6a6d0617616285b4493ea29d 100644 (file)
--- a/src/southbridge/intel/i82801cx/i82801cx.c
+++ b/src/southbridge/intel/i82801cx/i82801cx.c
@@ -19,7 +19,7 @@ void i82801cx_enable(device_t dev)
 
        // Calculate disable bit position for specified device:function
        // NOTE: For ICH-3, only the following devices can be disabled:
 
        // Calculate disable bit position for specified device:function
        // NOTE: For ICH-3, only the following devices can be disabled:

-       //               D31:F1, D31:F3, D31:F5, D31:F6, 
+       //               D31:F1, D31:F3, D31:F5, D31:F6,

        //               D29:F0, D29:F1, D29:F2
 
     if (PCI_SLOT(dev->path.pci.devfn) == 31) {
        //               D29:F0, D29:F1, D29:F2
 
     if (PCI_SLOT(dev->path.pci.devfn) == 31) {

diff --git a/src/southbridge/intel/i82801cx/i82801cx.h b/src/southbridge/intel/i82801cx/i82801cx.h
index ea7d858d14ec13b0ad32343e02df431d6647fd58..e0d377a9cdc75cc7d1de3f567f029c72aebdd753 100644 (file)
--- a/src/southbridge/intel/i82801cx/i82801cx.h
+++ b/src/southbridge/intel/i82801cx/i82801cx.h
@@ -70,9 +70,9 @@ void i82801cx_hard_reset(void);
 #define SMBTRNSADD             9
 #define SMBSLVDATA             10
 #define SMLINK_PIN_CTL 14
 #define SMBTRNSADD             9
 #define SMBSLVDATA             10
 #define SMLINK_PIN_CTL 14

-#define SMBUS_PIN_CTL  15 
+#define SMBUS_PIN_CTL  15

 
 

-/* Between 1-10 seconds, We should never timeout normally 
+/* Between 1-10 seconds, We should never timeout normally

  * Longer than this is just painful when a timeout condition occurs.
  */
 #define SMBUS_TIMEOUT (100*1000)
  * Longer than this is just painful when a timeout condition occurs.
  */
 #define SMBUS_TIMEOUT (100*1000)

diff --git a/src/southbridge/intel/i82801cx/i82801cx_early_smbus.c b/src/southbridge/intel/i82801cx/i82801cx_early_smbus.c
index 02420ef75be36c0d75127f5a571d1cad57e24077..b62db80f9c8f91a2c702d4dacb8f179e8a480e46 100644 (file)
--- a/src/southbridge/intel/i82801cx/i82801cx_early_smbus.c
+++ b/src/southbridge/intel/i82801cx/i82801cx_early_smbus.c
@@ -10,9 +10,9 @@ static void enable_smbus(void)
        pci_write_config32(dev, SMB_BASE, SMBUS_IO_BASE | PCI_BASE_ADDRESS_SPACE_IO);
        /* Set smbus enable */
        pci_write_config8(dev, HOSTC, HST_EN);
        pci_write_config32(dev, SMB_BASE, SMBUS_IO_BASE | PCI_BASE_ADDRESS_SPACE_IO);
        /* Set smbus enable */
        pci_write_config8(dev, HOSTC, HST_EN);

-       /* Set smbus iospace enable */ 
+       /* Set smbus iospace enable */

        pci_write_config16(dev, PCI_COMMAND, PCI_COMMAND_IO);
        pci_write_config16(dev, PCI_COMMAND, PCI_COMMAND_IO);

-       /* Disable interrupt generation */ 
+       /* Disable interrupt generation */

        outb(0, SMBUS_IO_BASE + SMBHSTCTL);
        /* clear any lingering errors, so the transaction will run */
        outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT);
        outb(0, SMBUS_IO_BASE + SMBHSTCTL);
        /* clear any lingering errors, so the transaction will run */
        outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT);


@@ -55,7 +55,7 @@ static int smbus_wait_until_ready(void)
                }
                if(loops == (SMBUS_TIMEOUT / 2)) {
                        // Clear status flags
                }
                if(loops == (SMBUS_TIMEOUT / 2)) {
                        // Clear status flags

-                       outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), 
+                       outb(inb(SMBUS_IO_BASE + SMBHSTSTAT),

                                SMBUS_IO_BASE + SMBHSTSTAT);
                }
        } while(--loops);
                                SMBUS_IO_BASE + SMBHSTSTAT);
                }
        } while(--loops);


@@ -69,7 +69,7 @@ static int smbus_wait_until_done(void)
        do {
                unsigned char val;
                smbus_delay();
        do {
                unsigned char val;
                smbus_delay();

-               
+

                val = inb(SMBUS_IO_BASE + SMBHSTSTAT);
                // !HOST_BUSY?
                if ( (val & 1) == 0) {
                val = inb(SMBUS_IO_BASE + SMBHSTSTAT);
                // !HOST_BUSY?
                if ( (val & 1) == 0) {


@@ -92,7 +92,7 @@ static int smbus_read_byte(unsigned device, unsigned address)
        if (smbus_wait_until_ready() < 0) {
                return -2;
        }
        if (smbus_wait_until_ready() < 0) {
                return -2;
        }

-       
+

        /* setup transaction */
        /* disable interrupts */
        outb(inb(SMBUS_IO_BASE + SMBHSTCTL) & 0xfe, SMBUS_IO_BASE + SMBHSTCTL);
        /* setup transaction */
        /* disable interrupts */
        outb(inb(SMBUS_IO_BASE + SMBHSTCTL) & 0xfe, SMBUS_IO_BASE + SMBHSTCTL);

diff --git a/src/southbridge/intel/i82801cx/i82801cx_lpc.c b/src/southbridge/intel/i82801cx/i82801cx_lpc.c
index 7523b03f8097e72ade36ce20d2fe5807cb30558a..97b2994abf053eca62d36afa2071b8cf5ebdce93 100644 (file)
--- a/src/southbridge/intel/i82801cx/i82801cx_lpc.c
+++ b/src/southbridge/intel/i82801cx/i82801cx_lpc.c
@@ -23,7 +23,7 @@
 #define MAINBOARD_POWER_ON  1
 
 
 #define MAINBOARD_POWER_ON  1
 
 

-static void i82801cx_enable_ioapic( struct device *dev) 
+static void i82801cx_enable_ioapic( struct device *dev)

 {
        uint32_t dword;
     volatile uint32_t* ioapic_index = (volatile uint32_t*)0xfec00000;
 {
        uint32_t dword;
     volatile uint32_t* ioapic_index = (volatile uint32_t*)0xfec00000;


@@ -36,12 +36,12 @@ static void i82801cx_enable_ioapic( struct device *dev)
     dword |= (1 << 2); /* DMA collection buf enable */
     pci_write_config32(dev, GEN_CNTL, dword);
     printk(BIOS_DEBUG, "ioapic southbridge enabled %x\n",dword);
     dword |= (1 << 2); /* DMA collection buf enable */
     pci_write_config32(dev, GEN_CNTL, dword);
     printk(BIOS_DEBUG, "ioapic southbridge enabled %x\n",dword);

-        
+

     // Must program the APIC's ID before using it
 
     *ioapic_index = 0;         // Select APIC ID register
     *ioapic_data = (2<<24);
     // Must program the APIC's ID before using it
 
     *ioapic_index = 0;         // Select APIC ID register
     *ioapic_data = (2<<24);

-        
+

     // Hang if the ID didn't take (chip not present?)
     *ioapic_index = 0;
     dword = *ioapic_data;
     // Hang if the ID didn't take (chip not present?)
     *ioapic_index = 0;
     dword = *ioapic_data;


@@ -65,11 +65,11 @@ static void i82801cx_enable_serial_irqs( struct device *dev)
 // Parameters:         dev
 //                                     mask - identifies whether each channel should be used for PCI DMA
 //                                                (bit = 0) or LPC DMA (bit = 1). The LSb controls channel 0.
 // Parameters:         dev
 //                                     mask - identifies whether each channel should be used for PCI DMA
 //                                                (bit = 0) or LPC DMA (bit = 1). The LSb controls channel 0.

-//                                                Channel 4 is not used (reserved). 
+//                                                Channel 4 is not used (reserved).

 // Return Value:       None
 // Description:        Route all DMA channels to either PCI or LPC.
 //
 // Return Value:       None
 // Description:        Route all DMA channels to either PCI or LPC.
 //

-static void i82801cx_lpc_route_dma( struct device *dev, uint8_t mask) 
+static void i82801cx_lpc_route_dma( struct device *dev, uint8_t mask)

 {
     uint16_t dmaConfig;
     int channelIndex;
 {
     uint16_t dmaConfig;
     int channelIndex;


@@ -105,13 +105,13 @@ static void i82801cx_rtc_init(struct device *dev)
                pmcon3 |= SLEEP_AFTER_POWER_FAIL;
        }
        pci_write_config8(dev, GEN_PMCON_3, pmcon3);
                pmcon3 |= SLEEP_AFTER_POWER_FAIL;
        }
        pci_write_config8(dev, GEN_PMCON_3, pmcon3);

-       printk(BIOS_INFO, "set power %s after power fail\n", 
+       printk(BIOS_INFO, "set power %s after power fail\n",

                                 pwr_on ? "on" : "off");
 
     // See if the Safe Mode jumper is set
     dword = pci_read_config32(dev, GEN_STS);
     rtc_failed |= dword & (1 << 2);
                                 pwr_on ? "on" : "off");
 
     // See if the Safe Mode jumper is set
     dword = pci_read_config32(dev, GEN_STS);
     rtc_failed |= dword & (1 << 2);

-        
+

     rtc_init(rtc_failed);
 }
 
     rtc_init(rtc_failed);
 }
 


@@ -120,28 +120,28 @@ static void i82801cx_1f0_misc(struct device *dev)
 {
        // Prevent LPC disabling, enable parity errors, and SERR# (System Error)
     pci_write_config16(dev, PCI_COMMAND, 0x014f);
 {
        // Prevent LPC disabling, enable parity errors, and SERR# (System Error)
     pci_write_config16(dev, PCI_COMMAND, 0x014f);

-        
+

     // Set ACPI base address to 0x1100 (I/O space)
     pci_write_config32(dev, PMBASE, 0x00001101);
     // Set ACPI base address to 0x1100 (I/O space)
     pci_write_config32(dev, PMBASE, 0x00001101);

-        
+

     // Enable ACPI I/O and power management
     pci_write_config8(dev, ACPI_CNTL, 0x10);
     // Enable ACPI I/O and power management
     pci_write_config8(dev, ACPI_CNTL, 0x10);

-        
+

     // Set GPIO base address to 0x1180 (I/O space)
     pci_write_config32(dev, GPIO_BASE, 0x00001181);
     // Set GPIO base address to 0x1180 (I/O space)
     pci_write_config32(dev, GPIO_BASE, 0x00001181);

-        
+

     // Enable GPIO
     pci_write_config8(dev, GPIO_CNTL, 0x10);
     // Enable GPIO
     pci_write_config8(dev, GPIO_CNTL, 0x10);

-        
+

     // Route PIRQA to IRQ11, PIRQB to IRQ3, PIRQC to IRQ5, PIRQD to IRQ10
     pci_write_config32(dev, PIRQA_ROUT, 0x0A05030B);
     // Route PIRQA to IRQ11, PIRQB to IRQ3, PIRQC to IRQ5, PIRQD to IRQ10
     pci_write_config32(dev, PIRQA_ROUT, 0x0A05030B);

-        
+

     // Route PIRQE to IRQ7. Leave PIRQF - PIRQH unrouted.
     pci_write_config8(dev, PIRQE_ROUT, 0x07);
     // Route PIRQE to IRQ7. Leave PIRQF - PIRQH unrouted.
     pci_write_config8(dev, PIRQE_ROUT, 0x07);

-        
+

     // Enable access to the upper 128 byte bank of CMOS RAM
     pci_write_config8(dev, RTC_CONF, 0x04);
     // Enable access to the upper 128 byte bank of CMOS RAM
     pci_write_config8(dev, RTC_CONF, 0x04);

-        
+

     // Decode 0x3F8-0x3FF (COM1) for COMA port,
        //                0x2F8-0x2FF (COM2) for COMB
     pci_write_config8(dev, COM_DEC, 0x10);
     // Decode 0x3F8-0x3FF (COM1) for COMA port,
        //                0x2F8-0x2FF (COM2) for COMB
     pci_write_config8(dev, COM_DEC, 0x10);


@@ -149,7 +149,7 @@ static void i82801cx_1f0_misc(struct device *dev)
        // LPT decode defaults to 0x378-0x37F and 0x778-0x77F
        // Floppy decode defaults to 0x3F0-0x3F5, 0x3F7
 
        // LPT decode defaults to 0x378-0x37F and 0x778-0x77F
        // Floppy decode defaults to 0x3F0-0x3F5, 0x3F7
 

-    // Enable COMA, COMB, LPT, floppy; 
+    // Enable COMA, COMB, LPT, floppy;

        // disable microcontroller, Super I/O, sound, gameport
     pci_write_config16(dev, LPC_EN, 0x000F);
 }
        // disable microcontroller, Super I/O, sound, gameport
     pci_write_config16(dev, LPC_EN, 0x000F);
 }


@@ -164,7 +164,7 @@ static void lpc_init(struct device *dev)
        i82801cx_enable_ioapic(dev);
 
        i82801cx_enable_serial_irqs(dev);
        i82801cx_enable_ioapic(dev);
 
        i82801cx_enable_serial_irqs(dev);

-       
+

        /* power after power fail */
                /* FIXME this doesn't work! */
         /* Which state do we want to goto after g3 (power restored)?
        /* power after power fail */
                /* FIXME this doesn't work! */
         /* Which state do we want to goto after g3 (power restored)?


@@ -187,11 +187,11 @@ static void lpc_init(struct device *dev)
     byte = inb(0x70);
     nmi_option = NMI_OFF;
     get_option(&nmi_option, "nmi");
     byte = inb(0x70);
     nmi_option = NMI_OFF;
     get_option(&nmi_option, "nmi");

-    if (nmi_option) {                  
+    if (nmi_option) {

         byte &= ~(1 << 7); /* set NMI */
         outb(byte, 0x70);
     }
         byte &= ~(1 << 7); /* set NMI */
         outb(byte, 0x70);
     }

-       
+

        /* Initialize the real time clock */
        i82801cx_rtc_init(dev);
 
        /* Initialize the real time clock */
        i82801cx_rtc_init(dev);
 

diff --git a/src/southbridge/intel/i82801cx/i82801cx_smbus.c b/src/southbridge/intel/i82801cx/i82801cx_smbus.c
index b69bbc1d9dca45468524a2f45059d48affb072ac..324f82f2863097c2f47157b6d3499842b554f175 100644 (file)
--- a/src/southbridge/intel/i82801cx/i82801cx_smbus.c
+++ b/src/southbridge/intel/i82801cx/i82801cx_smbus.c
@@ -9,7 +9,7 @@
 void smbus_enable(void)
 {
        /* iobase addr */
 void smbus_enable(void)
 {
        /* iobase addr */

-       pcibios_write_config_dword(PM_BUS, PM_DEVFN, SMB_BASE, 
+       pcibios_write_config_dword(PM_BUS, PM_DEVFN, SMB_BASE,

                                                           SMBUS_IO_BASE | PCI_BASE_ADDRESS_SPACE_IO);
        /* smbus enable */
        pcibios_write_config_byte(PM_BUS, PM_DEVFN, HOSTC, HST_EN);
                                                           SMBUS_IO_BASE | PCI_BASE_ADDRESS_SPACE_IO);
        /* smbus enable */
        pcibios_write_config_byte(PM_BUS, PM_DEVFN, HOSTC, HST_EN);


@@ -31,13 +31,13 @@ static void smbus_wait_until_ready(void)
 static void smbus_wait_until_done(void)
 {
        unsigned char byte;
 static void smbus_wait_until_done(void)
 {
        unsigned char byte;

-       
+

        // Loop while HOST_BUSY
        do {
                byte = inb(SMBUS_IO_BASE + SMBHSTSTAT);
        }
        while((byte &1) == 1);
        // Loop while HOST_BUSY
        do {
                byte = inb(SMBUS_IO_BASE + SMBHSTSTAT);
        }
        while((byte &1) == 1);

-       
+

        // Wait for SUCCESS or error or BYTE_DONE
        while( (byte & ~1) == 0) {
                byte = inb(SMBUS_IO_BASE + SMBHSTSTAT);
        // Wait for SUCCESS or error or BYTE_DONE
        while( (byte & ~1) == 0) {
                byte = inb(SMBUS_IO_BASE + SMBHSTSTAT);

diff --git a/src/southbridge/intel/i82801cx/i82801cx_usb.c b/src/southbridge/intel/i82801cx/i82801cx_usb.c
index 00b668d023ceffea452394ff6c74f8232e24196a..28cb3572e5399ac67152dd38760e99870d641854 100644 (file)
--- a/src/southbridge/intel/i82801cx/i82801cx_usb.c
+++ b/src/southbridge/intel/i82801cx/i82801cx_usb.c
@@ -12,8 +12,8 @@ static void usb_init(struct device *dev)
        uint32_t cmd;
        printk(BIOS_DEBUG, "USB: Setting up controller.. ");
        cmd = pci_read_config32(dev, PCI_COMMAND);
        uint32_t cmd;
        printk(BIOS_DEBUG, "USB: Setting up controller.. ");
        cmd = pci_read_config32(dev, PCI_COMMAND);

-       pci_write_config32(dev, PCI_COMMAND, 
-               cmd | PCI_COMMAND_IO | PCI_COMMAND_MEMORY | 
+       pci_write_config32(dev, PCI_COMMAND,
+               cmd | PCI_COMMAND_IO | PCI_COMMAND_MEMORY |

                PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE);
 
 
                PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE);
 
 

diff --git a/src/southbridge/intel/i82801dx/i82801dx.c b/src/southbridge/intel/i82801dx/i82801dx.c
index 282ccfd2473acc894f7bad6a8d2b5d98b5ca6585..ac904efa2982d77a490aaa1b9ac9f7e9f88b24e5 100644 (file)
--- a/src/southbridge/intel/i82801dx/i82801dx.c
+++ b/src/southbridge/intel/i82801dx/i82801dx.c
@@ -38,7 +38,7 @@ void i82801dx_enable(device_t dev)
 
        // Calculate disable bit position for specified device:function
        // NOTE: For ICH-4, only the following devices can be disabled:
 
        // Calculate disable bit position for specified device:function
        // NOTE: For ICH-4, only the following devices can be disabled:

-       //               D31: F0, F1, F3, F5, F6, 
+       //               D31: F0, F1, F3, F5, F6,

        //               D29: F0, F1, F2, F7
 
        if (PCI_SLOT(dev->path.pci.devfn) == 31) {
        //               D29: F0, F1, F2, F7
 
        if (PCI_SLOT(dev->path.pci.devfn) == 31) {

diff --git a/src/southbridge/intel/i82801dx/i82801dx.h b/src/southbridge/intel/i82801dx/i82801dx.h
index 885f9de0f104cca9a04a7b05a034bcfca6c9d246..1b995b12040c90a01c7e86c384c7b5db0c6e1dca 100644 (file)
--- a/src/southbridge/intel/i82801dx/i82801dx.h
+++ b/src/southbridge/intel/i82801dx/i82801dx.h
@@ -20,11 +20,11 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 

-/* the problem: we have 82801dbm support in fb1, and 82801er in fb2. 
- * fb1 code is what we want, fb2 structure is needed however. 
- * so we need to get fb1 code for 82801dbm into fb2 structure. 
+/* the problem: we have 82801dbm support in fb1, and 82801er in fb2.
+ * fb1 code is what we want, fb2 structure is needed however.
+ * so we need to get fb1 code for 82801dbm into fb2 structure.

  */
  */

-/* What I did: took the 80801er stuff from fb2, verify it against the 
+/* What I did: took the 80801er stuff from fb2, verify it against the

  * db stuff in fb1, and made sure it was right.
  */
 
  * db stuff in fb1, and made sure it was right.
  */
 


@@ -132,9 +132,9 @@ extern void i82801dx_enable(device_t dev);
 #define SMBTRNSADD 0x9
 #define SMBSLVDATA 0xa
 #define SMLINK_PIN_CTL 0xe
 #define SMBTRNSADD 0x9
 #define SMBSLVDATA 0xa
 #define SMLINK_PIN_CTL 0xe

-#define SMBUS_PIN_CTL  0xf 
+#define SMBUS_PIN_CTL  0xf

 
 

-/* Between 1-10 seconds, We should never timeout normally 
+/* Between 1-10 seconds, We should never timeout normally

  * Longer than this is just painful when a timeout condition occurs.
  */
 #define SMBUS_TIMEOUT (100*1000)
  * Longer than this is just painful when a timeout condition occurs.
  */
 #define SMBUS_TIMEOUT (100*1000)

diff --git a/src/southbridge/intel/i82801dx/i82801dx_early_smbus.c b/src/southbridge/intel/i82801dx/i82801dx_early_smbus.c
index 16c6e11e728d1f6f1b1c7968763ed7d7d7560a85..f58cd863427a46443af3de1642692ead3314d967 100644 (file)
--- a/src/southbridge/intel/i82801dx/i82801dx_early_smbus.c
+++ b/src/southbridge/intel/i82801dx/i82801dx_early_smbus.c
@@ -32,7 +32,7 @@
 #define SMLINK_PIN_CTL 0xe
 #define SMBUS_PIN_CTL  0xf
 
 #define SMLINK_PIN_CTL 0xe
 #define SMBUS_PIN_CTL  0xf
 

-/* Between 1-10 seconds, We should never timeout normally 
+/* Between 1-10 seconds, We should never timeout normally

  * Longer than this is just painful when a timeout condition occurs.
  */
 //#define SMBUS_TIMEOUT (100*1000*10)
  * Longer than this is just painful when a timeout condition occurs.
  */
 //#define SMBUS_TIMEOUT (100*1000*10)

diff --git a/src/southbridge/intel/i82801ex/chip.h b/src/southbridge/intel/i82801ex/chip.h
index 34a0a97ffd558b25ffe2f955d4affba5dfb7ccd2..f04fc3fd29c6c67027adca06db6c93a3f11fa6fe 100644 (file)
--- a/src/southbridge/intel/i82801ex/chip.h
+++ b/src/southbridge/intel/i82801ex/chip.h
@@ -1,7 +1,7 @@
 #ifndef I82801EX_CHIP_H
 #define I82801EX_CHIP_H
 
 #ifndef I82801EX_CHIP_H
 #define I82801EX_CHIP_H
 

-struct southbridge_intel_i82801ex_config 
+struct southbridge_intel_i82801ex_config

 {
 
 #define ICH5R_GPIO_USE_MASK      0x03
 {
 
 #define ICH5R_GPIO_USE_MASK      0x03

diff --git a/src/southbridge/intel/i82801ex/i82801ex.c b/src/southbridge/intel/i82801ex/i82801ex.c
index bc5f04bf449e73f15f035cdd5469fb9c2db22a75..fc4164523a19151e6a331ed34a326382ab65440c 100644 (file)
--- a/src/southbridge/intel/i82801ex/i82801ex.c
+++ b/src/southbridge/intel/i82801ex/i82801ex.c
@@ -25,7 +25,7 @@ void i82801ex_enable(device_t dev)
                (lpc_dev->device != PCI_DEVICE_ID_INTEL_82801ER_LPC)) {
                uint32_t id;
                id = pci_read_config32(lpc_dev, PCI_VENDOR_ID);
                (lpc_dev->device != PCI_DEVICE_ID_INTEL_82801ER_LPC)) {
                uint32_t id;
                id = pci_read_config32(lpc_dev, PCI_VENDOR_ID);

-               if (id != (PCI_VENDOR_ID_INTEL | 
+               if (id != (PCI_VENDOR_ID_INTEL |

                                (PCI_DEVICE_ID_INTEL_82801ER_LPC << 16))) {
                        return;
                }
                                (PCI_DEVICE_ID_INTEL_82801ER_LPC << 16))) {
                        return;
                }


@@ -39,7 +39,7 @@ void i82801ex_enable(device_t dev)
        if (reg != reg_old) {
                pci_write_config16(lpc_dev, 0xf2, reg);
        }
        if (reg != reg_old) {
                pci_write_config16(lpc_dev, 0xf2, reg);
        }

-       
+

 }
 
 struct chip_operations southbridge_intel_i82801ex_ops = {
 }
 
 struct chip_operations southbridge_intel_i82801ex_ops = {

diff --git a/src/southbridge/intel/i82801ex/i82801ex_ac97.c b/src/southbridge/intel/i82801ex/i82801ex_ac97.c
index 65502dd8cc1d51ea07d9e53bef902eb464b03f0c..08efe1534dbecb5dd2ab2631af9708f19f2f9474 100644 (file)
--- a/src/southbridge/intel/i82801ex/i82801ex_ac97.c
+++ b/src/southbridge/intel/i82801ex/i82801ex_ac97.c
@@ -8,7 +8,7 @@
 static void ac97_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 {
        /* Write the subsystem vendor and device id */
 static void ac97_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 {
        /* Write the subsystem vendor and device id */

-       pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, 
+       pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,

                ((device & 0xffff) << 16) | (vendor & 0xffff));
 }
 
                ((device & 0xffff) << 16) | (vendor & 0xffff));
 }
 

diff --git a/src/southbridge/intel/i82801ex/i82801ex_early_smbus.c b/src/southbridge/intel/i82801ex/i82801ex_early_smbus.c
index 27bd3f23249a30d613a56afe33174779f81d7b6b..b07c77a94f4ba1a8f79a4ab0a0564ccf5740fa07 100644 (file)
--- a/src/southbridge/intel/i82801ex/i82801ex_early_smbus.c
+++ b/src/southbridge/intel/i82801ex/i82801ex_early_smbus.c
@@ -35,7 +35,7 @@ static void smbus_write_byte(unsigned device, unsigned address, unsigned char va
        if (smbus_wait_until_ready(SMBUS_IO_BASE) < 0) {
                return;
        }
        if (smbus_wait_until_ready(SMBUS_IO_BASE) < 0) {
                return;
        }

-       
+

        print_debug("Unimplemented smbus_write_byte() called.\n");
 
 #if 0
        print_debug("Unimplemented smbus_write_byte() called.\n");
 
 #if 0


@@ -60,11 +60,11 @@ static void smbus_write_byte(unsigned device, unsigned address, unsigned char va
 
        /* poll for transaction completion */
        smbus_wait_until_done(SMBUS_IO_BASE);
 
        /* poll for transaction completion */
        smbus_wait_until_done(SMBUS_IO_BASE);

-#endif 
+#endif

        return;
 }
 
        return;
 }
 

-static int smbus_write_block(unsigned device, unsigned length, unsigned cmd, 
+static int smbus_write_block(unsigned device, unsigned length, unsigned cmd,

                 unsigned data1, unsigned data2)
 {
        unsigned char byte;
                 unsigned data1, unsigned data2)
 {
        unsigned char byte;


@@ -73,11 +73,11 @@ static int smbus_write_block(unsigned device, unsigned length, unsigned cmd,
 
        /* chear the PM timeout flags, SECOND_TO_STS */
        outw(inw(0x0400 + 0x66), 0x0400 + 0x66);
 
        /* chear the PM timeout flags, SECOND_TO_STS */
        outw(inw(0x0400 + 0x66), 0x0400 + 0x66);

-       
+

        if (smbus_wait_until_ready(SMBUS_IO_BASE) < 0) {
                return -2;
        }
        if (smbus_wait_until_ready(SMBUS_IO_BASE) < 0) {
                return -2;
        }

-       
+

        /* setup transaction */
        /* Obtain ownership */
        outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT);
        /* setup transaction */
        /* Obtain ownership */
        outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT);


@@ -88,39 +88,39 @@ static int smbus_write_block(unsigned device, unsigned length, unsigned cmd,
        outb(0x80, SMBUS_IO_BASE + SMBHSTSTAT);
        /* disable interrupts */
        outb(inb(SMBUS_IO_BASE + SMBHSTCTL) & (~1), SMBUS_IO_BASE + SMBHSTCTL);
        outb(0x80, SMBUS_IO_BASE + SMBHSTSTAT);
        /* disable interrupts */
        outb(inb(SMBUS_IO_BASE + SMBHSTCTL) & (~1), SMBUS_IO_BASE + SMBHSTCTL);

-       
+

        /* set the device I'm talking too */
        outb(((device & 0x7f) << 1), SMBUS_IO_BASE + SMBXMITADD);
        /* set the device I'm talking too */
        outb(((device & 0x7f) << 1), SMBUS_IO_BASE + SMBXMITADD);

-       
+

        /* set the command address */
        outb(cmd & 0xFF, SMBUS_IO_BASE + SMBHSTCMD);
        /* set the command address */
        outb(cmd & 0xFF, SMBUS_IO_BASE + SMBHSTCMD);

-       
+

        /* set the block length */
        outb(length & 0xFF, SMBUS_IO_BASE + SMBHSTDAT0);
        /* set the block length */
        outb(length & 0xFF, SMBUS_IO_BASE + SMBHSTDAT0);

-       
+

        /* try sending out the first byte of data here */
        byte=(data1>>(0))&0x0ff;
        outb(byte,SMBUS_IO_BASE + SMBBLKDAT);
        /* issue a block write command */
        /* try sending out the first byte of data here */
        byte=(data1>>(0))&0x0ff;
        outb(byte,SMBUS_IO_BASE + SMBBLKDAT);
        /* issue a block write command */

-       outb((inb(SMBUS_IO_BASE + SMBHSTCTL) & 0xE3) | (0x5 << 2) | 0x40, 
+       outb((inb(SMBUS_IO_BASE + SMBHSTCTL) & 0xE3) | (0x5 << 2) | 0x40,

                        SMBUS_IO_BASE + SMBHSTCTL);
 
        for(i=0;i<length;i++) {
                        SMBUS_IO_BASE + SMBHSTCTL);
 
        for(i=0;i<length;i++) {

-               
+

                /* poll for transaction completion */
                if (smbus_wait_until_blk_done(SMBUS_IO_BASE) < 0) {
                        return -3;
                }
                /* poll for transaction completion */
                if (smbus_wait_until_blk_done(SMBUS_IO_BASE) < 0) {
                        return -3;
                }

-               
+

                /* load the next byte */
                if(i>3)
                        byte=(data2>>(i%4))&0x0ff;
                else
                        byte=(data1>>(i))&0x0ff;
                outb(byte,SMBUS_IO_BASE + SMBBLKDAT);
                /* load the next byte */
                if(i>3)
                        byte=(data2>>(i%4))&0x0ff;
                else
                        byte=(data1>>(i))&0x0ff;
                outb(byte,SMBUS_IO_BASE + SMBBLKDAT);

-               
+

                /* clear the done bit */
                /* clear the done bit */

-               outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), 
+               outb(inb(SMBUS_IO_BASE + SMBHSTSTAT),

                                SMBUS_IO_BASE + SMBHSTSTAT);
        }
 
                                SMBUS_IO_BASE + SMBHSTSTAT);
        }
 

diff --git a/src/southbridge/intel/i82801ex/i82801ex_ehci.c b/src/southbridge/intel/i82801ex/i82801ex_ehci.c
index 17da5d94c6b6ac1b25e25a2228afd30ed071a107..8ae921d194845f6045452eb9fe797878f140e4e4 100644 (file)
--- a/src/southbridge/intel/i82801ex/i82801ex_ehci.c
+++ b/src/southbridge/intel/i82801ex/i82801ex_ehci.c
@@ -11,7 +11,7 @@ static void ehci_init(struct device *dev)
 
        printk(BIOS_DEBUG, "EHCI: Setting up controller.. ");
        cmd = pci_read_config32(dev, PCI_COMMAND);
 
        printk(BIOS_DEBUG, "EHCI: Setting up controller.. ");
        cmd = pci_read_config32(dev, PCI_COMMAND);

-       pci_write_config32(dev, PCI_COMMAND, 
+       pci_write_config32(dev, PCI_COMMAND,

                cmd | PCI_COMMAND_MASTER);
 
        printk(BIOS_DEBUG, "done.\n");
                cmd | PCI_COMMAND_MASTER);
 
        printk(BIOS_DEBUG, "done.\n");


@@ -24,7 +24,7 @@ static void ehci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
        /* Enable writes to protected registers */
        pci_write_config8(dev, 0x80, access_cntl | 1);
        /* Write the subsystem vendor and device id */
        /* Enable writes to protected registers */
        pci_write_config8(dev, 0x80, access_cntl | 1);
        /* Write the subsystem vendor and device id */

-       pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, 
+       pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,

                ((device & 0xffff) << 16) | (vendor & 0xffff));
        /* Restore protection */
        pci_write_config8(dev, 0x80, access_cntl);
                ((device & 0xffff) << 16) | (vendor & 0xffff));
        /* Restore protection */
        pci_write_config8(dev, 0x80, access_cntl);

diff --git a/src/southbridge/intel/i82801ex/i82801ex_ide.c b/src/southbridge/intel/i82801ex/i82801ex_ide.c
index cd622907abb910999c2e077b2dcfea34ffdcac02..bbab6f1cc0c3c8c612eee45ce3d08c63fce6c1b3 100644 (file)
--- a/src/southbridge/intel/i82801ex/i82801ex_ide.c
+++ b/src/southbridge/intel/i82801ex/i82801ex_ide.c
@@ -19,7 +19,7 @@ static void ide_init(struct device *dev)
 static void i82801ex_ide_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 {
        /* This value is also visible in uchi[0-2] and smbus functions */
 static void i82801ex_ide_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 {
        /* This value is also visible in uchi[0-2] and smbus functions */

-       pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, 
+       pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,

                ((device & 0xffff) << 16) | (vendor & 0xffff));
 }
 
                ((device & 0xffff) << 16) | (vendor & 0xffff));
 }
 

diff --git a/src/southbridge/intel/i82801ex/i82801ex_lpc.c b/src/southbridge/intel/i82801ex/i82801ex_lpc.c
index b97af3860a5e02fa1fd96b338514b1b9407538ee..8753db17e3cd985ebf805f0fa6973f6ed0e5de7f 100644 (file)
--- a/src/southbridge/intel/i82801ex/i82801ex_lpc.c
+++ b/src/southbridge/intel/i82801ex/i82801ex_lpc.c
@@ -89,7 +89,7 @@ static void set_i82801ex_gpio_direction(
                switch(config->gpio[i] & ICH5R_GPIO_SEL_MASK) {
                case ICH5R_GPIO_SEL_OUTPUT: val = 0; break;
                case ICH5R_GPIO_SEL_INPUT:  val = 1; break;
                switch(config->gpio[i] & ICH5R_GPIO_SEL_MASK) {
                case ICH5R_GPIO_SEL_OUTPUT: val = 0; break;
                case ICH5R_GPIO_SEL_INPUT:  val = 1; break;

-               default: 
+               default:

                        continue;
                }
                /* The caller is responsible for not playing with unimplemented bits */
                        continue;
                }
                /* The caller is responsible for not playing with unimplemented bits */


@@ -121,7 +121,7 @@ static void set_i82801ex_gpio_level(
                case ICH5R_GPIO_LVL_LOW:   val = 0; blink = 0; break;
                case ICH5R_GPIO_LVL_HIGH:  val = 1; blink = 0; break;
                case ICH5R_GPIO_LVL_BLINK: val = 1; blink = 1; break;
                case ICH5R_GPIO_LVL_LOW:   val = 0; blink = 0; break;
                case ICH5R_GPIO_LVL_HIGH:  val = 1; blink = 0; break;
                case ICH5R_GPIO_LVL_BLINK: val = 1; blink = 1; break;

-               default: 
+               default:

                        continue;
                }
                /* The caller is responsible for not playing with unimplemented bits */
                        continue;
                }
                /* The caller is responsible for not playing with unimplemented bits */


@@ -152,7 +152,7 @@ static void set_i82801ex_gpio_inv(
                switch(config->gpio[i] & ICH5R_GPIO_INV_MASK) {
                case ICH5R_GPIO_INV_OFF: val = 0; break;
                case ICH5R_GPIO_INV_ON:  val = 1; break;
                switch(config->gpio[i] & ICH5R_GPIO_INV_MASK) {
                case ICH5R_GPIO_INV_OFF: val = 0; break;
                case ICH5R_GPIO_INV_ON:  val = 1; break;

-               default: 
+               default:

                        continue;
                }
                gpio_inv &= ~( 1 << i);
                        continue;
                }
                gpio_inv &= ~( 1 << i);


@@ -195,7 +195,7 @@ static void i82801ex_gpio_init(device_t dev)
        /* Find the GPIO bar */
        res = find_resource(dev, GPIO_BAR);
        if (!res) {
        /* Find the GPIO bar */
        res = find_resource(dev, GPIO_BAR);
        if (!res) {

-               return; 
+               return;

        }
 
        /* Set the use selects */
        }
 
        /* Set the use selects */


@@ -271,7 +271,7 @@ static void lpc_init(struct device *dev)
 
        /* Set up the PIRQ */
        i82801ex_pirq_init(dev);
 
        /* Set up the PIRQ */
        i82801ex_pirq_init(dev);

-       
+

        /* Set the state of the gpio lines */
        i82801ex_gpio_init(dev);
 
        /* Set the state of the gpio lines */
        i82801ex_gpio_init(dev);
 


@@ -283,7 +283,7 @@ static void lpc_init(struct device *dev)
 
        /* Disable IDE (needed when sata is enabled) */
        pci_write_config8(dev, 0xf2, 0x60);
 
        /* Disable IDE (needed when sata is enabled) */
        pci_write_config8(dev, 0xf2, 0x60);

-       
+

        enable_hpet(dev);
 }
 
        enable_hpet(dev);
 }
 


@@ -330,7 +330,7 @@ static void i82801ex_lpc_enable_resources(device_t dev)
        acpi_cntl = pci_read_config8(dev, 0x44);
        acpi_cntl |= (1 << 4);
        pci_write_config8(dev, 0x44, acpi_cntl);
        acpi_cntl = pci_read_config8(dev, 0x44);
        acpi_cntl |= (1 << 4);
        pci_write_config8(dev, 0x44, acpi_cntl);

-       
+

        /* Enable the GPIO bar */
        gpio_cntl = pci_read_config8(dev, 0x5c);
        gpio_cntl |= (1 << 4);
        /* Enable the GPIO bar */
        gpio_cntl = pci_read_config8(dev, 0x5c);
        gpio_cntl |= (1 << 4);

diff --git a/src/southbridge/intel/i82801ex/i82801ex_pci.c b/src/southbridge/intel/i82801ex/i82801ex_pci.c
index 2394844ba4d993405453576cef008032d29dbe1a..80c6e49bc04c50ed8189ec3f56a0cb90aa69ece7 100644 (file)
--- a/src/southbridge/intel/i82801ex/i82801ex_pci.c
+++ b/src/southbridge/intel/i82801ex/i82801ex_pci.c
@@ -21,8 +21,8 @@ static void pci_init(struct device *dev)
        dword |= (1<<8); /* SERR# Enable */
        dword |= (1<<6); /* Parity Error Response */
        pci_write_config32(dev, 0x04, dword);
        dword |= (1<<8); /* SERR# Enable */
        dword |= (1<<6); /* Parity Error Response */
        pci_write_config32(dev, 0x04, dword);

-#endif                         
-       
+#endif
+

        word = pci_read_config16(dev, 0x1e);
        word |= 0xf800; /* Clear possible errors */
        pci_write_config16(dev, 0x1e, word);
        word = pci_read_config16(dev, 0x1e);
        word |= 0xf800; /* Clear possible errors */
        pci_write_config16(dev, 0x1e, word);

diff --git a/src/southbridge/intel/i82801ex/i82801ex_sata.c b/src/southbridge/intel/i82801ex/i82801ex_sata.c
index a490f2a8c3ba2f8287e3e0753208ce4cb8409d7c..9b340e9afd92be13fec8e6690ef5803e71a29856 100644 (file)
--- a/src/southbridge/intel/i82801ex/i82801ex_sata.c
+++ b/src/southbridge/intel/i82801ex/i82801ex_sata.c
@@ -11,7 +11,7 @@ static void sata_init(struct device *dev)
        /* SATA configuration */
        pci_write_config8(dev, 0x04, 0x07);
        pci_write_config8(dev, 0x09, 0x8f);
        /* SATA configuration */
        pci_write_config8(dev, 0x04, 0x07);
        pci_write_config8(dev, 0x09, 0x8f);

-       
+

        /* Set timmings */
        pci_write_config16(dev, 0x40, 0x0a307);
        pci_write_config16(dev, 0x42, 0x0a307);
        /* Set timmings */
        pci_write_config16(dev, 0x40, 0x0a307);
        pci_write_config16(dev, 0x42, 0x0a307);


@@ -25,10 +25,10 @@ static void sata_init(struct device *dev)
 
        /* Combine ide - sata configuration */
        pci_write_config8(dev, 0x90, 0x0);
 
        /* Combine ide - sata configuration */
        pci_write_config8(dev, 0x90, 0x0);

-       
+

        /* port 0 & 1 enable */
        pci_write_config8(dev, 0x92, 0x33);
        /* port 0 & 1 enable */
        pci_write_config8(dev, 0x92, 0x33);

-       
+

        /* initialize SATA  */
        pci_write_config16(dev, 0xa0, 0x0018);
        pci_write_config32(dev, 0xa4, 0x00000264);
        /* initialize SATA  */
        pci_write_config16(dev, 0xa0, 0x0018);
        pci_write_config32(dev, 0xa4, 0x00000264);

diff --git a/src/southbridge/intel/i82801ex/i82801ex_smbus.h b/src/southbridge/intel/i82801ex/i82801ex_smbus.h
index 27acca494fedceef705a322fe2db2d622cc8aa1f..f330c0a5dee11958f4f8c5cb9413399967e6bce2 100644 (file)
--- a/src/southbridge/intel/i82801ex/i82801ex_smbus.h
+++ b/src/southbridge/intel/i82801ex/i82801ex_smbus.h
@@ -10,7 +10,7 @@
 #define SMBTRNSADD 0x9
 #define SMBSLVDATA 0xa
 #define SMLINK_PIN_CTL 0xe
 #define SMBTRNSADD 0x9
 #define SMBSLVDATA 0xa
 #define SMLINK_PIN_CTL 0xe

-#define SMBUS_PIN_CTL  0xf 
+#define SMBUS_PIN_CTL  0xf

 
 #define SMBUS_TIMEOUT (100*1000*10)
 
 
 #define SMBUS_TIMEOUT (100*1000*10)
 

diff --git a/src/southbridge/intel/i82801ex/i82801ex_uhci.c b/src/southbridge/intel/i82801ex/i82801ex_uhci.c
index fe80079d099ffaa365a838277b59ebae499831e4..56536b7273e6d37b2d4dab26df749f961b2656c0 100644 (file)
--- a/src/southbridge/intel/i82801ex/i82801ex_uhci.c
+++ b/src/southbridge/intel/i82801ex/i82801ex_uhci.c
@@ -12,7 +12,7 @@ static void uhci_init(struct device *dev)
 #if 1
        printk(BIOS_DEBUG, "UHCI: Setting up controller.. ");
        cmd = pci_read_config32(dev, PCI_COMMAND);
 #if 1
        printk(BIOS_DEBUG, "UHCI: Setting up controller.. ");
        cmd = pci_read_config32(dev, PCI_COMMAND);

-       pci_write_config32(dev, PCI_COMMAND, 
+       pci_write_config32(dev, PCI_COMMAND,

                cmd | PCI_COMMAND_MASTER);
 
 
                cmd | PCI_COMMAND_MASTER);
 
 

diff --git a/src/southbridge/intel/i82801gx/i82801gx_azalia.c b/src/southbridge/intel/i82801gx/i82801gx_azalia.c
index a4cf14c4f90ed1d3c4d81ae0bea5946d4dcd8251..5899ad6c0e7607db5f32f8fcada5365fad06f0f8 100644 (file)
--- a/src/southbridge/intel/i82801gx/i82801gx_azalia.c
+++ b/src/southbridge/intel/i82801gx/i82801gx_azalia.c
@@ -96,7 +96,7 @@ u32 cim_verb_data_size = 0;
 static u32 find_verb(struct device *dev, u32 viddid, u32 ** verb)
 {
        int idx=0;
 static u32 find_verb(struct device *dev, u32 viddid, u32 ** verb)
 {
        int idx=0;

-       
+

        while (idx < (cim_verb_data_size / sizeof(u32))) {
                u32 verb_size = 4 * cim_verb_data[idx+2]; // in u32
                if (cim_verb_data[idx] != viddid) {
        while (idx < (cim_verb_data_size / sizeof(u32))) {
                u32 verb_size = 4 * cim_verb_data[idx+2]; // in u32
                if (cim_verb_data[idx] != viddid) {

diff --git a/src/southbridge/intel/i82870/p64h2_ioapic.c b/src/southbridge/intel/i82870/p64h2_ioapic.c
index b2523ff436ba595b5c250b049a7d2b295f80d66b..0f998dda9e8ea5c63df7b0e1d2f06b8311d43a6c 100644 (file)
--- a/src/southbridge/intel/i82870/p64h2_ioapic.c
+++ b/src/southbridge/intel/i82870/p64h2_ioapic.c
@@ -39,9 +39,9 @@ static void p64h2_ioapic_init(device_t dev)
     num_p64h2_ioapics++;
 
     // A note on IOAPIC addresses:
     num_p64h2_ioapics++;
 
     // A note on IOAPIC addresses:

-    //  0 and 1 are used for the local APICs of the dual virtual 
+    //  0 and 1 are used for the local APICs of the dual virtual

        //      (hyper-threaded) CPUs of physical CPU 0 (mainboard/Config.lb).
        //      (hyper-threaded) CPUs of physical CPU 0 (mainboard/Config.lb).

-    //  6 and 7 are used for the local APICs of the dual virtual 
+    //  6 and 7 are used for the local APICs of the dual virtual

        //      (hyper-threaded) CPUs of physical CPU 1 (mainboard/Config.lb).
     //  2 is used for the IOAPIC in the 82801 Southbridge (hard-coded in i82801xx_lpc.c)
 
        //      (hyper-threaded) CPUs of physical CPU 1 (mainboard/Config.lb).
     //  2 is used for the IOAPIC in the 82801 Southbridge (hard-coded in i82801xx_lpc.c)
 


@@ -63,7 +63,7 @@ static void p64h2_ioapic_init(device_t dev)
     pWindowRegister = (volatile uint32_t*)(memoryBase + 0x10);
 
     printk(BIOS_DEBUG, "IOAPIC %d at %02x:%02x.%01x  MBAR = %p DataAddr = %p\n",
     pWindowRegister = (volatile uint32_t*)(memoryBase + 0x10);
 
     printk(BIOS_DEBUG, "IOAPIC %d at %02x:%02x.%01x  MBAR = %p DataAddr = %p\n",

-                 apic_id, dev->bus->secondary, PCI_SLOT(dev->path.pci.devfn), 
+                 apic_id, dev->bus->secondary, PCI_SLOT(dev->path.pci.devfn),

                  PCI_FUNC(dev->path.pci.devfn), pIndexRegister, pWindowRegister);
 
     apic_id <<= 24;             // Convert ID to bitmask
                  PCI_FUNC(dev->path.pci.devfn), pIndexRegister, pWindowRegister);
 
     apic_id <<= 24;             // Convert ID to bitmask


@@ -72,13 +72,13 @@ static void p64h2_ioapic_init(device_t dev)
     *pWindowRegister = (*pWindowRegister & ~(0xF<<24)) | apic_id;   // Set the ID
 
     if ((*pWindowRegister & (0xF<<24)) != apic_id)
     *pWindowRegister = (*pWindowRegister & ~(0xF<<24)) | apic_id;   // Set the ID
 
     if ((*pWindowRegister & (0xF<<24)) != apic_id)

-        die("p64h2_ioapic_init failed"); 
+        die("p64h2_ioapic_init failed");

 
     *pIndexRegister  = 3;   // Select Boot Configuration register
     *pWindowRegister |= 1;  // Use Processor System Bus to deliver interrupts
 
     if (!(*pWindowRegister & 1))
 
     *pIndexRegister  = 3;   // Select Boot Configuration register
     *pWindowRegister |= 1;  // Use Processor System Bus to deliver interrupts
 
     if (!(*pWindowRegister & 1))

-        die("p64h2_ioapic_init failed"); 
+        die("p64h2_ioapic_init failed");

 }
 
 static struct device_operations ioapic_ops = {
 }
 
 static struct device_operations ioapic_ops = {

diff --git a/src/southbridge/intel/i82870/p64h2_pcibridge.c b/src/southbridge/intel/i82870/p64h2_pcibridge.c
index a489fe53f99cb760126b27187637378715199972..89b86f596680fdfeb298126b52a343397af1d2a9 100644 (file)
--- a/src/southbridge/intel/i82870/p64h2_pcibridge.c
+++ b/src/southbridge/intel/i82870/p64h2_pcibridge.c
@@ -35,5 +35,5 @@ static const struct pci_driver pcix_driver __pci_driver = {
         .ops    = &pcix_ops,
         .vendor = PCI_VENDOR_ID_INTEL,
         .device = PCI_DEVICE_ID_INTEL_82870_1F0,
         .ops    = &pcix_ops,
         .vendor = PCI_VENDOR_ID_INTEL,
         .device = PCI_DEVICE_ID_INTEL_82870_1F0,

-};      
- 
+};
+

diff --git a/src/southbridge/intel/pxhd/pxhd_bridge.c b/src/southbridge/intel/pxhd/pxhd_bridge.c
index 0a50e5a9944d9ef187029bb314d3ec7b1c3a2e64..683ff20013b8148dce27033ad86fdae526b0d71f 100644 (file)
--- a/src/southbridge/intel/pxhd/pxhd_bridge.c
+++ b/src/southbridge/intel/pxhd/pxhd_bridge.c
@@ -56,10 +56,10 @@ static unsigned int pxhd_scan_bridge(device_t dev, unsigned int max)
                word &= ~(3 << 9);
                word |= (2 << 9);
                pci_write_config16(dev, 0x40, word);
                word &= ~(3 << 9);
                word |= (2 << 9);
                pci_write_config16(dev, 0x40, word);

-               
+

                /* reset the bus to make the new frequencies effective */
                pci_bus_reset(&dev->link[0]);
                /* reset the bus to make the new frequencies effective */
                pci_bus_reset(&dev->link[0]);

-       }       
+       }

        return pcix_scan_bridge(dev, max);
 }
 static void pcix_init(device_t dev)
        return pcix_scan_bridge(dev, max);
 }
 static void pcix_init(device_t dev)


@@ -78,7 +78,7 @@ static void pcix_init(device_t dev)
        byte = pci_read_config8(dev, 0x04);
         byte |= 0x10;
         pci_write_config8(dev, 0x04, byte);
        byte = pci_read_config8(dev, 0x04);
         byte |= 0x10;
         pci_write_config8(dev, 0x04, byte);

-       
+

        /* Set drive strength */
        word = pci_read_config16(dev, 0xe0);
         word = 0x0404;
        /* Set drive strength */
        word = pci_read_config16(dev, 0xe0);
         word = 0x0404;


@@ -86,7 +86,7 @@ static void pcix_init(device_t dev)
        word = pci_read_config16(dev, 0xe4);
         word = 0x0404;
         pci_write_config16(dev, 0xe4, word);
        word = pci_read_config16(dev, 0xe4);
         word = 0x0404;
         pci_write_config16(dev, 0xe4, word);

-       
+

        /* Set impedance */
        word = pci_read_config16(dev, 0xe8);
         word = 0x0404;
        /* Set impedance */
        word = pci_read_config16(dev, 0xe8);
         word = 0x0404;


@@ -96,7 +96,7 @@ static void pcix_init(device_t dev)
        word = pci_read_config16(dev, 0x4c);
         word |= 1;
         pci_write_config16(dev, 0x4c, word);
        word = pci_read_config16(dev, 0x4c);
         word |= 1;
         pci_write_config16(dev, 0x4c, word);

-       
+

        /* Set split transaction limits */
        word = pci_read_config16(dev, 0xa8);
         pci_write_config16(dev, 0xaa, word);
        /* Set split transaction limits */
        word = pci_read_config16(dev, 0xa8);
         pci_write_config16(dev, 0xaa, word);


@@ -108,12 +108,12 @@ static void pcix_init(device_t dev)
        dword = pci_read_config32(dev, 0x04);
         dword |= (1<<8);
         pci_write_config32(dev, 0x04, dword);
        dword = pci_read_config32(dev, 0x04);
         dword |= (1<<8);
         pci_write_config32(dev, 0x04, dword);

-       
+

        /* system and error parity enable */
        dword = pci_read_config32(dev, 0x3c);
         dword |= (3<<16);
         pci_write_config32(dev, 0x3c, dword);
        /* system and error parity enable */
        dword = pci_read_config32(dev, 0x3c);
         dword |= (3<<16);
         pci_write_config32(dev, 0x3c, dword);

-       
+

        /* NMI enable */
        nmi_option = NMI_OFF;
        get_option(&nmi_option, "nmi");
        /* NMI enable */
        nmi_option = NMI_OFF;
        get_option(&nmi_option, "nmi");


@@ -122,7 +122,7 @@ static void pcix_init(device_t dev)
                dword |= (1<<0);
                pci_write_config32(dev, 0x44, dword);
        }
                dword |= (1<<0);
                pci_write_config32(dev, 0x44, dword);
        }

-       
+

        /* Set up CRC flood enable */
        dword = pci_read_config32(dev, 0xc0);
        if(dword) {  /* do device A only */
        /* Set up CRC flood enable */
        dword = pci_read_config32(dev, 0xc0);
        if(dword) {  /* do device A only */


@@ -133,7 +133,7 @@ static void pcix_init(device_t dev)
                dword |= (1<<1);
                pci_write_config32(dev, 0xc8, dword);
        }
                dword |= (1<<1);
                pci_write_config32(dev, 0xc8, dword);
        }

-       
+

        return;
 #endif
 }
        return;
 #endif
 }


@@ -175,7 +175,7 @@ static void ioapic_init(device_t dev)
 
 static void intel_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 {
 
 static void intel_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 {

-       pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, 
+       pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,

                ((device & 0xffff) << 16) | (vendor & 0xffff));
 }
 
                ((device & 0xffff) << 16) | (vendor & 0xffff));
 }
 


@@ -197,14 +197,14 @@ static const struct pci_driver ioapic_driver __pci_driver = {
        .ops    = &ioapic_ops,
        .vendor = PCI_VENDOR_ID_INTEL,
        .device = 0x0326,
        .ops    = &ioapic_ops,
        .vendor = PCI_VENDOR_ID_INTEL,
        .device = 0x0326,

-       
+

 };
 
 static const struct pci_driver ioapic2_driver __pci_driver = {
        .ops    = &ioapic_ops,
        .vendor = PCI_VENDOR_ID_INTEL,
        .device = 0x0327,
 };
 
 static const struct pci_driver ioapic2_driver __pci_driver = {
        .ops    = &ioapic_ops,
        .vendor = PCI_VENDOR_ID_INTEL,
        .device = 0x0327,

-       
+

 };
 
 struct chip_operations southbridge_intel_pxhd_ops = {
 };
 
 struct chip_operations southbridge_intel_pxhd_ops = {

diff --git a/src/southbridge/nvidia/mcp55/mcp55_fadt.c b/src/southbridge/nvidia/mcp55/mcp55_fadt.c
index 8d8040971969d5d2a4f114788b3df37e061631c2..753a6632392e9d1aef41e6306c108d08fb9f9687 100644 (file)
--- a/src/southbridge/nvidia/mcp55/mcp55_fadt.c
+++ b/src/southbridge/nvidia/mcp55/mcp55_fadt.c
@@ -34,7 +34,7 @@ void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)
 {
        acpi_header_t *header = &(fadt->header);
        device_t dev;
 {
        acpi_header_t *header = &(fadt->header);
        device_t dev;

-       int is_mcp55 = 0;       
+       int is_mcp55 = 0;

        dev = dev_find_device(PCI_VENDOR_ID_NVIDIA,
                PCI_DEVICE_ID_NVIDIA_MCP55_LPC, 0);
        if (dev)
        dev = dev_find_device(PCI_VENDOR_ID_NVIDIA,
                PCI_DEVICE_ID_NVIDIA_MCP55_LPC, 0);
        if (dev)


@@ -56,7 +56,7 @@ void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)
        fadt->preferred_pm_profile = 1; //check
        fadt->sci_int = 9;
        /* disable system management mode by setting to 0 */
        fadt->preferred_pm_profile = 1; //check
        fadt->sci_int = 9;
        /* disable system management mode by setting to 0 */

-       fadt->smi_cmd = 0x0; //pm_base+0x42e; (value from proprietary acpi fadt) 
+       fadt->smi_cmd = 0x0; //pm_base+0x42e; (value from proprietary acpi fadt)

        fadt->acpi_enable = 0xa1;
        fadt->acpi_disable = 0xa0;
        fadt->s4bios_req = 0x0;
        fadt->acpi_enable = 0xa1;
        fadt->acpi_disable = 0xa0;
        fadt->s4bios_req = 0x0;


@@ -92,7 +92,7 @@ void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)
        fadt->flush_size = 0;
        fadt->flush_stride = 0;
        fadt->duty_offset = 1;
        fadt->flush_size = 0;
        fadt->flush_stride = 0;
        fadt->duty_offset = 1;

-       fadt->duty_width = 3;   
+       fadt->duty_width = 3;

        fadt->day_alrm = 0x7d;
        fadt->mon_alrm = 0x7e;
        fadt->century = 0x32;
        fadt->day_alrm = 0x7d;
        fadt->mon_alrm = 0x7e;
        fadt->century = 0x32;

diff --git a/src/southbridge/nvidia/mcp55/mcp55_lpc.c b/src/southbridge/nvidia/mcp55/mcp55_lpc.c
index 84612890e912dba9d13a76602495d84f4cfc9356..1d2a066b1b74f02dca8e06be9e69f3c098ecaa2c 100644 (file)
--- a/src/southbridge/nvidia/mcp55/mcp55_lpc.c
+++ b/src/southbridge/nvidia/mcp55/mcp55_lpc.c
@@ -65,7 +65,7 @@ static void lpc_common_init(device_t dev, int master)
 
        if (master)
                setup_ioapic(ioapic_base, 0);
 
        if (master)
                setup_ioapic(ioapic_base, 0);

-       else 
+       else

                clear_ioapic(ioapic_base);
 }
 
                clear_ioapic(ioapic_base);
 }
 

diff --git a/src/southbridge/ricoh/rl5c476/rl5c476.c b/src/southbridge/ricoh/rl5c476/rl5c476.c
index c276389bf75b27adce41645e7eaec69fb7b4fa01..70d74f5fabb8d77f445cf8630d21f19d54c8f3ec 100644 (file)
--- a/src/southbridge/ricoh/rl5c476/rl5c476.c
+++ b/src/southbridge/ricoh/rl5c476/rl5c476.c
@@ -51,7 +51,7 @@ static void rl5c476_init(device_t dev)
                printk(BIOS_DEBUG, "CF boot not enabled.\n");
                return;
        }
                printk(BIOS_DEBUG, "CF boot not enabled.\n");
                return;
        }

-       
+

        if (PCI_FUNC(dev->path.pci.devfn) != 1) {
                // Only configure if second CF slot.
                return;
        if (PCI_FUNC(dev->path.pci.devfn) != 1) {
                // Only configure if second CF slot.
                return;


@@ -154,8 +154,8 @@ static void rl5c476_init(device_t dev)
        cptr = (unsigned char *)(cf_base + 0x200);
        printk(BIOS_DEBUG, "CF Config = %x\n",*cptr);
 
        cptr = (unsigned char *)(cf_base + 0x200);
        printk(BIOS_DEBUG, "CF Config = %x\n",*cptr);
 

-       /* Set CF to decode 16 IO bytes on any 16 byte boundary - 
-        * rely on the io windows of the bridge set up above to 
+       /* Set CF to decode 16 IO bytes on any 16 byte boundary -
+        * rely on the io windows of the bridge set up above to

         * map those bytes into the addresses for IDE controller 3
         * (0x1e8 - 0x1ef and 0x3ed - 0x3ee)
         */
         * map those bytes into the addresses for IDE controller 3
         * (0x1e8 - 0x1ef and 0x3ed - 0x3ee)
         */


@@ -167,10 +167,10 @@ static void rl5c476_read_resources(device_t dev)
 
        struct resource *resource;
 
 
        struct resource *resource;
 

-        /* For CF socket we need an extra memory window for 
+        /* For CF socket we need an extra memory window for

          * the control structure of the CF itself
          */
          * the control structure of the CF itself
          */

-       if( enable_cf_boot && (PCI_FUNC(dev->path.pci.devfn) == 1)){ 
+       if( enable_cf_boot && (PCI_FUNC(dev->path.pci.devfn) == 1)){

                /* fake index as it isn't in PCI config space */
                resource = new_resource(dev, 1);
                resource->flags |= IORESOURCE_MEM;
                /* fake index as it isn't in PCI config space */
                resource = new_resource(dev, 1);
                resource->flags |= IORESOURCE_MEM;

diff --git a/src/southbridge/ricoh/rl5c476/rl5c476.h b/src/southbridge/ricoh/rl5c476/rl5c476.h
index 2ade87214c9fb9f0947bd85a115da1d90d9f38da..576578bb65ecdd62b30293432cc205dab096c396 100644 (file)
--- a/src/southbridge/ricoh/rl5c476/rl5c476.h
+++ b/src/southbridge/ricoh/rl5c476/rl5c476.h
@@ -93,5 +93,5 @@ typedef struct pc16reg  {
        u8 smpga0;
 } __attribute__ ((packed)) pc16reg_t;
 
        u8 smpga0;
 } __attribute__ ((packed)) pc16reg_t;
 

-       
+

 
 

diff --git a/src/southbridge/sis/sis966/sis966_lpc.c b/src/southbridge/sis/sis966/sis966_lpc.c
index fc73e39431e87909ffb6572f9a31b57e4d4b080e..2efc3802b2998a1405047d6657943f7f0ee013de 100644 (file)
--- a/src/southbridge/sis/sis966/sis966_lpc.c
+++ b/src/southbridge/sis/sis966/sis966_lpc.c
@@ -281,7 +281,7 @@ static const struct pci_driver lpc_driver __pci_driver = {
        .device = PCI_DEVICE_ID_SIS_SIS966_LPC,
 };
 
        .device = PCI_DEVICE_ID_SIS_SIS966_LPC,
 };
 

-#ifdef SLAVE_INIT // No device? 
+#ifdef SLAVE_INIT // No device?

 static struct device_operations lpc_slave_ops  = {
        .read_resources = sis966_lpc_read_resources,
        .set_resources  = pci_dev_set_resources,
 static struct device_operations lpc_slave_ops  = {
        .read_resources = sis966_lpc_read_resources,
        .set_resources  = pci_dev_set_resources,

diff --git a/src/southbridge/via/k8t890/k8t890_bridge.c b/src/southbridge/via/k8t890/k8t890_bridge.c
index e30cf60b4dc731cd3d4493643fc3df9d0dd28a23..3e1e81730d31af19519bbbd44793adba20278a98 100644 (file)
--- a/src/southbridge/via/k8t890/k8t890_bridge.c
+++ b/src/southbridge/via/k8t890/k8t890_bridge.c
@@ -32,14 +32,14 @@ static void bridge_enable(struct device *dev)
        writeback(dev, 0x40, 0x91);
        writeback(dev, 0x41, 0x40);
        writeback(dev, 0x43, 0x44);
        writeback(dev, 0x40, 0x91);
        writeback(dev, 0x41, 0x40);
        writeback(dev, 0x43, 0x44);

-       writeback(dev, 0x44, 0x31);     /* K8M890 should have 0x35 datasheet 
-                                        * says it is reserved 
+       writeback(dev, 0x44, 0x31);     /* K8M890 should have 0x35 datasheet
+                                        * says it is reserved

                                         */
        writeback(dev, 0x45, 0x3a);
        writeback(dev, 0x46, 0x88);     /* PCI ID lo */
        writeback(dev, 0x47, 0xb1);     /* PCI ID hi */
 
                                         */
        writeback(dev, 0x45, 0x3a);
        writeback(dev, 0x46, 0x88);     /* PCI ID lo */
        writeback(dev, 0x47, 0xb1);     /* PCI ID hi */
 

-       /* Bridge control, K8M890 bit 3 should be set to enable VGA on AGP 
+       /* Bridge control, K8M890 bit 3 should be set to enable VGA on AGP

         * (Forward VGA compatible memory and I/O cycles )
         */
 
         * (Forward VGA compatible memory and I/O cycles )
         */
 

diff --git a/src/southbridge/via/k8t890/k8t890_ctrl.c b/src/southbridge/via/k8t890/k8t890_ctrl.c
index ad17fe624dcae728572cdd571f2deceee241f172..48aa73925708c6231b8aefd29e6cef8bbfc02863 100644 (file)
--- a/src/southbridge/via/k8t890/k8t890_ctrl.c
+++ b/src/southbridge/via/k8t890/k8t890_ctrl.c
@@ -23,7 +23,7 @@
 #include <device/pci_ids.h>
 #include <console/console.h>
 
 #include <device/pci_ids.h>
 #include <console/console.h>
 

-/* We support here K8M890/K8T890 and VT8237R PCI1/Vlink which setup is not in separate 
+/* We support here K8M890/K8T890 and VT8237R PCI1/Vlink which setup is not in separate

  * PCI device 0:11.7, but it is mapped to PCI 0:0.7 (0x70-0x7c for PCI1)
  */
 
  * PCI device 0:11.7, but it is mapped to PCI 0:0.7 (0x70-0x7c for PCI1)
  */
 

diff --git a/src/southbridge/via/k8t890/k8t890_early_car.c b/src/southbridge/via/k8t890/k8t890_early_car.c
index 0505a6ff5ac6ae11d27f38704af6b27296aee8c2..037f5a75eb6eae07cfd78571a0798e3c4fbbdb16 100644 (file)
--- a/src/southbridge/via/k8t890/k8t890_early_car.c
+++ b/src/southbridge/via/k8t890/k8t890_early_car.c
@@ -38,7 +38,7 @@ static u8 ldtreg[3] = {0x86, 0xa6, 0xc6};
 
 /* This functions sets KT890 link frequency and width to same values as
  * it has been setup on K8 side, by AMD NB init.
 
 /* This functions sets KT890 link frequency and width to same values as
  * it has been setup on K8 side, by AMD NB init.

- */ 
+ */

 
 u8 k8t890_early_setup_ht(void)
 {
 
 u8 k8t890_early_setup_ht(void)
 {


@@ -115,7 +115,7 @@ u8 k8t890_early_setup_ht(void)
 
 static int s3_save_nvram_early(u32 dword, int size, int  nvram_pos)
 {
 
 static int s3_save_nvram_early(u32 dword, int size, int  nvram_pos)
 {

-       
+

        printk(BIOS_DEBUG, "Writing %x of size %d to nvram pos: %d\n", dword, size, nvram_pos);
        switch (size) {
        case 1:
        printk(BIOS_DEBUG, "Writing %x of size %d to nvram pos: %d\n", dword, size, nvram_pos);
        switch (size) {
        case 1:

diff --git a/src/southbridge/via/k8t890/k8t890_host_ctrl.c b/src/southbridge/via/k8t890/k8t890_host_ctrl.c
index 38f69680fe23775c0ae39db618fc597d5a1addd6..a1c42b7d59a4a54b911a349702166ef2d07c874f 100644 (file)
--- a/src/southbridge/via/k8t890/k8t890_host_ctrl.c
+++ b/src/southbridge/via/k8t890/k8t890_host_ctrl.c
@@ -52,7 +52,7 @@ static void host_ctrl_enable_k8t890(struct device *dev)
        pci_write_config8(dev, 0xa6, 0x80);
 
        /* this will be possibly removed, when I figure out
        pci_write_config8(dev, 0xa6, 0x80);
 
        /* this will be possibly removed, when I figure out

-        * if the ROM SIP is good, second reason is that the 
+        * if the ROM SIP is good, second reason is that the

         * unknown bits are AGP related, which are dummy on K8T890
         */
 
         * unknown bits are AGP related, which are dummy on K8T890
         */
 

diff --git a/src/southbridge/via/k8t890/romstrap.inc b/src/southbridge/via/k8t890/romstrap.inc
index 9642aa4d5c1244f2fb12806125c46823e6b33888..aaaa76694d2a61c550035fbba05f2ac32279ee01 100644 (file)
--- a/src/southbridge/via/k8t890/romstrap.inc
+++ b/src/southbridge/via/k8t890/romstrap.inc
@@ -48,7 +48,7 @@ tblpointer:
 .long 0x0
 .long 0x0
 .long 0x0
 .long 0x0
 .long 0x0
 .long 0x0

-.long 0x0 
+.long 0x0

 
 /*
  * The pointer to above table should be at 0xffffd,
 
 /*
  * The pointer to above table should be at 0xffffd,

diff --git a/src/southbridge/via/vt8231/vt8231.c b/src/southbridge/via/vt8231/vt8231.c
index 43238ec0501376aa09701cd9e6c947b896714dee..85f007a09768dd2a5b43da98c52ec86a7349d0a7 100644 (file)
--- a/src/southbridge/via/vt8231/vt8231.c
+++ b/src/southbridge/via/vt8231/vt8231.c
@@ -18,7 +18,7 @@ static void keyboard_on(void)
 
        if (lpc_dev) {
                regval = pci_read_config8(lpc_dev, 0x51);
 
        if (lpc_dev) {
                regval = pci_read_config8(lpc_dev, 0x51);

-               regval |= 0x0f; 
+               regval |= 0x0f;

                pci_write_config8(lpc_dev, 0x51, regval);
        }
        pc_keyboard_init(0);
                pci_write_config8(lpc_dev, 0x51, regval);
        }
        pc_keyboard_init(0);


@@ -27,9 +27,9 @@ static void keyboard_on(void)
 static void com_port_on(void)
 {
 #if 0
 static void com_port_on(void)
 {
 #if 0

-       // enable com1 and com2. 
+       // enable com1 and com2.

        enables = pci_read_config8(dev, 0x6e);
        enables = pci_read_config8(dev, 0x6e);

-       
+

        /* 0x80 is enable com port b, 0x10 is to make it com2, 0x8
         * is enable com port a as com1 kevinh/Ispiri - Old code
         * thought 0x01 would make it com1, that was wrong enables =
        /* 0x80 is enable com port b, 0x10 is to make it com2, 0x8
         * is enable com port a as com1 kevinh/Ispiri - Old code
         * thought 0x01 would make it com1, that was wrong enables =

diff --git a/src/southbridge/via/vt8231/vt8231_acpi.c b/src/southbridge/via/vt8231/vt8231_acpi.c
index 6cbf4c591f19b7da19165f93bf5ae294ade03542..647910aef69a5f0afefcfd76cc9a5a45d67a1b7c 100644 (file)
--- a/src/southbridge/via/vt8231/vt8231_acpi.c
+++ b/src/southbridge/via/vt8231/vt8231_acpi.c
@@ -10,20 +10,20 @@ static void acpi_init(struct device *dev)
 
        // Set ACPI base address to IO 0x4000
        pci_write_config32(dev, 0x48, 0x4001);
 
        // Set ACPI base address to IO 0x4000
        pci_write_config32(dev, 0x48, 0x4001);

-       
+

        // Enable ACPI access (and setup like award)
        pci_write_config8(dev, 0x41, 0x84);
        // Enable ACPI access (and setup like award)
        pci_write_config8(dev, 0x41, 0x84);

-       
+

        // Set hardware monitor base address to IO 0x6000
        pci_write_config32(dev, 0x70, 0x6001);
        // Set hardware monitor base address to IO 0x6000
        pci_write_config32(dev, 0x70, 0x6001);

-       
+

        // Enable hardware monitor (and setup like award)
        pci_write_config8(dev, 0x74, 0x01);
        // Enable hardware monitor (and setup like award)
        pci_write_config8(dev, 0x74, 0x01);

-       
+

        // set IO base address to 0x5000
        pci_write_config32(dev, 0x90, 0x5001);
        // set IO base address to 0x5000
        pci_write_config32(dev, 0x90, 0x5001);

-       
-       // Enable SMBus 
+
+       // Enable SMBus

        pci_write_config8(dev, 0xd2, 0x01);
 }
 
        pci_write_config8(dev, 0xd2, 0x01);
 }
 

diff --git a/src/southbridge/via/vt8231/vt8231_early_serial.c b/src/southbridge/via/vt8231/vt8231_early_serial.c
index 5b38b8e521a2a49d07ec4972cdc3321b83d9b1a2..af5a7729eef2878aaaf8b2f6ddb448174a766760 100644 (file)
--- a/src/southbridge/via/vt8231/vt8231_early_serial.c
+++ b/src/southbridge/via/vt8231/vt8231_early_serial.c
@@ -8,18 +8,18 @@
 #define SIO_BASE 0x3f0
 #define SIO_DATA  SIO_BASE+1
 
 #define SIO_BASE 0x3f0
 #define SIO_DATA  SIO_BASE+1
 

-static void vt8231_writesuper(uint8_t reg, uint8_t val) 
+static void vt8231_writesuper(uint8_t reg, uint8_t val)

 {
        outb(reg, SIO_BASE);
        outb(val, SIO_DATA);
 }
 
 {
        outb(reg, SIO_BASE);
        outb(val, SIO_DATA);
 }
 

-static void vt8231_writesiobyte(uint16_t reg, uint8_t val) 
+static void vt8231_writesiobyte(uint16_t reg, uint8_t val)

 {
        outb(val, reg);
 }
 
 {
        outb(val, reg);
 }
 

-static void vt8231_writesioword(uint16_t reg, uint16_t val) 
+static void vt8231_writesioword(uint16_t reg, uint16_t val)

 {
        outw(val, reg);
 }
 {
        outw(val, reg);
 }


@@ -29,26 +29,26 @@ static void vt8231_writesioword(uint16_t reg, uint16_t val)
    mainboard
  */
 
    mainboard
  */
 

-static void enable_vt8231_serial(void) 
+static void enable_vt8231_serial(void)

 {
        uint8_t c;
        device_t dev;
        outb(6, 0x80);
        dev = pci_locate_device(PCI_ID(0x1106,0x8231), 0);
 {
        uint8_t c;
        device_t dev;
        outb(6, 0x80);
        dev = pci_locate_device(PCI_ID(0x1106,0x8231), 0);

-       
+

        if (dev == PCI_DEV_INVALID) {
                outb(7, 0x80);
                die("Serial controller not found\n");
        }
        if (dev == PCI_DEV_INVALID) {
                outb(7, 0x80);
                die("Serial controller not found\n");
        }

-       
-       /* first, you have to enable the superio and superio config. 
+
+       /* first, you have to enable the superio and superio config.

           put a 6 reg 80
        */
        c = pci_read_config8(dev, 0x50);
        c |= 6;
        pci_write_config8(dev, 0x50, c);
        outb(2, 0x80);
           put a 6 reg 80
        */
        c = pci_read_config8(dev, 0x50);
        c |= 6;
        pci_write_config8(dev, 0x50, c);
        outb(2, 0x80);

-       // now go ahead and set up com1. 
+       // now go ahead and set up com1.

        // set address
        vt8231_writesuper(0xf4, 0xfe);
        // enable serial out
        // set address
        vt8231_writesuper(0xf4, 0xfe);
        // enable serial out

diff --git a/src/southbridge/via/vt8231/vt8231_early_smbus.c b/src/southbridge/via/vt8231/vt8231_early_smbus.c
index 40ef656c0091c5342f751f6853686d7957e88974..8ba72a387b1146610425a82364d7a862c3589222 100644 (file)
--- a/src/southbridge/via/vt8231/vt8231_early_smbus.c
+++ b/src/southbridge/via/vt8231/vt8231_early_smbus.c
@@ -35,7 +35,7 @@ static void enable_smbus(void)
        // set IO base address to SMBUS_IO_BASE
        pci_write_config32(dev, 0x90, SMBUS_IO_BASE | 1);
 
        // set IO base address to SMBUS_IO_BASE
        pci_write_config32(dev, 0x90, SMBUS_IO_BASE | 1);
 

-       // Enable SMBus 
+       // Enable SMBus

        c = pci_read_config8(dev, 0xd2);
        c |= 5;
        pci_write_config8(dev, 0xd2, c);
        c = pci_read_config8(dev, 0xd2);
        c |= 5;
        pci_write_config8(dev, 0xd2, c);


@@ -244,7 +244,7 @@ static unsigned char smbus_read_byte(unsigned char devAdr, unsigned char bIndex)
 
 }
 #endif
 
 }
 #endif

-/* for reference, here is the fancier version which we will use at some 
+/* for reference, here is the fancier version which we will use at some

  * point
  */
 # if 0
  * point
  */
 # if 0

diff --git a/src/southbridge/via/vt8231/vt8231_ide.c b/src/southbridge/via/vt8231/vt8231_ide.c
index c1df5ef5cd100b6bcbc36503b71d1329ee009a8e..46479c4af38ee742c6d2a97f3cfaa1fea24ae7af 100644 (file)
--- a/src/southbridge/via/vt8231/vt8231_ide.c
+++ b/src/southbridge/via/vt8231/vt8231_ide.c
@@ -18,7 +18,7 @@ static void ide_init(struct device *dev)
                * or it is possibly a timing issue. Ben Hewson 29 Apr 2007.
                */
 
                * or it is possibly a timing issue. Ben Hewson 29 Apr 2007.
                */
 

-               /*              
+               /*

                printk(BIOS_INFO, "%s: enabling compatibility IDE addresses\n", __func__);
                enables = pci_read_config8(dev, 0x42);
                printk(BIOS_DEBUG, "enables in reg 0x42 0x%x\n", enables);
                printk(BIOS_INFO, "%s: enabling compatibility IDE addresses\n", __func__);
                enables = pci_read_config8(dev, 0x42);
                printk(BIOS_DEBUG, "enables in reg 0x42 0x%x\n", enables);


@@ -28,73 +28,73 @@ static void ide_init(struct device *dev)
                printk(BIOS_DEBUG, "enables in reg 0x42 read back as 0x%x\n", enables);
                */
        }
                printk(BIOS_DEBUG, "enables in reg 0x42 read back as 0x%x\n", enables);
                */
        }

-       
+

        enables = pci_read_config8(dev, 0x40);
        printk(BIOS_DEBUG, "enables in reg 0x40 0x%x\n", enables);
        enables |= 3;
        pci_write_config8(dev, 0x40, enables);
        enables = pci_read_config8(dev, 0x40);
        printk(BIOS_DEBUG, "enables in reg 0x40 read back as 0x%x\n", enables);
        enables = pci_read_config8(dev, 0x40);
        printk(BIOS_DEBUG, "enables in reg 0x40 0x%x\n", enables);
        enables |= 3;
        pci_write_config8(dev, 0x40, enables);
        enables = pci_read_config8(dev, 0x40);
        printk(BIOS_DEBUG, "enables in reg 0x40 read back as 0x%x\n", enables);

-       
+

        // Enable prefetch buffers
        enables = pci_read_config8(dev, 0x41);
        enables |= 0xf0;
        pci_write_config8(dev, 0x41, enables);
        // Enable prefetch buffers
        enables = pci_read_config8(dev, 0x41);
        enables |= 0xf0;
        pci_write_config8(dev, 0x41, enables);

-       
+

        // Lower thresholds (cause award does it)
        enables = pci_read_config8(dev, 0x43);
        enables &= ~0x0f;
        enables |=  0x05;
        pci_write_config8(dev, 0x43, enables);
        // Lower thresholds (cause award does it)
        enables = pci_read_config8(dev, 0x43);
        enables &= ~0x0f;
        enables |=  0x05;
        pci_write_config8(dev, 0x43, enables);

-       
+

        // PIO read prefetch counter (cause award does it)
        pci_write_config8(dev, 0x44, 0x18);
        // PIO read prefetch counter (cause award does it)
        pci_write_config8(dev, 0x44, 0x18);

-       
+

        // Use memory read multiple
        pci_write_config8(dev, 0x45, 0x1c);
        // Use memory read multiple
        pci_write_config8(dev, 0x45, 0x1c);

-       
-       // address decoding. 
+
+       // address decoding.

        // we want "flexible", i.e. 1f0-1f7 etc. or native PCI
        // we want "flexible", i.e. 1f0-1f7 etc. or native PCI

-       // kevinh@ispiri.com - the standard linux drivers seem ass slow when 
+       // kevinh@ispiri.com - the standard linux drivers seem ass slow when

        // used in native mode - I've changed back to classic
        enables = pci_read_config8(dev, 0x9);
        printk(BIOS_DEBUG, "enables in reg 0x9 0x%x\n", enables);
        // used in native mode - I've changed back to classic
        enables = pci_read_config8(dev, 0x9);
        printk(BIOS_DEBUG, "enables in reg 0x9 0x%x\n", enables);

-       // by the book, set the low-order nibble to 0xa. 
+       // by the book, set the low-order nibble to 0xa.

        if (conf->enable_native_ide) {
                enables &= ~0xf;
        if (conf->enable_native_ide) {
                enables &= ~0xf;

-               // cf/cg silicon needs an 'f' here. 
+               // cf/cg silicon needs an 'f' here.

                enables |= 0xf;
        } else {
                enables &= ~0x5;
        }
                enables |= 0xf;
        } else {
                enables &= ~0x5;
        }

-       
+

        pci_write_config8(dev, 0x9, enables);
        enables = pci_read_config8(dev, 0x9);
        printk(BIOS_DEBUG, "enables in reg 0x9 read back as 0x%x\n", enables);
        pci_write_config8(dev, 0x9, enables);
        enables = pci_read_config8(dev, 0x9);
        printk(BIOS_DEBUG, "enables in reg 0x9 read back as 0x%x\n", enables);

-       
-       // standard bios sets master bit. 
+
+       // standard bios sets master bit.

        enables = pci_read_config8(dev, 0x4);
        printk(BIOS_DEBUG, "command in reg 0x4 0x%x\n", enables);
        enables |= 7;
        enables = pci_read_config8(dev, 0x4);
        printk(BIOS_DEBUG, "command in reg 0x4 0x%x\n", enables);
        enables |= 7;

-       
+

        // No need for stepping - kevinh@ispiri.com
        enables &= ~0x80;
        // No need for stepping - kevinh@ispiri.com
        enables &= ~0x80;

-       
+

        pci_write_config8(dev, 0x4, enables);
        enables = pci_read_config8(dev, 0x4);
        printk(BIOS_DEBUG, "command in reg 0x4 reads back as 0x%x\n", enables);
        pci_write_config8(dev, 0x4, enables);
        enables = pci_read_config8(dev, 0x4);
        printk(BIOS_DEBUG, "command in reg 0x4 reads back as 0x%x\n", enables);

-       
+

        if (!conf->enable_native_ide) {
                // Use compatability mode - per award bios
                pci_write_config32(dev, 0x10, 0x0);
                pci_write_config32(dev, 0x14, 0x0);
                pci_write_config32(dev, 0x18, 0x0);
                pci_write_config32(dev, 0x1c, 0x0);
        if (!conf->enable_native_ide) {
                // Use compatability mode - per award bios
                pci_write_config32(dev, 0x10, 0x0);
                pci_write_config32(dev, 0x14, 0x0);
                pci_write_config32(dev, 0x18, 0x0);
                pci_write_config32(dev, 0x1c, 0x0);

-               
+

                // Force interrupts to use compat mode - just like Award bios
                pci_write_config8(dev, 0x3d, 00);
                pci_write_config8(dev, 0x3c, 0xff);
                // Force interrupts to use compat mode - just like Award bios
                pci_write_config8(dev, 0x3d, 00);
                pci_write_config8(dev, 0x3c, 0xff);

-       }       
+       }

 }
 
 static struct device_operations ide_ops = {
 }
 
 static struct device_operations ide_ops = {

diff --git a/src/southbridge/via/vt8231/vt8231_lpc.c b/src/southbridge/via/vt8231/vt8231_lpc.c
index 6c517ff4926e16c3c298a02c65a46c7eb2c8c1d6..c874528decb644743e727f097a3d4e422029ef8b 100644 (file)
--- a/src/southbridge/via/vt8231/vt8231_lpc.c
+++ b/src/southbridge/via/vt8231/vt8231_lpc.c
@@ -25,7 +25,7 @@ static void pci_routing_fixup(struct device *dev)
        printk(BIOS_INFO, "%s: dev is %p\n", __func__, dev);
        if (dev) {
                /* initialize PCI interupts - these assignments depend
        printk(BIOS_INFO, "%s: dev is %p\n", __func__, dev);
        if (dev) {
                /* initialize PCI interupts - these assignments depend

-                  on the PCB routing of PINTA-D 
+                  on the PCB routing of PINTA-D

 
                   PINTA = IRQ11
                   PINTB = IRQ5
 
                   PINTA = IRQ11
                   PINTB = IRQ5


@@ -61,60 +61,60 @@ static void vt8231_init(struct device *dev)
        enables = pci_read_config8(dev, 0x6C);
        enables |= 0x80;
        pci_write_config8(dev, 0x6C, enables);
        enables = pci_read_config8(dev, 0x6C);
        enables |= 0x80;
        pci_write_config8(dev, 0x6C, enables);

-       
+

        // Map 4MB of FLASH into the address space
        pci_write_config8(dev, 0x41, 0x7f);
        // Map 4MB of FLASH into the address space
        pci_write_config8(dev, 0x41, 0x7f);

-       
+

        // Set bit 6 of 0x40, because Award does it (IO recovery time)
        // Set bit 6 of 0x40, because Award does it (IO recovery time)

-       // IMPORTANT FIX - EISA 0x4d0 decoding must be on so that PCI 
+       // IMPORTANT FIX - EISA 0x4d0 decoding must be on so that PCI

        // interrupts can be properly marked as level triggered.
        enables = pci_read_config8(dev, 0x40);
        pci_write_config8(dev, 0x40, enables);
        // interrupts can be properly marked as level triggered.
        enables = pci_read_config8(dev, 0x40);
        pci_write_config8(dev, 0x40, enables);

-       
+

        // Set 0x42 to 0xf0 to match Award bios
        enables = pci_read_config8(dev, 0x42);
        enables |= 0xf0;
        pci_write_config8(dev, 0x42, enables);
        // Set 0x42 to 0xf0 to match Award bios
        enables = pci_read_config8(dev, 0x42);
        enables |= 0xf0;
        pci_write_config8(dev, 0x42, enables);

-       
+

        // Set bit 3 of 0x4a, to match award (dummy pci request)
        enables = pci_read_config8(dev, 0x4a);
        enables |= 0x08;
        pci_write_config8(dev, 0x4a, enables);
        // Set bit 3 of 0x4a, to match award (dummy pci request)
        enables = pci_read_config8(dev, 0x4a);
        enables |= 0x08;
        pci_write_config8(dev, 0x4a, enables);

-       
+

        // Set bit 3 of 0x4f to match award (use INIT# as cpu reset)
        enables = pci_read_config8(dev, 0x4f);
        enables |= 0x08;
        pci_write_config8(dev, 0x4f, enables);
        // Set bit 3 of 0x4f to match award (use INIT# as cpu reset)
        enables = pci_read_config8(dev, 0x4f);
        enables |= 0x08;
        pci_write_config8(dev, 0x4f, enables);

-       
+

        // Set 0x58 to 0x03 to match Award
        pci_write_config8(dev, 0x58, 0x03);
        // Set 0x58 to 0x03 to match Award
        pci_write_config8(dev, 0x58, 0x03);

-       
+

        // enable the ethernet/RTC
        if (dev) {
                enables = pci_read_config8(dev, 0x51);
        // enable the ethernet/RTC
        if (dev) {
                enables = pci_read_config8(dev, 0x51);

-               enables |= 0x18; 
+               enables |= 0x18;

                pci_write_config8(dev, 0x51, enables);
        }
 
        // enable IDE, since Linux won't do it.
        // First do some more things to devfn (17,0)
                pci_write_config8(dev, 0x51, enables);
        }
 
        // enable IDE, since Linux won't do it.
        // First do some more things to devfn (17,0)

-       // note: this should already be cleared, according to the book. 
+       // note: this should already be cleared, according to the book.

        enables = pci_read_config8(dev, 0x50);
        printk(BIOS_DEBUG, "IDE enable in reg. 50 is 0x%x\n", enables);
        enables &= ~8; // need manifest constant here!
        printk(BIOS_DEBUG, "set IDE reg. 50 to 0x%x\n", enables);
        pci_write_config8(dev, 0x50, enables);
        enables = pci_read_config8(dev, 0x50);
        printk(BIOS_DEBUG, "IDE enable in reg. 50 is 0x%x\n", enables);
        enables &= ~8; // need manifest constant here!
        printk(BIOS_DEBUG, "set IDE reg. 50 to 0x%x\n", enables);
        pci_write_config8(dev, 0x50, enables);

-       
+

        // set default interrupt values (IDE)
        enables = pci_read_config8(dev, 0x4c);
        printk(BIOS_DEBUG, "IRQs in reg. 4c are 0x%x\n", enables & 0xf);
        // set default interrupt values (IDE)
        enables = pci_read_config8(dev, 0x4c);
        printk(BIOS_DEBUG, "IRQs in reg. 4c are 0x%x\n", enables & 0xf);

-       // clear out whatever was there. 
+       // clear out whatever was there.

        enables &= ~0xf;
        enables |= 4;
        printk(BIOS_DEBUG, "setting reg. 4c to 0x%x\n", enables);
        pci_write_config8(dev, 0x4c, enables);
        enables &= ~0xf;
        enables |= 4;
        printk(BIOS_DEBUG, "setting reg. 4c to 0x%x\n", enables);
        pci_write_config8(dev, 0x4c, enables);

-       
-       // set up the serial port interrupts. 
+
+       // set up the serial port interrupts.

        // com2 to 3, com1 to 4
        pci_write_config8(dev, 0x46, 0x04);
        pci_write_config8(dev, 0x47, 0x03);
        // com2 to 3, com1 to 4
        pci_write_config8(dev, 0x46, 0x04);
        pci_write_config8(dev, 0x47, 0x03);


@@ -123,7 +123,7 @@ static void vt8231_init(struct device *dev)
        /* set up isa bus -- i/o recovery time, rom write enable, extend-ale */
        pci_write_config8(dev, 0x40, 0x54);
        //ethernet_fixup();
        /* set up isa bus -- i/o recovery time, rom write enable, extend-ale */
        pci_write_config8(dev, 0x40, 0x54);
        //ethernet_fixup();

-       
+

        // Start the rtc
        rtc_init(0);
 }
        // Start the rtc
        rtc_init(0);
 }

diff --git a/src/southbridge/via/vt8231/vt8231_nic.c b/src/southbridge/via/vt8231/vt8231_nic.c
index d4771f68160f2aa0daffbe99e3cbfc674ce1e154..5cd6cd8ca10a9158fcf4280309a8789f76e2f336 100644 (file)
--- a/src/southbridge/via/vt8231/vt8231_nic.c
+++ b/src/southbridge/via/vt8231/vt8231_nic.c
@@ -5,7 +5,7 @@
 #include <device/pci_ids.h>
 
 /*
 #include <device/pci_ids.h>
 
 /*

- * Enable the ethernet device and turn off stepping (because it is integrated 
+ * Enable the ethernet device and turn off stepping (because it is integrated

  * inside the southbridge)
  */
 static void nic_init(struct device *dev)
  * inside the southbridge)
  */
 static void nic_init(struct device *dev)

diff --git a/src/southbridge/via/vt8231/vt8231_usb.c b/src/southbridge/via/vt8231/vt8231_usb.c
index 3dd0b4272bcbfe80ff0b6fecc0819ae8b91358c6..e12a8db85ab9b2c272834b3d205d26e326188122 100644 (file)
--- a/src/southbridge/via/vt8231/vt8231_usb.c
+++ b/src/southbridge/via/vt8231/vt8231_usb.c
@@ -9,7 +9,7 @@ static void usb_on(int enable)
        device_t dev2 = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_2, 0);
        /* USB controller 2 */
        device_t dev3 = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_2, dev2);
        device_t dev2 = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_2, 0);
        /* USB controller 2 */
        device_t dev3 = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_2, dev2);

-       
+

        /* enable USB1 */
        if(dev2) {
                if (enable) {
        /* enable USB1 */
        if(dev2) {
                if (enable) {


@@ -20,16 +20,16 @@ static void usb_on(int enable)
                        pci_write_config8(dev2, 0x04, 0x00);
                }
        }
                        pci_write_config8(dev2, 0x04, 0x00);
                }
        }

-       
+

        if(dev0) {
                regval = pci_read_config8(dev0, 0x50);
        if(dev0) {
                regval = pci_read_config8(dev0, 0x50);

-               if (enable) 
-                       regval &= ~(0x10);    
+               if (enable)
+                       regval &= ~(0x10);

                else
                else

-                       regval |= 0x10;               
+                       regval |= 0x10;

                pci_write_config8(dev0, 0x50, regval);
        }
                pci_write_config8(dev0, 0x50, regval);
        }

-       
+

        /* enable USB2 */
        if(dev3) {
                if (enable) {
        /* enable USB2 */
        if(dev3) {
                if (enable) {


@@ -40,13 +40,13 @@ static void usb_on(int enable)
                        pci_write_config8(dev3, 0x04, 0x00);
                }
        }
                        pci_write_config8(dev3, 0x04, 0x00);
                }
        }

-       
+

        if(dev0) {
                regval = pci_read_config8(dev0, 0x50);
        if(dev0) {
                regval = pci_read_config8(dev0, 0x50);

-               if (enable) 
-                       regval &= ~(0x20);    
+               if (enable)
+                       regval &= ~(0x20);

                else
                else

-                       regval |= 0x20;    
+                       regval |= 0x20;

                pci_write_config8(dev0, 0x50, regval);
        }
 }
                pci_write_config8(dev0, 0x50, regval);
        }
 }

diff --git a/src/southbridge/via/vt8235/vt8235.c b/src/southbridge/via/vt8235/vt8235.c
index 747c2157f1109dc7794900054525844f6e7ded0b..4fa27846611a43aa950185c15e79b7f11f63f568 100644 (file)
--- a/src/southbridge/via/vt8235/vt8235.c
+++ b/src/southbridge/via/vt8235/vt8235.c
@@ -12,7 +12,7 @@ static void keyboard_on(struct device *dev)
        u8 regval;
 
        regval = pci_read_config8(dev, 0x51);
        u8 regval;
 
        regval = pci_read_config8(dev, 0x51);

-       regval |= 0x05; 
+       regval |= 0x05;

        regval &= 0xfd;
        pci_write_config8(dev, 0x51, regval);
 
        regval &= 0xfd;
        pci_write_config8(dev, 0x51, regval);
 


@@ -23,7 +23,7 @@ static void keyboard_on(struct device *dev)
 void dump_south(device_t dev0)
 {
        int i,j;
 void dump_south(device_t dev0)
 {
        int i,j;

-       
+

        for(i = 0; i < 256; i += 16) {
                printk(BIOS_DEBUG, "0x%x: ", i);
                for(j = 0; j < 16; j++) {
        for(i = 0; i < 256; i += 16) {
                printk(BIOS_DEBUG, "0x%x: ", i);
                for(j = 0; j < 16; j++) {


@@ -51,10 +51,10 @@ static void vt8235_enable(struct device *dev)
        model = pci_read_config16(dev,0x2);
 
        printk(BIOS_DEBUG, "In vt8235_enable %04x %04x.\n",vendor,model);
        model = pci_read_config16(dev,0x2);
 
        printk(BIOS_DEBUG, "In vt8235_enable %04x %04x.\n",vendor,model);

-       
+

        /* If this is not the southbridge itself just return.
         * This is necessary because USB devices are slot 10, whereas this
        /* If this is not the southbridge itself just return.
         * This is necessary because USB devices are slot 10, whereas this

-        * device is slot 11 therefore usb devices get called first during 
+        * device is slot 11 therefore usb devices get called first during

         * the bus scan. We don't want to wait until we could do dev->init
         * because that's too late.
         */
         * the bus scan. We don't want to wait until we could do dev->init
         * because that's too late.
         */


@@ -69,13 +69,13 @@ static void vt8235_enable(struct device *dev)
 
        /* enable RTC and ethernet */
        regval = pci_read_config8(dev, 0x51);
 
        /* enable RTC and ethernet */
        regval = pci_read_config8(dev, 0x51);

-       regval |= 0x18; 
+       regval |= 0x18;

        pci_write_config8(dev, 0x51, regval);
 
        /* turn on keyboard */
        keyboard_on(dev);
 
        pci_write_config8(dev, 0x51, regval);
 
        /* turn on keyboard */
        keyboard_on(dev);
 

-       /* enable USB 1.1 & USB 2.0 - redundant really since we've 
+       /* enable USB 1.1 & USB 2.0 - redundant really since we've

         * already been there - see note above
         */
        regval = pci_read_config8(dev, 0x50);
         * already been there - see note above
         */
        regval = pci_read_config8(dev, 0x50);

diff --git a/src/southbridge/via/vt8235/vt8235_early_serial.c b/src/southbridge/via/vt8235/vt8235_early_serial.c
index 7823172485db60cd1cbcac567490f000e6a53d71..11f98fae3932565f8734b63955501f003b22b364 100644 (file)
--- a/src/southbridge/via/vt8235/vt8235_early_serial.c
+++ b/src/southbridge/via/vt8235/vt8235_early_serial.c
@@ -8,25 +8,25 @@
 #define SIO_BASE 0x3f0
 #define SIO_DATA  SIO_BASE+1
 
 #define SIO_BASE 0x3f0
 #define SIO_DATA  SIO_BASE+1
 

-static void vt8235_writepnpaddr(uint8_t val) 
+static void vt8235_writepnpaddr(uint8_t val)

 {
        outb(val, 0x2e);
        outb(val, 0xeb);
 }
 
 {
        outb(val, 0x2e);
        outb(val, 0xeb);
 }
 

-static void vt8235_writepnpdata(uint8_t val) 
+static void vt8235_writepnpdata(uint8_t val)

 {
        outb(val, 0x2f);
        outb(val, 0xeb);
 }
 
 
 {
        outb(val, 0x2f);
        outb(val, 0xeb);
 }
 
 

-static void vt8235_writesiobyte(uint16_t reg, uint8_t val) 
+static void vt8235_writesiobyte(uint16_t reg, uint8_t val)

 {
        outb(val, reg);
 }
 
 {
        outb(val, reg);
 }
 

-static void vt8235_writesioword(uint16_t reg, uint16_t val) 
+static void vt8235_writesioword(uint16_t reg, uint16_t val)

 {
        outw(val, reg);
 }
 {
        outw(val, reg);
 }


@@ -36,12 +36,12 @@ static void vt8235_writesioword(uint16_t reg, uint16_t val)
    mainboard
  */
 
    mainboard
  */
 

-static void enable_vt8235_serial(void) 
+static void enable_vt8235_serial(void)

 {
        // turn on pnp
        vt8235_writepnpaddr(0x87);
        vt8235_writepnpaddr(0x87);
 {
        // turn on pnp
        vt8235_writepnpaddr(0x87);
        vt8235_writepnpaddr(0x87);

-       // now go ahead and set up com1. 
+       // now go ahead and set up com1.

        // set address
        vt8235_writepnpaddr(0x7);
        vt8235_writepnpdata(0x2);
        // set address
        vt8235_writepnpaddr(0x7);
        vt8235_writepnpdata(0x2);

diff --git a/src/southbridge/via/vt8235/vt8235_early_smbus.c b/src/southbridge/via/vt8235/vt8235_early_smbus.c
index db403eb5fb8ddb875d97f87d765fbeea4b4038e2..1876461a3ddc6d6000d46701d57dd7c8af75b6be 100644 (file)
--- a/src/southbridge/via/vt8235/vt8235_early_smbus.c
+++ b/src/southbridge/via/vt8235/vt8235_early_smbus.c
@@ -12,7 +12,7 @@
 #define SMBTRNSADD 0x9
 #define SMBSLVDATA 0xa
 #define SMLINK_PIN_CTL 0xe
 #define SMBTRNSADD 0x9
 #define SMBSLVDATA 0xa
 #define SMLINK_PIN_CTL 0xe

-#define SMBUS_PIN_CTL  0xf 
+#define SMBUS_PIN_CTL  0xf

 
 /* Define register settings */
 #define HOST_RESET 0xff
 
 /* Define register settings */
 #define HOST_RESET 0xff


@@ -34,17 +34,17 @@ static void enable_smbus(void)
        /* Power management controller */
        dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA,
                                PCI_DEVICE_ID_VIA_8235), 0);
        /* Power management controller */
        dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA,
                                PCI_DEVICE_ID_VIA_8235), 0);

-       
+

        if (dev == PCI_DEV_INVALID) {
                die("SMBUS controller not found\n");
        if (dev == PCI_DEV_INVALID) {
                die("SMBUS controller not found\n");

-       }               
+       }

 
        // set IO base address to SMBUS_IO_BASE
        pci_write_config16(dev, 0xd0, SMBUS_IO_BASE | 1);
 
        // set IO base address to SMBUS_IO_BASE
        pci_write_config16(dev, 0xd0, SMBUS_IO_BASE | 1);

-       
-       // Enable SMBus 
+
+       // Enable SMBus

        pci_write_config8(dev, 0xd2, (0x4 << 1) | 1);
        pci_write_config8(dev, 0xd2, (0x4 << 1) | 1);

-       
+

        /* make it work for I/O ...
         */
        pci_write_config16(dev, 4, 1);
        /* make it work for I/O ...
         */
        pci_write_config16(dev, 4, 1);


@@ -55,13 +55,13 @@ static void enable_smbus(void)
        for(i = 0 ; i < 5000 ; i++)
                outb(0x80,0x80);
 
        for(i = 0 ; i < 5000 ; i++)
                outb(0x80,0x80);
 

-       /* 
+       /*

         * The VT1211 serial port needs 48 mhz clock, on power up it is getting
         *  only 24 mhz, there is some mysterious device on the smbus that can
         *  fix this...this code below does it.
         *  */
         * The VT1211 serial port needs 48 mhz clock, on power up it is getting
         *  only 24 mhz, there is some mysterious device on the smbus that can
         *  fix this...this code below does it.
         *  */

-       outb(0xff, SMBUS_IO_BASE+SMBHSTSTAT); 
-       outb(0x7f, SMBUS_IO_BASE+SMBHSTDAT0); 
+       outb(0xff, SMBUS_IO_BASE+SMBHSTSTAT);
+       outb(0x7f, SMBUS_IO_BASE+SMBHSTDAT0);

        outb(0x83, SMBUS_IO_BASE+SMBHSTCMD);
        outb(CLOCK_SLAVE_ADDRESS<<1 , SMBUS_IO_BASE+SMBXMITADD);
        outb(8 | I2C_TRANS_CMD, SMBUS_IO_BASE+SMBHSTCTL);
        outb(0x83, SMBUS_IO_BASE+SMBHSTCMD);
        outb(CLOCK_SLAVE_ADDRESS<<1 , SMBUS_IO_BASE+SMBXMITADD);
        outb(8 | I2C_TRANS_CMD, SMBUS_IO_BASE+SMBHSTCTL);


@@ -92,7 +92,7 @@ static int smbus_wait_until_ready(void)
                        print_debug_hex8(c);
                        print_debug("\n");
                        c = inb(SMBUS_IO_BASE + SMBHSTSTAT);
                        print_debug_hex8(c);
                        print_debug("\n");
                        c = inb(SMBUS_IO_BASE + SMBHSTSTAT);

-                       /* nop */ 
+                       /* nop */

                }
 
        } while(--loops);
                }
 
        } while(--loops);


@@ -105,13 +105,13 @@ void smbus_reset(void)
        outb(HOST_RESET, SMBUS_IO_BASE + SMBHSTSTAT);
        outb(HOST_RESET, SMBUS_IO_BASE + SMBHSTSTAT);
        outb(HOST_RESET, SMBUS_IO_BASE + SMBHSTSTAT);
        outb(HOST_RESET, SMBUS_IO_BASE + SMBHSTSTAT);
        outb(HOST_RESET, SMBUS_IO_BASE + SMBHSTSTAT);
        outb(HOST_RESET, SMBUS_IO_BASE + SMBHSTSTAT);

-       
+

        smbus_wait_until_ready();
        print_debug("After reset status ");
        print_debug_hex8( inb(SMBUS_IO_BASE + SMBHSTSTAT));
        print_debug("\n");
 }
        smbus_wait_until_ready();
        print_debug("After reset status ");
        print_debug_hex8( inb(SMBUS_IO_BASE + SMBHSTSTAT));
        print_debug("\n");
 }

-  
+

 
 
 static int smbus_wait_until_done(void)
 
 
 static int smbus_wait_until_done(void)


@@ -121,11 +121,11 @@ static int smbus_wait_until_done(void)
        loops = SMBUS_TIMEOUT;
        do {
                smbus_delay();
        loops = SMBUS_TIMEOUT;
        do {
                smbus_delay();

-               
+

                byte = inb(SMBUS_IO_BASE + SMBHSTSTAT);
                if (byte & 1)
                        break;
                byte = inb(SMBUS_IO_BASE + SMBHSTSTAT);
                if (byte & 1)
                        break;

-               
+

        } while(--loops);
        return loops?0:-1;
 }
        } while(--loops);
        return loops?0:-1;
 }


@@ -156,46 +156,46 @@ static void smbus_print_error(unsigned char host_status_register)
 
 /* SMBus routines borrowed from VIA's Trident Driver */
 /* this works, so I am not going to touch it for now -- rgm */
 
 /* SMBus routines borrowed from VIA's Trident Driver */
 /* this works, so I am not going to touch it for now -- rgm */

-static unsigned char smbus_read_byte(unsigned char devAdr, 
-                               unsigned char bIndex) 
+static unsigned char smbus_read_byte(unsigned char devAdr,
+                               unsigned char bIndex)

 {
        unsigned short i;
        unsigned char  bData;
        unsigned char  sts = 0;
 {
        unsigned short i;
        unsigned char  bData;
        unsigned char  sts = 0;

-       
+

        /* clear host status */
        outb(0xff, SMBUS_IO_BASE);
        /* clear host status */
        outb(0xff, SMBUS_IO_BASE);

-       
+

        /* check SMBUS ready */
        for ( i = 0; i < 0xFFFF; i++ )
                if ( (inb(SMBUS_IO_BASE) & 0x01) == 0 )
                        break;
        /* check SMBUS ready */
        for ( i = 0; i < 0xFFFF; i++ )
                if ( (inb(SMBUS_IO_BASE) & 0x01) == 0 )
                        break;

-       
+

        /* set host command */
        outb(bIndex, SMBUS_IO_BASE+3);
        /* set host command */
        outb(bIndex, SMBUS_IO_BASE+3);

-       
+

        /* set slave address */
        outb(devAdr | 0x01, SMBUS_IO_BASE+4);
        /* set slave address */
        outb(devAdr | 0x01, SMBUS_IO_BASE+4);

-       
+

        /* start */
        outb(0x48, SMBUS_IO_BASE+2);
        /* start */
        outb(0x48, SMBUS_IO_BASE+2);

-       
+

        /* SMBUS Wait Ready */
        for ( i = 0; i < 0xFFFF; i++ )
                if ( ((sts = (inb(SMBUS_IO_BASE) & 0x1f)) & 0x01) == 0 )
                        break;
        /* SMBUS Wait Ready */
        for ( i = 0; i < 0xFFFF; i++ )
                if ( ((sts = (inb(SMBUS_IO_BASE) & 0x1f)) & 0x01) == 0 )
                        break;

-       
+

        if ((sts & ~3) != 0) {
                smbus_print_error(sts);
                return 0;
        }
        bData=inb(SMBUS_IO_BASE+5);
        if ((sts & ~3) != 0) {
                smbus_print_error(sts);
                return 0;
        }
        bData=inb(SMBUS_IO_BASE+5);

-       
+

        return bData;
        return bData;

-       
+

 }
 
 }
 

-/* for reference, here is the fancier version which we will use at some 
+/* for reference, here is the fancier version which we will use at some

  * point
  */
 # if 0
  * point
  */
 # if 0


@@ -203,11 +203,11 @@ int smbus_read_byte(unsigned device, unsigned address, unsigned char *result)
 {
        unsigned char host_status_register;
        unsigned char byte;
 {
        unsigned char host_status_register;
        unsigned char byte;

-       
+

        reset();
        reset();

-       
+

        smbus_wait_until_ready();
        smbus_wait_until_ready();

-       
+

        /* setup transaction */
        /* disable interrupts */
        outb(inb(SMBUS_IO_BASE + SMBHSTCTL) & (~1), SMBUS_IO_BASE + SMBHSTCTL);
        /* setup transaction */
        /* disable interrupts */
        outb(inb(SMBUS_IO_BASE + SMBHSTCTL) & (~1), SMBUS_IO_BASE + SMBHSTCTL);


@@ -218,29 +218,29 @@ int smbus_read_byte(unsigned device, unsigned address, unsigned char *result)
        /* set up for a byte data read */
        outb((inb(SMBUS_IO_BASE + SMBHSTCTL) & 0xE3) | (0x2 << 2),
                SMBUS_IO_BASE + SMBHSTCTL);
        /* set up for a byte data read */
        outb((inb(SMBUS_IO_BASE + SMBHSTCTL) & 0xE3) | (0x2 << 2),
                SMBUS_IO_BASE + SMBHSTCTL);

-       
+

        /* clear any lingering errors, so the transaction will run */
        outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT);
        /* clear any lingering errors, so the transaction will run */
        outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT);

-       
+

        /* clear the data byte...*/
        outb(0, SMBUS_IO_BASE + SMBHSTDAT0);
        /* clear the data byte...*/
        outb(0, SMBUS_IO_BASE + SMBHSTDAT0);

-       
+

        /* start the command */
        outb((inb(SMBUS_IO_BASE + SMBHSTCTL) | 0x40),
                SMBUS_IO_BASE + SMBHSTCTL);
        /* start the command */
        outb((inb(SMBUS_IO_BASE + SMBHSTCTL) | 0x40),
                SMBUS_IO_BASE + SMBHSTCTL);

-       
+

        /* poll for transaction completion */
        smbus_wait_until_done();
        /* poll for transaction completion */
        smbus_wait_until_done();

-       
+

        host_status_register = inb(SMBUS_IO_BASE + SMBHSTSTAT);
        host_status_register = inb(SMBUS_IO_BASE + SMBHSTSTAT);

-       
+

        /* Ignore the In Use Status... */
        host_status_register &= ~(1 << 6);
        /* Ignore the In Use Status... */
        host_status_register &= ~(1 << 6);

-       
+

        /* read results of transaction */
        byte = inb(SMBUS_IO_BASE + SMBHSTDAT0);
        smbus_print_error(byte);
        /* read results of transaction */
        byte = inb(SMBUS_IO_BASE + SMBHSTDAT0);
        smbus_print_error(byte);

-       
+

        *result = byte;
        return host_status_register != 0x02;
 }
        *result = byte;
        return host_status_register != 0x02;
 }

diff --git a/src/southbridge/via/vt8235/vt8235_ide.c b/src/southbridge/via/vt8235/vt8235_ide.c
index ec22f9053bed10e404e15cc99a163c6b8a9c3259..961f860fed52a78442c8db8c5d6b40741d88dfb8 100644 (file)
--- a/src/southbridge/via/vt8235/vt8235_ide.c
+++ b/src/southbridge/via/vt8235/vt8235_ide.c
@@ -28,69 +28,69 @@ static void ide_init(struct device *dev)
                printk(BIOS_DEBUG, "enables in reg 0x42 read back as 0x%x\n",
                                enables);
        /* } */
                printk(BIOS_DEBUG, "enables in reg 0x42 read back as 0x%x\n",
                                enables);
        /* } */

-       
+

        enables = pci_read_config8(dev, 0x40);
        printk(BIOS_DEBUG, "enables in reg 0x40 0x%x\n", enables);
        enables |= 3;
        pci_write_config8(dev, 0x40, enables);
        enables = pci_read_config8(dev, 0x40);
        printk(BIOS_DEBUG, "enables in reg 0x40 read back as 0x%x\n", enables);
        enables = pci_read_config8(dev, 0x40);
        printk(BIOS_DEBUG, "enables in reg 0x40 0x%x\n", enables);
        enables |= 3;
        pci_write_config8(dev, 0x40, enables);
        enables = pci_read_config8(dev, 0x40);
        printk(BIOS_DEBUG, "enables in reg 0x40 read back as 0x%x\n", enables);

-       
+

        // Enable prefetch buffers
        enables = pci_read_config8(dev, 0x41);
        enables |= 0xf0;
        pci_write_config8(dev, 0x41, enables);
        // Enable prefetch buffers
        enables = pci_read_config8(dev, 0x41);
        enables |= 0xf0;
        pci_write_config8(dev, 0x41, enables);

-       
+

        // Lower thresholds (cause award does it)
        enables = pci_read_config8(dev, 0x43);
        enables &= ~0x0f;
        enables |=  0x05;
        pci_write_config8(dev, 0x43, enables);
        // Lower thresholds (cause award does it)
        enables = pci_read_config8(dev, 0x43);
        enables &= ~0x0f;
        enables |=  0x05;
        pci_write_config8(dev, 0x43, enables);

-       
+

        // PIO read prefetch counter (cause award does it)
        pci_write_config8(dev, 0x44, 0x18);
        // PIO read prefetch counter (cause award does it)
        pci_write_config8(dev, 0x44, 0x18);

-       
+

        // Use memory read multiple
        pci_write_config8(dev, 0x45, 0x1c);
        // Use memory read multiple
        pci_write_config8(dev, 0x45, 0x1c);

-       
-       // address decoding. 
+
+       // address decoding.

        // we want "flexible", i.e. 1f0-1f7 etc. or native PCI
        // we want "flexible", i.e. 1f0-1f7 etc. or native PCI

-       // kevinh@ispiri.com - the standard linux drivers seem ass slow when 
+       // kevinh@ispiri.com - the standard linux drivers seem ass slow when

        // used in native mode - I've changed back to classic
        enables = pci_read_config8(dev, 0x9);
        printk(BIOS_DEBUG, "enables in reg 0x9 0x%x\n", enables);
        // used in native mode - I've changed back to classic
        enables = pci_read_config8(dev, 0x9);
        printk(BIOS_DEBUG, "enables in reg 0x9 0x%x\n", enables);

-       // by the book, set the low-order nibble to 0xa. 
+       // by the book, set the low-order nibble to 0xa.

        if (conf->enable_native_ide) {
                enables &= ~0xf;
        if (conf->enable_native_ide) {
                enables &= ~0xf;

-               // cf/cg silicon needs an 'f' here. 
+               // cf/cg silicon needs an 'f' here.

                enables |= 0xf;
        } else {
                enables &= ~0x5;
        }
                enables |= 0xf;
        } else {
                enables &= ~0x5;
        }

-       
+

        pci_write_config8(dev, 0x9, enables);
        enables = pci_read_config8(dev, 0x9);
        printk(BIOS_DEBUG, "enables in reg 0x9 read back as 0x%x\n", enables);
        pci_write_config8(dev, 0x9, enables);
        enables = pci_read_config8(dev, 0x9);
        printk(BIOS_DEBUG, "enables in reg 0x9 read back as 0x%x\n", enables);

-       
-       // standard bios sets master bit. 
+
+       // standard bios sets master bit.

        enables = pci_read_config8(dev, 0x4);
        printk(BIOS_DEBUG, "command in reg 0x4 0x%x\n", enables);
        enables |= 7;
        enables = pci_read_config8(dev, 0x4);
        printk(BIOS_DEBUG, "command in reg 0x4 0x%x\n", enables);
        enables |= 7;

-       
+

        // No need for stepping - kevinh@ispiri.com
        enables &= ~0x80;
        // No need for stepping - kevinh@ispiri.com
        enables &= ~0x80;

-       
+

        pci_write_config8(dev, 0x4, enables);
        enables = pci_read_config8(dev, 0x4);
        printk(BIOS_DEBUG, "command in reg 0x4 reads back as 0x%x\n", enables);
        pci_write_config8(dev, 0x4, enables);
        enables = pci_read_config8(dev, 0x4);
        printk(BIOS_DEBUG, "command in reg 0x4 reads back as 0x%x\n", enables);

-       
+

        if (!conf->enable_native_ide) {
                // Use compatability mode - per award bios
                pci_write_config32(dev, 0x10, 0x0);
                pci_write_config32(dev, 0x14, 0x0);
                pci_write_config32(dev, 0x18, 0x0);
                pci_write_config32(dev, 0x1c, 0x0);
        if (!conf->enable_native_ide) {
                // Use compatability mode - per award bios
                pci_write_config32(dev, 0x10, 0x0);
                pci_write_config32(dev, 0x14, 0x0);
                pci_write_config32(dev, 0x18, 0x0);
                pci_write_config32(dev, 0x1c, 0x0);

-               
+

                // Force interrupts to use compat mode - just like Award bios
                pci_write_config8(dev, 0x3d, 0x0);
                pci_write_config8(dev, 0x3c, 0xff);
                // Force interrupts to use compat mode - just like Award bios
                pci_write_config8(dev, 0x3d, 0x0);
                pci_write_config8(dev, 0x3c, 0xff);


@@ -103,10 +103,10 @@ static struct device_operations ide_ops = {
        .enable_resources = pci_dev_enable_resources,
        .init             = ide_init,
        .enable           = 0,
        .enable_resources = pci_dev_enable_resources,
        .init             = ide_init,
        .enable           = 0,

-       .ops_pci          = 0, 
+       .ops_pci          = 0,

 };
 
 };
 

-static const struct pci_driver northbridge_driver __pci_driver = { 
+static const struct pci_driver northbridge_driver __pci_driver = {

        .ops    = &ide_ops,
        .vendor = PCI_VENDOR_ID_VIA,
        .device = PCI_DEVICE_ID_VIA_82C586_1,
        .ops    = &ide_ops,
        .vendor = PCI_VENDOR_ID_VIA,
        .device = PCI_DEVICE_ID_VIA_82C586_1,

diff --git a/src/southbridge/via/vt8235/vt8235_lpc.c b/src/southbridge/via/vt8235/vt8235_lpc.c
index 0746bc9a13ebb4ab5114b26b1a049aa9e2be2380..e2bfc3681efc9419153bff499770b00325cec7d6 100644 (file)
--- a/src/southbridge/via/vt8235/vt8235_lpc.c
+++ b/src/southbridge/via/vt8235/vt8235_lpc.c
@@ -88,7 +88,7 @@ static void pci_routing_fixup(struct device *dev)
        printk(BIOS_INFO, "setting pci slot\n");
        pci_assign_irqs(0, 0x14, pin_to_irq(slotPins));
 
        printk(BIOS_INFO, "setting pci slot\n");
        pci_assign_irqs(0, 0x14, pin_to_irq(slotPins));
 

-       // Cardbus slot 
+       // Cardbus slot

        printk(BIOS_INFO, "setting cardbus slot\n");
        pci_assign_irqs(0, 0x0a, pin_to_irq(cbPins));
 
        printk(BIOS_INFO, "setting cardbus slot\n");
        pci_assign_irqs(0, 0x0a, pin_to_irq(cbPins));
 


@@ -99,11 +99,11 @@ static void pci_routing_fixup(struct device *dev)
        printk(BIOS_SPEW, "%s: DONE\n", __func__);
 }
 
        printk(BIOS_SPEW, "%s: DONE\n", __func__);
 }
 

-/* 
+/*

  * Set up the power management capabilities directly into ACPI mode.  This
  * avoids having to handle any System Management Interrupts (SMI's) which I
  * can't figure out how to do !!!!
  * Set up the power management capabilities directly into ACPI mode.  This
  * avoids having to handle any System Management Interrupts (SMI's) which I
  * can't figure out how to do !!!!

- */ 
+ */

 
 static void setup_pm(device_t dev)
 {
 
 static void setup_pm(device_t dev)
 {


@@ -112,7 +112,7 @@ static void setup_pm(device_t dev)
 
        // Set ACPI base address to IO 0x4000
        pci_write_config16(dev, 0x88, 0x0401);
 
        // Set ACPI base address to IO 0x4000
        pci_write_config16(dev, 0x88, 0x0401);

-       
+

        // set ACPI irq to 5
        pci_write_config8(dev, 0x82, 0x45);
 
        // set ACPI irq to 5
        pci_write_config8(dev, 0x82, 0x45);
 


@@ -138,7 +138,7 @@ static void setup_pm(device_t dev)
        outw(0xffff, 0x420);
        outw(0xffff, 0x428);
        outl(0xffffffff, 0x430);
        outw(0xffff, 0x420);
        outw(0xffff, 0x428);
        outl(0xffffffff, 0x430);

-       
+

        outw(0x0, 0x424);
        outw(0x0, 0x42a);
        outw(0x1, 0x42c);
        outw(0x0, 0x424);
        outw(0x0, 0x42a);
        outw(0x1, 0x42c);


@@ -152,29 +152,29 @@ static void setup_pm(device_t dev)
 static void vt8235_init(struct device *dev)
 {
        unsigned char enables;
 static void vt8235_init(struct device *dev)
 {
        unsigned char enables;

-       
+

        printk(BIOS_DEBUG, "vt8235 init\n");
 
        // enable the internal I/O decode
        enables = pci_read_config8(dev, 0x6C);
        enables |= 0x80;
        pci_write_config8(dev, 0x6C, enables);
        printk(BIOS_DEBUG, "vt8235 init\n");
 
        // enable the internal I/O decode
        enables = pci_read_config8(dev, 0x6C);
        enables |= 0x80;
        pci_write_config8(dev, 0x6C, enables);

-       
+

        // Map 4MB of FLASH into the address space
        pci_write_config8(dev, 0x41, 0x7f);
        // Map 4MB of FLASH into the address space
        pci_write_config8(dev, 0x41, 0x7f);

-       
+

        // Set bit 6 of 0x40, because Award does it (IO recovery time)
        // Set bit 6 of 0x40, because Award does it (IO recovery time)

-       // IMPORTANT FIX - EISA 0x4d0 decoding must be on so that PCI 
+       // IMPORTANT FIX - EISA 0x4d0 decoding must be on so that PCI

        // interrupts can be properly marked as level triggered.
        enables = pci_read_config8(dev, 0x40);
        enables |= 0x45;
        pci_write_config8(dev, 0x40, enables);
        // interrupts can be properly marked as level triggered.
        enables = pci_read_config8(dev, 0x40);
        enables |= 0x45;
        pci_write_config8(dev, 0x40, enables);

-       
+

        // Set 0x42 to 0xf0 to match Award bios
        enables = pci_read_config8(dev, 0x42);
        enables |= 0xf0;
        pci_write_config8(dev, 0x42, enables);
        // Set 0x42 to 0xf0 to match Award bios
        enables = pci_read_config8(dev, 0x42);
        enables |= 0xf0;
        pci_write_config8(dev, 0x42, enables);

-       
+

        /* Set 0x58 to 0x03 to match Award */
        pci_write_config8(dev, 0x58, 0x03);
 
        /* Set 0x58 to 0x03 to match Award */
        pci_write_config8(dev, 0x58, 0x03);
 


@@ -187,16 +187,16 @@ static void vt8235_init(struct device *dev)
        enables = pci_read_config8(dev, 0x4a);
        enables |= 0x08;
        pci_write_config8(dev, 0x4a, enables);
        enables = pci_read_config8(dev, 0x4a);
        enables |= 0x08;
        pci_write_config8(dev, 0x4a, enables);

-       
+

        // Set bit 3 of 0x4f to match award (use INIT# as cpu reset)
        enables = pci_read_config8(dev, 0x4f);
        enables |= 0x08;
        pci_write_config8(dev, 0x4f, enables);
        // Set bit 3 of 0x4f to match award (use INIT# as cpu reset)
        enables = pci_read_config8(dev, 0x4f);
        enables |= 0x08;
        pci_write_config8(dev, 0x4f, enables);

-       
+

        // Set 0x58 to 0x03 to match Award
        pci_write_config8(dev, 0x58, 0x03);
        // Set 0x58 to 0x03 to match Award
        pci_write_config8(dev, 0x58, 0x03);

-       
-       
+
+

        /* enable serial irq */
        pci_write_config8(dev, 0x52, 0x9);
 
        /* enable serial irq */
        pci_write_config8(dev, 0x52, 0x9);
 


@@ -205,10 +205,10 @@ static void vt8235_init(struct device *dev)
 
        // Power management setup
        setup_pm(dev);
 
        // Power management setup
        setup_pm(dev);

-       
+

        /* set up isa bus -- i/o recovery time, rom write enable, extend-ale */
        pci_write_config8(dev, 0x40, 0x54);
        /* set up isa bus -- i/o recovery time, rom write enable, extend-ale */
        pci_write_config8(dev, 0x40, 0x54);

-       
+

        // Start the rtc
        rtc_init(0);
 }
        // Start the rtc
        rtc_init(0);
 }


@@ -248,7 +248,7 @@ static void vt8235_enable_resources(device_t dev)
        pci_dev_enable_resources(dev);
        enable_childrens_resources(dev);
 }
        pci_dev_enable_resources(dev);
        enable_childrens_resources(dev);
 }

-       
+

 static void southbridge_init(struct device *dev)
 {
        vt8235_init(dev);
 static void southbridge_init(struct device *dev)
 {
        vt8235_init(dev);

diff --git a/src/southbridge/via/vt8235/vt8235_nic.c b/src/southbridge/via/vt8235/vt8235_nic.c
index 86fef895de496bebfaaf8baba10b81b04c2542ff..71f169c055366b5381d5a30412fe837a8ad6bacf 100644 (file)
--- a/src/southbridge/via/vt8235/vt8235_nic.c
+++ b/src/southbridge/via/vt8235/vt8235_nic.c
@@ -5,7 +5,7 @@
 #include <device/pci_ids.h>
 
 /*
 #include <device/pci_ids.h>
 
 /*

- * Enable the ethernet device and turn off stepping (because it is integrated 
+ * Enable the ethernet device and turn off stepping (because it is integrated

  * inside the southbridge)
  */
 static void nic_init(struct device *dev)
  * inside the southbridge)
  */
 static void nic_init(struct device *dev)

diff --git a/src/southbridge/via/vt8237r/vt8237r_early_smbus.c b/src/southbridge/via/vt8237r/vt8237r_early_smbus.c
index aa75f50651416c96b74842da6ebdecefca7b5237..9f824437bfd91638e256fe5217bbb4059cdd1e46 100644 (file)
--- a/src/southbridge/via/vt8237r/vt8237r_early_smbus.c
+++ b/src/southbridge/via/vt8237r/vt8237r_early_smbus.c
@@ -171,10 +171,10 @@ void enable_smbus(void)
 }
 
 /**
 }
 
 /**

- * A fixup for some systems that need time for the SMBus to "warm up". This is 
- * needed on some VT823x based systems, where the SMBus spurts out bad data for 
- * a short time after power on. This has been seen on the VIA Epia series and 
- * Jetway J7F2-series. It reads the ID byte from SMBus, looking for 
+ * A fixup for some systems that need time for the SMBus to "warm up". This is
+ * needed on some VT823x based systems, where the SMBus spurts out bad data for
+ * a short time after power on. This has been seen on the VIA Epia series and
+ * Jetway J7F2-series. It reads the ID byte from SMBus, looking for

  * known-good data from a slot/address. Exits on either good data or a timeout.
  *
  * TODO: This should probably go into some global file, but one would need to
  * known-good data from a slot/address. Exits on either good data or a timeout.
  *
  * TODO: This should probably go into some global file, but one would need to

diff --git a/src/southbridge/via/vt8237r/vt8237r_lpc.c b/src/southbridge/via/vt8237r/vt8237r_lpc.c
index f7acb75766e4c31b03183176bd99a46fbca84b04..5a08e3b16ffa9c0bf362b1e017d8006ec06e4bf8 100644 (file)
--- a/src/southbridge/via/vt8237r/vt8237r_lpc.c
+++ b/src/southbridge/via/vt8237r/vt8237r_lpc.c
@@ -187,7 +187,7 @@ static void setup_pm(device_t dev)
         * 6 = SUSST# Deasserted Before PWRGD for STD
         * 5 = Keyboard/Mouse Swap
         * 4 = PWRGOOD reset on VT8237A/S
         * 6 = SUSST# Deasserted Before PWRGD for STD
         * 5 = Keyboard/Mouse Swap
         * 4 = PWRGOOD reset on VT8237A/S

-        * 3 = GPO26/GPO27 is GPO 
+        * 3 = GPO26/GPO27 is GPO

         * 2 = Disable Alert on Lan
         * 1 = SUSCLK/GPO4
         * 0 = USB Wakeup
         * 2 = Disable Alert on Lan
         * 1 = SUSCLK/GPO4
         * 0 = USB Wakeup


@@ -247,7 +247,7 @@ static void setup_pm(device_t dev)
 static void vt8237r_init(struct device *dev)
 {
        u8 enables;
 static void vt8237r_init(struct device *dev)
 {
        u8 enables;

-       
+

 #if CONFIG_EPIA_VT8237R_INIT
        printk(BIOS_SPEW, "Entering vt8237r_init, for EPIA.\n");
        /*
 #if CONFIG_EPIA_VT8237R_INIT
        printk(BIOS_SPEW, "Entering vt8237r_init, for EPIA.\n");
        /*


@@ -260,9 +260,9 @@ static void vt8237r_init(struct device *dev)
        enables = pci_read_config8(dev, 0xe5);
        enables |= 0x23;
        pci_write_config8(dev, 0xe5, enables);
        enables = pci_read_config8(dev, 0xe5);
        enables |= 0x23;
        pci_write_config8(dev, 0xe5, enables);

-       
-       /* 
-        * Enable Flash Write Access. 
+
+       /*
+        * Enable Flash Write Access.

         * Note EPIA-N Does not use REQ5 or PCISTP#(Hang)
         */
        enables = pci_read_config8(dev, 0xe4);
         * Note EPIA-N Does not use REQ5 or PCISTP#(Hang)
         */
        enables = pci_read_config8(dev, 0xe4);


@@ -274,14 +274,14 @@ static void vt8237r_init(struct device *dev)
        enables |= 0x80;
        pci_write_config8(dev, 0x4E, enables);
 
        enables |= 0x80;
        pci_write_config8(dev, 0x4E, enables);
 

-#else 
+#else

        printk(BIOS_SPEW, "Entering vt8237r_init.\n");
        /*
         * Enable SATA LED, disable special CPU Frequency Change -
         * GPIO28 GPIO22 GPIO29 GPIO23 are GPIOs.
         */
        pci_write_config8(dev, 0xe5, 0x09);
        printk(BIOS_SPEW, "Entering vt8237r_init.\n");
        /*
         * Enable SATA LED, disable special CPU Frequency Change -
         * GPIO28 GPIO22 GPIO29 GPIO23 are GPIOs.
         */
        pci_write_config8(dev, 0xe5, 0x09);

-       
+

        /* REQ5 as PCI request input - should be together with INTE-INTH. */
        pci_write_config8(dev, 0xe4, 0x4);
 #endif
        /* REQ5 as PCI request input - should be together with INTE-INTH. */
        pci_write_config8(dev, 0xe4, 0x4);
 #endif


@@ -329,7 +329,7 @@ static void vt8237s_init(struct device *dev)
                           (VT8237S_SPI_MEM_BASE >> 8) | (tmp & 0xFF000000));
 
        /*
                           (VT8237S_SPI_MEM_BASE >> 8) | (tmp & 0xFF000000));
 
        /*

-        * REQ5 as PCI request input - should be together with INTE-INTH. 
+        * REQ5 as PCI request input - should be together with INTE-INTH.

         */
        pci_write_config8(dev, 0xe4, 0x04);
 
         */
        pci_write_config8(dev, 0xe4, 0x04);
 

diff --git a/src/superio/Makefile.inc b/src/superio/Makefile.inc
index 88c02bdc70172f7b606ed5d8e9f3d17259c17280..00e751ba982cf48b0974ebc2fe8a4a568a20c30a 100644 (file)
--- a/src/superio/Makefile.inc
+++ b/src/superio/Makefile.inc
@@ -1,4 +1,4 @@
-subdirs-y += fintek 
+subdirs-y += fintek

 subdirs-y += intel
 subdirs-y += ite
 subdirs-y += nsc
 subdirs-y += intel
 subdirs-y += ite
 subdirs-y += nsc

diff --git a/src/superio/smsc/lpc47n227/lpc47n227_early_serial.c b/src/superio/smsc/lpc47n227/lpc47n227_early_serial.c
index 40de4e0007a3963be0ac6f5e07c619fda7e055ca..c6527d1ba63ab340b240a9ee56ad26e7b6b1b04c 100644 (file)
--- a/src/superio/smsc/lpc47n227/lpc47n227_early_serial.c
+++ b/src/superio/smsc/lpc47n227/lpc47n227_early_serial.c
@@ -49,7 +49,7 @@ static void pnp_exit_conf_state(device_t dev)
 
 //----------------------------------------------------------------------------------
 // Function:            lpc47n227_pnp_set_iobase
 
 //----------------------------------------------------------------------------------
 // Function:            lpc47n227_pnp_set_iobase

-// Parameters:          dev - high 8 bits = Super I/O port, 
+// Parameters:          dev - high 8 bits = Super I/O port,

 //                            low 8 bits = logical device number (per lpc47n227.h)
 //                      iobase - base I/O port for the logical device
 // Return Value:        None
 //                            low 8 bits = logical device number (per lpc47n227.h)
 //                      iobase - base I/O port for the logical device
 // Return Value:        None


@@ -80,7 +80,7 @@ void lpc47n227_pnp_set_iobase(device_t dev, unsigned iobase)
 
 //----------------------------------------------------------------------------------
 // Function:            lpc47n227_pnp_set_enable
 
 //----------------------------------------------------------------------------------
 // Function:            lpc47n227_pnp_set_enable

-// Parameters:          dev - high 8 bits = Super I/O port, 
+// Parameters:          dev - high 8 bits = Super I/O port,

 //                      low 8 bits = logical device number (per lpc47n227.h)
 //                      enable - 0 to disable, anythig else to enable
 // Return Value:        None
 //                      low 8 bits = logical device number (per lpc47n227.h)
 //                      enable - 0 to disable, anythig else to enable
 // Return Value:        None


@@ -130,7 +130,7 @@ void lpc47n227_pnp_set_enable(device_t dev, int enable)
 
 //----------------------------------------------------------------------------------
 // Function:            lpc47n227_enable_serial
 
 //----------------------------------------------------------------------------------
 // Function:            lpc47n227_enable_serial

-// Parameters:          dev - high 8 bits = Super I/O port, 
+// Parameters:          dev - high 8 bits = Super I/O port,

 //                            low 8 bits = logical device number (per lpc47n227.h)
 //                      iobase - processor I/O port address to assign to this serial device
 // Return Value:        bool
 //                            low 8 bits = logical device number (per lpc47n227.h)
 //                      iobase - processor I/O port address to assign to this serial device
 // Return Value:        bool

diff --git a/src/superio/smsc/lpc47n227/superio.c b/src/superio/smsc/lpc47n227/superio.c
index 8dfb774b12e3c2c3265c9c0133ac36d196e9fb1d..1431908f8e223bb54e4b59ae92fade8bc863cb65 100644 (file)
--- a/src/superio/smsc/lpc47n227/superio.c
+++ b/src/superio/smsc/lpc47n227/superio.c
@@ -76,9 +76,9 @@ static struct pnp_info pnp_dev_info[] = {
 
 //----------------------------------------------------------------------------------
 // Function:            enable_dev
 
 //----------------------------------------------------------------------------------
 // Function:            enable_dev

-// Parameters:          dev - pointer to structure describing a Super I/O device 
+// Parameters:          dev - pointer to structure describing a Super I/O device

 // Return Value:        None
 // Return Value:        None

-// Description:         Create device structures and allocate resources to devices 
+// Description:         Create device structures and allocate resources to devices

 //                      specified in the pnp_dev_info array (above).
 //
 static void enable_dev(device_t dev)
 //                      specified in the pnp_dev_info array (above).
 //
 static void enable_dev(device_t dev)


@@ -89,7 +89,7 @@ static void enable_dev(device_t dev)
 
 //----------------------------------------------------------------------------------
 // Function:            lpc47n227_pnp_set_resources
 
 //----------------------------------------------------------------------------------
 // Function:            lpc47n227_pnp_set_resources

-// Parameters:          dev - pointer to structure describing a Super I/O device 
+// Parameters:          dev - pointer to structure describing a Super I/O device

 // Return Value:        None
 // Description:         Configure the specified Super I/O device with the resources
 //                      (I/O space, etc.) that have been allocate for it.
 // Return Value:        None
 // Description:         Configure the specified Super I/O device with the resources
 //                      (I/O space, etc.) that have been allocate for it.


@@ -137,11 +137,11 @@ void lpc47n227_pnp_enable(device_t dev)
 
 //----------------------------------------------------------------------------------
 // Function:            lpc47n227_init
 
 //----------------------------------------------------------------------------------
 // Function:            lpc47n227_init

-// Parameters:          dev - pointer to structure describing a Super I/O device 
+// Parameters:          dev - pointer to structure describing a Super I/O device

 // Return Value:        None
 // Description:         Initialize the specified Super I/O device.
 //                      Devices other than COM ports and keyboard controller are ignored.
 // Return Value:        None
 // Description:         Initialize the specified Super I/O device.
 //                      Devices other than COM ports and keyboard controller are ignored.

-//                      For COM ports, we configure the baud rate. 
+//                      For COM ports, we configure the baud rate.

 //
 static void lpc47n227_init(device_t dev)
 {
 //
 static void lpc47n227_init(device_t dev)
 {


@@ -236,7 +236,7 @@ void lpc47n227_pnp_set_drq(device_t dev, unsigned drq)
                    pnp_read_config(dev, PP_DMA_SELECTION_REGISTER);
                uint8_t new_config;
 
                    pnp_read_config(dev, PP_DMA_SELECTION_REGISTER);
                uint8_t new_config;
 

-               ASSERT(!(drq & ~PP_DMA_MASK));  // DRQ out of range??           
+               ASSERT(!(drq & ~PP_DMA_MASK));  // DRQ out of range??

                new_config = (current_config & ~PP_DMA_MASK) | drq;
                pnp_write_config(dev, PP_DMA_SELECTION_REGISTER, new_config);
        } else {
                new_config = (current_config & ~PP_DMA_MASK) | drq;
                pnp_write_config(dev, PP_DMA_SELECTION_REGISTER, new_config);
        } else {


@@ -330,7 +330,7 @@ void lpc47n227_pnp_set_enable(device_t dev, int enable)
 
 //----------------------------------------------------------------------------------
 // Function:            pnp_enter_conf_state
 
 //----------------------------------------------------------------------------------
 // Function:            pnp_enter_conf_state

-// Parameters:          dev - pointer to structure describing a Super I/O device 
+// Parameters:          dev - pointer to structure describing a Super I/O device

 // Return Value:        None
 // Description:         Enable access to the LPC47N227's configuration registers.
 //
 // Return Value:        None
 // Description:         Enable access to the LPC47N227's configuration registers.
 //


@@ -341,7 +341,7 @@ static void pnp_enter_conf_state(device_t dev)
 
 //----------------------------------------------------------------------------------
 // Function:            pnp_exit_conf_state
 
 //----------------------------------------------------------------------------------
 // Function:            pnp_exit_conf_state

-// Parameters:          dev - pointer to structure describing a Super I/O device 
+// Parameters:          dev - pointer to structure describing a Super I/O device

 // Return Value:        None
 // Description:         Disable access to the LPC47N227's configuration registers.
 //
 // Return Value:        None
 // Description:         Disable access to the LPC47N227's configuration registers.
 //

diff --git a/src/superio/winbond/w83627hf/superio.c b/src/superio/winbond/w83627hf/superio.c
index 4c69a2c2c0498ee17cd39aab6339cf98633aa170..b6918470e032207e2d62590c2668a68f730ebc16 100644 (file)
--- a/src/superio/winbond/w83627hf/superio.c
+++ b/src/superio/winbond/w83627hf/superio.c
@@ -4,7 +4,7 @@
  * Copyright (C) 2000 AG Electronics Ltd.
  * Copyright (C) 2003-2004 Linux Networx
  * Copyright (C) 2004 Tyan By LYH change from PC87360
  * Copyright (C) 2000 AG Electronics Ltd.
  * Copyright (C) 2003-2004 Linux Networx
  * Copyright (C) 2004 Tyan By LYH change from PC87360

- * Copyright (C) 2010 Win Enterprises (anishp@win-ent.com) 
+ * Copyright (C) 2010 Win Enterprises (anishp@win-ent.com)

  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by

diff --git a/util/abuild/abuild b/util/abuild/abuild
index 22962a8a404fc5538703990f68b14538c2d90724..9ba75ca75309e8dfdd761bb3ad6e64194f031108 100755 (executable)
--- a/util/abuild/abuild
+++ b/util/abuild/abuild
@@ -10,7 +10,7 @@
 #  This file is subject to the terms and conditions of the GNU General
 #  Public License. See the file COPYING in the main directory of this
 #  archive for more details.
 #  This file is subject to the terms and conditions of the GNU General
 #  Public License. See the file COPYING in the main directory of this
 #  archive for more details.

-#     
+#

 
 #set -x # Turn echo on....
 
 
 #set -x # Turn echo on....
 


@@ -99,10 +99,10 @@ function xml
 
 function xmlfile
 {
 
 function xmlfile
 {

-       test "$mode" == "xml" && { 
+       test "$mode" == "xml" && {

                printf '<![CDATA[\n'
                cat $1
                printf '<![CDATA[\n'
                cat $1

-               printf ']]>\n' 
+               printf ']]>\n'

        } >> $XMLFILE
 }
 
        } >> $XMLFILE
 }
 


@@ -119,9 +119,9 @@ function mainboards
 {
        # make this a function so we can easily select
        # without breaking readability
 {
        # make this a function so we can easily select
        # without breaking readability

-       
+

        VENDOR=$1
        VENDOR=$1

-       
+

        ls -1 $ROOT/src/mainboard/$VENDOR | grep -v Kconfig
 }
 
        ls -1 $ROOT/src/mainboard/$VENDOR | grep -v Kconfig
 }
 


@@ -143,7 +143,7 @@ function create_config
        build_dir=$TARGET/${VENDOR}_${MAINBOARD}
 
         # get a working payload for the board if we have one.
        build_dir=$TARGET/${VENDOR}_${MAINBOARD}
 
         # get a working payload for the board if we have one.

-        # the --payload option expects a directory containing 
+        # the --payload option expects a directory containing

        # a shell script payload.sh
        #   Usage: payload.sh [VENDOR] [DEVICE]
        # the script returns an absolute path to the payload binary.
        # a shell script payload.sh
        #   Usage: payload.sh [VENDOR] [DEVICE]
        # the script returns an absolute path to the payload binary.


@@ -253,7 +253,7 @@ function create_buildenv
 }
 
 function compile_target
 }
 
 function compile_target

-{      
+{

        VENDOR=$1
        MAINBOARD=$2
 
        VENDOR=$1
        MAINBOARD=$2
 


@@ -381,17 +381,17 @@ function build_target
                        done
                fi
 
                        done
                fi
 

-       
+

                # TBD: look for suitable cross compiler suite
                # cross-$TARCH-gcc and cross-$TARCH-ld
                # TBD: look for suitable cross compiler suite
                # cross-$TARCH-gcc and cross-$TARCH-ld

-               
+

                # Check result:
                if [ $found_crosscompiler == "false" ]; then
                        printf "$TARCH: skipped, we're $ARCH\n\n"
                        xml "  <status>notbuilt</status>"
                        xml ""
                        xml "</mainboard>"
                # Check result:
                if [ $found_crosscompiler == "false" ]; then
                        printf "$TARCH: skipped, we're $ARCH\n\n"
                        xml "  <status>notbuilt</status>"
                        xml ""
                        xml "</mainboard>"

-               
+

                        return 0
                else
                        printf "$TARCH: ok, $ARCH using ${CROSS_COMPILE}gcc\n"
                        return 0
                else
                        printf "$TARCH: ok, $ARCH using ${CROSS_COMPILE}gcc\n"


@@ -426,14 +426,14 @@ function build_target
                xml "</mainboard>"
                return 0
        }
                xml "</mainboard>"
                return 0
        }

-       
+

        stime=`perl -e 'print time();' 2>/dev/null || date +%s`
        create_buildenv $VENDOR $MAINBOARD $CONFIG
        if [ $? -eq 0  -a  $configureonly -eq 0 ]; then
                if [ "$scanbuild" = "true" ]; then
                        rm -rf $TARGET/scan-build-results-tmp
                fi
        stime=`perl -e 'print time();' 2>/dev/null || date +%s`
        create_buildenv $VENDOR $MAINBOARD $CONFIG
        if [ $? -eq 0  -a  $configureonly -eq 0 ]; then
                if [ "$scanbuild" = "true" ]; then
                        rm -rf $TARGET/scan-build-results-tmp
                fi

-               compile_target $VENDOR $MAINBOARD && 
+               compile_target $VENDOR $MAINBOARD &&

                        xml "  <status>ok</status>" ||
                        xml "<status>broken</status>"
                if [ "$scanbuild" = "true" ]; then
                        xml "  <status>ok</status>" ||
                        xml "<status>broken</status>"
                if [ "$scanbuild" = "true" ]; then


@@ -541,7 +541,7 @@ function myhelp
        printf "                                  (defaults to $ROOT)\n\n"
 }
 
        printf "                                  (defaults to $ROOT)\n\n"
 }
 

-function myversion 
+function myversion

 {
        cat << EOF
 
 {
        cat << EOF
 

diff --git a/util/abuild/abuild.1 b/util/abuild/abuild.1
index 44439e9213c545ed2a36ebdc27e800b1a9537895..33f30cb2a735e465aa971e68363bb89eb803d44d 100644 (file)
--- a/util/abuild/abuild.1
+++ b/util/abuild/abuild.1
@@ -50,13 +50,13 @@ and will be created in the current directory.
 .TP
 .B "\-T, \-\-test"
 Submit generated image(s) to the automated test system.
 .TP
 .B "\-T, \-\-test"
 Submit generated image(s) to the automated test system.

-The results of the tests will be made available at 
+The results of the tests will be made available at

 .B http://qa.coreboot.org/log_manual.php
 .TP
 .B "\-c, \-\-cpus [<numcpus>|max]"
 .B http://qa.coreboot.org/log_manual.php
 .TP
 .B "\-c, \-\-cpus [<numcpus>|max]"

-Build on 
+Build on

 .B numcpus
 .B numcpus

-cpus at the same time, or on all available with 
+cpus at the same time, or on all available with

 .B max\fR.
 .TP
 .B "\-s, \-\-silent"
 .B max\fR.
 .TP
 .B "\-s, \-\-silent"

diff --git a/util/amdtools/README b/util/amdtools/README
index a1601fe8c722e2b56cb23032207c8f7f85c45f29..da14bf3c00250973ce4a32200e8f4c24bf29ed87 100644 (file)
--- a/util/amdtools/README
+++ b/util/amdtools/README
@@ -24,9 +24,9 @@ Finally run the txt file through the parse-bkdg.pl script like so:
 Now we have the bkdg.data file that is used by the other scripts.
 
 If you want to test the scripts without doing all this work, you can use some
 Now we have the bkdg.data file that is used by the other scripts.
 
 If you want to test the scripts without doing all this work, you can use some

-sample input files from the 'example_input/' directory. 
+sample input files from the 'example_input/' directory.

 
 

--- 
+--

 Ward Vandewege, 2009-10-28.
 ward@jhvc.com
 Ward Vandewege, 2009-10-28.
 ward@jhvc.com

- 
+

diff --git a/util/amdtools/k8-compare-pci-space.pl b/util/amdtools/k8-compare-pci-space.pl
index 16ecb3406761f393f69bb74baa79c50f8219f76a..97ef3e9ff17d668ddfa7bc74c6ab1e64b1d18d15 100755 (executable)
--- a/util/amdtools/k8-compare-pci-space.pl
+++ b/util/amdtools/k8-compare-pci-space.pl
@@ -55,7 +55,7 @@ sub parse_file {
         next if (!(/^([a-f0-9]{2}): ([[a-f0-9 ]+)$/i));
         # Line format
         # 00: 22 10 02 11 00 00 00 00 00 00 00 06 00 00 80 00
         next if (!(/^([a-f0-9]{2}): ([[a-f0-9 ]+)$/i));
         # Line format
         # 00: 22 10 02 11 00 00 00 00 00 00 00 06 00 00 80 00

-#print STDERR hex($1) . " ($1): $2\n"; 
+#print STDERR hex($1) . " ($1): $2\n";

         my $regoffset = hex($1);
         my @values = split(/ /,$2);
         for (my $i=0;$i<=$#values;$i++) {
         my $regoffset = hex($1);
         my @values = split(/ /,$2);
         for (my $i=0;$i<=$#values;$i++) {


@@ -93,7 +93,7 @@ sub parse_file_old {
         if ($tmp[1] eq '98.l') {
             $register = ($tmp[2] =~ /(..)$/)[0]; # last 2 digits are (hex) of what we wrote to the register, if second field is 98.l
             $devreg = "$device $register";
         if ($tmp[1] eq '98.l') {
             $register = ($tmp[2] =~ /(..)$/)[0]; # last 2 digits are (hex) of what we wrote to the register, if second field is 98.l
             $devreg = "$device $register";

-            if ("$binrep" =~ /^1/) {  
+            if ("$binrep" =~ /^1/) {

                 # bit 31 *must* be 1 if readout is to be correct
                 print "$tmp[0] - $register<br>\n" if ($DEBUG);
             } else {
                 # bit 31 *must* be 1 if readout is to be correct
                 print "$tmp[0] - $register<br>\n" if ($DEBUG);
             } else {


@@ -107,7 +107,7 @@ sub parse_file_old {
             $data{$devreg}{$filename} = $packed;
         }
     }
             $data{$devreg}{$filename} = $packed;
         }
     }

-    return %data;   
+    return %data;

 }
 
 sub interpret_differences {
 }
 
 sub interpret_differences {

diff --git a/util/amdtools/k8-interpret-extended-memory-settings.pl b/util/amdtools/k8-interpret-extended-memory-settings.pl
index 0bb4e62a448978eac62b4e95a2b9da374a181924..3ecc2a53e0157c07b77c296dc6f95f856b99b8ad 100755 (executable)
--- a/util/amdtools/k8-interpret-extended-memory-settings.pl
+++ b/util/amdtools/k8-interpret-extended-memory-settings.pl
@@ -63,7 +63,7 @@ sub parse_file {
         if ($tmp[1] eq '98.l') {
             $register = ($tmp[2] =~ /(..)$/)[0]; # last 2 digits are (hex) of what we wrote to the register, if second field is 98.l
             $devreg = "$device $register";
         if ($tmp[1] eq '98.l') {
             $register = ($tmp[2] =~ /(..)$/)[0]; # last 2 digits are (hex) of what we wrote to the register, if second field is 98.l
             $devreg = "$device $register";

-            if ("$binrep" =~ /^1/) {  
+            if ("$binrep" =~ /^1/) {

                 # bit 31 *must* be 1 if readout is to be correct
                 print "$tmp[0] - $register<br>\n" if ($DEBUG);
             } else {
                 # bit 31 *must* be 1 if readout is to be correct
                 print "$tmp[0] - $register<br>\n" if ($DEBUG);
             } else {


@@ -77,7 +77,7 @@ sub parse_file {
             $data{$devreg}{$filename} = $packed;
         }
     }
             $data{$devreg}{$filename} = $packed;
         }
     }

-    return %data;   
+    return %data;

 }
 
 sub interpret_differences {
 }
 
 sub interpret_differences {

diff --git a/util/amdtools/parse-bkdg.pl b/util/amdtools/parse-bkdg.pl
index d359e4abe7d018fac41ee660ab0714c7ff57f259..8ef93b7616d4e7f5437cda33db2a74ae15d37fef 100755 (executable)
--- a/util/amdtools/parse-bkdg.pl
+++ b/util/amdtools/parse-bkdg.pl
@@ -191,7 +191,7 @@ while (<>) {
         $previous_start = $start;
         $previous_stop = $stop;
 
         $previous_start = $start;
         $previous_stop = $stop;
 

-        # the 'range' field is not useful in this instance, but used in the 'fields' version of this block to easily go 
+        # the 'range' field is not useful in this instance, but used in the 'fields' version of this block to easily go

         # from a bit position to the corresponding range.
         my $str = "
 \$info{'$registers[0]'}{'ranges'}{'" . $f[0] . "'}{'function'} = \"" . $f[2] . "\";
         # from a bit position to the corresponding range.
         my $str = "
 \$info{'$registers[0]'}{'ranges'}{'" . $f[0] . "'}{'function'} = \"" . $f[2] . "\";


@@ -260,7 +260,7 @@ sub multiply {
     my $tmp = $str;
     $tmp =~ s/\{'$range'\}/{'$i'}/g;
     $tmp =~ s/\{'ranges'\}/{'fields'}/g;
     my $tmp = $str;
     $tmp =~ s/\{'$range'\}/{'$i'}/g;
     $tmp =~ s/\{'ranges'\}/{'fields'}/g;

-    $tmp .= 
+    $tmp .=

     $output .= $tmp;
   }
 
     $output .= $tmp;
   }
 

diff --git a/util/cbfstool/EXAMPLE b/util/cbfstool/EXAMPLE
index e4e198e3550a2cd4e2d27375ff10507ca8046f6f..0f7aea677344e8335150e1ec597b1376319dd4ad 100644 (file)
--- a/util/cbfstool/EXAMPLE
+++ b/util/cbfstool/EXAMPLE
@@ -1,4 +1,4 @@
- rm coreboot.rom; 
+ rm coreboot.rom;

 ./cbfstool coreboot.rom create 0x80000 0x10000 /tmp/coreboot.strip
 ./cbfstool coreboot.rom add-payload /tmp/filo.elf normal/payload l
 ./cbfstool coreboot.rom print
 ./cbfstool coreboot.rom create 0x80000 0x10000 /tmp/coreboot.strip
 ./cbfstool coreboot.rom add-payload /tmp/filo.elf normal/payload l
 ./cbfstool coreboot.rom print

diff --git a/util/cbfstool/Makefile b/util/cbfstool/Makefile
index d74c44ee5d72bbc40b587ff0a673ebebd6dcb469..843e6775031f11e1eaafefd878a4811fcbec569f 100644 (file)
--- a/util/cbfstool/Makefile
+++ b/util/cbfstool/Makefile
@@ -41,7 +41,7 @@ all: $(BINARY)
 clean:
        rm -f $(COMMON) $(BINARY)
 
 clean:
        rm -f $(COMMON) $(BINARY)
 

-tags: 
+tags:

        ctags *.[ch]
 
 CXXFLAGS=-DCOMPACT -g
        ctags *.[ch]
 
 CXXFLAGS=-DCOMPACT -g

diff --git a/util/cbfstool/cbfs.h b/util/cbfstool/cbfs.h
index 9661bbd2c983032bc525a6724c1fc723dc460d88..0d33710229a5d1ae1114823eebb6aa6ad08e406d 100644 (file)
--- a/util/cbfstool/cbfs.h
+++ b/util/cbfstool/cbfs.h
@@ -79,12 +79,12 @@ struct cbfs_payload {
 
 /* The deleted type is chosen to be a value
  * that can be written in a FLASH from all other
 
 /* The deleted type is chosen to be a value
  * that can be written in a FLASH from all other

- * values. 
+ * values.

  */
 #define CBFS_COMPONENT_DELETED 0
 
  */
 #define CBFS_COMPONENT_DELETED 0
 

-/* for all known FLASH, this value can be changed 
- * to all other values. This allows NULL files to be 
+/* for all known FLASH, this value can be changed
+ * to all other values. This allows NULL files to be

  * changed without a block erase
  */
 #define CBFS_COMPONENT_NULL 0xFFFFFFFF
  * changed without a block erase
  */
 #define CBFS_COMPONENT_NULL 0xFFFFFFFF

diff --git a/util/cbfstool/common.c b/util/cbfstool/common.c
index 30d52816b100f811ce22069376419acff1c2b1a1..b071864b5c81923f9ed4772722e76976f7d2bc95 100644 (file)
--- a/util/cbfstool/common.c
+++ b/util/cbfstool/common.c
@@ -183,10 +183,10 @@ void print_cbfs_directory(const char *filename)
                    (struct cbfs_file *)phys_to_virt(current);
                uint32_t length = ntohl(thisfile->len);
                char *fname = (char *)(phys_to_virt(current) + sizeof(struct cbfs_file));
                    (struct cbfs_file *)phys_to_virt(current);
                uint32_t length = ntohl(thisfile->len);
                char *fname = (char *)(phys_to_virt(current) + sizeof(struct cbfs_file));

-               if (strlen(fname) == 0) 
+               if (strlen(fname) == 0)

                        fname = "(empty)";
 
                        fname = "(empty)";
 

-               printf("%-30s 0x%-8x %-12s %d\n", fname, 
+               printf("%-30s 0x%-8x %-12s %d\n", fname,

                       current - phys_start, strfiletype(ntohl(thisfile->type)),
                       length);
                current =
                       current - phys_start, strfiletype(ntohl(thisfile->type)),
                       length);
                current =

diff --git a/util/cbfstool/lzma/C/7zip/Common/InBuffer.h b/util/cbfstool/lzma/C/7zip/Common/InBuffer.h
index 057caa16593381a4ed1ef9be86af19ba129e9bda..bfa4bc968b0bf591c638a52114637a9c2a40baba 100644 (file)
--- a/util/cbfstool/lzma/C/7zip/Common/InBuffer.h
+++ b/util/cbfstool/lzma/C/7zip/Common/InBuffer.h
@@ -38,7 +38,7 @@ public:
 
   bool Create(UInt32 bufferSize);
   void Free();
 
   bool Create(UInt32 bufferSize);
   void Free();

-  
+

   void SetStream(ISequentialInStream *stream);
   void Init();
   void ReleaseStream() { _stream.Release(); }
   void SetStream(ISequentialInStream *stream);
   void Init();
   void ReleaseStream() { _stream.Release(); }

diff --git a/util/cbfstool/lzma/C/7zip/Common/OutBuffer.cpp b/util/cbfstool/lzma/C/7zip/Common/OutBuffer.cpp
index a73fa7c5b90140842db69c278a3b06e1173c7d88..b4c8b7ee48985e799506868bd14f0bdc4dd37f10 100644 (file)
--- a/util/cbfstool/lzma/C/7zip/Common/OutBuffer.cpp
+++ b/util/cbfstool/lzma/C/7zip/Common/OutBuffer.cpp
@@ -43,9 +43,9 @@ void COutBuffer::Init()
 }
 
 UInt64 COutBuffer::GetProcessedSize() const
 }
 
 UInt64 COutBuffer::GetProcessedSize() const

-{ 
+{

   UInt64 res = _processedSize + _pos - _streamPos;
   UInt64 res = _processedSize + _pos - _streamPos;

-  if (_streamPos > _pos) 
+  if (_streamPos > _pos)

     res += _bufferSize;
   return res;
 }
     res += _bufferSize;
   return res;
 }

diff --git a/util/cbfstool/lzma/C/7zip/Common/OutBuffer.h b/util/cbfstool/lzma/C/7zip/Common/OutBuffer.h
index 0ce54e21e61a21132aa06c758575efc0b57d610c..659368be30a0570e6d95556ce5a66ac7fb78199e 100644 (file)
--- a/util/cbfstool/lzma/C/7zip/Common/OutBuffer.h
+++ b/util/cbfstool/lzma/C/7zip/Common/OutBuffer.h
@@ -36,7 +36,7 @@ public:
 
   COutBuffer(): _buffer(0), _pos(0), _stream(0), _buffer2(0) {}
   ~COutBuffer() { Free(); }
 
   COutBuffer(): _buffer(0), _pos(0), _stream(0), _buffer2(0) {}
   ~COutBuffer() { Free(); }

-  
+

   bool Create(UInt32 bufferSize);
   void Free();
 
   bool Create(UInt32 bufferSize);
   void Free();
 

diff --git a/util/cbfstool/lzma/C/7zip/Common/StdAfx.h b/util/cbfstool/lzma/C/7zip/Common/StdAfx.h
index 27a77b104bb180762cfb5d04a45bbf20a969a081..ef555ec12ac214edb3a838854f521d98e2a6215e 100644 (file)
--- a/util/cbfstool/lzma/C/7zip/Common/StdAfx.h
+++ b/util/cbfstool/lzma/C/7zip/Common/StdAfx.h
@@ -6,4 +6,4 @@
 #include "../../Common/MyWindows.h"
 #include "../../Common/NewHandler.h"
 
 #include "../../Common/MyWindows.h"
 #include "../../Common/NewHandler.h"
 

-#endif 
+#endif

diff --git a/util/cbfstool/lzma/C/7zip/Common/StreamUtils.cpp b/util/cbfstool/lzma/C/7zip/Common/StreamUtils.cpp
index a5d9ac0ef07fb47cdcd20035cff5c4dda1af9b31..f5d2da5b55135dc77a0b08c473bf1ebe5c69816c 100644 (file)
--- a/util/cbfstool/lzma/C/7zip/Common/StreamUtils.cpp
+++ b/util/cbfstool/lzma/C/7zip/Common/StreamUtils.cpp
@@ -11,7 +11,7 @@ HRESULT ReadStream(ISequentialInStream *stream, void *data, UInt32 size, UInt32
     *processedSize = 0;
   while(size != 0)
   {
     *processedSize = 0;
   while(size != 0)
   {

-    UInt32 processedSizeLoc; 
+    UInt32 processedSizeLoc;

     HRESULT res = stream->Read(data, size, &processedSizeLoc);
     if (processedSize != 0)
       *processedSize += processedSizeLoc;
     HRESULT res = stream->Read(data, size, &processedSizeLoc);
     if (processedSize != 0)
       *processedSize += processedSizeLoc;


@@ -30,7 +30,7 @@ HRESULT WriteStream(ISequentialOutStream *stream, const void *data, UInt32 size,
     *processedSize = 0;
   while(size != 0)
   {
     *processedSize = 0;
   while(size != 0)
   {

-    UInt32 processedSizeLoc; 
+    UInt32 processedSizeLoc;

     HRESULT res = stream->Write(data, size, &processedSizeLoc);
     if (processedSize != 0)
       *processedSize += processedSizeLoc;
     HRESULT res = stream->Write(data, size, &processedSizeLoc);
     if (processedSize != 0)
       *processedSize += processedSizeLoc;

diff --git a/util/cbfstool/lzma/C/7zip/Compress/LZ/BinTree/BinTree.h b/util/cbfstool/lzma/C/7zip/Compress/LZ/BinTree/BinTree.h
index b3b3f13a564ca421486259cc60664bce9998cea0..243d5a38886f609e9bc91625360a2e37b98abdc2 100644 (file)
--- a/util/cbfstool/lzma/C/7zip/Compress/LZ/BinTree/BinTree.h
+++ b/util/cbfstool/lzma/C/7zip/Compress/LZ/BinTree/BinTree.h
@@ -2,13 +2,13 @@
 
 #include "../LZInWindow.h"
 #include "../IMatchFinder.h"
 
 #include "../LZInWindow.h"
 #include "../IMatchFinder.h"

- 
+

 namespace BT_NAMESPACE {
 
 typedef UInt32 CIndex;
 const UInt32 kMaxValForNormalize = (UInt32(1) << 31) - 1;
 
 namespace BT_NAMESPACE {
 
 typedef UInt32 CIndex;
 const UInt32 kMaxValForNormalize = (UInt32(1) << 31) - 1;
 

-class CMatchFinder: 
+class CMatchFinder:

   public IMatchFinder,
   public CLZInWindow,
   public CMyUnknownImp,
   public IMatchFinder,
   public CLZInWindow,
   public CMyUnknownImp,


@@ -40,7 +40,7 @@ class CMatchFinder:
   STDMETHOD_(Int32, NeedChangeBufferPos)(UInt32 numCheckBytes);
   STDMETHOD_(void, ChangeBufferPos)();
 
   STDMETHOD_(Int32, NeedChangeBufferPos)(UInt32 numCheckBytes);
   STDMETHOD_(void, ChangeBufferPos)();
 

-  STDMETHOD(Create)(UInt32 historySize, UInt32 keepAddBufferBefore, 
+  STDMETHOD(Create)(UInt32 historySize, UInt32 keepAddBufferBefore,

       UInt32 matchMaxLen, UInt32 keepAddBufferAfter);
   STDMETHOD(GetMatches)(UInt32 *distances);
   STDMETHOD(Skip)(UInt32 num);
       UInt32 matchMaxLen, UInt32 keepAddBufferAfter);
   STDMETHOD(GetMatches)(UInt32 *distances);
   STDMETHOD(Skip)(UInt32 num);

diff --git a/util/cbfstool/lzma/C/7zip/Compress/LZ/BinTree/BinTreeMain.h b/util/cbfstool/lzma/C/7zip/Compress/LZ/BinTree/BinTreeMain.h
index 7a6f621a069f1ccd9c373261ecd075bc1acef522..d47a03de900a99eafa9025e32ee1e31e09edddf1 100644 (file)
--- a/util/cbfstool/lzma/C/7zip/Compress/LZ/BinTree/BinTreeMain.h
+++ b/util/cbfstool/lzma/C/7zip/Compress/LZ/BinTree/BinTreeMain.h
@@ -25,7 +25,7 @@ namespace BT_NAMESPACE {
   static const UInt32 kMinMatchCheck = kNumHashBytes;
   static const UInt32 kStartMaxLen = 1;
 #else
   static const UInt32 kMinMatchCheck = kNumHashBytes;
   static const UInt32 kStartMaxLen = 1;
 #else

-  #ifdef HASH_ZIP 
+  #ifdef HASH_ZIP

     #define kNumHashDirectBytes 0
     static const UInt32 kNumHashBytes = 3;
     static const UInt32 kHashSize = 1 << 16;
     #define kNumHashDirectBytes 0
     static const UInt32 kNumHashBytes = 3;
     static const UInt32 kHashSize = 1 << 16;


@@ -73,11 +73,11 @@ void CMatchFinder::FreeMemory()
 }
 
 CMatchFinder::~CMatchFinder()
 }
 
 CMatchFinder::~CMatchFinder()

-{ 
+{

   FreeMemory();
 }
 
   FreeMemory();
 }
 

-STDMETHODIMP CMatchFinder::Create(UInt32 historySize, UInt32 keepAddBufferBefore, 
+STDMETHODIMP CMatchFinder::Create(UInt32 historySize, UInt32 keepAddBufferBefore,

     UInt32 matchMaxLen, UInt32 keepAddBufferAfter)
 {
   if (historySize > kMaxValForNormalize - 256)
     UInt32 matchMaxLen, UInt32 keepAddBufferAfter)
 {
   if (historySize > kMaxValForNormalize - 256)


@@ -85,15 +85,15 @@ STDMETHODIMP CMatchFinder::Create(UInt32 historySize, UInt32 keepAddBufferBefore
     FreeMemory();
     return E_INVALIDARG;
   }
     FreeMemory();
     return E_INVALIDARG;
   }

-  _cutValue = 
+  _cutValue =

   #ifdef _HASH_CHAIN
     8 + (matchMaxLen >> 2);
   #else
     16 + (matchMaxLen >> 1);
   #endif
   #ifdef _HASH_CHAIN
     8 + (matchMaxLen >> 2);
   #else
     16 + (matchMaxLen >> 1);
   #endif

-  UInt32 sizeReserv = (historySize + keepAddBufferBefore + 
+  UInt32 sizeReserv = (historySize + keepAddBufferBefore +

       matchMaxLen + keepAddBufferAfter) / 2 + 256;
       matchMaxLen + keepAddBufferAfter) / 2 + 256;

-  if (CLZInWindow::Create(historySize + keepAddBufferBefore, 
+  if (CLZInWindow::Create(historySize + keepAddBufferBefore,

       matchMaxLen + keepAddBufferAfter, sizeReserv))
   {
     _matchMaxLen = matchMaxLen;
       matchMaxLen + keepAddBufferAfter, sizeReserv))
   {
     _matchMaxLen = matchMaxLen;


@@ -161,8 +161,8 @@ STDMETHODIMP CMatchFinder::Init()
 }
 
 STDMETHODIMP_(void) CMatchFinder::ReleaseStream()
 }
 
 STDMETHODIMP_(void) CMatchFinder::ReleaseStream()

-{ 
-  // ReleaseStream(); 
+{
+  // ReleaseStream();

 }
 
 #ifdef HASH_ARRAY_2
 }
 
 #ifdef HASH_ARRAY_2


@@ -173,7 +173,7 @@ STDMETHODIMP_(void) CMatchFinder::ReleaseStream()
   hash2Value = temp & (kHash2Size - 1); \
   hash3Value = (temp ^ (UInt32(cur[2]) << 8)) & (kHash3Size - 1); \
   hashValue = (temp ^ (UInt32(cur[2]) << 8) ^ (CCRC::Table[cur[3]] << 5)) & _hashMask; }
   hash2Value = temp & (kHash2Size - 1); \
   hash3Value = (temp ^ (UInt32(cur[2]) << 8)) & (kHash3Size - 1); \
   hashValue = (temp ^ (UInt32(cur[2]) << 8) ^ (CCRC::Table[cur[3]] << 5)) & _hashMask; }

-  
+

 #else // no HASH_ARRAY_3
 #define HASH_CALC { \
   UInt32 temp = CCRC::Table[cur[0]] ^ cur[1]; \
 #else // no HASH_ARRAY_3
 #define HASH_CALC { \
   UInt32 temp = CCRC::Table[cur[0]] ^ cur[1]; \


@@ -181,12 +181,12 @@ STDMETHODIMP_(void) CMatchFinder::ReleaseStream()
   hashValue = (temp ^ (UInt32(cur[2]) << 8)) & _hashMask; }
 #endif // HASH_ARRAY_3
 #else // no HASH_ARRAY_2
   hashValue = (temp ^ (UInt32(cur[2]) << 8)) & _hashMask; }
 #endif // HASH_ARRAY_3
 #else // no HASH_ARRAY_2

-#ifdef HASH_ZIP 
+#ifdef HASH_ZIP

 inline UInt32 Hash(const Byte *pointer)
 {
   return ((UInt32(pointer[0]) << 8) ^ CCRC::Table[pointer[1]] ^ pointer[2]) & (kHashSize - 1);
 }
 inline UInt32 Hash(const Byte *pointer)
 {
   return ((UInt32(pointer[0]) << 8) ^ CCRC::Table[pointer[1]] ^ pointer[2]) & (kHashSize - 1);
 }

-#else // no HASH_ZIP 
+#else // no HASH_ZIP

 inline UInt32 Hash(const Byte *pointer)
 {
   return pointer[0] ^ (UInt32(pointer[1]) << 8);
 inline UInt32 Hash(const Byte *pointer)
 {
   return pointer[0] ^ (UInt32(pointer[1]) << 8);


@@ -205,7 +205,7 @@ STDMETHODIMP CMatchFinder::GetMatches(UInt32 *distances)
     if(lenLimit < kMinMatchCheck)
     {
       distances[0] = 0;
     if(lenLimit < kMinMatchCheck)
     {
       distances[0] = 0;

-      return MovePos(); 
+      return MovePos();

     }
   }
 
     }
   }
 


@@ -298,17 +298,17 @@ STDMETHODIMP CMatchFinder::GetMatches(UInt32 *distances)
     UInt32 cyclicPos = (delta <= _cyclicBufferPos) ?
         (_cyclicBufferPos - delta):
         (_cyclicBufferPos - delta + _cyclicBufferSize);
     UInt32 cyclicPos = (delta <= _cyclicBufferPos) ?
         (_cyclicBufferPos - delta):
         (_cyclicBufferPos - delta + _cyclicBufferSize);

-    CIndex *pair = son + 
+    CIndex *pair = son +

     #ifdef _HASH_CHAIN
       cyclicPos;
     #else
       (cyclicPos << 1);
     #endif
     #ifdef _HASH_CHAIN
       cyclicPos;
     #else
       (cyclicPos << 1);
     #endif

-    
+

     // _mm_prefetch((const char *)pair, _MM_HINT_T0);
     // _mm_prefetch((const char *)pair, _MM_HINT_T0);

-    
+

     const Byte *pb = _buffer + curMatch;
     const Byte *pb = _buffer + curMatch;

-    UInt32 len = 
+    UInt32 len =

     #ifdef _HASH_CHAIN
     kNumHashDirectBytes;
     if (pb[maxLen] == cur[maxLen])
     #ifdef _HASH_CHAIN
     kNumHashDirectBytes;
     if (pb[maxLen] == cur[maxLen])


@@ -369,7 +369,7 @@ STDMETHODIMP CMatchFinder::Skip(UInt32 num)
   #ifdef _HASH_CHAIN
   if (_streamPos - _pos < kNumHashBytes)
   {
   #ifdef _HASH_CHAIN
   if (_streamPos - _pos < kNumHashBytes)
   {

-    RINOK(MovePos()); 
+    RINOK(MovePos());

     continue;
   }
   #else
     continue;
   }
   #else


@@ -425,18 +425,18 @@ STDMETHODIMP CMatchFinder::Skip(UInt32 num)
       *ptr0 = *ptr1 = kEmptyHashValue;
       break;
     }
       *ptr0 = *ptr1 = kEmptyHashValue;
       break;
     }

-    
+

     UInt32 delta = _pos - curMatch;
     UInt32 cyclicPos = (delta <= _cyclicBufferPos) ?
       (_cyclicBufferPos - delta):
       (_cyclicBufferPos - delta + _cyclicBufferSize);
     CIndex *pair = son + (cyclicPos << 1);
     UInt32 delta = _pos - curMatch;
     UInt32 cyclicPos = (delta <= _cyclicBufferPos) ?
       (_cyclicBufferPos - delta):
       (_cyclicBufferPos - delta + _cyclicBufferSize);
     CIndex *pair = son + (cyclicPos << 1);

-    
+

     // _mm_prefetch((const char *)pair, _MM_HINT_T0);
     // _mm_prefetch((const char *)pair, _MM_HINT_T0);

-    
+

     const Byte *pb = _buffer + curMatch;
     UInt32 len = MyMin(len0, len1);
     const Byte *pb = _buffer + curMatch;
     UInt32 len = MyMin(len0, len1);

-    
+

     if (pb[len] == cur[len])
     {
       while(++len != lenLimit)
     if (pb[len] == cur[len])
     {
       while(++len != lenLimit)


@@ -479,7 +479,7 @@ void CMatchFinder::Normalize()
 {
   UInt32 subValue = _pos - _cyclicBufferSize;
   CIndex *items = _hash;
 {
   UInt32 subValue = _pos - _cyclicBufferSize;
   CIndex *items = _hash;

-  UInt32 numItems = (_hashSizeSum + _cyclicBufferSize 
+  UInt32 numItems = (_hashSizeSum + _cyclicBufferSize

     #ifndef _HASH_CHAIN
      * 2
     #endif
     #ifndef _HASH_CHAIN
      * 2
     #endif


@@ -509,7 +509,7 @@ HRESULT CMatchFinder::MovePos()
 STDMETHODIMP_(Byte) CMatchFinder::GetIndexByte(Int32 index)
   { return CLZInWindow::GetIndexByte(index); }
 
 STDMETHODIMP_(Byte) CMatchFinder::GetIndexByte(Int32 index)
   { return CLZInWindow::GetIndexByte(index); }
 

-STDMETHODIMP_(UInt32) CMatchFinder::GetMatchLen(Int32 index, 
+STDMETHODIMP_(UInt32) CMatchFinder::GetMatchLen(Int32 index,

     UInt32 back, UInt32 limit)
   { return CLZInWindow::GetMatchLen(index, back, limit); }
 
     UInt32 back, UInt32 limit)
   { return CLZInWindow::GetMatchLen(index, back, limit); }
 


@@ -527,5 +527,5 @@ STDMETHODIMP_(void) CMatchFinder::ChangeBufferPos()
 
 #undef HASH_CALC
 #undef kNumHashDirectBytes
 
 #undef HASH_CALC
 #undef kNumHashDirectBytes

- 
+

 }
 }

diff --git a/util/cbfstool/lzma/C/7zip/Compress/LZ/IMatchFinder.h b/util/cbfstool/lzma/C/7zip/Compress/LZ/IMatchFinder.h
index 8b8480b2d2dde3db396f04844c6817042d9a1558..53b9c1ecc57b229264b713b8faa486359190a0ba 100644 (file)
--- a/util/cbfstool/lzma/C/7zip/Compress/LZ/IMatchFinder.h
+++ b/util/cbfstool/lzma/C/7zip/Compress/LZ/IMatchFinder.h
@@ -15,10 +15,10 @@ struct IInWindowStream: public IUnknown
   STDMETHOD_(Int32, NeedChangeBufferPos)(UInt32 numCheckBytes) PURE;
   STDMETHOD_(void, ChangeBufferPos)() PURE;
 };
   STDMETHOD_(Int32, NeedChangeBufferPos)(UInt32 numCheckBytes) PURE;
   STDMETHOD_(void, ChangeBufferPos)() PURE;
 };

- 
+

 struct IMatchFinder: public IInWindowStream
 {
 struct IMatchFinder: public IInWindowStream
 {

-  STDMETHOD(Create)(UInt32 historySize, UInt32 keepAddBufferBefore, 
+  STDMETHOD(Create)(UInt32 historySize, UInt32 keepAddBufferBefore,

       UInt32 matchMaxLen, UInt32 keepAddBufferAfter) PURE;
   STDMETHOD(GetMatches)(UInt32 *distances) PURE;
   STDMETHOD(Skip)(UInt32 num) PURE;
       UInt32 matchMaxLen, UInt32 keepAddBufferAfter) PURE;
   STDMETHOD(GetMatches)(UInt32 *distances) PURE;
   STDMETHOD(Skip)(UInt32 num) PURE;

diff --git a/util/cbfstool/lzma/C/7zip/Compress/LZ/LZInWindow.cpp b/util/cbfstool/lzma/C/7zip/Compress/LZ/LZInWindow.cpp
index 0e65c4254b35f63efa1bc69d6759a8d4f89d6657..c4d331e93336c0f6140f3b3414983aa6010684c8 100644 (file)
--- a/util/cbfstool/lzma/C/7zip/Compress/LZ/LZInWindow.cpp
+++ b/util/cbfstool/lzma/C/7zip/Compress/LZ/LZInWindow.cpp
@@ -62,8 +62,8 @@ void CLZInWindow::ReleaseStream()
 //     _streamPos >= _pos + _keepSizeAfter
 //     _posLimit = _streamPos - _keepSizeAfter;
 //   else
 //     _streamPos >= _pos + _keepSizeAfter
 //     _posLimit = _streamPos - _keepSizeAfter;
 //   else

-//          
-  
+//
+

 HRESULT CLZInWindow::ReadBlock()
 {
   if(_streamEndWasReached)
 HRESULT CLZInWindow::ReadBlock()
 {
   if(_streamEndWasReached)


@@ -98,7 +98,7 @@ void CLZInWindow::MoveBlock()
   UInt32 offset = (UInt32)(_buffer - _bufferBase) + _pos - _keepSizeBefore;
   // we need one additional byte, since MovePos moves on 1 byte.
   if (offset > 0)
   UInt32 offset = (UInt32)(_buffer - _bufferBase) + _pos - _keepSizeBefore;
   // we need one additional byte, since MovePos moves on 1 byte.
   if (offset > 0)

-    offset--; 
+    offset--;

   UInt32 numBytes = (UInt32)(_buffer - _bufferBase) + _streamPos -  offset;
   memmove(_bufferBase, _bufferBase + offset, numBytes);
   _buffer -= offset;
   UInt32 numBytes = (UInt32)(_buffer - _bufferBase) + _streamPos -  offset;
   memmove(_bufferBase, _bufferBase + offset, numBytes);
   _buffer -= offset;

diff --git a/util/cbfstool/lzma/C/7zip/Compress/LZ/LZInWindow.h b/util/cbfstool/lzma/C/7zip/Compress/LZ/LZInWindow.h
index 54f2cb7bbad266de48af5920d192070da18f22d2..670a5703780cb912c97d692e18a61472f16fb362 100644 (file)
--- a/util/cbfstool/lzma/C/7zip/Compress/LZ/LZInWindow.h
+++ b/util/cbfstool/lzma/C/7zip/Compress/LZ/LZInWindow.h
@@ -56,7 +56,7 @@ public:
   // index + limit have not to exceed _keepSizeAfter;
   // -2G <= index < 2G
   UInt32 GetMatchLen(Int32 index, UInt32 distance, UInt32 limit) const
   // index + limit have not to exceed _keepSizeAfter;
   // -2G <= index < 2G
   UInt32 GetMatchLen(Int32 index, UInt32 distance, UInt32 limit) const

-  {  
+  {

     if(_streamEndWasReached)
       if ((_pos + index) + limit > _streamPos)
         limit = _streamPos - (_pos + index);
     if(_streamEndWasReached)
       if ((_pos + index) + limit > _streamPos)
         limit = _streamPos - (_pos + index);

diff --git a/util/cbfstool/lzma/C/7zip/Compress/LZ/StdAfx.h b/util/cbfstool/lzma/C/7zip/Compress/LZ/StdAfx.h
index 3ff6d8a29f11eef685e081722c69beca969208ce..b637fd40075615837662becd3cd6d04fd100f230 100644 (file)
--- a/util/cbfstool/lzma/C/7zip/Compress/LZ/StdAfx.h
+++ b/util/cbfstool/lzma/C/7zip/Compress/LZ/StdAfx.h
@@ -3,4 +3,4 @@
 #ifndef __STDAFX_H
 #define __STDAFX_H
 
 #ifndef __STDAFX_H
 #define __STDAFX_H
 

-#endif 
+#endif

diff --git a/util/cbfstool/lzma/C/7zip/Compress/LZMA/LZMA.h b/util/cbfstool/lzma/C/7zip/Compress/LZMA/LZMA.h
index 7bc4c438af3c01e248965ea5612e83a83514f66b..e262aa2af2a04fb57bf07e2598074d270759ddc1 100644 (file)
--- a/util/cbfstool/lzma/C/7zip/Compress/LZMA/LZMA.h
+++ b/util/cbfstool/lzma/C/7zip/Compress/LZMA/LZMA.h
@@ -27,10 +27,10 @@ public:
   bool IsCharState() const { return Index < 7; }
 };
 
   bool IsCharState() const { return Index < 7; }
 };
 

-const int kNumPosSlotBits = 6; 
-const int kDicLogSizeMin = 0; 
-const int kDicLogSizeMax = 32; 
-const int kDistTableSizeMax = kDicLogSizeMax * 2; 
+const int kNumPosSlotBits = 6;
+const int kDicLogSizeMin = 0;
+const int kDicLogSizeMax = 32;
+const int kDistTableSizeMax = kDicLogSizeMax * 2;

 
 const UInt32 kNumLenToPosStates = 4;
 
 
 const UInt32 kNumLenToPosStates = 4;
 

diff --git a/util/cbfstool/lzma/C/7zip/Compress/LZMA/LZMAEncoder.cpp b/util/cbfstool/lzma/C/7zip/Compress/LZMA/LZMAEncoder.cpp
index 8d8f0a004c426c3144f57cc73e3251f4aa2ed6f3..1fff04aac8ea38f82d88222df7ee7360489cbe23 100644 (file)
--- a/util/cbfstool/lzma/C/7zip/Compress/LZMA/LZMAEncoder.cpp
+++ b/util/cbfstool/lzma/C/7zip/Compress/LZMA/LZMAEncoder.cpp
@@ -47,7 +47,7 @@ namespace NLZMA {
 const int kDefaultDictionaryLogSize = 22;
 const UInt32 kNumFastBytesDefault = 0x20;
 
 const int kDefaultDictionaryLogSize = 22;
 const UInt32 kNumFastBytesDefault = 0x20;
 

-enum 
+enum

 {
   kBT2,
   kBT3,
 {
   kBT2,
   kBT3,


@@ -55,7 +55,7 @@ enum
   kHC4
 };
 
   kHC4
 };
 

-static const wchar_t *kMatchFinderIDs[] = 
+static const wchar_t *kMatchFinderIDs[] =

 {
   L"BT2",
   L"BT3",
 {
   L"BT2",
   L"BT3",


@@ -90,7 +90,7 @@ void CLiteralEncoder2::Encode(NRangeCoder::CEncoder *rangeEncoder, Byte symbol)
 {
   UInt32 context = 1;
   int i = 8;
 {
   UInt32 context = 1;
   int i = 8;

-  do 
+  do

   {
     i--;
     UInt32 bit = (symbol >> i) & 1;
   {
     i--;
     UInt32 bit = (symbol >> i) & 1;


@@ -100,12 +100,12 @@ void CLiteralEncoder2::Encode(NRangeCoder::CEncoder *rangeEncoder, Byte symbol)
   while(i != 0);
 }
 
   while(i != 0);
 }
 

-void CLiteralEncoder2::EncodeMatched(NRangeCoder::CEncoder *rangeEncoder, 
+void CLiteralEncoder2::EncodeMatched(NRangeCoder::CEncoder *rangeEncoder,

     Byte matchByte, Byte symbol)
 {
   UInt32 context = 1;
   int i = 8;
     Byte matchByte, Byte symbol)
 {
   UInt32 context = 1;
   int i = 8;

-  do 
+  do

   {
     i--;
     UInt32 bit = (symbol >> i) & 1;
   {
     i--;
     UInt32 bit = (symbol >> i) & 1;


@@ -134,7 +134,7 @@ UInt32 CLiteralEncoder2::GetPrice(bool matchMode, Byte matchByte, Byte symbol) c
   int i = 8;
   if (matchMode)
   {
   int i = 8;
   if (matchMode)
   {

-    do 
+    do

     {
       i--;
       UInt32 matchBit = (matchByte >> i) & 1;
     {
       i--;
       UInt32 matchBit = (matchByte >> i) & 1;


@@ -277,7 +277,7 @@ HRESULT CEncoder::Create()
       }
       #endif
       #endif
       }
       #endif
       #endif

-      
+

       #ifdef COMPRESS_MF_HC
       case kHC4:
       {
       #ifdef COMPRESS_MF_HC
       case kHC4:
       {


@@ -304,7 +304,7 @@ HRESULT CEncoder::Create()
     }
     #endif
   }
     }
     #endif
   }

-  
+

   if (!_literalEncoder.Create(_numLiteralPosStateBits, _numLiteralContextBits))
     return E_OUTOFMEMORY;
 
   if (!_literalEncoder.Create(_numLiteralPosStateBits, _numLiteralContextBits))
     return E_OUTOFMEMORY;
 


@@ -342,7 +342,7 @@ static int FindMatchFinder(const wchar_t *s)
   return -1;
 }
 
   return -1;
 }
 

-STDMETHODIMP CEncoder::SetCoderProperties(const PROPID *propIDs, 
+STDMETHODIMP CEncoder::SetCoderProperties(const PROPID *propIDs,

     const PROPVARIANT *properties, UInt32 numProperties)
 {
   for (UInt32 i = 0; i < numProperties; i++)
     const PROPVARIANT *properties, UInt32 numProperties)
 {
   for (UInt32 i = 0; i < numProperties; i++)


@@ -372,7 +372,7 @@ STDMETHODIMP CEncoder::SetCoderProperties(const PROPID *propIDs,
         if (prop.vt != VT_UI4)
           return E_INVALIDARG;
         UInt32 maximize = prop.ulVal;
         if (prop.vt != VT_UI4)
           return E_INVALIDARG;
         UInt32 maximize = prop.ulVal;

-        _fastMode = (maximize == 0); 
+        _fastMode = (maximize == 0);

         // _maxMode = (maximize >= 2);
         break;
       }
         // _maxMode = (maximize >= 2);
         break;
       }


@@ -483,7 +483,7 @@ STDMETHODIMP CEncoder::SetCoderProperties(const PROPID *propIDs,
 }
 
 STDMETHODIMP CEncoder::WriteCoderProperties(ISequentialOutStream *outStream)
 }
 
 STDMETHODIMP CEncoder::WriteCoderProperties(ISequentialOutStream *outStream)

-{ 
+{

   const UInt32 kPropSize = 5;
   Byte properties[kPropSize];
   properties[0] = (_posStateBits * 5 + _numLiteralPosStateBits) * 9 + _numLiteralContextBits;
   const UInt32 kPropSize = 5;
   Byte properties[kPropSize];
   properties[0] = (_posStateBits * 5 + _numLiteralPosStateBits) * 9 + _numLiteralContextBits;


@@ -587,7 +587,7 @@ UInt32 CEncoder::Backward(UInt32 &backRes, UInt32 cur)
   while(cur != 0);
   backRes = _optimum[0].BackPrev;
   _optimumCurrentIndex  = _optimum[0].PosPrev;
   while(cur != 0);
   backRes = _optimum[0].BackPrev;
   _optimumCurrentIndex  = _optimum[0].PosPrev;

-  return _optimumCurrentIndex; 
+  return _optimumCurrentIndex;

 }
 
 /*
 }
 
 /*


@@ -606,7 +606,7 @@ HRESULT CEncoder::GetOptimum(UInt32 position, UInt32 &backRes, UInt32 &lenRes)
     return S_OK;
   }
   _optimumCurrentIndex = _optimumEndIndex = 0;
     return S_OK;
   }
   _optimumCurrentIndex = _optimumEndIndex = 0;

-  
+

   UInt32 lenMain, numDistancePairs;
   if (!_longestMatchWasFound)
   {
   UInt32 lenMain, numDistancePairs;
   if (!_longestMatchWasFound)
   {


@@ -644,7 +644,7 @@ HRESULT CEncoder::GetOptimum(UInt32 position, UInt32 &backRes, UInt32 &lenRes)
       continue;
     }
     UInt32 lenTest;
       continue;
     }
     UInt32 lenTest;

-    for (lenTest = 2; lenTest < numAvailableBytes && 
+    for (lenTest = 2; lenTest < numAvailableBytes &&

         data[lenTest] == data[(size_t)lenTest - backOffset]; lenTest++);
     repLens[i] = lenTest;
     if (lenTest > repLens[repMaxIndex])
         data[lenTest] == data[(size_t)lenTest - backOffset]; lenTest++);
     repLens[i] = lenTest;
     if (lenTest > repLens[repMaxIndex])


@@ -660,7 +660,7 @@ HRESULT CEncoder::GetOptimum(UInt32 position, UInt32 &backRes, UInt32 &lenRes)
   UInt32 *matchDistances = _matchDistances + 1;
   if(lenMain >= _numFastBytes)
   {
   UInt32 *matchDistances = _matchDistances + 1;
   if(lenMain >= _numFastBytes)
   {

-    backRes = matchDistances[numDistancePairs - 1] + kNumRepDistances; 
+    backRes = matchDistances[numDistancePairs - 1] + kNumRepDistances;

     lenRes = lenMain;
     return MovePos(lenMain - 1);
   }
     lenRes = lenMain;
     return MovePos(lenMain - 1);
   }


@@ -678,7 +678,7 @@ HRESULT CEncoder::GetOptimum(UInt32 position, UInt32 &backRes, UInt32 &lenRes)
 
   UInt32 posState = (position & _posStateMask);
 
 
   UInt32 posState = (position & _posStateMask);
 

-  _optimum[1].Price = _isMatch[_state.Index][posState].GetPrice0() + 
+  _optimum[1].Price = _isMatch[_state.Index][posState].GetPrice0() +

       _literalEncoder.GetSubCoder(position, _previousByte)->GetPrice(!_state.IsCharState(), matchByte, currentByte);
   _optimum[1].MakeAsChar();
 
       _literalEncoder.GetSubCoder(position, _previousByte)->GetPrice(!_state.IsCharState(), matchByte, currentByte);
   _optimum[1].MakeAsChar();
 


@@ -722,7 +722,7 @@ HRESULT CEncoder::GetOptimum(UInt32 position, UInt32 &backRes, UInt32 &lenRes)
     {
       UInt32 curAndLenPrice = price + _repMatchLenEncoder.GetPrice(repLen - 2, posState);
       COptimal &optimum = _optimum[repLen];
     {
       UInt32 curAndLenPrice = price + _repMatchLenEncoder.GetPrice(repLen - 2, posState);
       COptimal &optimum = _optimum[repLen];

-      if (curAndLenPrice < optimum.Price) 
+      if (curAndLenPrice < optimum.Price)

       {
         optimum.Price = curAndLenPrice;
         optimum.PosPrev = 0;
       {
         optimum.Price = curAndLenPrice;
         optimum.PosPrev = 0;


@@ -746,7 +746,7 @@ HRESULT CEncoder::GetOptimum(UInt32 position, UInt32 &backRes, UInt32 &lenRes)
       UInt32 distance = matchDistances[offs + 1];
       UInt32 curAndLenPrice = normalMatchPrice + GetPosLenPrice(distance, len, posState);
       COptimal &optimum = _optimum[len];
       UInt32 distance = matchDistances[offs + 1];
       UInt32 curAndLenPrice = normalMatchPrice + GetPosLenPrice(distance, len, posState);
       COptimal &optimum = _optimum[len];

-      if (curAndLenPrice < optimum.Price) 
+      if (curAndLenPrice < optimum.Price)

       {
         optimum.Price = curAndLenPrice;
         optimum.PosPrev = 0;
       {
         optimum.Price = curAndLenPrice;
         optimum.PosPrev = 0;


@@ -847,7 +847,7 @@ HRESULT CEncoder::GetOptimum(UInt32 position, UInt32 &backRes, UInt32 &lenRes)
     curOptimum.State = state;
     for(UInt32 i = 0; i < kNumRepDistances; i++)
       curOptimum.Backs[i] = reps[i];
     curOptimum.State = state;
     for(UInt32 i = 0; i < kNumRepDistances; i++)
       curOptimum.Backs[i] = reps[i];

-    UInt32 curPrice = curOptimum.Price; 
+    UInt32 curPrice = curOptimum.Price;

     const Byte *data = _matchFinder->GetPointerToCurrentPos() - 1;
     const Byte currentByte = *data;
     const Byte matchByte = data[(size_t)0 - reps[0] - 1];
     const Byte *data = _matchFinder->GetPointerToCurrentPos() - 1;
     const Byte currentByte = *data;
     const Byte matchByte = data[(size_t)0 - reps[0] - 1];


@@ -861,7 +861,7 @@ HRESULT CEncoder::GetOptimum(UInt32 position, UInt32 &backRes, UInt32 &lenRes)
     COptimal &nextOptimum = _optimum[cur + 1];
 
     bool nextIsChar = false;
     COptimal &nextOptimum = _optimum[cur + 1];
 
     bool nextIsChar = false;

-    if (curAnd1Price < nextOptimum.Price) 
+    if (curAnd1Price < nextOptimum.Price)

     {
       nextOptimum.Price = curAnd1Price;
       nextOptimum.PosPrev = cur;
     {
       nextOptimum.Price = curAnd1Price;
       nextOptimum.PosPrev = cur;


@@ -871,7 +871,7 @@ HRESULT CEncoder::GetOptimum(UInt32 position, UInt32 &backRes, UInt32 &lenRes)
 
     UInt32 matchPrice = curPrice + _isMatch[state.Index][posState].GetPrice1();
     UInt32 repMatchPrice = matchPrice + _isRep[state.Index].GetPrice1();
 
     UInt32 matchPrice = curPrice + _isMatch[state.Index][posState].GetPrice1();
     UInt32 repMatchPrice = matchPrice + _isRep[state.Index].GetPrice1();

-    
+

     if(matchByte == currentByte &&
         !(nextOptimum.PosPrev < cur && nextOptimum.BackPrev == 0))
     {
     if(matchByte == currentByte &&
         !(nextOptimum.PosPrev < cur && nextOptimum.BackPrev == 0))
     {


@@ -903,7 +903,7 @@ HRESULT CEncoder::GetOptimum(UInt32 position, UInt32 &backRes, UInt32 &lenRes)
       UInt32 backOffset = reps[0] + 1;
       UInt32 limit = MyMin(numAvailableBytesFull, _numFastBytes + 1);
       UInt32 temp;
       UInt32 backOffset = reps[0] + 1;
       UInt32 limit = MyMin(numAvailableBytesFull, _numFastBytes + 1);
       UInt32 temp;

-      for (temp = 1; temp < limit && 
+      for (temp = 1; temp < limit &&

           data[temp] == data[(size_t)temp - backOffset]; temp++);
       UInt32 lenTest2 = temp - 1;
       if (lenTest2 >= 2)
           data[temp] == data[(size_t)temp - backOffset]; temp++);
       UInt32 lenTest2 = temp - 1;
       if (lenTest2 >= 2)


@@ -911,7 +911,7 @@ HRESULT CEncoder::GetOptimum(UInt32 position, UInt32 &backRes, UInt32 &lenRes)
         CState state2 = state;
         state2.UpdateChar();
         UInt32 posStateNext = (position + 1) & _posStateMask;
         CState state2 = state;
         state2.UpdateChar();
         UInt32 posStateNext = (position + 1) & _posStateMask;

-        UInt32 nextRepMatchPrice = curAnd1Price + 
+        UInt32 nextRepMatchPrice = curAnd1Price +

             _isMatch[state2.Index][posStateNext].GetPrice1() +
             _isRep[state2.Index].GetPrice1();
         // for (; lenTest2 >= 2; lenTest2--)
             _isMatch[state2.Index][posStateNext].GetPrice1() +
             _isRep[state2.Index].GetPrice1();
         // for (; lenTest2 >= 2; lenTest2--)


@@ -922,7 +922,7 @@ HRESULT CEncoder::GetOptimum(UInt32 position, UInt32 &backRes, UInt32 &lenRes)
           UInt32 curAndLenPrice = nextRepMatchPrice + GetRepPrice(
               0, lenTest2, state2, posStateNext);
           COptimal &optimum = _optimum[offset];
           UInt32 curAndLenPrice = nextRepMatchPrice + GetRepPrice(
               0, lenTest2, state2, posStateNext);
           COptimal &optimum = _optimum[offset];

-          if (curAndLenPrice < optimum.Price) 
+          if (curAndLenPrice < optimum.Price)

           {
             optimum.Price = curAndLenPrice;
             optimum.PosPrev = cur + 1;
           {
             optimum.Price = curAndLenPrice;
             optimum.PosPrev = cur + 1;


@@ -933,8 +933,8 @@ HRESULT CEncoder::GetOptimum(UInt32 position, UInt32 &backRes, UInt32 &lenRes)
         }
       }
     }
         }
       }
     }

-    
-    UInt32 startLen = 2; // speed optimization 
+
+    UInt32 startLen = 2; // speed optimization

     for(UInt32 repIndex = 0; repIndex < kNumRepDistances; repIndex++)
     {
       // UInt32 repLen = _matchFinder->GetMatchLen(0 - 1, reps[repIndex], newLen); // test it;
     for(UInt32 repIndex = 0; repIndex < kNumRepDistances; repIndex++)
     {
       // UInt32 repLen = _matchFinder->GetMatchLen(0 - 1, reps[repIndex], newLen); // test it;


@@ -943,7 +943,7 @@ HRESULT CEncoder::GetOptimum(UInt32 position, UInt32 &backRes, UInt32 &lenRes)
           data[1] != data[(size_t)1 - backOffset])
         continue;
       UInt32 lenTest;
           data[1] != data[(size_t)1 - backOffset])
         continue;
       UInt32 lenTest;

-      for (lenTest = 2; lenTest < numAvailableBytes && 
+      for (lenTest = 2; lenTest < numAvailableBytes &&

           data[lenTest] == data[(size_t)lenTest - backOffset]; lenTest++);
       while(lenEnd < cur + lenTest)
         _optimum[++lenEnd].Price = kIfinityPrice;
           data[lenTest] == data[(size_t)lenTest - backOffset]; lenTest++);
       while(lenEnd < cur + lenTest)
         _optimum[++lenEnd].Price = kIfinityPrice;


@@ -953,7 +953,7 @@ HRESULT CEncoder::GetOptimum(UInt32 position, UInt32 &backRes, UInt32 &lenRes)
       {
         UInt32 curAndLenPrice = price + _repMatchLenEncoder.GetPrice(lenTest - 2, posState);
         COptimal &optimum = _optimum[cur + lenTest];
       {
         UInt32 curAndLenPrice = price + _repMatchLenEncoder.GetPrice(lenTest - 2, posState);
         COptimal &optimum = _optimum[cur + lenTest];

-        if (curAndLenPrice < optimum.Price) 
+        if (curAndLenPrice < optimum.Price)

         {
           optimum.Price = curAndLenPrice;
           optimum.PosPrev = cur;
         {
           optimum.Price = curAndLenPrice;
           optimum.PosPrev = cur;


@@ -963,15 +963,15 @@ HRESULT CEncoder::GetOptimum(UInt32 position, UInt32 &backRes, UInt32 &lenRes)
       }
       while(--lenTest >= 2);
       lenTest = lenTestTemp;
       }
       while(--lenTest >= 2);
       lenTest = lenTestTemp;

-      
+

       if (repIndex == 0)
         startLen = lenTest + 1;
       if (repIndex == 0)
         startLen = lenTest + 1;

-        
+

       // if (_maxMode)
         {
           UInt32 lenTest2 = lenTest + 1;
           UInt32 limit = MyMin(numAvailableBytesFull, lenTest2 + _numFastBytes);
       // if (_maxMode)
         {
           UInt32 lenTest2 = lenTest + 1;
           UInt32 limit = MyMin(numAvailableBytesFull, lenTest2 + _numFastBytes);

-          for (; lenTest2 < limit && 
+          for (; lenTest2 < limit &&

               data[lenTest2] == data[(size_t)lenTest2 - backOffset]; lenTest2++);
           lenTest2 -= lenTest + 1;
           if (lenTest2 >= 2)
               data[lenTest2] == data[(size_t)lenTest2 - backOffset]; lenTest2++);
           lenTest2 -= lenTest + 1;
           if (lenTest2 >= 2)


@@ -979,17 +979,17 @@ HRESULT CEncoder::GetOptimum(UInt32 position, UInt32 &backRes, UInt32 &lenRes)
             CState state2 = state;
             state2.UpdateRep();
             UInt32 posStateNext = (position + lenTest) & _posStateMask;
             CState state2 = state;
             state2.UpdateRep();
             UInt32 posStateNext = (position + lenTest) & _posStateMask;

-            UInt32 curAndLenCharPrice = 
-                price + _repMatchLenEncoder.GetPrice(lenTest - 2, posState) + 
+            UInt32 curAndLenCharPrice =
+                price + _repMatchLenEncoder.GetPrice(lenTest - 2, posState) +

                 _isMatch[state2.Index][posStateNext].GetPrice0() +
                 _literalEncoder.GetSubCoder(position + lenTest, data[(size_t)lenTest - 1])->GetPrice(
                 true, data[(size_t)lenTest - backOffset], data[lenTest]);
             state2.UpdateChar();
             posStateNext = (position + lenTest + 1) & _posStateMask;
                 _isMatch[state2.Index][posStateNext].GetPrice0() +
                 _literalEncoder.GetSubCoder(position + lenTest, data[(size_t)lenTest - 1])->GetPrice(
                 true, data[(size_t)lenTest - backOffset], data[lenTest]);
             state2.UpdateChar();
             posStateNext = (position + lenTest + 1) & _posStateMask;

-            UInt32 nextRepMatchPrice = curAndLenCharPrice + 
+            UInt32 nextRepMatchPrice = curAndLenCharPrice +

                 _isMatch[state2.Index][posStateNext].GetPrice1() +
                 _isRep[state2.Index].GetPrice1();
                 _isMatch[state2.Index][posStateNext].GetPrice1() +
                 _isRep[state2.Index].GetPrice1();

-            
+

             // for(; lenTest2 >= 2; lenTest2--)
             {
               UInt32 offset = cur + lenTest + 1 + lenTest2;
             // for(; lenTest2 >= 2; lenTest2--)
             {
               UInt32 offset = cur + lenTest + 1 + lenTest2;


@@ -998,7 +998,7 @@ HRESULT CEncoder::GetOptimum(UInt32 position, UInt32 &backRes, UInt32 &lenRes)
               UInt32 curAndLenPrice = nextRepMatchPrice + GetRepPrice(
                   0, lenTest2, state2, posStateNext);
               COptimal &optimum = _optimum[offset];
               UInt32 curAndLenPrice = nextRepMatchPrice + GetRepPrice(
                   0, lenTest2, state2, posStateNext);
               COptimal &optimum = _optimum[offset];

-              if (curAndLenPrice < optimum.Price) 
+              if (curAndLenPrice < optimum.Price)

               {
                 optimum.Price = curAndLenPrice;
                 optimum.PosPrev = cur + lenTest + 1;
               {
                 optimum.Price = curAndLenPrice;
                 optimum.PosPrev = cur + lenTest + 1;


@@ -1012,7 +1012,7 @@ HRESULT CEncoder::GetOptimum(UInt32 position, UInt32 &backRes, UInt32 &lenRes)
           }
         }
       }
           }
         }
       }

-    
+

     //    for(UInt32 lenTest = 2; lenTest <= newLen; lenTest++)
     if (newLen > numAvailableBytes)
     {
     //    for(UInt32 lenTest = 2; lenTest <= newLen; lenTest++)
     if (newLen > numAvailableBytes)
     {


@@ -1040,11 +1040,11 @@ HRESULT CEncoder::GetOptimum(UInt32 position, UInt32 &backRes, UInt32 &lenRes)
           curAndLenPrice += _distancesPrices[lenToPosState][curBack];
         else
           curAndLenPrice += _posSlotPrices[lenToPosState][posSlot] + _alignPrices[curBack & kAlignMask];
           curAndLenPrice += _distancesPrices[lenToPosState][curBack];
         else
           curAndLenPrice += _posSlotPrices[lenToPosState][posSlot] + _alignPrices[curBack & kAlignMask];

-  
+

         curAndLenPrice += _lenEncoder.GetPrice(lenTest - kMatchMinLen, posState);
         curAndLenPrice += _lenEncoder.GetPrice(lenTest - kMatchMinLen, posState);

-        
+

         COptimal &optimum = _optimum[cur + lenTest];
         COptimal &optimum = _optimum[cur + lenTest];

-        if (curAndLenPrice < optimum.Price) 
+        if (curAndLenPrice < optimum.Price)

         {
           optimum.Price = curAndLenPrice;
           optimum.PosPrev = cur;
         {
           optimum.Price = curAndLenPrice;
           optimum.PosPrev = cur;


@@ -1058,7 +1058,7 @@ HRESULT CEncoder::GetOptimum(UInt32 position, UInt32 &backRes, UInt32 &lenRes)
           UInt32 backOffset = curBack + 1;
           UInt32 lenTest2 = lenTest + 1;
           UInt32 limit = MyMin(numAvailableBytesFull, lenTest2 + _numFastBytes);
           UInt32 backOffset = curBack + 1;
           UInt32 lenTest2 = lenTest + 1;
           UInt32 limit = MyMin(numAvailableBytesFull, lenTest2 + _numFastBytes);

-          for (; lenTest2 < limit && 
+          for (; lenTest2 < limit &&

               data[lenTest2] == data[(size_t)lenTest2 - backOffset]; lenTest2++);
           lenTest2 -= lenTest + 1;
           if (lenTest2 >= 2)
               data[lenTest2] == data[(size_t)lenTest2 - backOffset]; lenTest2++);
           lenTest2 -= lenTest + 1;
           if (lenTest2 >= 2)


@@ -1066,16 +1066,16 @@ HRESULT CEncoder::GetOptimum(UInt32 position, UInt32 &backRes, UInt32 &lenRes)
             CState state2 = state;
             state2.UpdateMatch();
             UInt32 posStateNext = (position + lenTest) & _posStateMask;
             CState state2 = state;
             state2.UpdateMatch();
             UInt32 posStateNext = (position + lenTest) & _posStateMask;

-            UInt32 curAndLenCharPrice = curAndLenPrice + 
+            UInt32 curAndLenCharPrice = curAndLenPrice +

                 _isMatch[state2.Index][posStateNext].GetPrice0() +
                 _isMatch[state2.Index][posStateNext].GetPrice0() +

-                _literalEncoder.GetSubCoder(position + lenTest, data[(size_t)lenTest - 1])->GetPrice( 
+                _literalEncoder.GetSubCoder(position + lenTest, data[(size_t)lenTest - 1])->GetPrice(

                 true, data[(size_t)lenTest - backOffset], data[lenTest]);
             state2.UpdateChar();
             posStateNext = (posStateNext + 1) & _posStateMask;
                 true, data[(size_t)lenTest - backOffset], data[lenTest]);
             state2.UpdateChar();
             posStateNext = (posStateNext + 1) & _posStateMask;

-            UInt32 nextRepMatchPrice = curAndLenCharPrice + 
+            UInt32 nextRepMatchPrice = curAndLenCharPrice +

                 _isMatch[state2.Index][posStateNext].GetPrice1() +
                 _isRep[state2.Index].GetPrice1();
                 _isMatch[state2.Index][posStateNext].GetPrice1() +
                 _isRep[state2.Index].GetPrice1();

-            
+

             // for(; lenTest2 >= 2; lenTest2--)
             {
               UInt32 offset = cur + lenTest + 1 + lenTest2;
             // for(; lenTest2 >= 2; lenTest2--)
             {
               UInt32 offset = cur + lenTest + 1 + lenTest2;


@@ -1083,7 +1083,7 @@ HRESULT CEncoder::GetOptimum(UInt32 position, UInt32 &backRes, UInt32 &lenRes)
                 _optimum[++lenEnd].Price = kIfinityPrice;
               UInt32 curAndLenPrice = nextRepMatchPrice + GetRepPrice(0, lenTest2, state2, posStateNext);
               COptimal &optimum = _optimum[offset];
                 _optimum[++lenEnd].Price = kIfinityPrice;
               UInt32 curAndLenPrice = nextRepMatchPrice + GetRepPrice(0, lenTest2, state2, posStateNext);
               COptimal &optimum = _optimum[offset];

-              if (curAndLenPrice < optimum.Price) 
+              if (curAndLenPrice < optimum.Price)

               {
                 optimum.Price = curAndLenPrice;
                 optimum.PosPrev = cur + lenTest + 1;
               {
                 optimum.Price = curAndLenPrice;
                 optimum.PosPrev = cur + lenTest + 1;


@@ -1122,7 +1122,7 @@ HRESULT CEncoder::ReadMatchDistances(UInt32 &lenRes, UInt32 &numDistancePairs)
   {
     lenRes = _matchDistances[1 + numDistancePairs - 2];
     if (lenRes == _numFastBytes)
   {
     lenRes = _matchDistances[1 + numDistancePairs - 2];
     if (lenRes == _numFastBytes)

-      lenRes += _matchFinder->GetMatchLen(lenRes - 1, _matchDistances[1 + numDistancePairs - 1], 
+      lenRes += _matchFinder->GetMatchLen(lenRes - 1, _matchDistances[1 + numDistancePairs - 1],

           kMatchMaxLen - lenRes);
   }
   _additionalOffset++;
           kMatchMaxLen - lenRes);
   }
   _additionalOffset++;


@@ -1180,7 +1180,7 @@ HRESULT CEncoder::GetOptimumFast(UInt32 position, UInt32 &backRes, UInt32 &lenRe
   UInt32 *matchDistances = _matchDistances + 1;
   if(lenMain >= _numFastBytes)
   {
   UInt32 *matchDistances = _matchDistances + 1;
   if(lenMain >= _numFastBytes)
   {

-    backRes = matchDistances[numDistancePairs - 1] + kNumRepDistances; 
+    backRes = matchDistances[numDistancePairs - 1] + kNumRepDistances;

     lenRes = lenMain;
     return MovePos(lenMain - 1);
   }
     lenRes = lenMain;
     return MovePos(lenMain - 1);
   }


@@ -1203,7 +1203,7 @@ HRESULT CEncoder::GetOptimumFast(UInt32 position, UInt32 &backRes, UInt32 &lenRe
 
   if (repLens[repMaxIndex] >= 2)
   {
 
   if (repLens[repMaxIndex] >= 2)
   {

-    if (repLens[repMaxIndex] + 1 >= lenMain || 
+    if (repLens[repMaxIndex] + 1 >= lenMain ||

         repLens[repMaxIndex] + 2 >= lenMain && (backMain > (1 << 9)) ||
         repLens[repMaxIndex] + 3 >= lenMain && (backMain > (1 << 15)))
     {
         repLens[repMaxIndex] + 2 >= lenMain && (backMain > (1 << 9)) ||
         repLens[repMaxIndex] + 3 >= lenMain && (backMain > (1 << 15)))
     {


@@ -1212,14 +1212,14 @@ HRESULT CEncoder::GetOptimumFast(UInt32 position, UInt32 &backRes, UInt32 &lenRe
       return MovePos(lenRes - 1);
     }
   }
       return MovePos(lenRes - 1);
     }
   }

-  
+

   if (lenMain >= 2 && numAvailableBytes > 2)
   {
     RINOK(ReadMatchDistances(_longestMatchLength, _numDistancePairs));
     if (_longestMatchLength >= 2)
     {
       UInt32 newDistance = matchDistances[_numDistancePairs - 1];
   if (lenMain >= 2 && numAvailableBytes > 2)
   {
     RINOK(ReadMatchDistances(_longestMatchLength, _numDistancePairs));
     if (_longestMatchLength >= 2)
     {
       UInt32 newDistance = matchDistances[_numDistancePairs - 1];

-      if (_longestMatchLength >= lenMain && newDistance < backMain || 
+      if (_longestMatchLength >= lenMain && newDistance < backMain ||

           _longestMatchLength == lenMain + 1 && !ChangePair(backMain, newDistance) ||
           _longestMatchLength > lenMain + 1 ||
           _longestMatchLength + 1 >= lenMain && lenMain >= 3 && ChangePair(newDistance, backMain))
           _longestMatchLength == lenMain + 1 && !ChangePair(backMain, newDistance) ||
           _longestMatchLength > lenMain + 1 ||
           _longestMatchLength + 1 >= lenMain && lenMain >= 3 && ChangePair(newDistance, backMain))


@@ -1250,7 +1250,7 @@ HRESULT CEncoder::GetOptimumFast(UInt32 position, UInt32 &backRes, UInt32 &lenRe
         return S_OK;
       }
     }
         return S_OK;
       }
     }

-    backRes = backMain + kNumRepDistances; 
+    backRes = backMain + kNumRepDistances;

     lenRes = lenMain;
     return MovePos(lenMain - 2);
   }
     lenRes = lenMain;
     return MovePos(lenMain - 2);
   }


@@ -1269,7 +1269,7 @@ HRESULT CEncoder::Flush(UInt32 nowPos)
 
 void CEncoder::WriteEndMarker(UInt32 posState)
 {
 
 void CEncoder::WriteEndMarker(UInt32 posState)
 {

-  // This function for writing End Mark for stream version of LZMA. 
+  // This function for writing End Mark for stream version of LZMA.

   // In current version this feature is not used.
   if (!_writeEndMark)
     return;
   // In current version this feature is not used.
   if (!_writeEndMark)
     return;


@@ -1289,7 +1289,7 @@ void CEncoder::WriteEndMarker(UInt32 posState)
 }
 
 HRESULT CEncoder::CodeReal(ISequentialInStream *inStream,
 }
 
 HRESULT CEncoder::CodeReal(ISequentialInStream *inStream,

-      ISequentialOutStream *outStream, 
+      ISequentialOutStream *outStream,

       const UInt64 *inSize, const UInt64 *outSize,
       ICompressProgressInfo *progress)
 {
       const UInt64 *inSize, const UInt64 *outSize,
       ICompressProgressInfo *progress)
 {


@@ -1312,7 +1312,7 @@ HRESULT CEncoder::CodeReal(ISequentialInStream *inStream,
 }
 
 HRESULT CEncoder::SetStreams(ISequentialInStream *inStream,
 }
 
 HRESULT CEncoder::SetStreams(ISequentialInStream *inStream,

-      ISequentialOutStream *outStream, 
+      ISequentialOutStream *outStream,

       const UInt64 *inSize, const UInt64 *outSize)
 {
   _inStream = inStream;
       const UInt64 *inSize, const UInt64 *outSize)
 {
   _inStream = inStream;


@@ -1320,7 +1320,7 @@ HRESULT CEncoder::SetStreams(ISequentialInStream *inStream,
   RINOK(Create());
   RINOK(SetOutStream(outStream));
   RINOK(Init());
   RINOK(Create());
   RINOK(SetOutStream(outStream));
   RINOK(Init());

-  
+

   // CCoderReleaser releaser(this);
 
   /*
   // CCoderReleaser releaser(this);
 
   /*


@@ -1455,7 +1455,7 @@ HRESULT CEncoder::CodeOneBlock(UInt64 *inSize, UInt64 *outSize, Int32 *finished)
         pos -= kNumRepDistances;
         UInt32 posSlot = GetPosSlot(pos);
         _posSlotEncoder[GetLenToPosState(len)].Encode(&_rangeEncoder, posSlot);
         pos -= kNumRepDistances;
         UInt32 posSlot = GetPosSlot(pos);
         _posSlotEncoder[GetLenToPosState(len)].Encode(&_rangeEncoder, posSlot);

-        
+

         if (posSlot >= kStartPosModelIndex)
         {
           UInt32 footerBits = ((posSlot >> 1) - 1);
         if (posSlot >= kStartPosModelIndex)
         {
           UInt32 footerBits = ((posSlot >> 1) - 1);


@@ -1463,7 +1463,7 @@ HRESULT CEncoder::CodeOneBlock(UInt64 *inSize, UInt64 *outSize, Int32 *finished)
           UInt32 posReduced = pos - base;
 
           if (posSlot < kEndPosModelIndex)
           UInt32 posReduced = pos - base;
 
           if (posSlot < kEndPosModelIndex)

-            NRangeCoder::ReverseBitTreeEncode(_posEncoders + base - posSlot - 1, 
+            NRangeCoder::ReverseBitTreeEncode(_posEncoders + base - posSlot - 1,

                 &_rangeEncoder, footerBits, posReduced);
           else
           {
                 &_rangeEncoder, footerBits, posReduced);
           else
           {


@@ -1511,26 +1511,26 @@ STDMETHODIMP CEncoder::Code(ISequentialInStream *inStream,
     ICompressProgressInfo *progress)
 {
   #ifndef _NO_EXCEPTIONS
     ICompressProgressInfo *progress)
 {
   #ifndef _NO_EXCEPTIONS

-  try 
-  { 
+  try
+  {

   #endif
   #endif

-    return CodeReal(inStream, outStream, inSize, outSize, progress); 
+    return CodeReal(inStream, outStream, inSize, outSize, progress);

   #ifndef _NO_EXCEPTIONS
   }
   catch(const COutBufferException &e) { return e.ErrorCode; }
   catch(...) { return E_FAIL; }
   #endif
 }
   #ifndef _NO_EXCEPTIONS
   }
   catch(const COutBufferException &e) { return e.ErrorCode; }
   catch(...) { return E_FAIL; }
   #endif
 }

-  
+

 void CEncoder::FillDistancesPrices()
 {
   UInt32 tempPrices[kNumFullDistances];
   for (UInt32 i = kStartPosModelIndex; i < kNumFullDistances; i++)
 void CEncoder::FillDistancesPrices()
 {
   UInt32 tempPrices[kNumFullDistances];
   for (UInt32 i = kStartPosModelIndex; i < kNumFullDistances; i++)

-  { 
+  {

     UInt32 posSlot = GetPosSlot(i);
     UInt32 footerBits = ((posSlot >> 1) - 1);
     UInt32 base = ((2 | (posSlot & 1)) << footerBits);
     UInt32 posSlot = GetPosSlot(i);
     UInt32 footerBits = ((posSlot >> 1) - 1);
     UInt32 base = ((2 | (posSlot & 1)) << footerBits);

-    tempPrices[i] = NRangeCoder::ReverseBitTreeGetPrice(_posEncoders + 
+    tempPrices[i] = NRangeCoder::ReverseBitTreeGetPrice(_posEncoders +

       base - posSlot - 1, footerBits, i - base);
   }
 
       base - posSlot - 1, footerBits, i - base);
   }
 

diff --git a/util/cbfstool/lzma/C/7zip/Compress/LZMA/LZMAEncoder.h b/util/cbfstool/lzma/C/7zip/Compress/LZMA/LZMAEncoder.h
index f4c2c1513169a5f5047365032b96d2b55c189a52..2a41948495f5e96619d921ea8dd65b1657f26736 100644 (file)
--- a/util/cbfstool/lzma/C/7zip/Compress/LZMA/LZMAEncoder.h
+++ b/util/cbfstool/lzma/C/7zip/Compress/LZMA/LZMAEncoder.h
@@ -39,11 +39,11 @@ struct COptimal
   bool Prev2;
 
   UInt32 PosPrev2;
   bool Prev2;
 
   UInt32 PosPrev2;

-  UInt32 BackPrev2;     
+  UInt32 BackPrev2;

 
 

-  UInt32 Price;    
+  UInt32 Price;

   UInt32 PosPrev;         // posNext;
   UInt32 PosPrev;         // posNext;

-  UInt32 BackPrev;     
+  UInt32 BackPrev;

   UInt32 Backs[kNumRepDistances];
   void MakeAsChar() { BackPrev = UInt32(-1); Prev1IsChar = false; }
   void MakeAsShortRep() { BackPrev = 0; ; Prev1IsChar = false; }
   UInt32 Backs[kNumRepDistances];
   void MakeAsChar() { BackPrev = UInt32(-1); Prev1IsChar = false; }
   void MakeAsShortRep() { BackPrev = 0; ; Prev1IsChar = false; }


@@ -99,7 +99,7 @@ public:
   CLiteralEncoder(): _coders(0) {}
   ~CLiteralEncoder()  { Free(); }
   void Free()
   CLiteralEncoder(): _coders(0) {}
   ~CLiteralEncoder()  { Free(); }
   void Free()

-  { 
+  {

     MyFree(_coders);
     _coders = 0;
   }
     MyFree(_coders);
     _coders = 0;
   }


@@ -172,7 +172,7 @@ public:
 
 }
 
 
 }
 

-class CEncoder : 
+class CEncoder :

   public ICompressCoder,
   public ICompressSetOutStream,
   public ICompressSetCoderProperties,
   public ICompressCoder,
   public ICompressSetOutStream,
   public ICompressSetCoderProperties,


@@ -195,7 +195,7 @@ class CEncoder :
 
   CMyBitEncoder _posEncoders[kNumFullDistances - kEndPosModelIndex];
   NRangeCoder::CBitTreeEncoder<kNumMoveBits, kNumAlignBits> _posAlignEncoder;
 
   CMyBitEncoder _posEncoders[kNumFullDistances - kEndPosModelIndex];
   NRangeCoder::CBitTreeEncoder<kNumMoveBits, kNumAlignBits> _posAlignEncoder;

-  
+

   NLength::CPriceTableEncoder _lenEncoder;
   NLength::CPriceTableEncoder _repMatchLenEncoder;
 
   NLength::CPriceTableEncoder _lenEncoder;
   NLength::CPriceTableEncoder _repMatchLenEncoder;
 


@@ -206,7 +206,7 @@ class CEncoder :
   bool _fastMode;
   // bool _maxMode;
   UInt32 _numFastBytes;
   bool _fastMode;
   // bool _maxMode;
   UInt32 _numFastBytes;

-  UInt32 _longestMatchLength;    
+  UInt32 _longestMatchLength;

   UInt32 _numDistancePairs;
 
   UInt32 _additionalOffset;
   UInt32 _numDistancePairs;
 
   UInt32 _additionalOffset;


@@ -217,7 +217,7 @@ class CEncoder :
   bool _longestMatchWasFound;
 
   UInt32 _posSlotPrices[kNumLenToPosStates][kDistTableSizeMax];
   bool _longestMatchWasFound;
 
   UInt32 _posSlotPrices[kNumLenToPosStates][kDistTableSizeMax];

-  
+

   UInt32 _distancesPrices[kNumLenToPosStates][kNumFullDistances];
 
   UInt32 _alignPrices[kAlignTableSize];
   UInt32 _distancesPrices[kNumLenToPosStates][kNumFullDistances];
 
   UInt32 _alignPrices[kAlignTableSize];


@@ -257,7 +257,7 @@ class CEncoder :
     setMfPasses = 0;
     _matchFinder.Release();
   }
     setMfPasses = 0;
     _matchFinder.Release();
   }

-  
+

   HRESULT ReadMatchDistances(UInt32 &len, UInt32 &numDistancePairs);
 
   HRESULT MovePos(UInt32 num);
   HRESULT ReadMatchDistances(UInt32 &len, UInt32 &numDistancePairs);
 
   HRESULT MovePos(UInt32 num);


@@ -266,7 +266,7 @@ class CEncoder :
     return _isRepG0[state.Index].GetPrice0() +
         _isRep0Long[state.Index][posState].GetPrice0();
   }
     return _isRepG0[state.Index].GetPrice0() +
         _isRep0Long[state.Index][posState].GetPrice0();
   }

-  
+

   UInt32 GetPureRepPrice(UInt32 repIndex, CState state, UInt32 posState) const
   {
     UInt32 price;
   UInt32 GetPureRepPrice(UInt32 repIndex, CState state, UInt32 posState) const
   {
     UInt32 price;


@@ -307,7 +307,7 @@ class CEncoder :
     if (pos < kNumFullDistances)
       price = _distancesPrices[lenToPosState][pos];
     else
     if (pos < kNumFullDistances)
       price = _distancesPrices[lenToPosState][pos];
     else

-      price = _posSlotPrices[lenToPosState][GetPosSlot2(pos)] + 
+      price = _posSlotPrices[lenToPosState][GetPosSlot2(pos)] +

           _alignPrices[pos & kAlignMask];
     return price + _lenEncoder.GetPrice(len - kMatchMinLen, posState);
   }
           _alignPrices[pos & kAlignMask];
     return price + _lenEncoder.GetPrice(len - kMatchMinLen, posState);
   }


@@ -319,7 +319,7 @@ class CEncoder :
     if (pos < kNumFullDistances)
       price = _distancesPrices[lenToPosState][pos];
     else
     if (pos < kNumFullDistances)
       price = _distancesPrices[lenToPosState][pos];
     else

-      price = _posSlotPrices[lenToPosState][GetPosSlot2(pos)] + 
+      price = _posSlotPrices[lenToPosState][GetPosSlot2(pos)] +

           _alignPrices[pos & kAlignMask];
     return price + _lenEncoder.GetPrice(len - kMatchMinLen, posState);
   }
           _alignPrices[pos & kAlignMask];
     return price + _lenEncoder.GetPrice(len - kMatchMinLen, posState);
   }


@@ -330,7 +330,7 @@ class CEncoder :
 
   void FillDistancesPrices();
   void FillAlignPrices();
 
   void FillDistancesPrices();
   void FillAlignPrices();

-    
+

   void ReleaseMFStream()
   {
     if (_matchFinder && _needReleaseMFStream)
   void ReleaseMFStream()
   {
     if (_matchFinder && _needReleaseMFStream)


@@ -373,9 +373,9 @@ public:
       ICompressSetCoderProperties,
       ICompressWriteCoderProperties
       )
       ICompressSetCoderProperties,
       ICompressWriteCoderProperties
       )

-    
+

   HRESULT Init();
   HRESULT Init();

-  
+

   // ICompressCoder interface
   HRESULT SetStreams(ISequentialInStream *inStream,
       ISequentialOutStream *outStream,
   // ICompressCoder interface
   HRESULT SetStreams(ISequentialInStream *inStream,
       ISequentialOutStream *outStream,


@@ -383,20 +383,20 @@ public:
   HRESULT CodeOneBlock(UInt64 *inSize, UInt64 *outSize, Int32 *finished);
 
   HRESULT CodeReal(ISequentialInStream *inStream,
   HRESULT CodeOneBlock(UInt64 *inSize, UInt64 *outSize, Int32 *finished);
 
   HRESULT CodeReal(ISequentialInStream *inStream,

-      ISequentialOutStream *outStream, 
+      ISequentialOutStream *outStream,

       const UInt64 *inSize, const UInt64 *outSize,
       ICompressProgressInfo *progress);
 
   // ICompressCoder interface
   STDMETHOD(Code)(ISequentialInStream *inStream,
       const UInt64 *inSize, const UInt64 *outSize,
       ICompressProgressInfo *progress);
 
   // ICompressCoder interface
   STDMETHOD(Code)(ISequentialInStream *inStream,

-      ISequentialOutStream *outStream, 
+      ISequentialOutStream *outStream,

       const UInt64 *inSize, const UInt64 *outSize,
       ICompressProgressInfo *progress);
 
   // ICompressSetCoderProperties2
       const UInt64 *inSize, const UInt64 *outSize,
       ICompressProgressInfo *progress);
 
   // ICompressSetCoderProperties2

-  STDMETHOD(SetCoderProperties)(const PROPID *propIDs, 
+  STDMETHOD(SetCoderProperties)(const PROPID *propIDs,

       const PROPVARIANT *properties, UInt32 numProperties);
       const PROPVARIANT *properties, UInt32 numProperties);

-  
+

   // ICompressWriteCoderProperties
   STDMETHOD(WriteCoderProperties)(ISequentialOutStream *outStream);
 
   // ICompressWriteCoderProperties
   STDMETHOD(WriteCoderProperties)(ISequentialOutStream *outStream);
 

diff --git a/util/cbfstool/lzma/C/7zip/Compress/RangeCoder/RangeCoder.h b/util/cbfstool/lzma/C/7zip/Compress/RangeCoder/RangeCoder.h
index bbb2ba82d3c14bc54d0960ec69f53e8feb7af1ca..d77442be453db38b015deef920934a56bf80e7e7 100644 (file)
--- a/util/cbfstool/lzma/C/7zip/Compress/RangeCoder/RangeCoder.h
+++ b/util/cbfstool/lzma/C/7zip/Compress/RangeCoder/RangeCoder.h
@@ -34,7 +34,7 @@ public:
 
   void FlushData()
   {
 
   void FlushData()
   {

-    // Low += 1; 
+    // Low += 1;

     for(int i = 0; i < 5; i++)
       ShiftLow();
   }
     for(int i = 0; i < 5; i++)
       ShiftLow();
   }


@@ -56,7 +56,7 @@ public:
 
   void ShiftLow()
   {
 
   void ShiftLow()
   {

-    if ((UInt32)Low < (UInt32)0xFF000000 || (int)(Low >> 32) != 0) 
+    if ((UInt32)Low < (UInt32)0xFF000000 || (int)(Low >> 32) != 0)

     {
       Byte temp = _cache;
       do
     {
       Byte temp = _cache;
       do


@@ -65,12 +65,12 @@ public:
         temp = 0xFF;
       }
       while(--_cacheSize != 0);
         temp = 0xFF;
       }
       while(--_cacheSize != 0);

-      _cache = (Byte)((UInt32)Low >> 24);                      
-    } 
-    _cacheSize++;                               
-    Low = (UInt32)Low << 8;                           
+      _cache = (Byte)((UInt32)Low >> 24);
+    }
+    _cacheSize++;
+    Low = (UInt32)Low << 8;

   }
   }

-  
+

   void EncodeDirectBits(UInt32 value, int numTotalBits)
   {
     for (int i = numTotalBits - 1; i >= 0; i--)
   void EncodeDirectBits(UInt32 value, int numTotalBits)
   {
     for (int i = numTotalBits - 1; i >= 0; i--)


@@ -122,7 +122,7 @@ public:
       Range <<= 8;
     }
   }
       Range <<= 8;
     }
   }

-  
+

   void SetStream(ISequentialInStream *stream) { Stream.SetStream(stream); }
   void Init()
   {
   void SetStream(ISequentialInStream *stream) { Stream.SetStream(stream); }
   void Init()
   {


@@ -150,7 +150,7 @@ public:
   UInt32 DecodeDirectBits(int numTotalBits)
   {
     UInt32 range = Range;
   UInt32 DecodeDirectBits(int numTotalBits)
   {
     UInt32 range = Range;

-    UInt32 code = Code;        
+    UInt32 code = Code;

     UInt32 result = 0;
     for (int i = numTotalBits; i != 0; i--)
     {
     UInt32 result = 0;
     for (int i = numTotalBits; i != 0; i--)
     {


@@ -170,7 +170,7 @@ public:
       if (range < kTopValue)
       {
         code = (code << 8) | Stream.ReadByte();
       if (range < kTopValue)
       {
         code = (code << 8) | Stream.ReadByte();

-        range <<= 8; 
+        range <<= 8;

       }
     }
     Range = range;
       }
     }
     Range = range;

diff --git a/util/cbfstool/lzma/C/7zip/Compress/RangeCoder/RangeCoderBit.cpp b/util/cbfstool/lzma/C/7zip/Compress/RangeCoder/RangeCoderBit.cpp
index 8e4c4d3a9ef5c4c6f581788bf0eb08d5bf1e8152..6c1c78e14eb476bc3c6f0572bc77ef93e183e6f1 100644 (file)
--- a/util/cbfstool/lzma/C/7zip/Compress/RangeCoder/RangeCoderBit.cpp
+++ b/util/cbfstool/lzma/C/7zip/Compress/RangeCoder/RangeCoderBit.cpp
@@ -20,7 +20,7 @@ void CPriceTables::Init()
     UInt32 start = 1 << (kNumBits - i - 1);
     UInt32 end = 1 << (kNumBits - i);
     for (UInt32 j = start; j < end; j++)
     UInt32 start = 1 << (kNumBits - i - 1);
     UInt32 end = 1 << (kNumBits - i);
     for (UInt32 j = start; j < end; j++)

-      ProbPrices[j] = (i << kNumBitPriceShiftBits) + 
+      ProbPrices[j] = (i << kNumBitPriceShiftBits) +

           (((end - j) << kNumBitPriceShiftBits) >> (kNumBits - i - 1));
   }
 
           (((end - j) << kNumBitPriceShiftBits) >> (kNumBits - i - 1));
   }
 


@@ -29,7 +29,7 @@ void CPriceTables::Init()
   for(UInt32 i = 1; i < (kBitModelTotal >> kNumMoveReducingBits) - 1; i++)
     ProbPrices[i] = kBitPrice;
   */
   for(UInt32 i = 1; i < (kBitModelTotal >> kNumMoveReducingBits) - 1; i++)
     ProbPrices[i] = kBitPrice;
   */

-  
+

   /*
   const double kDummyMultMid = (1.0 / kBitPrice) / 2;
   const double kDummyMultMid = 0;
   /*
   const double kDummyMultMid = (1.0 / kBitPrice) / 2;
   const double kDummyMultMid = 0;


@@ -39,7 +39,7 @@ void CPriceTables::Init()
   for(UInt32 i = 1; i < (kBitModelTotal >> kNumMoveReducingBits) - 1; i++)
     ProbPrices[i] = UInt32((fabs(lnAll - log(double(i))) / ln2 + kDummyMultMid) * kBitPrice);
   */
   for(UInt32 i = 1; i < (kBitModelTotal >> kNumMoveReducingBits) - 1; i++)
     ProbPrices[i] = UInt32((fabs(lnAll - log(double(i))) / ln2 + kDummyMultMid) * kBitPrice);
   */

-  
+

   /*
   // experimental, slow, solution:
   for(UInt32 i = 1; i < (kBitModelTotal >> kNumMoveReducingBits) - 1; i++)
   /*
   // experimental, slow, solution:
   for(UInt32 i = 1; i < (kBitModelTotal >> kNumMoveReducingBits) - 1; i++)


@@ -70,7 +70,7 @@ void CPriceTables::Init()
         range -= (1 << 31);
       }
     }
         range -= (1 << 31);
       }
     }

-    ProbPrices[i] = (bitCount 
+    ProbPrices[i] = (bitCount

       // + (1 << (kCyclesBits - 1))
       ) >> kCyclesBits;
   }
       // + (1 << (kCyclesBits - 1))
       ) >> kCyclesBits;
   }

diff --git a/util/cbfstool/lzma/C/7zip/Compress/RangeCoder/RangeCoderBitTree.h b/util/cbfstool/lzma/C/7zip/Compress/RangeCoder/RangeCoderBitTree.h
index 4f0c78b49d8ee9dca4fbfbf5f29ed07bc9d19072..461e2f049ff3bd29a10ab761fc58934feba5efd4 100644 (file)
--- a/util/cbfstool/lzma/C/7zip/Compress/RangeCoder/RangeCoderBitTree.h
+++ b/util/cbfstool/lzma/C/7zip/Compress/RangeCoder/RangeCoderBitTree.h
@@ -108,7 +108,7 @@ public:
 };
 
 template <int numMoveBits>
 };
 
 template <int numMoveBits>

-void ReverseBitTreeEncode(CBitEncoder<numMoveBits> *Models, 
+void ReverseBitTreeEncode(CBitEncoder<numMoveBits> *Models,

     CEncoder *rangeEncoder, int NumBitLevels, UInt32 symbol)
 {
   UInt32 modelIndex = 1;
     CEncoder *rangeEncoder, int NumBitLevels, UInt32 symbol)
 {
   UInt32 modelIndex = 1;


@@ -122,7 +122,7 @@ void ReverseBitTreeEncode(CBitEncoder<numMoveBits> *Models,
 }
 
 template <int numMoveBits>
 }
 
 template <int numMoveBits>

-UInt32 ReverseBitTreeGetPrice(CBitEncoder<numMoveBits> *Models, 
+UInt32 ReverseBitTreeGetPrice(CBitEncoder<numMoveBits> *Models,

     UInt32 NumBitLevels, UInt32 symbol)
 {
   UInt32 price = 0;
     UInt32 NumBitLevels, UInt32 symbol)
 {
   UInt32 price = 0;


@@ -138,7 +138,7 @@ UInt32 ReverseBitTreeGetPrice(CBitEncoder<numMoveBits> *Models,
 }
 
 template <int numMoveBits>
 }
 
 template <int numMoveBits>

-UInt32 ReverseBitTreeDecode(CBitDecoder<numMoveBits> *Models, 
+UInt32 ReverseBitTreeDecode(CBitDecoder<numMoveBits> *Models,

     CDecoder *rangeDecoder, int NumBitLevels)
 {
   UInt32 modelIndex = 1;
     CDecoder *rangeDecoder, int NumBitLevels)
 {
   UInt32 modelIndex = 1;

diff --git a/util/cbfstool/lzma/C/7zip/Compress/RangeCoder/RangeCoderOpt.h b/util/cbfstool/lzma/C/7zip/Compress/RangeCoder/RangeCoderOpt.h
index 668b9a5b0aa055bba58b500dc9e9eed2acc47333..5779277635c21962347727a1dc5df452c04af8b6 100644 (file)
--- a/util/cbfstool/lzma/C/7zip/Compress/RangeCoder/RangeCoderOpt.h
+++ b/util/cbfstool/lzma/C/7zip/Compress/RangeCoder/RangeCoderOpt.h
@@ -5,7 +5,7 @@
 
 #define RC_INIT_VAR \
   UInt32 range = rangeDecoder->Range; \
 
 #define RC_INIT_VAR \
   UInt32 range = rangeDecoder->Range; \

-  UInt32 code = rangeDecoder->Code;        
+  UInt32 code = rangeDecoder->Code;

 
 #define RC_FLUSH_VAR \
   rangeDecoder->Range = range; \
 
 #define RC_FLUSH_VAR \
   rangeDecoder->Range = range; \

diff --git a/util/cbfstool/lzma/C/7zip/Decompress/LzmaDecode.c b/util/cbfstool/lzma/C/7zip/Decompress/LzmaDecode.c
index 21bf40bde0655a6ca133f3ca51b64864ae8202ff..83508436df170f48332996e1abcab7a1b42b1b67 100644 (file)
--- a/util/cbfstool/lzma/C/7zip/Decompress/LzmaDecode.c
+++ b/util/cbfstool/lzma/C/7zip/Decompress/LzmaDecode.c
@@ -1,21 +1,21 @@
 /*
   LzmaDecode.c
   LZMA Decoder (optimized for Speed version)
 /*
   LzmaDecode.c
   LZMA Decoder (optimized for Speed version)

-  
+

   LZMA SDK 4.22 Copyright (c) 1999-2005 Igor Pavlov (2005-06-10)
   http://www.7-zip.org/
 
   LZMA SDK is licensed under two licenses:
   1) GNU Lesser General Public License (GNU LGPL)
   2) Common Public License (CPL)
   LZMA SDK 4.22 Copyright (c) 1999-2005 Igor Pavlov (2005-06-10)
   http://www.7-zip.org/
 
   LZMA SDK is licensed under two licenses:
   1) GNU Lesser General Public License (GNU LGPL)
   2) Common Public License (CPL)

-  It means that you can select one of these two licenses and 
+  It means that you can select one of these two licenses and

   follow rules of that license.
 
   SPECIAL EXCEPTION:
   follow rules of that license.
 
   SPECIAL EXCEPTION:

-  Igor Pavlov, as the author of this Code, expressly permits you to 
-  statically or dynamically link your Code (or bind by name) to the 
-  interfaces of this file without subjecting your linked Code to the 
-  terms of the CPL or GNU LGPL. Any modifications or additions 
+  Igor Pavlov, as the author of this Code, expressly permits you to
+  statically or dynamically link your Code (or bind by name) to the
+  interfaces of this file without subjecting your linked Code to the
+  terms of the CPL or GNU LGPL. Any modifications or additions

   to this file, however, are subject to the LGPL or CPL terms.
 */
 
   to this file, however, are subject to the LGPL or CPL terms.
 */
 


@@ -50,7 +50,7 @@
 #define RC_TEST { if (Buffer == BufferLim) return LZMA_RESULT_DATA_ERROR; }
 
 #define RC_INIT(buffer, bufferSize) Buffer = buffer; BufferLim = buffer + bufferSize; RC_INIT2
 #define RC_TEST { if (Buffer == BufferLim) return LZMA_RESULT_DATA_ERROR; }
 
 #define RC_INIT(buffer, bufferSize) Buffer = buffer; BufferLim = buffer + bufferSize; RC_INIT2

- 
+

 #endif
 
 #define RC_NORMALIZE if (Range < kTopValue) { RC_TEST; Range <<= 8; Code = (Code << 8) | RC_READ_BYTE; }
 #endif
 
 #define RC_NORMALIZE if (Range < kTopValue) { RC_TEST; Range <<= 8; Code = (Code << 8) | RC_READ_BYTE; }


@@ -61,9 +61,9 @@
 
 #define RC_GET_BIT2(p, mi, A0, A1) IfBit0(p) \
   { UpdateBit0(p); mi <<= 1; A0; } else \
 
 #define RC_GET_BIT2(p, mi, A0, A1) IfBit0(p) \
   { UpdateBit0(p); mi <<= 1; A0; } else \

-  { UpdateBit1(p); mi = (mi + mi) + 1; A1; } 
-  
-#define RC_GET_BIT(p, mi) RC_GET_BIT2(p, mi, ; , ;)               
+  { UpdateBit1(p); mi = (mi + mi) + 1; A1; }
+
+#define RC_GET_BIT(p, mi) RC_GET_BIT2(p, mi, ; , ;)

 
 #define RangeDecoderBitTreeDecode(probs, numLevels, res) \
   { int i = numLevels; res = 1; \
 
 #define RangeDecoderBitTreeDecode(probs, numLevels, res) \
   { int i = numLevels; res = 1; \


@@ -86,7 +86,7 @@
 #define LenLow (LenChoice2 + 1)
 #define LenMid (LenLow + (kNumPosStatesMax << kLenNumLowBits))
 #define LenHigh (LenMid + (kNumPosStatesMax << kLenNumMidBits))
 #define LenLow (LenChoice2 + 1)
 #define LenMid (LenLow + (kNumPosStatesMax << kLenNumLowBits))
 #define LenHigh (LenMid + (kNumPosStatesMax << kLenNumMidBits))

-#define kNumLenProbs (LenHigh + kLenNumHighSymbols) 
+#define kNumLenProbs (LenHigh + kLenNumHighSymbols)

 
 
 #define kNumStates 12
 
 
 #define kNumStates 12


@@ -172,7 +172,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
   int lc = vs->Properties.lc;
 
   #ifdef _LZMA_OUT_READ
   int lc = vs->Properties.lc;
 
   #ifdef _LZMA_OUT_READ

-  
+

   UInt32 Range = vs->Range;
   UInt32 Code = vs->Code;
   #ifdef _LZMA_IN_CB
   UInt32 Range = vs->Range;
   UInt32 Code = vs->Code;
   #ifdef _LZMA_IN_CB


@@ -214,7 +214,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
       UInt32 numProbs = Literal + ((UInt32)LZMA_LIT_SIZE << (lc + vs->Properties.lp));
       UInt32 i;
       for (i = 0; i < numProbs; i++)
       UInt32 numProbs = Literal + ((UInt32)LZMA_LIT_SIZE << (lc + vs->Properties.lp));
       UInt32 i;
       for (i = 0; i < numProbs; i++)

-        p[i] = kBitModelTotal >> 1; 
+        p[i] = kBitModelTotal >> 1;

       rep0 = rep1 = rep2 = rep3 = 1;
       state = 0;
       globalPos = 0;
       rep0 = rep1 = rep2 = rep3 = 1;
       state = 0;
       globalPos = 0;


@@ -265,7 +265,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
     for (i = 0; i < numProbs; i++)
       p[i] = kBitModelTotal >> 1;
   }
     for (i = 0; i < numProbs; i++)
       p[i] = kBitModelTotal >> 1;
   }

-  
+

   #ifdef _LZMA_IN_CB
   RC_INIT;
   #else
   #ifdef _LZMA_IN_CB
   RC_INIT;
   #else


@@ -279,7 +279,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
     CProb *prob;
     UInt32 bound;
     int posState = (int)(
     CProb *prob;
     UInt32 bound;
     int posState = (int)(

-        (nowPos 
+        (nowPos

         #ifdef _LZMA_OUT_READ
         + globalPos
         #endif
         #ifdef _LZMA_OUT_READ
         + globalPos
         #endif


@@ -291,9 +291,9 @@ int LzmaDecode(CLzmaDecoderState *vs,
     {
       int symbol = 1;
       UpdateBit0(prob)
     {
       int symbol = 1;
       UpdateBit0(prob)

-      prob = p + Literal + (LZMA_LIT_SIZE * 
+      prob = p + Literal + (LZMA_LIT_SIZE *

         (((
         (((

-        (nowPos 
+        (nowPos

         #ifdef _LZMA_OUT_READ
         + globalPos
         #endif
         #ifdef _LZMA_OUT_READ
         + globalPos
         #endif


@@ -342,7 +342,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
       else if (state < 10) state -= 3;
       else state -= 6;
     }
       else if (state < 10) state -= 3;
       else state -= 6;
     }

-    else             
+    else

     {
       UpdateBit1(prob);
       prob = p + IsRep + state;
     {
       UpdateBit1(prob);
       prob = p + IsRep + state;


@@ -369,14 +369,14 @@ int LzmaDecode(CLzmaDecoderState *vs,
             UInt32 pos;
             #endif
             UpdateBit0(prob);
             UInt32 pos;
             #endif
             UpdateBit0(prob);

-            
+

             #ifdef _LZMA_OUT_READ
             if (distanceLimit == 0)
             #else
             if (nowPos == 0)
             #endif
               return LZMA_RESULT_DATA_ERROR;
             #ifdef _LZMA_OUT_READ
             if (distanceLimit == 0)
             #else
             if (nowPos == 0)
             #endif
               return LZMA_RESULT_DATA_ERROR;

-            
+

             state = state < kNumLitStates ? 9 : 11;
             #ifdef _LZMA_OUT_READ
             pos = dictionaryPos - rep0;
             state = state < kNumLitStates ? 9 : 11;
             #ifdef _LZMA_OUT_READ
             pos = dictionaryPos - rep0;


@@ -412,7 +412,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
             UpdateBit0(prob);
             distance = rep1;
           }
             UpdateBit0(prob);
             distance = rep1;
           }

-          else 
+          else

           {
             UpdateBit1(prob);
             prob = p + IsRepG2 + state;
           {
             UpdateBit1(prob);
             prob = p + IsRepG2 + state;


@@ -473,7 +473,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
         int posSlot;
         state += kNumLitStates;
         prob = p + PosSlot +
         int posSlot;
         state += kNumLitStates;
         prob = p + PosSlot +

-            ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) << 
+            ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) <<

             kNumPosSlotBits);
         RangeDecoderBitTreeDecode(prob, kNumPosSlotBits, posSlot);
         if (posSlot >= kStartPosModelIndex)
             kNumPosSlotBits);
         RangeDecoderBitTreeDecode(prob, kNumPosSlotBits, posSlot);
         if (posSlot >= kStartPosModelIndex)


@@ -528,7 +528,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
 
       len += kMatchMinLen;
       #ifdef _LZMA_OUT_READ
 
       len += kMatchMinLen;
       #ifdef _LZMA_OUT_READ

-      if (rep0 > distanceLimit) 
+      if (rep0 > distanceLimit)

       #else
       if (rep0 > nowPos)
       #endif
       #else
       if (rep0 > nowPos)
       #endif

diff --git a/util/cbfstool/lzma/C/7zip/Decompress/LzmaDecode.h b/util/cbfstool/lzma/C/7zip/Decompress/LzmaDecode.h
index 213062af12c34319ad900473b2186dfb097af23b..abc02d7edf3664429963d1b61e9d8879c70e9c72 100644 (file)
--- a/util/cbfstool/lzma/C/7zip/Decompress/LzmaDecode.h
+++ b/util/cbfstool/lzma/C/7zip/Decompress/LzmaDecode.h
@@ -1,4 +1,4 @@
-/* 
+/*

   LzmaDecode.h
   LZMA Decoder interface
 
   LzmaDecode.h
   LZMA Decoder interface
 


@@ -8,14 +8,14 @@
   LZMA SDK is licensed under two licenses:
   1) GNU Lesser General Public License (GNU LGPL)
   2) Common Public License (CPL)
   LZMA SDK is licensed under two licenses:
   1) GNU Lesser General Public License (GNU LGPL)
   2) Common Public License (CPL)

-  It means that you can select one of these two licenses and 
+  It means that you can select one of these two licenses and

   follow rules of that license.
 
   SPECIAL EXCEPTION:
   follow rules of that license.
 
   SPECIAL EXCEPTION:

-  Igor Pavlov, as the author of this code, expressly permits you to 
-  statically or dynamically link your code (or bind by name) to the 
-  interfaces of this file without subjecting your linked code to the 
-  terms of the CPL or GNU LGPL. Any modifications or additions 
+  Igor Pavlov, as the author of this code, expressly permits you to
+  statically or dynamically link your code (or bind by name) to the
+  interfaces of this file without subjecting your linked code to the
+  terms of the CPL or GNU LGPL. Any modifications or additions

   to this file, however, are subject to the LGPL or CPL terms.
 */
 
   to this file, however, are subject to the LGPL or CPL terms.
 */
 


@@ -29,7 +29,7 @@
 /* Use read function for output data */
 
 /* #define _LZMA_PROB32 */
 /* Use read function for output data */
 
 /* #define _LZMA_PROB32 */

-/* It can increase speed on some 32-bit CPUs, 
+/* It can increase speed on some 32-bit CPUs,

    but memory usage will be doubled in that case */
 
 /* #define _LZMA_LOC_OPT */
    but memory usage will be doubled in that case */
 
 /* #define _LZMA_LOC_OPT */

diff --git a/util/cbfstool/lzma/C/7zip/ICoder.h b/util/cbfstool/lzma/C/7zip/ICoder.h
index d84575dc45f16d20c5cff79d546b5726cf917c6e..3d1d8f01c99fa0ad114cc09aa3dc82e159ed6eaa 100644 (file)
--- a/util/cbfstool/lzma/C/7zip/ICoder.h
+++ b/util/cbfstool/lzma/C/7zip/ICoder.h
@@ -19,8 +19,8 @@ CODER_INTERFACE(ICompressProgressInfo, 0x04)
 CODER_INTERFACE(ICompressCoder, 0x05)
 {
   STDMETHOD(Code)(ISequentialInStream *inStream,
 CODER_INTERFACE(ICompressCoder, 0x05)
 {
   STDMETHOD(Code)(ISequentialInStream *inStream,

-      ISequentialOutStream *outStream, 
-      const UInt64 *inSize, 
+      ISequentialOutStream *outStream,
+      const UInt64 *inSize,

       const UInt64 *outSize,
       ICompressProgressInfo *progress) PURE;
 };
       const UInt64 *outSize,
       ICompressProgressInfo *progress) PURE;
 };


@@ -28,9 +28,9 @@ CODER_INTERFACE(ICompressCoder, 0x05)
 CODER_INTERFACE(ICompressCoder2, 0x18)
 {
   STDMETHOD(Code)(ISequentialInStream **inStreams,
 CODER_INTERFACE(ICompressCoder2, 0x18)
 {
   STDMETHOD(Code)(ISequentialInStream **inStreams,

-      const UInt64 **inSizes, 
+      const UInt64 **inSizes,

       UInt32 numInStreams,
       UInt32 numInStreams,

-      ISequentialOutStream **outStreams, 
+      ISequentialOutStream **outStreams,

       const UInt64 **outSizes,
       UInt32 numOutStreams,
       ICompressProgressInfo *progress) PURE;
       const UInt64 **outSizes,
       UInt32 numOutStreams,
       ICompressProgressInfo *progress) PURE;


@@ -49,7 +49,7 @@ namespace NCoderPropID
     kNumFastBytes = 0x450,
     kMatchFinder,
     kMatchFinderCycles,
     kNumFastBytes = 0x450,
     kMatchFinder,
     kMatchFinderCycles,

-    kNumPasses = 0x460, 
+    kNumPasses = 0x460,

     kAlgorithm = 0x470,
     kMultiThread = 0x480,
     kNumThreads,
     kAlgorithm = 0x470,
     kMultiThread = 0x480,
     kNumThreads,


@@ -59,7 +59,7 @@ namespace NCoderPropID
 
 CODER_INTERFACE(ICompressSetCoderProperties, 0x20)
 {
 
 CODER_INTERFACE(ICompressSetCoderProperties, 0x20)
 {

-  STDMETHOD(SetCoderProperties)(const PROPID *propIDs, 
+  STDMETHOD(SetCoderProperties)(const PROPID *propIDs,

       const PROPVARIANT *properties, UInt32 numProperties) PURE;
 };
 
       const PROPVARIANT *properties, UInt32 numProperties) PURE;
 };
 


@@ -124,7 +124,7 @@ CODER_INTERFACE(ICompressFilter, 0x40)
   // Filter return outSize (UInt32)
   // if (outSize <= size): Filter have converted outSize bytes
   // if (outSize > size): Filter have not converted anything.
   // Filter return outSize (UInt32)
   // if (outSize <= size): Filter have converted outSize bytes
   // if (outSize > size): Filter have not converted anything.

-  //      and it needs at least outSize bytes to convert one block 
+  //      and it needs at least outSize bytes to convert one block

   //      (it's for crypto block algorithms).
 };
 
   //      (it's for crypto block algorithms).
 };
 

diff --git a/util/cbfstool/lzma/C/7zip/IStream.h b/util/cbfstool/lzma/C/7zip/IStream.h
index bba21a31583bd74dbec86ddeb6f039d5ba3fd01b..b638efe4eccec9461e4f5a93f5c3641774995357 100644 (file)
--- a/util/cbfstool/lzma/C/7zip/IStream.h
+++ b/util/cbfstool/lzma/C/7zip/IStream.h
@@ -21,7 +21,7 @@ STREAM_INTERFACE(ISequentialInStream, 0x01)
   /*
   Out: if size != 0, return_value = S_OK and (*processedSize == 0),
     then there are no more bytes in stream.
   /*
   Out: if size != 0, return_value = S_OK and (*processedSize == 0),
     then there are no more bytes in stream.

-  if (size > 0) && there are bytes in stream, 
+  if (size > 0) && there are bytes in stream,

   this function must read at least 1 byte.
   This function is allowed to read less than number of remaining bytes in stream.
   You must call Read function in loop, if you need exact amount of data
   this function must read at least 1 byte.
   This function is allowed to read less than number of remaining bytes in stream.
   You must call Read function in loop, if you need exact amount of data

diff --git a/util/cbfstool/lzma/C/Common/Alloc.cpp b/util/cbfstool/lzma/C/Common/Alloc.cpp
index 6220a84f238b5bb093e0e9f1619f4717e0c8f4e3..bdba16d1d1e9bca2ad19a0dbb5f56fb4b5be521e 100644 (file)
--- a/util/cbfstool/lzma/C/Common/Alloc.cpp
+++ b/util/cbfstool/lzma/C/Common/Alloc.cpp
@@ -35,7 +35,7 @@ void MyFree(void *address) throw()
   if (address != 0)
     fprintf(stderr, "\nFree; count = %10d", --g_allocCount);
   #endif
   if (address != 0)
     fprintf(stderr, "\nFree; count = %10d", --g_allocCount);
   #endif

-  
+

   ::free(address);
 }
 
   ::free(address);
 }
 


@@ -62,7 +62,7 @@ void MidFree(void *address) throw()
   ::VirtualFree(address, 0, MEM_RELEASE);
 }
 
   ::VirtualFree(address, 0, MEM_RELEASE);
 }
 

-static SIZE_T g_LargePageSize = 
+static SIZE_T g_LargePageSize =

     #ifdef _WIN64
     (1 << 21);
     #else
     #ifdef _WIN64
     (1 << 21);
     #else


@@ -92,10 +92,10 @@ void *BigAlloc(size_t size) throw()
   #ifdef _SZ_ALLOC_DEBUG
   fprintf(stderr, "\nAlloc_Big %10d bytes;  count = %10d", size, g_allocCountBig++);
   #endif
   #ifdef _SZ_ALLOC_DEBUG
   fprintf(stderr, "\nAlloc_Big %10d bytes;  count = %10d", size, g_allocCountBig++);
   #endif

-  
+

   if (size >= (1 << 18))
   {
   if (size >= (1 << 18))
   {

-    void *res = ::VirtualAlloc(0, (size + g_LargePageSize - 1) & (~(g_LargePageSize - 1)), 
+    void *res = ::VirtualAlloc(0, (size + g_LargePageSize - 1) & (~(g_LargePageSize - 1)),

         MEM_COMMIT, PAGE_READWRITE);
     if (res != 0)
       return res;
         MEM_COMMIT, PAGE_READWRITE);
     if (res != 0)
       return res;


@@ -109,7 +109,7 @@ void BigFree(void *address) throw()
   if (address != 0)
     fprintf(stderr, "\nFree_Big; count = %10d", --g_allocCountBig);
   #endif
   if (address != 0)
     fprintf(stderr, "\nFree_Big; count = %10d", --g_allocCountBig);
   #endif

-  
+

   if (address == 0)
     return;
   ::VirtualFree(address, 0, MEM_RELEASE);
   if (address == 0)
     return;
   ::VirtualFree(address, 0, MEM_RELEASE);

diff --git a/util/cbfstool/lzma/C/Common/CRC.cpp b/util/cbfstool/lzma/C/Common/CRC.cpp
index 35e1a18751707b926324a82ce1f942514c7fec45..de5d561defcfe4cb3dd5da6775b643ba12877bb5 100644 (file)
--- a/util/cbfstool/lzma/C/Common/CRC.cpp
+++ b/util/cbfstool/lzma/C/Common/CRC.cpp
@@ -14,9 +14,9 @@ void CCRC::InitTable()
   {
     UInt32 r = i;
     for (int j = 0; j < 8; j++)
   {
     UInt32 r = i;
     for (int j = 0; j < 8; j++)

-      if (r & 1) 
+      if (r & 1)

         r = (r >> 1) ^ kCRCPoly;
         r = (r >> 1) ^ kCRCPoly;

-      else     
+      else

         r >>= 1;
     CCRC::Table[i] = r;
   }
         r >>= 1;
     CCRC::Table[i] = r;
   }

diff --git a/util/cbfstool/lzma/C/Common/CRC.h b/util/cbfstool/lzma/C/Common/CRC.h
index 6b4f1b796b6b105978e4db3c0bf13bd75f2f965f..f3279a5ef8ea9c53e751c3324521d44586f6a7cf 100644 (file)
--- a/util/cbfstool/lzma/C/Common/CRC.h
+++ b/util/cbfstool/lzma/C/Common/CRC.h
@@ -20,7 +20,7 @@ public:
   void UpdateUInt32(UInt32 v);
   void UpdateUInt64(UInt64 v);
   void Update(const void *data, size_t size);
   void UpdateUInt32(UInt32 v);
   void UpdateUInt64(UInt64 v);
   void Update(const void *data, size_t size);

-  UInt32 GetDigest() const { return _value ^ 0xFFFFFFFF; } 
+  UInt32 GetDigest() const { return _value ^ 0xFFFFFFFF; }

   static UInt32 CalculateDigest(const void *data, size_t size)
   {
     CCRC crc;
   static UInt32 CalculateDigest(const void *data, size_t size)
   {
     CCRC crc;

diff --git a/util/cbfstool/lzma/C/Common/MyCom.h b/util/cbfstool/lzma/C/Common/MyCom.h
index e903493013a15ec14dbdb1c24f44399021b764de..b8dbf38999d6ec8bd1c96ee781df1b3da1b6ff1d 100644 (file)
--- a/util/cbfstool/lzma/C/Common/MyCom.h
+++ b/util/cbfstool/lzma/C/Common/MyCom.h
@@ -26,11 +26,11 @@ public:
   // T& operator*() const {  return *_p; }
   T** operator&() { return &_p; }
   T* operator->() const { return _p; }
   // T& operator*() const {  return *_p; }
   T** operator&() { return &_p; }
   T* operator->() const { return _p; }

-  T* operator=(T* p) 
-  { 
+  T* operator=(T* p)
+  {

     if (p != 0)
       p->AddRef();
     if (p != 0)
       p->AddRef();

-    if (_p) 
+    if (_p)

       _p->Release();
     _p = p;
     return p;
       _p->Release();
     _p = p;
     return p;


@@ -114,8 +114,8 @@ public:
   unsigned int Length() const { return ::SysStringLen(m_str); }
   operator BSTR() const { return m_str; }
   BSTR* operator&() { return &m_str; }
   unsigned int Length() const { return ::SysStringLen(m_str); }
   operator BSTR() const { return m_str; }
   BSTR* operator&() { return &m_str; }

-  BSTR MyCopy() const 
-  { 
+  BSTR MyCopy() const
+  {

     int byteLen = ::SysStringByteLen(m_str);
     BSTR res = ::SysAllocStringByteLen(NULL, byteLen);
     memmove(res, m_str, byteLen);
     int byteLen = ::SysStringByteLen(m_str);
     BSTR res = ::SysAllocStringByteLen(NULL, byteLen);
     memmove(res, m_str, byteLen);


@@ -147,7 +147,7 @@ public:
 };
 
 #define MY_QUERYINTERFACE_BEGIN STDMETHOD(QueryInterface) \
 };
 
 #define MY_QUERYINTERFACE_BEGIN STDMETHOD(QueryInterface) \

-    (REFGUID iid, void **outObject) { 
+    (REFGUID iid, void **outObject) {

 
 #define MY_QUERYINTERFACE_ENTRY(i) if (iid == IID_ ## i) \
     { *outObject = (void *)(i *)this; AddRef(); return S_OK; }
 
 #define MY_QUERYINTERFACE_ENTRY(i) if (iid == IID_ ## i) \
     { *outObject = (void *)(i *)this; AddRef(); return S_OK; }

diff --git a/util/cbfstool/lzma/C/Common/MyGuidDef.h b/util/cbfstool/lzma/C/Common/MyGuidDef.h
index a7f8118ec9d46fa53e39a4fc042465fc29eaba41..7de64333cbc54b78eb3de22a3e774bc1dfafe811 100644 (file)
--- a/util/cbfstool/lzma/C/Common/MyGuidDef.h
+++ b/util/cbfstool/lzma/C/Common/MyGuidDef.h
@@ -23,7 +23,7 @@ typedef struct {
 
 #ifdef __cplusplus
 inline bool operator==(REFGUID g1, REFGUID g2)
 
 #ifdef __cplusplus
 inline bool operator==(REFGUID g1, REFGUID g2)

-{ 
+{

   for (int i = 0; i < (int)sizeof(g1); i++)
     if (((const unsigned char *)&g1)[i] != ((const unsigned char *)&g2)[i])
       return false;
   for (int i = 0; i < (int)sizeof(g1); i++)
     if (((const unsigned char *)&g1)[i] != ((const unsigned char *)&g2)[i])
       return false;

diff --git a/util/cbfstool/lzma/C/Common/MyUnknown.h b/util/cbfstool/lzma/C/Common/MyUnknown.h
index d28d8542563d5f76f9710208b6afb0a22e2c8910..052c284f41c308c6e0e1cd189dcf8ca41d894ed5 100644 (file)
--- a/util/cbfstool/lzma/C/Common/MyUnknown.h
+++ b/util/cbfstool/lzma/C/Common/MyUnknown.h
@@ -9,7 +9,7 @@
 #if (_WIN32_WCE > 300)
 #include <basetyps.h>
 #else
 #if (_WIN32_WCE > 300)
 #include <basetyps.h>
 #else

-#define MIDL_INTERFACE(x) struct 
+#define MIDL_INTERFACE(x) struct

 #endif
 #else
 #include <basetyps.h>
 #endif
 #else
 #include <basetyps.h>


@@ -17,8 +17,8 @@
 
 #include <unknwn.h>
 
 
 #include <unknwn.h>
 

-#else 
+#else

 #include "MyWindows.h"
 #endif
 #include "MyWindows.h"
 #endif

-  
+

 #endif
 #endif

diff --git a/util/cbfstool/lzma/C/Common/MyWindows.h b/util/cbfstool/lzma/C/Common/MyWindows.h
index 0212fa77a30d294608966b299ab932f1c771a763..e564c024ad5000edc5d2f8818b40ddcd545ef425 100644 (file)
--- a/util/cbfstool/lzma/C/Common/MyWindows.h
+++ b/util/cbfstool/lzma/C/Common/MyWindows.h
@@ -85,9 +85,9 @@ typedef LONG SCODE;
 #define E_INVALIDARG ((HRESULT)0x80070057L)
 
 #ifdef _MSC_VER
 #define E_INVALIDARG ((HRESULT)0x80070057L)
 
 #ifdef _MSC_VER

-#define STDMETHODCALLTYPE __stdcall 
+#define STDMETHODCALLTYPE __stdcall

 #else
 #else

-#define STDMETHODCALLTYPE 
+#define STDMETHODCALLTYPE

 #endif
 
 #define STDMETHOD_(t, f) virtual t STDMETHODCALLTYPE f
 #endif
 
 #define STDMETHOD_(t, f) virtual t STDMETHODCALLTYPE f


@@ -97,7 +97,7 @@ typedef LONG SCODE;
 
 #define PURE = 0
 
 
 #define PURE = 0
 

-#define MIDL_INTERFACE(x) struct 
+#define MIDL_INTERFACE(x) struct

 
 struct IUnknown
 {
 
 struct IUnknown
 {


@@ -113,7 +113,7 @@ typedef IUnknown *LPUNKNOWN;
 #define VARIANT_FALSE ((VARIANT_BOOL)0)
 
 enum VARENUM
 #define VARIANT_FALSE ((VARIANT_BOOL)0)
 
 enum VARENUM

-{      
+{

   VT_EMPTY     = 0,
        VT_NULL = 1,
        VT_I2   = 2,
   VT_EMPTY     = 0,
        VT_NULL = 1,
        VT_I2   = 2,


@@ -153,7 +153,7 @@ typedef struct tagPROPVARIANT
   PROPVAR_PAD1 wReserved1;
   PROPVAR_PAD2 wReserved2;
   PROPVAR_PAD3 wReserved3;
   PROPVAR_PAD1 wReserved1;
   PROPVAR_PAD2 wReserved2;
   PROPVAR_PAD3 wReserved3;

-  union 
+  union

   {
     CHAR cVal;
     UCHAR bVal;
   {
     CHAR cVal;
     UCHAR bVal;


@@ -191,7 +191,7 @@ MY_EXTERN_C LONG CompareFileTime(const FILETIME* ft1, const FILETIME* ft2);
 #define CP_OEMCP  1
 
 typedef enum tagSTREAM_SEEK
 #define CP_OEMCP  1
 
 typedef enum tagSTREAM_SEEK

-{      
+{

   STREAM_SEEK_SET      = 0,
   STREAM_SEEK_CUR      = 1,
   STREAM_SEEK_END      = 2
   STREAM_SEEK_SET      = 0,
   STREAM_SEEK_CUR      = 1,
   STREAM_SEEK_END      = 2

diff --git a/util/cbfstool/lzma/C/Common/NewHandler.h b/util/cbfstool/lzma/C/Common/NewHandler.h
index 0619fc69e56b651f8e240572942385a3f3bacf4b..215ba05f103ea5d63eb4444e82b0c80eb99ac0e3 100644 (file)
--- a/util/cbfstool/lzma/C/Common/NewHandler.h
+++ b/util/cbfstool/lzma/C/Common/NewHandler.h
@@ -6,11 +6,11 @@
 class CNewException {};
 
 #ifdef _WIN32
 class CNewException {};
 
 #ifdef _WIN32

-void 
+void

 #ifdef _MSC_VER
 #ifdef _MSC_VER

-__cdecl 
+__cdecl

 #endif
 operator delete(void *p) throw();
 #endif
 operator delete(void *p) throw();

-#endif 
+#endif

 
 

-#endif 
+#endif

diff --git a/util/cbfstool/lzma/C/Common/StdAfx.h b/util/cbfstool/lzma/C/Common/StdAfx.h
index 681ee9356e8fadc216f9074eea584ccfeddb3e29..b8ba1d5c4c90c41794f5ad0898914fb0b8cd7368 100644 (file)
--- a/util/cbfstool/lzma/C/Common/StdAfx.h
+++ b/util/cbfstool/lzma/C/Common/StdAfx.h
@@ -6,4 +6,4 @@
 // #include "MyWindows.h"
 #include "NewHandler.h"
 
 // #include "MyWindows.h"
 #include "NewHandler.h"
 

-#endif 
+#endif

diff --git a/util/cbfstool/lzma/C/LGPL.txt b/util/cbfstool/lzma/C/LGPL.txt
index 60db6f46a4bc7e9f8a83844532c1a9cc07e7f8d0..1a71fd04a0453169f6ded2422fa04a667a52e350 100644 (file)
--- a/util/cbfstool/lzma/C/LGPL.txt
+++ b/util/cbfstool/lzma/C/LGPL.txt
@@ -146,7 +146,7 @@ such a program is covered only if its contents constitute a work based
 on the Library (independent of the use of the Library in a tool for
 writing it).  Whether that is true depends on what the Library does
 and what the program that uses the Library does.
 on the Library (independent of the use of the Library in a tool for
 writing it).  Whether that is true depends on what the Library does
 and what the program that uses the Library does.

-  
+

   1. You may copy and distribute verbatim copies of the Library's
 complete source code as you receive it, in any medium, provided that
 you conspicuously and appropriately publish on each copy an
   1. You may copy and distribute verbatim copies of the Library's
 complete source code as you receive it, in any medium, provided that
 you conspicuously and appropriately publish on each copy an

diff --git a/util/cbfstool/lzma/minilzma.cc b/util/cbfstool/lzma/minilzma.cc
index 5437b59946fb14457f20482f618ce08fba6b615b..2625cb50836ccd9125c67a0452927edc0be5b65d 100644 (file)
--- a/util/cbfstool/lzma/minilzma.cc
+++ b/util/cbfstool/lzma/minilzma.cc
@@ -89,7 +89,7 @@ static UInt32 SelectDictionarySizeFor(unsigned datasize)
     if(datasize <= 512) return 512;
     if(datasize <= 1024) return 1024;
     if(datasize <= 4096) return 4096;
     if(datasize <= 512) return 512;
     if(datasize <= 1024) return 1024;
     if(datasize <= 4096) return 4096;

-    if(datasize <= 16384) return 32768; 
+    if(datasize <= 16384) return 32768;

     if(datasize <= 65536) return 528288;
     if(datasize <= 528288) return 1048576*4;
     if(datasize <= 786432) reutrn 1048576*16;
     if(datasize <= 65536) return 528288;
     if(datasize <= 528288) return 1048576*4;
     if(datasize <= 786432) reutrn 1048576*16;


@@ -105,12 +105,12 @@ class CInStreamRam: public ISequentialInStream, public CMyUnknownImp
     size_t Pos;
 public:
     MY_UNKNOWN_IMP
     size_t Pos;
 public:
     MY_UNKNOWN_IMP

-  
+

     CInStreamRam(const std::vector<unsigned char>& buf) : input(buf), Pos(0)
     {
     }
     virtual ~CInStreamRam() {}
     CInStreamRam(const std::vector<unsigned char>& buf) : input(buf), Pos(0)
     {
     }
     virtual ~CInStreamRam() {}

-  
+

     STDMETHOD(Read)(void *data, UInt32 size, UInt32 *processedSize);
 };
 
     STDMETHOD(Read)(void *data, UInt32 size, UInt32 *processedSize);
 };
 


@@ -118,12 +118,12 @@ STDMETHODIMP CInStreamRam::Read(void *data, UInt32 size, UInt32 *processedSize)
 {
     UInt32 remain = input.size() - Pos;
     if (size > remain) size = remain;
 {
     UInt32 remain = input.size() - Pos;
     if (size > remain) size = remain;

-  
+

     std::memcpy(data, &input[Pos], size);
     Pos += size;
     std::memcpy(data, &input[Pos], size);
     Pos += size;

-    
+

     if(processedSize != NULL) *processedSize = size;
     if(processedSize != NULL) *processedSize = size;

-    
+

     return S_OK;
 }
 
     return S_OK;
 }
 


@@ -133,27 +133,27 @@ class COutStreamRam: public ISequentialOutStream, public CMyUnknownImp
     size_t Pos;
 public:
     MY_UNKNOWN_IMP
     size_t Pos;
 public:
     MY_UNKNOWN_IMP

-    
+

     COutStreamRam(): result(), Pos(0) { }
     virtual ~COutStreamRam() { }
     COutStreamRam(): result(), Pos(0) { }
     virtual ~COutStreamRam() { }

-    
+

     void Reserve(unsigned n) { result.reserve(n); }
     const std::vector<Byte>& Get() const { return result; }
     void Reserve(unsigned n) { result.reserve(n); }
     const std::vector<Byte>& Get() const { return result; }

-  
+

     HRESULT WriteByte(Byte b)
     {
         if(Pos >= result.size()) result.resize(Pos+1);
         result[Pos++] = b;
         return S_OK;
     }
     HRESULT WriteByte(Byte b)
     {
         if(Pos >= result.size()) result.resize(Pos+1);
         result[Pos++] = b;
         return S_OK;
     }

-  
+

     STDMETHOD(Write)(const void *data, UInt32 size, UInt32 *processedSize);
 };
 
 STDMETHODIMP COutStreamRam::Write(const void *data, UInt32 size, UInt32 *processedSize)
 {
     if(Pos+size > result.size()) result.resize(Pos+size);
     STDMETHOD(Write)(const void *data, UInt32 size, UInt32 *processedSize);
 };
 
 STDMETHODIMP COutStreamRam::Write(const void *data, UInt32 size, UInt32 *processedSize)
 {
     if(Pos+size > result.size()) result.resize(Pos+size);

-    
+

     std::memcpy(&result[Pos], data, size);
     if(processedSize != NULL) *processedSize = size;
     Pos += size;
     std::memcpy(&result[Pos], data, size);
     if(processedSize != NULL) *processedSize = size;
     Pos += size;


@@ -163,15 +163,15 @@ STDMETHODIMP COutStreamRam::Write(const void *data, UInt32 size, UInt32 *process
 const std::vector<unsigned char> LZMACompress(const std::vector<unsigned char>& buf)
 {
     if(buf.empty()) return buf;
 const std::vector<unsigned char> LZMACompress(const std::vector<unsigned char>& buf)
 {
     if(buf.empty()) return buf;

-    
+

     const UInt32 dictionarysize = SelectDictionarySizeFor(buf.size());
     const UInt32 dictionarysize = SelectDictionarySizeFor(buf.size());

-    
+

     NCompress::NLZMA::CEncoder *encoderSpec = new NCompress::NLZMA::CEncoder;
     CMyComPtr<ICompressCoder> encoder = encoderSpec;
     NCompress::NLZMA::CEncoder *encoderSpec = new NCompress::NLZMA::CEncoder;
     CMyComPtr<ICompressCoder> encoder = encoderSpec;

-    const PROPID propIDs[] = 
+    const PROPID propIDs[] =

     {
         NCoderPropID::kAlgorithm,
     {
         NCoderPropID::kAlgorithm,

-        NCoderPropID::kDictionarySize,  
+        NCoderPropID::kDictionarySize,

         NCoderPropID::kNumFastBytes,
     };
     const unsigned kNumProps = sizeof(propIDs) / sizeof(propIDs[0]);
         NCoderPropID::kNumFastBytes,
     };
     const unsigned kNumProps = sizeof(propIDs) / sizeof(propIDs[0]);


@@ -185,16 +185,16 @@ const std::vector<unsigned char> LZMACompress(const std::vector<unsigned char>&
     Error:
         return std::vector<unsigned char> ();
     }
     Error:
         return std::vector<unsigned char> ();
     }

-    
+

     COutStreamRam *const outStreamSpec = new COutStreamRam;
     CMyComPtr<ISequentialOutStream> outStream = outStreamSpec;
     CInStreamRam *const inStreamSpec = new CInStreamRam(buf);
     CMyComPtr<ISequentialInStream> inStream = inStreamSpec;
     COutStreamRam *const outStreamSpec = new COutStreamRam;
     CMyComPtr<ISequentialOutStream> outStream = outStreamSpec;
     CInStreamRam *const inStreamSpec = new CInStreamRam(buf);
     CMyComPtr<ISequentialInStream> inStream = inStreamSpec;

-    
+

     outStreamSpec->Reserve(buf.size());
 
     if (encoderSpec->WriteCoderProperties(outStream) != S_OK) goto Error;
     outStreamSpec->Reserve(buf.size());
 
     if (encoderSpec->WriteCoderProperties(outStream) != S_OK) goto Error;

-    
+

     for (unsigned i = 0; i < 8; i++)
     {
         UInt64 t = (UInt64)buf.size();
     for (unsigned i = 0; i < 8; i++)
     {
         UInt64 t = (UInt64)buf.size();


@@ -203,7 +203,7 @@ const std::vector<unsigned char> LZMACompress(const std::vector<unsigned char>&
 
     HRESULT lzmaResult = encoder->Code(inStream, outStream, 0, 0, 0);
     if (lzmaResult != S_OK) goto Error;
 
     HRESULT lzmaResult = encoder->Code(inStream, outStream, 0, 0, 0);
     if (lzmaResult != S_OK) goto Error;

-    
+

     return outStreamSpec->Get();
 }
 
     return outStreamSpec->Get();
 }
 


@@ -216,22 +216,22 @@ const std::vector<unsigned char> LZMADeCompress
     (const std::vector<unsigned char>& buf)
 {
     if(buf.size() <= 5+8) return std::vector<unsigned char> ();
     (const std::vector<unsigned char>& buf)
 {
     if(buf.size() <= 5+8) return std::vector<unsigned char> ();

-    
+

     uint_least64_t out_sizemax = R64(&buf[5]);
     uint_least64_t out_sizemax = R64(&buf[5]);

-    
+

     std::vector<unsigned char> result(out_sizemax);
     std::vector<unsigned char> result(out_sizemax);

-    
+

     CLzmaDecoderState state;
     LzmaDecodeProperties(&state.Properties, &buf[0], LZMA_PROPERTIES_SIZE);
     state.Probs = new CProb[LzmaGetNumProbs(&state.Properties)];
     CLzmaDecoderState state;
     LzmaDecodeProperties(&state.Properties, &buf[0], LZMA_PROPERTIES_SIZE);
     state.Probs = new CProb[LzmaGetNumProbs(&state.Properties)];

-    
+

     SizeT in_done;
     SizeT out_done;
     LzmaDecode(&state, &buf[13], buf.size()-13, &in_done,
                &result[0], result.size(), &out_done);
     SizeT in_done;
     SizeT out_done;
     LzmaDecode(&state, &buf[13], buf.size()-13, &in_done,
                &result[0], result.size(), &out_done);

-    
+

     delete[] state.Probs;
     delete[] state.Probs;

-    
+

     result.resize(out_done);
     return result;
 }
     result.resize(out_done);
     return result;
 }


@@ -242,7 +242,7 @@ int main(int argc, char *argv[])
        char  *s;
        FILE  *f, *infile, *outfile;
        int    c;
        char  *s;
        FILE  *f, *infile, *outfile;
        int    c;

-       
+

        if (argc != 4) {
                std::fprintf(stderr, "'lzma e file1 file2' encodes file1 into file2.\n"
                        "'lzma d file2 file1' decodes file2 into file1.\n");
        if (argc != 4) {
                std::fprintf(stderr, "'lzma e file1 file2' encodes file1 into file2.\n"
                        "'lzma d file2 file1' decodes file2 into file1.\n");


@@ -270,9 +270,9 @@ int main(int argc, char *argv[])
        fread(Buf,si, 1, infile);
 
        std::vector<unsigned char> result;
        fread(Buf,si, 1, infile);
 
        std::vector<unsigned char> result;

-       if (toupper(*argv[1]) == 'E') 
+       if (toupper(*argv[1]) == 'E')

                result = LZMACompress(std::vector<unsigned char>(Buf,Buf+si));
                result = LZMACompress(std::vector<unsigned char>(Buf,Buf+si));

-       else    
+       else

                result = LZMADeCompress(std::vector<unsigned char>(Buf,Buf+si));
 
        fwrite(&result[0], result.size(), 1, outfile);
                result = LZMADeCompress(std::vector<unsigned char>(Buf,Buf+si));
 
        fwrite(&result[0], result.size(), 1, outfile);


@@ -289,7 +289,7 @@ extern "C" {
  * @param in a pointer to the buffer
  * @param in_len the length in bytes
  * @param out a pointer to a buffer of at least size in_len
  * @param in a pointer to the buffer
  * @param in_len the length in bytes
  * @param out a pointer to a buffer of at least size in_len

- * @param out_len a pointer to the compressed length of in 
+ * @param out_len a pointer to the compressed length of in

  */
 
 void do_lzma_compress(char *in, int in_len, char *out, int *out_len) {
  */
 
 void do_lzma_compress(char *in, int in_len, char *out, int *out_len) {

diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
index 2ff6234f2e0ce5261ea30f332f3df113564392a2..bacaf500a78a78a68c2663e13c4d3353a66e8c4a 100755 (executable)
--- a/util/crossgcc/buildgcc
+++ b/util/crossgcc/buildgcc
@@ -3,7 +3,7 @@
 # Copyright (C) 2008-2009 by coresystems GmbH
 # written by Patrick Georgi <patrick.georgi@coresystems.de> and
 #            Stefan Reinauer <stefan.reinauer@coresystems.de>
 # Copyright (C) 2008-2009 by coresystems GmbH
 # written by Patrick Georgi <patrick.georgi@coresystems.de> and
 #            Stefan Reinauer <stefan.reinauer@coresystems.de>

-# 
+#

 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
 # the Free Software Foundation; version 2 of the License.
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
 # the Free Software Foundation; version 2 of the License.


@@ -202,7 +202,7 @@ for PACKAGE in GMP MPFR GCC BINUTILS GDB $MINGW_PACKAGES; do
        archive=$PACKAGE"_ARCHIVE"
        archive=${!archive}
        dir=$PACKAGE"_DIR"
        archive=$PACKAGE"_ARCHIVE"
        archive=${!archive}
        dir=$PACKAGE"_DIR"

-       test -d ${!dir} || ( 
+       test -d ${!dir} || (

                printf " * `basename $archive`\n"
                FLAGS=zxf
                test ${archive:${#archive}-2:2} = "gz" && FLAGS=zxf
                printf " * `basename $archive`\n"
                FLAGS=zxf
                test ${archive:${#archive}-2:2} = "gz" && FLAGS=zxf

diff --git a/util/crossgcc/patches/gcc-4.3.2_use-gnu-style-comments-in-assembly.patch b/util/crossgcc/patches/gcc-4.3.2_use-gnu-style-comments-in-assembly.patch
index b5bfb2013a518f91f306343adc7e7c84c923957d..168f0d06552b708460c5d03d417a88fd09a07a32 100644 (file)
--- a/util/crossgcc/patches/gcc-4.3.2_use-gnu-style-comments-in-assembly.patch
+++ b/util/crossgcc/patches/gcc-4.3.2_use-gnu-style-comments-in-assembly.patch
@@ -1,11 +1,11 @@
 --- gcc-4.3.2/gcc/config/i386/unix.h~  2009-01-20 16:05:45.000000000 +0100
 +++ gcc-4.3.2/gcc/config/i386/unix.h   2009-01-20 16:05:47.000000000 +0100
 @@ -32,7 +32,7 @@
 --- gcc-4.3.2/gcc/config/i386/unix.h~  2009-01-20 16:05:45.000000000 +0100
 +++ gcc-4.3.2/gcc/config/i386/unix.h   2009-01-20 16:05:47.000000000 +0100
 @@ -32,7 +32,7 @@

- 
+

  /* String containing the assembler's comment-starter.  */
  /* String containing the assembler's comment-starter.  */

- 
+

 -#define ASM_COMMENT_START "/"
 +#define ASM_COMMENT_START "#"
 -#define ASM_COMMENT_START "/"
 +#define ASM_COMMENT_START "#"

- 
+

  /* Output to assembler file text saying following lines
     may contain character constants, extra white space, comments, etc.  */
  /* Output to assembler file text saying following lines
     may contain character constants, extra white space, comments, etc.  */

diff --git a/util/crossgcc/patches/gcc-4.3.3_use-gnu-style-comments-in-assembly.patch b/util/crossgcc/patches/gcc-4.3.3_use-gnu-style-comments-in-assembly.patch
index aa72efb06e28be4e2e31d4d99e917a225f6a1fdf..d5a16dade9384c08b0eaf86ee5b83a20b9e92814 100644 (file)
--- a/util/crossgcc/patches/gcc-4.3.3_use-gnu-style-comments-in-assembly.patch
+++ b/util/crossgcc/patches/gcc-4.3.3_use-gnu-style-comments-in-assembly.patch
@@ -1,11 +1,11 @@
 --- gcc-4.3.3/gcc/config/i386/unix.h~  2009-01-20 16:05:45.000000000 +0100
 +++ gcc-4.3.3/gcc/config/i386/unix.h   2009-01-20 16:05:47.000000000 +0100
 @@ -32,7 +32,7 @@
 --- gcc-4.3.3/gcc/config/i386/unix.h~  2009-01-20 16:05:45.000000000 +0100
 +++ gcc-4.3.3/gcc/config/i386/unix.h   2009-01-20 16:05:47.000000000 +0100
 @@ -32,7 +32,7 @@

- 
+

  /* String containing the assembler's comment-starter.  */
  /* String containing the assembler's comment-starter.  */

- 
+

 -#define ASM_COMMENT_START "/"
 +#define ASM_COMMENT_START "#"
 -#define ASM_COMMENT_START "/"
 +#define ASM_COMMENT_START "#"

- 
+

  /* Output to assembler file text saying following lines
     may contain character constants, extra white space, comments, etc.  */
  /* Output to assembler file text saying following lines
     may contain character constants, extra white space, comments, etc.  */

diff --git a/util/crossgcc/patches/gcc-4.4.1_less-junk-in-crtbegin.patch b/util/crossgcc/patches/gcc-4.4.1_less-junk-in-crtbegin.patch
index 3c005003dfeeda866a57329451746f65d5966459..4df9694c6a8c024307ba05171a93da8cd1e37e4d 100644 (file)
--- a/util/crossgcc/patches/gcc-4.4.1_less-junk-in-crtbegin.patch
+++ b/util/crossgcc/patches/gcc-4.4.1_less-junk-in-crtbegin.patch
@@ -3,7 +3,7 @@
 @@ -204,6 +204,7 @@
    = { (func_ptr) (-1) };
  #endif /* __DTOR_LIST__ alternatives */
 @@ -204,6 +204,7 @@
    = { (func_ptr) (-1) };
  #endif /* __DTOR_LIST__ alternatives */

- 
+

 +#if 0
  #ifdef USE_EH_FRAME_REGISTRY
  /* Stick a label at the beginning of the frame unwind info so we can register
 +#if 0
  #ifdef USE_EH_FRAME_REGISTRY
  /* Stick a label at the beginning of the frame unwind info so we can register


@@ -13,13 +13,13 @@
    = { };
  #endif /* JCR_SECTION_NAME */
 +#endif
    = { };
  #endif /* JCR_SECTION_NAME */
 +#endif

- 
+

  #if defined(INIT_SECTION_ASM_OP) || defined(INIT_ARRAY_SECTION_ASM_OP)
  #if defined(INIT_SECTION_ASM_OP) || defined(INIT_ARRAY_SECTION_ASM_OP)

- 
+

 @@ -309,6 +311,7 @@
    }
  #endif /* !defined(FINI_ARRAY_SECTION_ASM_OP) */
 @@ -309,6 +311,7 @@
    }
  #endif /* !defined(FINI_ARRAY_SECTION_ASM_OP) */

- 
+

 +#if 0
  #ifdef USE_EH_FRAME_REGISTRY
  #ifdef CRT_GET_RFIB_DATA
 +#if 0
  #ifdef USE_EH_FRAME_REGISTRY
  #ifdef CRT_GET_RFIB_DATA


@@ -29,13 +29,13 @@
  #endif
  #endif
 +#endif
  #endif
  #endif
 +#endif

- 
+

    completed = 1;
  }
 @@ -333,6 +337,7 @@
    = { __do_global_dtors_aux };
  #endif /* !defined(FINI_SECTION_ASM_OP) */
    completed = 1;
  }
 @@ -333,6 +337,7 @@
    = { __do_global_dtors_aux };
  #endif /* !defined(FINI_SECTION_ASM_OP) */

- 
+

 +#if 0
  #if defined(USE_EH_FRAME_REGISTRY) || defined(JCR_SECTION_NAME)
  /* Stick a call to __register_frame_info into the .init section.  For some
 +#if 0
  #if defined(USE_EH_FRAME_REGISTRY) || defined(JCR_SECTION_NAME)
  /* Stick a call to __register_frame_info into the .init section.  For some


@@ -45,6 +45,6 @@
  #endif /* JCR_SECTION_NAME */
  }
 +#endif
  #endif /* JCR_SECTION_NAME */
  }
 +#endif

- 
+

  #ifdef INIT_SECTION_ASM_OP
  CRT_CALL_STATIC_FUNCTION (INIT_SECTION_ASM_OP, frame_dummy)
  #ifdef INIT_SECTION_ASM_OP
  CRT_CALL_STATIC_FUNCTION (INIT_SECTION_ASM_OP, frame_dummy)

diff --git a/util/crossgcc/patches/gcc-4.4.2_less-junk-in-crtbegin.patch b/util/crossgcc/patches/gcc-4.4.2_less-junk-in-crtbegin.patch
index a1a79815555872666d9bc5df6fe4e8ae27e9278a..a1c248069deee17c01bb35c84d5134091c954600 100644 (file)
--- a/util/crossgcc/patches/gcc-4.4.2_less-junk-in-crtbegin.patch
+++ b/util/crossgcc/patches/gcc-4.4.2_less-junk-in-crtbegin.patch
@@ -3,7 +3,7 @@
 @@ -204,6 +204,7 @@
    = { (func_ptr) (-1) };
  #endif /* __DTOR_LIST__ alternatives */
 @@ -204,6 +204,7 @@
    = { (func_ptr) (-1) };
  #endif /* __DTOR_LIST__ alternatives */

- 
+

 +#if 0
  #ifdef USE_EH_FRAME_REGISTRY
  /* Stick a label at the beginning of the frame unwind info so we can register
 +#if 0
  #ifdef USE_EH_FRAME_REGISTRY
  /* Stick a label at the beginning of the frame unwind info so we can register


@@ -13,13 +13,13 @@
    = { };
  #endif /* JCR_SECTION_NAME */
 +#endif
    = { };
  #endif /* JCR_SECTION_NAME */
 +#endif

- 
+

  #if defined(INIT_SECTION_ASM_OP) || defined(INIT_ARRAY_SECTION_ASM_OP)
  #if defined(INIT_SECTION_ASM_OP) || defined(INIT_ARRAY_SECTION_ASM_OP)

- 
+

 @@ -309,6 +311,7 @@
    }
  #endif /* !defined(FINI_ARRAY_SECTION_ASM_OP) */
 @@ -309,6 +311,7 @@
    }
  #endif /* !defined(FINI_ARRAY_SECTION_ASM_OP) */

- 
+

 +#if 0
  #ifdef USE_EH_FRAME_REGISTRY
  #ifdef CRT_GET_RFIB_DATA
 +#if 0
  #ifdef USE_EH_FRAME_REGISTRY
  #ifdef CRT_GET_RFIB_DATA


@@ -29,13 +29,13 @@
  #endif
  #endif
 +#endif
  #endif
  #endif
 +#endif

- 
+

    completed = 1;
  }
 @@ -333,6 +337,7 @@
    = { __do_global_dtors_aux };
  #endif /* !defined(FINI_SECTION_ASM_OP) */
    completed = 1;
  }
 @@ -333,6 +337,7 @@
    = { __do_global_dtors_aux };
  #endif /* !defined(FINI_SECTION_ASM_OP) */

- 
+

 +#if 0
  #if defined(USE_EH_FRAME_REGISTRY) || defined(JCR_SECTION_NAME)
  /* Stick a call to __register_frame_info into the .init section.  For some
 +#if 0
  #if defined(USE_EH_FRAME_REGISTRY) || defined(JCR_SECTION_NAME)
  /* Stick a call to __register_frame_info into the .init section.  For some


@@ -45,6 +45,6 @@
  #endif /* JCR_SECTION_NAME */
  }
 +#endif
  #endif /* JCR_SECTION_NAME */
  }
 +#endif

- 
+

  #ifdef INIT_SECTION_ASM_OP
  CRT_CALL_STATIC_FUNCTION (INIT_SECTION_ASM_OP, frame_dummy)
  #ifdef INIT_SECTION_ASM_OP
  CRT_CALL_STATIC_FUNCTION (INIT_SECTION_ASM_OP, frame_dummy)

diff --git a/util/dump_mmcr/dumpmmcr.c b/util/dump_mmcr/dumpmmcr.c
index a652eb3320db7f274589802cdf8a3a369be1a37f..de2bfec3493716660cfa93e16b44acaad6b3bb65 100644 (file)
--- a/util/dump_mmcr/dumpmmcr.c
+++ b/util/dump_mmcr/dumpmmcr.c
@@ -1,9 +1,9 @@
 /*
  * dump mmcr of Elan520 uController (incomplete, see 22005b pg23+).
  *
 /*
  * dump mmcr of Elan520 uController (incomplete, see 22005b pg23+).
  *

- * Copyright 2006 coresystems GmbH 
- *      Stefan Reinauer <stepan@coresystems.de> 
- * 
+ * Copyright 2006 coresystems GmbH
+ *      Stefan Reinauer <stepan@coresystems.de>
+ *

  *     This program is free software; you can redistribute it and/or modify
  *     it under the terms of the GNU General Public License as published by
  *     the Free Software Foundation; either version 2 of the License, or
  *     This program is free software; you can redistribute it and/or modify
  *     it under the terms of the GNU General Public License as published by
  *     the Free Software Foundation; either version 2 of the License, or


@@ -37,12 +37,12 @@ int print_mmcr(struct mmcr *mmcr)
        int i;
        printf("revid is 0x%x\n\n", val(mmcr, revid));
        printf("cpucontrol is 0x%x\n\n", val(mmcr, cpucontrol));
        int i;
        printf("revid is 0x%x\n\n", val(mmcr, revid));
        printf("cpucontrol is 0x%x\n\n", val(mmcr, cpucontrol));

-       
+

        printf("\n");
        printf("drcctl is 0x%x\n", val(mmcr, memregs.drcctl));
        printf("drctmctl is 0x%x\n", val(mmcr, memregs.drctmctl));
        printf("drccfg is 0x%x\n", val(mmcr, memregs.drccfg));
        printf("\n");
        printf("drcctl is 0x%x\n", val(mmcr, memregs.drcctl));
        printf("drctmctl is 0x%x\n", val(mmcr, memregs.drctmctl));
        printf("drccfg is 0x%x\n", val(mmcr, memregs.drccfg));

-       printf("bendaddr is 0x%02x%02x%02x%02x\n", 
+       printf("bendaddr is 0x%02x%02x%02x%02x\n",

                        val(mmcr, memregs.drcbendadr[3]),
                        val(mmcr, memregs.drcbendadr[2]),
                        val(mmcr, memregs.drcbendadr[1]),
                        val(mmcr, memregs.drcbendadr[3]),
                        val(mmcr, memregs.drcbendadr[2]),
                        val(mmcr, memregs.drcbendadr[1]),


@@ -53,15 +53,15 @@ int print_mmcr(struct mmcr *mmcr)
        printf("cktest is 0x%x\n", val(mmcr, memregs.ecccktest));
        printf("sbadd is 0x%x\n", val(mmcr, memregs.eccsbadd));
        printf("mbadd is 0x%x\n", val(mmcr, memregs.eccmbadd));
        printf("cktest is 0x%x\n", val(mmcr, memregs.ecccktest));
        printf("sbadd is 0x%x\n", val(mmcr, memregs.eccsbadd));
        printf("mbadd is 0x%x\n", val(mmcr, memregs.eccmbadd));

-       
+

        printf("\n");
        printf("dbctl is 0x%x\n", val(mmcr, dbctl.dbctl));
        printf("\n");
        printf("dbctl is 0x%x\n", val(mmcr, dbctl.dbctl));

-       
+

        printf("\n");
        printf("bootcs is 0x%x\n", val(mmcr, romregs.bootcs));
        printf("romcs1 is 0x%x\n", val(mmcr, romregs.romcs1));
        printf("romcs2 is 0x%x\n", val(mmcr, romregs.romcs2));
        printf("\n");
        printf("bootcs is 0x%x\n", val(mmcr, romregs.bootcs));
        printf("romcs1 is 0x%x\n", val(mmcr, romregs.romcs1));
        printf("romcs2 is 0x%x\n", val(mmcr, romregs.romcs2));

-       
+

        printf("\n");
        printf("hbctl is 0x%x\n",  val(mmcr, hostbridge.ctl));
        printf("hbtgtirqctl is 0x%x\n",  val(mmcr, hostbridge.tgtirqctl));
        printf("\n");
        printf("hbctl is 0x%x\n",  val(mmcr, hostbridge.ctl));
        printf("hbtgtirqctl is 0x%x\n",  val(mmcr, hostbridge.tgtirqctl));


@@ -69,20 +69,20 @@ int print_mmcr(struct mmcr *mmcr)
        printf("hbmstirqctl is 0x%x\n",  val(mmcr, hostbridge.mstirqctl));
        printf("hbmstirqsta is 0x%x\n",  val(mmcr, hostbridge.mstirqsta));
        printf("mstintadd is 0x%x\n",  val(mmcr, hostbridge.mstintadd));
        printf("hbmstirqctl is 0x%x\n",  val(mmcr, hostbridge.mstirqctl));
        printf("hbmstirqsta is 0x%x\n",  val(mmcr, hostbridge.mstirqsta));
        printf("mstintadd is 0x%x\n",  val(mmcr, hostbridge.mstintadd));

-       
-       
+
+

        printf("\n");
        printf("sysarbctl is 0x%x\n", val(mmcr, sysarb.ctl));
        printf("pciarbsta is 0x%x\n", val(mmcr, sysarb.sta));
        printf("sysarbmenb is 0x%x\n", val(mmcr, sysarb.menb));
        printf("arbprictl is 0x%x\n", val(mmcr, sysarb.prictl));
        printf("\n");
        printf("sysarbctl is 0x%x\n", val(mmcr, sysarb.ctl));
        printf("pciarbsta is 0x%x\n", val(mmcr, sysarb.sta));
        printf("sysarbmenb is 0x%x\n", val(mmcr, sysarb.menb));
        printf("arbprictl is 0x%x\n", val(mmcr, sysarb.prictl));

-       
+

        printf("\n");
        printf("adddecctl is 0x%x\n", val(mmcr, sysmap.adddecctl));
        printf("wpvsta is 0x%x\n", val(mmcr, sysmap.wpvsta));
        for (i=0; i<16; i++)
                printf("par %d is 0x%x\n", i, val(mmcr, sysmap.par[i]));
        printf("\n");
        printf("adddecctl is 0x%x\n", val(mmcr, sysmap.adddecctl));
        printf("wpvsta is 0x%x\n", val(mmcr, sysmap.wpvsta));
        for (i=0; i<16; i++)
                printf("par %d is 0x%x\n", i, val(mmcr, sysmap.par[i]));

-       
+

        printf("\n");
        printf("gpecho is 0x%x\n", val(mmcr, gpctl.gpecho));
        printf("gpcsdw is 0x%x\n", val(mmcr, gpctl.gpcsdw));
        printf("\n");
        printf("gpecho is 0x%x\n", val(mmcr, gpctl.gpecho));
        printf("gpcsdw is 0x%x\n", val(mmcr, gpctl.gpcsdw));


@@ -96,9 +96,9 @@ int print_mmcr(struct mmcr *mmcr)
        printf("gpwroff is 0x%x\n", val(mmcr, gpctl.gpwroff));
        printf("gpalew is 0x%x\n", val(mmcr, gpctl.gpalew));
        printf("gpaleoff is 0x%x\n", val(mmcr, gpctl.gpaleoff));
        printf("gpwroff is 0x%x\n", val(mmcr, gpctl.gpwroff));
        printf("gpalew is 0x%x\n", val(mmcr, gpctl.gpalew));
        printf("gpaleoff is 0x%x\n", val(mmcr, gpctl.gpaleoff));

-       
+

        printf("\n");
        printf("\n");

-       
+

        printf("piopfs15_0 is 0x%x\n",  val(mmcr, pio.pfs15_0));
        printf("piopfs31_16 is 0x%x\n",  val(mmcr, pio.pfs31_16));
        printf("cspfs is 0x%x\n",  val(mmcr, pio.cspfs));
        printf("piopfs15_0 is 0x%x\n",  val(mmcr, pio.pfs15_0));
        printf("piopfs31_16 is 0x%x\n",  val(mmcr, pio.pfs31_16));
        printf("cspfs is 0x%x\n",  val(mmcr, pio.cspfs));


@@ -112,19 +112,19 @@ int print_mmcr(struct mmcr *mmcr)
        printf("pioset31_16 is 0x%x\n",  val(mmcr, pio.set31_16));
        printf("pioclr15_0 is 0x%x\n",  val(mmcr, pio.clr15_0));
        printf("pioclr31_16 is 0x%x\n",  val(mmcr, pio.clr31_16));
        printf("pioset31_16 is 0x%x\n",  val(mmcr, pio.set31_16));
        printf("pioclr15_0 is 0x%x\n",  val(mmcr, pio.clr15_0));
        printf("pioclr31_16 is 0x%x\n",  val(mmcr, pio.clr31_16));

-       
+

        printf("swtmrmilli is 0x%x\n", val(mmcr, swtmr.swtmrmilli));
        printf("swtmrmicro is 0x%x\n", val(mmcr, swtmr.swtmrmicro));
        printf("swtmrcfg is 0x%x\n", val(mmcr, swtmr.swtmrcfg));
        printf("swtmrmilli is 0x%x\n", val(mmcr, swtmr.swtmrmilli));
        printf("swtmrmicro is 0x%x\n", val(mmcr, swtmr.swtmrmicro));
        printf("swtmrcfg is 0x%x\n", val(mmcr, swtmr.swtmrcfg));

-       
+

        printf("status  is 0x%x\n", val(mmcr, gptimers.status));
        printf("pad  is 0x%x\n", val(mmcr, gptimers.pad));
        printf("status  is 0x%x\n", val(mmcr, gptimers.status));
        printf("pad  is 0x%x\n", val(mmcr, gptimers.pad));

-       
+

        printf("timers[0].ctl is 0x%x\n",  val(mmcr, gptimers.timer[0].ctl));
        printf("timers[0].cnt is 0x%x\n",  val(mmcr, gptimers.timer[0].cnt));
        printf("timers[0].maxcmpa is 0x%x\n",  val(mmcr, gptimers.timer[0].maxcmpa));
        printf("timers[0].maxcmpb is 0x%x\n",  val(mmcr, gptimers.timer[0].maxcmpb));
        printf("timers[0].ctl is 0x%x\n",  val(mmcr, gptimers.timer[0].ctl));
        printf("timers[0].cnt is 0x%x\n",  val(mmcr, gptimers.timer[0].cnt));
        printf("timers[0].maxcmpa is 0x%x\n",  val(mmcr, gptimers.timer[0].maxcmpa));
        printf("timers[0].maxcmpb is 0x%x\n",  val(mmcr, gptimers.timer[0].maxcmpb));

-       
+

        printf("timers[1].ctl is 0x%x\n",  val(mmcr, gptimers.timer[1].ctl));
        printf("timers[1].cnt is 0x%x\n",  val(mmcr, gptimers.timer[1].cnt));
        printf("timers[1].maxcmpa is 0x%x\n",  val(mmcr, gptimers.timer[1].maxcmpa));
        printf("timers[1].ctl is 0x%x\n",  val(mmcr, gptimers.timer[1].ctl));
        printf("timers[1].cnt is 0x%x\n",  val(mmcr, gptimers.timer[1].cnt));
        printf("timers[1].maxcmpa is 0x%x\n",  val(mmcr, gptimers.timer[1].maxcmpa));


@@ -132,24 +132,24 @@ int print_mmcr(struct mmcr *mmcr)
        printf("timers[2].ctl is 0x%x\n",  val(mmcr, gptimers.ctl2));
        printf("timers[2].cnt is 0x%x\n",  val(mmcr, gptimers.cnt2));
        printf("timers[2].maxcmpa is 0x%x\n",  val(mmcr, gptimers.maxcmpa2));
        printf("timers[2].ctl is 0x%x\n",  val(mmcr, gptimers.ctl2));
        printf("timers[2].cnt is 0x%x\n",  val(mmcr, gptimers.cnt2));
        printf("timers[2].maxcmpa is 0x%x\n",  val(mmcr, gptimers.maxcmpa2));

-       
+

        printf("ctl  is 0x%x\n",  val(mmcr, watchdog.ctl));
        printf("cntll  is 0x%x\n",  val(mmcr, watchdog.cntll));
        printf("cntlh  is 0x%x\n",  val(mmcr, watchdog.cntlh));
        printf("ctl  is 0x%x\n",  val(mmcr, watchdog.ctl));
        printf("cntll  is 0x%x\n",  val(mmcr, watchdog.cntll));
        printf("cntlh  is 0x%x\n",  val(mmcr, watchdog.cntlh));

-       
+

        printf("uart 1 ctl is 0x%x\n", val(mmcr, uarts.uart[0].ctl));
        printf("uart 1 sta is 0x%x\n", val(mmcr, uarts.uart[0].sta));
        printf("uart 1 fcrshad is 0x%x\n", val(mmcr, uarts.uart[0].fcrshad));
        printf("uart 2 ctl is 0x%x\n", val(mmcr, uarts.uart[1].ctl));
        printf("uart 2 sta is 0x%x\n", val(mmcr, uarts.uart[1].sta));
        printf("uart 2 fcrshad is 0x%x\n", val(mmcr, uarts.uart[1].fcrshad));
        printf("uart 1 ctl is 0x%x\n", val(mmcr, uarts.uart[0].ctl));
        printf("uart 1 sta is 0x%x\n", val(mmcr, uarts.uart[0].sta));
        printf("uart 1 fcrshad is 0x%x\n", val(mmcr, uarts.uart[0].fcrshad));
        printf("uart 2 ctl is 0x%x\n", val(mmcr, uarts.uart[1].ctl));
        printf("uart 2 sta is 0x%x\n", val(mmcr, uarts.uart[1].sta));
        printf("uart 2 fcrshad is 0x%x\n", val(mmcr, uarts.uart[1].fcrshad));

-       
+

        printf("ssi ctl is 0x%x\n", val(mmcr, ssi.ctl));
        printf("ssi xmit is 0x%x\n", val(mmcr, ssi.xmit));
        printf("ssi cmd is 0x%x\n", val(mmcr, ssi.cmd));
        printf("ssi sta is 0x%x\n", val(mmcr, ssi.sta));
        printf("ssi rcv is 0x%x\n", val(mmcr, ssi.rcv));
        printf("ssi ctl is 0x%x\n", val(mmcr, ssi.ctl));
        printf("ssi xmit is 0x%x\n", val(mmcr, ssi.xmit));
        printf("ssi cmd is 0x%x\n", val(mmcr, ssi.cmd));
        printf("ssi sta is 0x%x\n", val(mmcr, ssi.sta));
        printf("ssi rcv is 0x%x\n", val(mmcr, ssi.rcv));

-       
+

        printf("pcicr is 0x%x\n", val(mmcr, pic.pcicr));
        printf("mpicmode is 0x%x\n", val(mmcr, pic.mpicmode));
        printf("sl1picmode is 0x%x\n", val(mmcr, pic.sl1picmode));
        printf("pcicr is 0x%x\n", val(mmcr, pic.pcicr));
        printf("mpicmode is 0x%x\n", val(mmcr, pic.mpicmode));
        printf("sl1picmode is 0x%x\n", val(mmcr, pic.sl1picmode));


@@ -189,12 +189,12 @@ int print_mmcr(struct mmcr *mmcr)
        printf("gp8imap is 0x%x\n", val(mmcr, pic.gp8imap));
        printf("gp9imap is 0x%x\n", val(mmcr, pic.gp9imap));
        printf("gp10imap is 0x%x\n", val(mmcr, pic.gp10imap));
        printf("gp8imap is 0x%x\n", val(mmcr, pic.gp8imap));
        printf("gp9imap is 0x%x\n", val(mmcr, pic.gp9imap));
        printf("gp10imap is 0x%x\n", val(mmcr, pic.gp10imap));

-       
+

        printf("sysinfo is 0x%x\n", val(mmcr, reset.sysinfo));
        printf("rescfg is 0x%x\n", val(mmcr, reset.rescfg));
        printf("ressta is 0x%x\n", val(mmcr, reset.ressta));
        printf("sysinfo is 0x%x\n", val(mmcr, reset.sysinfo));
        printf("rescfg is 0x%x\n", val(mmcr, reset.rescfg));
        printf("ressta is 0x%x\n", val(mmcr, reset.ressta));

-       
-       
+
+

        printf("ctl is 0x%x\n", val(mmcr, dmacontrol.ctl));
        printf("mmio is 0x%x\n", val(mmcr, dmacontrol.mmio));
        printf("extchanmapa is 0x%x\n", val(mmcr, dmacontrol.extchanmapa));
        printf("ctl is 0x%x\n", val(mmcr, dmacontrol.ctl));
        printf("mmio is 0x%x\n", val(mmcr, dmacontrol.mmio));
        printf("extchanmapa is 0x%x\n", val(mmcr, dmacontrol.extchanmapa));


@@ -230,7 +230,7 @@ int print_mmcr(struct mmcr *mmcr)
        printf("nxtttch6 is 0x%x\n", val(mmcr, dmacontrol.nxtttch6));
        printf("nxtttcl7 is 0x%x\n", val(mmcr, dmacontrol.nxtttcl7));
        printf("nxtttch7 is 0x%x\n", val(mmcr, dmacontrol.nxtttch7));
        printf("nxtttch6 is 0x%x\n", val(mmcr, dmacontrol.nxtttch6));
        printf("nxtttcl7 is 0x%x\n", val(mmcr, dmacontrol.nxtttcl7));
        printf("nxtttch7 is 0x%x\n", val(mmcr, dmacontrol.nxtttch7));

-       
+

        return 0;
 }
 
        return 0;
 }
 


@@ -248,15 +248,15 @@ int map_mmcr(void)
        if (getpagesize() > size) {
                size = getpagesize();
        }
        if (getpagesize() > size) {
                size = getpagesize();
        }

-       
+

        mmcr = mmap(0, size, PROT_WRITE | PROT_READ, MAP_SHARED,
                    fd_mem, (off_t) (0xFFFEF000));
        mmcr = mmap(0, size, PROT_WRITE | PROT_READ, MAP_SHARED,
                    fd_mem, (off_t) (0xFFFEF000));

-       
+

        if (mmcr == MAP_FAILED) {
                perror("Error MMAP /dev/mem");
                exit(1);
        }
        if (mmcr == MAP_FAILED) {
                perror("Error MMAP /dev/mem");
                exit(1);
        }

-       
+

 
        print_mmcr((struct mmcr *)mmcr);
 #if 0
 
        print_mmcr((struct mmcr *)mmcr);
 #if 0

diff --git a/util/ectool/ec.c b/util/ectool/ec.c
index 351015d05049379fae99038c1f4afbd73c2b5111..35c8d789abc311efc9f8814a498e9436e2cd0c06 100644 (file)
--- a/util/ectool/ec.c
+++ b/util/ectool/ec.c
@@ -121,6 +121,6 @@ uint8_t ec_idx_read(uint16_t addr)
 
        outb(addr & 0xff, lpc_idx + 2);
        outb(addr >> 8, lpc_idx + 1);
 
        outb(addr & 0xff, lpc_idx + 2);
        outb(addr >> 8, lpc_idx + 1);

-       
+

        return inb(lpc_idx + 3);
 }
        return inb(lpc_idx + 3);
 }

diff --git a/util/getpir/README b/util/getpir/README
index 33d0de2a933b924f92b573fcb423fc8fbdd49289..651458583b13931687de412ce069644e26f2fd7f 100644 (file)
--- a/util/getpir/README
+++ b/util/getpir/README
@@ -2,11 +2,11 @@ ABOUT:
 
 This utility will help to create irq_table.c file, that is very hard to create
 manually, specialy when you are testing new motherboards, changing your
 
 This utility will help to create irq_table.c file, that is very hard to create
 manually, specialy when you are testing new motherboards, changing your

-hardware often, placing new cards, etc.. 
+hardware often, placing new cards, etc..

 
 USAGE:
 
 
 USAGE:
 

-Steps 
+Steps

 1. make distclean;
 2. make getpir
 3. ./getpir
 1. make distclean;
 2. make getpir
 3. ./getpir


@@ -23,7 +23,7 @@ Steps
    checkpir.c Will verify the irq_tables.c, currently it only checks the
    checksum. In case of wrong checksum, a good value is proposed, so you can
    edit irq_tables.c manualy and replace checksum.
    checkpir.c Will verify the irq_tables.c, currently it only checks the
    checksum. In case of wrong checksum, a good value is proposed, so you can
    edit irq_tables.c manualy and replace checksum.

-               
+

 
 Do not run make checkpir and ./checkpir directly because it needs to be linked
 to irq_table.o first.
 
 Do not run make checkpir and ./checkpir directly because it needs to be linked
 to irq_table.o first.

diff --git a/util/inteltool/Makefile b/util/inteltool/Makefile
index 248e51f726804d5267275b8a8f641d4499633aa8..3850682e5f2e7832493a2e15d0ee3510d25047de 100644 (file)
--- a/util/inteltool/Makefile
+++ b/util/inteltool/Makefile
@@ -1,9 +1,9 @@
 #
 # Makefile for inteltool utility
 #
 #
 # Makefile for inteltool utility
 #

-# Copyright (C) 2008 by coresystems GmbH 
-# written by Stefan Reinauer <stepan@coresystems.de> 
-# 
+# Copyright (C) 2008 by coresystems GmbH
+# written by Stefan Reinauer <stepan@coresystems.de>
+#

 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
 # the Free Software Foundation; either version 2 of the License, or
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
 # the Free Software Foundation; either version 2 of the License, or


@@ -25,7 +25,7 @@ CC      = gcc
 INSTALL = /usr/bin/install
 PREFIX  = /usr/local
 CFLAGS  = -O2 -g -Wall -W
 INSTALL = /usr/bin/install
 PREFIX  = /usr/local
 CFLAGS  = -O2 -g -Wall -W

-LDFLAGS = -lpci -lz 
+LDFLAGS = -lpci -lz

 
 OBJS = inteltool.o cpu.o gpio.o rootcmplx.o powermgt.o memory.o pcie.o
 
 
 OBJS = inteltool.o cpu.o gpio.o rootcmplx.o powermgt.o memory.o pcie.o
 

diff --git a/util/inteltool/cpu.c b/util/inteltool/cpu.c
index dd23d8196f2ab4b2aaee5864b8c2111bac308936..828f99f84fbeab6a624398eac2ef22b72dcc637b 100644 (file)
--- a/util/inteltool/cpu.c
+++ b/util/inteltool/cpu.c
@@ -1,8 +1,8 @@
 /*
  * inteltool - dump all registers on an Intel CPU + chipset based system.
  *
 /*
  * inteltool - dump all registers on an Intel CPU + chipset based system.
  *

- * Copyright (C) 2008-2010 by coresystems GmbH 
- * 
+ * Copyright (C) 2008-2010 by coresystems GmbH
+ *

  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; version 2 of the License.
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; version 2 of the License.


@@ -104,7 +104,7 @@ int print_intel_core_msrs(void)
                { 0x002a, "EBL_CR_POWERON" },
                { 0x0033, "TEST_CTL" },
                { 0x003f, "THERM_DIODE_OFFSET" },
                { 0x002a, "EBL_CR_POWERON" },
                { 0x0033, "TEST_CTL" },
                { 0x003f, "THERM_DIODE_OFFSET" },

-               //{ 0x0079, "IA32_BIOS_UPDT_TRIG" }, // Seems to be RO 
+               //{ 0x0079, "IA32_BIOS_UPDT_TRIG" }, // Seems to be RO

                { 0x008b, "IA32_BIOS_SIGN_ID" },
                { 0x00c1, "PERFCTR0" },
                { 0x00c2, "PERFCTR1" },
                { 0x008b, "IA32_BIOS_SIGN_ID" },
                { 0x00c1, "PERFCTR0" },
                { 0x00c2, "PERFCTR1" },


@@ -308,8 +308,8 @@ int print_intel_core_msrs(void)
        };
 
        /* Pentium 4 and XEON */
        };
 
        /* Pentium 4 and XEON */

-       /* 
-        * All MSRs per 
+       /*
+        * All MSRs per

         *
         * Intel® 64 and IA-32 Architectures
         * Software Developer.s Manual
         *
         * Intel® 64 and IA-32 Architectures
         * Software Developer.s Manual


@@ -326,7 +326,7 @@ int print_intel_core_msrs(void)
                { 0x002a, "MSR_EBC_HARD_POWERON" },
                { 0x002b, "MSR_EBC_SOFT_POWRON" },
                { 0x002c, "MSR_EBC_FREQUENCY_ID" },
                { 0x002a, "MSR_EBC_HARD_POWERON" },
                { 0x002b, "MSR_EBC_SOFT_POWRON" },
                { 0x002c, "MSR_EBC_FREQUENCY_ID" },

-// WRITE ONLY  { 0x0079, "IA32_BIOS_UPDT_TRIG" },              
+// WRITE ONLY  { 0x0079, "IA32_BIOS_UPDT_TRIG" },

                { 0x019c, "IA32_THERM_STATUS" },
                { 0x019d, "MSR_THERM2_CTL" },
                { 0x01a0, "IA32_MISC_ENABLE" },
                { 0x019c, "IA32_THERM_STATUS" },
                { 0x019d, "MSR_THERM2_CTL" },
                { 0x01a0, "IA32_MISC_ENABLE" },


@@ -365,7 +365,7 @@ int print_intel_core_msrs(void)
                { 0x0303, "MSR_BPU_COUNTER3" },
                /* Skipped through 0x3ff  for now*/
 
                { 0x0303, "MSR_BPU_COUNTER3" },
                /* Skipped through 0x3ff  for now*/
 

-       /* All MCX_ADDR AND MCX_MISC MSRs depend on a bit being 
+       /* All MCX_ADDR AND MCX_MISC MSRs depend on a bit being

         * set in MCX_STATUS */
                { 0x400, "IA32_MC0_CTL" },
                { 0x401, "IA32_MC0_STATUS" },
         * set in MCX_STATUS */
                { 0x400, "IA32_MC0_CTL" },
                { 0x401, "IA32_MC0_STATUS" },


@@ -374,7 +374,7 @@ int print_intel_core_msrs(void)
                { 0x404, "IA32_MC1_CTL" },
                { 0x405, "IA32_MC1_STATUS" },
                { 0x406, "IA32_MC1_ADDR" },
                { 0x404, "IA32_MC1_CTL" },
                { 0x405, "IA32_MC1_STATUS" },
                { 0x406, "IA32_MC1_ADDR" },

-               { 0x407, "IA32_MC1_MISC" }, 
+               { 0x407, "IA32_MC1_MISC" },

                { 0x408, "IA32_MC2_CTL" },
                { 0x409, "IA32_MC2_STATUS" },
                { 0x40a, "IA32_MC2_ADDR" },
                { 0x408, "IA32_MC2_CTL" },
                { 0x409, "IA32_MC2_STATUS" },
                { 0x40a, "IA32_MC2_ADDR" },


@@ -439,7 +439,7 @@ int print_intel_core_msrs(void)
                */
                { 0x0600, "IA32_DS_AREA" },
                /* 0x0680 - 0x06cf Branch Records Skipped */
                */
                { 0x0600, "IA32_DS_AREA" },
                /* 0x0680 - 0x06cf Branch Records Skipped */

-       
+

        };
 
 
        };
 
 


@@ -461,7 +461,7 @@ int print_intel_core_msrs(void)
 
        cpu_t *cpu = NULL;
 
 
        cpu_t *cpu = NULL;
 

-       /* Get CPU family and model, not the stepping 
+       /* Get CPU family and model, not the stepping

         * (TODO: extended family/model)
         */
        id = cpuid(1) & 0xff0;
         * (TODO: extended family/model)
         */
        id = cpuid(1) & 0xff0;

diff --git a/util/inteltool/gpio.c b/util/inteltool/gpio.c
index a02817d5863f506a000f2e61afdb0ac36a020529..665f4696eae29ff396a98e8e2446b846b5038aea 100644 (file)
--- a/util/inteltool/gpio.c
+++ b/util/inteltool/gpio.c
@@ -1,8 +1,8 @@
 /*
  * inteltool - dump all registers on an Intel CPU + chipset based system.
  *
 /*
  * inteltool - dump all registers on an Intel CPU + chipset based system.
  *

- * Copyright (C) 2008 by coresystems GmbH 
- * 
+ * Copyright (C) 2008 by coresystems GmbH
+ *

  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; version 2 of the License.
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; version 2 of the License.

diff --git a/util/inteltool/inteltool.c b/util/inteltool/inteltool.c
index 2c8ab747dcb4135bad8c61b8a66e33087a21c78e..9c23d49f65d537e31b933ac4d7bbefd1dbb83f4a 100644 (file)
--- a/util/inteltool/inteltool.c
+++ b/util/inteltool/inteltool.c
@@ -1,9 +1,9 @@
 /*
  * inteltool - dump all registers on an Intel CPU + chipset based system.
  *
 /*
  * inteltool - dump all registers on an Intel CPU + chipset based system.
  *

- * Copyright (C) 2008-2010 by coresystems GmbH 
- *  written by Stefan Reinauer <stepan@coresystems.de> 
- * 
+ * Copyright (C) 2008-2010 by coresystems GmbH
+ *  written by Stefan Reinauer <stepan@coresystems.de>
+ *

  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; version 2 of the License.
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; version 2 of the License.


@@ -69,7 +69,7 @@ void *map_physical(unsigned long phys_addr, size_t len)
 
        virt_addr = mmap(0, len, PROT_WRITE | PROT_READ, MAP_SHARED,
                    fd_mem, (off_t) phys_addr);
 
        virt_addr = mmap(0, len, PROT_WRITE | PROT_READ, MAP_SHARED,
                    fd_mem, (off_t) phys_addr);

-       
+

        if (virt_addr == MAP_FAILED) {
                printf("Error mapping physical memory 0x%08lx[0x%x]\n", phys_addr, len);
                return NULL;
        if (virt_addr == MAP_FAILED) {
                printf("Error mapping physical memory 0x%08lx[0x%x]\n", phys_addr, len);
                return NULL;


@@ -214,11 +214,11 @@ int main(int argc, char *argv[])
        pci_scan_bus(pacc);
 
        /* Find the required devices */
        pci_scan_bus(pacc);
 
        /* Find the required devices */

-       for (dev = pacc->devices; dev; dev = dev->next) {       
+       for (dev = pacc->devices; dev; dev = dev->next) {

                pci_fill_info(dev, PCI_FILL_CLASS);
                /* The ISA/LPC bridge can be 0x1f, 0x07, or 0x04 so we probe. */
                if (dev->device_class == 0x0601) { /* ISA/LPC bridge */
                pci_fill_info(dev, PCI_FILL_CLASS);
                /* The ISA/LPC bridge can be 0x1f, 0x07, or 0x04 so we probe. */
                if (dev->device_class == 0x0601) { /* ISA/LPC bridge */

-                       if (sb == NULL) 
+                       if (sb == NULL)

                                sb = dev;
                        else
                                fprintf(stderr, "Multiple devices with class ID"
                                sb = dev;
                        else
                                fprintf(stderr, "Multiple devices with class ID"


@@ -254,7 +254,7 @@ int main(int argc, char *argv[])
        }
 
        id = cpuid(1);
        }
 
        id = cpuid(1);

-       printf("Intel CPU: Family %x, Model %x\n", 
+       printf("Intel CPU: Family %x, Model %x\n",

                        (id >> 8) & 0xf, (id >> 4) & 0xf);
 
        /* Determine names */
                        (id >> 8) & 0xf, (id >> 4) & 0xf);
 
        /* Determine names */


@@ -265,10 +265,10 @@ int main(int argc, char *argv[])
                if (sb->device_id == supported_chips_list[i].device_id)
                        sbname = supported_chips_list[i].name;
 
                if (sb->device_id == supported_chips_list[i].device_id)
                        sbname = supported_chips_list[i].name;
 

-       printf("Intel Northbridge: %04x:%04x (%s)\n", 
+       printf("Intel Northbridge: %04x:%04x (%s)\n",

                nb->vendor_id, nb->device_id, nbname);
 
                nb->vendor_id, nb->device_id, nbname);
 

-       printf("Intel Southbridge: %04x:%04x (%s)\n", 
+       printf("Intel Southbridge: %04x:%04x (%s)\n",

                sb->vendor_id, sb->device_id, sbname);
 
        /* Now do the deed */
                sb->vendor_id, sb->device_id, sbname);
 
        /* Now do the deed */

diff --git a/util/inteltool/inteltool.h b/util/inteltool/inteltool.h
index 74bfdca8026ab38c1ec69a2b39525fa6cdd285f3..45b210dfca517abdb3796e1108b2fd39c3625f2e 100644 (file)
--- a/util/inteltool/inteltool.h
+++ b/util/inteltool/inteltool.h
@@ -1,8 +1,8 @@
 /*
  * inteltool - dump all registers on an Intel CPU + chipset based system.
  *
 /*
  * inteltool - dump all registers on an Intel CPU + chipset based system.
  *

- * Copyright (C) 2008-2010 by coresystems GmbH 
- * 
+ * Copyright (C) 2008-2010 by coresystems GmbH
+ *

  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; version 2 of the License.
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; version 2 of the License.

diff --git a/util/inteltool/memory.c b/util/inteltool/memory.c
index 5c5a07e03ab4850c2f3657306b0c95528570b5f4..393725b0ffbc3c785e36ed539780176291747f78 100644 (file)
--- a/util/inteltool/memory.c
+++ b/util/inteltool/memory.c
@@ -1,8 +1,8 @@
 /*
  * inteltool - dump all registers on an Intel CPU + chipset based system.
  *
 /*
  * inteltool - dump all registers on an Intel CPU + chipset based system.
  *

- * Copyright (C) 2008-2010 by coresystems GmbH 
- * 
+ * Copyright (C) 2008-2010 by coresystems GmbH
+ *

  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; version 2 of the License.
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; version 2 of the License.


@@ -60,7 +60,7 @@ int print_mchbar(struct pci_dev *nb)
        }
 
        mchbar = map_physical(mchbar_phys, size);
        }
 
        mchbar = map_physical(mchbar_phys, size);

-       
+

        if (mchbar == NULL) {
                perror("Error mapping MCHBAR");
                exit(1);
        if (mchbar == NULL) {
                perror("Error mapping MCHBAR");
                exit(1);

diff --git a/util/inteltool/pcie.c b/util/inteltool/pcie.c
index 5acb0b6ba2ab69ad2c114b580f0e2ce9a9b5fcb6..5b58f0ccdb8408e42db06d66dfcba7f523eafdb0 100644 (file)
--- a/util/inteltool/pcie.c
+++ b/util/inteltool/pcie.c
@@ -1,8 +1,8 @@
 /*
  * inteltool - dump all registers on an Intel CPU + chipset based system.
  *
 /*
  * inteltool - dump all registers on an Intel CPU + chipset based system.
  *

- * Copyright (C) 2008-2010 by coresystems GmbH 
- * 
+ * Copyright (C) 2008-2010 by coresystems GmbH
+ *

  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; version 2 of the License.
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; version 2 of the License.


@@ -57,7 +57,7 @@ int print_epbar(struct pci_dev *nb)
        }
 
        epbar = map_physical(epbar_phys, size);
        }
 
        epbar = map_physical(epbar_phys, size);

-       
+

        if (epbar == NULL) {
                perror("Error mapping EPBAR");
                exit(1);
        if (epbar == NULL) {
                perror("Error mapping EPBAR");
                exit(1);


@@ -109,7 +109,7 @@ int print_dmibar(struct pci_dev *nb)
        }
 
        dmibar = map_physical(dmibar_phys, size);
        }
 
        dmibar = map_physical(dmibar_phys, size);

-       
+

        if (dmibar == NULL) {
                perror("Error mapping DMIBAR");
                exit(1);
        if (dmibar == NULL) {
                perror("Error mapping DMIBAR");
                exit(1);


@@ -182,17 +182,17 @@ int print_pciexbar(struct pci_dev *nb)
        default: // RSVD
                printf("Undefined address base. Bailing out.\n");
                return 1;
        default: // RSVD
                printf("Undefined address base. Bailing out.\n");
                return 1;

-       }       
+       }

 
        printf("PCIEXBAR: 0x%08llx\n", pciexbar_phys);
 
        pciexbar = map_physical(pciexbar_phys, (max_busses * 1024 * 1024));
 
        printf("PCIEXBAR: 0x%08llx\n", pciexbar_phys);
 
        pciexbar = map_physical(pciexbar_phys, (max_busses * 1024 * 1024));

-       
+

        if (pciexbar == NULL) {
                perror("Error mapping PCIEXBAR");
                exit(1);
        }
        if (pciexbar == NULL) {
                perror("Error mapping PCIEXBAR");
                exit(1);
        }

-       
+

        for (bus = 0; bus < max_busses; bus++) {
                for (dev = 0; dev < 32; dev++) {
                        for (fn = 0; fn < 8; fn++) {
        for (bus = 0; bus < max_busses; bus++) {
                for (dev = 0; dev < 32; dev++) {
                        for (fn = 0; fn < 8; fn++) {


@@ -200,7 +200,7 @@ int print_pciexbar(struct pci_dev *nb)
 
                                if (*(uint16_t *)(pciexbar + devbase) == 0xffff)
                                        continue;
 
                                if (*(uint16_t *)(pciexbar + devbase) == 0xffff)
                                        continue;

-                               
+

                                /* This is a heuristics. Anyone got a better check? */
                                if( (*(uint32_t *)(pciexbar + devbase + 256) == 0xffffffff) &&
                                        (*(uint32_t *)(pciexbar + devbase + 512) == 0xffffffff) ) {
                                /* This is a heuristics. Anyone got a better check? */
                                if( (*(uint32_t *)(pciexbar + devbase + 256) == 0xffffffff) &&
                                        (*(uint32_t *)(pciexbar + devbase + 512) == 0xffffffff) ) {

diff --git a/util/inteltool/powermgt.c b/util/inteltool/powermgt.c
index 47db163eed8a774dc073615c1e076f83d1e0a3d9..ee0f485958eb18ba865b331db73ff52d86fee378 100644 (file)
--- a/util/inteltool/powermgt.c
+++ b/util/inteltool/powermgt.c
@@ -1,9 +1,9 @@
 /*
  * inteltool - dump all registers on an Intel CPU + chipset based system.
  *
 /*
  * inteltool - dump all registers on an Intel CPU + chipset based system.
  *

- * Copyright (C) 2008-2010 by coresystems GmbH 
- *  written by Stefan Reinauer <stepan@coresystems.de> 
- * 
+ * Copyright (C) 2008-2010 by coresystems GmbH
+ *  written by Stefan Reinauer <stepan@coresystems.de>
+ *

  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; version 2 of the License.
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; version 2 of the License.


@@ -145,7 +145,7 @@ static const io_register_t ich8_pm_registers[] = {
        { 0x7c, 4, "RESERVED" },
 };
 
        { 0x7c, 4, "RESERVED" },
 };
 

-/* 
+/*

  * INTEL I/O Controller Hub 6 Family
  * http://www.intel.com/assets/pdf/datasheet/301473.pdf
  */
  * INTEL I/O Controller Hub 6 Family
  * http://www.intel.com/assets/pdf/datasheet/301473.pdf
  */

diff --git a/util/inteltool/rootcmplx.c b/util/inteltool/rootcmplx.c
index 9c3f70f4ef2d45f4a00e71fc16582329385d6589..b67e230b9a3915c5731c71fc4e153d57f8d72e83 100644 (file)
--- a/util/inteltool/rootcmplx.c
+++ b/util/inteltool/rootcmplx.c
@@ -1,9 +1,9 @@
 /*
  * inteltool - dump all registers on an Intel CPU + chipset based system.
  *
 /*
  * inteltool - dump all registers on an Intel CPU + chipset based system.
  *

- * Copyright (C) 2008 by coresystems GmbH 
- *  written by Stefan Reinauer <stepan@coresystems.de> 
- * 
+ * Copyright (C) 2008 by coresystems GmbH
+ *  written by Stefan Reinauer <stepan@coresystems.de>
+ *

  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; version 2 of the License.
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; version 2 of the License.


@@ -51,7 +51,7 @@ int print_rcba(struct pci_dev *sb)
        }
 
        rcba = map_physical(rcba_phys, size);
        }
 
        rcba = map_physical(rcba_phys, size);

-       
+

        if (rcba == NULL) {
                perror("Error mapping RCBA");
                exit(1);
        if (rcba == NULL) {
                perror("Error mapping RCBA");
                exit(1);

diff --git a/util/k8resdump/Makefile b/util/k8resdump/Makefile
index 7cf039036e3ba69938fb2249fea412f0e25f3d65..944dbe6cf7c917fc943ac1baa30aedada00fcdaf 100644 (file)
--- a/util/k8resdump/Makefile
+++ b/util/k8resdump/Makefile
@@ -1,6 +1,6 @@
 #
 # Makefile for k8redump utility
 #
 # Makefile for k8redump utility

-# 
+#

 # Original from Stefan Reinauer <stepan@openbios.org>
 #
 
 # Original from Stefan Reinauer <stepan@openbios.org>
 #
 


@@ -14,9 +14,9 @@ PREFIX  = /usr/local
 CFLAGS  = -Os -Wall -Werror
 OS_ARCH        = $(shell uname)
 ifeq ($(OS_ARCH), SunOS)
 CFLAGS  = -Os -Wall -Werror
 OS_ARCH        = $(shell uname)
 ifeq ($(OS_ARCH), SunOS)

-LDFLAGS = -lpci 
+LDFLAGS = -lpci

 else
 else

-LDFLAGS = -lpci -lz -static 
+LDFLAGS = -lpci -lz -static

 STRIP_ARGS = -s
 endif
 
 STRIP_ARGS = -s
 endif
 


@@ -33,7 +33,7 @@ clean:
 
 distclean: clean
        rm -f $(PROGRAM) .dependencies
 
 distclean: clean
        rm -f $(PROGRAM) .dependencies

-       
+

 dep:
        @$(CC) -MM *.c > .dependencies
 
 dep:
        @$(CC) -MM *.c > .dependencies
 

diff --git a/util/kconfig/confdata.c b/util/kconfig/confdata.c
index 56a0eb08518709de8614504dbf7483b06cf651f2..3bbad3010a390c08777cd5526f0faf6b3e9dd9cf 100644 (file)
--- a/util/kconfig/confdata.c
+++ b/util/kconfig/confdata.c
@@ -19,7 +19,7 @@
 #define mkdir(x,y) mkdir(x)
 #define UNLINK_IF_NECESSARY(x) unlink(x)
 #else
 #define mkdir(x,y) mkdir(x)
 #define UNLINK_IF_NECESSARY(x) unlink(x)
 #else

-#define UNLINK_IF_NECESSARY(X) 
+#define UNLINK_IF_NECESSARY(X)

 #endif
 
 static void conf_warning(const char *fmt, ...)
 #endif
 
 static void conf_warning(const char *fmt, ...)

diff --git a/util/kconfig/lex.zconf.c_shipped b/util/kconfig/lex.zconf.c_shipped
index 1911092521bd4a8ff5bf55fca31c0d5854567632..6897092b94f745bca3fe86d62f1dcce809a079e6 100644 (file)
--- a/util/kconfig/lex.zconf.c_shipped
+++ b/util/kconfig/lex.zconf.c_shipped
@@ -52,7 +52,7 @@
 #if __STDC_VERSION__ >= 199901L
 
 /* C99 says to define __STDC_LIMIT_MACROS before including stdint.h,
 #if __STDC_VERSION__ >= 199901L
 
 /* C99 says to define __STDC_LIMIT_MACROS before including stdint.h,

- * if you want the limit (max/min) macros for int types. 
+ * if you want the limit (max/min) macros for int types.

  */
 #ifndef __STDC_LIMIT_MACROS
 #define __STDC_LIMIT_MACROS 1
  */
 #ifndef __STDC_LIMIT_MACROS
 #define __STDC_LIMIT_MACROS 1


@@ -69,7 +69,7 @@ typedef uint32_t flex_uint32_t;
 typedef signed char flex_int8_t;
 typedef short int flex_int16_t;
 typedef int flex_int32_t;
 typedef signed char flex_int8_t;
 typedef short int flex_int16_t;
 typedef int flex_int32_t;

-typedef unsigned char flex_uint8_t; 
+typedef unsigned char flex_uint8_t;

 typedef unsigned short int flex_uint16_t;
 typedef unsigned int flex_uint32_t;
 #endif /* ! C99 */
 typedef unsigned short int flex_uint16_t;
 typedef unsigned int flex_uint32_t;
 #endif /* ! C99 */


@@ -179,7 +179,7 @@ extern FILE *zconfin, *zconfout;
 #define EOB_ACT_LAST_MATCH 2
 
     #define YY_LESS_LINENO(n)
 #define EOB_ACT_LAST_MATCH 2
 
     #define YY_LESS_LINENO(n)

-    
+

 /* Return all but the first "n" matched characters back to the input stream. */
 #define yyless(n) \
        do \
 /* Return all but the first "n" matched characters back to the input stream. */
 #define yyless(n) \
        do \


@@ -246,7 +246,7 @@ struct yy_buffer_state
 
     int yy_bs_lineno; /**< The line count. */
     int yy_bs_column; /**< The column count. */
 
     int yy_bs_lineno; /**< The line count. */
     int yy_bs_column; /**< The column count. */

-    
+

        /* Whether to try to fill the input buffer when we reach the
         * end of it.
         */
        /* Whether to try to fill the input buffer when we reach the
         * end of it.
         */


@@ -866,7 +866,7 @@ extern int zconfwrap (void );
 #endif
 
     static void yyunput (int c,char *buf_ptr  );
 #endif
 
     static void yyunput (int c,char *buf_ptr  );

-    
+

 #ifndef yytext_ptr
 static void yy_flex_strncpy (char *,yyconst char *,int );
 #endif
 #ifndef yytext_ptr
 static void yy_flex_strncpy (char *,yyconst char *,int );
 #endif


@@ -971,7 +971,7 @@ YY_DECL
        register yy_state_type yy_current_state;
        register char *yy_cp, *yy_bp;
        register int yy_act;
        register yy_state_type yy_current_state;
        register char *yy_cp, *yy_bp;
        register int yy_act;

-    
+

        int str = 0;
        int ts, i;
 
        int str = 0;
        int ts, i;
 


@@ -1574,7 +1574,7 @@ static int yy_get_next_buffer (void)
 {
        register yy_state_type yy_current_state;
        register char *yy_cp;
 {
        register yy_state_type yy_current_state;
        register char *yy_cp;

-    
+

        yy_current_state = (yy_start);
 
        for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp )
        yy_current_state = (yy_start);
 
        for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp )


@@ -1593,7 +1593,7 @@ static int yy_get_next_buffer (void)
     static yy_state_type yy_try_NUL_trans  (yy_state_type yy_current_state )
 {
        register int yy_is_jam;
     static yy_state_type yy_try_NUL_trans  (yy_state_type yy_current_state )
 {
        register int yy_is_jam;

-    
+

        yy_current_state = yy_nxt[yy_current_state][1];
        yy_is_jam = (yy_current_state <= 0);
 
        yy_current_state = yy_nxt[yy_current_state][1];
        yy_is_jam = (yy_current_state <= 0);
 


@@ -1603,7 +1603,7 @@ static int yy_get_next_buffer (void)
     static void yyunput (int c, register char * yy_bp )
 {
        register char *yy_cp;
     static void yyunput (int c, register char * yy_bp )
 {
        register char *yy_cp;

-    
+

     yy_cp = (yy_c_buf_p);
 
        /* undo effects of setting up zconftext */
     yy_cp = (yy_c_buf_p);
 
        /* undo effects of setting up zconftext */


@@ -1646,7 +1646,7 @@ static int yy_get_next_buffer (void)
 
 {
        int c;
 
 {
        int c;

-    
+

        *(yy_c_buf_p) = (yy_hold_char);
 
        if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR )
        *(yy_c_buf_p) = (yy_hold_char);
 
        if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR )


@@ -1713,12 +1713,12 @@ static int yy_get_next_buffer (void)
 
 /** Immediately switch to a different input stream.
  * @param input_file A readable stream.
 
 /** Immediately switch to a different input stream.
  * @param input_file A readable stream.

- * 
+ *

  * @note This function does not reset the start condition to @c INITIAL .
  */
     void zconfrestart  (FILE * input_file )
 {
  * @note This function does not reset the start condition to @c INITIAL .
  */
     void zconfrestart  (FILE * input_file )
 {

-    
+

        if ( ! YY_CURRENT_BUFFER ){
         zconfensure_buffer_stack ();
                YY_CURRENT_BUFFER_LVALUE =
        if ( ! YY_CURRENT_BUFFER ){
         zconfensure_buffer_stack ();
                YY_CURRENT_BUFFER_LVALUE =


@@ -1731,11 +1731,11 @@ static int yy_get_next_buffer (void)
 
 /** Switch to a different input buffer.
  * @param new_buffer The new input buffer.
 
 /** Switch to a different input buffer.
  * @param new_buffer The new input buffer.

- * 
+ *

  */
     void zconf_switch_to_buffer  (YY_BUFFER_STATE  new_buffer )
 {
  */
     void zconf_switch_to_buffer  (YY_BUFFER_STATE  new_buffer )
 {

-    
+

        /* TODO. We should be able to replace this entire function body
         * with
         *              zconfpop_buffer_state();
        /* TODO. We should be able to replace this entire function body
         * with
         *              zconfpop_buffer_state();


@@ -1775,13 +1775,13 @@ static void zconf_load_buffer_state  (void)
 /** Allocate and initialize an input buffer state.
  * @param file A readable stream.
  * @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE.
 /** Allocate and initialize an input buffer state.
  * @param file A readable stream.
  * @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE.

- * 
+ *

  * @return the allocated buffer state.
  */
     YY_BUFFER_STATE zconf_create_buffer  (FILE * file, int  size )
 {
        YY_BUFFER_STATE b;
  * @return the allocated buffer state.
  */
     YY_BUFFER_STATE zconf_create_buffer  (FILE * file, int  size )
 {
        YY_BUFFER_STATE b;

-    
+

        b = (YY_BUFFER_STATE) zconfalloc(sizeof( struct yy_buffer_state )  );
        if ( ! b )
                YY_FATAL_ERROR( "out of dynamic memory in zconf_create_buffer()" );
        b = (YY_BUFFER_STATE) zconfalloc(sizeof( struct yy_buffer_state )  );
        if ( ! b )
                YY_FATAL_ERROR( "out of dynamic memory in zconf_create_buffer()" );


@@ -1804,11 +1804,11 @@ static void zconf_load_buffer_state  (void)
 
 /** Destroy the buffer.
  * @param b a buffer created with zconf_create_buffer()
 
 /** Destroy the buffer.
  * @param b a buffer created with zconf_create_buffer()

- * 
+ *

  */
     void zconf_delete_buffer (YY_BUFFER_STATE  b )
 {
  */
     void zconf_delete_buffer (YY_BUFFER_STATE  b )
 {

-    
+

        if ( ! b )
                return;
 
        if ( ! b )
                return;
 


@@ -1829,7 +1829,7 @@ static void zconf_load_buffer_state  (void)
 
 {
        int oerrno = errno;
 
 {
        int oerrno = errno;

-    
+

        zconf_flush_buffer(b );
 
        b->yy_input_file = file;
        zconf_flush_buffer(b );
 
        b->yy_input_file = file;


@@ -1845,13 +1845,13 @@ static void zconf_load_buffer_state  (void)
     }
 
         b->yy_is_interactive = 0;
     }
 
         b->yy_is_interactive = 0;

-    
+

        errno = oerrno;
 }
 
 /** Discard all buffered characters. On the next scan, YY_INPUT will be called.
  * @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER.
        errno = oerrno;
 }
 
 /** Discard all buffered characters. On the next scan, YY_INPUT will be called.
  * @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER.

- * 
+ *

  */
     void zconf_flush_buffer (YY_BUFFER_STATE  b )
 {
  */
     void zconf_flush_buffer (YY_BUFFER_STATE  b )
 {


@@ -1880,7 +1880,7 @@ static void zconf_load_buffer_state  (void)
  *  the current state. This function will allocate the stack
  *  if necessary.
  *  @param new_buffer The new state.
  *  the current state. This function will allocate the stack
  *  if necessary.
  *  @param new_buffer The new state.

- *  
+ *

  */
 void zconfpush_buffer_state (YY_BUFFER_STATE new_buffer )
 {
  */
 void zconfpush_buffer_state (YY_BUFFER_STATE new_buffer )
 {


@@ -1910,7 +1910,7 @@ void zconfpush_buffer_state (YY_BUFFER_STATE new_buffer )
 
 /** Removes and deletes the top of the stack, if present.
  *  The next element becomes the new top.
 
 /** Removes and deletes the top of the stack, if present.
  *  The next element becomes the new top.

- *  
+ *

  */
 void zconfpop_buffer_state (void)
 {
  */
 void zconfpop_buffer_state (void)
 {


@@ -1934,7 +1934,7 @@ void zconfpop_buffer_state (void)
 static void zconfensure_buffer_stack (void)
 {
        int num_to_alloc;
 static void zconfensure_buffer_stack (void)
 {
        int num_to_alloc;

-    
+

        if (!(yy_buffer_stack)) {
 
                /* First allocation is just for 2 elements, since we don't know if this
        if (!(yy_buffer_stack)) {
 
                /* First allocation is just for 2 elements, since we don't know if this


@@ -1945,9 +1945,9 @@ static void zconfensure_buffer_stack (void)
                (yy_buffer_stack) = (struct yy_buffer_state**)zconfalloc
                                                                (num_to_alloc * sizeof(struct yy_buffer_state*)
                                                                );
                (yy_buffer_stack) = (struct yy_buffer_state**)zconfalloc
                                                                (num_to_alloc * sizeof(struct yy_buffer_state*)
                                                                );

-               
+

                memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*));
                memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*));

-                               
+

                (yy_buffer_stack_max) = num_to_alloc;
                (yy_buffer_stack_top) = 0;
                return;
                (yy_buffer_stack_max) = num_to_alloc;
                (yy_buffer_stack_top) = 0;
                return;


@@ -1973,13 +1973,13 @@ static void zconfensure_buffer_stack (void)
 /** Setup the input buffer state to scan directly from a user-specified character buffer.
  * @param base the character buffer
  * @param size the size in bytes of the character buffer
 /** Setup the input buffer state to scan directly from a user-specified character buffer.
  * @param base the character buffer
  * @param size the size in bytes of the character buffer

- * 
- * @return the newly allocated buffer state object. 
+ *
+ * @return the newly allocated buffer state object.

  */
 YY_BUFFER_STATE zconf_scan_buffer  (char * base, yy_size_t  size )
 {
        YY_BUFFER_STATE b;
  */
 YY_BUFFER_STATE zconf_scan_buffer  (char * base, yy_size_t  size )
 {
        YY_BUFFER_STATE b;

-    
+

        if ( size < 2 ||
             base[size-2] != YY_END_OF_BUFFER_CHAR ||
             base[size-1] != YY_END_OF_BUFFER_CHAR )
        if ( size < 2 ||
             base[size-2] != YY_END_OF_BUFFER_CHAR ||
             base[size-1] != YY_END_OF_BUFFER_CHAR )


@@ -2008,14 +2008,14 @@ YY_BUFFER_STATE zconf_scan_buffer  (char * base, yy_size_t  size )
 /** Setup the input buffer state to scan a string. The next call to zconflex() will
  * scan from a @e copy of @a str.
  * @param str a NUL-terminated string to scan
 /** Setup the input buffer state to scan a string. The next call to zconflex() will
  * scan from a @e copy of @a str.
  * @param str a NUL-terminated string to scan

- * 
+ *

  * @return the newly allocated buffer state object.
  * @note If you want to scan bytes that may contain NUL values, then use
  *       zconf_scan_bytes() instead.
  */
 YY_BUFFER_STATE zconf_scan_string (yyconst char * yystr )
 {
  * @return the newly allocated buffer state object.
  * @note If you want to scan bytes that may contain NUL values, then use
  *       zconf_scan_bytes() instead.
  */
 YY_BUFFER_STATE zconf_scan_string (yyconst char * yystr )
 {

-    
+

        return zconf_scan_bytes(yystr,strlen(yystr) );
 }
 
        return zconf_scan_bytes(yystr,strlen(yystr) );
 }
 


@@ -2023,7 +2023,7 @@ YY_BUFFER_STATE zconf_scan_string (yyconst char * yystr )
  * scan from a @e copy of @a bytes.
  * @param bytes the byte buffer to scan
  * @param len the number of bytes in the buffer pointed to by @a bytes.
  * scan from a @e copy of @a bytes.
  * @param bytes the byte buffer to scan
  * @param len the number of bytes in the buffer pointed to by @a bytes.

- * 
+ *

  * @return the newly allocated buffer state object.
  */
 YY_BUFFER_STATE zconf_scan_bytes  (yyconst char * yybytes, int  _yybytes_len )
  * @return the newly allocated buffer state object.
  */
 YY_BUFFER_STATE zconf_scan_bytes  (yyconst char * yybytes, int  _yybytes_len )


@@ -2032,7 +2032,7 @@ YY_BUFFER_STATE zconf_scan_bytes  (yyconst char * yybytes, int  _yybytes_len )
        char *buf;
        yy_size_t n;
        int i;
        char *buf;
        yy_size_t n;
        int i;

-    
+

        /* Get memory for full buffer, including space for trailing EOB's. */
        n = _yybytes_len + 2;
        buf = (char *) zconfalloc(n  );
        /* Get memory for full buffer, including space for trailing EOB's. */
        n = _yybytes_len + 2;
        buf = (char *) zconfalloc(n  );


@@ -2086,16 +2086,16 @@ static void yy_fatal_error (yyconst char* msg )
 /* Accessor  methods (get/set functions) to struct members. */
 
 /** Get the current line number.
 /* Accessor  methods (get/set functions) to struct members. */
 
 /** Get the current line number.

- * 
+ *

  */
 int zconfget_lineno  (void)
 {
  */
 int zconfget_lineno  (void)
 {

-        
+

     return zconflineno;
 }
 
 /** Get the input stream.
     return zconflineno;
 }
 
 /** Get the input stream.

- * 
+ *

  */
 FILE *zconfget_in  (void)
 {
  */
 FILE *zconfget_in  (void)
 {


@@ -2103,7 +2103,7 @@ FILE *zconfget_in  (void)
 }
 
 /** Get the output stream.
 }
 
 /** Get the output stream.

- * 
+ *

  */
 FILE *zconfget_out  (void)
 {
  */
 FILE *zconfget_out  (void)
 {


@@ -2111,7 +2111,7 @@ FILE *zconfget_out  (void)
 }
 
 /** Get the length of the current token.
 }
 
 /** Get the length of the current token.

- * 
+ *

  */
 int zconfget_leng  (void)
 {
  */
 int zconfget_leng  (void)
 {


@@ -2119,7 +2119,7 @@ int zconfget_leng  (void)
 }
 
 /** Get the current token.
 }
 
 /** Get the current token.

- * 
+ *

  */
 
 char *zconfget_text  (void)
  */
 
 char *zconfget_text  (void)


@@ -2129,18 +2129,18 @@ char *zconfget_text  (void)
 
 /** Set the current line number.
  * @param line_number
 
 /** Set the current line number.
  * @param line_number

- * 
+ *

  */
 void zconfset_lineno (int  line_number )
 {
  */
 void zconfset_lineno (int  line_number )
 {

-    
+

     zconflineno = line_number;
 }
 
 /** Set the input stream. This does not discard the current
  * input buffer.
  * @param in_str A readable stream.
     zconflineno = line_number;
 }
 
 /** Set the input stream. This does not discard the current
  * input buffer.
  * @param in_str A readable stream.

- * 
+ *

  * @see zconf_switch_to_buffer
  */
 void zconfset_in (FILE *  in_str )
  * @see zconf_switch_to_buffer
  */
 void zconfset_in (FILE *  in_str )


@@ -2194,7 +2194,7 @@ static int yy_init_globals (void)
 /* zconflex_destroy is for both reentrant and non-reentrant scanners. */
 int zconflex_destroy  (void)
 {
 /* zconflex_destroy is for both reentrant and non-reentrant scanners. */
 int zconflex_destroy  (void)
 {

-    
+

     /* Pop the buffer stack, destroying each element. */
        while(YY_CURRENT_BUFFER){
                zconf_delete_buffer(YY_CURRENT_BUFFER  );
     /* Pop the buffer stack, destroying each element. */
        while(YY_CURRENT_BUFFER){
                zconf_delete_buffer(YY_CURRENT_BUFFER  );

diff --git a/util/kconfig/lxdialog/BIG.FAT.WARNING b/util/kconfig/lxdialog/BIG.FAT.WARNING
index a8999d82bdb3b5c00a9668de8f5da89b91c0cc08..7cb5a7ec93d27ec6c98b2565e6399d3f342a813a 100644 (file)
--- a/util/kconfig/lxdialog/BIG.FAT.WARNING
+++ b/util/kconfig/lxdialog/BIG.FAT.WARNING
@@ -1,4 +1,4 @@
 This is NOT the official version of dialog.  This version has been
 significantly modified from the original.  It is for use by the Linux
 This is NOT the official version of dialog.  This version has been
 significantly modified from the original.  It is for use by the Linux

-kernel configuration script.  Please do not bother Savio Lam with 
+kernel configuration script.  Please do not bother Savio Lam with

 questions about this program.
 questions about this program.

diff --git a/util/kconfig/lxdialog/menubox.c b/util/kconfig/lxdialog/menubox.c
index 243d6c0cb32804992159eb212378ad5b1dd4e5bb..fe882fc2841de92d52306f9c22ea3d4688c4ac0c 100644 (file)
--- a/util/kconfig/lxdialog/menubox.c
+++ b/util/kconfig/lxdialog/menubox.c
@@ -26,7 +26,7 @@
  *
  *    *)  A bugfix for the Page-Down problem
  *
  *
  *    *)  A bugfix for the Page-Down problem
  *

- *    *)  Formerly when I used Page Down and Page Up, the cursor would be set 
+ *    *)  Formerly when I used Page Down and Page Up, the cursor would be set

  *        to the first position in the menu box.  Now lxdialog is a bit
  *        smarter and works more like other menu systems (just have a look at
  *        it).
  *        to the first position in the menu box.  Now lxdialog is a bit
  *        smarter and works more like other menu systems (just have a look at
  *        it).

diff --git a/util/kconfig/mconf.c b/util/kconfig/mconf.c
index fc804bb366ffd869bc588352829c3203123179cb..692c0e954d4421200940a3c4c0571952f2946e07 100644 (file)
--- a/util/kconfig/mconf.c
+++ b/util/kconfig/mconf.c
@@ -506,7 +506,7 @@ static void build_conf(struct menu *menu)
                        if (def_menu) {
                                item_add_str(" (%s)", _(menu_get_prompt(def_menu)));
                                item_add_str("  --->");
                        if (def_menu) {
                                item_add_str(" (%s)", _(menu_get_prompt(def_menu)));
                                item_add_str("  --->");

-#if 0 
+#if 0

 /* coreboot doesn't need this representation */
                                if (def_menu->list) {
                                        indent += 2;
 /* coreboot doesn't need this representation */
                                if (def_menu->list) {
                                        indent += 2;

diff --git a/util/kconfig/regex.c b/util/kconfig/regex.c
index 8169880d7e4f8cb201116d1a14d9d52f1a8427a5..e63c8148b34bf787b8985b82ef12d7cfaaf90d80 100644 (file)
--- a/util/kconfig/regex.c
+++ b/util/kconfig/regex.c
@@ -75,7 +75,7 @@ char *realloc ();
 
 /* This must be nonzero for the wordchar and notwordchar pattern
    commands in re_match_2.  */
 
 /* This must be nonzero for the wordchar and notwordchar pattern
    commands in re_match_2.  */

-#ifndef Sword 
+#ifndef Sword

 #define Sword 1
 #endif
 
 #define Sword 1
 #endif
 


@@ -173,8 +173,8 @@ init_syntax_once ()
    use `alloca' instead of `malloc'.  This is because using malloc in
    re_search* or re_match* could cause memory leaks when C-g is used in
    Emacs; also, malloc is slower and causes storage fragmentation.  On
    use `alloca' instead of `malloc'.  This is because using malloc in
    re_search* or re_match* could cause memory leaks when C-g is used in
    Emacs; also, malloc is slower and causes storage fragmentation.  On

-   the other hand, malloc is more portable, and easier to debug.  
-   
+   the other hand, malloc is more portable, and easier to debug.
+

    Because we sometimes use alloca, some routines have to be macros,
    not functions -- `alloca'-allocated space disappears at the end of the
    function it is called in.  */
    Because we sometimes use alloca, some routines have to be macros,
    not functions -- `alloca'-allocated space disappears at the end of the
    function it is called in.  */


@@ -199,7 +199,7 @@ init_syntax_once ()
 #ifndef _AIX /* Already did AIX, up at the top.  */
 char *alloca ();
 #endif /* not _AIX */
 #ifndef _AIX /* Already did AIX, up at the top.  */
 char *alloca ();
 #endif /* not _AIX */

-#endif /* not HAVE_ALLOCA_H */ 
+#endif /* not HAVE_ALLOCA_H */

 #endif /* not __GNUC__ */
 
 #endif /* not alloca */
 #endif /* not __GNUC__ */
 
 #endif /* not alloca */


@@ -302,9 +302,9 @@ typedef enum
 
         /* Analogously, for end of buffer/string.  */
   endbuf,
 
         /* Analogously, for end of buffer/string.  */
   endbuf,

- 
+

         /* Followed by two byte relative address to which to jump.  */
         /* Followed by two byte relative address to which to jump.  */

-  jump, 
+  jump,

 
        /* Same as jump, but marks the end of an alternative.  */
   jump_past_alt,
 
        /* Same as jump, but marks the end of an alternative.  */
   jump_past_alt,


@@ -312,11 +312,11 @@ typedef enum
         /* Followed by two-byte relative address of place to resume at
            in case of failure.  */
   on_failure_jump,
         /* Followed by two-byte relative address of place to resume at
            in case of failure.  */
   on_failure_jump,

-       
+

         /* Like on_failure_jump, but pushes a placeholder instead of the
            current string position when executed.  */
   on_failure_keep_string_jump,
         /* Like on_failure_jump, but pushes a placeholder instead of the
            current string position when executed.  */
   on_failure_keep_string_jump,

-  
+

         /* Throw away latest failure point and then jump to following
            two-byte relative address.  */
   pop_failure_jump,
         /* Throw away latest failure point and then jump to following
            two-byte relative address.  */
   pop_failure_jump,


@@ -412,7 +412,7 @@ extract_number (dest, source)
     int *dest;
     unsigned char *source;
 {
     int *dest;
     unsigned char *source;
 {

-  int temp = SIGN_EXTEND_CHAR (*(source + 1)); 
+  int temp = SIGN_EXTEND_CHAR (*(source + 1));

   *dest = *source & 0377;
   *dest += temp << 8;
 }
   *dest = *source & 0377;
   *dest += temp << 8;
 }


@@ -438,7 +438,7 @@ static void
 extract_number_and_incr (destination, source)
     int *destination;
     unsigned char **source;
 extract_number_and_incr (destination, source)
     int *destination;
     unsigned char **source;

-{ 
+{

   extract_number (destination, *source);
   *source += 2;
 }
   extract_number (destination, *source);
   *source += 2;
 }


@@ -487,8 +487,8 @@ print_fastmap (fastmap)
     char *fastmap;
 {
   unsigned was_a_range = 0;
     char *fastmap;
 {
   unsigned was_a_range = 0;

-  unsigned i = 0;  
-  
+  unsigned i = 0;
+

   while (i < (1 << BYTEWIDTH))
     {
       if (fastmap[i++])
   while (i < (1 << BYTEWIDTH))
     {
       if (fastmap[i++])


@@ -507,7 +507,7 @@ print_fastmap (fastmap)
             }
         }
     }
             }
         }
     }

-  putchar ('\n'); 
+  putchar ('\n');

 }
 
 
 }
 
 


@@ -528,7 +528,7 @@ print_partial_compiled_pattern (start, end)
       printf ("(null)\n");
       return;
     }
       printf ("(null)\n");
       return;
     }

-    
+

   /* Loop over pattern commands.  */
   while (p < pend)
     {
   /* Loop over pattern commands.  */
   while (p < pend)
     {


@@ -574,14 +574,14 @@ print_partial_compiled_pattern (start, end)
 
             printf ("/charset%s",
                    (re_opcode_t) *(p - 1) == charset_not ? "_not" : "");
 
             printf ("/charset%s",
                    (re_opcode_t) *(p - 1) == charset_not ? "_not" : "");

-            
+

             assert (p + *p < pend);
 
             for (c = 0; c < *p; c++)
               {
                 unsigned bit;
                 unsigned char map_byte = p[1 + c];
             assert (p + *p < pend);
 
             for (c = 0; c < *p; c++)
               {
                 unsigned bit;
                 unsigned char map_byte = p[1 + c];

-                
+

                 putchar ('/');
 
                for (bit = 0; bit < BYTEWIDTH; bit++)
                 putchar ('/');
 
                for (bit = 0; bit < BYTEWIDTH; bit++)


@@ -618,7 +618,7 @@ print_partial_compiled_pattern (start, end)
        case push_dummy_failure:
           printf ("/push_dummy_failure");
           break;
        case push_dummy_failure:
           printf ("/push_dummy_failure");
           break;

-          
+

         case maybe_pop_jump:
           extract_number_and_incr (&mcnt, &p);
          printf ("/maybe_pop_jump/0/%d", mcnt);
         case maybe_pop_jump:
           extract_number_and_incr (&mcnt, &p);
          printf ("/maybe_pop_jump/0/%d", mcnt);


@@ -627,36 +627,36 @@ print_partial_compiled_pattern (start, end)
         case pop_failure_jump:
          extract_number_and_incr (&mcnt, &p);
          printf ("/pop_failure_jump/0/%d", mcnt);
         case pop_failure_jump:
          extract_number_and_incr (&mcnt, &p);
          printf ("/pop_failure_jump/0/%d", mcnt);

-         break;          
-          
+         break;
+

         case jump_past_alt:
          extract_number_and_incr (&mcnt, &p);
          printf ("/jump_past_alt/0/%d", mcnt);
         case jump_past_alt:
          extract_number_and_incr (&mcnt, &p);
          printf ("/jump_past_alt/0/%d", mcnt);

-         break;          
-          
+         break;
+

         case jump:
          extract_number_and_incr (&mcnt, &p);
          printf ("/jump/0/%d", mcnt);
          break;
 
         case jump:
          extract_number_and_incr (&mcnt, &p);
          printf ("/jump/0/%d", mcnt);
          break;
 

-        case succeed_n: 
+        case succeed_n:

           extract_number_and_incr (&mcnt, &p);
           extract_number_and_incr (&mcnt2, &p);
          printf ("/succeed_n/0/%d/0/%d", mcnt, mcnt2);
           break;
           extract_number_and_incr (&mcnt, &p);
           extract_number_and_incr (&mcnt2, &p);
          printf ("/succeed_n/0/%d/0/%d", mcnt, mcnt2);
           break;

-        
-        case jump_n: 
+
+        case jump_n:

           extract_number_and_incr (&mcnt, &p);
           extract_number_and_incr (&mcnt2, &p);
          printf ("/jump_n/0/%d/0/%d", mcnt, mcnt2);
           break;
           extract_number_and_incr (&mcnt, &p);
           extract_number_and_incr (&mcnt2, &p);
          printf ("/jump_n/0/%d/0/%d", mcnt, mcnt2);
           break;

-        
-        case set_number_at: 
+
+        case set_number_at:

           extract_number_and_incr (&mcnt, &p);
           extract_number_and_incr (&mcnt2, &p);
          printf ("/set_number_at/0/%d/0/%d", mcnt, mcnt2);
           break;
           extract_number_and_incr (&mcnt, &p);
           extract_number_and_incr (&mcnt2, &p);
          printf ("/set_number_at/0/%d/0/%d", mcnt, mcnt2);
           break;

-        
+

         case wordbound:
          printf ("/wordbound");
          break;
         case wordbound:
          printf ("/wordbound");
          break;


@@ -668,10 +668,10 @@ print_partial_compiled_pattern (start, end)
        case wordbeg:
          printf ("/wordbeg");
          break;
        case wordbeg:
          printf ("/wordbeg");
          break;

-          
+

        case wordend:
          printf ("/wordend");
        case wordend:
          printf ("/wordend");

-          
+

 #ifdef emacs
        case before_dot:
          printf ("/before_dot");
 #ifdef emacs
        case before_dot:
          printf ("/before_dot");


@@ -690,7 +690,7 @@ print_partial_compiled_pattern (start, end)
          mcnt = *p++;
          printf ("/%d", mcnt);
           break;
          mcnt = *p++;
          printf ("/%d", mcnt);
           break;

-         
+

        case notsyntaxspec:
           printf ("/notsyntaxspec");
          mcnt = *p++;
        case notsyntaxspec:
           printf ("/notsyntaxspec");
          mcnt = *p++;


@@ -701,7 +701,7 @@ print_partial_compiled_pattern (start, end)
        case wordchar:
          printf ("/wordchar");
           break;
        case wordchar:
          printf ("/wordchar");
           break;

-         
+

        case notwordchar:
          printf ("/notwordchar");
           break;
        case notwordchar:
          printf ("/notwordchar");
           break;


@@ -758,7 +758,7 @@ print_double_string (where, string1, size1, string2, size2)
     int size2;
 {
   unsigned this_char;
     int size2;
 {
   unsigned this_char;

-  
+

   if (where == NULL)
     printf ("(null)");
   else
   if (where == NULL)
     printf ("(null)");
   else


@@ -768,7 +768,7 @@ print_double_string (where, string1, size1, string2, size2)
           for (this_char = where - string1; this_char < size1; this_char++)
             printchar (string1[this_char]);
 
           for (this_char = where - string1; this_char < size1; this_char++)
             printchar (string1[this_char]);
 

-          where = string2;    
+          where = string2;

         }
 
       for (this_char = where - string2; this_char < size2; this_char++)
         }
 
       for (this_char = where - string2; this_char < size2; this_char++)


@@ -809,7 +809,7 @@ re_set_syntax (syntax)
     reg_syntax_t syntax;
 {
   reg_syntax_t ret = re_syntax_options;
     reg_syntax_t syntax;
 {
   reg_syntax_t ret = re_syntax_options;

-  
+

   re_syntax_options = syntax;
   return ret;
 }
   re_syntax_options = syntax;
   return ret;
 }


@@ -845,7 +845,7 @@ static boolean at_begline_loc_p (), at_endline_loc_p ();
 static boolean group_in_compile_stack ();
 static reg_errcode_t compile_range ();
 
 static boolean group_in_compile_stack ();
 static reg_errcode_t compile_range ();
 

-/* Fetch the next character in the uncompiled pattern---translating it 
+/* Fetch the next character in the uncompiled pattern---translating it

    if necessary.  Also cast from a signed character in the constant
    string passed to us by the user to an unsigned char that we can use
    as an array index (in, e.g., `translate').  */
    if necessary.  Also cast from a signed character in the constant
    string passed to us by the user to an unsigned char that we can use
    as an array index (in, e.g., `translate').  */


@@ -985,7 +985,7 @@ typedef struct
   pattern_offset_t begalt_offset;
   pattern_offset_t fixup_alt_jump;
   pattern_offset_t inner_group_offset;
   pattern_offset_t begalt_offset;
   pattern_offset_t fixup_alt_jump;
   pattern_offset_t inner_group_offset;

-  pattern_offset_t laststart_offset;  
+  pattern_offset_t laststart_offset;

   regnum_t regnum;
 } compile_stack_elt_t;
 
   regnum_t regnum;
 } compile_stack_elt_t;
 


@@ -1028,7 +1028,7 @@ typedef struct
            PATFETCH (c);                                               \
          }                                                             \
        }                                                               \
            PATFETCH (c);                                               \
          }                                                             \
        }                                                               \

-    }          
+    }

 
 #define CHAR_CLASS_MAX_LENGTH  6 /* Namely, `xdigit'.  */
 
 
 #define CHAR_CLASS_MAX_LENGTH  6 /* Namely, `xdigit'.  */
 


@@ -1054,7 +1054,7 @@ typedef struct
      `fastmap_accurate' is zero;
      `re_nsub' is the number of subexpressions in PATTERN;
      `not_bol' and `not_eol' are zero;
      `fastmap_accurate' is zero;
      `re_nsub' is the number of subexpressions in PATTERN;
      `not_bol' and `not_eol' are zero;

-   
+

    The `fastmap' and `newline_anchor' fields are neither
    examined nor set.  */
 
    The `fastmap' and `newline_anchor' fields are neither
    examined nor set.  */
 


@@ -1069,20 +1069,20 @@ regex_compile (pattern, size, syntax, bufp)
      `char *' (i.e., signed), we declare these variables as unsigned, so
      they can be reliably used as array indices.  */
   register unsigned char c, c1;
      `char *' (i.e., signed), we declare these variables as unsigned, so
      they can be reliably used as array indices.  */
   register unsigned char c, c1;

-  
+

   /* A random tempory spot in PATTERN.  */
   const char *p1;
 
   /* Points to the end of the buffer, where we should append.  */
   register unsigned char *b;
   /* A random tempory spot in PATTERN.  */
   const char *p1;
 
   /* Points to the end of the buffer, where we should append.  */
   register unsigned char *b;

-  
+

   /* Keeps track of unclosed groups.  */
   compile_stack_type compile_stack;
 
   /* Points to the current (ending) position in the pattern.  */
   const char *p = pattern;
   const char *pend = pattern + size;
   /* Keeps track of unclosed groups.  */
   compile_stack_type compile_stack;
 
   /* Points to the current (ending) position in the pattern.  */
   const char *p = pattern;
   const char *pend = pattern + size;

-  
+

   /* How to translate the characters in the pattern.  */
   char *translate = bufp->translate;
 
   /* How to translate the characters in the pattern.  */
   char *translate = bufp->translate;
 


@@ -1103,7 +1103,7 @@ regex_compile (pattern, size, syntax, bufp)
   /* Place in the uncompiled pattern (i.e., the {) to
      which to go back if the interval is invalid.  */
   const char *beg_interval;
   /* Place in the uncompiled pattern (i.e., the {) to
      which to go back if the interval is invalid.  */
   const char *beg_interval;

-                
+

   /* Address of the place where a forward jump should go to the end of
      the containing expression.  Each alternative of an `or' -- except the
      last -- ends with a forward jump of this sort.  */
   /* Address of the place where a forward jump should go to the end of
      the containing expression.  Each alternative of an `or' -- except the
      last -- ends with a forward jump of this sort.  */


@@ -1119,7 +1119,7 @@ regex_compile (pattern, size, syntax, bufp)
   if (debug)
     {
       unsigned debug_count;
   if (debug)
     {
       unsigned debug_count;

-      
+

       for (debug_count = 0; debug_count < size; debug_count++)
         printchar (pattern[debug_count]);
       putchar ('\n');
       for (debug_count = 0; debug_count < size; debug_count++)
         printchar (pattern[debug_count]);
       putchar ('\n');


@@ -1143,9 +1143,9 @@ regex_compile (pattern, size, syntax, bufp)
      printer (for debugging) will think there's no pattern.  We reset it
      at the end.  */
   bufp->used = 0;
      printer (for debugging) will think there's no pattern.  We reset it
      at the end.  */
   bufp->used = 0;

-  
+

   /* Always count groups, whether or not bufp->no_sub is set.  */
   /* Always count groups, whether or not bufp->no_sub is set.  */

-  bufp->re_nsub = 0;                           
+  bufp->re_nsub = 0;

 
 #if !defined (emacs) && !defined (SYNTAX_TABLE)
   /* Initialize the syntax table.  */
 
 #if !defined (emacs) && !defined (SYNTAX_TABLE)
   /* Initialize the syntax table.  */


@@ -1196,7 +1196,7 @@ regex_compile (pattern, size, syntax, bufp)
         case '$':
           {
             if (   /* If at end of pattern, it's an operator.  */
         case '$':
           {
             if (   /* If at end of pattern, it's an operator.  */

-                   p == pend 
+                   p == pend

                    /* If context independent, it's an operator.  */
                 || syntax & RE_CONTEXT_INDEP_ANCHORS
                    /* Otherwise, depends on what's next.  */
                    /* If context independent, it's an operator.  */
                 || syntax & RE_CONTEXT_INDEP_ANCHORS
                    /* Otherwise, depends on what's next.  */


@@ -1227,7 +1227,7 @@ regex_compile (pattern, size, syntax, bufp)
           {
             /* Are we optimizing this jump?  */
             boolean keep_string_p = false;
           {
             /* Are we optimizing this jump?  */
             boolean keep_string_p = false;

-            
+

             /* 1 means zero (many) matches is allowed.  */
             char zero_times_ok = 0, many_times_ok = 0;
 
             /* 1 means zero (many) matches is allowed.  */
             char zero_times_ok = 0, many_times_ok = 0;
 


@@ -1275,7 +1275,7 @@ regex_compile (pattern, size, syntax, bufp)
 
             /* Star, etc. applied to an empty pattern is equivalent
                to an empty pattern.  */
 
             /* Star, etc. applied to an empty pattern is equivalent
                to an empty pattern.  */

-            if (!laststart)  
+            if (!laststart)

               break;
 
             /* Now we know whether or not zero matches is allowed
               break;
 
             /* Now we know whether or not zero matches is allowed


@@ -1284,7 +1284,7 @@ regex_compile (pattern, size, syntax, bufp)
               { /* More than one repetition is allowed, so put in at the
                    end a backward relative jump from `b' to before the next
                    jump we're going to put in below (which jumps from
               { /* More than one repetition is allowed, so put in at the
                    end a backward relative jump from `b' to before the next
                    jump we're going to put in below (which jumps from

-                   laststart to after this jump).  
+                   laststart to after this jump).

 
                    But if we are at the `*' in the exact sequence `.*\n',
                    insert an unconditional jump backwards to the .,
 
                    But if we are at the `*' in the exact sequence `.*\n',
                    insert an unconditional jump backwards to the .,


@@ -1361,7 +1361,7 @@ regex_compile (pattern, size, syntax, bufp)
 
             /* We test `*p == '^' twice, instead of using an if
                statement, so we only need one BUF_PUSH.  */
 
             /* We test `*p == '^' twice, instead of using an if
                statement, so we only need one BUF_PUSH.  */

-            BUF_PUSH (*p == '^' ? charset_not : charset); 
+            BUF_PUSH (*p == '^' ? charset_not : charset);

             if (*p == '^')
               p++;
 
             if (*p == '^')
               p++;
 


@@ -1411,8 +1411,8 @@ regex_compile (pattern, size, syntax, bufp)
                    was a character: if this is a hyphen not at the
                    beginning or the end of a list, then it's the range
                    operator.  */
                    was a character: if this is a hyphen not at the
                    beginning or the end of a list, then it's the range
                    operator.  */

-                if (c == '-' 
-                    && !(p - 2 >= pattern && p[-2] == '[') 
+                if (c == '-'
+                    && !(p - 2 >= pattern && p[-2] == '[')

                     && !(p - 3 >= pattern && p[-3] == '[' && p[-2] == '^')
                     && *p != ']')
                   {
                     && !(p - 3 >= pattern && p[-3] == '[' && p[-2] == '^')
                     && *p != ']')
                   {


@@ -1427,7 +1427,7 @@ regex_compile (pattern, size, syntax, bufp)
 
                    /* Move past the `-'.  */
                     PATFETCH (c1);
 
                    /* Move past the `-'.  */
                     PATFETCH (c1);

-                    
+

                     ret = compile_range (&p, pend, translate, syntax, b);
                     if (ret != REG_NOERROR) return ret;
                   }
                     ret = compile_range (&p, pend, translate, syntax, b);
                     if (ret != REG_NOERROR) return ret;
                   }


@@ -1456,7 +1456,7 @@ regex_compile (pattern, size, syntax, bufp)
                     str[c1] = '\0';
 
                     /* If isn't a word bracketed by `[:' and:`]':
                     str[c1] = '\0';
 
                     /* If isn't a word bracketed by `[:' and:`]':

-                       undo the ending character, the letters, and leave 
+                       undo the ending character, the letters, and leave

                        the leading `:' and `[' (but set bits for them).  */
                     if (c == ':' && *p == ']')
                       {
                        the leading `:' and `[' (but set bits for them).  */
                     if (c == ':' && *p == ']')
                       {


@@ -1473,12 +1473,12 @@ regex_compile (pattern, size, syntax, bufp)
                         boolean is_space = STREQ (str, "space");
                         boolean is_upper = STREQ (str, "upper");
                         boolean is_xdigit = STREQ (str, "xdigit");
                         boolean is_space = STREQ (str, "space");
                         boolean is_upper = STREQ (str, "upper");
                         boolean is_xdigit = STREQ (str, "xdigit");

-                        
+

                         if (!IS_CHAR_CLASS (str)) return REG_ECTYPE;
 
                         /* Throw away the ] at the end of the character
                            class.  */
                         if (!IS_CHAR_CLASS (str)) return REG_ECTYPE;
 
                         /* Throw away the ] at the end of the character
                            class.  */

-                        PATFETCH (c);                                  
+                        PATFETCH (c);

 
                         if (p == pend) return REG_EBRACK;
 
 
                         if (p == pend) return REG_EBRACK;
 


@@ -1503,7 +1503,7 @@ regex_compile (pattern, size, syntax, bufp)
                     else
                       {
                         c1++;
                     else
                       {
                         c1++;

-                        while (c1--)    
+                        while (c1--)

                           PATUNFETCH;
                         SET_LIST_BIT ('[');
                         SET_LIST_BIT (':');
                           PATUNFETCH;
                         SET_LIST_BIT ('[');
                         SET_LIST_BIT (':');


@@ -1519,8 +1519,8 @@ regex_compile (pattern, size, syntax, bufp)
 
             /* Discard any (non)matching list bytes that are all 0 at the
                end of the map.  Decrease the map-length byte too.  */
 
             /* Discard any (non)matching list bytes that are all 0 at the
                end of the map.  Decrease the map-length byte too.  */

-            while ((int) b[-1] > 0 && b[b[-1] - 1] == 0) 
-              b[-1]--; 
+            while ((int) b[-1] > 0 && b[b[-1] - 1] == 0)
+              b[-1]--;

             b += b[-1];
           }
           break;
             b += b[-1];
           }
           break;


@@ -1580,7 +1580,7 @@ regex_compile (pattern, size, syntax, bufp)
               regnum++;
 
               if (COMPILE_STACK_FULL)
               regnum++;
 
               if (COMPILE_STACK_FULL)

-                { 
+                {

                   RETALLOC (compile_stack.stack, compile_stack.size << 1,
                             compile_stack_elt_t);
                   if (compile_stack.stack == NULL) return REG_ESPACE;
                   RETALLOC (compile_stack.stack, compile_stack.size << 1,
                             compile_stack_elt_t);
                   if (compile_stack.stack == NULL) return REG_ESPACE;


@@ -1593,7 +1593,7 @@ regex_compile (pattern, size, syntax, bufp)
                  whole pattern moves because of realloc, they will still
                  be valid.  */
               COMPILE_STACK_TOP.begalt_offset = begalt - bufp->buffer;
                  whole pattern moves because of realloc, they will still
                  be valid.  */
               COMPILE_STACK_TOP.begalt_offset = begalt - bufp->buffer;

-              COMPILE_STACK_TOP.fixup_alt_jump 
+              COMPILE_STACK_TOP.fixup_alt_jump

                 = fixup_alt_jump ? fixup_alt_jump - bufp->buffer + 1 : 0;
               COMPILE_STACK_TOP.laststart_offset = b - bufp->buffer;
               COMPILE_STACK_TOP.regnum = regnum;
                 = fixup_alt_jump ? fixup_alt_jump - bufp->buffer + 1 : 0;
               COMPILE_STACK_TOP.laststart_offset = b - bufp->buffer;
               COMPILE_STACK_TOP.regnum = regnum;


@@ -1607,7 +1607,7 @@ regex_compile (pattern, size, syntax, bufp)
                   COMPILE_STACK_TOP.inner_group_offset = b - bufp->buffer + 2;
                   BUF_PUSH_3 (start_memory, regnum, 0);
                 }
                   COMPILE_STACK_TOP.inner_group_offset = b - bufp->buffer + 2;
                   BUF_PUSH_3 (start_memory, regnum, 0);
                 }

-                
+

               compile_stack.avail++;
 
               fixup_alt_jump = 0;
               compile_stack.avail++;
 
               fixup_alt_jump = 0;


@@ -1636,7 +1636,7 @@ regex_compile (pattern, size, syntax, bufp)
                      `pop_failure_jump' to pop.  See comments at
                      `push_dummy_failure' in `re_match_2'.  */
                   BUF_PUSH (push_dummy_failure);
                      `pop_failure_jump' to pop.  See comments at
                      `push_dummy_failure' in `re_match_2'.  */
                   BUF_PUSH (push_dummy_failure);

-                  
+

                   /* We allocated space for this jump when we assigned
                      to `fixup_alt_jump', in the `handle_alt' case below.  */
                   STORE_JUMP (jump_past_alt, fixup_alt_jump, b - 1);
                   /* We allocated space for this jump when we assigned
                      to `fixup_alt_jump', in the `handle_alt' case below.  */
                   STORE_JUMP (jump_past_alt, fixup_alt_jump, b - 1);


@@ -1658,11 +1658,11 @@ regex_compile (pattern, size, syntax, bufp)
                    as in `(ab)c(de)' -- the second group is #2.  */
                 regnum_t this_group_regnum;
 
                    as in `(ab)c(de)' -- the second group is #2.  */
                 regnum_t this_group_regnum;
 

-                compile_stack.avail--;         
+                compile_stack.avail--;

                 begalt = bufp->buffer + COMPILE_STACK_TOP.begalt_offset;
                 fixup_alt_jump
                   = COMPILE_STACK_TOP.fixup_alt_jump
                 begalt = bufp->buffer + COMPILE_STACK_TOP.begalt_offset;
                 fixup_alt_jump
                   = COMPILE_STACK_TOP.fixup_alt_jump

-                    ? bufp->buffer + COMPILE_STACK_TOP.fixup_alt_jump - 1 
+                    ? bufp->buffer + COMPILE_STACK_TOP.fixup_alt_jump - 1

                     : 0;
                 laststart = bufp->buffer + COMPILE_STACK_TOP.laststart_offset;
                 this_group_regnum = COMPILE_STACK_TOP.regnum;
                     : 0;
                 laststart = bufp->buffer + COMPILE_STACK_TOP.laststart_offset;
                 this_group_regnum = COMPILE_STACK_TOP.regnum;


@@ -1677,7 +1677,7 @@ regex_compile (pattern, size, syntax, bufp)
                   {
                     unsigned char *inner_group_loc
                       = bufp->buffer + COMPILE_STACK_TOP.inner_group_offset;
                   {
                     unsigned char *inner_group_loc
                       = bufp->buffer + COMPILE_STACK_TOP.inner_group_offset;

-                    
+

                     *inner_group_loc = regnum - this_group_regnum;
                     BUF_PUSH_3 (stop_memory, this_group_regnum,
                                 regnum - this_group_regnum);
                     *inner_group_loc = regnum - this_group_regnum;
                     BUF_PUSH_3 (stop_memory, this_group_regnum,
                                 regnum - this_group_regnum);


@@ -1706,10 +1706,10 @@ regex_compile (pattern, size, syntax, bufp)
                  jump (put in below, which in turn will jump to the next
                  (if any) alternative's such jump, etc.).  The last such
                  jump jumps to the correct final destination.  A picture:
                  jump (put in below, which in turn will jump to the next
                  (if any) alternative's such jump, etc.).  The last such
                  jump jumps to the correct final destination.  A picture:

-                          _____ _____ 
-                          |   | |   |   
-                          |   v |   v 
-                         a | b   | c   
+                          _____ _____
+                          |   | |   |
+                          |   v |   v
+                         a | b   | c

 
                  If we are at `b', then fixup_alt_jump right now points to a
                  three-byte space after `a'.  We'll put in the jump, set
 
                  If we are at `b', then fixup_alt_jump right now points to a
                  three-byte space after `a'.  We'll put in the jump, set


@@ -1731,10 +1731,10 @@ regex_compile (pattern, size, syntax, bufp)
               break;
 
 
               break;
 
 

-            case '{': 
+            case '{':

               /* If \{ is a literal.  */
               if (!(syntax & RE_INTERVALS)
               /* If \{ is a literal.  */
               if (!(syntax & RE_INTERVALS)

-                     /* If we're at `\{' and it's not the open-interval 
+                     /* If we're at `\{' and it's not the open-interval

                         operator.  */
                   || ((syntax & RE_INTERVALS) && (syntax & RE_NO_BK_BRACES))
                   || (p - 2 == pattern  &&  p == pend))
                         operator.  */
                   || ((syntax & RE_INTERVALS) && (syntax & RE_NO_BK_BRACES))
                   || (p - 2 == pattern  &&  p == pend))


@@ -1773,11 +1773,11 @@ regex_compile (pattern, size, syntax, bufp)
                   {
                     if (syntax & RE_NO_BK_BRACES)
                       goto unfetch_interval;
                   {
                     if (syntax & RE_NO_BK_BRACES)
                       goto unfetch_interval;

-                    else 
+                    else

                       return REG_BADBR;
                   }
 
                       return REG_BADBR;
                   }
 

-                if (!(syntax & RE_NO_BK_BRACES)) 
+                if (!(syntax & RE_NO_BK_BRACES))

                   {
                     if (c != '\\') return REG_EBRACE;
 
                   {
                     if (c != '\\') return REG_EBRACE;
 


@@ -1788,7 +1788,7 @@ regex_compile (pattern, size, syntax, bufp)
                   {
                     if (syntax & RE_NO_BK_BRACES)
                       goto unfetch_interval;
                   {
                     if (syntax & RE_NO_BK_BRACES)
                       goto unfetch_interval;

-                    else 
+                    else

                       return REG_BADBR;
                   }
 
                       return REG_BADBR;
                   }
 


@@ -1824,7 +1824,7 @@ regex_compile (pattern, size, syntax, bufp)
                       jump_n <succeed_n addr> <jump count>
                     (The upper bound and `jump_n' are omitted if
                     `upper_bound' is 1, though.)  */
                       jump_n <succeed_n addr> <jump count>
                     (The upper bound and `jump_n' are omitted if
                     `upper_bound' is 1, though.)  */

-                 else 
+                 else

                    { /* If the upper bound is > 1, we need to insert
                         more at the end of the loop.  */
                      unsigned nbytes = 10 + (upper_bound > 1) * 10;
                    { /* If the upper bound is > 1, we need to insert
                         more at the end of the loop.  */
                      unsigned nbytes = 10 + (upper_bound > 1) * 10;


@@ -1841,7 +1841,7 @@ regex_compile (pattern, size, syntax, bufp)
                                    lower_bound);
                      b += 5;
 
                                    lower_bound);
                      b += 5;
 

-                     /* Code to initialize the lower bound.  Insert 
+                     /* Code to initialize the lower bound.  Insert

                         before the `succeed_n'.  The `5' is the last two
                         bytes of this `set_number_at', plus 3 bytes of
                         the following `succeed_n'.  */
                         before the `succeed_n'.  The `5' is the last two
                         bytes of this `set_number_at', plus 3 bytes of
                         the following `succeed_n'.  */


@@ -1852,7 +1852,7 @@ regex_compile (pattern, size, syntax, bufp)
                        { /* More than one repetition is allowed, so
                             append a backward jump to the `succeed_n'
                             that starts this interval.
                        { /* More than one repetition is allowed, so
                             append a backward jump to the `succeed_n'
                             that starts this interval.

-                            
+

                             When we've reached this during matching,
                             we'll have matched the interval once, so
                             jump back only `upper_bound - 1' times.  */
                             When we've reached this during matching,
                             we'll have matched the interval once, so
                             jump back only `upper_bound - 1' times.  */


@@ -1870,7 +1870,7 @@ regex_compile (pattern, size, syntax, bufp)
                             so everything is getting moved up by 5.
                             Conclusion: (b - 2) - (laststart + 3) + 5,
                             i.e., b - laststart.
                             so everything is getting moved up by 5.
                             Conclusion: (b - 2) - (laststart + 3) + 5,
                             i.e., b - laststart.

-                            
+

                             We insert this at the beginning of the loop
                             so that if we fail during matching, we'll
                             reinitialize the bounds.  */
                             We insert this at the beginning of the loop
                             so that if we fail during matching, we'll
                             reinitialize the bounds.  */


@@ -1891,7 +1891,7 @@ regex_compile (pattern, size, syntax, bufp)
                beg_interval = NULL;
 
                /* normal_char and normal_backslash need `c'.  */
                beg_interval = NULL;
 
                /* normal_char and normal_backslash need `c'.  */

-               PATFETCH (c);   
+               PATFETCH (c);

 
                if (!(syntax & RE_NO_BK_BRACES))
                  {
 
                if (!(syntax & RE_NO_BK_BRACES))
                  {


@@ -1907,7 +1907,7 @@ regex_compile (pattern, size, syntax, bufp)
               BUF_PUSH (at_dot);
               break;
 
               BUF_PUSH (at_dot);
               break;
 

-            case 's':  
+            case 's':

               laststart = b;
               PATFETCH (c);
               BUF_PUSH_2 (syntaxspec, syntax_spec_code[c]);
               laststart = b;
               PATFETCH (c);
               BUF_PUSH_2 (syntaxspec, syntax_spec_code[c]);


@@ -1998,11 +1998,11 @@ regex_compile (pattern, size, syntax, bufp)
         /* Expects the character in `c'.  */
        normal_char:
              /* If no exactn currently being built.  */
         /* Expects the character in `c'.  */
        normal_char:
              /* If no exactn currently being built.  */

-          if (!pending_exact 
+          if (!pending_exact

 
               /* If last exactn not at current position.  */
               || pending_exact + *pending_exact + 1 != b
 
               /* If last exactn not at current position.  */
               || pending_exact + *pending_exact + 1 != b

-              
+

               /* We have only one byte following the exactn for the count.  */
              || *pending_exact == (1 << BYTEWIDTH) - 1
 
               /* We have only one byte following the exactn for the count.  */
              || *pending_exact == (1 << BYTEWIDTH) - 1
 


@@ -2017,26 +2017,26 @@ regex_compile (pattern, size, syntax, bufp)
                       : (p[0] == '\\' && p[1] == '{'))))
            {
              /* Start building a new exactn.  */
                       : (p[0] == '\\' && p[1] == '{'))))
            {
              /* Start building a new exactn.  */

-              
+

               laststart = b;
 
              BUF_PUSH_2 (exactn, 0);
              pending_exact = b - 1;
             }
               laststart = b;
 
              BUF_PUSH_2 (exactn, 0);
              pending_exact = b - 1;
             }

-            
+

          BUF_PUSH (c);
           (*pending_exact)++;
          break;
         } /* switch (c) */
     } /* while p != pend */
 
          BUF_PUSH (c);
           (*pending_exact)++;
          break;
         } /* switch (c) */
     } /* while p != pend */
 

-  
+

   /* Through the pattern now.  */
   /* Through the pattern now.  */

-  
+

   if (fixup_alt_jump)
     STORE_JUMP (jump_past_alt, fixup_alt_jump, b);
 
   if (fixup_alt_jump)
     STORE_JUMP (jump_past_alt, fixup_alt_jump, b);
 

-  if (!COMPILE_STACK_EMPTY) 
+  if (!COMPILE_STACK_EMPTY)

     return REG_EPAREN;
 
   free (compile_stack.stack);
     return REG_EPAREN;
 
   free (compile_stack.stack);


@@ -2092,14 +2092,14 @@ insert_op1 (op, loc, arg, end)
     re_opcode_t op;
     unsigned char *loc;
     int arg;
     re_opcode_t op;
     unsigned char *loc;
     int arg;

-    unsigned char *end;    
+    unsigned char *end;

 {
   register unsigned char *pfrom = end;
   register unsigned char *pto = end + 3;
 
   while (pfrom != loc)
     *--pto = *--pfrom;
 {
   register unsigned char *pfrom = end;
   register unsigned char *pto = end + 3;
 
   while (pfrom != loc)
     *--pto = *--pfrom;

-    
+

   store_op1 (op, loc, arg);
 }
 
   store_op1 (op, loc, arg);
 }
 


@@ -2111,14 +2111,14 @@ insert_op2 (op, loc, arg1, arg2, end)
     re_opcode_t op;
     unsigned char *loc;
     int arg1, arg2;
     re_opcode_t op;
     unsigned char *loc;
     int arg1, arg2;

-    unsigned char *end;    
+    unsigned char *end;

 {
   register unsigned char *pfrom = end;
   register unsigned char *pto = end + 5;
 
   while (pfrom != loc)
     *--pto = *--pfrom;
 {
   register unsigned char *pfrom = end;
   register unsigned char *pto = end + 5;
 
   while (pfrom != loc)
     *--pto = *--pfrom;

-    
+

   store_op2 (op, loc, arg1, arg2);
 }
 
   store_op2 (op, loc, arg1, arg2);
 }
 


@@ -2134,7 +2134,7 @@ at_begline_loc_p (pattern, p, syntax)
 {
   const char *prev = p - 2;
   boolean prev_prev_backslash = prev > pattern && prev[-1] == '\\';
 {
   const char *prev = p - 2;
   boolean prev_prev_backslash = prev > pattern && prev[-1] == '\\';

-  
+

   return
        /* After a subexpression?  */
        (*prev == '(' && (syntax & RE_NO_BK_PARENS || prev_prev_backslash))
   return
        /* After a subexpression?  */
        (*prev == '(' && (syntax & RE_NO_BK_PARENS || prev_prev_backslash))


@@ -2154,7 +2154,7 @@ at_endline_loc_p (p, pend, syntax)
   const char *next = p;
   boolean next_backslash = *next == '\\';
   const char *next_next = p + 1 < pend ? p + 1 : NULL;
   const char *next = p;
   boolean next_backslash = *next == '\\';
   const char *next_next = p + 1 < pend ? p + 1 : NULL;

-  
+

   return
        /* Before a subexpression?  */
        (syntax & RE_NO_BK_PARENS ? *next == ')'
   return
        /* Before a subexpression?  */
        (syntax & RE_NO_BK_PARENS ? *next == ')'


@@ -2165,7 +2165,7 @@ at_endline_loc_p (p, pend, syntax)
 }
 
 
 }
 
 

-/* Returns true if REGNUM is in one of COMPILE_STACK's elements and 
+/* Returns true if REGNUM is in one of COMPILE_STACK's elements and

    false if it's not.  */
 
 static boolean
    false if it's not.  */
 
 static boolean


@@ -2175,8 +2175,8 @@ group_in_compile_stack (compile_stack, regnum)
 {
   int this_element;
 
 {
   int this_element;
 

-  for (this_element = compile_stack.avail - 1;  
-       this_element >= 0; 
+  for (this_element = compile_stack.avail - 1;
+       this_element >= 0;

        this_element--)
     if (compile_stack.stack[this_element].regnum == regnum)
       return true;
        this_element--)
     if (compile_stack.stack[this_element].regnum == regnum)
       return true;


@@ -2190,9 +2190,9 @@ group_in_compile_stack (compile_stack, regnum)
    starting character is in `P[-2]'.  (`P[-1]' is the character `-'.)
    Then we set the translation of all bits between the starting and
    ending characters (inclusive) in the compiled pattern B.
    starting character is in `P[-2]'.  (`P[-1]' is the character `-'.)
    Then we set the translation of all bits between the starting and
    ending characters (inclusive) in the compiled pattern B.

-   
+

    Return an error code.
    Return an error code.

-   
+

    We use these short variable names so we can use the same macros as
    `regex_compile' itself.  */
 
    We use these short variable names so we can use the same macros as
    `regex_compile' itself.  */
 


@@ -2207,7 +2207,7 @@ compile_range (p_ptr, pend, translate, syntax, b)
 
   const char *p = *p_ptr;
   int range_start, range_end;
 
   const char *p = *p_ptr;
   int range_start, range_end;

-  
+

   if (p == pend)
     return REG_ERANGE;
 
   if (p == pend)
     return REG_ERANGE;
 


@@ -2216,7 +2216,7 @@ compile_range (p_ptr, pend, translate, syntax, b)
      is set, the range endpoints will be negative if we fetch using a
      signed char *.
 
      is set, the range endpoints will be negative if we fetch using a
      signed char *.
 

-     We also want to fetch the endpoints without translating them; the 
+     We also want to fetch the endpoints without translating them; the

      appropriate translation is done in the bit-setting loop below.  */
   range_start = ((unsigned char *) p)[-2];
   range_end   = ((unsigned char *) p)[0];
      appropriate translation is done in the bit-setting loop below.  */
   range_start = ((unsigned char *) p)[-2];
   range_end   = ((unsigned char *) p)[0];


@@ -2237,14 +2237,14 @@ compile_range (p_ptr, pend, translate, syntax, b)
     {
       SET_LIST_BIT (TRANSLATE (this_char));
     }
     {
       SET_LIST_BIT (TRANSLATE (this_char));
     }

-  
+

   return REG_NOERROR;
 }
 \f
 /* Failure stack declarations and macros; both re_compile_fastmap and
    re_match_2 use a failure stack.  These have to be macros because of
    REGEX_ALLOCATE.  */
   return REG_NOERROR;
 }
 \f
 /* Failure stack declarations and macros; both re_compile_fastmap and
    re_match_2 use a failure stack.  These have to be macros because of
    REGEX_ALLOCATE.  */

-   
+

 
 /* Number of failure points for which to initially allocate space
    when matching.  If this number is exceeded, we allocate more
 
 /* Number of failure points for which to initially allocate space
    when matching.  If this number is exceeded, we allocate more


@@ -2292,8 +2292,8 @@ typedef struct
 /* Double the size of FAIL_STACK, up to approximately `re_max_failures' items.
 
    Return 1 if succeeds, and 0 if either ran out of memory
 /* Double the size of FAIL_STACK, up to approximately `re_max_failures' items.
 
    Return 1 if succeeds, and 0 if either ran out of memory

-   allocating space for it or it was already too large.  
-   
+   allocating space for it or it was already too large.
+

    REGEX_REALLOCATE requires `destination' be declared.   */
 
 #define DOUBLE_FAIL_STACK(fail_stack)                                  \
    REGEX_REALLOCATE requires `destination' be declared.   */
 
 #define DOUBLE_FAIL_STACK(fail_stack)                                  \


@@ -2310,7 +2310,7 @@ typedef struct
          1)))
 
 
          1)))
 
 

-/* Push PATTERN_OP on FAIL_STACK. 
+/* Push PATTERN_OP on FAIL_STACK.

 
    Return 1 if was able to do so and 0 if ran out of memory allocating
    space to do so.  */
 
    Return 1 if was able to do so and 0 if ran out of memory allocating
    space to do so.  */


@@ -2341,12 +2341,12 @@ typedef struct
 
 
 /* Push the information about the state we will need
 
 
 /* Push the information about the state we will need

-   if we ever fail back to it.  
-   
+   if we ever fail back to it.
+

    Requires variables fail_stack, regstart, regend, reg_info, and
    num_regs be declared.  DOUBLE_FAIL_STACK requires `destination' be
    declared.
    Requires variables fail_stack, regstart, regend, reg_info, and
    num_regs be declared.  DOUBLE_FAIL_STACK requires `destination' be
    declared.

-   
+

    Does `return FAILURE_CODE' if runs out of memory.  */
 
 #define PUSH_FAILURE_POINT(pattern_place, string_place, failure_code)  \
    Does `return FAILURE_CODE' if runs out of memory.  */
 
 #define PUSH_FAILURE_POINT(pattern_place, string_place, failure_code)  \


@@ -2454,7 +2454,7 @@ typedef struct
      LOW_REG, HIGH_REG -- the highest and lowest active registers.
      REGSTART, REGEND -- arrays of string positions.
      REG_INFO -- array of information about each subexpression.
      LOW_REG, HIGH_REG -- the highest and lowest active registers.
      REGSTART, REGEND -- arrays of string positions.
      REG_INFO -- array of information about each subexpression.

-   
+

    Also assumes the variables `fail_stack' and (if debugging), `bufp',
    `pend', `string1', `size1', `string2', and `size2'.  */
 
    Also assumes the variables `fail_stack' and (if debugging), `bufp',
    `pend', `string1', `size1', `string2', and `size2'.  */
 


@@ -2522,7 +2522,7 @@ typedef struct
 
    The caller must supply the address of a (1 << BYTEWIDTH)-byte data
    area as BUFP->fastmap.
 
    The caller must supply the address of a (1 << BYTEWIDTH)-byte data
    area as BUFP->fastmap.

-   
+

    We set the `fastmap', `fastmap_accurate', and `can_be_null' fields in
    the pattern buffer.
 
    We set the `fastmap', `fastmap_accurate', and `can_be_null' fields in
    the pattern buffer.
 


@@ -2539,7 +2539,7 @@ re_compile_fastmap (bufp)
 #endif
   /* We don't push any register information onto the failure stack.  */
   unsigned num_regs = 0;
 #endif
   /* We don't push any register information onto the failure stack.  */
   unsigned num_regs = 0;

-  
+

   register char *fastmap = bufp->fastmap;
   unsigned char *pattern = bufp->buffer;
   unsigned long size = bufp->used;
   register char *fastmap = bufp->fastmap;
   unsigned char *pattern = bufp->buffer;
   unsigned long size = bufp->used;


@@ -2556,27 +2556,27 @@ re_compile_fastmap (bufp)
   boolean succeed_n_p = false;
 
   assert (fastmap != NULL && p != NULL);
   boolean succeed_n_p = false;
 
   assert (fastmap != NULL && p != NULL);

-  
+

   INIT_FAIL_STACK ();
   bzero (fastmap, 1 << BYTEWIDTH);  /* Assume nothing's valid.  */
   bufp->fastmap_accurate = 1;      /* It will be when we're done.  */
   bufp->can_be_null = 0;
   INIT_FAIL_STACK ();
   bzero (fastmap, 1 << BYTEWIDTH);  /* Assume nothing's valid.  */
   bufp->fastmap_accurate = 1;      /* It will be when we're done.  */
   bufp->can_be_null = 0;

-      
+

   while (p != pend || !FAIL_STACK_EMPTY ())
     {
       if (p == pend)
         {
           bufp->can_be_null |= path_can_be_null;
   while (p != pend || !FAIL_STACK_EMPTY ())
     {
       if (p == pend)
         {
           bufp->can_be_null |= path_can_be_null;

-          
+

           /* Reset for next path.  */
           path_can_be_null = true;
           /* Reset for next path.  */
           path_can_be_null = true;

-          
+

           p = fail_stack.stack[--fail_stack.avail];
        }
 
       /* We should never be about to go beyond the end of the pattern.  */
       assert (p < pend);
           p = fail_stack.stack[--fail_stack.avail];
        }
 
       /* We should never be about to go beyond the end of the pattern.  */
       assert (p < pend);

-      
+

 #ifdef SWITCH_ENUM_BUG
       switch ((int) ((re_opcode_t) *p++))
 #else
 #ifdef SWITCH_ENUM_BUG
       switch ((int) ((re_opcode_t) *p++))
 #else


@@ -2700,10 +2700,10 @@ re_compile_fastmap (bufp)
         case jump_past_alt:
        case dummy_failure_jump:
           EXTRACT_NUMBER_AND_INCR (j, p);
         case jump_past_alt:
        case dummy_failure_jump:
           EXTRACT_NUMBER_AND_INCR (j, p);

-         p += j;       
+         p += j;

          if (j > 0)
            continue;
          if (j > 0)
            continue;

-            
+

           /* Jump backward implies we just went through the body of a
              loop and matched nothing.  Opcode jumped to should be
              `on_failure_jump' or `succeed_n'.  Just treat it like an
           /* Jump backward implies we just went through the body of a
              loop and matched nothing.  Opcode jumped to should be
              `on_failure_jump' or `succeed_n'.  Just treat it like an


@@ -2715,10 +2715,10 @@ re_compile_fastmap (bufp)
 
           p++;
           EXTRACT_NUMBER_AND_INCR (j, p);
 
           p++;
           EXTRACT_NUMBER_AND_INCR (j, p);

-          p += j;              
-         
+          p += j;
+

           /* If what's on the stack is where we are now, pop it.  */
           /* If what's on the stack is where we are now, pop it.  */

-          if (!FAIL_STACK_EMPTY () 
+          if (!FAIL_STACK_EMPTY ()

              && fail_stack.stack[fail_stack.avail - 1] == p)
             fail_stack.avail--;
 
              && fail_stack.stack[fail_stack.avail - 1] == p)
             fail_stack.avail--;
 


@@ -2756,7 +2756,7 @@ re_compile_fastmap (bufp)
 
        case succeed_n:
           /* Get to the number of times to succeed.  */
 
        case succeed_n:
           /* Get to the number of times to succeed.  */

-          p += 2;              
+          p += 2;

 
           /* Increment p past the n for when k != 0.  */
           EXTRACT_NUMBER_AND_INCR (k, p);
 
           /* Increment p past the n for when k != 0.  */
           EXTRACT_NUMBER_AND_INCR (k, p);


@@ -2847,7 +2847,7 @@ re_search (bufp, string, size, startpos, range, regs)
      int size, startpos, range;
      struct re_registers *regs;
 {
      int size, startpos, range;
      struct re_registers *regs;
 {

-  return re_search_2 (bufp, NULL, 0, string, size, startpos, range, 
+  return re_search_2 (bufp, NULL, 0, string, size, startpos, range,

                      regs, size);
 }
 
                      regs, size);
 }
 


@@ -2855,17 +2855,17 @@ re_search (bufp, string, size, startpos, range, regs)
 /* Using the compiled pattern in BUFP->buffer, first tries to match the
    virtual concatenation of STRING1 and STRING2, starting first at index
    STARTPOS, then at STARTPOS + 1, and so on.
 /* Using the compiled pattern in BUFP->buffer, first tries to match the
    virtual concatenation of STRING1 and STRING2, starting first at index
    STARTPOS, then at STARTPOS + 1, and so on.

-   
+

    STRING1 and STRING2 have length SIZE1 and SIZE2, respectively.
    STRING1 and STRING2 have length SIZE1 and SIZE2, respectively.

-   
+

    RANGE is how far to scan while trying to match.  RANGE = 0 means try
    only at STARTPOS; in general, the last start tried is STARTPOS +
    RANGE.
    RANGE is how far to scan while trying to match.  RANGE = 0 means try
    only at STARTPOS; in general, the last start tried is STARTPOS +
    RANGE.

-   
+

    In REGS, return the indices of the virtual concatenation of STRING1
    and STRING2 that matched the entire BUFP->buffer and its contained
    subexpressions.
    In REGS, return the indices of the virtual concatenation of STRING1
    and STRING2 that matched the entire BUFP->buffer and its contained
    subexpressions.

-   
+

    Do not consider matching one past the index STOP in the virtual
    concatenation of STRING1 and STRING2.
 
    Do not consider matching one past the index STOP in the virtual
    concatenation of STRING1 and STRING2.
 


@@ -2892,7 +2892,7 @@ re_search_2 (bufp, string1, size1, string2, size2, startpos, range, regs, stop)
   /* Check for out-of-range STARTPOS.  */
   if (startpos < 0 || startpos > total_size)
     return -1;
   /* Check for out-of-range STARTPOS.  */
   if (startpos < 0 || startpos > total_size)
     return -1;

-    
+

   /* Fix up RANGE if it might eventually take us outside
      the virtual concatenation of STRING1 and STRING2.  */
   if (endpos < -1)
   /* Fix up RANGE if it might eventually take us outside
      the virtual concatenation of STRING1 and STRING2.  */
   if (endpos < -1)


@@ -2914,10 +2914,10 @@ re_search_2 (bufp, string1, size1, string2, size2, startpos, range, regs, stop)
   if (fastmap && !bufp->fastmap_accurate)
     if (re_compile_fastmap (bufp) == -2)
       return -2;
   if (fastmap && !bufp->fastmap_accurate)
     if (re_compile_fastmap (bufp) == -2)
       return -2;

-  
+

   /* Loop through the string, looking for a place to start matching.  */
   for (;;)
   /* Loop through the string, looking for a place to start matching.  */
   for (;;)

-    { 
+    {

       /* If a fastmap is supplied, skip quickly over characters that
          cannot be the start of a match.  If the pattern can match the
          null string, however, we don't need to skip characters; we want
       /* If a fastmap is supplied, skip quickly over characters that
          cannot be the start of a match.  If the pattern can match the
          null string, however, we don't need to skip characters; we want


@@ -2934,7 +2934,7 @@ re_search_2 (bufp, string1, size1, string2, size2, startpos, range, regs, stop)
                 lim = range - (size1 - startpos);
 
              d = (startpos >= size1 ? string2 - size1 : string1) + startpos;
                 lim = range - (size1 - startpos);
 
              d = (startpos >= size1 ? string2 - size1 : string1) + startpos;

-   
+

               /* Written out as an if-else to avoid testing `translate'
                  inside the loop.  */
              if (translate)
               /* Written out as an if-else to avoid testing `translate'
                  inside the loop.  */
              if (translate)


@@ -2951,7 +2951,7 @@ re_search_2 (bufp, string1, size1, string2, size2, startpos, range, regs, stop)
          else                          /* Searching backwards.  */
            {
              register char c = (size1 == 0 || startpos >= size1
          else                          /* Searching backwards.  */
            {
              register char c = (size1 == 0 || startpos >= size1

-                                 ? string2[startpos - size1] 
+                                 ? string2[startpos - size1]

                                  : string1[startpos]);
 
              if (!fastmap[(unsigned char) TRANSLATE (c)])
                                  : string1[startpos]);
 
              if (!fastmap[(unsigned char) TRANSLATE (c)])


@@ -2968,21 +2968,21 @@ re_search_2 (bufp, string1, size1, string2, size2, startpos, range, regs, stop)
                        startpos, regs, stop);
       if (val >= 0)
        return startpos;
                        startpos, regs, stop);
       if (val >= 0)
        return startpos;

-        
+

       if (val == -2)
        return -2;
 
     advance:
       if (val == -2)
        return -2;
 
     advance:

-      if (!range) 
+      if (!range)

         break;
         break;

-      else if (range > 0) 
+      else if (range > 0)

         {
         {

-          range--; 
+          range--;

           startpos++;
         }
       else
         {
           startpos++;
         }
       else
         {

-          range++; 
+          range++;

           startpos--;
         }
     }
           startpos--;
         }
     }


@@ -3001,8 +3001,8 @@ static boolean alt_match_null_string_p (),
    onto the failure stack.  Other register information, such as the
    starting and ending positions (which are addresses), and the list of
    inner groups (which is a bits list) are maintained in separate
    onto the failure stack.  Other register information, such as the
    starting and ending positions (which are addresses), and the list of
    inner groups (which is a bits list) are maintained in separate

-   variables.  
-   
+   variables.
+

    We are making a (strictly speaking) nonportable assumption here: that
    the compiler will pack our bit fields into something that fits into
    the type of `word', i.e., is something that fits into one item on the
    We are making a (strictly speaking) nonportable assumption here: that
    the compiler will pack our bit fields into something that fits into
    the type of `word', i.e., is something that fits into one item on the


@@ -3076,7 +3076,7 @@ typedef union
 /* Test if at very beginning or at very end of the virtual concatenation
    of `string1' and `string2'.  If only one string, it's `string2'.  */
 #define AT_STRINGS_BEG(d) ((d) == (size1 ? string1 : string2) || !size2)
 /* Test if at very beginning or at very end of the virtual concatenation
    of `string1' and `string2'.  If only one string, it's `string2'.  */
 #define AT_STRINGS_BEG(d) ((d) == (size1 ? string1 : string2) || !size2)

-#define AT_STRINGS_END(d) ((d) == end2)        
+#define AT_STRINGS_END(d) ((d) == end2)

 
 
 /* Test if D points to a character which is word-constituent.  We have
 
 
 /* Test if D points to a character which is word-constituent.  We have


@@ -3139,7 +3139,7 @@ re_match (bufp, string, size, pos, regs)
      int size, pos;
      struct re_registers *regs;
  {
      int size, pos;
      struct re_registers *regs;
  {

-  return re_match_2 (bufp, NULL, 0, string, size, pos, regs, size); 
+  return re_match_2 (bufp, NULL, 0, string, size, pos, regs, size);

 }
 #endif /* not emacs */
 
 }
 #endif /* not emacs */
 


@@ -3148,7 +3148,7 @@ re_match (bufp, string, size, pos, regs)
    the (virtual) concatenation of STRING1 and STRING2 (of length SIZE1
    and SIZE2, respectively).  We start matching at POS, and stop
    matching at STOP.
    the (virtual) concatenation of STRING1 and STRING2 (of length SIZE1
    and SIZE2, respectively).  We start matching at POS, and stop
    matching at STOP.

-   
+

    If REGS is non-null and the `no_sub' field of BUFP is nonzero, we
    store offsets for the substring each group matched in REGS.  See the
    documentation for exactly how many groups we fill.
    If REGS is non-null and the `no_sub' field of BUFP is nonzero, we
    store offsets for the substring each group matched in REGS.  See the
    documentation for exactly how many groups we fill.


@@ -3179,7 +3179,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
 
   /* Where we are in the data, and the end of the current string.  */
   const char *d, *dend;
 
   /* Where we are in the data, and the end of the current string.  */
   const char *d, *dend;

-  
+

   /* Where we are in the pattern, and the end of the pattern.  */
   unsigned char *p = bufp->buffer;
   register unsigned char *pend = p + bufp->used;
   /* Where we are in the pattern, and the end of the pattern.  */
   unsigned char *p = bufp->buffer;
   register unsigned char *pend = p + bufp->used;


@@ -3206,7 +3206,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
      return, for use in backreferences.  The number here includes
      an element for register zero.  */
   unsigned num_regs = bufp->re_nsub + 1;
      return, for use in backreferences.  The number here includes
      an element for register zero.  */
   unsigned num_regs = bufp->re_nsub + 1;

-  
+

   /* The currently active registers.  */
   unsigned lowest_active_reg = NO_LOWEST_ACTIVE_REG;
   unsigned highest_active_reg = NO_HIGHEST_ACTIVE_REG;
   /* The currently active registers.  */
   unsigned lowest_active_reg = NO_LOWEST_ACTIVE_REG;
   unsigned highest_active_reg = NO_HIGHEST_ACTIVE_REG;


@@ -3233,15 +3233,15 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
      matched any of the pattern so far this time through the reg_num-th
      subexpression.  These two fields get reset each time through any
      loop their register is in.  */
      matched any of the pattern so far this time through the reg_num-th
      subexpression.  These two fields get reset each time through any
      loop their register is in.  */

-  register_info_type *reg_info; 
+  register_info_type *reg_info;

 
   /* The following record the register info as found in the above
 
   /* The following record the register info as found in the above

-     variables when we find a match better than any we've seen before. 
+     variables when we find a match better than any we've seen before.

      This happens as we backtrack through the failure points, which in
      turn happens only if we have not yet matched the entire string. */
   unsigned best_regs_set = false;
   const char **best_regstart, **best_regend;
      This happens as we backtrack through the failure points, which in
      turn happens only if we have not yet matched the entire string. */
   unsigned best_regs_set = false;
   const char **best_regstart, **best_regend;

-  
+

   /* Logically, this is `best_regend[0]'.  But we don't want to have to
      allocate space for that if we're not allocating space for anything
      else (see below).  Also, we never need info about register 0 for
   /* Logically, this is `best_regend[0]'.  But we don't want to have to
      allocate space for that if we're not allocating space for anything
      else (see below).  Also, we never need info about register 0 for


@@ -3258,13 +3258,13 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
 
 #ifdef DEBUG
   /* Counts the total number of registers pushed.  */
 
 #ifdef DEBUG
   /* Counts the total number of registers pushed.  */

-  unsigned num_regs_pushed = 0;        
+  unsigned num_regs_pushed = 0;

 #endif
 
   DEBUG_PRINT1 ("\n\nEntering re_match_2.\n");
 #endif
 
   DEBUG_PRINT1 ("\n\nEntering re_match_2.\n");

-  
+

   INIT_FAIL_STACK ();
   INIT_FAIL_STACK ();

-  
+

   /* Do not bother to initialize all the register variables if there are
      no groups in the pattern, as it takes a fair amount of time.  If
      there are groups, we include space for register 0 (the whole
   /* Do not bother to initialize all the register variables if there are
      no groups in the pattern, as it takes a fair amount of time.  If
      there are groups, we include space for register 0 (the whole


@@ -3282,8 +3282,8 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
       reg_dummy = REGEX_TALLOC (num_regs, const char *);
       reg_info_dummy = REGEX_TALLOC (num_regs, register_info_type);
 
       reg_dummy = REGEX_TALLOC (num_regs, const char *);
       reg_info_dummy = REGEX_TALLOC (num_regs, register_info_type);
 

-      if (!(regstart && regend && old_regstart && old_regend && reg_info 
-            && best_regstart && best_regend && reg_dummy && reg_info_dummy)) 
+      if (!(regstart && regend && old_regstart && old_regend && reg_info
+            && best_regstart && best_regend && reg_dummy && reg_info_dummy))

         {
           FREE_VARIABLES ();
           return -2;
         {
           FREE_VARIABLES ();
           return -2;


@@ -3306,21 +3306,21 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
       FREE_VARIABLES ();
       return -1;
     }
       FREE_VARIABLES ();
       return -1;
     }

-    
+

   /* Initialize subexpression text positions to -1 to mark ones that no
      start_memory/stop_memory has been seen for. Also initialize the
      register information struct.  */
   for (mcnt = 1; mcnt < num_regs; mcnt++)
     {
   /* Initialize subexpression text positions to -1 to mark ones that no
      start_memory/stop_memory has been seen for. Also initialize the
      register information struct.  */
   for (mcnt = 1; mcnt < num_regs; mcnt++)
     {

-      regstart[mcnt] = regend[mcnt] 
+      regstart[mcnt] = regend[mcnt]

         = old_regstart[mcnt] = old_regend[mcnt] = REG_UNSET_VALUE;
         = old_regstart[mcnt] = old_regend[mcnt] = REG_UNSET_VALUE;

-        
+

       REG_MATCH_NULL_STRING_P (reg_info[mcnt]) = MATCH_NULL_UNSET_VALUE;
       IS_ACTIVE (reg_info[mcnt]) = 0;
       MATCHED_SOMETHING (reg_info[mcnt]) = 0;
       EVER_MATCHED_SOMETHING (reg_info[mcnt]) = 0;
     }
       REG_MATCH_NULL_STRING_P (reg_info[mcnt]) = MATCH_NULL_UNSET_VALUE;
       IS_ACTIVE (reg_info[mcnt]) = 0;
       MATCHED_SOMETHING (reg_info[mcnt]) = 0;
       EVER_MATCHED_SOMETHING (reg_info[mcnt]) = 0;
     }

-  
+

   /* We move `string1' into `string2' if the latter's empty -- but not if
      `string1' is null.  */
   if (size2 == 0 && string1 != NULL)
   /* We move `string1' into `string2' if the latter's empty -- but not if
      `string1' is null.  */
   if (size2 == 0 && string1 != NULL)


@@ -3345,7 +3345,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
       end_match_2 = string2 + stop - size1;
     }
 
       end_match_2 = string2 + stop - size1;
     }
 

-  /* `p' scans through the pattern as `d' scans through the data. 
+  /* `p' scans through the pattern as `d' scans through the data.

      `dend' is the end of the input string that `d' points within.  `d'
      is advanced into the following input string whenever necessary, but
      this happens before fetching; therefore, at the beginning of the
      `dend' is the end of the input string that `d' points within.  `d'
      is advanced into the following input string whenever necessary, but
      this happens before fetching; therefore, at the beginning of the


@@ -3367,7 +3367,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
   DEBUG_PRINT1 ("The string to match is: `");
   DEBUG_PRINT_DOUBLE_STRING (d, string1, size1, string2, size2);
   DEBUG_PRINT1 ("'\n");
   DEBUG_PRINT1 ("The string to match is: `");
   DEBUG_PRINT_DOUBLE_STRING (d, string1, size1, string2, size2);
   DEBUG_PRINT1 ("'\n");

-  
+

   /* This loops over pattern commands.  It exits by returning from the
      function if the match is complete, or it drops through if the match
      fails at this starting point in the input data.  */
   /* This loops over pattern commands.  It exits by returning from the
      function if the match is complete, or it drops through if the match
      fails at this starting point in the input data.  */


@@ -3378,16 +3378,16 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
       if (p == pend)
        { /* End of pattern means we might have succeeded.  */
           DEBUG_PRINT1 ("end of pattern ... ");
       if (p == pend)
        { /* End of pattern means we might have succeeded.  */
           DEBUG_PRINT1 ("end of pattern ... ");

-          
+

          /* If we haven't matched the entire string, and we want the
              longest match, try backtracking.  */
           if (d != end_match_2)
            {
               DEBUG_PRINT1 ("backtracking.\n");
          /* If we haven't matched the entire string, and we want the
              longest match, try backtracking.  */
           if (d != end_match_2)
            {
               DEBUG_PRINT1 ("backtracking.\n");

-              
+

               if (!FAIL_STACK_EMPTY ())
                 { /* More failure points to try.  */
               if (!FAIL_STACK_EMPTY ())
                 { /* More failure points to try.  */

-                  boolean same_str_p = (FIRST_STRING_P (match_end) 
+                  boolean same_str_p = (FIRST_STRING_P (match_end)

                                        == MATCHING_IN_FIRST_STRING);
 
                   /* If exceeds best match so far, save it.  */
                                        == MATCHING_IN_FIRST_STRING);
 
                   /* If exceeds best match so far, save it.  */


@@ -3397,20 +3397,20 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
                     {
                       best_regs_set = true;
                       match_end = d;
                     {
                       best_regs_set = true;
                       match_end = d;

-                      
+

                       DEBUG_PRINT1 ("\nSAVING match as best so far.\n");
                       DEBUG_PRINT1 ("\nSAVING match as best so far.\n");

-                      
+

                       for (mcnt = 1; mcnt < num_regs; mcnt++)
                         {
                           best_regstart[mcnt] = regstart[mcnt];
                           best_regend[mcnt] = regend[mcnt];
                         }
                     }
                       for (mcnt = 1; mcnt < num_regs; mcnt++)
                         {
                           best_regstart[mcnt] = regstart[mcnt];
                           best_regend[mcnt] = regend[mcnt];
                         }
                     }

-                  goto fail;          
+                  goto fail;

                 }
 
               /* If no failure points, don't restore garbage.  */
                 }
 
               /* If no failure points, don't restore garbage.  */

-              else if (best_regs_set)   
+              else if (best_regs_set)

                 {
                restore_best_regs:
                   /* Restore best match.  It may happen that `dend ==
                 {
                restore_best_regs:
                   /* Restore best match.  It may happen that `dend ==


@@ -3419,7 +3419,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
                      strings `x-' and `y-z-', if the two strings are
                      not consecutive in memory.  */
                   DEBUG_PRINT1 ("Restoring best registers.\n");
                      strings `x-' and `y-z-', if the two strings are
                      not consecutive in memory.  */
                   DEBUG_PRINT1 ("Restoring best registers.\n");

-                  
+

                   d = match_end;
                   dend = ((d >= string1 && d <= end1)
                           ? end_match_1 : end_match_2);
                   d = match_end;
                   dend = ((d >= string1 && d <= end1)
                           ? end_match_1 : end_match_2);


@@ -3474,7 +3474,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
                   regs->end[0] = (MATCHING_IN_FIRST_STRING ? d - string1
                                  : d - string2 + size1);
                 }
                   regs->end[0] = (MATCHING_IN_FIRST_STRING ? d - string1
                                  : d - string2 + size1);
                 }

-              
+

               /* Go through the first `min (num_regs, regs->num_regs)'
                  registers, since that is all we initialized.  */
              for (mcnt = 1; mcnt < MIN (num_regs, regs->num_regs); mcnt++)
               /* Go through the first `min (num_regs, regs->num_regs)'
                  registers, since that is all we initialized.  */
              for (mcnt = 1; mcnt < MIN (num_regs, regs->num_regs); mcnt++)


@@ -3487,7 +3487,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
                       regs->end[mcnt] = POINTER_TO_OFFSET (regend[mcnt]);
                     }
                }
                       regs->end[mcnt] = POINTER_TO_OFFSET (regend[mcnt]);
                     }
                }

-              
+

               /* If the regs structure we return has more elements than
                  were in the pattern, set the extra elements to -1.  If
                  we (re)allocated the registers, this is the case,
               /* If the regs structure we return has more elements than
                  were in the pattern, set the extra elements to -1.  If
                  we (re)allocated the registers, this is the case,


@@ -3503,8 +3503,8 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
                         nfailure_points_pushed - nfailure_points_popped);
           DEBUG_PRINT2 ("%u registers pushed.\n", num_regs_pushed);
 
                         nfailure_points_pushed - nfailure_points_popped);
           DEBUG_PRINT2 ("%u registers pushed.\n", num_regs_pushed);
 

-          mcnt = d - pos - (MATCHING_IN_FIRST_STRING 
-                           ? string1 
+          mcnt = d - pos - (MATCHING_IN_FIRST_STRING
+                           ? string1

                            : string2 - size1);
 
           DEBUG_PRINT2 ("Returning %d from re_match_2.\n", mcnt);
                            : string2 - size1);
 
           DEBUG_PRINT2 ("Returning %d from re_match_2.\n", mcnt);


@@ -3594,7 +3594,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
            p += 1 + *p;
 
            if (!not) goto fail;
            p += 1 + *p;
 
            if (!not) goto fail;

-            
+

            SET_REGS_MATCHED ();
             d++;
            break;
            SET_REGS_MATCHED ();
             d++;
            break;


@@ -3611,9 +3611,9 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
 
           /* Find out if this group can match the empty string.  */
          p1 = p;               /* To send to group_match_null_string_p.  */
 
           /* Find out if this group can match the empty string.  */
          p1 = p;               /* To send to group_match_null_string_p.  */

-          
+

           if (REG_MATCH_NULL_STRING_P (reg_info[*p]) == MATCH_NULL_UNSET_VALUE)
           if (REG_MATCH_NULL_STRING_P (reg_info[*p]) == MATCH_NULL_UNSET_VALUE)

-            REG_MATCH_NULL_STRING_P (reg_info[*p]) 
+            REG_MATCH_NULL_STRING_P (reg_info[*p])

               = group_match_null_string_p (&p1, pend, reg_info);
 
           /* Save the position in the string where we were the last time
               = group_match_null_string_p (&p1, pend, reg_info);
 
           /* Save the position in the string where we were the last time


@@ -3624,7 +3624,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
           old_regstart[*p] = REG_MATCH_NULL_STRING_P (reg_info[*p])
                              ? REG_UNSET (regstart[*p]) ? d : regstart[*p]
                              : regstart[*p];
           old_regstart[*p] = REG_MATCH_NULL_STRING_P (reg_info[*p])
                              ? REG_UNSET (regstart[*p]) ? d : regstart[*p]
                              : regstart[*p];

-         DEBUG_PRINT2 ("  old_regstart: %d\n", 
+         DEBUG_PRINT2 ("  old_regstart: %d\n",

                         POINTER_TO_OFFSET (old_regstart[*p]));
 
           regstart[*p] = d;
                         POINTER_TO_OFFSET (old_regstart[*p]));
 
           regstart[*p] = d;


@@ -3632,10 +3632,10 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
 
           IS_ACTIVE (reg_info[*p]) = 1;
           MATCHED_SOMETHING (reg_info[*p]) = 0;
 
           IS_ACTIVE (reg_info[*p]) = 1;
           MATCHED_SOMETHING (reg_info[*p]) = 0;

-          
+

           /* This is the new highest active register.  */
           highest_active_reg = *p;
           /* This is the new highest active register.  */
           highest_active_reg = *p;

-          
+

           /* If nothing was active before, this is the new lowest active
              register.  */
           if (lowest_active_reg == NO_LOWEST_ACTIVE_REG)
           /* If nothing was active before, this is the new lowest active
              register.  */
           if (lowest_active_reg == NO_LOWEST_ACTIVE_REG)


@@ -3651,7 +3651,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
            number, and the number of inner groups.  */
        case stop_memory:
          DEBUG_PRINT3 ("EXECUTING stop_memory %d (%d):\n", *p, p[1]);
            number, and the number of inner groups.  */
        case stop_memory:
          DEBUG_PRINT3 ("EXECUTING stop_memory %d (%d):\n", *p, p[1]);

-             
+

           /* We need to save the string position the last time we were at
              this close-group operator in case the group is operated
              upon by a repetition operator, e.g., with `((a*)*(b*)*)*'
           /* We need to save the string position the last time we were at
              this close-group operator in case the group is operated
              upon by a repetition operator, e.g., with `((a*)*(b*)*)*'


@@ -3660,7 +3660,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
           old_regend[*p] = REG_MATCH_NULL_STRING_P (reg_info[*p])
                            ? REG_UNSET (regend[*p]) ? d : regend[*p]
                           : regend[*p];
           old_regend[*p] = REG_MATCH_NULL_STRING_P (reg_info[*p])
                            ? REG_UNSET (regend[*p]) ? d : regend[*p]
                           : regend[*p];

-         DEBUG_PRINT2 ("      old_regend: %d\n", 
+         DEBUG_PRINT2 ("      old_regend: %d\n",

                         POINTER_TO_OFFSET (old_regend[*p]));
 
           regend[*p] = d;
                         POINTER_TO_OFFSET (old_regend[*p]));
 
           regend[*p] = d;


@@ -3668,7 +3668,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
 
           /* This register isn't active anymore.  */
           IS_ACTIVE (reg_info[*p]) = 0;
 
           /* This register isn't active anymore.  */
           IS_ACTIVE (reg_info[*p]) = 0;

-          
+

           /* If this was the only register active, nothing is active
              anymore.  */
           if (lowest_active_reg == highest_active_reg)
           /* If this was the only register active, nothing is active
              anymore.  */
           if (lowest_active_reg == highest_active_reg)


@@ -3684,7 +3684,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
               unsigned char r = *p - 1;
               while (r > 0 && !IS_ACTIVE (reg_info[r]))
                 r--;
               unsigned char r = *p - 1;
               while (r > 0 && !IS_ACTIVE (reg_info[r]))
                 r--;

-              
+

               /* If we end up at register zero, that means that we saved
                  the registers as the result of an `on_failure_jump', not
                  a `start_memory', and we jumped to past the innermost
               /* If we end up at register zero, that means that we saved
                  the registers as the result of an `on_failure_jump', not
                  a `start_memory', and we jumped to past the innermost


@@ -3700,7 +3700,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
               else
                 highest_active_reg = r;
             }
               else
                 highest_active_reg = r;
             }

-          
+

           /* If just failed to match something this time around with a
              group that's operated on by a repetition operator, try to
              force exit from the ``loop'', and restore the register
           /* If just failed to match something this time around with a
              group that's operated on by a repetition operator, try to
              force exit from the ``loop'', and restore the register


@@ -3708,10 +3708,10 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
              last match.  */
           if ((!MATCHED_SOMETHING (reg_info[*p])
                || (re_opcode_t) p[-3] == start_memory)
              last match.  */
           if ((!MATCHED_SOMETHING (reg_info[*p])
                || (re_opcode_t) p[-3] == start_memory)

-             && (p + 2) < pend)              
+             && (p + 2) < pend)

             {
               boolean is_a_jump_n = false;
             {
               boolean is_a_jump_n = false;

-              
+

               p1 = p + 2;
               mcnt = 0;
               switch ((re_opcode_t) *p1++)
               p1 = p + 2;
               mcnt = 0;
               switch ((re_opcode_t) *p1++)


@@ -3726,12 +3726,12 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
                    if (is_a_jump_n)
                      p1 += 2;
                     break;
                    if (is_a_jump_n)
                      p1 += 2;
                     break;

-                  
+

                   default:
                     /* do nothing */ ;
                 }
              p1 += mcnt;
                   default:
                     /* do nothing */ ;
                 }
              p1 += mcnt;

-        
+

               /* If the next operation is a jump backwards in the pattern
                 to an on_failure_jump right before the start_memory
                  corresponding to this stop_memory, exit from the loop
               /* If the next operation is a jump backwards in the pattern
                 to an on_failure_jump right before the start_memory
                  corresponding to this stop_memory, exit from the loop


@@ -3745,17 +3745,17 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
                      failed match, e.g., with `(a*)*b' against `ab' for
                      regstart[1], and, e.g., with `((a*)*(b*)*)*'
                      against `aba' for regend[3].
                      failed match, e.g., with `(a*)*b' against `ab' for
                      regstart[1], and, e.g., with `((a*)*(b*)*)*'
                      against `aba' for regend[3].

-                     
+

                      Also restore the registers for inner groups for,
                      e.g., `((a*)(b*))*' against `aba' (register 3 would
                      otherwise get trashed).  */
                      Also restore the registers for inner groups for,
                      e.g., `((a*)(b*))*' against `aba' (register 3 would
                      otherwise get trashed).  */

-                     
+

                   if (EVER_MATCHED_SOMETHING (reg_info[*p]))
                    {
                   if (EVER_MATCHED_SOMETHING (reg_info[*p]))
                    {

-                     unsigned r; 
-        
+                     unsigned r;
+

                       EVER_MATCHED_SOMETHING (reg_info[*p]) = 0;
                       EVER_MATCHED_SOMETHING (reg_info[*p]) = 0;

-                      
+

                      /* Restore this and inner groups' (if any) registers.  */
                       for (r = *p; r < *p + *(p + 1); r++)
                         {
                      /* Restore this and inner groups' (if any) registers.  */
                       for (r = *p; r < *p + *(p + 1); r++)
                         {


@@ -3764,7 +3764,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
                           /* xx why this test?  */
                           if ((int) old_regend[r] >= (int) regstart[r])
                             regend[r] = old_regend[r];
                           /* xx why this test?  */
                           if ((int) old_regend[r] >= (int) regstart[r])
                             regend[r] = old_regend[r];

-                        }     
+                        }

                     }
                  p1++;
                   EXTRACT_NUMBER_AND_INCR (mcnt, p1);
                     }
                  p1++;
                   EXTRACT_NUMBER_AND_INCR (mcnt, p1);


@@ -3773,7 +3773,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
                   goto fail;
                 }
             }
                   goto fail;
                 }
             }

-          
+

           /* Move past the register number and the inner group count.  */
           p += 2;
           break;
           /* Move past the register number and the inner group count.  */
           p += 2;
           break;


@@ -3790,16 +3790,16 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
            /* Can't back reference a group which we've never matched.  */
             if (REG_UNSET (regstart[regno]) || REG_UNSET (regend[regno]))
               goto fail;
            /* Can't back reference a group which we've never matched.  */
             if (REG_UNSET (regstart[regno]) || REG_UNSET (regend[regno]))
               goto fail;

-              
+

             /* Where in input to try to start matching.  */
             d2 = regstart[regno];
             /* Where in input to try to start matching.  */
             d2 = regstart[regno];

-            
+

             /* Where to stop matching; if both the place to start and
                the place to stop matching are in the same string, then
                set to the place to stop, otherwise, for now have to use
                the end of the first string.  */
 
             /* Where to stop matching; if both the place to start and
                the place to stop matching are in the same string, then
                set to the place to stop, otherwise, for now have to use
                the end of the first string.  */
 

-            dend2 = ((FIRST_STRING_P (regstart[regno]) 
+            dend2 = ((FIRST_STRING_P (regstart[regno])

                      == FIRST_STRING_P (regend[regno]))
                     ? regend[regno] : end_match_1);
            for (;;)
                      == FIRST_STRING_P (regend[regno]))
                     ? regend[regno] : end_match_1);
            for (;;)


@@ -3823,16 +3823,16 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
 
                /* How many characters left in this segment to match.  */
                mcnt = dend - d;
 
                /* How many characters left in this segment to match.  */
                mcnt = dend - d;

-                
+

                /* Want how many consecutive characters we can match in
                    one shot, so, if necessary, adjust the count.  */
                 if (mcnt > dend2 - d2)
                  mcnt = dend2 - d2;
                /* Want how many consecutive characters we can match in
                    one shot, so, if necessary, adjust the count.  */
                 if (mcnt > dend2 - d2)
                  mcnt = dend2 - d2;

-                  
+

                /* Compare that many; failure if mismatch, else move
                    past them.  */
                /* Compare that many; failure if mismatch, else move
                    past them.  */

-               if (translate 
-                    ? bcmp_translate (d, d2, mcnt, translate) 
+               if (translate
+                    ? bcmp_translate (d, d2, mcnt, translate)

                     : bcmp (d, d2, mcnt))
                  goto fail;
                d += mcnt, d2 += mcnt;
                     : bcmp (d, d2, mcnt))
                  goto fail;
                d += mcnt, d2 += mcnt;


@@ -3846,7 +3846,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
            `newline_anchor' is set, after newlines.  */
        case begline:
           DEBUG_PRINT1 ("EXECUTING begline.\n");
            `newline_anchor' is set, after newlines.  */
        case begline:
           DEBUG_PRINT1 ("EXECUTING begline.\n");

-          
+

           if (AT_STRINGS_BEG (d))
             {
               if (!bufp->not_bol) break;
           if (AT_STRINGS_BEG (d))
             {
               if (!bufp->not_bol) break;


@@ -3867,7 +3867,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
             {
               if (!bufp->not_eol) break;
             }
             {
               if (!bufp->not_eol) break;
             }

-          
+

           /* We have to ``prefetch'' the next character.  */
           else if ((d == end1 ? *string2 : *d) == '\n'
                    && bufp->newline_anchor)
           /* We have to ``prefetch'' the next character.  */
           else if ((d == end1 ? *string2 : *d) == '\n'
                    && bufp->newline_anchor)


@@ -3901,7 +3901,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
            then the . fails against the \n.  But the next thing we want
            to do is match the \n against the \n; if we restored the
            string value, we would be back at the foo.
            then the . fails against the \n.  But the next thing we want
            to do is match the \n against the \n; if we restored the
            string value, we would be back at the foo.

-           
+

            Because this is used only in specific cases, we don't need to
            check all the things that `on_failure_jump' does, to make
            sure the right things get saved on the stack.  Hence we don't
            Because this is used only in specific cases, we don't need to
            check all the things that `on_failure_jump' does, to make
            sure the right things get saved on the stack.  Hence we don't


@@ -3911,7 +3911,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
            case; that seems worse than this.  */
         case on_failure_keep_string_jump:
           DEBUG_PRINT1 ("EXECUTING on_failure_keep_string_jump");
            case; that seems worse than this.  */
         case on_failure_keep_string_jump:
           DEBUG_PRINT1 ("EXECUTING on_failure_keep_string_jump");

-          
+

           EXTRACT_NUMBER_AND_INCR (mcnt, p);
           DEBUG_PRINT3 (" %d (to 0x%x):\n", mcnt, p + mcnt);
 
           EXTRACT_NUMBER_AND_INCR (mcnt, p);
           DEBUG_PRINT3 (" %d (to 0x%x):\n", mcnt, p + mcnt);
 


@@ -3920,7 +3920,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
 
 
        /* Uses of on_failure_jump:
 
 
        /* Uses of on_failure_jump:

-        
+

            Each alternative starts with an on_failure_jump that points
            to the beginning of the next alternative.  Each alternative
            except the last ends with a jump that in effect jumps past
            Each alternative starts with an on_failure_jump that points
            to the beginning of the next alternative.  Each alternative
            except the last ends with a jump that in effect jumps past


@@ -3986,7 +3986,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
                would have to backtrack because of (as in, e.g., `a*a')
                then we can change to pop_failure_jump, because we'll
                never have to backtrack.
                would have to backtrack because of (as in, e.g., `a*a')
                then we can change to pop_failure_jump, because we'll
                never have to backtrack.

-               
+

                This is not true in the case of alternatives: in
                `(a|ab)*' we do need to backtrack to the `ab' alternative
                (e.g., if the string was `ab').  But instead of trying to
                This is not true in the case of alternatives: in
                `(a|ab)*' we do need to backtrack to the `ab' alternative
                (e.g., if the string was `ab').  But instead of trying to


@@ -4018,7 +4018,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
                p1 = p + mcnt;
 
                 /* p1[0] ... p1[2] are the `on_failure_jump' corresponding
                p1 = p + mcnt;
 
                 /* p1[0] ... p1[2] are the `on_failure_jump' corresponding

-                   to the `maybe_finalize_jump' of this case.  Examine what 
+                   to the `maybe_finalize_jump' of this case.  Examine what

                    follows.  */
                 if ((re_opcode_t) p1[3] == exactn && p1[5] != c)
                   {
                    follows.  */
                 if ((re_opcode_t) p1[3] == exactn && p1[5] != c)
                   {


@@ -4026,12 +4026,12 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
                     DEBUG_PRINT3 ("  %c != %c => pop_failure_jump.\n",
                                   c, p1[5]);
                   }
                     DEBUG_PRINT3 ("  %c != %c => pop_failure_jump.\n",
                                   c, p1[5]);
                   }

-                  
+

                else if ((re_opcode_t) p1[3] == charset
                         || (re_opcode_t) p1[3] == charset_not)
                  {
                    int not = (re_opcode_t) p1[3] == charset_not;
                else if ((re_opcode_t) p1[3] == charset
                         || (re_opcode_t) p1[3] == charset_not)
                  {
                    int not = (re_opcode_t) p1[3] == charset_not;

-                    
+

                    if (c < (unsigned char) (p1[4] * BYTEWIDTH)
                        && p1[5 + c / BYTEWIDTH] & (1 << (c % BYTEWIDTH)))
                      not = !not;
                    if (c < (unsigned char) (p1[4] * BYTEWIDTH)
                        && p1[5 + c / BYTEWIDTH] & (1 << (c % BYTEWIDTH)))
                      not = !not;


@@ -4080,7 +4080,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
           }
           /* Note fall through.  */
 
           }
           /* Note fall through.  */
 

-          
+

         /* Unconditionally jump (without popping any failure points).  */
         case jump:
        unconditional_jump:
         /* Unconditionally jump (without popping any failure points).  */
         case jump:
        unconditional_jump:


@@ -4090,7 +4090,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
           DEBUG_PRINT2 ("(to 0x%x).\n", p);
          break;
 
           DEBUG_PRINT2 ("(to 0x%x).\n", p);
          break;
 

-       
+

         /* We need this opcode so we can detect where alternatives end
            in `group_match_null_string_p' et al.  */
         case jump_past_alt:
         /* We need this opcode so we can detect where alternatives end
            in `group_match_null_string_p' et al.  */
         case jump_past_alt:


@@ -4125,7 +4125,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
 
         /* Have to succeed matching what follows at least n times.
            After that, handle like `on_failure_jump'.  */
 
         /* Have to succeed matching what follows at least n times.
            After that, handle like `on_failure_jump'.  */

-        case succeed_n: 
+        case succeed_n:

           EXTRACT_NUMBER (mcnt, p + 2);
           DEBUG_PRINT2 ("EXECUTING succeed_n %d.\n", mcnt);
 
           EXTRACT_NUMBER (mcnt, p + 2);
           DEBUG_PRINT2 ("EXECUTING succeed_n %d.\n", mcnt);
 


@@ -4146,8 +4146,8 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
               goto on_failure;
             }
           break;
               goto on_failure;
             }
           break;

-        
-        case jump_n: 
+
+        case jump_n:

           EXTRACT_NUMBER (mcnt, p + 2);
           DEBUG_PRINT2 ("EXECUTING jump_n %d.\n", mcnt);
 
           EXTRACT_NUMBER (mcnt, p + 2);
           DEBUG_PRINT2 ("EXECUTING jump_n %d.\n", mcnt);
 


@@ -4156,13 +4156,13 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
             {
                mcnt--;
                STORE_NUMBER (p + 2, mcnt);
             {
                mcnt--;
                STORE_NUMBER (p + 2, mcnt);

-              goto unconditional_jump;      
+              goto unconditional_jump;

             }
           /* If don't have to jump any more, skip over the rest of command.  */
             }
           /* If don't have to jump any more, skip over the rest of command.  */

-         else      
-           p += 4;                  
+         else
+           p += 4;

           break;
           break;

-        
+

        case set_number_at:
          {
             DEBUG_PRINT1 ("EXECUTING set_number_at.\n");
        case set_number_at:
          {
             DEBUG_PRINT1 ("EXECUTING set_number_at.\n");


@@ -4207,13 +4207,13 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
          if (PTR_CHAR_POS ((unsigned char *) d) >= point)
            goto fail;
          break;
          if (PTR_CHAR_POS ((unsigned char *) d) >= point)
            goto fail;
          break;

-  
+

        case at_dot:
           DEBUG_PRINT1 ("EXECUTING at_dot.\n");
          if (PTR_CHAR_POS ((unsigned char *) d) != point)
            goto fail;
          break;
        case at_dot:
           DEBUG_PRINT1 ("EXECUTING at_dot.\n");
          if (PTR_CHAR_POS ((unsigned char *) d) != point)
            goto fail;
          break;

-  
+

        case after_dot:
           DEBUG_PRINT1 ("EXECUTING after_dot.\n");
           if (PTR_CHAR_POS ((unsigned char *) d) <= point)
        case after_dot:
           DEBUG_PRINT1 ("EXECUTING after_dot.\n");
           if (PTR_CHAR_POS ((unsigned char *) d) <= point)


@@ -4266,7 +4266,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
          SET_REGS_MATCHED ();
           d++;
          break;
          SET_REGS_MATCHED ();
           d++;
          break;

-         
+

        case notwordchar:
           DEBUG_PRINT1 ("EXECUTING non-Emacs notwordchar.\n");
          PREFETCH ();
        case notwordchar:
           DEBUG_PRINT1 ("EXECUTING non-Emacs notwordchar.\n");
          PREFETCH ();


@@ -4276,7 +4276,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
           d++;
          break;
 #endif /* not emacs */
           d++;
          break;
 #endif /* not emacs */

-          
+

         default:
           abort ();
        }
         default:
           abort ();
        }


@@ -4301,7 +4301,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
           if (p < pend)
             {
               boolean is_a_jump_n = false;
           if (p < pend)
             {
               boolean is_a_jump_n = false;

-              
+

               /* If failed to a backwards jump that's part of a repetition
                  loop, need to pop this failure point and use the next one.  */
               switch ((re_opcode_t) *p)
               /* If failed to a backwards jump that's part of a repetition
                  loop, need to pop this failure point and use the next one.  */
               switch ((re_opcode_t) *p)


@@ -4313,7 +4313,7 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
                 case jump:
                   p1 = p + 1;
                   EXTRACT_NUMBER_AND_INCR (mcnt, p1);
                 case jump:
                   p1 = p + 1;
                   EXTRACT_NUMBER_AND_INCR (mcnt, p1);

-                  p1 += mcnt;  
+                  p1 += mcnt;

 
                   if ((is_a_jump_n && (re_opcode_t) *p1 == succeed_n)
                       || (!is_a_jump_n
 
                   if ((is_a_jump_n && (re_opcode_t) *p1 == succeed_n)
                       || (!is_a_jump_n


@@ -4344,10 +4344,10 @@ re_match_2 (bufp, string1, size1, string2, size2, pos, regs, stop)
 
 
 /* We are passed P pointing to a register number after a start_memory.
 
 
 /* We are passed P pointing to a register number after a start_memory.

-   
+

    Return true if the pattern up to the corresponding stop_memory can
    match the empty string, and false otherwise.
    Return true if the pattern up to the corresponding stop_memory can
    match the empty string, and false otherwise.

-   
+

    If we find the matching stop_memory, sets P to point to one past its number.
    Otherwise, sets P to an undefined byte less than or equal to END.
 
    If we find the matching stop_memory, sets P to point to one past its number.
    Otherwise, sets P to an undefined byte less than or equal to END.
 


@@ -4361,20 +4361,20 @@ group_match_null_string_p (p, end, reg_info)
   int mcnt;
   /* Point to after the args to the start_memory.  */
   unsigned char *p1 = *p + 2;
   int mcnt;
   /* Point to after the args to the start_memory.  */
   unsigned char *p1 = *p + 2;

-  
+

   while (p1 < end)
     {
       /* Skip over opcodes that can match nothing, and return true or
         false, as appropriate, when we get to one that can't, or to the
          matching stop_memory.  */
   while (p1 < end)
     {
       /* Skip over opcodes that can match nothing, and return true or
         false, as appropriate, when we get to one that can't, or to the
          matching stop_memory.  */

-      
+

       switch ((re_opcode_t) *p1)
         {
         /* Could be either a loop or a series of alternatives.  */
         case on_failure_jump:
           p1++;
           EXTRACT_NUMBER_AND_INCR (mcnt, p1);
       switch ((re_opcode_t) *p1)
         {
         /* Could be either a loop or a series of alternatives.  */
         case on_failure_jump:
           p1++;
           EXTRACT_NUMBER_AND_INCR (mcnt, p1);

-          
+

           /* If the next operation is not a jump backwards in the
             pattern.  */
 
           /* If the next operation is not a jump backwards in the
             pattern.  */
 


@@ -4388,7 +4388,7 @@ group_match_null_string_p (p, end, reg_info)
 
                  /on_failure_jump/0/6/exactn/1/a/jump_past_alt/0/6
                  /on_failure_jump/0/6/exactn/1/b/jump_past_alt/0/3
 
                  /on_failure_jump/0/6/exactn/1/a/jump_past_alt/0/6
                  /on_failure_jump/0/6/exactn/1/b/jump_past_alt/0/3

-                 /exactn/1/c                                           
+                 /exactn/1/c

 
                  So, we have to first go through the first (n-1)
                  alternatives and then deal with the last one separately.  */
 
                  So, we have to first go through the first (n-1)
                  alternatives and then deal with the last one separately.  */


@@ -4404,19 +4404,19 @@ group_match_null_string_p (p, end, reg_info)
                      is, including the ending `jump_past_alt' and
                      its number.  */
 
                      is, including the ending `jump_past_alt' and
                      its number.  */
 

-                  if (!alt_match_null_string_p (p1, p1 + mcnt - 3, 
+                  if (!alt_match_null_string_p (p1, p1 + mcnt - 3,

                                                      reg_info))
                     return false;
 
                   /* Move to right after this alternative, including the
                     jump_past_alt.  */
                                                      reg_info))
                     return false;
 
                   /* Move to right after this alternative, including the
                     jump_past_alt.  */

-                  p1 += mcnt;  
+                  p1 += mcnt;

 
                   /* Break if it's the beginning of an n-th alternative
                      that doesn't begin with an on_failure_jump.  */
                   if ((re_opcode_t) *p1 != on_failure_jump)
                     break;
 
                   /* Break if it's the beginning of an n-th alternative
                      that doesn't begin with an on_failure_jump.  */
                   if ((re_opcode_t) *p1 != on_failure_jump)
                     break;

-               
+

                  /* Still have to check that it's not an n-th
                     alternative that starts with an on_failure_jump.  */
                  p1++;
                  /* Still have to check that it's not an n-th
                     alternative that starts with an on_failure_jump.  */
                  p1++;


@@ -4441,14 +4441,14 @@ group_match_null_string_p (p, end, reg_info)
             } /* if mcnt > 0 */
           break;
 
             } /* if mcnt > 0 */
           break;
 

-          
+

         case stop_memory:
          assert (p1[1] == **p);
           *p = p1 + 2;
           return true;
 
         case stop_memory:
          assert (p1[1] == **p);
           *p = p1 + 2;
           return true;
 

-        
-        default: 
+
+        default:

           if (!common_op_match_null_string_p (&p1, end, reg_info))
             return false;
         }
           if (!common_op_match_null_string_p (&p1, end, reg_info))
             return false;
         }


@@ -4461,7 +4461,7 @@ group_match_null_string_p (p, end, reg_info)
 /* Similar to group_match_null_string_p, but doesn't deal with alternatives:
    It expects P to be the first byte of a single alternative and END one
    byte past the last. The alternative can contain groups.  */
 /* Similar to group_match_null_string_p, but doesn't deal with alternatives:
    It expects P to be the first byte of a single alternative and END one
    byte past the last. The alternative can contain groups.  */

-   
+

 static boolean
 alt_match_null_string_p (p, end, reg_info)
     unsigned char *p, *end;
 static boolean
 alt_match_null_string_p (p, end, reg_info)
     unsigned char *p, *end;


@@ -4469,12 +4469,12 @@ alt_match_null_string_p (p, end, reg_info)
 {
   int mcnt;
   unsigned char *p1 = p;
 {
   int mcnt;
   unsigned char *p1 = p;

-  
+

   while (p1 < end)
     {
   while (p1 < end)
     {

-      /* Skip over opcodes that can match nothing, and break when we get 
+      /* Skip over opcodes that can match nothing, and break when we get

          to one that can't.  */
          to one that can't.  */

-      
+

       switch ((re_opcode_t) *p1)
         {
        /* It's a loop.  */
       switch ((re_opcode_t) *p1)
         {
        /* It's a loop.  */


@@ -4483,8 +4483,8 @@ alt_match_null_string_p (p, end, reg_info)
           EXTRACT_NUMBER_AND_INCR (mcnt, p1);
           p1 += mcnt;
           break;
           EXTRACT_NUMBER_AND_INCR (mcnt, p1);
           p1 += mcnt;
           break;

-          
-       default: 
+
+       default:

           if (!common_op_match_null_string_p (&p1, end, reg_info))
             return false;
         }
           if (!common_op_match_null_string_p (&p1, end, reg_info))
             return false;
         }


@@ -4495,8 +4495,8 @@ alt_match_null_string_p (p, end, reg_info)
 
 
 /* Deals with the ops common to group_match_null_string_p and
 
 
 /* Deals with the ops common to group_match_null_string_p and

-   alt_match_null_string_p.  
-   
+   alt_match_null_string_p.
+

    Sets P to one after the op and its arguments, if any.  */
 
 static boolean
    Sets P to one after the op and its arguments, if any.  */
 
 static boolean


@@ -4531,7 +4531,7 @@ common_op_match_null_string_p (p, end, reg_info)
       reg_no = *p1;
       assert (reg_no > 0 && reg_no <= MAX_REGNUM);
       ret = group_match_null_string_p (&p1, end, reg_info);
       reg_no = *p1;
       assert (reg_no > 0 && reg_no <= MAX_REGNUM);
       ret = group_match_null_string_p (&p1, end, reg_info);

-      
+

       /* Have to set this here in case we're checking a group which
          contains a group and a back reference to it.  */
 
       /* Have to set this here in case we're checking a group which
          contains a group and a back reference to it.  */
 


@@ -4541,7 +4541,7 @@ common_op_match_null_string_p (p, end, reg_info)
       if (!ret)
         return false;
       break;
       if (!ret)
         return false;
       break;

-          
+

     /* If this is an optimized succeed_n for zero times, make the jump.  */
     case jump:
       EXTRACT_NUMBER_AND_INCR (mcnt, p1);
     /* If this is an optimized succeed_n for zero times, make the jump.  */
     case jump:
       EXTRACT_NUMBER_AND_INCR (mcnt, p1);


@@ -4553,7 +4553,7 @@ common_op_match_null_string_p (p, end, reg_info)
 
     case succeed_n:
       /* Get to the number of times to succeed.  */
 
     case succeed_n:
       /* Get to the number of times to succeed.  */

-      p1 += 2;         
+      p1 += 2;

       EXTRACT_NUMBER_AND_INCR (mcnt, p1);
 
       if (mcnt == 0)
       EXTRACT_NUMBER_AND_INCR (mcnt, p1);
 
       if (mcnt == 0)


@@ -4566,7 +4566,7 @@ common_op_match_null_string_p (p, end, reg_info)
         return false;
       break;
 
         return false;
       break;
 

-    case duplicate: 
+    case duplicate:

       if (!REG_MATCH_NULL_STRING_P (reg_info[*p1]))
         return false;
       break;
       if (!REG_MATCH_NULL_STRING_P (reg_info[*p1]))
         return false;
       break;


@@ -4586,7 +4586,7 @@ common_op_match_null_string_p (p, end, reg_info)
 
 /* Return zero if TRANSLATE[S1] and TRANSLATE[S2] are identical for LEN
    bytes; nonzero otherwise.  */
 
 /* Return zero if TRANSLATE[S1] and TRANSLATE[S2] are identical for LEN
    bytes; nonzero otherwise.  */

-   
+

 static int
 bcmp_translate (s1, s2, len, translate)
      unsigned char *s1, *s2;
 static int
 bcmp_translate (s1, s2, len, translate)
      unsigned char *s1, *s2;


@@ -4607,10 +4607,10 @@ bcmp_translate (s1, s2, len, translate)
 /* re_compile_pattern is the GNU regular expression compiler: it
    compiles PATTERN (of length SIZE) and puts the result in BUFP.
    Returns 0 if the pattern was valid, otherwise an error string.
 /* re_compile_pattern is the GNU regular expression compiler: it
    compiles PATTERN (of length SIZE) and puts the result in BUFP.
    Returns 0 if the pattern was valid, otherwise an error string.

-   
+

    Assumes the `allocated' (and perhaps `buffer') and `translate' fields
    are set in BUFP on entry.
    Assumes the `allocated' (and perhaps `buffer') and `translate' fields
    are set in BUFP on entry.

-   
+

    We call regex_compile to do the actual compilation.  */
 
 const char *
    We call regex_compile to do the actual compilation.  */
 
 const char *


@@ -4620,23 +4620,23 @@ re_compile_pattern (pattern, length, bufp)
      struct re_pattern_buffer *bufp;
 {
   reg_errcode_t ret;
      struct re_pattern_buffer *bufp;
 {
   reg_errcode_t ret;

-  
+

   /* GNU code is written to assume at least RE_NREGS registers will be set
      (and at least one extra will be -1).  */
   bufp->regs_allocated = REGS_UNALLOCATED;
   /* GNU code is written to assume at least RE_NREGS registers will be set
      (and at least one extra will be -1).  */
   bufp->regs_allocated = REGS_UNALLOCATED;

-  
+

   /* And GNU code determines whether or not to get register information
      by passing null for the REGS argument to re_match, etc., not by
      setting no_sub.  */
   bufp->no_sub = 0;
   /* And GNU code determines whether or not to get register information
      by passing null for the REGS argument to re_match, etc., not by
      setting no_sub.  */
   bufp->no_sub = 0;

-  
+

   /* Match anchors at newline.  */
   bufp->newline_anchor = 1;
   /* Match anchors at newline.  */
   bufp->newline_anchor = 1;

-  
+

   ret = regex_compile (pattern, length, re_syntax_options, bufp);
 
   return re_error_msg[(int) ret];
   ret = regex_compile (pattern, length, re_syntax_options, bufp);
 
   return re_error_msg[(int) ret];

-}     
+}

 \f
 /* Entry points compatible with 4.2 BSD regex library.  We don't define
    them if this is an Emacs or POSIX compilation.  */
 \f
 /* Entry points compatible with 4.2 BSD regex library.  We don't define
    them if this is an Emacs or POSIX compilation.  */


@@ -4651,7 +4651,7 @@ re_comp (s)
     const char *s;
 {
   reg_errcode_t ret;
     const char *s;
 {
   reg_errcode_t ret;

-  
+

   if (!s)
     {
       if (!re_comp_buf.buffer)
   if (!s)
     {
       if (!re_comp_buf.buffer)


@@ -4678,7 +4678,7 @@ re_comp (s)
   re_comp_buf.newline_anchor = 1;
 
   ret = regex_compile (s, strlen (s), re_syntax_options, &re_comp_buf);
   re_comp_buf.newline_anchor = 1;
 
   ret = regex_compile (s, strlen (s), re_syntax_options, &re_comp_buf);

-  
+

   /* Yes, we're discarding `const' here.  */
   return (char *) re_error_msg[(int) ret];
 }
   /* Yes, we're discarding `const' here.  */
   return (char *) re_error_msg[(int) ret];
 }


@@ -4735,7 +4735,7 @@ re_exec (s)
 int
 regcomp (preg, pattern, cflags)
     regex_t *preg;
 int
 regcomp (preg, pattern, cflags)
     regex_t *preg;

-    const char *pattern; 
+    const char *pattern;

     int cflags;
 {
   reg_errcode_t ret;
     int cflags;
 {
   reg_errcode_t ret;


@@ -4746,17 +4746,17 @@ regcomp (preg, pattern, cflags)
   /* regex_compile will allocate the space for the compiled pattern.  */
   preg->buffer = 0;
   preg->allocated = 0;
   /* regex_compile will allocate the space for the compiled pattern.  */
   preg->buffer = 0;
   preg->allocated = 0;

-  
+

   /* Don't bother to use a fastmap when searching.  This simplifies the
      REG_NEWLINE case: if we used a fastmap, we'd have to put all the
      characters after newlines into the fastmap.  This way, we just try
      every character.  */
   preg->fastmap = 0;
   /* Don't bother to use a fastmap when searching.  This simplifies the
      REG_NEWLINE case: if we used a fastmap, we'd have to put all the
      characters after newlines into the fastmap.  This way, we just try
      every character.  */
   preg->fastmap = 0;

-  
+

   if (cflags & REG_ICASE)
     {
       unsigned i;
   if (cflags & REG_ICASE)
     {
       unsigned i;

-      
+

       preg->translate = (char *) malloc (CHAR_SET_SIZE);
       if (preg->translate == NULL)
         return (int) REG_ESPACE;
       preg->translate = (char *) malloc (CHAR_SET_SIZE);
       if (preg->translate == NULL)
         return (int) REG_ESPACE;


@@ -4781,38 +4781,38 @@ regcomp (preg, pattern, cflags)
 
   preg->no_sub = !!(cflags & REG_NOSUB);
 
 
   preg->no_sub = !!(cflags & REG_NOSUB);
 

-  /* POSIX says a null character in the pattern terminates it, so we 
+  /* POSIX says a null character in the pattern terminates it, so we

      can use strlen here in compiling the pattern.  */
   ret = regex_compile (pattern, strlen (pattern), syntax, preg);
      can use strlen here in compiling the pattern.  */
   ret = regex_compile (pattern, strlen (pattern), syntax, preg);

-  
+

   /* POSIX doesn't distinguish between an unmatched open-group and an
      unmatched close-group: both are REG_EPAREN.  */
   if (ret == REG_ERPAREN) ret = REG_EPAREN;
   /* POSIX doesn't distinguish between an unmatched open-group and an
      unmatched close-group: both are REG_EPAREN.  */
   if (ret == REG_ERPAREN) ret = REG_EPAREN;

-  
+

   return (int) ret;
 }
 
 
 /* regexec searches for a given pattern, specified by PREG, in the
    string STRING.
   return (int) ret;
 }
 
 
 /* regexec searches for a given pattern, specified by PREG, in the
    string STRING.

-   
+

    If NMATCH is zero or REG_NOSUB was set in the cflags argument to
    `regcomp', we ignore PMATCH.  Otherwise, we assume PMATCH has at
    least NMATCH elements, and we set them to the offsets of the
    corresponding matched substrings.
    If NMATCH is zero or REG_NOSUB was set in the cflags argument to
    `regcomp', we ignore PMATCH.  Otherwise, we assume PMATCH has at
    least NMATCH elements, and we set them to the offsets of the
    corresponding matched substrings.

-   
+

    EFLAGS specifies `execution flags' which affect matching: if
    REG_NOTBOL is set, then ^ does not match at the beginning of the
    string; if REG_NOTEOL is set, then $ does not match at the end.
    EFLAGS specifies `execution flags' which affect matching: if
    REG_NOTBOL is set, then ^ does not match at the beginning of the
    string; if REG_NOTEOL is set, then $ does not match at the end.

-   
+

    We return 0 if we find a match and REG_NOMATCH if not.  */
 
 int
 regexec (preg, string, nmatch, pmatch, eflags)
     const regex_t *preg;
    We return 0 if we find a match and REG_NOMATCH if not.  */
 
 int
 regexec (preg, string, nmatch, pmatch, eflags)
     const regex_t *preg;

-    const char *string; 
-    size_t nmatch; 
-    regmatch_t pmatch[]; 
+    const char *string;
+    size_t nmatch;
+    regmatch_t pmatch[];

     int eflags;
 {
   int ret;
     int eflags;
 {
   int ret;


@@ -4822,15 +4822,15 @@ regexec (preg, string, nmatch, pmatch, eflags)
   boolean want_reg_info = !preg->no_sub && nmatch > 0;
 
   private_preg = *preg;
   boolean want_reg_info = !preg->no_sub && nmatch > 0;
 
   private_preg = *preg;

-  
+

   private_preg.not_bol = !!(eflags & REG_NOTBOL);
   private_preg.not_eol = !!(eflags & REG_NOTEOL);
   private_preg.not_bol = !!(eflags & REG_NOTBOL);
   private_preg.not_eol = !!(eflags & REG_NOTEOL);

-  
+

   /* The user has told us exactly how many registers to return
      information about, via `nmatch'.  We have to pass that on to the
      matching routines.  */
   private_preg.regs_allocated = REGS_FIXED;
   /* The user has told us exactly how many registers to return
      information about, via `nmatch'.  We have to pass that on to the
      matching routines.  */
   private_preg.regs_allocated = REGS_FIXED;

-  
+

   if (want_reg_info)
     {
       regs.num_regs = nmatch;
   if (want_reg_info)
     {
       regs.num_regs = nmatch;


@@ -4844,7 +4844,7 @@ regexec (preg, string, nmatch, pmatch, eflags)
   ret = re_search (&private_preg, string, len,
                    /* start: */ 0, /* range: */ len,
                    want_reg_info ? &regs : (struct re_registers *) 0);
   ret = re_search (&private_preg, string, len,
                    /* start: */ 0, /* range: */ len,
                    want_reg_info ? &regs : (struct re_registers *) 0);

-  
+

   /* Copy the register information to the POSIX structure.  */
   if (want_reg_info)
     {
   /* Copy the register information to the POSIX structure.  */
   if (want_reg_info)
     {


@@ -4884,7 +4884,7 @@ regerror (errcode, preg, errbuf, errbuf_size)
 
   if (errcode < 0
       || errcode >= (sizeof (re_error_msg) / sizeof (re_error_msg[0])))
 
   if (errcode < 0
       || errcode >= (sizeof (re_error_msg) / sizeof (re_error_msg[0])))

-    /* Only error codes returned by the rest of the code should be passed 
+    /* Only error codes returned by the rest of the code should be passed

        to this routine.  If we are given anything else, or if other regex
        code generates an invalid error code, then the program has a bug.
        Dump core so we can fix it.  */
        to this routine.  If we are given anything else, or if other regex
        code generates an invalid error code, then the program has a bug.
        Dump core so we can fix it.  */


@@ -4898,7 +4898,7 @@ regerror (errcode, preg, errbuf, errbuf_size)
     msg = "Success";
 
   msg_size = strlen (msg) + 1; /* Includes the null.  */
     msg = "Success";
 
   msg_size = strlen (msg) + 1; /* Includes the null.  */

-  
+

   if (errbuf_size != 0)
     {
       if (msg_size > errbuf_size)
   if (errbuf_size != 0)
     {
       if (msg_size > errbuf_size)


@@ -4923,7 +4923,7 @@ regfree (preg)
   if (preg->buffer != NULL)
     free (preg->buffer);
   preg->buffer = NULL;
   if (preg->buffer != NULL)
     free (preg->buffer);
   preg->buffer = NULL;

-  
+

   preg->allocated = 0;
   preg->used = 0;
 
   preg->allocated = 0;
   preg->used = 0;
 

diff --git a/util/kconfig/regex.h b/util/kconfig/regex.h
index 408dd210348f0fdbea5b19115130107daf496f19..91243971af0196cf854beec0d0b140487a76dd6d 100644 (file)
--- a/util/kconfig/regex.h
+++ b/util/kconfig/regex.h
@@ -42,7 +42,7 @@ typedef unsigned reg_syntax_t;
 #define RE_BACKSLASH_ESCAPE_IN_LISTS (1)
 
 /* If this bit is not set, then + and ? are operators, and \+ and \? are
 #define RE_BACKSLASH_ESCAPE_IN_LISTS (1)
 
 /* If this bit is not set, then + and ? are operators, and \+ and \? are

-     literals. 
+     literals.

    If set, then \+ and \? are operators and + and ? are literals.  */
 #define RE_BK_PLUS_QM (RE_BACKSLASH_ESCAPE_IN_LISTS << 1)
 
    If set, then \+ and \? are operators and + and ? are literals.  */
 #define RE_BK_PLUS_QM (RE_BACKSLASH_ESCAPE_IN_LISTS << 1)
 


@@ -58,7 +58,7 @@ typedef unsigned reg_syntax_t;
         ^  is an anchor if it is at the beginning of a regular
            expression or after an open-group or an alternation operator;
         $  is an anchor if it is at the end of a regular expression, or
         ^  is an anchor if it is at the beginning of a regular
            expression or after an open-group or an alternation operator;
         $  is an anchor if it is at the end of a regular expression, or

-           before a close-group or an alternation operator.  
+           before a close-group or an alternation operator.

 
    This bit could be (re)combined with RE_CONTEXT_INDEP_OPS, because
    POSIX draft 11.2 says that * etc. in leading positions is undefined.
 
    This bit could be (re)combined with RE_CONTEXT_INDEP_OPS, because
    POSIX draft 11.2 says that * etc. in leading positions is undefined.


@@ -69,7 +69,7 @@ typedef unsigned reg_syntax_t;
 /* If this bit is set, then special characters are always special
      regardless of where they are in the pattern.
    If this bit is not set, then special characters are special only in
 /* If this bit is set, then special characters are always special
      regardless of where they are in the pattern.
    If this bit is not set, then special characters are special only in

-     some contexts; otherwise they are ordinary.  Specifically, 
+     some contexts; otherwise they are ordinary.  Specifically,

      * + ? and intervals are only special when not after the beginning,
      open-group, or alternation operator.  */
 #define RE_CONTEXT_INDEP_OPS (RE_CONTEXT_INDEP_ANCHORS << 1)
      * + ? and intervals are only special when not after the beginning,
      open-group, or alternation operator.  */
 #define RE_CONTEXT_INDEP_OPS (RE_CONTEXT_INDEP_ANCHORS << 1)


@@ -91,7 +91,7 @@ typedef unsigned reg_syntax_t;
 #define RE_HAT_LISTS_NOT_NEWLINE (RE_DOT_NOT_NULL << 1)
 
 /* If this bit is set, either \{...\} or {...} defines an
 #define RE_HAT_LISTS_NOT_NEWLINE (RE_DOT_NOT_NULL << 1)
 
 /* If this bit is set, either \{...\} or {...} defines an

-     interval, depending on RE_NO_BK_BRACES. 
+     interval, depending on RE_NO_BK_BRACES.

    If not set, \{, \}, {, and } are literals.  */
 #define RE_INTERVALS (RE_HAT_LISTS_NOT_NEWLINE << 1)
 
    If not set, \{, \}, {, and } are literals.  */
 #define RE_INTERVALS (RE_HAT_LISTS_NOT_NEWLINE << 1)
 


@@ -116,7 +116,7 @@ typedef unsigned reg_syntax_t;
    If not set, then \<digit> is a back-reference.  */
 #define RE_NO_BK_REFS (RE_NO_BK_PARENS << 1)
 
    If not set, then \<digit> is a back-reference.  */
 #define RE_NO_BK_REFS (RE_NO_BK_PARENS << 1)
 

-/* If this bit is set, then | is an alternation operator, and \| is literal. 
+/* If this bit is set, then | is an alternation operator, and \| is literal.

    If not set, then \| is an alternation operator, and | is literal.  */
 #define RE_NO_BK_VBAR (RE_NO_BK_REFS << 1)
 
    If not set, then \| is an alternation operator, and | is literal.  */
 #define RE_NO_BK_VBAR (RE_NO_BK_REFS << 1)
 


@@ -138,7 +138,7 @@ extern reg_syntax_t re_syntax_options;
 \f
 /* Define combinations of the above bits for the standard possibilities.
    (The [[[ comments delimit what gets put into the Texinfo file, so
 \f
 /* Define combinations of the above bits for the standard possibilities.
    (The [[[ comments delimit what gets put into the Texinfo file, so

-   don't delete them!)  */ 
+   don't delete them!)  */

 /* [[[begin syntaxes]]] */
 #define RE_SYNTAX_EMACS 0
 
 /* [[[begin syntaxes]]] */
 #define RE_SYNTAX_EMACS 0
 


@@ -205,7 +205,7 @@ extern reg_syntax_t re_syntax_options;
 #ifdef RE_DUP_MAX
 #undef RE_DUP_MAX
 #endif
 #ifdef RE_DUP_MAX
 #undef RE_DUP_MAX
 #endif

-#define RE_DUP_MAX ((1 << 15) - 1) 
+#define RE_DUP_MAX ((1 << 15) - 1)

 
 
 /* POSIX `cflags' bits (i.e., information for `regcomp').  */
 
 
 /* POSIX `cflags' bits (i.e., information for `regcomp').  */


@@ -217,7 +217,7 @@ extern reg_syntax_t re_syntax_options;
 /* If this bit is set, then ignore case when matching.
    If not set, then case is significant.  */
 #define REG_ICASE (REG_EXTENDED << 1)
 /* If this bit is set, then ignore case when matching.
    If not set, then case is significant.  */
 #define REG_ICASE (REG_EXTENDED << 1)

- 
+

 /* If this bit is set, then anchors do not match at newline
      characters in the string.
    If not set, then anchors do match at newlines.  */
 /* If this bit is set, then anchors do not match at newline
      characters in the string.
    If not set, then anchors do match at newlines.  */


@@ -256,7 +256,7 @@ typedef enum
   REG_EESCAPE,         /* Trailing backslash.  */
   REG_ESUBREG,         /* Invalid back reference.  */
   REG_EBRACK,          /* Unmatched left bracket.  */
   REG_EESCAPE,         /* Trailing backslash.  */
   REG_ESUBREG,         /* Invalid back reference.  */
   REG_EBRACK,          /* Unmatched left bracket.  */

-  REG_EPAREN,          /* Parenthesis imbalance.  */ 
+  REG_EPAREN,          /* Parenthesis imbalance.  */

   REG_EBRACE,          /* Unmatched \{.  */
   REG_BADBR,           /* Invalid contents of \{\}.  */
   REG_ERANGE,          /* Invalid range end.  */
   REG_EBRACE,          /* Unmatched \{.  */
   REG_BADBR,           /* Invalid contents of \{\}.  */
   REG_ERANGE,          /* Invalid range end.  */


@@ -287,7 +287,7 @@ struct re_pattern_buffer
   unsigned long allocated;
 
        /* Number of bytes actually used in `buffer'.  */
   unsigned long allocated;
 
        /* Number of bytes actually used in `buffer'.  */

-  unsigned long used;  
+  unsigned long used;

 
         /* Syntax setting with which the pattern was compiled.  */
   reg_syntax_t syntax;
 
         /* Syntax setting with which the pattern was compiled.  */
   reg_syntax_t syntax;


@@ -331,7 +331,7 @@ struct re_pattern_buffer
   unsigned no_sub : 1;
 
         /* If set, a beginning-of-line anchor doesn't match at the
   unsigned no_sub : 1;
 
         /* If set, a beginning-of-line anchor doesn't match at the

-           beginning of the string.  */ 
+           beginning of the string.  */

   unsigned not_bol : 1;
 
         /* Similarly for an end-of-line anchor.  */
   unsigned not_bol : 1;
 
         /* Similarly for an end-of-line anchor.  */


@@ -443,7 +443,7 @@ extern int re_match
 
 
 /* Relates to `re_match' as `re_search_2' relates to `re_search'.  */
 
 
 /* Relates to `re_match' as `re_search_2' relates to `re_search'.  */

-extern int re_match_2 
+extern int re_match_2

   _RE_ARGS ((struct re_pattern_buffer *buffer, const char *string1,
              int length1, const char *string2, int length2,
              int start, struct re_registers *regs, int stop));
   _RE_ARGS ((struct re_pattern_buffer *buffer, const char *string1,
              int length1, const char *string2, int length2,
              int start, struct re_registers *regs, int stop));

diff --git a/util/kconfig/zconf.tab.c_shipped b/util/kconfig/zconf.tab.c_shipped
index b0c90c32b1826ca59c4f907ff408b2def16d76dc..34560605f56362d3f495c6a5d130e988d54c8d0e 100644 (file)
--- a/util/kconfig/zconf.tab.c_shipped
+++ b/util/kconfig/zconf.tab.c_shipped
@@ -1393,7 +1393,7 @@ yyparse ()
 #endif
 #endif
 {
 #endif
 #endif
 {

-  
+

   int yystate;
   int yyn;
   int yyresult;
   int yystate;
   int yyn;
   int yyresult;

diff --git a/util/lbtdump/Makefile b/util/lbtdump/Makefile
index f6a4fbd40a3ff922078d63d587ba97809712e95e..9e923aea6a21586cb4bcaea7fdfe802b9c010da2 100644 (file)
--- a/util/lbtdump/Makefile
+++ b/util/lbtdump/Makefile
@@ -1,7 +1,7 @@
 TARGET=lbtdump
 
 CC=gcc
 TARGET=lbtdump
 
 CC=gcc

-CFLAGS=-g -O -Wall 
+CFLAGS=-g -O -Wall

 
 all: $(TARGET)
 
 
 all: $(TARGET)
 

diff --git a/util/lbtdump/lbtdump.c b/util/lbtdump/lbtdump.c
index 2c08ec8dc996360207b2385f4dfb8b7f12e2d47c..82ea06c024bab751e9b7782aff73174f0be8f6c0 100644 (file)
--- a/util/lbtdump/lbtdump.c
+++ b/util/lbtdump/lbtdump.c
@@ -48,8 +48,8 @@ unsigned long compute_checksum(void *addr, unsigned long length)
                (((char *)rec) < (((char *)head) + sizeof(*head) + head->table_bytes))  && \
                (rec->size >= 1) && \
                ((((char *)rec) + rec->size) <= (((char *)head) + sizeof(*head) + head->table_bytes)); \
                (((char *)rec) < (((char *)head) + sizeof(*head) + head->table_bytes))  && \
                (rec->size >= 1) && \
                ((((char *)rec) + rec->size) <= (((char *)head) + sizeof(*head) + head->table_bytes)); \

-               rec = (struct lb_record *)(((char *)rec) + rec->size)) 
-               
+               rec = (struct lb_record *)(((char *)rec) + rec->size))
+

 
 static int  count_lb_records(struct lb_header *head)
 {
 
 static int  count_lb_records(struct lb_header *head)
 {


@@ -72,7 +72,7 @@ struct lb_header *find_lb_table(void *base, unsigned long start, unsigned long e
                struct lb_record *recs = (struct lb_record *)(((char*)base) + addr + sizeof(*head));
                if (memcmp(head->signature, "LBIO", 4) != 0)
                        continue;
                struct lb_record *recs = (struct lb_record *)(((char*)base) + addr + sizeof(*head));
                if (memcmp(head->signature, "LBIO", 4) != 0)
                        continue;

-               fprintf(stdout, "Found candidate at: %08lx-%08lx\n", 
+               fprintf(stdout, "Found candidate at: %08lx-%08lx\n",

                        addr, addr + head->table_bytes);
                if (head->header_bytes != sizeof(*head)) {
                        fprintf(stderr, "Header bytes of %d are incorrect\n",
                        addr, addr + head->table_bytes);
                if (head->header_bytes != sizeof(*head)) {
                        fprintf(stderr, "Header bytes of %d are incorrect\n",


@@ -162,7 +162,7 @@ void print_memory(struct lb_record *ptr, unsigned long addr)
                        (unsigned long long)start, (unsigned long long)end, mem_type);
                pretty_print_number(stdout, start);
                printf(" - ");
                        (unsigned long long)start, (unsigned long long)end, mem_type);
                pretty_print_number(stdout, start);
                printf(" - ");

-               pretty_print_number(stdout, end);               
+               pretty_print_number(stdout, end);

                printf(")\n");
        }
 }
                printf(")\n");
        }
 }


@@ -174,7 +174,7 @@ void print_mainboard(struct lb_record *ptr, unsigned long addr)
        rec = (struct lb_mainboard *)ptr;
        max_size = rec->size - sizeof(*rec);
        printf("vendor: %.*s part number: %.*s\n",
        rec = (struct lb_mainboard *)ptr;
        max_size = rec->size - sizeof(*rec);
        printf("vendor: %.*s part number: %.*s\n",

-               max_size - rec->vendor_idx,      rec->strings + rec->vendor_idx, 
+               max_size - rec->vendor_idx,      rec->strings + rec->vendor_idx,

                max_size - rec->part_number_idx, rec->strings + rec->part_number_idx);
 }
 
                max_size - rec->part_number_idx, rec->strings + rec->part_number_idx);
 }
 


@@ -235,7 +235,7 @@ void print_option_checksum(struct lb_record *ptr, unsigned long addr)
        struct cmos_checksum *rec;
        rec = (struct cmos_checksum *)ptr;
        printf("checksum %d, rec len %d, range %d-%d location %d type %d\n",
        struct cmos_checksum *rec;
        rec = (struct cmos_checksum *)ptr;
        printf("checksum %d, rec len %d, range %d-%d location %d type %d\n",

-               rec->tag, rec->size, 
+               rec->tag, rec->size,

                rec->range_start, rec->range_end, rec->location, rec->type);
 }
 
                rec->range_start, rec->range_end, rec->location, rec->type);
 }
 


@@ -271,7 +271,7 @@ static struct lb_record *next_record(struct lb_record *rec)
        return (struct lb_record *)(((char *)rec) + rec->size);
 }
 
        return (struct lb_record *)(((char *)rec) + rec->size);
 }
 

-void print_lb_records(struct lb_record *rec, struct lb_record *last, 
+void print_lb_records(struct lb_record *rec, struct lb_record *last,

        unsigned long addr)
 {
        struct lb_record *next;
        unsigned long addr)
 {
        struct lb_record *next;


@@ -279,8 +279,8 @@ void print_lb_records(struct lb_record *rec, struct lb_record *last,
        int count;
        count = 0;
 
        int count;
        count = 0;
 

-       for(next = next_record(rec); (rec < last) && (next <= last); 
-               rec = next, addr += rec->size) { 
+       for(next = next_record(rec); (rec < last) && (next <= last);
+               rec = next, addr += rec->size) {

                next = next_record(rec);
                count++;
                for(i = 0; lb_types[i].print != 0; i++) {
                next = next_record(rec);
                count++;
                for(i = 0; lb_types[i].print != 0; i++) {


@@ -309,7 +309,7 @@ void print_lb_table(struct lb_header *head, unsigned long addr)
        print_lb_records(rec, last, addr + head->header_bytes);
 }
 
        print_lb_records(rec, last, addr + head->header_bytes);
 }
 

-int main(int argc, char **argv) 
+int main(int argc, char **argv)

 {
        unsigned char *low_1MB;
        struct lb_header *lb_table;
 {
        unsigned char *low_1MB;
        struct lb_header *lb_table;

diff --git a/util/mkelfImage/Makefile b/util/mkelfImage/Makefile
index 2100ed4cbe0756f35c3f96b3aefd98b289953a9d..cd265cf994f98fa739e40a3603e3065c679e9b56 100644 (file)
--- a/util/mkelfImage/Makefile
+++ b/util/mkelfImage/Makefile
@@ -39,7 +39,7 @@ SRCS+=$(GENERATED_SRCS)
 PSRCS:=$(patsubst ./%,mkelfImage-$(VERSION)/%,$(SRCS))
 PSRCS+=./mkelfImage-$(VERSION).spec
 
 PSRCS:=$(patsubst ./%,mkelfImage-$(VERSION)/%,$(SRCS))
 PSRCS+=./mkelfImage-$(VERSION).spec
 

-SBIN_TARGETS=$(OBJDIR)/sbin/mkelfImage 
+SBIN_TARGETS=$(OBJDIR)/sbin/mkelfImage

 MAN8_TARGETS=$(OBJDIR)/man/man8/mkelfImage.8
 
 TARGETS:=$(SBIN_TARGETS) $(MAN8_TARGETS)
 MAN8_TARGETS=$(OBJDIR)/man/man8/mkelfImage.8
 
 TARGETS:=$(SBIN_TARGETS) $(MAN8_TARGETS)


@@ -56,7 +56,7 @@ include linux-ia64/Makefile
 clean::
        @$(RM) -rf objdir
        @$(RM) -rf rpm
 clean::
        @$(RM) -rf objdir
        @$(RM) -rf rpm

-       @$(RM) -f config.log config.status config.cache 
+       @$(RM) -f config.log config.status config.cache

        @$(RM) -f $(SBIN_TARGETS) $(MAN1_TARGETS)
        @$(RM) -f mkelfImage-$(VERSION) $(TARBALL)
 
        @$(RM) -f $(SBIN_TARGETS) $(MAN1_TARGETS)
        @$(RM) -f mkelfImage-$(VERSION) $(TARBALL)
 

diff --git a/util/mkelfImage/News b/util/mkelfImage/News
index fbf8b6ace20106550b546504cf1159447b62efc9..c02c881d9a55fb8e276aba84ba286ef7981e0dc9 100644 (file)
--- a/util/mkelfImage/News
+++ b/util/mkelfImage/News
@@ -67,9 +67,9 @@
   Better firmware detection, and stripping excess symbols from the
   generated object.
 
   Better firmware detection, and stripping excess symbols from the
   generated object.
 

-* 1.11 24 January 2002 
+* 1.11 24 January 2002

   Bug fix to command line processing.
   Bug fix to command line processing.

- 
+

 * 1.10 21 January 2002
   Starting using the PHDRS directive which many versions of ld cannot
   handle correctly.  The symptom is generally a file that is 9MB in
 * 1.10 21 January 2002
   Starting using the PHDRS directive which many versions of ld cannot
   handle correctly.  The symptom is generally a file that is 9MB in


@@ -103,7 +103,7 @@
   Code cleanup in bzImage support.
 
 * 1.5 1 Febuary 2001
   Code cleanup in bzImage support.
 
 * 1.5 1 Febuary 2001

-  Add support for bzImage 
+  Add support for bzImage

 
 * 1.4 ???
   ???
 
 * 1.4 ???
   ???


@@ -113,7 +113,7 @@
 
 * 1.2 18 December 2000
   Work around for some versions of ld not treating /dev/null and an
 
 * 1.2 18 December 2000
   Work around for some versions of ld not treating /dev/null and an

-  empty file the same 
+  empty file the same

 
 * 1.1 30 November 2000
   Fix for ramdisks and large amounts of memory with 2.2 series
 
 * 1.1 30 November 2000
   Fix for ramdisks and large amounts of memory with 2.2 series

diff --git a/util/mkelfImage/config/config.guess b/util/mkelfImage/config/config.guess
index ed2e03b7f2b96b4ab546dc63ff2f2d56c4cc116c..ff40ddb03874737d01eabef5733d2f1075067858 100755 (executable)
--- a/util/mkelfImage/config/config.guess
+++ b/util/mkelfImage/config/config.guess
@@ -845,7 +845,7 @@ EOF
                ;;
          a.out-i386-linux)
                echo "${UNAME_MACHINE}-pc-linux-gnuaout"
                ;;
          a.out-i386-linux)
                echo "${UNAME_MACHINE}-pc-linux-gnuaout"

-               exit 0 ;;               
+               exit 0 ;;

          coff-i386)
                echo "${UNAME_MACHINE}-pc-linux-gnucoff"
                exit 0 ;;
          coff-i386)
                echo "${UNAME_MACHINE}-pc-linux-gnucoff"
                exit 0 ;;

diff --git a/util/mkelfImage/config/install-sh b/util/mkelfImage/config/install-sh
index e9de23842dcd44d2953129c866b1ad25f7e1f1d9..594a4edbffd3a761f0bec3cbe124e74e3ace9685 100755 (executable)
--- a/util/mkelfImage/config/install-sh
+++ b/util/mkelfImage/config/install-sh
@@ -115,7 +115,7 @@ fi
 if [ x"$dir_arg" != x ]; then
        dst=$src
        src=""
 if [ x"$dir_arg" != x ]; then
        dst=$src
        src=""

-       
+

        if [ -d $dst ]; then
                instcmd=:
                chmodcmd=""
        if [ -d $dst ]; then
                instcmd=:
                chmodcmd=""


@@ -125,7 +125,7 @@ if [ x"$dir_arg" != x ]; then
 else
 
 # Waiting for this to be detected by the "$instcmd $src $dsttmp" command
 else
 
 # Waiting for this to be detected by the "$instcmd $src $dsttmp" command

-# might cause directories to be created, which would be especially bad 
+# might cause directories to be created, which would be especially bad

 # if $src (and thus $dsttmp) contains '*'.
 
        if [ -f $src -o -d $src ]
 # if $src (and thus $dsttmp) contains '*'.
 
        if [ -f $src -o -d $src ]


@@ -135,7 +135,7 @@ else
                echo "install:  $src does not exist"
                exit 1
        fi
                echo "install:  $src does not exist"
                exit 1
        fi

-       
+

        if [ x"$dst" = x ]
        then
                echo "install:  no destination specified"
        if [ x"$dst" = x ]
        then
                echo "install:  no destination specified"


@@ -163,7 +163,7 @@ dstdir=`echo $dst | sed -e 's,[^/]*$,,;s,/$,,;s,^$,.,'`
 
 # Skip lots of stat calls in the usual case.
 if [ ! -d "$dstdir" ]; then
 
 # Skip lots of stat calls in the usual case.
 if [ ! -d "$dstdir" ]; then

-defaultIFS='   
+defaultIFS='

 '
 IFS="${IFS-${defaultIFS}}"
 
 '
 IFS="${IFS-${defaultIFS}}"
 


@@ -202,17 +202,17 @@ else
 
 # If we're going to rename the final executable, determine the name now.
 
 
 # If we're going to rename the final executable, determine the name now.
 

-       if [ x"$transformarg" = x ] 
+       if [ x"$transformarg" = x ]

        then
                dstfile=`basename $dst`
        else
        then
                dstfile=`basename $dst`
        else

-               dstfile=`basename $dst $transformbasename | 
+               dstfile=`basename $dst $transformbasename |

                        sed $transformarg`$transformbasename
        fi
 
 # don't allow the sed command to completely eliminate the filename
 
                        sed $transformarg`$transformbasename
        fi
 
 # don't allow the sed command to completely eliminate the filename
 

-       if [ x"$dstfile" = x ] 
+       if [ x"$dstfile" = x ]

        then
                dstfile=`basename $dst`
        else
        then
                dstfile=`basename $dst`
        else


@@ -243,7 +243,7 @@ else
 # Now rename the file to the real destination.
 
        $doit $rmcmd -f $dstdir/$dstfile &&
 # Now rename the file to the real destination.
 
        $doit $rmcmd -f $dstdir/$dstfile &&

-       $doit $mvcmd $dsttmp $dstdir/$dstfile 
+       $doit $mvcmd $dsttmp $dstdir/$dstfile

 
 fi &&
 
 
 fi &&
 

diff --git a/util/mkelfImage/configure.ac b/util/mkelfImage/configure.ac
index 652b952de4a3eff910c4a64ba81ed322a4affbc4..7aebd36e54f029eaf2d3b5d946488a124a20de6b 100644 (file)
--- a/util/mkelfImage/configure.ac
+++ b/util/mkelfImage/configure.ac
@@ -1,7 +1,7 @@
-dnl 
+dnl

 dnl configure.ac for mkelfImage
 dnl configure.ac for mkelfImage

-dnl 
-dnl 
+dnl
+dnl

 
 dnl ---Required
 AC_INIT(Makefile.conf.in)
 
 dnl ---Required
 AC_INIT(Makefile.conf.in)


@@ -16,11 +16,11 @@ AC_CANONICAL_HOST
 
 
 dnl Compute target cpu
 
 
 dnl Compute target cpu

-case $host_cpu in 
-       i?86 )  
+case $host_cpu in
+       i?86 )

                target_cpu="i386"
                ;;
                target_cpu="i386"
                ;;

-       * ) 
+       * )

                target_cpu="$host_cpu"
                ;;
 esac
                target_cpu="$host_cpu"
                ;;
 esac


@@ -111,7 +111,7 @@ if test "$with_i386" != "no" ; then
        fi
        AC_CHECK_PROG([I386_CC], [$cc], [$cc], [""], [$PATH])
        if test "$I386_CC" = no; then
        fi
        AC_CHECK_PROG([I386_CC], [$cc], [$cc], [""], [$PATH])
        if test "$I386_CC" = no; then

-          
+

                AC_MSG_ERROR([$cc not found])
        fi
        AC_CHECK_PROG([I386_CPP], [$cpp], [$cpp], [""], [$PATH])
                AC_MSG_ERROR([$cc not found])
        fi
        AC_CHECK_PROG([I386_CPP], [$cpp], [$cpp], [""], [$PATH])


@@ -148,7 +148,7 @@ if test "$with_ia64" != "no" ; then
        fi
        AC_CHECK_PROG([IA64_CC], [$cc], [$cc], [""], [$PATH])
        if test "$IA64_CC" = no; then
        fi
        AC_CHECK_PROG([IA64_CC], [$cc], [$cc], [""], [$PATH])
        if test "$IA64_CC" = no; then

-          
+

                AC_MSG_ERROR([$cc not found])
        fi
        AC_CHECK_PROG([IA64_CPP], [$cpp], [$cpp], [""], [$PATH])
                AC_MSG_ERROR([$cc not found])
        fi
        AC_CHECK_PROG([IA64_CPP], [$cpp], [$cpp], [""], [$PATH])

diff --git a/util/mkelfImage/include/elf_boot.h b/util/mkelfImage/include/elf_boot.h
index f90013ffa8d9fee065af757abb0ca0ce7853831b..41c4c72d6eae9ed29134028dd469dc7dc27b36c8 100644 (file)
--- a/util/mkelfImage/include/elf_boot.h
+++ b/util/mkelfImage/include/elf_boot.h
@@ -1,5 +1,5 @@
-#ifndef ELF_BOOT_H 
-#define ELF_BOOT_H 
+#ifndef ELF_BOOT_H
+#define ELF_BOOT_H

 
 
 /* This defines the structure of a table of parameters useful for ELF
 
 
 /* This defines the structure of a table of parameters useful for ELF


@@ -35,7 +35,7 @@ typedef struct Elf_Bhdr
        Elf_Half b_records;
 } Elf_Bhdr;
 
        Elf_Half b_records;
 } Elf_Bhdr;
 

-/* 
+/*

  * ELF Notes.
  */
 
  * ELF Notes.
  */
 

diff --git a/util/mkelfImage/include/linuxbios_tables.h b/util/mkelfImage/include/linuxbios_tables.h
index 8ee3257ee0b0b717a5295776b27b0989d5808b9d..75464fdd9e0ff52df4ac3a4d66695f1795de6124 100644 (file)
--- a/util/mkelfImage/include/linuxbios_tables.h
+++ b/util/mkelfImage/include/linuxbios_tables.h
@@ -8,7 +8,7 @@
  * is expected to be information that cannot be discovered by
  * other means, such as quering the hardware directly.
  *
  * is expected to be information that cannot be discovered by
  * other means, such as quering the hardware directly.
  *

- * All of the information should be Position Independent Data.  
+ * All of the information should be Position Independent Data.

  * That is it should be safe to relocated any of the information
  * without it's meaning/correctnes changing.   For table that
  * can reasonably be used on multiple architectures the data
  * That is it should be safe to relocated any of the information
  * without it's meaning/correctnes changing.   For table that
  * can reasonably be used on multiple architectures the data


@@ -63,7 +63,7 @@ struct lb_memory_range {
        uint32_t type;
 #define LB_MEM_RAM      1
 #define LB_MEM_RESERVED 2
        uint32_t type;
 #define LB_MEM_RAM      1
 #define LB_MEM_RESERVED 2

-       
+

 };
 
 struct lb_memory {
 };
 
 struct lb_memory {

diff --git a/util/mkelfImage/include/mkelfImage.h b/util/mkelfImage/include/mkelfImage.h
index 917f46e8c201cacb3bfa088f6d5b59d1e17d33b9..db1d356c8648938bfd7426189874dcbb751cc203 100644 (file)
--- a/util/mkelfImage/include/mkelfImage.h
+++ b/util/mkelfImage/include/mkelfImage.h
@@ -25,7 +25,7 @@ extern struct memelfphdr *add_program_headers(struct memelfheader *ehdr, int cou
 extern struct memelfnote *add_notes(struct memelfheader *ehdr, int count);
 
 typedef char *(probe_t)(char *kernel_buf, off_t kernel_size);
 extern struct memelfnote *add_notes(struct memelfheader *ehdr, int count);
 
 typedef char *(probe_t)(char *kernel_buf, off_t kernel_size);

-typedef int (mkelf_t)(int argc, char **argv, 
+typedef int (mkelf_t)(int argc, char **argv,

        struct memelfheader *hdr, char *kernel_buf, off_t kernel_size);
 typedef void (usage_t)(void);
 struct file_type {
        struct memelfheader *hdr, char *kernel_buf, off_t kernel_size);
 typedef void (usage_t)(void);
 struct file_type {

diff --git a/util/mkelfImage/kunzip_src/arch/alpha/include/stdint.h b/util/mkelfImage/kunzip_src/arch/alpha/include/stdint.h
index 9b93a0c84fbdc53a1d01a9aae083b7f60d540208..9da5cc49726596d9513bcc963dc020bbece82249 100644 (file)
--- a/util/mkelfImage/kunzip_src/arch/alpha/include/stdint.h
+++ b/util/mkelfImage/kunzip_src/arch/alpha/include/stdint.h
@@ -3,7 +3,7 @@
 
 /* Exact integral types */
 typedef unsigned char      uint8_t;
 
 /* Exact integral types */
 typedef unsigned char      uint8_t;

-typedef signed char        int8_t; 
+typedef signed char        int8_t;

 
 typedef unsigned short     uint16_t;
 typedef signed short       int16_t;
 
 typedef unsigned short     uint16_t;
 typedef signed short       int16_t;


@@ -17,7 +17,7 @@ typedef signed long        int64_t;
 
 /* Small types */
 typedef unsigned char      uint_least8_t;
 
 /* Small types */
 typedef unsigned char      uint_least8_t;

-typedef signed char        int_least8_t; 
+typedef signed char        int_least8_t;

 
 typedef unsigned short     uint_least16_t;
 typedef signed short       int_least16_t;
 
 typedef unsigned short     uint_least16_t;
 typedef signed short       int_least16_t;


@@ -30,7 +30,7 @@ typedef signed long        int_least64_t;
 
 /* Fast Types */
 typedef unsigned char      uint_fast8_t;
 
 /* Fast Types */
 typedef unsigned char      uint_fast8_t;

-typedef signed char        int_fast8_t; 
+typedef signed char        int_fast8_t;

 
 typedef unsigned long      uint_fast16_t;
 typedef signed long        int_fast16_t;
 
 typedef unsigned long      uint_fast16_t;
 typedef signed long        int_fast16_t;

diff --git a/util/mkelfImage/kunzip_src/arch/alpha/lib/divide.S b/util/mkelfImage/kunzip_src/arch/alpha/lib/divide.S
index a4bc1f751e687b94ca357e1bc2a356951312e03b..863e881348f047ce44477854856e2c4c77179406 100644 (file)
--- a/util/mkelfImage/kunzip_src/arch/alpha/lib/divide.S
+++ b/util/mkelfImage/kunzip_src/arch/alpha/lib/divide.S
@@ -19,7 +19,7 @@
  * These are not normal C functions: instead of the normal
  * calling sequence, these expect their arguments in registers
  * $24 and $25, and return the result in $27. Register $28 may
  * These are not normal C functions: instead of the normal
  * calling sequence, these expect their arguments in registers
  * $24 and $25, and return the result in $27. Register $28 may

- * be clobbered (assembly temporary), anything else must be saved. 
+ * be clobbered (assembly temporary), anything else must be saved.

  *
  * In short: painful.
  *
  *
  * In short: painful.
  *

diff --git a/util/mkelfImage/kunzip_src/arch/alpha/lib/kunzip.lds b/util/mkelfImage/kunzip_src/arch/alpha/lib/kunzip.lds
index ed632686a85edcee3e291a03ea1cae9c1410b0ae..467e64d1003239d920ca605dbf5363b48da15715 100644 (file)
--- a/util/mkelfImage/kunzip_src/arch/alpha/lib/kunzip.lds
+++ b/util/mkelfImage/kunzip_src/arch/alpha/lib/kunzip.lds
@@ -21,18 +21,18 @@ SECTIONS
        /* Global data */
        .data : {
                _data = .;
        /* Global data */
        .data : {
                _data = .;

-               *(.data) 
+               *(.data)

                CONSTRUCTORS
                *(.got)
                *(.sdata)
                _edata = .;
        }
                CONSTRUCTORS
                *(.got)
                *(.sdata)
                _edata = .;
        }

-       
+

        /* Important align _bss so bss may be zeroed with quadword access */
        . = ALIGN(BASIC_ALIGN);
        .bss : {
                _bss = .;
        /* Important align _bss so bss may be zeroed with quadword access */
        . = ALIGN(BASIC_ALIGN);
        .bss : {
                _bss = .;

-               *(.sbss) 
+               *(.sbss)

                *(.scommon)
                *(.bss)
                *(COMMON)
                *(.scommon)
                *(.bss)
                *(COMMON)

diff --git a/util/mkelfImage/kunzip_src/arch/i386/include/stdint.h b/util/mkelfImage/kunzip_src/arch/i386/include/stdint.h
index 58d7519cdee3a84558dfd3945ca26eeee1bf165a..f24aab1294dee294045358bd924194062cff06c9 100644 (file)
--- a/util/mkelfImage/kunzip_src/arch/i386/include/stdint.h
+++ b/util/mkelfImage/kunzip_src/arch/i386/include/stdint.h
@@ -3,7 +3,7 @@
 
 /* Exact integral types */
 typedef unsigned char      uint8_t;
 
 /* Exact integral types */
 typedef unsigned char      uint8_t;

-typedef signed char        int8_t; 
+typedef signed char        int8_t;

 
 typedef unsigned short     uint16_t;
 typedef signed short       int16_t;
 
 typedef unsigned short     uint16_t;
 typedef signed short       int16_t;


@@ -16,7 +16,7 @@ typedef signed long long   int64_t;
 
 /* Small types */
 typedef unsigned char      uint_least8_t;
 
 /* Small types */
 typedef unsigned char      uint_least8_t;

-typedef signed char        int_least8_t; 
+typedef signed char        int_least8_t;

 
 typedef unsigned short     uint_least16_t;
 typedef signed short       int_least16_t;
 
 typedef unsigned short     uint_least16_t;
 typedef signed short       int_least16_t;


@@ -29,7 +29,7 @@ typedef signed long long   int_least64_t;
 
 /* Fast Types */
 typedef unsigned char      uint_fast8_t;
 
 /* Fast Types */
 typedef unsigned char      uint_fast8_t;

-typedef signed char        int_fast8_t; 
+typedef signed char        int_fast8_t;

 
 typedef unsigned int       uint_fast16_t;
 typedef signed int         int_fast16_t;
 
 typedef unsigned int       uint_fast16_t;
 typedef signed int         int_fast16_t;

diff --git a/util/mkelfImage/kunzip_src/arch/i386/lib/kunzip.lds b/util/mkelfImage/kunzip_src/arch/i386/lib/kunzip.lds
index 0e649005cf22876efec8f11ac1b7252a79e52591..4d95da42f5d9b8fc39a1a2c9f9f8267e7340620f 100644 (file)
--- a/util/mkelfImage/kunzip_src/arch/i386/lib/kunzip.lds
+++ b/util/mkelfImage/kunzip_src/arch/i386/lib/kunzip.lds
@@ -21,18 +21,18 @@ SECTIONS
        /* Global data */
        .data : {
                _data = .;
        /* Global data */
        .data : {
                _data = .;

-               *(.data) 
+               *(.data)

                CONSTRUCTORS
                *(.got)
                *(.sdata)
                _edata = .;
        }
                CONSTRUCTORS
                *(.got)
                *(.sdata)
                _edata = .;
        }

-       
+

        /* Important align _bss so bss may be zeroed with quadword access */
        . = ALIGN(BASIC_ALIGN);
        .bss : {
                _bss = .;
        /* Important align _bss so bss may be zeroed with quadword access */
        . = ALIGN(BASIC_ALIGN);
        .bss : {
                _bss = .;

-               *(.sbss) 
+               *(.sbss)

                *(.scommon)
                *(.bss)
                *(COMMON)
                *(.scommon)
                *(.bss)
                *(COMMON)

diff --git a/util/mkelfImage/kunzip_src/arch/i386/lib/start.S b/util/mkelfImage/kunzip_src/arch/i386/lib/start.S
index fec7c9da665ff295b9fbf04db6378a44564eacaa..80ad476ae05c63671b129f642a960f2f03e8e408 100644 (file)
--- a/util/mkelfImage/kunzip_src/arch/i386/lib/start.S
+++ b/util/mkelfImage/kunzip_src/arch/i386/lib/start.S
@@ -33,4 +33,3 @@ jmp_to_program_entry:
        movl 24+__original_registers, %esp
        movl 28+__original_registers, %ebp
        jmp *__entry
        movl 24+__original_registers, %esp
        movl 28+__original_registers, %ebp
        jmp *__entry

-       
\ No newline at end of file

diff --git a/util/mkelfImage/kunzip_src/include/stdarg.h b/util/mkelfImage/kunzip_src/include/stdarg.h
index 24f3383198d4aad8b455397cb6634e792b32c03f..a3f1f2d5875c86250b2e2f2c461c9ecf59d7a17b 100644 (file)
--- a/util/mkelfImage/kunzip_src/include/stdarg.h
+++ b/util/mkelfImage/kunzip_src/include/stdarg.h
@@ -136,7 +136,7 @@ void va_end (__gnuc_va_list);               /* Defined in libgcc.a */
 /* Define va_list, if desired, from __gnuc_va_list. */
 /* We deliberately do not define va_list when called from
    stdio.h, because ANSI C says that stdio.h is not supposed to define
 /* Define va_list, if desired, from __gnuc_va_list. */
 /* We deliberately do not define va_list when called from
    stdio.h, because ANSI C says that stdio.h is not supposed to define

-   va_list.  stdio.h needs to have access to that data type, 
+   va_list.  stdio.h needs to have access to that data type,

    but must not use that name.  It should use the name __gnuc_va_list,
    which is safe because it is reserved for the implementation.  */
 
    but must not use that name.  It should use the name __gnuc_va_list,
    which is safe because it is reserved for the implementation.  */
 

diff --git a/util/mkelfImage/kunzip_src/include/string.h b/util/mkelfImage/kunzip_src/include/string.h
index dbaa1ecd1768ce6110dc55576f121502c7263be0..fa301c822e9b08a028724b4e4d4a01e2e8e67478 100644 (file)
--- a/util/mkelfImage/kunzip_src/include/string.h
+++ b/util/mkelfImage/kunzip_src/include/string.h
@@ -3,23 +3,23 @@
 
 #include <stddef.h>
 
 
 #include <stddef.h>
 

-// yes, linux has fancy ones. We don't care. This stuff gets used 
+// yes, linux has fancy ones. We don't care. This stuff gets used

 // hardly at all. And the pain of including those files is just too high.
 
 //extern inline void strcpy(char *dst, char *src) {while (*src) *dst++ = *src++;}
 
 //extern inline int strlen(char *src) { int i = 0; while (*src++) i++; return i;}
 
 // hardly at all. And the pain of including those files is just too high.
 
 //extern inline void strcpy(char *dst, char *src) {while (*src) *dst++ = *src++;}
 
 //extern inline int strlen(char *src) { int i = 0; while (*src++) i++; return i;}
 

-static inline size_t strnlen(const char *src, size_t max) { 
-  int i = 0; 
+static inline size_t strnlen(const char *src, size_t max) {
+  int i = 0;

   if (max<0) {
   if (max<0) {

-    while (*src++) 
-      i++; 
+    while (*src++)
+      i++;

     return i;
   }
   else {
     return i;
   }
   else {

-    while ((*src++) && (i < max)) 
-      i++; 
+    while ((*src++) && (i < max))
+      i++;

     return i;
   }
 }
     return i;
   }
 }

diff --git a/util/mkelfImage/kunzip_src/lib/inflate.c b/util/mkelfImage/kunzip_src/lib/inflate.c
index 894a98cd275f142126440803e148b8e87738ad2f..82818a6d53b891e1868304205f29be8ecf3193f6 100644 (file)
--- a/util/mkelfImage/kunzip_src/lib/inflate.c
+++ b/util/mkelfImage/kunzip_src/lib/inflate.c
@@ -1,5 +1,5 @@
-#define DEBG(x)  
-#define DEBG1(x)  
+#define DEBG(x)
+#define DEBG1(x)

 /* Taken from /usr/src/linux/lib/inflate.c [unmodified]
    Used for start32, 1/11/2000
    James Hendricks, Dale Webster */
 /* Taken from /usr/src/linux/lib/inflate.c [unmodified]
    Used for start32, 1/11/2000
    James Hendricks, Dale Webster */


@@ -7,9 +7,9 @@
 /* inflate.c -- Not copyrighted 1992 by Mark Adler
    version c10p1, 10 January 1993 */
 
 /* inflate.c -- Not copyrighted 1992 by Mark Adler
    version c10p1, 10 January 1993 */
 

-/* 
+/*

  * Adapted for booting Linux by Hannu Savolainen 1993
  * Adapted for booting Linux by Hannu Savolainen 1993

- * based on gzip-1.0.3 
+ * based on gzip-1.0.3

  *
  * Nicolas Pitre <nico@cam.org>, 1999/04/14 :
  *   Little mods for all variable to reside either into rodata or bss segments
  *
  * Nicolas Pitre <nico@cam.org>, 1999/04/14 :
  *   Little mods for all variable to reside either into rodata or bss segments


@@ -54,7 +54,7 @@
    chunks), otherwise the dynamic method is used.  In the latter case, the
    codes are customized to the probabilities in the current block, and so
    can code it much better than the pre-determined fixed codes.
    chunks), otherwise the dynamic method is used.  In the latter case, the
    codes are customized to the probabilities in the current block, and so
    can code it much better than the pre-determined fixed codes.

- 
+

    The Huffman codes themselves are decoded using a multi-level table
    lookup, in order to maximize the speed of decoding plus the speed of
    building the decoding tables.  See the comments below that precede the
    The Huffman codes themselves are decoded using a multi-level table
    lookup, in order to maximize the speed of decoding plus the speed of
    building the decoding tables.  See the comments below that precede the


@@ -121,7 +121,7 @@ static char rcsid[] = "#Id: inflate.c,v 0.14 1993/06/10 13:27:04 jloup Exp #";
 #include "gzip.h"
 #define STATIC
 #endif /* !STATIC */
 #include "gzip.h"
 #define STATIC
 #endif /* !STATIC */

-       
+

 #define slide window
 
 /* Huffman code lookup table entry--this entry is four bytes for machines
 #define slide window
 
 /* Huffman code lookup table entry--this entry is four bytes for machines


@@ -142,7 +142,7 @@ struct huft {
 
 
 /* Function prototypes */
 
 
 /* Function prototypes */

-STATIC int huft_build OF((unsigned *, unsigned, unsigned, 
+STATIC int huft_build OF((unsigned *, unsigned, unsigned,

                const ush *, const ush *, struct huft **, int *));
 STATIC int huft_free OF((struct huft *));
 STATIC int inflate_codes OF((struct huft *, struct huft *, int, int));
                const ush *, const ush *, struct huft **, int *));
 STATIC int huft_free OF((struct huft *));
 STATIC int inflate_codes OF((struct huft *, struct huft *, int, int));


@@ -188,7 +188,7 @@ static const ush cpdext[] = {         /* Extra bits for distance codes */
 
 /* Macros for inflate() bit peeking and grabbing.
    The usage is:
 
 /* Macros for inflate() bit peeking and grabbing.
    The usage is:

-   
+

         NEEDBITS(j)
         x = b & mask_bits[j];
         DUMPBITS(j)
         NEEDBITS(j)
         x = b & mask_bits[j];
         DUMPBITS(j)


@@ -315,7 +315,7 @@ DEBG("huft1 ");
   memzero(c, sizeof(c));
   p = b;  i = n;
   do {
   memzero(c, sizeof(c));
   p = b;  i = n;
   do {

-    Tracecv(*p, (stderr, (n-i >= ' ' && n-i <= '~' ? "%c %d\n" : "0x%x %d\n"), 
+    Tracecv(*p, (stderr, (n-i >= ' ' && n-i <= '~' ? "%c %d\n" : "0x%x %d\n"),

            n-i, *p));
     c[*p]++;                    /* assume all entries <= BMAX */
     p++;                      /* Can't combine with above line (Solaris bug) */
            n-i, *p));
     c[*p]++;                    /* assume all entries <= BMAX */
     p++;                      /* Can't combine with above line (Solaris bug) */


@@ -509,7 +509,7 @@ struct huft *t;         /* table to free */
     q = (--p)->v.t;
     free((char*)p);
     p = q;
     q = (--p)->v.t;
     free((char*)p);
     p = q;

-  } 
+  }

   return 0;
 }
 
   return 0;
 }
 


@@ -978,7 +978,7 @@ STATIC int inflate()
     hufts = 0;
     malloc_mark(&mark);
     if ((r = inflate_block(&e)) != 0) {
     hufts = 0;
     malloc_mark(&mark);
     if ((r = inflate_block(&e)) != 0) {

-      malloc_release(&mark);       
+      malloc_release(&mark);

       return r;
     }
     malloc_release(&mark);
       return r;
     }
     malloc_release(&mark);


@@ -1014,7 +1014,7 @@ static ulg crc;           /* initialized in makecrc() so it'll reside in bss */
 #define CRC_VALUE (crc ^ 0xffffffffL)
 
 /*
 #define CRC_VALUE (crc ^ 0xffffffffL)
 
 /*

- * Code to compute the CRC-32 table. Borrowed from 
+ * Code to compute the CRC-32 table. Borrowed from

  * gzip-1.0.3/makecrc.c.
  */
 
  * gzip-1.0.3/makecrc.c.
  */
 


@@ -1122,7 +1122,7 @@ int gunzip(void)
     if ((flags & ORIG_NAME) != 0) {
            /* Discard the old name */
            while (get_byte() != 0) /* null */ ;
     if ((flags & ORIG_NAME) != 0) {
            /* Discard the old name */
            while (get_byte() != 0) /* null */ ;

-    } 
+    }

 
     /* Discard file comment if any */
     if ((flags & COMMENT) != 0) {
 
     /* Discard file comment if any */
     if ((flags & COMMENT) != 0) {


@@ -1148,7 +1148,7 @@ int gunzip(void)
            }
            return -1;
     }
            }
            return -1;
     }

-           
+

     /* Get the crc and original length */
     /* crc32  (see algorithm.doc)
      * uncompressed input size modulo 2^32
     /* Get the crc and original length */
     /* crc32  (see algorithm.doc)
      * uncompressed input size modulo 2^32


@@ -1157,12 +1157,12 @@ int gunzip(void)
     orig_crc |= (ulg) get_byte() << 8;
     orig_crc |= (ulg) get_byte() << 16;
     orig_crc |= (ulg) get_byte() << 24;
     orig_crc |= (ulg) get_byte() << 8;
     orig_crc |= (ulg) get_byte() << 16;
     orig_crc |= (ulg) get_byte() << 24;

-    
+

     orig_len = (ulg) get_byte();
     orig_len |= (ulg) get_byte() << 8;
     orig_len |= (ulg) get_byte() << 16;
     orig_len |= (ulg) get_byte() << 24;
     orig_len = (ulg) get_byte();
     orig_len |= (ulg) get_byte() << 8;
     orig_len |= (ulg) get_byte() << 16;
     orig_len |= (ulg) get_byte() << 24;

-    
+

     /* Validate decompression */
     if (orig_crc != CRC_VALUE) {
            error("crc error");
     /* Validate decompression */
     if (orig_crc != CRC_VALUE) {
            error("crc error");

diff --git a/util/mkelfImage/kunzip_src/lib/kunzip.c b/util/mkelfImage/kunzip_src/lib/kunzip.c
index 4bfe504f708946d69f3909051b7fe6feb12a5e93..b8ae1c1ecc10eaa896faa6089838a94bee267316 100644 (file)
--- a/util/mkelfImage/kunzip_src/lib/kunzip.c
+++ b/util/mkelfImage/kunzip_src/lib/kunzip.c
@@ -7,7 +7,7 @@
  */
 
 #ifdef DEBUG
  */
 
 #ifdef DEBUG

-#  define Trace(x) 
+#  define Trace(x)

 #  define Tracev(x)
 #  define Tracevv(x)
 #  define Tracec(c,x)
 #  define Tracev(x)
 #  define Tracevv(x)
 #  define Tracec(c,x)


@@ -113,7 +113,7 @@ static void flush_window(void)
                        limit = outcnt;
                }
                out = output_ptr;
                        limit = outcnt;
                }
                out = output_ptr;

-               DBG(("flush 0x%08lx start 0x%08lx limit 0x%08lx\n", 
+               DBG(("flush 0x%08lx start 0x%08lx limit 0x%08lx\n",

                        (unsigned long) out, (unsigned long)n, limit));
                for (; n < limit; n++) {
                        ch = *out++ = *in++;
                        (unsigned long) out, (unsigned long)n, limit));
                for (; n < limit; n++) {
                        ch = *out++ = *in++;

diff --git a/util/mkelfImage/linux-i386/convert.lds b/util/mkelfImage/linux-i386/convert.lds
index 8c9eba799a481deecce3172c3479265d35ee6797..59cd714aa61659d2669d438dfef23288e076fd5a 100644 (file)
--- a/util/mkelfImage/linux-i386/convert.lds
+++ b/util/mkelfImage/linux-i386/convert.lds
@@ -11,8 +11,8 @@ SECTIONS
                *(.text)
                *(.text.*)
        }  = 0x9090
                *(.text)
                *(.text.*)
        }  = 0x9090

-       .rodata (.): { 
-               *(.rodata) 
+       .rodata (.): {
+               *(.rodata)

                *(.rodata.*)
        }
        _etext = .;                     /* End of text section */
                *(.rodata.*)
        }
        _etext = .;                     /* End of text section */


@@ -28,7 +28,7 @@ SECTIONS
        }
        _end = . ;
        bss_sizex = _end - _bss;
        }
        _end = . ;
        bss_sizex = _end - _bss;

-       
+

        /DISCARD/ : {
                *(.comment)
                *(.note)
        /DISCARD/ : {
                *(.comment)
                *(.note)

diff --git a/util/mkelfImage/linux-i386/convert_params.c b/util/mkelfImage/linux-i386/convert_params.c
index 5af3fafca3da0d6290773f574aff191ad1d9c8c7..819f797390c9acd84b79c6f58096929f09377abb 100644 (file)
--- a/util/mkelfImage/linux-i386/convert_params.c
+++ b/util/mkelfImage/linux-i386/convert_params.c
@@ -15,9 +15,9 @@ long user_stack [STACK_SIZE] = { 0 };
 unsigned long * stack_start = & user_stack[STACK_SIZE];
 
 /* FIXME expand on drive_info_)struct... */
 unsigned long * stack_start = & user_stack[STACK_SIZE];
 
 /* FIXME expand on drive_info_)struct... */

-struct drive_info_struct { 
-       uint8_t dummy[32]; 
-}; 
+struct drive_info_struct {
+       uint8_t dummy[32];
+};

 struct sys_desc_table {
        uint16_t length;
        uint8_t  table[318];
 struct sys_desc_table {
        uint16_t length;
        uint8_t  table[318];


@@ -150,7 +150,7 @@ struct parameters {
        uint16_t ramdisk_flags;                 /* 0x1f8 */
 #define RAMDISK_IMAGE_START_MASK       0x07FF
 #define RAMDISK_PROMPT_FLAG            0x8000
        uint16_t ramdisk_flags;                 /* 0x1f8 */
 #define RAMDISK_IMAGE_START_MASK       0x07FF
 #define RAMDISK_PROMPT_FLAG            0x8000

-#define RAMDISK_LOAD_FLAG              0x4000  
+#define RAMDISK_LOAD_FLAG              0x4000

        uint8_t  reserved8[2];                  /* 0x1fa */
        uint16_t orig_root_dev;                 /* 0x1fc */
        uint8_t  reserved9[1];                  /* 0x1fe */
        uint8_t  reserved8[2];                  /* 0x1fa */
        uint16_t orig_root_dev;                 /* 0x1fc */
        uint8_t  reserved9[1];                  /* 0x1fe */


@@ -292,7 +292,7 @@ static void printf(const char *fmt, ...)
                        continue;
                }
                if (*++fmt == 's') {
                        continue;
                }
                if (*++fmt == 's') {

-                       for(p = va_arg(args, char *); *p != '\0'; p++) 
+                       for(p = va_arg(args, char *); *p != '\0'; p++)

                                putchar(*p);
                }
                else {  /* Length of item is bounded */
                                putchar(*p);
                }
                else {  /* Length of item is bounded */


@@ -314,7 +314,7 @@ static void printf(const char *fmt, ...)
                                        fmt++;
                                }
                        }
                                        fmt++;
                                }
                        }

-                       
+

                        /*
                         * Before each format q points to tmp buffer
                         * After each format q points past end of item
                        /*
                         * Before each format q points to tmp buffer
                         * After each format q points past end of item


@@ -376,7 +376,7 @@ static void printf(const char *fmt, ...)
 }
 
 /*
 }
 
 /*

- * String Functions 
+ * String Functions

  * =============================================================================
  */
 
  * =============================================================================
  */
 


@@ -408,7 +408,7 @@ void* memcpy(void *dest, const void *src, size_t len)
        d = dest;
        s = src;
 
        d = dest;
        s = src;
 

-       for (i=0; i < len; i++) 
+       for (i=0; i < len; i++)

                d[i] = s[i];
 
        return dest;
                d[i] = s[i];
 
        return dest;


@@ -426,7 +426,7 @@ int memcmp(void *src1, void *src2, size_t len)
                }
        }
        return 0;
                }
        }
        return 0;

-       
+

 }
 
 /*
 }
 
 /*


@@ -510,7 +510,7 @@ void append_command_line(struct parameters *real_mode, char *arg, int arg_bytes)
        *dest++ = '\0';
 }
 
        *dest++ = '\0';
 }
 

-static void set_memsize_k(struct parameters *real_mode, unsigned long mem_k) 
+static void set_memsize_k(struct parameters *real_mode, unsigned long mem_k)

 {
        /* ALT_MEM_K maxes out at 4GB */
        if (mem_k > 0x3fffff) {
 {
        /* ALT_MEM_K maxes out at 4GB */
        if (mem_k > 0x3fffff) {


@@ -527,7 +527,7 @@ static void set_memsize_k(struct parameters *real_mode, unsigned long mem_k)
 }
 
 static void add_e820_map(struct parameters *real_mode,
 }
 
 static void add_e820_map(struct parameters *real_mode,

-       unsigned long long addr, unsigned long long size, 
+       unsigned long long addr, unsigned long long size,

        unsigned long type)
 {
        unsigned long long high;
        unsigned long type)
 {
        unsigned long long high;


@@ -628,8 +628,8 @@ static void convert_multiboot_memmap(
        multi_puts("size: "); multi_put_hex(size); multi_puts("\n");
        multi_puts("end: "); multi_put_hex((unsigned)end); multi_puts("\n");
        for(seg = info->mmap_addr; (seg < end); seg = next_seg(seg,size)) {
        multi_puts("size: "); multi_put_hex(size); multi_puts("\n");
        multi_puts("end: "); multi_put_hex((unsigned)end); multi_puts("\n");
        for(seg = info->mmap_addr; (seg < end); seg = next_seg(seg,size)) {

-               multi_puts("multi-mem: "); 
-               multi_put_lhex(seg->size); 
+               multi_puts("multi-mem: ");
+               multi_put_lhex(seg->size);

                multi_puts(" @ ");
                multi_put_lhex(seg->addr);
                multi_puts(" (");
                multi_puts(" @ ");
                multi_put_lhex(seg->addr);
                multi_puts(" (");


@@ -662,7 +662,7 @@ static void convert_multiboot(
                set_memsize_k(info->real_mode, mb_info->mem_upper + (1 << 10));
        }
        if (mb_info->flags & MULTIBOOT_CMDLINE_VALID) {
                set_memsize_k(info->real_mode, mb_info->mem_upper + (1 << 10));
        }
        if (mb_info->flags & MULTIBOOT_CMDLINE_VALID) {

-               append_command_line(info->real_mode, mb_info->command_line, 
+               append_command_line(info->real_mode, mb_info->command_line,

                        MULTIBOOT_MAX_COMMAND_LINE);
        }
        if (info->need_mem_sizes && (mb_info->flags & MULTIBOOT_MMAP_VALID)) {
                        MULTIBOOT_MAX_COMMAND_LINE);
        }
        if (info->need_mem_sizes && (mb_info->flags & MULTIBOOT_MMAP_VALID)) {


@@ -699,8 +699,8 @@ static void convert_uniform_boot_memory(
        entries = (mem->size - sizeof(*mem))/sizeof(mem->map[0]);
        for(i = 0; (i < entries) && (i < E820MAX); i++) {
                unsigned long type;
        entries = (mem->size - sizeof(*mem))/sizeof(mem->map[0]);
        for(i = 0; (i < entries) && (i < E820MAX); i++) {
                unsigned long type;

-               ube_puts("ube-mem: "); 
-               ube_put_lhex(mem->map[i].size); 
+               ube_puts("ube-mem: ");
+               ube_put_lhex(mem->map[i].size);

                ube_puts(" @ ");
                ube_put_lhex(mem->map[i].start);
                ube_puts(" (");
                ube_puts(" @ ");
                ube_put_lhex(mem->map[i].start);
                ube_puts(" (");


@@ -724,7 +724,7 @@ static void convert_uniform_boot_memory(
                        break;
                }
                ube_puts(")\n");
                        break;
                }
                ube_puts(")\n");

-               add_e820_map(real_mode, 
+               add_e820_map(real_mode,

                        mem->map[i].start, mem->map[i].size, type);
        }
 }
                        mem->map[i].start, mem->map[i].size, type);
        }
 }


@@ -762,9 +762,9 @@ static void convert_uniform_boot(struct param_info *info,
  * =============================================================================
  */
 
  * =============================================================================
  */
 

-/* we're getting screwed again and again by this problem of the 8259. 
- * so we're going to leave this lying around for inclusion into 
- * crt0.S on an as-needed basis. 
+/* we're getting screwed again and again by this problem of the 8259.
+ * so we're going to leave this lying around for inclusion into
+ * crt0.S on an as-needed basis.

  * well, that went ok, I hope. Now we have to reprogram the interrupts :-(
  * we put them right after the intel-reserved hardware interrupts, at
  * int 0x20-0x2F. There they won't mess up anything. Sadly IBM really
  * well, that went ok, I hope. Now we have to reprogram the interrupts :-(
  * we put them right after the intel-reserved hardware interrupts, at
  * int 0x20-0x2F. There they won't mess up anything. Sadly IBM really


@@ -786,7 +786,7 @@ static void setup_i8259(void)
        outb(0x02, 0xA1);               /*! 8259-2 is slave*/
 
        outb(0x01, 0x21);               /*! 8086 mode for both*/
        outb(0x02, 0xA1);               /*! 8259-2 is slave*/
 
        outb(0x01, 0x21);               /*! 8086 mode for both*/

-       outb(0x01, 0xA1);               
+       outb(0x01, 0xA1);

 
        outb(0xFF, 0xA1);               /*! mask off all interrupts for now*/
        outb(0xFB, 0x21);               /*! mask all irq's but irq2 which is cascaded*/
 
        outb(0xFF, 0xA1);               /*! mask off all interrupts for now*/
        outb(0xFB, 0x21);               /*! mask all irq's but irq2 which is cascaded*/


@@ -831,11 +831,11 @@ static int count_elf_notes(Elf_Bhdr *bhdr)
                printf("elf_note = %lx\n", (unsigned long)note);
                printf("elf_namesz = %x\n", hdr->n_namesz);
                printf("elf_descsz = %x\n", hdr->n_descsz);
                printf("elf_note = %lx\n", (unsigned long)note);
                printf("elf_namesz = %x\n", hdr->n_namesz);
                printf("elf_descsz = %x\n", hdr->n_descsz);

-               printf("elf_type   = %x\n", hdr->n_type); 
+               printf("elf_type   = %x\n", hdr->n_type);

                printf("elf_name = %lx\n", (unsigned long)n_name);
                printf("elf_desc = %lx\n", (unsigned long)n_desc);
 #endif
                printf("elf_name = %lx\n", (unsigned long)n_name);
                printf("elf_desc = %lx\n", (unsigned long)n_desc);
 #endif

-               if (next > end) 
+               if (next > end)

                        break;
                count++;
                note = next;
                        break;
                count++;
                note = next;


@@ -843,7 +843,7 @@ static int count_elf_notes(Elf_Bhdr *bhdr)
        return count;
 }
 
        return count;
 }
 

-static Elf_Nhdr *find_elf_note(Elf_Bhdr *bhdr, 
+static Elf_Nhdr *find_elf_note(Elf_Bhdr *bhdr,

        Elf_Word namesz, unsigned char *name, Elf_Word type)
 {
        unsigned char *note, *end;
        Elf_Word namesz, unsigned char *name, Elf_Word type)
 {
        unsigned char *note, *end;


@@ -856,7 +856,7 @@ static Elf_Nhdr *find_elf_note(Elf_Bhdr *bhdr,
                n_name = note + sizeof(*hdr);
                n_desc = n_name + ((hdr->n_namesz + 3) & ~3);
                next = n_desc + ((hdr->n_descsz + 3) & ~3);
                n_name = note + sizeof(*hdr);
                n_desc = n_name + ((hdr->n_namesz + 3) & ~3);
                next = n_desc + ((hdr->n_descsz + 3) & ~3);

-               if (next > end) 
+               if (next > end)

                        break;
                if ((hdr->n_type == type) &&
                        (hdr->n_namesz == namesz) &&
                        break;
                if ((hdr->n_type == type) &&
                        (hdr->n_namesz == namesz) &&


@@ -897,7 +897,7 @@ static void convert_elf_boot(struct param_info *info, Elf_Bhdr *bhdr)
                n_name = note + sizeof(*hdr);
                n_desc = n_name + ((hdr->n_namesz + 3) & ~3);
                next = n_desc + ((hdr->n_descsz + 3) & ~3);
                n_name = note + sizeof(*hdr);
                n_desc = n_name + ((hdr->n_namesz + 3) & ~3);
                next = n_desc + ((hdr->n_descsz + 3) & ~3);

-               if (next > end) 
+               if (next > end)

                        break;
                for(i = 0; i < sizeof(elf_notes)/sizeof(elf_notes[0]); i++) {
                        if ((hdr->n_type == elf_notes[i].type) &&
                        break;
                for(i = 0; i < sizeof(elf_notes)/sizeof(elf_notes[0]); i++) {
                        if ((hdr->n_type == elf_notes[i].type) &&


@@ -935,7 +935,7 @@ static unsigned count_lb_records(void *start, unsigned long length)
        count = 0;
        end = ((char *)start) + length;
        for(rec = start; ((void *)rec < end) &&
        count = 0;
        end = ((char *)start) + length;
        for(rec = start; ((void *)rec < end) &&

-               (rec->size <= (unsigned long)(end - (void *)rec)); 
+               (rec->size <= (unsigned long)(end - (void *)rec));

                rec = (void *)(((char *)rec) + rec->size)) {
                count++;
        }
                rec = (void *)(((char *)rec) + rec->size)) {
                count++;
        }


@@ -948,7 +948,7 @@ static struct lb_header *__find_lb_table(void *start, void *end)
        /* For now be stupid.... */
        for(ptr = start; (void *)ptr < end; ptr += 16) {
                struct lb_header *head = (void *)ptr;
        /* For now be stupid.... */
        for(ptr = start; (void *)ptr < end; ptr += 16) {
                struct lb_header *head = (void *)ptr;

-               if ((head->signature[0] == 'L') && 
+               if ((head->signature[0] == 'L') &&

                        (head->signature[1] == 'B') &&
                        (head->signature[2] == 'I') &&
                        (head->signature[3] == 'O') &&
                        (head->signature[1] == 'B') &&
                        (head->signature[2] == 'I') &&
                        (head->signature[3] == 'O') &&


@@ -1001,10 +1001,10 @@ static void convert_lb_memory(struct param_info *info, struct lb_memory *mem)
                unsigned long type;
                unsigned long long end;
                end = mem->map[i].start + mem->map[i].size;
                unsigned long type;
                unsigned long long end;
                end = mem->map[i].start + mem->map[i].size;

-               lb_puts("lb-mem: "); 
+               lb_puts("lb-mem: ");

                lb_put_lhex(mem->map[i].start);
                lb_puts(" - ");
                lb_put_lhex(mem->map[i].start);
                lb_puts(" - ");

-               lb_put_lhex(end); 
+               lb_put_lhex(end);

                lb_puts(" (");
                switch(mem->map[i].type) {
                case LB_MEM_RAM:
                lb_puts(" (");
                switch(mem->map[i].type) {
                case LB_MEM_RAM:


@@ -1017,12 +1017,12 @@ static void convert_lb_memory(struct param_info *info, struct lb_memory *mem)
                        break;
                }
                lb_puts(")\n");
                        break;
                }
                lb_puts(")\n");

-               add_e820_map(info->real_mode, 
+               add_e820_map(info->real_mode,

                        mem->map[i].start, mem->map[i].size, type);
        }
        info->need_mem_sizes = 0;
 }
                        mem->map[i].start, mem->map[i].size, type);
        }
        info->need_mem_sizes = 0;
 }

-       
+

 static void query_lb_values(struct param_info *info)
 {
        struct lb_header *head;
 static void query_lb_values(struct param_info *info)
 {
        struct lb_header *head;


@@ -1032,17 +1032,17 @@ static void query_lb_values(struct param_info *info)
        start = ((unsigned char *)head) + sizeof(*head);
        end = ((char *)start) + head->table_bytes;
        for(rec = start; ((void *)rec < end) &&
        start = ((unsigned char *)head) + sizeof(*head);
        end = ((char *)start) + head->table_bytes;
        for(rec = start; ((void *)rec < end) &&

-               (rec->size <= (unsigned long)(end - (void *)rec)); 
+               (rec->size <= (unsigned long)(end - (void *)rec));

                rec = (void *)(((char *)rec) + rec->size)) {
                switch(rec->tag) {
                case LB_TAG_MEMORY:
                {
                        struct lb_memory *mem;
                        mem = (struct lb_memory *) rec;
                rec = (void *)(((char *)rec) + rec->size)) {
                switch(rec->tag) {
                case LB_TAG_MEMORY:
                {
                        struct lb_memory *mem;
                        mem = (struct lb_memory *) rec;

-                       convert_lb_memory(info, mem); 
+                       convert_lb_memory(info, mem);

                        break;
                }
                        break;
                }

-               default: 
+               default:

                        break;
                };
        }
                        break;
                };
        }


@@ -1087,7 +1087,7 @@ static void get_meminfo(struct param_info *info)
                struct e820entry *seg = meminfo.map + i;
                end = seg->addr + seg->size;
                pc_puts("BIOS-e820: ");
                struct e820entry *seg = meminfo.map + i;
                end = seg->addr + seg->size;
                pc_puts("BIOS-e820: ");

-               pc_put_lhex(seg->addr); 
+               pc_put_lhex(seg->addr);

                pc_puts(" - ");
                pc_put_lhex(end);
                pc_puts(" (");
                pc_puts(" - ");
                pc_put_lhex(end);
                pc_puts(" (");


@@ -1108,7 +1108,7 @@ static void get_meminfo(struct param_info *info)
                        break;
                }
                pc_puts(")\n");
                        break;
                }
                pc_puts(")\n");

-               add_e820_map(info->real_mode, 
+               add_e820_map(info->real_mode,

                        seg->addr, seg->size, seg->type);
        }
        info->real_mode->alt_mem_k = meme801();
                        seg->addr, seg->size, seg->type);
        }
        info->real_mode->alt_mem_k = meme801();


@@ -1191,7 +1191,7 @@ static void query_bootloader_param_class(struct param_info *info)
        }
 }
 
        }
 }
 

-static void query_bootloader_values(struct param_info *info) 
+static void query_bootloader_values(struct param_info *info)

 {
        if (info->has_multiboot) {
                convert_multiboot(info, info->data);
 {
        if (info->has_multiboot) {
                convert_multiboot(info, info->data);


@@ -1252,7 +1252,7 @@ static int bootloader_query_firmware_class(struct param_info *info)
                detected_firmware_type = 1;
        }
        if (!detected_firmware_type && hdr &&
                detected_firmware_type = 1;
        }
        if (!detected_firmware_type && hdr &&

-               (hdr->n_descsz == 1) && 
+               (hdr->n_descsz == 1) &&

                (memcmp(n_desc, "", 1) == 0)) {
                /* No firmware is present */
                detected_firmware_type = 1;
                (memcmp(n_desc, "", 1) == 0)) {
                /* No firmware is present */
                detected_firmware_type = 1;


@@ -1305,7 +1305,7 @@ static void query_firmware_values(struct param_info *info)
        if (info->has_pcbios) {
                query_pcbios_values(info);
        }
        if (info->has_pcbios) {
                query_pcbios_values(info);
        }

-       
+

 }
 
 /*
 }
 
 /*


@@ -1325,59 +1325,59 @@ static void print_offsets(void)
        printf("orig_video_page      =%x\n", (uint32_t)&real_mode->orig_video_page);
        printf("orig_video_mode      =%x\n", (uint32_t)&real_mode->orig_video_mode);
        printf("orig_video_cols      =%x\n", (uint32_t)&real_mode->orig_video_cols);
        printf("orig_video_page      =%x\n", (uint32_t)&real_mode->orig_video_page);
        printf("orig_video_mode      =%x\n", (uint32_t)&real_mode->orig_video_mode);
        printf("orig_video_cols      =%x\n", (uint32_t)&real_mode->orig_video_cols);

-       printf("unused2              =%x\n", (uint32_t)&real_mode->unused2); 
-       printf("orig_video_ega_bx    =%x\n", (uint32_t)&real_mode->orig_video_ega_bx); 
+       printf("unused2              =%x\n", (uint32_t)&real_mode->unused2);
+       printf("orig_video_ega_bx    =%x\n", (uint32_t)&real_mode->orig_video_ega_bx);

        printf("unused3              =%x\n", (uint32_t)&real_mode->unused3);
        printf("unused3              =%x\n", (uint32_t)&real_mode->unused3);

-       printf("orig_video_lines     =%x\n", (uint32_t)&real_mode->orig_video_lines); 
-       printf("orig_video_isVGA     =%x\n", (uint32_t)&real_mode->orig_video_isVGA); 
+       printf("orig_video_lines     =%x\n", (uint32_t)&real_mode->orig_video_lines);
+       printf("orig_video_isVGA     =%x\n", (uint32_t)&real_mode->orig_video_isVGA);

        printf("orig_video_points    =%x\n", (uint32_t)&real_mode->orig_video_points);
        printf("lfb_width            =%x\n", (uint32_t)&real_mode->lfb_width);
        printf("lfb_height           =%x\n", (uint32_t)&real_mode->lfb_height);
        printf("orig_video_points    =%x\n", (uint32_t)&real_mode->orig_video_points);
        printf("lfb_width            =%x\n", (uint32_t)&real_mode->lfb_width);
        printf("lfb_height           =%x\n", (uint32_t)&real_mode->lfb_height);

-       printf("lfb_depth            =%x\n", (uint32_t)&real_mode->lfb_depth); 
-       printf("lfb_base             =%x\n", (uint32_t)&real_mode->lfb_base); 
-       printf("lfb_size             =%x\n", (uint32_t)&real_mode->lfb_size); 
-       printf("cl_magic             =%x\n", (uint32_t)&real_mode->cl_magic); 
+       printf("lfb_depth            =%x\n", (uint32_t)&real_mode->lfb_depth);
+       printf("lfb_base             =%x\n", (uint32_t)&real_mode->lfb_base);
+       printf("lfb_size             =%x\n", (uint32_t)&real_mode->lfb_size);
+       printf("cl_magic             =%x\n", (uint32_t)&real_mode->cl_magic);

        printf("cl_offset            =%x\n", (uint32_t)&real_mode->cl_offset);
        printf("lfb_linelength       =%x\n", (uint32_t)&real_mode->lfb_linelength);
        printf("red_size             =%x\n", (uint32_t)&real_mode->red_size);
        printf("cl_offset            =%x\n", (uint32_t)&real_mode->cl_offset);
        printf("lfb_linelength       =%x\n", (uint32_t)&real_mode->lfb_linelength);
        printf("red_size             =%x\n", (uint32_t)&real_mode->red_size);

-       printf("red_pos              =%x\n", (uint32_t)&real_mode->red_pos); 
+       printf("red_pos              =%x\n", (uint32_t)&real_mode->red_pos);

        printf("green_size           =%x\n", (uint32_t)&real_mode->green_size);
        printf("green_size           =%x\n", (uint32_t)&real_mode->green_size);

-       printf("green_pos            =%x\n", (uint32_t)&real_mode->green_pos); 
-       printf("blue_size            =%x\n", (uint32_t)&real_mode->blue_size); 
-       printf("blue_pos             =%x\n", (uint32_t)&real_mode->blue_pos); 
+       printf("green_pos            =%x\n", (uint32_t)&real_mode->green_pos);
+       printf("blue_size            =%x\n", (uint32_t)&real_mode->blue_size);
+       printf("blue_pos             =%x\n", (uint32_t)&real_mode->blue_pos);

        printf("rsvd_size            =%x\n", (uint32_t)&real_mode->rsvd_size);
        printf("rsvd_size            =%x\n", (uint32_t)&real_mode->rsvd_size);

-       printf("rsvd_pos             =%x\n", (uint32_t)&real_mode->rsvd_pos); 
+       printf("rsvd_pos             =%x\n", (uint32_t)&real_mode->rsvd_pos);

        printf("vesapm_seg           =%x\n", (uint32_t)&real_mode->vesapm_seg);
        printf("vesapm_off           =%x\n", (uint32_t)&real_mode->vesapm_off);
        printf("vesapm_seg           =%x\n", (uint32_t)&real_mode->vesapm_seg);
        printf("vesapm_off           =%x\n", (uint32_t)&real_mode->vesapm_off);

-       printf("pages                =%x\n", (uint32_t)&real_mode->pages); 
-       printf("reserved4            =%x\n", (uint32_t)&real_mode->reserved4); 
+       printf("pages                =%x\n", (uint32_t)&real_mode->pages);
+       printf("reserved4            =%x\n", (uint32_t)&real_mode->reserved4);

        printf("apm_bios_info        =%x\n", (uint32_t)&real_mode->apm_bios_info);
        printf("apm_bios_info        =%x\n", (uint32_t)&real_mode->apm_bios_info);

-       printf("drive_info           =%x\n", (uint32_t)&real_mode->drive_info); 
+       printf("drive_info           =%x\n", (uint32_t)&real_mode->drive_info);

        printf("sys_desc_table       =%x\n", (uint32_t)&real_mode->sys_desc_table);
        printf("sys_desc_table       =%x\n", (uint32_t)&real_mode->sys_desc_table);

-       printf("alt_mem_k            =%x\n", (uint32_t)&real_mode->alt_mem_k); 
-       printf("reserved5            =%x\n", (uint32_t)&real_mode->reserved5); 
-       printf("e820_map_nr          =%x\n", (uint32_t)&real_mode->e820_map_nr); 
-       printf("reserved6            =%x\n", (uint32_t)&real_mode->reserved6); 
-       printf("mount_root_rdonly    =%x\n", (uint32_t)&real_mode->mount_root_rdonly); 
+       printf("alt_mem_k            =%x\n", (uint32_t)&real_mode->alt_mem_k);
+       printf("reserved5            =%x\n", (uint32_t)&real_mode->reserved5);
+       printf("e820_map_nr          =%x\n", (uint32_t)&real_mode->e820_map_nr);
+       printf("reserved6            =%x\n", (uint32_t)&real_mode->reserved6);
+       printf("mount_root_rdonly    =%x\n", (uint32_t)&real_mode->mount_root_rdonly);

        printf("reserved7            =%x\n", (uint32_t)&real_mode->reserved7);
        printf("ramdisk_flags        =%x\n", (uint32_t)&real_mode->ramdisk_flags);
        printf("reserved7            =%x\n", (uint32_t)&real_mode->reserved7);
        printf("ramdisk_flags        =%x\n", (uint32_t)&real_mode->ramdisk_flags);

-       printf("reserved8            =%x\n", (uint32_t)&real_mode->reserved8); 
+       printf("reserved8            =%x\n", (uint32_t)&real_mode->reserved8);

        printf("orig_root_dev        =%x\n", (uint32_t)&real_mode->orig_root_dev);
        printf("orig_root_dev        =%x\n", (uint32_t)&real_mode->orig_root_dev);

-       printf("reserved9            =%x\n", (uint32_t)&real_mode->reserved9); 
+       printf("reserved9            =%x\n", (uint32_t)&real_mode->reserved9);

        printf("aux_device_info      =%x\n", (uint32_t)&real_mode->aux_device_info);
        printf("aux_device_info      =%x\n", (uint32_t)&real_mode->aux_device_info);

-       printf("reserved10           =%x\n", (uint32_t)&real_mode->reserved10); 
+       printf("reserved10           =%x\n", (uint32_t)&real_mode->reserved10);

        printf("param_block_signature=%x\n", (uint32_t)&real_mode->param_block_signature);
        printf("param_block_signature=%x\n", (uint32_t)&real_mode->param_block_signature);

-       printf("param_block_version  =%x\n", (uint32_t)&real_mode->param_block_version); 
-       printf("reserved11           =%x\n", (uint32_t)&real_mode->reserved11); 
+       printf("param_block_version  =%x\n", (uint32_t)&real_mode->param_block_version);
+       printf("reserved11           =%x\n", (uint32_t)&real_mode->reserved11);

        printf("loader_type          =%x\n", (uint32_t)&real_mode->loader_type);
        printf("loader_flags         =%x\n", (uint32_t)&real_mode->loader_flags);
        printf("loader_type          =%x\n", (uint32_t)&real_mode->loader_type);
        printf("loader_flags         =%x\n", (uint32_t)&real_mode->loader_flags);

-       printf("reserved12           =%x\n", (uint32_t)&real_mode->reserved12); 
+       printf("reserved12           =%x\n", (uint32_t)&real_mode->reserved12);

        printf("kernel_start         =%x\n", (uint32_t)&real_mode->kernel_start);
        printf("initrd_start         =%x\n", (uint32_t)&real_mode->initrd_start);
        printf("initrd_size          =%x\n", (uint32_t)&real_mode->initrd_size);
        printf("reserved13           =%x\n", (uint32_t)&real_mode->reserved13);
        printf("kernel_start         =%x\n", (uint32_t)&real_mode->kernel_start);
        printf("initrd_start         =%x\n", (uint32_t)&real_mode->initrd_start);
        printf("initrd_size          =%x\n", (uint32_t)&real_mode->initrd_size);
        printf("reserved13           =%x\n", (uint32_t)&real_mode->reserved13);

-       printf("e820_map             =%x\n", (uint32_t)&real_mode->e820_map); 
-       printf("reserved16           =%x\n", (uint32_t)&real_mode->reserved16); 
+       printf("e820_map             =%x\n", (uint32_t)&real_mode->e820_map);
+       printf("reserved16           =%x\n", (uint32_t)&real_mode->reserved16);

        printf("command_line         =%x\n", (uint32_t)&real_mode->command_line);
        printf("reserved17           =%x\n", (uint32_t)&real_mode->reserved17);
 }
        printf("command_line         =%x\n", (uint32_t)&real_mode->command_line);
        printf("reserved17           =%x\n", (uint32_t)&real_mode->reserved17);
 }


@@ -1397,7 +1397,7 @@ static void print_linux_params(struct param_info *info)
        printf("orig_video_ega_bx=%x\n", info->real_mode->orig_video_ega_bx);
        printf("orig_video_isVGA =%x\n", info->real_mode->orig_video_isVGA);
        printf("orig_video_points=%x\n", info->real_mode->orig_video_points);
        printf("orig_video_ega_bx=%x\n", info->real_mode->orig_video_ega_bx);
        printf("orig_video_isVGA =%x\n", info->real_mode->orig_video_isVGA);
        printf("orig_video_points=%x\n", info->real_mode->orig_video_points);

-       
+

 
        /* System descriptor table... */
        printf("sys_dest_table_len=%x\n", info->real_mode->sys_desc_table.length);
 
        /* System descriptor table... */
        printf("sys_dest_table_len=%x\n", info->real_mode->sys_desc_table.length);


@@ -1407,27 +1407,27 @@ static void print_linux_params(struct param_info *info)
        printf("alt_mem_k        =%x\n", info->real_mode->alt_mem_k);
        printf("e820_map_nr      =%x\n", info->real_mode->e820_map_nr);
        for(i = 0; i < E820MAX; i++) {
        printf("alt_mem_k        =%x\n", info->real_mode->alt_mem_k);
        printf("e820_map_nr      =%x\n", info->real_mode->e820_map_nr);
        for(i = 0; i < E820MAX; i++) {

-               printf("addr[%x]         =%Lx\n", 
+               printf("addr[%x]         =%Lx\n",

                        i,  info->real_mode->e820_map[i].addr);
                        i,  info->real_mode->e820_map[i].addr);

-               printf("size[%x]         =%Lx\n", 
+               printf("size[%x]         =%Lx\n",

                        i, info->real_mode->e820_map[i].size);
                        i, info->real_mode->e820_map[i].size);

-               printf("type[%x]         =%Lx\n", 
+               printf("type[%x]         =%Lx\n",

                        i, info->real_mode->e820_map[i].type);
        }
                        i, info->real_mode->e820_map[i].type);
        }

-       printf("mount_root_rdonly=%x\n", info->real_mode->mount_root_rdonly); 
-       printf("ramdisk_flags    =%x\n", info->real_mode->ramdisk_flags); 
-       printf("orig_root_dev    =%x\n", info->real_mode->orig_root_dev); 
-       printf("aux_device_info  =%x\n", info->real_mode->aux_device_info); 
+       printf("mount_root_rdonly=%x\n", info->real_mode->mount_root_rdonly);
+       printf("ramdisk_flags    =%x\n", info->real_mode->ramdisk_flags);
+       printf("orig_root_dev    =%x\n", info->real_mode->orig_root_dev);
+       printf("aux_device_info  =%x\n", info->real_mode->aux_device_info);

        printf("param_block_signature=%x\n", *((uint32_t *)info->real_mode->param_block_signature));
        printf("param_block_signature=%x\n", *((uint32_t *)info->real_mode->param_block_signature));

-       printf("loader_type      =%x\n", info->real_mode->loader_type); 
+       printf("loader_type      =%x\n", info->real_mode->loader_type);

        printf("loader_flags     =%x\n", info->real_mode->loader_flags);
        printf("initrd_start     =%x\n", info->real_mode->initrd_start);
        printf("loader_flags     =%x\n", info->real_mode->loader_flags);
        printf("initrd_start     =%x\n", info->real_mode->initrd_start);

-       printf("initrd_size      =%x\n", info->real_mode->initrd_size); 
+       printf("initrd_size      =%x\n", info->real_mode->initrd_size);

 
        /* Where I'm putting the command line */
 
        /* Where I'm putting the command line */

-       printf("cl_magic         =%x\n", info->real_mode->cl_magic); 
+       printf("cl_magic         =%x\n", info->real_mode->cl_magic);

        printf("cl_offset        =%x\n", info->real_mode->cl_offset);
        printf("cl_offset        =%x\n", info->real_mode->cl_offset);

-       
+

        /* Now print the command line */
        printf("command_line     =%s\n", info->real_mode->command_line);
 }
        /* Now print the command line */
        printf("command_line     =%s\n", info->real_mode->command_line);
 }


@@ -1445,7 +1445,7 @@ void initialize_linux_params(struct param_info *info)
        int len;
        /* First the defaults */
        memset(info->real_mode, 0, PAGE_SIZE);
        int len;
        /* First the defaults */
        memset(info->real_mode, 0, PAGE_SIZE);

-       
+

        /* Default screen size */
        info->real_mode->orig_x = 0;
        info->real_mode->orig_y = 25;
        /* Default screen size */
        info->real_mode->orig_x = 0;
        info->real_mode->orig_y = 25;


@@ -1456,10 +1456,10 @@ void initialize_linux_params(struct param_info *info)
        info->real_mode->orig_video_ega_bx = 0;
        info->real_mode->orig_video_isVGA = 1;
        info->real_mode->orig_video_points = 16;
        info->real_mode->orig_video_ega_bx = 0;
        info->real_mode->orig_video_isVGA = 1;
        info->real_mode->orig_video_points = 16;

-       
+

        /* Fill this in later */
        info->real_mode->ext_mem_k = 0;
        /* Fill this in later */
        info->real_mode->ext_mem_k = 0;

-               
+

        /* Fill in later... */
        info->real_mode->e820_map_nr = 0;
 
        /* Fill in later... */
        info->real_mode->e820_map_nr = 0;
 


@@ -1468,7 +1468,7 @@ void initialize_linux_params(struct param_info *info)
        info->real_mode->cl_offset = 2048;
 
        info->real_mode->cmd_line_ptr = info->real_mode->cl_offset + (unsigned long) info->real_mode;
        info->real_mode->cl_offset = 2048;
 
        info->real_mode->cmd_line_ptr = info->real_mode->cl_offset + (unsigned long) info->real_mode;

-       
+

        /* Now set the command line */
        len = strnlen(info->image->cmdline, sizeof(info->real_mode->command_line) -1);
        memcpy(info->real_mode->command_line, info->image->cmdline, len);
        /* Now set the command line */
        len = strnlen(info->image->cmdline, sizeof(info->real_mode->command_line) -1);
        memcpy(info->real_mode->command_line, info->image->cmdline, len);


@@ -1476,49 +1476,49 @@ void initialize_linux_params(struct param_info *info)
 
        /* from the bios initially */
        memset(&info->real_mode->apm_bios_info, 0, sizeof(info->real_mode->apm_bios_info));
 
        /* from the bios initially */
        memset(&info->real_mode->apm_bios_info, 0, sizeof(info->real_mode->apm_bios_info));

-       
+

        memset(&info->real_mode->drive_info, 0, sizeof(info->real_mode->drive_info));
 
        /* forget it for now... */
        memset(&info->real_mode->drive_info, 0, sizeof(info->real_mode->drive_info));
 
        /* forget it for now... */

-       info->real_mode->sys_desc_table.length = 0; 
-       
+       info->real_mode->sys_desc_table.length = 0;
+

        /* Fill this in later */
        info->real_mode->alt_mem_k = 0;
        info->real_mode->ext_mem_k = 0;
        /* Fill this in later */
        info->real_mode->alt_mem_k = 0;
        info->real_mode->ext_mem_k = 0;

-               
+

        /* default yes: this can be overridden on the command line */
        info->real_mode->mount_root_rdonly = 0xFFFF;
        /* default yes: this can be overridden on the command line */
        info->real_mode->mount_root_rdonly = 0xFFFF;

-       
+

        /* old ramdisk options, These really should be command line
         * things...
         */
        info->real_mode->ramdisk_flags = info->image->ramdisk_flags;
 
        /* default to /dev/hda.
        /* old ramdisk options, These really should be command line
         * things...
         */
        info->real_mode->ramdisk_flags = info->image->ramdisk_flags;
 
        /* default to /dev/hda.

-        * Override this on the command line if necessary 
+        * Override this on the command line if necessary

         */
        info->real_mode->orig_root_dev = info->image->root_dev;
         */
        info->real_mode->orig_root_dev = info->image->root_dev;

-       
+

        /* Originally from the bios? */
        info->real_mode->aux_device_info = 0;
        /* Originally from the bios? */
        info->real_mode->aux_device_info = 0;

-       
+

        /* Boot block magic */
        memcpy(info->real_mode->param_block_signature, "HdrS", 4);
        info->real_mode->param_block_version = 0x0201;
        /* Boot block magic */
        memcpy(info->real_mode->param_block_signature, "HdrS", 4);
        info->real_mode->param_block_version = 0x0201;

-       
+

        /* Say I'm a kernel boot loader */
        info->real_mode->loader_type = (LOADER_TYPE_KERNEL << 4) + 0 /* version */;
        /* Say I'm a kernel boot loader */
        info->real_mode->loader_type = (LOADER_TYPE_KERNEL << 4) + 0 /* version */;

-       
+

        /* No loader flags */
        info->real_mode->loader_flags = 0;
        /* No loader flags */
        info->real_mode->loader_flags = 0;

-       
+

        /* Ramdisk address and size ... */
        info->real_mode->initrd_start = 0;
        info->real_mode->initrd_size = 0;
        if (info->image->initrd_size) {
                info->real_mode->initrd_start = info->image->initrd_start;
                info->real_mode->initrd_size = info->image->initrd_size;
        /* Ramdisk address and size ... */
        info->real_mode->initrd_start = 0;
        info->real_mode->initrd_size = 0;
        if (info->image->initrd_size) {
                info->real_mode->initrd_start = info->image->initrd_start;
                info->real_mode->initrd_size = info->image->initrd_size;

-       }       
+       }

 
        /* Now remember those things that I need */
        info->need_mem_sizes = 1;
 
        /* Now remember those things that I need */
        info->need_mem_sizes = 1;


@@ -1556,7 +1556,7 @@ void *convert_params(unsigned type, void *data, void *param, void *image)
 #if 0
        printf("info.real_mode = 0x%x\n", info.real_mode );
        printf("Jumping to Linux\n");
 #if 0
        printf("info.real_mode = 0x%x\n", info.real_mode );
        printf("Jumping to Linux\n");

-#endif 
+#endif

        return info.real_mode;
 }
 
        return info.real_mode;
 }
 

diff --git a/util/mkelfImage/linux-i386/head.S b/util/mkelfImage/linux-i386/head.S
index b35c62a983b9ae90ac8553a17763faeb5dfef18a..9c52896e0c1c8f6d27a7ca4e16849e6e19cadea4 100644 (file)
--- a/util/mkelfImage/linux-i386/head.S
+++ b/util/mkelfImage/linux-i386/head.S
@@ -8,7 +8,7 @@
  *
  * Other parts were taken from etherboot-5.0.5
  */
  *
  * Other parts were taken from etherboot-5.0.5
  */

-       
+

 #define ASSEMBLY 1
 
 #define RELOC 0x10000
 #define ASSEMBLY 1
 
 #define RELOC 0x10000


@@ -37,7 +37,7 @@ startup_32:
        jz      1f
        movl    4(%esp), %eax
        movl    %eax, boot_param
        jz      1f
        movl    4(%esp), %eax
        movl    %eax, boot_param

-1:     
+1:

 
        movl stack_start, %esp
 
 
        movl stack_start, %esp
 


@@ -63,7 +63,7 @@ startup_32:
        # Linux makes stupid assumptions about the segments
        # that are already setup, so setup a new gdt & ldt
        # and then reload the segment registers.
        # Linux makes stupid assumptions about the segments
        # that are already setup, so setup a new gdt & ldt
        # and then reload the segment registers.

-       
+

        lgdt    gdt_48
        lidt    idt_48
 
        lgdt    gdt_48
        lidt    idt_48
 


@@ -80,17 +80,17 @@ startup_32:
        pushl   boot_data       # boot data pointer as second arg
        pushl   boot_type       # boot data type as first argument
        call    convert_params
        pushl   boot_data       # boot data pointer as second arg
        pushl   boot_type       # boot data type as first argument
        call    convert_params

-       
+

        movl    %eax, %esi      # put the real mode pointer in a safe place
        addl    $16, %esp       # pop the arguments
 
        movl    %eax, %esi      # put the real mode pointer in a safe place
        addl    $16, %esp       # pop the arguments
 

-       
+

        # Setup the registers before jumping to linux
 
 
        # clear eflags
        pushl   $0
        # Setup the registers before jumping to linux
 
 
        # clear eflags
        pushl   $0

-       popfl   
+       popfl

 
        # Flag to indicate we are the bootstrap processor
        xorl    %ebx, %ebx
 
        # Flag to indicate we are the bootstrap processor
        xorl    %ebx, %ebx


@@ -231,7 +231,7 @@ jmpe820:
        cmpl    $SMAP, %eax
        jne     bail820
 
        cmpl    $SMAP, %eax
        jne     bail820
 

-good820:       
+good820:

        /* If this is useable memory, we save it by simply advancing %di by
         * sizeof(e820rec)
         */
        /* If this is useable memory, we save it by simply advancing %di by
         * sizeof(e820rec)
         */


@@ -250,7 +250,7 @@ bail820:
        popl    %eax
        subl    %esi, %eax      /* Compute how many structure we read */
 
        popl    %eax
        subl    %esi, %eax      /* Compute how many structure we read */
 

-       /* Restore everything else */   
+       /* Restore everything else */

        popl    %edi
        popl    %esi
        popl    %ebx
        popl    %edi
        popl    %esi
        popl    %ebx


@@ -260,7 +260,7 @@ bail820:
 
 
 /**************************************************************************
 
 
 /**************************************************************************

-MEME801 - Determine size of extended memory 
+MEME801 - Determine size of extended memory

 **************************************************************************/
        .globl meme801
 meme801:
 **************************************************************************/
        .globl meme801
 meme801:


@@ -270,12 +270,12 @@ meme801:
        call    _prot_to_real
        .code16
 
        call    _prot_to_real
        .code16
 

-       stc                                     # fix to work around buggy      
-       xorw    %cx,%cx                         # BIOSes which dont clear/set   
-       xorw    %dx,%dx                         # carry on pass/error of        
-                                               # e801h memory size call        
-                                               # or merely pass cx,dx though   
-                                               # without changing them.        
+       stc                                     # fix to work around buggy
+       xorw    %cx,%cx                         # BIOSes which dont clear/set
+       xorw    %dx,%dx                         # carry on pass/error of
+                                               # e801h memory size call
+                                               # or merely pass cx,dx though
+                                               # without changing them.

        movw    $0xe801,%ax
        int     $0x15
        jc      e801absent
        movw    $0xe801,%ax
        int     $0x15
        jc      e801absent


@@ -284,7 +284,7 @@ meme801:
        jne     e801usecxdx                     # which report their extended
        cmpw    $0x0, %dx                       # memory in AX/BX rather than
        jne     e801usecxdx                     # CX/DX.  The spec I have read
        jne     e801usecxdx                     # which report their extended
        cmpw    $0x0, %dx                       # memory in AX/BX rather than
        jne     e801usecxdx                     # CX/DX.  The spec I have read

-       movw    %ax, %cx                        # seems to indicate AX/BX 
+       movw    %ax, %cx                        # seems to indicate AX/BX

        movw    %bx, %dx                        # are more reasonable anyway...
 
 e801usecxdx:
        movw    %bx, %dx                        # are more reasonable anyway...
 
 e801usecxdx:


@@ -298,7 +298,7 @@ e801usecxdx:
 e801absent:
        xorl    %eax,%eax
 
 e801absent:
        xorl    %eax,%eax
 

-e801out:       
+e801out:

        data32 call     _real_to_prot
        .code32
        /* Restore Everything */
        data32 call     _real_to_prot
        .code32
        /* Restore Everything */


@@ -308,7 +308,7 @@ e801out:
        ret
 
 /**************************************************************************
        ret
 
 /**************************************************************************

-MEM88 - Determine size of extended memory 
+MEM88 - Determine size of extended memory

 **************************************************************************/
        .globl mem88
 mem88:
 **************************************************************************/
        .globl mem88
 mem88:


@@ -330,7 +330,7 @@ mem88:
        popl    %esi
        popl    %ebx
        ret
        popl    %esi
        popl    %ebx
        ret

-       
+

 
 /**************************************************************************
 BASEMEMSIZE - Get size of the conventional (base) memory
 
 /**************************************************************************
 BASEMEMSIZE - Get size of the conventional (base) memory


@@ -375,7 +375,7 @@ _real_to_prot:
        popl    %eax                    /* Fix up return address */
        addl    $RELOC,%eax
        pushl   %eax
        popl    %eax                    /* Fix up return address */
        addl    $RELOC,%eax
        pushl   %eax

-       
+

        /* switch to protected mode idt */
        cs
        lidt    idt_48
        /* switch to protected mode idt */
        cs
        lidt    idt_48


@@ -469,7 +469,7 @@ gdt:
        .byte   (RELOC>>16),0x93,0x00,(RELOC>>24)
 
        /* For 2.5.x the kernel segments have moved */
        .byte   (RELOC>>16),0x93,0x00,(RELOC>>24)
 
        /* For 2.5.x the kernel segments have moved */

-       
+

        /* 0x28 dummy */
        .quad   0
 
        /* 0x28 dummy */
        .quad   0
 


@@ -485,7 +485,7 @@ gdt:
        .quad   0
        /* 0x58 dummy */
        .quad   0
        .quad   0
        /* 0x58 dummy */
        .quad   0

-       
+

 
        /* 0x60 */
        .word   0xFFFF                          # 4Gb - (0x100000*0x1000 = 4Gb)
 
        /* 0x60 */
        .word   0xFFFF                          # 4Gb - (0x100000*0x1000 = 4Gb)


@@ -534,7 +534,7 @@ gdt:
  *  20 - PNPBIOS support
  *  21 - APM BIOS support
  *  22 - APM BIOS support
  *  20 - PNPBIOS support
  *  21 - APM BIOS support
  *  22 - APM BIOS support

- *  23 - APM BIOS support 
+ *  23 - APM BIOS support

  */
 gdt_end:
 
  */
 gdt_end:
 


@@ -546,7 +546,7 @@ gdt64:
        .quad   0x00af9a000000ffff      /* __KERNEL_CS */
        .quad   0x00cf92000000ffff      /* __KERNEL_DS */
 gdt64_end:
        .quad   0x00af9a000000ffff      /* __KERNEL_CS */
        .quad   0x00cf92000000ffff      /* __KERNEL_DS */
 gdt64_end:

-       
+

        .section ".trailer", "a"
        /* Constants set at build time, these are at the very end of my image */
        .balign 16
        .section ".trailer", "a"
        /* Constants set at build time, these are at the very end of my image */
        .balign 16

diff --git a/util/mkelfImage/linux-i386/mkelf-linux-i386.c b/util/mkelfImage/linux-i386/mkelf-linux-i386.c
index 172c05ad1728ceea978f55c25f2d7a073dae8bb3..47256fd2f44ef1736baa9d4bb960a98e6fd846ed 100644 (file)
--- a/util/mkelfImage/linux-i386/mkelf-linux-i386.c
+++ b/util/mkelfImage/linux-i386/mkelf-linux-i386.c
@@ -228,7 +228,7 @@ static void parse_elf64_kernel(struct kernel_info *info, char *kernel_buf, size_
 
        if(!phdrs)
                die("We need at least one phdr\n");
 
        if(!phdrs)
                die("We need at least one phdr\n");

-       
+

        info->phdrs = phdrs;
         info->entry   = le64_to_cpu(ehdr->e_entry);
 #if  0
        info->phdrs = phdrs;
         info->entry   = le64_to_cpu(ehdr->e_entry);
 #if  0


@@ -296,7 +296,7 @@ void linux_i386_usage(void)
 
 #define DEFAULT_RAMDISK_BASE (8*1024*1024)
 
 
 #define DEFAULT_RAMDISK_BASE (8*1024*1024)
 

-int linux_i386_mkelf(int argc, char **argv, 
+int linux_i386_mkelf(int argc, char **argv,

        struct memelfheader *ehdr, char *kernel_buf, off_t kernel_size)
 {
        const char *ramdisk, *cmdline;
        struct memelfheader *ehdr, char *kernel_buf, off_t kernel_size)
 {
        const char *ramdisk, *cmdline;


@@ -379,7 +379,7 @@ int linux_i386_mkelf(int argc, char **argv,
        strncpy(params->cmdline, cmdline, sizeof(params->cmdline));
        params->cmdline[sizeof(params->cmdline)-1]= '\0';
 
        strncpy(params->cmdline, cmdline, sizeof(params->cmdline));
        params->cmdline[sizeof(params->cmdline)-1]= '\0';
 

-       
+

        /* Add a program header for the note section */
        index = 4;
        index += (kinfo.phdrs - 1);
        /* Add a program header for the note section */
        index = 4;
        index += (kinfo.phdrs - 1);


@@ -388,7 +388,7 @@ int linux_i386_mkelf(int argc, char **argv,
 
        /* Fill in the program headers*/
        phdr[0].p_type = PT_NOTE;
 
        /* Fill in the program headers*/
        phdr[0].p_type = PT_NOTE;

-       
+

        /* Fill in the converter program headers */
        phdr[1].p_paddr  = CONVERTLOC;
        phdr[1].p_vaddr  = CONVERTLOC;
        /* Fill in the converter program headers */
        phdr[1].p_paddr  = CONVERTLOC;
        phdr[1].p_vaddr  = CONVERTLOC;


@@ -420,7 +420,7 @@ int linux_i386_mkelf(int argc, char **argv,
                phdr[index].p_data   = kinfo.kernel[i];
                index++;
        }
                phdr[index].p_data   = kinfo.kernel[i];
                index++;
        }

-       
+

        /* Put the ramdisk at ramdisk base.
         */
        params->initrd_start = params->initrd_size = 0;
        /* Put the ramdisk at ramdisk base.
         */
        params->initrd_start = params->initrd_size = 0;


@@ -438,7 +438,7 @@ int linux_i386_mkelf(int argc, char **argv,
                params->initrd_size  = phdr[index].p_filesz;
                index++;
        }
                params->initrd_size  = phdr[index].p_filesz;
                index++;
        }

-       
+

        /* Set the start location */
        params->entry = kinfo.entry;
        params->switch_64 = kinfo.switch_64;
        /* Set the start location */
        params->entry = kinfo.entry;
        params->switch_64 = kinfo.switch_64;

diff --git a/util/mkelfImage/linux-i386/uniform_boot.h b/util/mkelfImage/linux-i386/uniform_boot.h
index 5291fa66bbfecf8a0e5f3033b15ef45c69aba1ba..ac814967f6a8ad1b1d1260c87d44b3f1ae3c8119 100644 (file)
--- a/util/mkelfImage/linux-i386/uniform_boot.h
+++ b/util/mkelfImage/linux-i386/uniform_boot.h
@@ -1,25 +1,25 @@
 #ifndef _LINUX_UNIFORM_BOOT_H
 #define _LINUX_UNIFORM_BOOT_H
 
 #ifndef _LINUX_UNIFORM_BOOT_H
 #define _LINUX_UNIFORM_BOOT_H
 

-/* The uniform boot environment information is restricted to 
+/* The uniform boot environment information is restricted to

  * hardware information.  In particular for a simple enough machine
  * all of the environment information should be able to reside in
  * a rom and not need to be moved.  This information is the
  * information a trivial boot room can pass to linux to let it
  * hardware information.  In particular for a simple enough machine
  * all of the environment information should be able to reside in
  * a rom and not need to be moved.  This information is the
  * information a trivial boot room can pass to linux to let it

- * run the hardware.  
+ * run the hardware.

  *
  *

- * Also all of the information should be Position Independent Data.  
+ * Also all of the information should be Position Independent Data.

  * That is it should be safe to relocated any of the information
  * without it's meaning/correctnes changing. The exception is the
  * uniform_boot_header with it's two pointers arg & env.
  * That is it should be safe to relocated any of the information
  * without it's meaning/correctnes changing. The exception is the
  * uniform_boot_header with it's two pointers arg & env.

- * 
+ *

  * The addresses in the arg & env pointers must be physical
  * addresses. A physical address is an address you put in the page
  * The addresses in the arg & env pointers must be physical
  * addresses. A physical address is an address you put in the page

- * table. 
+ * table.

  *
  * The Command line is for user policy.  Things like the default
  * root device.
  *
  * The Command line is for user policy.  Things like the default
  * root device.

- * 
+ *

  */
 
 struct uniform_boot_header
  */
 
 struct uniform_boot_header


@@ -55,7 +55,7 @@ struct ube_memory_range {
 #define UBE_MEM_RESERVED 2
 #define UBE_MEM_ACPI     3
 #define UBE_MEM_NVS      4
 #define UBE_MEM_RESERVED 2
 #define UBE_MEM_ACPI     3
 #define UBE_MEM_NVS      4

-       
+

 };
 
 struct ube_memory {
 };
 
 struct ube_memory {

diff --git a/util/mkelfImage/linux-i386/x86-linux.h b/util/mkelfImage/linux-i386/x86-linux.h
index fe1673ea6711d0f329e84c67c0c7538894b9d7f6..521988815c1d80462981cf15dc4293a65304c536 100644 (file)
--- a/util/mkelfImage/linux-i386/x86-linux.h
+++ b/util/mkelfImage/linux-i386/x86-linux.h
@@ -18,9 +18,9 @@ struct e820entry {
 } __attribute__((packed));
 
 /* FIXME expand on drive_info_struct... */
 } __attribute__((packed));
 
 /* FIXME expand on drive_info_struct... */

-struct drive_info_struct { 
-       uint8_t dummy[32]; 
-}; 
+struct drive_info_struct {
+       uint8_t dummy[32];
+};

 struct sys_desc_table {
        uint16_t length;
        uint8_t  table[318];
 struct sys_desc_table {
        uint16_t length;
        uint8_t  table[318];


@@ -90,7 +90,7 @@ struct x86_linux_param_header {
        uint16_t ramdisk_flags;                 /* 0x1f8 */
 #define RAMDISK_IMAGE_START_MASK       0x07FF
 #define RAMDISK_PROMPT_FLAG            0x8000
        uint16_t ramdisk_flags;                 /* 0x1f8 */
 #define RAMDISK_IMAGE_START_MASK       0x07FF
 #define RAMDISK_PROMPT_FLAG            0x8000

-#define RAMDISK_LOAD_FLAG              0x4000  
+#define RAMDISK_LOAD_FLAG              0x4000

        uint16_t vid_mode;                      /* 0x1fa */
        uint16_t root_dev;                      /* 0x1fc */
        uint8_t  reserved9[1];                  /* 0x1fe */
        uint16_t vid_mode;                      /* 0x1fa */
        uint16_t root_dev;                      /* 0x1fc */
        uint8_t  reserved9[1];                  /* 0x1fe */

diff --git a/util/mkelfImage/linux-ia64/convert_params.c b/util/mkelfImage/linux-ia64/convert_params.c
index 5022e52c4cfac70bc9ba1047f5860a00d967af5d..a58f4adf801026762c889022ee7188f8de16a444 100644 (file)
--- a/util/mkelfImage/linux-ia64/convert_params.c
+++ b/util/mkelfImage/linux-ia64/convert_params.c
@@ -58,7 +58,7 @@ static void printf(const char *fmt, ...)
                        continue;
                }
                if (*++fmt == 's') {
                        continue;
                }
                if (*++fmt == 's') {

-                       for(p = va_arg(args, char *); *p != '\0'; p++) 
+                       for(p = va_arg(args, char *); *p != '\0'; p++)

                                putchar(*p);
                }
                else {  /* Length of item is bounded */
                                putchar(*p);
                }
                else {  /* Length of item is bounded */


@@ -76,7 +76,7 @@ static void printf(const char *fmt, ...)
                                        fmt++;
                                }
                        }
                                        fmt++;
                                }
                        }

-                       
+

                        /*
                         * Before each format q points to tmp buffer
                         * After each format q points past end of item
                        /*
                         * Before each format q points to tmp buffer
                         * After each format q points past end of item


@@ -150,7 +150,7 @@ int memcmp(void *vs1, void *vs2, size_t size)
                        return *s1 - *s2;
        }
        return 0;
                        return *s1 - *s2;
        }
        return 0;

-       
+

 }
 
 void strappend(char *dest, const char *src, size_t max)
 }
 
 void strappend(char *dest, const char *src, size_t max)


@@ -229,7 +229,7 @@ static void convert_bhdr_params(Elf_Bhdr *bhdr)
 {
        unsigned char *note, *end;
        char *ldr_name, *ldr_version, *firmware;
 {
        unsigned char *note, *end;
        char *ldr_name, *ldr_version, *firmware;

-       
+

        ldr_name = ldr_version = firmware = 0;
 
        note = ((char *)bhdr) + sizeof(*bhdr);
        ldr_name = ldr_version = firmware = 0;
 
        note = ((char *)bhdr) + sizeof(*bhdr);


@@ -241,10 +241,10 @@ static void convert_bhdr_params(Elf_Bhdr *bhdr)
                n_name = note + sizeof(*hdr);
                n_desc = n_name + ((hdr->n_namesz + 3) & ~3);
                next = n_desc + ((hdr->n_descsz + 3) & ~3);
                n_name = note + sizeof(*hdr);
                n_desc = n_name + ((hdr->n_namesz + 3) & ~3);
                next = n_desc + ((hdr->n_descsz + 3) & ~3);

-               if (next > end) 
+               if (next > end)

                        break;
 #if 0
                        break;
 #if 0

-               printf("n_type: %x n_name(%d): n_desc(%d): \n", 
+               printf("n_type: %x n_name(%d): n_desc(%d): \n",

                        hdr->n_type, hdr->n_namesz, hdr->n_descsz);
 #endif
 
                        hdr->n_type, hdr->n_namesz, hdr->n_descsz);
 #endif
 


@@ -302,7 +302,7 @@ static void convert_bhdr_params(Elf_Bhdr *bhdr)
                note = next;
        }
        if (ldr_name && ldr_version) {
                note = next;
        }
        if (ldr_name && ldr_version) {

-               printf("Loader: %s version: %s\n", 
+               printf("Loader: %s version: %s\n",

                        ldr_name, ldr_version);
        }
        if (firmware) {
                        ldr_name, ldr_version);
        }
        if (firmware) {


@@ -311,12 +311,12 @@ static void convert_bhdr_params(Elf_Bhdr *bhdr)
        }
 }
 
        }
 }
 

-void *convert_params(unsigned long arg1, unsigned long r28, 
+void *convert_params(unsigned long arg1, unsigned long r28,

        struct image_parameters *params)
 {
        struct ia64_boot_param *orig_bp;
        Elf_Bhdr *bhdr = (Elf_Bhdr*)arg1;
        struct image_parameters *params)
 {
        struct ia64_boot_param *orig_bp;
        Elf_Bhdr *bhdr = (Elf_Bhdr*)arg1;

-       
+

        /* handle the options I can easily deal with */
        bp.command_line = (unsigned long)&params->cmdline;
        bp.initrd_start = params->initrd_start;
        /* handle the options I can easily deal with */
        bp.command_line = (unsigned long)&params->cmdline;
        bp.initrd_start = params->initrd_start;

diff --git a/util/mkelfImage/linux-ia64/head.S b/util/mkelfImage/linux-ia64/head.S
index 4a12fb55663dbaee6e477eb3aab0ddd9ed009e91..df1b6827cb65c28d666591c5d160cce5622ad0d9 100644 (file)
--- a/util/mkelfImage/linux-ia64/head.S
+++ b/util/mkelfImage/linux-ia64/head.S
@@ -1,5 +1,5 @@
 #define ASSEMBLY 1
 #define ASSEMBLY 1

-       
+

        .text
 
 #include "convert.h"
        .text
 
 #include "convert.h"


@@ -13,13 +13,13 @@ _start:
        movl    r15=@gprel(_start)
        ;;
        sub     gp=r14,r15      /* gp = _start - @gprel(_start), current value of gp */
        movl    r15=@gprel(_start)
        ;;
        sub     gp=r14,r15      /* gp = _start - @gprel(_start), current value of gp */

-       ;; 
+       ;;

        mov     out0=in0
        mov     out1=r28
        add     out2=@gprel(params),gp
        br.call.sptk.few rp=convert_params
 
        mov     out0=in0
        mov     out1=r28
        add     out2=@gprel(params),gp
        br.call.sptk.few rp=convert_params
 

-       
+

        mov     r28=r8
        add     r15=@gprel(entry), gp
        ;;
        mov     r28=r8
        add     r15=@gprel(entry), gp
        ;;


@@ -50,7 +50,7 @@ _start:
 #define UART_FCR       0x02
 #define UART_LCR       0x03
 #define UART_MCR       0x04
 #define UART_FCR       0x02
 #define UART_LCR       0x03
 #define UART_MCR       0x04

-       
+

 #define UART_DLL       0x00
 #define UART_DLM       0x01
 /* Status */
 #define UART_DLL       0x00
 #define UART_DLM       0x01
 /* Status */


@@ -75,38 +75,38 @@ uart_init:
        /* set the UART_BASE */
        movl    r31=UART_PHYS_BASE
        ;;
        /* set the UART_BASE */
        movl    r31=UART_PHYS_BASE
        ;;

-       
+

        /* disable interrupts */
        add     r30=UART_IER,r31
        mov     r29=0x00
        /* disable interrupts */
        add     r30=UART_IER,r31
        mov     r29=0x00

-       ;; 
+       ;;

        st1     [r30]=r29
 
        /* enable fifos */
        add     r30=UART_FCR,r31
        mov     r29=0x01
        st1     [r30]=r29
 
        /* enable fifos */
        add     r30=UART_FCR,r31
        mov     r29=0x01

-       ;; 
+       ;;

        st1     [r30]=r29
 
        /* Set Baud Rate Divisor to UART_BAUD */
        add     r30=UART_LCR,r31
        mov     r29=0x83
        st1     [r30]=r29
 
        /* Set Baud Rate Divisor to UART_BAUD */
        add     r30=UART_LCR,r31
        mov     r29=0x83

-       ;; 
+       ;;

        st1     [r30]=r29
 
        add     r30=UART_DLL,r31
        mov     r29=UART_DIV_LO
        st1     [r30]=r29
 
        add     r30=UART_DLL,r31
        mov     r29=UART_DIV_LO

-       ;; 
+       ;;

        st1     [r30]=r29
        st1     [r30]=r29

-       
+

        add     r30=UART_DLM,r31
        mov     r29=UART_DIV_HI
        add     r30=UART_DLM,r31
        mov     r29=UART_DIV_HI

-       ;; 
+       ;;

        st1     [r30]=r29
 
        add     r30=UART_LCR,r31
        mov     r29=0x03
        st1     [r30]=r29
 
        add     r30=UART_LCR,r31
        mov     r29=0x03

-       ;; 
+       ;;

        st1     [r30]=r29
 
        br.ret.sptk.few rp
        st1     [r30]=r29
 
        br.ret.sptk.few rp


@@ -133,7 +133,7 @@ __uart_tx_byte:
        ;;
        st1.rel.nta     [r30]=r32
        ;;
        ;;
        st1.rel.nta     [r30]=r32
        ;;

-       
+

        /* Wait until the UART is empty to be certain the byte is flushed */
        add     r30=UART_LSR,r31
        ;;
        /* Wait until the UART is empty to be certain the byte is flushed */
        add     r30=UART_LSR,r31
        ;;


@@ -153,7 +153,7 @@ __uart_tx_hex_char:
 (p63)  add     r32=48,r32      /* digits*/
 (p62)  add     r32=55,r32      /* letters */
        br.cond.sptk.few __uart_tx_byte
 (p63)  add     r32=48,r32      /* digits*/
 (p62)  add     r32=55,r32      /* letters */
        br.cond.sptk.few __uart_tx_byte

-       
+

 uart_tx_hex64:
        /* set the UART_bASE */
        movl    r31=UART_PHYS_BASE
 uart_tx_hex64:
        /* set the UART_bASE */
        movl    r31=UART_PHYS_BASE


@@ -212,7 +212,7 @@ uart_tx_hex64:
        ;;
        mov     ar.pfs = r26
        mov     rp = r27
        ;;
        mov     ar.pfs = r26
        mov     rp = r27

-       ;; 
+       ;;

        br.ret.sptk.few rp
 #endif
 
        br.ret.sptk.few rp
 #endif
 

diff --git a/util/mkelfImage/linux-ia64/mkelf-linux-ia64.c b/util/mkelfImage/linux-ia64/mkelf-linux-ia64.c
index cfd79869aebfd97096a9c76beec5765ca3599ced..d4236cac99c35972706e93ea432d171cbf244853 100644 (file)
--- a/util/mkelfImage/linux-ia64/mkelf-linux-ia64.c
+++ b/util/mkelfImage/linux-ia64/mkelf-linux-ia64.c
@@ -112,8 +112,8 @@ static int populate_kernel_phdrs(struct kernel_info *info, struct memelfphdr *ph
                        if (paddr > le64_to_cpu(info->phdr[j].p_paddr)) {
                                continue;
                        }
                        if (paddr > le64_to_cpu(info->phdr[j].p_paddr)) {
                                continue;
                        }

-                       if (hdr && 
-                               le64_to_cpu(hdr->p_paddr) < 
+                       if (hdr &&
+                               le64_to_cpu(hdr->p_paddr) <

                                le64_to_cpu(info->phdr[j].p_paddr)) {
                                continue;
                        }
                                le64_to_cpu(info->phdr[j].p_paddr)) {
                                continue;
                        }


@@ -131,7 +131,7 @@ static int populate_kernel_phdrs(struct kernel_info *info, struct memelfphdr *ph
        }
        return i;
 }
        }
        return i;
 }

-       
+

 
 void linux_ia64_usage(void)
 {
 
 void linux_ia64_usage(void)
 {


@@ -192,7 +192,7 @@ int linux_ia64_mkelf(int argc, char **argv,
        ehdr->ei_data   = ELFDATA2LSB;
        ehdr->e_type    = ET_EXEC;
        ehdr->e_machine = EM_IA_64;
        ehdr->ei_data   = ELFDATA2LSB;
        ehdr->e_type    = ET_EXEC;
        ehdr->e_machine = EM_IA_64;

-       
+

        /* locate the payload buffer */
        payload_buf = payload;
        payload_size = sizeof(payload);
        /* locate the payload buffer */
        payload_buf = payload;
        payload_size = sizeof(payload);


@@ -221,10 +221,10 @@ int linux_ia64_mkelf(int argc, char **argv,
 
        /* Fill in the program headers*/
        phdr[0].p_type = PT_NOTE;
 
        /* Fill in the program headers*/
        phdr[0].p_type = PT_NOTE;

-       
+

        /* Fill in the kernel program headers */
        /* Fill in the kernel program headers */

-       index = 1 + populate_kernel_phdrs(&kinfo, phdr + 1); 
-       
+       index = 1 + populate_kernel_phdrs(&kinfo, phdr + 1);
+

        /* Fill in the converter program header */
        phdr[index].p_paddr  = roundup(phdr[index -1].p_paddr + phdr[index -1].p_memsz, 16);
        phdr[index].p_vaddr  = phdr[index].p_paddr;
        /* Fill in the converter program header */
        phdr[index].p_paddr  = roundup(phdr[index -1].p_paddr + phdr[index -1].p_memsz, 16);
        phdr[index].p_vaddr  = phdr[index].p_paddr;

diff --git a/util/mkelfImage/main/mkelfImage.c b/util/mkelfImage/main/mkelfImage.c
index bb318b3f379e132eb48df32752097cd124e60f4e..0dcc8c2fc1a38ed0d79011d4dc6fd6bb9d0cb37d 100644 (file)
--- a/util/mkelfImage/main/mkelfImage.c
+++ b/util/mkelfImage/main/mkelfImage.c
@@ -71,7 +71,7 @@ uint16_t add_ipchksums(unsigned long offset, uint16_t sum, uint16_t new)
        sum = ~sum & 0xFFFF;
        new = ~new & 0xFFFF;
        if (offset & 1) {
        sum = ~sum & 0xFFFF;
        new = ~new & 0xFFFF;
        if (offset & 1) {

-               /* byte swap the sum if it came from an odd offset 
+               /* byte swap the sum if it came from an odd offset

                 * since the computation is endian independant this
                 * works.
                 */
                 * since the computation is endian independant this
                 * works.
                 */


@@ -114,7 +114,7 @@ char *slurp_file(const char *filename, off_t *r_size)
        off_t size, progress;
        ssize_t result;
        struct stat stats;
        off_t size, progress;
        ssize_t result;
        struct stat stats;

-       
+

 
        if (!filename) {
                *r_size = 0;
 
        if (!filename) {
                *r_size = 0;


@@ -305,7 +305,7 @@ static void serialize_notes(char *buf, struct memelfheader *ehdr)
        notes = ehdr->e_notenum;
        size = sizeof_notes(note, notes);
        memset(buf, 0, size);
        notes = ehdr->e_notenum;
        size = sizeof_notes(note, notes);
        memset(buf, 0, size);

-       
+

        /* Write the Elf Notes */
        offset = 0;
        for(i = 0; i < notes; i++) {
        /* Write the Elf Notes */
        offset = 0;
        for(i = 0; i < notes; i++) {


@@ -317,11 +317,11 @@ static void serialize_notes(char *buf, struct memelfheader *ehdr)
                hdr.n_type   = cpu_to_elf32(ehdr, note[i].n_type);
 
                /* Copy the note into the buffer */
                hdr.n_type   = cpu_to_elf32(ehdr, note[i].n_type);
 
                /* Copy the note into the buffer */

-               memcpy(buf + offset, &hdr,       sizeof(hdr));  
+               memcpy(buf + offset, &hdr,       sizeof(hdr));

                offset += sizeof(hdr);
                offset += sizeof(hdr);

-               memcpy(buf + offset, note[i].n_name, n_namesz); 
+               memcpy(buf + offset, note[i].n_name, n_namesz);

                offset += roundup(n_namesz, 4);
                offset += roundup(n_namesz, 4);

-               memcpy(buf + offset, note[i].n_desc, note[i].n_descsz); 
+               memcpy(buf + offset, note[i].n_desc, note[i].n_descsz);

                offset += roundup(note[i].n_descsz, 4);
 
        }
                offset += roundup(note[i].n_descsz, 4);
 
        }


@@ -382,7 +382,7 @@ static void serialize_phdrs(char *buf, struct memelfheader *ehdr, size_t note_si
        size_t offset, note_offset;
        if (ehdr->ei_class == ELFCLASS32) {
                Elf32_Phdr *phdr = (Elf32_Phdr *)buf;
        size_t offset, note_offset;
        if (ehdr->ei_class == ELFCLASS32) {
                Elf32_Phdr *phdr = (Elf32_Phdr *)buf;

-               note_offset = 
+               note_offset =

                        sizeof(Elf32_Ehdr) + (sizeof(Elf32_Phdr)*ehdr->e_phnum);
                offset = note_offset + note_size;
                for(i = 0; i < ehdr->e_phnum; i++) {
                        sizeof(Elf32_Ehdr) + (sizeof(Elf32_Phdr)*ehdr->e_phnum);
                offset = note_offset + note_size;
                for(i = 0; i < ehdr->e_phnum; i++) {


@@ -406,7 +406,7 @@ static void serialize_phdrs(char *buf, struct memelfheader *ehdr, size_t note_si
        }
        else if (ehdr->ei_class == ELFCLASS64) {
                Elf64_Phdr *phdr = (Elf64_Phdr *)buf;
        }
        else if (ehdr->ei_class == ELFCLASS64) {
                Elf64_Phdr *phdr = (Elf64_Phdr *)buf;

-               note_offset = 
+               note_offset =

                        sizeof(Elf64_Ehdr) + (sizeof(Elf64_Phdr)*ehdr->e_phnum);
                offset = note_offset + note_size;
                for(i = 0; i < ehdr->e_phnum; i++) {
                        sizeof(Elf64_Ehdr) + (sizeof(Elf64_Phdr)*ehdr->e_phnum);
                offset = note_offset + note_size;
                for(i = 0; i < ehdr->e_phnum; i++) {


@@ -478,7 +478,7 @@ static void write_elf(struct memelfheader *ehdr, char *output)
        if (ehdr->ei_class == ELFCLASS32) {
                ehdr_size = sizeof(Elf32_Ehdr);
                phdr_size = sizeof(Elf32_Phdr) * ehdr->e_phnum;
        if (ehdr->ei_class == ELFCLASS32) {
                ehdr_size = sizeof(Elf32_Ehdr);
                phdr_size = sizeof(Elf32_Phdr) * ehdr->e_phnum;

-       } 
+       }

        else if (ehdr->ei_class == ELFCLASS64) {
                ehdr_size = sizeof(Elf64_Ehdr);
                phdr_size = sizeof(Elf64_Phdr) * ehdr->e_phnum;
        else if (ehdr->ei_class == ELFCLASS64) {
                ehdr_size = sizeof(Elf64_Ehdr);
                phdr_size = sizeof(Elf64_Phdr) * ehdr->e_phnum;


@@ -505,7 +505,7 @@ static void write_elf(struct memelfheader *ehdr, char *output)
 
        /* Compute the final form of the notes */
        serialize_notes(buf + ehdr_size + phdr_size, ehdr);
 
        /* Compute the final form of the notes */
        serialize_notes(buf + ehdr_size + phdr_size, ehdr);

-       
+

        /* Now write the elf image */
        fd = open(output, O_WRONLY | O_CREAT | O_EXCL, S_IRUSR | S_IRGRP | S_IROTH);
        if (fd < 0) {
        /* Now write the elf image */
        fd = open(output, O_WRONLY | O_CREAT | O_EXCL, S_IRUSR | S_IRGRP | S_IROTH);
        if (fd < 0) {


@@ -612,7 +612,7 @@ int main(int argc, char **argv)
                }
        }
        fileind = optind;
                }
        }
        fileind = optind;

-       
+

        /* Reset getopt for the next pass */
        opterr = 1;
        optind = 1;
        /* Reset getopt for the next pass */
        opterr = 1;
        optind = 1;

diff --git a/util/mkelfImage/main/mkelfImage.man b/util/mkelfImage/main/mkelfImage.man
index f3f50d56d0472cc32b1b850b05bfd4913d4bfdab..faf3613d4767e97f739b27b4388dda5e397ae0ef 100644 (file)
--- a/util/mkelfImage/main/mkelfImage.man
+++ b/util/mkelfImage/main/mkelfImage.man
@@ -1,5 +1,5 @@
 .\" Automatically generated by Pod::Man v1.3, Pod::Parser v1.13
 .\" Automatically generated by Pod::Man v1.3, Pod::Parser v1.13

-.\" But now manually maintained 
+.\" But now manually maintained

 .\"
 .\" Standard preamble:
 .\" ========================================================================
 .\"
 .\" Standard preamble:
 .\" ========================================================================

diff --git a/util/mkelfImage/mkelfImage.spec.in b/util/mkelfImage/mkelfImage.spec.in
index a10eca4aa3d4e95de221dc4c62efc892e5ff8fc6..73abe6eef668ec1ace1451c1094f527f5ab6d59f 100644 (file)
--- a/util/mkelfImage/mkelfImage.spec.in
+++ b/util/mkelfImage/mkelfImage.spec.in
@@ -1,6 +1,6 @@
 Summary: make an elf network bootable image for linux
 Name: mkelfImage
 Summary: make an elf network bootable image for linux
 Name: mkelfImage

-Version: 
+Version:

 Release: 0
 Copyright: GPL
 Group: Development/Tools
 Release: 0
 Copyright: GPL
 Group: Development/Tools


@@ -12,8 +12,8 @@ BuildRoot: %{_tmppath}/%{name}
 mkelfImage is a program that makes a elf boot image for linux kernel images.
 The image should work with any i386 multiboot compliant boot loader, an ELF boot
 loader that passes no options, a loader compliant with the linuxBIOS elf booting
 mkelfImage is a program that makes a elf boot image for linux kernel images.
 The image should work with any i386 multiboot compliant boot loader, an ELF boot
 loader that passes no options, a loader compliant with the linuxBIOS elf booting

-spec or with the linux kexec kernel patch.  A key feature here is that nothing 
-relies upon BIOS calls, but they are made when necessary.  This is useful for 
+spec or with the linux kexec kernel patch.  A key feature here is that nothing
+relies upon BIOS calls, but they are made when necessary.  This is useful for

 systems running linuxbios.
 
 %prep
 systems running linuxbios.
 
 %prep

diff --git a/util/mptable/mptable.c b/util/mptable/mptable.c
index b253b7524816885c6165288c25037d39433985ba..fea99ac87749eb61137fb15deff8d443e53b6efa 100644 (file)
--- a/util/mptable/mptable.c
+++ b/util/mptable/mptable.c
@@ -296,7 +296,7 @@ int grope = 0;
 int    verbose = 0;
 int    noisy = 0;
 /* preamble to the mptable. This is fixed for all coreboots */
 int    verbose = 0;
 int    noisy = 0;
 /* preamble to the mptable. This is fixed for all coreboots */

- 
+

 char *preamble[] = {
 "#include <console/console.h>",
 "#include <arch/smp/mpspec.h>",
 char *preamble[] = {
 "#include <console/console.h>",
 "#include <arch/smp/mpspec.h>",


@@ -404,7 +404,7 @@ write_code(char **code)
        printf("%s\n", *code++);
 }
 /*
        printf("%s\n", *code++);
 }
 /*

- * 
+ *

  */
 int
 main( int argc, char *argv[] )
  */
 int
 main( int argc, char *argv[] )


@@ -415,7 +415,7 @@ main( int argc, char *argv[] )
     int                defaultConfig;
 
     /* announce ourselves */
     int                defaultConfig;
 
     /* announce ourselves */

-    
+

     if (verbose) puts( SEP_LINE2 );
 
     printf( "/* generated by MPTable, version %d.%d.%d*/\n", VMAJOR, VMINOR, VDELTA );
     if (verbose) puts( SEP_LINE2 );
 
     printf( "/* generated by MPTable, version %d.%d.%d*/\n", VMAJOR, VMINOR, VDELTA );


@@ -427,7 +427,7 @@ main( int argc, char *argv[] )
     for(argc--, argv++; argc; argc--, argv++){
       if ( strcmp( argv[0], "-dmesg") == 0 ) {
        dmesg = 1;
     for(argc--, argv++; argc; argc--, argv++){
       if ( strcmp( argv[0], "-dmesg") == 0 ) {
        dmesg = 1;

-      } else 
+      } else

        if ( strcmp( argv[0], "-help") == 0 )
          {
            usage();
        if ( strcmp( argv[0], "-help") == 0 )
          {
            usage();


@@ -648,7 +648,7 @@ apic_probe( vm_offset_t* paddr, int* where )
 
 
 /*
 
 
 /*

- * 
+ *

  */
 static void
 MPFloatingPointer( vm_offset_t paddr, int where, mpfps_t* mpfps )
  */
 static void
 MPFloatingPointer( vm_offset_t paddr, int where, mpfps_t* mpfps )


@@ -719,7 +719,7 @@ MPFloatingPointer( vm_offset_t paddr, int where, mpfps_t* mpfps )
 
 
 /*
 
 
 /*

- * 
+ *

  */
 static void
 MPConfigDefault( int featureByte )
  */
 static void
 MPConfigDefault( int featureByte )


@@ -776,7 +776,7 @@ MPConfigDefault( int featureByte )
 
 
 /*
 
 
 /*

- * 
+ *

  */
 static void
 MPConfigTableHeader( uint32_t pap )
  */
 static void
 MPConfigTableHeader( uint32_t pap )


@@ -966,7 +966,7 @@ MPConfigTableHeader( uint32_t pap )
 
 
 /*
 
 
 /*

- * 
+ *

  */
 static int
 readType( void )
  */
 static int
 readType( void )


@@ -984,7 +984,7 @@ readType( void )
 
 
 /*
 
 
 /*

- * 
+ *

  */
 static void
 seekEntry( vm_offset_t addr )
  */
 static void
 seekEntry( vm_offset_t addr )


@@ -995,7 +995,7 @@ seekEntry( vm_offset_t addr )
 
 
 /*
 
 
 /*

- * 
+ *

  */
 static void
 readEntry( void* entry, int size )
  */
 static void
 readEntry( void* entry, int size )


@@ -1034,7 +1034,7 @@ processorEntry( void )
 
 
 /*
 
 
 /*

- * 
+ *

  */
 static int
 lookupBusType( char* name )
  */
 static int
 lookupBusType( char* name )


@@ -1103,13 +1103,13 @@ ioApicEntry( void )
     apics[ entry.apicID ] = entry.apicID;
 
     // the numbering and setup of ioapics is so irrational
     apics[ entry.apicID ] = entry.apicID;
 
     // the numbering and setup of ioapics is so irrational

-    // that for now we will punt. 
+    // that for now we will punt.

 #if 0
     if (entry.apicFlags & IOAPICENTRY_FLAG_EN)
       printf("\tsmp_write_ioapic(mc, 0x%x, 0x%x, 0x%x);\n",
             entry.apicID, entry.apicVersion, entry.apicAddress);
 #endif
 #if 0
     if (entry.apicFlags & IOAPICENTRY_FLAG_EN)
       printf("\tsmp_write_ioapic(mc, 0x%x, 0x%x, 0x%x);\n",
             entry.apicID, entry.apicVersion, entry.apicAddress);
 #endif

-    
+

 }
 
 
 }
 
 


@@ -1144,11 +1144,11 @@ intEntry( void )
 
     printf( "\t %5d", (int)entry.srcBusID );
     if ( busses[ (int)entry.srcBusID ] == PCI )
 
     printf( "\t %5d", (int)entry.srcBusID );
     if ( busses[ (int)entry.srcBusID ] == PCI )

-       printf( "\t%2d:%c", 
+       printf( "\t%2d:%c",

                ((int)entry.srcBusIRQ >> 2) & 0x1f,
                ((int)entry.srcBusIRQ & 0x03) + 'A' );
     else
                ((int)entry.srcBusIRQ >> 2) & 0x1f,
                ((int)entry.srcBusIRQ & 0x03) + 'A' );
     else

-       printf( "\t 0x%x:0x%x(0x%x)", 
+       printf( "\t 0x%x:0x%x(0x%x)",

                                (int)entry.srcBusIRQ>>2,
                                (int)entry.srcBusIRQ & 3,
                                (int)entry.srcBusIRQ );
                                (int)entry.srcBusIRQ>>2,
                                (int)entry.srcBusIRQ & 3,
                                (int)entry.srcBusIRQ );


@@ -1163,7 +1163,7 @@ intEntry( void )
           (int)entry.srcBusIRQ,
           (int)entry.dstApicID ,
           (int)entry.dstApicINT );
           (int)entry.srcBusIRQ,
           (int)entry.dstApicID ,
           (int)entry.dstApicINT );

-          
+

 }
 
 static void
 }
 
 static void


@@ -1186,7 +1186,7 @@ lintEntry( void )
 
     printf( "\t %5d", (int)entry.srcBusID );
     if ( busses[ (int)entry.srcBusID ] == PCI )
 
     printf( "\t %5d", (int)entry.srcBusID );
     if ( busses[ (int)entry.srcBusID ] == PCI )

-       printf( "\t%2d:%c", 
+       printf( "\t%2d:%c",

                ((int)entry.srcBusIRQ >> 2) & 0x1f,
                ((int)entry.srcBusIRQ & 0x03) + 'A' );
     else
                ((int)entry.srcBusIRQ >> 2) & 0x1f,
                ((int)entry.srcBusIRQ & 0x03) + 'A' );
     else


@@ -1201,7 +1201,7 @@ lintEntry( void )
           (int)entry.srcBusID,
           (int)entry.srcBusIRQ,
           (int)entry.dstApicINT );
           (int)entry.srcBusID,
           (int)entry.srcBusIRQ,
           (int)entry.dstApicINT );

-          
+

 }
 
 
 }
 
 


@@ -1304,7 +1304,7 @@ doOptionList( void )
 
 
 /*
 
 
 /*

- * 
+ *

  */
 static void
 pnstr( uint8_t* s, int c )
  */
 static void
 pnstr( uint8_t* s, int c )

diff --git a/util/msrtool/configure b/util/msrtool/configure
index 88c38af6bd88176ba27f89fe025424bb7e92ccce..e52054ba5e9eabaa3c7d85a91f86fc9096653918 100755 (executable)
--- a/util/msrtool/configure
+++ b/util/msrtool/configure
@@ -82,7 +82,7 @@ trycompile() {
                        echo " using: ${CFLAGS} ${1}" 1>&2
                        echo "${CFLAGS} ${1}"
                        exit 0
                        echo " using: ${CFLAGS} ${1}" 1>&2
                        echo "${CFLAGS} ${1}"
                        exit 0

-               } 
+               }

                shift
                i=$(($i+1))
        done
                shift
                i=$(($i+1))
        done

diff --git a/util/msrtool/geodegx2.c b/util/msrtool/geodegx2.c
index 938444ff713dd5628a29cbaf348268eb69baa38c..8ec06c2172697c9993b1c01b1d8e113fdb2a263e 100644 (file)
--- a/util/msrtool/geodegx2.c
+++ b/util/msrtool/geodegx2.c
@@ -187,7 +187,7 @@ const struct msrdef geodegx2_msrs[] = {
                        { MSR1(0), "Enable" },
                        { MSR1(1), "Disable" },
                        { BITVAL_EOT }
                        { MSR1(0), "Enable" },
                        { MSR1(1), "Disable" },
                        { BITVAL_EOT }

-               }},             
+               }},

                { 37, 4, RESERVED },
                { 33, 1, "HOI_LOI", "High / Low Order Interleave Select", PRESENT_BIN, {
                        { MSR1(0), "Low Order Interleave" },
                { 37, 4, RESERVED },
                { 33, 1, "HOI_LOI", "High / Low Order Interleave Select", PRESENT_BIN, {
                        { MSR1(0), "Low Order Interleave" },

diff --git a/util/msrtool/msrtool.c b/util/msrtool/msrtool.c
index 47b4938739afcb94c0c548ae13b26617b87ea14f..9cbf358ce4897a7f80e59e3431190e6ca45682e4 100644 (file)
--- a/util/msrtool/msrtool.c
+++ b/util/msrtool/msrtool.c
@@ -346,7 +346,7 @@ int main(int argc, char *argv[]) {
        if (targets)
                for (tn = 0; tn < targets_found; tn++)
                        printf_quiet("Forced target %s: %s\n", targets[tn]->name, targets[tn]->prettyname);
        if (targets)
                for (tn = 0; tn < targets_found; tn++)
                        printf_quiet("Forced target %s: %s\n", targets[tn]->name, targets[tn]->prettyname);

-       else 
+       else

                for (t = alltargets; !TARGET_ISEOT(*t); t++) {
                        printf_verbose("Probing for target %s: %s\n", t->name, t->prettyname);
                        if (!t->probe(t))
                for (t = alltargets; !TARGET_ISEOT(*t); t++) {
                        printf_verbose("Probing for target %s: %s\n", t->name, t->prettyname);
                        if (!t->probe(t))

diff --git a/util/nrv2b/nrv2b.c b/util/nrv2b/nrv2b.c
index c8daa4d47f7cc8a3bf250972632d2b5d39b1d008..e9b72a69bb7d84673120b8d3075a59387fc99d7e 100644 (file)
--- a/util/nrv2b/nrv2b.c
+++ b/util/nrv2b/nrv2b.c
@@ -25,10 +25,10 @@
     library from upx.  That code is:
     Copyright (C) 1996-2002 Markus Franz Xaver Johannes Oberhumer
     And is distributed under the terms of the GPL.
     library from upx.  That code is:
     Copyright (C) 1996-2002 Markus Franz Xaver Johannes Oberhumer
     And is distributed under the terms of the GPL.

-    The conversion was performed 
+    The conversion was performed

     by Eric Biederman <ebiederman@lnxi.com>.
                                              20 August 2002
     by Eric Biederman <ebiederman@lnxi.com>.
                                              20 August 2002

-                                                
+

 **************************************************************/
 #define UCLPACK_COMPAT 0
 #include <stdio.h>
 **************************************************************/
 #define UCLPACK_COMPAT 0
 #include <stdio.h>


@@ -144,19 +144,19 @@ struct ucl_compress
        int init;
 
        unsigned int look;          /* bytes in lookahead buffer */
        int init;
 
        unsigned int look;          /* bytes in lookahead buffer */

-       
+

        unsigned int m_len;
        unsigned int m_off;
        unsigned int m_len;
        unsigned int m_off;

-       
+

        unsigned int last_m_len;
        unsigned int last_m_off;
        unsigned int last_m_len;
        unsigned int last_m_off;

-       
+

        const unsigned char *bp;
        const unsigned char *ip;
        const unsigned char *in;
        const unsigned char *in_end;
        unsigned char *out;
        const unsigned char *bp;
        const unsigned char *ip;
        const unsigned char *in;
        const unsigned char *in_end;
        unsigned char *out;

-       
+

        uint32_t bb_b;
        unsigned bb_k;
        unsigned bb_c_endian;
        uint32_t bb_b;
        unsigned bb_k;
        unsigned bb_c_endian;


@@ -164,7 +164,7 @@ struct ucl_compress
        unsigned bb_c_s8;
        unsigned char *bb_p;
        unsigned char *bb_op;
        unsigned bb_c_s8;
        unsigned char *bb_p;
        unsigned char *bb_op;

-       
+

        struct ucl_compress_config conf;
        unsigned int *result;
 
        struct ucl_compress_config conf;
        unsigned int *result;
 


@@ -173,7 +173,7 @@ struct ucl_compress
        unsigned int printcount; /* counter for reporting progress every 1K
                                    bytes */
 
        unsigned int printcount; /* counter for reporting progress every 1K
                                    bytes */
 

-       
+

        /* some stats */
        unsigned long lit_bytes;
        unsigned long match_bytes;
        /* some stats */
        unsigned long lit_bytes;
        unsigned long match_bytes;


@@ -209,13 +209,13 @@ struct ucl_swd
        unsigned int n;
        unsigned int f;
        unsigned int threshold;
        unsigned int n;
        unsigned int f;
        unsigned int threshold;

-       
+

 /* public - configuration */
        unsigned int max_chain;
        unsigned int nice_length;
        int use_best_off;
        unsigned int lazy_insert;
 /* public - configuration */
        unsigned int max_chain;
        unsigned int nice_length;
        int use_best_off;
        unsigned int lazy_insert;

-       
+

 /* public - output */
        unsigned int m_len;
        unsigned int m_off;
 /* public - output */
        unsigned int m_len;
        unsigned int m_off;


@@ -224,27 +224,27 @@ struct ucl_swd
 #if defined(SWD_BEST_OFF)
        unsigned int best_off[ SWD_BEST_OFF ];
 #endif
 #if defined(SWD_BEST_OFF)
        unsigned int best_off[ SWD_BEST_OFF ];
 #endif

-       
+

 /* semi public */
        struct ucl_compress *c;
        unsigned int m_pos;
 #if defined(SWD_BEST_OFF)
        unsigned int best_pos[ SWD_BEST_OFF ];
 #endif
 /* semi public */
        struct ucl_compress *c;
        unsigned int m_pos;
 #if defined(SWD_BEST_OFF)
        unsigned int best_pos[ SWD_BEST_OFF ];
 #endif

-       
+

 /* private */
        const uint8_t *dict;
        const uint8_t *dict_end;
        unsigned int dict_len;
 /* private */
        const uint8_t *dict;
        const uint8_t *dict_end;
        unsigned int dict_len;

-       
+

 /* private */
        unsigned int ip;                /* input pointer (lookahead) */
        unsigned int bp;                /* buffer pointer */
        unsigned int rp;                /* remove pointer */
        unsigned int b_size;
 /* private */
        unsigned int ip;                /* input pointer (lookahead) */
        unsigned int bp;                /* buffer pointer */
        unsigned int rp;                /* remove pointer */
        unsigned int b_size;

-       
+

        unsigned char *b_wrap;
        unsigned char *b_wrap;

-       
+

        unsigned int node_count;
        unsigned int first_rp;
 
        unsigned int node_count;
        unsigned int first_rp;
 


@@ -266,7 +266,7 @@ static void assert_match(const struct ucl_swd * swd, unsigned int m_len,
 {
        const struct ucl_compress *c = swd->c;
        unsigned int d_off;
 {
        const struct ucl_compress *c = swd->c;
        unsigned int d_off;

-       
+

        assert(m_len >= 2);
        if (m_off <= (unsigned int) (c->bp - c->in))
        {
        assert(m_len >= 2);
        if (m_off <= (unsigned int) (c->bp - c->in))
        {


@@ -468,7 +468,7 @@ void swd_remove_node(struct ucl_swd *s, unsigned int node)
        if (s->node_count == 0)
        {
                unsigned int key;
        if (s->node_count == 0)
        {
                unsigned int key;

-               
+

 #ifdef UCL_DEBUG
                if (s->first_rp != UINT_MAX)
                {
 #ifdef UCL_DEBUG
                if (s->first_rp != UINT_MAX)
                {


@@ -481,11 +481,11 @@ void swd_remove_node(struct ucl_swd *s, unsigned int node)
                        s->first_rp = UINT_MAX;
                }
 #endif
                        s->first_rp = UINT_MAX;
                }
 #endif

-               
+

                key = HEAD3(s->b,node);
                assert(s->llen3[key] > 0);
                --s->llen3[key];
                key = HEAD3(s->b,node);
                assert(s->llen3[key] > 0);
                --s->llen3[key];

-               
+

                key = HEAD2(s->b,node);
                assert(s->head2[key] != NIL2);
                if ((unsigned int) s->head2[key] == node)
                key = HEAD2(s->b,node);
                assert(s->head2[key] != NIL2);
                if ((unsigned int) s->head2[key] == node)


@@ -544,18 +544,18 @@ void swd_search(struct ucl_swd *s, unsigned int node, unsigned int cnt)
        const unsigned char * bp = s->b + s->bp;
        const unsigned char * bx = s->b + s->bp + s->look;
        unsigned char scan_end1;
        const unsigned char * bp = s->b + s->bp;
        const unsigned char * bx = s->b + s->bp + s->look;
        unsigned char scan_end1;

-       
+

        assert(s->m_len > 0);
        assert(s->m_len > 0);

-       
+

        scan_end1 = bp[m_len - 1];
        for ( ; cnt-- > 0; node = s->succ3[node])
        {
                p1 = bp;
                p2 = b + node;
                px = bx;
        scan_end1 = bp[m_len - 1];
        for ( ; cnt-- > 0; node = s->succ3[node])
        {
                p1 = bp;
                p2 = b + node;
                px = bx;

-               
+

                assert(m_len < s->look);
                assert(m_len < s->look);

-               
+

                if (
                        p2[m_len - 1] == scan_end1 &&
                        p2[m_len] == p1[m_len] &&
                if (
                        p2[m_len - 1] == scan_end1 &&
                        p2[m_len] == p1[m_len] &&


@@ -564,11 +564,11 @@ void swd_search(struct ucl_swd *s, unsigned int node, unsigned int cnt)
                {
                        unsigned int i;
                        assert(memcmp(bp,&b[node],3) == 0);
                {
                        unsigned int i;
                        assert(memcmp(bp,&b[node],3) == 0);

-                       
+

                        p1 += 2; p2 += 2;
                        do {} while (++p1 < px && *p1 == *++p2);
                        i = p1 - bp;
                        p1 += 2; p2 += 2;
                        do {} while (++p1 < px && *p1 == *++p2);
                        i = p1 - bp;

-                       
+

 #ifdef UCL_DEBUG
                        if (memcmp(bp,&b[node],i) != 0)
                                printf("%5ld %5ld %02x%02x %02x%02x\n",
 #ifdef UCL_DEBUG
                        if (memcmp(bp,&b[node],i) != 0)
                                printf("%5ld %5ld %02x%02x %02x%02x\n",


@@ -576,7 +576,7 @@ void swd_search(struct ucl_swd *s, unsigned int node, unsigned int cnt)
                                        bp[0], bp[1], b[node], b[node+1]);
 #endif
                        assert(memcmp(bp,&b[node],i) == 0);
                                        bp[0], bp[1], b[node], b[node+1]);
 #endif
                        assert(memcmp(bp,&b[node],i) == 0);

-                       
+

 #if defined(SWD_BEST_OFF)
                        if (i < SWD_BEST_OFF)
                        {
 #if defined(SWD_BEST_OFF)
                        if (i < SWD_BEST_OFF)
                        {


@@ -603,10 +603,10 @@ void swd_search(struct ucl_swd *s, unsigned int node, unsigned int cnt)
 static int swd_search2(struct ucl_swd *s)
 {
        unsigned int key;
 static int swd_search2(struct ucl_swd *s)
 {
        unsigned int key;

-       
+

        assert(s->look >= 2);
        assert(s->m_len > 0);
        assert(s->look >= 2);
        assert(s->m_len > 0);

-       
+

        key = s->head2[ HEAD2(s->b,s->bp) ];
        if (key == NIL2)
                return 0;
        key = s->head2[ HEAD2(s->b,s->bp) ];
        if (key == NIL2)
                return 0;


@@ -620,7 +620,7 @@ static int swd_search2(struct ucl_swd *s)
        if (s->best_pos[2] == 0)
                s->best_pos[2] = key + 1;
 #endif
        if (s->best_pos[2] == 0)
                s->best_pos[2] = key + 1;
 #endif

-       
+

        if (s->m_len < 2)
        {
                s->m_len = 2;
        if (s->m_len < 2)
        {
                s->m_len = 2;


@@ -702,25 +702,25 @@ init_match ( struct ucl_compress *c, struct ucl_swd *s,
        uint32_t flags )
 {
        int r;
        uint32_t flags )
 {
        int r;

-       
+

        assert(!c->init);
        c->init = 1;
        assert(!c->init);
        c->init = 1;

-       
+

        s->c = c;
        s->c = c;

-       
+

        c->last_m_len = c->last_m_off = 0;
        c->last_m_len = c->last_m_off = 0;

-       
+

        c->textsize = c->codesize = c->printcount = 0;
        c->lit_bytes = c->match_bytes = c->rep_bytes = 0;
        c->lazy = 0;
        c->textsize = c->codesize = c->printcount = 0;
        c->lit_bytes = c->match_bytes = c->rep_bytes = 0;
        c->lazy = 0;

-       
+

        r = swd_init(s,dict,dict_len);
        if (r != UCL_E_OK)
        {
                swd_exit(s);
                return r;
        }
        r = swd_init(s,dict,dict_len);
        if (r != UCL_E_OK)
        {
                swd_exit(s);
                return r;
        }

-       
+

        s->use_best_off = (flags & 1) ? 1 : 0;
        return UCL_E_OK;
 }
        s->use_best_off = (flags & 1) ? 1 : 0;
        return UCL_E_OK;
 }


@@ -730,7 +730,7 @@ find_match ( struct ucl_compress *c, struct ucl_swd *s,
        unsigned int this_len, unsigned int skip )
 {
        assert(c->init);
        unsigned int this_len, unsigned int skip )
 {
        assert(c->init);

-       
+

        if (skip > 0)
        {
                assert(this_len >= skip);
        if (skip > 0)
        {
                assert(this_len >= skip);


@@ -742,7 +742,7 @@ find_match ( struct ucl_compress *c, struct ucl_swd *s,
                assert(this_len <= 1);
                c->textsize += this_len - skip;
        }
                assert(this_len <= 1);
                c->textsize += this_len - skip;
        }

-       
+

        s->m_len = THRESHOLD;
 #ifdef SWD_BEST_OFF
        if (s->use_best_off)
        s->m_len = THRESHOLD;
 #ifdef SWD_BEST_OFF
        if (s->use_best_off)


@@ -751,9 +751,9 @@ find_match ( struct ucl_compress *c, struct ucl_swd *s,
        swd_findbest(s);
        c->m_len = s->m_len;
        c->m_off = s->m_off;
        swd_findbest(s);
        c->m_len = s->m_len;
        c->m_off = s->m_off;

-       
+

        swd_getbyte(s);
        swd_getbyte(s);

-       
+

        if (s->b_char < 0)
        {
                c->look = 0;
        if (s->b_char < 0)
        {
                c->look = 0;


@@ -765,7 +765,7 @@ find_match ( struct ucl_compress *c, struct ucl_swd *s,
                c->look = s->look + 1;
        }
        c->bp = c->ip - c->look;
                c->look = s->look + 1;
        }
        c->bp = c->ip - c->look;

-       
+

 #if 0
        /* brute force match search */
        if (c->m_len > THRESHOLD && c->m_len + 1 <= c->look)
 #if 0
        /* brute force match search */
        if (c->m_len > THRESHOLD && c->m_len + 1 <= c->look)


@@ -773,7 +773,7 @@ find_match ( struct ucl_compress *c, struct ucl_swd *s,
                const uint8_t *ip = c->bp;
                const uint8_t *m  = c->bp - c->m_off;
                const uint8_t *in = c->in;
                const uint8_t *ip = c->bp;
                const uint8_t *m  = c->bp - c->m_off;
                const uint8_t *in = c->in;

-               
+

                if (ip - in > N)
                        in = ip - N;
                for (;;)
                if (ip - in > N)
                        in = ip - N;
                for (;;)


@@ -791,7 +791,7 @@ find_match ( struct ucl_compress *c, struct ucl_swd *s,
                }
        }
 #endif
                }
        }
 #endif

-       
+

        return UCL_E_OK;
 }
 
        return UCL_E_OK;
 }
 


@@ -924,7 +924,7 @@ code_match(struct ucl_compress *c, unsigned int m_len, const unsigned int m_off)
                code_match(c, c->conf.max_match - 3, m_off);
                m_len -= c->conf.max_match - 3;
        }
                code_match(c, c->conf.max_match - 3, m_off);
                m_len -= c->conf.max_match - 3;
        }

-       
+

        c->match_bytes += m_len;
        if (m_len > c->result[3])
                c->result[3] = m_len;
        c->match_bytes += m_len;
        if (m_len > c->result[3])
                c->result[3] = m_len;


@@ -987,9 +987,9 @@ len_of_coded_match(struct ucl_compress *c, unsigned int m_len, unsigned int
                || m_off > c->conf.max_offset)
                return -1;
        assert(m_off > 0);
                || m_off > c->conf.max_offset)
                return -1;
        assert(m_off > 0);

-       
+

        m_len = m_len - 2 - (m_off > M2_MAX_OFFSET);
        m_len = m_len - 2 - (m_off > M2_MAX_OFFSET);

-       
+

        if (m_off == c->last_m_off)
                b = 1 + 2;
        else
        if (m_off == c->last_m_off)
                b = 1 + 2;
        else


@@ -1038,7 +1038,7 @@ int ucl_nrv2b_99_compress(
 #define SC_MAX_CHAIN   4096
 #define SC_FLAGS       1
 #define SC_MAX_OFFSET  N
 #define SC_MAX_CHAIN   4096
 #define SC_FLAGS       1
 #define SC_MAX_OFFSET  N

-       
+

        memset(c, 0, sizeof(*c));
        c->ip = c->in = in;
        c->in_end = in + in_len;
        memset(c, 0, sizeof(*c));
        c->ip = c->in = in;
        c->in_end = in + in_len;


@@ -1054,10 +1054,10 @@ int ucl_nrv2b_99_compress(
        if (r != 0)
                return UCL_E_INVALID_ARGUMENT;
        c->bb_op = out;
        if (r != 0)
                return UCL_E_INVALID_ARGUMENT;
        c->bb_op = out;

-       
+

        ii = c->ip;             /* point to start of literal run */
        lit = 0;
        ii = c->ip;             /* point to start of literal run */
        lit = 0;

-       
+

 
        swd = (struct ucl_swd *) malloc(sizeof(*swd));
        if (!swd)
 
        swd = (struct ucl_swd *) malloc(sizeof(*swd));
        if (!swd)


@@ -1082,7 +1082,7 @@ int ucl_nrv2b_99_compress(
                swd->nice_length = SC_NICE_LENGTH;
        if (c->conf.max_match < swd->nice_length)
                swd->nice_length = c->conf.max_match;
                swd->nice_length = SC_NICE_LENGTH;
        if (c->conf.max_match < swd->nice_length)
                swd->nice_length = c->conf.max_match;

-       
+

        c->last_m_off = 1;
        r = find_match(c,swd,0,0);
        if (r != UCL_E_OK)
        c->last_m_off = 1;
        r = find_match(c,swd,0,0);
        if (r != UCL_E_OK)


@@ -1092,19 +1092,19 @@ int ucl_nrv2b_99_compress(
                unsigned int ahead;
                unsigned int max_ahead;
                int l1, l2;
                unsigned int ahead;
                unsigned int max_ahead;
                int l1, l2;

-               
+

                c->codesize = c->bb_op - out;
                c->codesize = c->bb_op - out;

-               
+

                m_len = c->m_len;
                m_off = c->m_off;
                m_len = c->m_len;
                m_off = c->m_off;

-               
+

                assert(c->bp == c->ip - c->look);
                assert(c->bp >= in);
                if (lit == 0)
                        ii = c->bp;
                assert(ii + lit == c->bp);
                assert(swd->b_char == *(c->bp));
                assert(c->bp == c->ip - c->look);
                assert(c->bp >= in);
                if (lit == 0)
                        ii = c->bp;
                assert(ii + lit == c->bp);
                assert(swd->b_char == *(c->bp));

-               
+

                if (m_len < 2 || (m_len == 2 && (m_off > M2_MAX_OFFSET))
                        || m_off > c->conf.max_offset)
                {
                if (m_len < 2 || (m_len == 2 && (m_off > M2_MAX_OFFSET))
                        || m_off > c->conf.max_offset)
                {


@@ -1115,10 +1115,10 @@ int ucl_nrv2b_99_compress(
                        assert(r == 0);
                        continue;
                }
                        assert(r == 0);
                        continue;
                }

-               
+

                /* a match */
                assert_match(swd,m_len,m_off);
                /* a match */
                assert_match(swd,m_len,m_off);

-               
+

                /* shall we try a lazy match ? */
                ahead = 0;
                if (SC_TRY_LAZY <= 0 || m_len >= SC_MAX_LAZY || m_off ==
                /* shall we try a lazy match ? */
                ahead = 0;
                if (SC_TRY_LAZY <= 0 || m_len >= SC_MAX_LAZY || m_off ==


@@ -1139,7 +1139,7 @@ int ucl_nrv2b_99_compress(
                                max_ahead = m_len -1;
                        }
                }
                                max_ahead = m_len -1;
                        }
                }

-               
+

                while (ahead < max_ahead && c->look > m_len)
                {
                        if (m_len >= SC_GOOD_LENGTH)
                while (ahead < max_ahead && c->look > m_len)
                {
                        if (m_len >= SC_GOOD_LENGTH)


@@ -1148,11 +1148,11 @@ int ucl_nrv2b_99_compress(
                                swd->max_chain = SC_MAX_CHAIN;
                        r = find_match(c,swd,1,0);
                        ahead++;
                                swd->max_chain = SC_MAX_CHAIN;
                        r = find_match(c,swd,1,0);
                        ahead++;

-                       
+

                        assert(r == 0);
                        assert(c->look > 0);
                        assert(ii + lit + ahead == c->bp);
                        assert(r == 0);
                        assert(c->look > 0);
                        assert(ii + lit + ahead == c->bp);

-                       
+

                        if (c->m_len < 2)
                                continue;
                        l2 = len_of_coded_match(c,c->m_len,c->m_off);
                        if (c->m_len < 2)
                                continue;
                        l2 = len_of_coded_match(c,c->m_len,c->m_off);


@@ -1168,36 +1168,36 @@ int ucl_nrv2b_99_compress(
                                goto lazy_match_done;
                        }
                }
                                goto lazy_match_done;
                        }
                }

-               
+

                assert(ii + lit + ahead == c->bp);
                assert(ii + lit + ahead == c->bp);

-               
+

                /* 1 - code run */
                code_run(c,ii,lit);
                lit = 0;
                /* 1 - code run */
                code_run(c,ii,lit);
                lit = 0;

-               
+

                /* 2 - code match */
                code_match(c,m_len,m_off);
                swd->max_chain = SC_MAX_CHAIN;
                r = find_match(c,swd,m_len,1+ahead);
                assert(r == 0);
                /* 2 - code match */
                code_match(c,m_len,m_off);
                swd->max_chain = SC_MAX_CHAIN;
                r = find_match(c,swd,m_len,1+ahead);
                assert(r == 0);

-               
+

        lazy_match_done: ;
        }
        lazy_match_done: ;
        }

-       
+

        /* store final run */
        code_run(c,ii,lit);
        /* store final run */
        code_run(c,ii,lit);

-       
+

        /* EOF */
        bbPutBit(c, 0);
        code_prefix_ss11(c, 0x1000000U);
        bbPutByte(c, 0xff);
 
        bbFlushBits(c, 0);
        /* EOF */
        bbPutBit(c, 0);
        code_prefix_ss11(c, 0x1000000U);
        bbPutByte(c, 0xff);
 
        bbFlushBits(c, 0);

-       
+

        assert(c->textsize == in_len);
        c->codesize = c->bb_op - out;
        *out_len = c->bb_op - out;
        assert(c->textsize == in_len);
        c->codesize = c->bb_op - out;
        *out_len = c->bb_op - out;

-       
+

 #if 0
        printf("%7ld %7ld -> %7ld   %7ld %7ld   %ld  (max: %d %d %d)\n",
                (long) c->textsize, (long) in_len, (long) c->codesize,
 #if 0
        printf("%7ld %7ld -> %7ld   %7ld %7ld   %ld  (max: %d %d %d)\n",
                (long) c->textsize, (long) in_len, (long) c->codesize,


@@ -1205,7 +1205,7 @@ int ucl_nrv2b_99_compress(
                c->result[1], c->result[3], c->result[5]);
 #endif
        assert(c->lit_bytes + c->match_bytes == in_len);
                c->result[1], c->result[3], c->result[5]);
 #endif
        assert(c->lit_bytes + c->match_bytes == in_len);

-       
+

        swd_exit(swd);
        free(swd);
 
        swd_exit(swd);
        free(swd);
 


@@ -1250,7 +1250,7 @@ void Encode(void)  /* compression */
        tw = host_to_i86ul(in_len);
        if (fwrite(&tw, sizeof(tw), 1, outfile) != 1)
                Error("Can't write.");  /* output size of text */
        tw = host_to_i86ul(in_len);
        if (fwrite(&tw, sizeof(tw), 1, outfile) != 1)
                Error("Can't write.");  /* output size of text */

-#endif 
+#endif

        if (in_len == 0)
                return;
        rewind(infile);
        if (in_len == 0)
                return;
        rewind(infile);


@@ -1292,7 +1292,7 @@ void Encode(void)  /* compression */
        Fprintf((stderr, "input/output = %ld/%ld = %.3f\n", in_len, out_len,
                (double)in_len / out_len));
 #endif
        Fprintf((stderr, "input/output = %ld/%ld = %.3f\n", in_len, out_len,
                (double)in_len / out_len));
 #endif

-       
+

 }
 
 #endif
 }
 
 #endif


@@ -1365,7 +1365,7 @@ void Decode(void)  /* recover */
        if (!src)
                Error("Can't malloc");
        src_len = fread(src, 1, max_src_len, infile);
        if (!src)
                Error("Can't malloc");
        src_len = fread(src, 1, max_src_len, infile);

-       if (src_len <= 0) 
+       if (src_len <= 0)

                Error("Can't read");
 
        for(;;) {
                Error("Can't read");
 
        for(;;) {


@@ -1395,7 +1395,7 @@ void Decode(void)  /* recover */
                }
                m_len = GETBIT(bb, src, ilen);
                m_len = m_len*2 + GETBIT(bb, src, ilen);
                }
                m_len = GETBIT(bb, src, ilen);
                m_len = m_len*2 + GETBIT(bb, src, ilen);

-               if (m_len == 0) 
+               if (m_len == 0)

                {
                        m_len++;
                        do {
                {
                        m_len++;
                        do {


@@ -1437,7 +1437,7 @@ int main(int argc, char *argv[])
        char  *s;
        FILE  *f;
        int    c;
        char  *s;
        FILE  *f;
        int    c;

-       
+

        if (argc == 2) {
                outfile = stdout;
                if ((f = tmpfile()) == NULL) {
        if (argc == 2) {
                outfile = stdout;
                if ((f = tmpfile()) == NULL) {

diff --git a/util/nvramtool/Makefile b/util/nvramtool/Makefile
index 752e106da84ab1a80e03891a6642305a48b418a8..010c859b4f2a1d0ed9bfdfeb58f60e8e3df928eb 100644 (file)
--- a/util/nvramtool/Makefile
+++ b/util/nvramtool/Makefile
@@ -1,6 +1,6 @@
 #
 # Makefile for nvram utility
 #
 # Makefile for nvram utility

-# 
+#

 # (C) 2005-2008 coresystems GmbH
 # written by Stefan Reinauer <stepan@coresystems.de>
 #
 # (C) 2005-2008 coresystems GmbH
 # written by Stefan Reinauer <stepan@coresystems.de>
 #

diff --git a/util/nvramtool/cmos_lowlevel.c b/util/nvramtool/cmos_lowlevel.c
index 67d561b26761a2c22959e04d89a5716f994f3dbb..ecfc99b74f2851b79871bc91a6481e3eb565c97c 100644 (file)
--- a/util/nvramtool/cmos_lowlevel.c
+++ b/util/nvramtool/cmos_lowlevel.c
@@ -75,7 +75,7 @@ static inline unsigned char get_bits(unsigned long long value, unsigned bit,
 static inline void put_bits(unsigned char value, unsigned bit,
                            unsigned nr_bits, unsigned long long *result)
 {
 static inline void put_bits(unsigned char value, unsigned bit,
                            unsigned nr_bits, unsigned long long *result)
 {

-       *result += ((unsigned long long)(value & 
+       *result += ((unsigned long long)(value &

                                ((unsigned char)((1 << nr_bits) - 1)))) << bit;
 }
 
                                ((unsigned char)((1 << nr_bits) - 1)))) << bit;
 }
 


@@ -161,7 +161,7 @@ void cmos_write(const cmos_entry_t * e, unsigned long long value)
        } else {
                for (next_bit = 0, bits_left = length;
                     bits_left; next_bit += nr_bits, bits_left -= nr_bits) {
        } else {
                for (next_bit = 0, bits_left = length;
                     bits_left; next_bit += nr_bits, bits_left -= nr_bits) {

-                       nr_bits = cmos_bit_op_strategy(bit + next_bit, 
+                       nr_bits = cmos_bit_op_strategy(bit + next_bit,

                                        bits_left, &where);
                        cmos_write_bits(&where, nr_bits,
                                        get_bits(value, next_bit, nr_bits));
                                        bits_left, &where);
                        cmos_write_bits(&where, nr_bits,
                                        get_bits(value, next_bit, nr_bits));

diff --git a/util/nvramtool/cmos_ops.c b/util/nvramtool/cmos_ops.c
index 73d68e0a23bc7a05ec274eaa40ea457821d1095d..86ffe1022b501f2519a42ecd2fed01b8a443683d 100644 (file)
--- a/util/nvramtool/cmos_ops.c
+++ b/util/nvramtool/cmos_ops.c
@@ -122,7 +122,7 @@ int prepare_cmos_write(const cmos_entry_t * e, const char value_str[],
                break;
 
        case CMOS_ENTRY_HEX:
                break;
 
        case CMOS_ENTRY_HEX:

-               /* See if the first character of 'value_str' (excluding 
+               /* See if the first character of 'value_str' (excluding

                 * any initial whitespace) is a minus sign.
                 */
                for (p = value_str; isspace(*p); p++) ;
                 * any initial whitespace) is a minus sign.
                 */
                for (p = value_str; isspace(*p); p++) ;

diff --git a/util/nvramtool/common.c b/util/nvramtool/common.c
index c80c2da6dfaf632048a7778f7f3d02e0ba814a03..45338ec4de01d4cf8652fea1061ff8fa3b00c60f 100644 (file)
--- a/util/nvramtool/common.c
+++ b/util/nvramtool/common.c
@@ -48,7 +48,7 @@ int get_line_from_file(FILE * f, char line[], int line_buf_size)
                return LINE_EOF;
 
        /* If the file contains a line that is too long, then it's best
                return LINE_EOF;
 
        /* If the file contains a line that is too long, then it's best

-        * to let the user know right away rather than passing back a 
+        * to let the user know right away rather than passing back a

         * truncated result that will lead to problems later on.
         */
        return (strlen(line) == ((size_t) (line_buf_size - 1))) ?
         * truncated result that will lead to problems later on.
         */
        return (strlen(line) == ((size_t) (line_buf_size - 1))) ?

diff --git a/util/nvramtool/coreboot_tables.h b/util/nvramtool/coreboot_tables.h
index d6e1b769425da9a54f64871891934b67792b28e7..08f0be63fab3ed55a90be8469a49446d2ebea47d 100644 (file)
--- a/util/nvramtool/coreboot_tables.h
+++ b/util/nvramtool/coreboot_tables.h
@@ -17,7 +17,7 @@
  * is expected to be information that cannot be discovered by
  * other means, such as quering the hardware directly.
  *
  * is expected to be information that cannot be discovered by
  * other means, such as quering the hardware directly.
  *

- * All of the information should be Position Independent Data.  
+ * All of the information should be Position Independent Data.

  * That is it should be safe to relocated any of the information
  * without it's meaning/correctnes changing.   For table that
  * can reasonably be used on multiple architectures the data
  * That is it should be safe to relocated any of the information
  * without it's meaning/correctnes changing.   For table that
  * can reasonably be used on multiple architectures the data


@@ -40,9 +40,9 @@
  * table entries and be backwards compatible, but it is not required.
  */
 
  * table entries and be backwards compatible, but it is not required.
  */
 

-/* Since coreboot is usually compiled 32bit, gcc will align 64bit 
- * types to 32bit boundaries. If the coreboot table is dumped on a 
- * 64bit system, a uint64_t would be aligned to 64bit boundaries, 
+/* Since coreboot is usually compiled 32bit, gcc will align 64bit
+ * types to 32bit boundaries. If the coreboot table is dumped on a
+ * 64bit system, a uint64_t would be aligned to 64bit boundaries,

  * breaking the table format.
  *
  * lb_uint64 will keep 64bit coreboot table values aligned to 32bit
  * breaking the table format.
  *
  * lb_uint64 will keep 64bit coreboot table values aligned to 32bit


@@ -177,7 +177,7 @@ struct cmos_entries {
        uint32_t config;        /* e=enumeration, h=hex, r=reserved */
        uint32_t config_id;     /* a number linking to an enumeration record */
 #define CMOS_MAX_NAME_LENGTH 32
        uint32_t config;        /* e=enumeration, h=hex, r=reserved */
        uint32_t config_id;     /* a number linking to an enumeration record */
 #define CMOS_MAX_NAME_LENGTH 32

-       uint8_t name[CMOS_MAX_NAME_LENGTH];     /* name of entry in ascii, 
+       uint8_t name[CMOS_MAX_NAME_LENGTH];     /* name of entry in ascii,

                                                   variable length int aligned */
 };
 
                                                   variable length int aligned */
 };
 


@@ -192,7 +192,7 @@ struct cmos_enums {
        uint32_t config_id;     /* a number identifying the config id */
        uint32_t value;         /* the value associated with the text */
 #define CMOS_MAX_TEXT_LENGTH 32
        uint32_t config_id;     /* a number identifying the config id */
        uint32_t value;         /* the value associated with the text */
 #define CMOS_MAX_TEXT_LENGTH 32

-       uint8_t text[CMOS_MAX_TEXT_LENGTH];     /* enum description in ascii, 
+       uint8_t text[CMOS_MAX_TEXT_LENGTH];     /* enum description in ascii,

                                                   variable length int aligned */
 };
 
                                                   variable length int aligned */
 };
 

diff --git a/util/nvramtool/hexdump.c b/util/nvramtool/hexdump.c
index 78199eb0ce4d46d2a342acea412e348d0a155fc7..405703fe732285ebf3d06f193035c6a7fd64710d 100644 (file)
--- a/util/nvramtool/hexdump.c
+++ b/util/nvramtool/hexdump.c
@@ -88,7 +88,7 @@ void hexdump(const void *mem, int bytes, uint64_t addrprint_start,
         * terminates, the number of remaining bytes to display (if any)
         * will not be enough to fill an entire line.
         */
         * terminates, the number of remaining bytes to display (if any)
         * will not be enough to fill an entire line.
         */

-       for (bytes_left = bytes; 
+       for (bytes_left = bytes;

                        bytes_left >= format->bytes_per_line;
                        bytes_left -= format->bytes_per_line) {
                /* print start address for current line */
                        bytes_left >= format->bytes_per_line;
                        bytes_left -= format->bytes_per_line) {
                /* print start address for current line */

diff --git a/util/nvramtool/ip_checksum.h b/util/nvramtool/ip_checksum.h
index ebd52ceb2cf3c091cbd33755dd822c418e5aee1b..f2a13070a3a914481e6bbb71d1d624c46bd7da3d 100644 (file)
--- a/util/nvramtool/ip_checksum.h
+++ b/util/nvramtool/ip_checksum.h
@@ -7,7 +7,7 @@
 
 /* Note: The contents of this file were borrowed from the coreboot source
  *       code which may be obtained from http://www.coreboot.org.
 
 /* Note: The contents of this file were borrowed from the coreboot source
  *       code which may be obtained from http://www.coreboot.org.

- *       Specifically, this code was obtained from coreboot (LinuxBIOS) 
+ *       Specifically, this code was obtained from coreboot (LinuxBIOS)

  *       version 1.0.0.8.
  */
 
  *       version 1.0.0.8.
  */
 

diff --git a/util/nvramtool/nvramtool.8 b/util/nvramtool/nvramtool.8
index e12070bf393f88cd731d99e971442ac0318b1d8a..9159a2a6dd1c0d23c69635bf8791006de5babb2a 100644 (file)
--- a/util/nvramtool/nvramtool.8
+++ b/util/nvramtool/nvramtool.8
@@ -114,7 +114,7 @@ input.
 If
 .B "VALUE"
 is present then set the CMOS checksum for the coreboot parameters to
 If
 .B "VALUE"
 is present then set the CMOS checksum for the coreboot parameters to

-.B "VALUE." 
+.B "VALUE."

 Otherwise, show the checksum value.
 .TP
 .B "-l [ARG]"
 Otherwise, show the checksum value.
 .TP
 .B "-l [ARG]"

diff --git a/util/optionlist/Makefile b/util/optionlist/Makefile
index 3fb69232ecb9b4d74cc2ece8d4a3c8730738d82e..5d0d2d298f8c6b84ac6cd184c93383339733d9c9 100644 (file)
--- a/util/optionlist/Makefile
+++ b/util/optionlist/Makefile
@@ -1,24 +1,24 @@
-# 
+#

 # Copyright (C) 2010 coresystems GmbH
 # Copyright (C) 2010 coresystems GmbH

-# 
+#

 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
 # the Free Software Foundation; version 2 of the License.
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
 # the Free Software Foundation; version 2 of the License.

-# 
+#

 # This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU General Public License for more details.
 # This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU General Public License for more details.

-# 
+#

 # You should have received a copy of the GNU General Public License
 # along with this program; if not, write to the Free Software
 # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 # You should have received a copy of the GNU General Public License
 # along with this program; if not, write to the Free Software
 # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA

-# 
+#

 
 
 SVNVERSION := $(shell LC_ALL=C svnversion -cn ../.. | sed -e "s/.*://" -e "s/\([0-9]*\).*/\1/" | grep "[0-9]" || LC_ALL=C svn info . | grep ^Revision | sed "s/.*[[:blank:]]\+\([0-9]*\)[^0-9]*/\1/" | grep "[0-9]" || echo unknown)
 
 
 
 SVNVERSION := $(shell LC_ALL=C svnversion -cn ../.. | sed -e "s/.*://" -e "s/\([0-9]*\).*/\1/" | grep "[0-9]" || LC_ALL=C svn info . | grep ^Revision | sed "s/.*[[:blank:]]\+\([0-9]*\)[^0-9]*/\1/" | grep "[0-9]" || echo unknown)
 

-all: 
+all:

        cd ../..; util/optionlist/kconfig2wiki src/Kconfig $(SVNVERSION) > util/optionlist/Options.wiki
 
 clean:
        cd ../..; util/optionlist/kconfig2wiki src/Kconfig $(SVNVERSION) > util/optionlist/Options.wiki
 
 clean:

diff --git a/util/optionlist/kconfig2wiki b/util/optionlist/kconfig2wiki
index 0a2b0aaf861fdc9cd9252a12a4733528a6d17cfd..23d464a3ea8736d333a3943e56b35ce2f6701a2b 100755 (executable)
--- a/util/optionlist/kconfig2wiki
+++ b/util/optionlist/kconfig2wiki
@@ -1,25 +1,25 @@
 #!/usr/bin/python
 #!/usr/bin/python

-# 
+#

 # kconfig2wiki - Kconfig to MediaWiki converter for
 # http://www.coreboot.org/Coreboot_Options
 # kconfig2wiki - Kconfig to MediaWiki converter for
 # http://www.coreboot.org/Coreboot_Options

-# 
+#

 # Copyright (C) 2010 coresystems GmbH
 # based on http://landley.net/kdocs/make/menuconfig2html.py
 # Copyright (C) by Rob Landley
 # Copyright (C) 2010 coresystems GmbH
 # based on http://landley.net/kdocs/make/menuconfig2html.py
 # Copyright (C) by Rob Landley

-# 
+#

 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
 # the Free Software Foundation; version 2 of the License
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
 # the Free Software Foundation; version 2 of the License

-# 
+#

 # This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU General Public License for more details.
 # This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU General Public License for more details.

-# 
+#

 # You should have received a copy of the GNU General Public License
 # along with this program; if not, write to the Free Software
 # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 # You should have received a copy of the GNU General Public License
 # along with this program; if not, write to the Free Software
 # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA

-# 
+#

 
 helplen = 0
 extra_chapters = 0
 
 helplen = 0
 extra_chapters = 0

diff --git a/util/options/build_opt_tbl.c b/util/options/build_opt_tbl.c
index ae36f87e03c9940f448496e2ab25cb6cd215c1c8..3660f4e2ab04e48ed19c143a7f9a2e2a167476f9 100644 (file)
--- a/util/options/build_opt_tbl.c
+++ b/util/options/build_opt_tbl.c
@@ -99,7 +99,7 @@ static void test_for_entry_overlaps(void *entry_start, void *entry_end)
                                        ce->name);
                                exit(1);
                        }
                                        ce->name);
                                exit(1);
                        }

-                       /* test if entries 8 or more in length are even bytes */ 
+                       /* test if entries 8 or more in length are even bytes */

                        if(ce->length%8){
                                 printf("Error - Entry %s length over 8 must be a multiple of 8\n",
                                         ce->name);
                        if(ce->length%8){
                                 printf("Error - Entry %s length over 8 must be a multiple of 8\n",
                                         ce->name);


@@ -164,7 +164,7 @@ static unsigned long get_number(char *line, char **ptr, int base)
        char *ptr2;
        value = strtoul(*ptr, &ptr2, base);
        if (ptr2 == *ptr) {
        char *ptr2;
        value = strtoul(*ptr, &ptr2, base);
        if (ptr2 == *ptr) {

-               printf("Error missing digits at: \n%s\n in line:\n%s\n", 
+               printf("Error missing digits at: \n%s\n in line:\n%s\n",

                        *ptr, line);
                exit(1);
        }
                        *ptr, line);
                exit(1);
        }


@@ -237,15 +237,15 @@ static int is_ident(char *str)
  *
  * The input comes from the configuration file which contains two parts
  * entries and enumerations.  Each section is started with the key words
  *
  * The input comes from the configuration file which contains two parts
  * entries and enumerations.  Each section is started with the key words

- * entries and enumerations.  Records then follow in their respective 
+ * entries and enumerations.  Records then follow in their respective

  * formats.
  *
  * The output of this program is the cmos definitions table.  It is stored
  * formats.
  *
  * The output of this program is the cmos definitions table.  It is stored

- * in the cmos_table array. If this module is called, and the global 
+ * in the cmos_table array. If this module is called, and the global

  * table_file has been implimented by the user, the table is also written
  * to the specified file.
  *
  * table_file has been implimented by the user, the table is also written
  * to the specified file.
  *

- * This program exits with a return code of 1 on error.  It returns 0 on 
+ * This program exits with a return code of 1 on error.  It returns 0 on

  * successful completion
  */
 int main(int argc, char **argv)
  * successful completion
  */
 int main(int argc, char **argv)


@@ -336,7 +336,7 @@ int main(int argc, char **argv)
        ce=(struct cmos_entries*)(cmos_table+(ct->header_length));
        cptr = (char*)ce;
        for(;;){  /* this section loops through the entry records */
        ce=(struct cmos_entries*)(cmos_table+(ct->header_length));
        cptr = (char*)ce;
        for(;;){  /* this section loops through the entry records */

-               if(fgets(line,INPUT_LINE_MAX,fp)==NULL) 
+               if(fgets(line,INPUT_LINE_MAX,fp)==NULL)

                        break; /* end if no more input */
                // FIXME mode should be a single enum.
                if(!entry_mode) {  /* skip input until the entries key word */
                        break; /* end if no more input */
                // FIXME mode should be a single enum.
                if(!entry_mode) {  /* skip input until the entries key word */


@@ -378,8 +378,8 @@ int main(int argc, char **argv)
                        exit(1);
                }
                if (!is_ident((char *)ce->name)) {
                        exit(1);
                }
                if (!is_ident((char *)ce->name)) {

-                       fprintf(stderr, 
-                               "Error - Name %s is an invalid identifier in line\n %s\n", 
+                       fprintf(stderr,
+                               "Error - Name %s is an invalid identifier in line\n %s\n",

                                ce->name, line);
                        exit(1);
                }
                                ce->name, line);
                        exit(1);
                }


@@ -408,7 +408,7 @@ int main(int argc, char **argv)
 
        for(;enum_mode;){ /* loop to build the enumerations section */
                long ptr;
 
        for(;enum_mode;){ /* loop to build the enumerations section */
                long ptr;

-               if(fgets(line,INPUT_LINE_MAX,fp)==NULL) 
+               if(fgets(line,INPUT_LINE_MAX,fp)==NULL)

                        break; /* go till end of input */
 
                if (strstr(line, "checksums") != 0) {
                        break; /* go till end of input */
 
                if (strstr(line, "checksums") != 0) {


@@ -432,7 +432,7 @@ int main(int argc, char **argv)
                for(cnt=0;(line[ptr]!='\n')&&(cnt<31);ptr++,cnt++)
                        c_enums->text[cnt]=line[ptr];
                c_enums->text[cnt]=0;
                for(cnt=0;(line[ptr]!='\n')&&(cnt<31);ptr++,cnt++)
                        c_enums->text[cnt]=line[ptr];
                c_enums->text[cnt]=0;

-       
+

                /* make the record int aligned */
                cnt++;
                if(cnt%4)
                /* make the record int aligned */
                cnt++;
                if(cnt%4)


@@ -473,7 +473,7 @@ int main(int argc, char **argv)
 
                skip_spaces(line, &ptr);
                cs->location = get_number(line, &ptr, 10);
 
                skip_spaces(line, &ptr);
                cs->location = get_number(line, &ptr, 10);

-               
+

                /* Make certain there are spaces until the end of the line */
                skip_spaces(line, &ptr);
 
                /* Make certain there are spaces until the end of the line */
                skip_spaces(line, &ptr);
 


@@ -498,7 +498,7 @@ int main(int argc, char **argv)
                        exit(1);
                }
                if ((cs->location >= (CMOS_IMAGE_BUFFER_SIZE*8)) ||
                        exit(1);
                }
                if ((cs->location >= (CMOS_IMAGE_BUFFER_SIZE*8)) ||

-                       ((cs->location + 16) > (CMOS_IMAGE_BUFFER_SIZE*8))) 
+                       ((cs->location + 16) > (CMOS_IMAGE_BUFFER_SIZE*8)))

                {
                        fprintf(stderr, "Error - location is to big in line\n%s\n", line);
                        exit(1);
                {
                        fprintf(stderr, "Error - location is to big in line\n%s\n", line);
                        exit(1);

diff --git a/util/resetcf/resetcf.c b/util/resetcf/resetcf.c
index 1977f7dbcb3e8b93b3b822e1a53f5453aff8143d..01e270c824b3c96ba8f83afd5be381a6c5db3a2d 100644 (file)
--- a/util/resetcf/resetcf.c
+++ b/util/resetcf/resetcf.c
@@ -23,7 +23,7 @@ main(int argc, char *argv[])
     {
       v = mmap(0, length, PROT_READ | PROT_WRITE, MAP_SHARED,fd,nvram);
       fprintf(stderr, "mmap returns %p\n", v);
     {
       v = mmap(0, length, PROT_READ | PROT_WRITE, MAP_SHARED,fd,nvram);
       fprintf(stderr, "mmap returns %p\n", v);

-      
+

       if ( v == (void *) -1)
        {
          perror("mmap");
       if ( v == (void *) -1)
        {
          perror("mmap");


@@ -33,10 +33,10 @@ main(int argc, char *argv[])
       perror("open /dev/mem");
       exit(1);
     }
       perror("open /dev/mem");
       exit(1);
     }

-  
+

     for( i = 0x836 ; i < 0x840 ; i++){
        *(unsigned char *)(v+i) = 0;
     }
     for( i = 0x836 ; i < 0x840 ; i++){
        *(unsigned char *)(v+i) = 0;
     }

-   
-  
+
+

 }
 }

diff --git a/util/romcc/Makefile b/util/romcc/Makefile
index 1734fe5c89be0263ea2dc20b65284f0773079234..6543fbb3b7d8fac4d023f6b9a30c706b4f6d0c51 100644 (file)
--- a/util/romcc/Makefile
+++ b/util/romcc/Makefile
@@ -149,7 +149,7 @@ TEST_ASM_O2_mmmx_msse:=$(patsubst %.c, tests/%.S-O2-mmmx-msse, $(TESTS))
 TEST_ASM_O2_mmmx_call     :=$(patsubst %.c, tests/%.S-O2-mmmx-call, $(TESTS))
 TEST_ASM_O2_mmmx_msse_call:=$(patsubst %.c, tests/%.S-O2-mmmx-msse-call, $(TESTS))
 TEST_ASM_ALL:= $(TEST_ASM) $(TEST_ASM_O) $(TEST_ASM_O2) $(TEST_ASM_mmmx) $(TEST_ASM_msse) $(TEST_ASM_mmmx_msse) $(TEST_ASM_O_mmmx) $(TEST_ASM_O_msse) $(TEST_ASM_O_mmmx_msse) $(TEST_ASM_O2_mmmx) $(TEST_ASM_O2_msse) $(TEST_ASM_O2_mmmx_msse) $(TEST_ASM_O2_mmmx_call) $(TEST_ASM_O2_mmmx_msse_call)
 TEST_ASM_O2_mmmx_call     :=$(patsubst %.c, tests/%.S-O2-mmmx-call, $(TESTS))
 TEST_ASM_O2_mmmx_msse_call:=$(patsubst %.c, tests/%.S-O2-mmmx-msse-call, $(TESTS))
 TEST_ASM_ALL:= $(TEST_ASM) $(TEST_ASM_O) $(TEST_ASM_O2) $(TEST_ASM_mmmx) $(TEST_ASM_msse) $(TEST_ASM_mmmx_msse) $(TEST_ASM_O_mmmx) $(TEST_ASM_O_msse) $(TEST_ASM_O_mmmx_msse) $(TEST_ASM_O2_mmmx) $(TEST_ASM_O2_msse) $(TEST_ASM_O2_mmmx_msse) $(TEST_ASM_O2_mmmx_call) $(TEST_ASM_O2_mmmx_msse_call)

-TEST_ASM_MOST:= $(TEST_ASM_O) $(TEST_ASM_O_mmmx) $(TEST_ASM_O_msse) $(TEST_ASM_O_mmmx_msse) $(TEST_ASM_O2) $(TEST_ASM_O2_mmmx) $(TEST_ASM_O2_msse) $(TEST_ASM_O2_mmmx_msse) 
+TEST_ASM_MOST:= $(TEST_ASM_O) $(TEST_ASM_O_mmmx) $(TEST_ASM_O_msse) $(TEST_ASM_O_mmmx_msse) $(TEST_ASM_O2) $(TEST_ASM_O2_mmmx) $(TEST_ASM_O2_msse) $(TEST_ASM_O2_mmmx_msse)

 # $(TEST_ASM_O2_mmmx_call) $(TEST_ASM_O2_mmmx_msse_call)
 TEST_OBJ:=$(patsubst %.c, tests/%.o, $(TESTS))
 TEST_ELF:=$(patsubst %.c, tests/%.elf, $(TESTS))
 # $(TEST_ASM_O2_mmmx_call) $(TEST_ASM_O2_mmmx_msse_call)
 TEST_OBJ:=$(patsubst %.c, tests/%.o, $(TESTS))
 TEST_ELF:=$(patsubst %.c, tests/%.elf, $(TESTS))

diff --git a/util/romcc/do_tests.sh b/util/romcc/do_tests.sh
index fdbe2a6189e35d3277084c2e66eca3de57193c8a..2ce39d17e1c24e969a7ab8667971986f0567061f 100644 (file)
--- a/util/romcc/do_tests.sh
+++ b/util/romcc/do_tests.sh
@@ -22,12 +22,12 @@ LIST="1 2 3 4 5 6"
 BASE="raminit_test"
 #SKIP="6"
 EXPECTED_BAD=""
 BASE="raminit_test"
 #SKIP="6"
 EXPECTED_BAD=""

-fi 
+fi

 if [ "$type" = "hello" ] ; then
 LIST="1 2"
 BASE="hello_world"
 EXPECTED_BAD=""
 if [ "$type" = "hello" ] ; then
 LIST="1 2"
 BASE="hello_world"
 EXPECTED_BAD=""

-fi 
+fi

 
 
 SKIPPED=""
 
 
 SKIPPED=""


@@ -36,7 +36,7 @@ BAD=""
 OLD_BAD=""
 NEW_BAD=""
 NEW_GOOD=""
 OLD_BAD=""
 NEW_BAD=""
 NEW_GOOD=""

-for i in $LIST ; do 
+for i in $LIST ; do

        DO_SKIP=""
        for j in $SKIP ; do
                if [ "$j" = "$i" ] ; then
        DO_SKIP=""
        for j in $SKIP ; do
                if [ "$j" = "$i" ] ; then


@@ -55,8 +55,8 @@ for i in $LIST ; do
                        break;
                fi
        done
                        break;
                fi
        done

-       echo -e -n "$i $PROBLEM\t" 
-       if ./tests.sh $BASE $i > /dev/null 2> /dev/null ; then 
+       echo -e -n "$i $PROBLEM\t"
+       if ./tests.sh $BASE $i > /dev/null 2> /dev/null ; then

                echo OK
                if [ ! -z "$PROBLEM" ] ; then
                        NEW_GOOD="$NEW_GOOD$i "
                echo OK
                if [ ! -z "$PROBLEM" ] ; then
                        NEW_GOOD="$NEW_GOOD$i "


@@ -65,10 +65,10 @@ for i in $LIST ; do
        else
                echo -n "FAILED: "
                tail -n 1 tests/$BASE$i.debug2 | tr -d '\r\n'
        else
                echo -n "FAILED: "
                tail -n 1 tests/$BASE$i.debug2 | tr -d '\r\n'

-               echo 
+               echo

                if [ -z "$PROBLEM" ] ; then
                        NEW_BAD="$NEW_BAD$i "
                if [ -z "$PROBLEM" ] ; then
                        NEW_BAD="$NEW_BAD$i "

-               else 
+               else

                        OLD_BAD="$OLD_BAD$i "
                fi
                BAD="$BAD$i "
                        OLD_BAD="$OLD_BAD$i "
                fi
                BAD="$BAD$i "

diff --git a/util/romcc/romcc.c b/util/romcc/romcc.c
index e691f3f585ca9093077f3d134641190be290d6cf..7eced78ed23950fa27ec2d06692f6aa096b729db 100644 (file)
--- a/util/romcc/romcc.c
+++ b/util/romcc/romcc.c
@@ -25,9 +25,9 @@
 #define MAX_CWD_SIZE 4096
 #define MAX_ALLOCATION_PASSES 100
 
 #define MAX_CWD_SIZE 4096
 #define MAX_ALLOCATION_PASSES 100
 

-/* NOTE: Before you even start thinking to touch anything 
+/* NOTE: Before you even start thinking to touch anything

  * in this code, set DEBUG_ROMCC_WARNINGS to 1 to get an
  * in this code, set DEBUG_ROMCC_WARNINGS to 1 to get an

- * insight on the original author's thoughts. We introduced 
+ * insight on the original author's thoughts. We introduced

  * this switch as romcc was about the only thing producing
  * massive warnings in our code..
  */
  * this switch as romcc was about the only thing producing
  * massive warnings in our code..
  */


@@ -61,7 +61,7 @@
 #endif
 
 /*  Control flow graph of a loop without goto.
 #endif
 
 /*  Control flow graph of a loop without goto.

- * 
+ *

  *        AAA
  *   +---/
  *  /
  *        AAA
  *   +---/
  *  /


@@ -74,31 +74,31 @@
  *   |\ GGG HHH   |   continue;
  *   | \  \   |   |
  *   |  \ III |  /
  *   |\ GGG HHH   |   continue;
  *   | \  \   |   |
  *   |  \ III |  /

- *   |   \ | /  / 
- *   |    vvv  /  
- *   +----BBB /   
+ *   |   \ | /  /
+ *   |    vvv  /
+ *   +----BBB /

  *         | /
  *         vv
  *        JJJ
  *
  *         | /
  *         vv
  *        JJJ
  *

- * 
+ *

  *             AAA
  *     +-----+  |  +----+
  *     |      \ | /     |
  *     |       BBB  +-+ |
  *     |       / \ /  | |
  *     |     CCC JJJ / /
  *             AAA
  *     +-----+  |  +----+
  *     |      \ | /     |
  *     |       BBB  +-+ |
  *     |       / \ /  | |
  *     |     CCC JJJ / /

- *     |     / \    / / 
- *     |   DDD EEE / /  
+ *     |     / \    / /
+ *     |   DDD EEE / /

  *     |    |   +-/ /
  *     |    |   +-/ /

- *     |   FFF     /    
- *     |   / \    /     
- *     | GGG HHH /      
+ *     |   FFF     /
+ *     |   / \    /
+ *     | GGG HHH /

  *     |  |   +-/
  *     | III
  *     |  |   +-/
  *     | III

- *     +--+ 
+ *     +--+
+ *

  *
  *

- * 

  * DFlocal(X) = { Y <- Succ(X) | idom(Y) != X }
  * DFup(Z)    = { Y <- DF(Z) | idom(Y) != X }
  *
  * DFlocal(X) = { Y <- Succ(X) | idom(Y) != X }
  * DFup(Z)    = { Y <- DF(Z) | idom(Y) != X }
  *


@@ -117,7 +117,7 @@
  *     DDD   EEE     DDD: [ ] ( BBB ) EEE: [ JJJ ] ()
  *      |
  *     FFF           FFF: [ ] ( BBB )
  *     DDD   EEE     DDD: [ ] ( BBB ) EEE: [ JJJ ] ()
  *      |
  *     FFF           FFF: [ ] ( BBB )

- *     / \         
+ *     / \

  *  GGG   HHH        GGG: [ ] ( BBB ) HHH: [ BBB ] ()
  *   |
  *  III              III: [ BBB ] ()
  *  GGG   HHH        GGG: [ ] ( BBB ) HHH: [ BBB ] ()
  *   |
  *  III              III: [ BBB ] ()


@@ -125,7 +125,7 @@
  *
  * BBB and JJJ are definitely the dominance frontier.
  * Where do I place phi functions and how do I make that decision.
  *
  * BBB and JJJ are definitely the dominance frontier.
  * Where do I place phi functions and how do I make that decision.

- *   
+ *

  */
 
 struct filelist {
  */
 
 struct filelist {


@@ -231,7 +231,7 @@ static char *slurp_file(const char *dirname, const char *filename, off_t *r_size
        off_t size, progress;
        ssize_t result;
        FILE* file;
        off_t size, progress;
        ssize_t result;
        FILE* file;

-       
+

        if (!filename) {
                *r_size = 0;
                return 0;
        if (!filename) {
                *r_size = 0;
                return 0;


@@ -406,14 +406,14 @@ struct token {
 #define OP_SUB        9
 #define OP_SL        10
 #define OP_USR       11
 #define OP_SUB        9
 #define OP_SL        10
 #define OP_USR       11

-#define OP_SSR       12 
-#define OP_AND       13 
+#define OP_SSR       12
+#define OP_AND       13

 #define OP_XOR       14
 #define OP_OR        15
 #define OP_POS       16 /* Dummy positive operator don't use it */
 #define OP_NEG       17
 #define OP_INVERT    18
 #define OP_XOR       14
 #define OP_OR        15
 #define OP_POS       16 /* Dummy positive operator don't use it */
 #define OP_NEG       17
 #define OP_INVERT    18

-                    
+

 #define OP_EQ        20
 #define OP_NOTEQ     21
 #define OP_SLESS     22
 #define OP_EQ        20
 #define OP_NOTEQ     21
 #define OP_SLESS     22


@@ -424,7 +424,7 @@ struct token {
 #define OP_ULESSEQ   27
 #define OP_SMOREEQ   28
 #define OP_UMOREEQ   29
 #define OP_ULESSEQ   27
 #define OP_SMOREEQ   28
 #define OP_UMOREEQ   29

-                    
+

 #define OP_LFALSE    30  /* Test if the expression is logically false */
 #define OP_LTRUE     31  /* Test if the expression is logcially true */
 
 #define OP_LFALSE    30  /* Test if the expression is logically false */
 #define OP_LTRUE     31  /* Test if the expression is logcially true */
 


@@ -483,7 +483,7 @@ struct token {
  * assigned yet, or variables whose value we simply do not know.
  */
 
  * assigned yet, or variables whose value we simply do not know.
  */
 

-#define OP_WRITE     60 
+#define OP_WRITE     60

 /* OP_WRITE moves one pseudo register to another.
  * MISC(0) holds the destination pseudo register, which must be an OP_DECL.
  * RHS(0) holds the psuedo to move.
 /* OP_WRITE moves one pseudo register to another.
  * MISC(0) holds the destination pseudo register, which must be an OP_DECL.
  * RHS(0) holds the psuedo to move.


@@ -552,10 +552,10 @@ struct token {
  * The value represented by an OP_TUPLE is held in N registers.
  * LHS(0..N-1) refer to those registers.
  * ->use is a list of statements that use the value.
  * The value represented by an OP_TUPLE is held in N registers.
  * LHS(0..N-1) refer to those registers.
  * ->use is a list of statements that use the value.

- * 
+ *

  * Although OP_TUPLE always has register sized pieces they are not
  * used until structures are flattened/decomposed into their register
  * Although OP_TUPLE always has register sized pieces they are not
  * used until structures are flattened/decomposed into their register

- * components. 
+ * components.

  * ???? registers ????
  */
 
  * ???? registers ????
  */
 


@@ -569,10 +569,10 @@ struct token {
 
 
 #define OP_FCALL     72
 
 
 #define OP_FCALL     72

-/* OP_FCALL performs a procedure call. 
+/* OP_FCALL performs a procedure call.

  * MISC(0) holds a pointer to the OP_LIST of a function
  * RHS(x) holds argument x of a function
  * MISC(0) holds a pointer to the OP_LIST of a function
  * RHS(x) holds argument x of a function

- * 
+ *

  * Currently not seen outside of expressions.
  */
 #define OP_PROG      73
  * Currently not seen outside of expressions.
  */
 #define OP_PROG      73


@@ -622,16 +622,16 @@ struct token {
  * ->use is the list of all branches that use this label.
  */
 
  * ->use is the list of all branches that use this label.
  */
 

-#define OP_ADECL     87 
+#define OP_ADECL     87

 /* OP_ADECL is a triple that establishes an lvalue for assignments.
  * A variable takes N registers to contain.
  * LHS(0..N-1) refer to an OP_PIECE triple that represents
  * the Xth register that the variable is stored in.
  * ->use is a list of statements that use the variable.
 /* OP_ADECL is a triple that establishes an lvalue for assignments.
  * A variable takes N registers to contain.
  * LHS(0..N-1) refer to an OP_PIECE triple that represents
  * the Xth register that the variable is stored in.
  * ->use is a list of statements that use the variable.

- * 
+ *

  * Although OP_ADECL always has register sized pieces they are not
  * used until structures are flattened/decomposed into their register
  * Although OP_ADECL always has register sized pieces they are not
  * used until structures are flattened/decomposed into their register

- * components. 
+ * components.

  */
 
 #define OP_SDECL     88
  */
 
 #define OP_SDECL     88


@@ -643,12 +643,12 @@ struct token {
 
 
 #define OP_PHI       89
 
 
 #define OP_PHI       89

-/* OP_PHI is a triple used in SSA form code.  
+/* OP_PHI is a triple used in SSA form code.

  * It is used when multiple code paths merge and a variable needs
  * a single assignment from any of those code paths.
  * The operation is a cross between OP_DECL and OP_WRITE, which
  * is what OP_PHI is generated from.
  * It is used when multiple code paths merge and a variable needs
  * a single assignment from any of those code paths.
  * The operation is a cross between OP_DECL and OP_WRITE, which
  * is what OP_PHI is generated from.

- * 
+ *

  * RHS(x) points to the value from code path x
  * The number of RHS entries is the number of control paths into the block
  * in which OP_PHI resides.  The elements of the array point to point
  * RHS(x) points to the value from code path x
  * The number of RHS entries is the number of control paths into the block
  * in which OP_PHI resides.  The elements of the array point to point


@@ -661,12 +661,12 @@ struct token {
 /* continuation helpers
  */
 #define OP_CPS_BRANCH    90 /* an unconditional branch */
 /* continuation helpers
  */
 #define OP_CPS_BRANCH    90 /* an unconditional branch */

-/* OP_CPS_BRANCH calls a continuation 
+/* OP_CPS_BRANCH calls a continuation

  * RHS(x) holds argument x of the function
  * TARG(0) holds OP_CPS_START target
  */
 #define OP_CPS_CBRANCH   91  /* a conditional branch */
  * RHS(x) holds argument x of the function
  * TARG(0) holds OP_CPS_START target
  */
 #define OP_CPS_CBRANCH   91  /* a conditional branch */

-/* OP_CPS_CBRANCH conditionally calls one of two continuations 
+/* OP_CPS_CBRANCH conditionally calls one of two continuations

  * RHS(0) holds the branch condition
  * RHS(x + 1) holds argument x of the function
  * TARG(0) holds the OP_CPS_START to jump to when true
  * RHS(0) holds the branch condition
  * RHS(x + 1) holds argument x of the function
  * TARG(0) holds the OP_CPS_START to jump to when true


@@ -680,7 +680,7 @@ struct token {
  * ->next holds where the OP_CPS_RET will return to.
  */
 #define OP_CPS_RET       93
  * ->next holds where the OP_CPS_RET will return to.
  */
 #define OP_CPS_RET       93

-/* OP_CPS_RET conditionally calls one of two continuations 
+/* OP_CPS_RET conditionally calls one of two continuations

  * RHS(0) holds the variable with the return function address
  * RHS(x + 1) holds argument x of the function
  * The branch target may be any OP_CPS_START
  * RHS(0) holds the variable with the return function address
  * RHS(x + 1) holds argument x of the function
  * The branch target may be any OP_CPS_START


@@ -821,7 +821,7 @@ static const struct op_info table_ops[] = {
 [OP_CONVERT    ] = OP( 0,  1, 0, 0, PURE | DEF | BLOCK, "convert"),
 [OP_PIECE      ] = OP( 0,  0, 1, 0, PURE | DEF | STRUCTURAL | PART, "piece"),
 [OP_ASM        ] = OP(-1, -1, 0, 0, PURE, "asm"),
 [OP_CONVERT    ] = OP( 0,  1, 0, 0, PURE | DEF | BLOCK, "convert"),
 [OP_PIECE      ] = OP( 0,  0, 1, 0, PURE | DEF | STRUCTURAL | PART, "piece"),
 [OP_ASM        ] = OP(-1, -1, 0, 0, PURE, "asm"),

-[OP_DEREF      ] = OP( 0,  1, 0, 0, 0 | DEF | BLOCK, "deref"), 
+[OP_DEREF      ] = OP( 0,  1, 0, 0, 0 | DEF | BLOCK, "deref"),

 [OP_DOT        ] = OP( 0,  0, 1, 0, PURE | DEF | PART, "dot"),
 [OP_INDEX      ] = OP( 0,  0, 1, 0, PURE | DEF | PART, "index"),
 
 [OP_DOT        ] = OP( 0,  0, 1, 0, PURE | DEF | PART, "dot"),
 [OP_INDEX      ] = OP( 0,  0, 1, 0, PURE | DEF | PART, "index"),
 


@@ -892,7 +892,7 @@ static const struct op_info table_ops[] = {
 #undef OP
 #define OP_MAX      (sizeof(table_ops)/sizeof(table_ops[0]))
 
 #undef OP
 #define OP_MAX      (sizeof(table_ops)/sizeof(table_ops[0]))
 

-static const char *tops(int index) 
+static const char *tops(int index)

 {
        static const char unknown[] = "unknown op";
        if (index < 0) {
 {
        static const char unknown[] = "unknown op";
        if (index < 0) {


@@ -1003,7 +1003,7 @@ struct block {
        struct block_set *ipdomfrontier;
        struct block *ipdom;
        int vertex;
        struct block_set *ipdomfrontier;
        struct block *ipdom;
        int vertex;

-       
+

 };
 
 struct symbol {
 };
 
 struct symbol {


@@ -1179,11 +1179,11 @@ struct compile_state {
  * make up the union.
  * type->elements hold the length of the linked list
  */
  * make up the union.
  * type->elements hold the length of the linked list
  */

-#define TYPE_POINTER  0x1200 
+#define TYPE_POINTER  0x1200

 /* For TYPE_POINTER:
  * type->left holds the type pointed to.
  */
 /* For TYPE_POINTER:
  * type->left holds the type pointed to.
  */

-#define TYPE_FUNCTION 0x1300 
+#define TYPE_FUNCTION 0x1300

 /* For TYPE_FUNCTION:
  * type->left holds the return type.
  * type->right holds the type of the arguments
 /* For TYPE_FUNCTION:
  * type->left holds the return type.
  * type->right holds the type of the arguments


@@ -1205,7 +1205,7 @@ struct compile_state {
  * type->elements holds the number of elements.
  */
 #define TYPE_TUPLE    0x1900
  * type->elements holds the number of elements.
  */
 #define TYPE_TUPLE    0x1900

-/* TYPE_TUPLE is a basic building block when defining 
+/* TYPE_TUPLE is a basic building block when defining

  * positionally reference type conglomerations. (i.e. closures)
  * In essence it is a wrapper for TYPE_PRODUCT, like TYPE_STRUCT
  * except it has no field names.
  * positionally reference type conglomerations. (i.e. closures)
  * In essence it is a wrapper for TYPE_PRODUCT, like TYPE_STRUCT
  * except it has no field names.


@@ -1214,7 +1214,7 @@ struct compile_state {
  * type->elements hold the number of elements in the closure.
  */
 #define TYPE_JOIN     0x1a00
  * type->elements hold the number of elements in the closure.
  */
 #define TYPE_JOIN     0x1a00

-/* TYPE_JOIN is a basic building block when defining 
+/* TYPE_JOIN is a basic building block when defining

  * positionally reference type conglomerations. (i.e. closures)
  * In essence it is a wrapper for TYPE_OVERLAP, like TYPE_UNION
  * except it has no field names.
  * positionally reference type conglomerations. (i.e. closures)
  * In essence it is a wrapper for TYPE_OVERLAP, like TYPE_UNION
  * except it has no field names.


@@ -1307,9 +1307,9 @@ static struct reg_info arch_reg_constraint(
        struct compile_state *state, struct type *type, const char *constraint);
 static struct reg_info arch_reg_clobber(
        struct compile_state *state, const char *clobber);
        struct compile_state *state, struct type *type, const char *constraint);
 static struct reg_info arch_reg_clobber(
        struct compile_state *state, const char *clobber);

-static struct reg_info arch_reg_lhs(struct compile_state *state, 
+static struct reg_info arch_reg_lhs(struct compile_state *state,

        struct triple *ins, int index);
        struct triple *ins, int index);

-static struct reg_info arch_reg_rhs(struct compile_state *state, 
+static struct reg_info arch_reg_rhs(struct compile_state *state,

        struct triple *ins, int index);
 static int arch_reg_size(int reg);
 static struct triple *transform_to_arch_instruction(
        struct triple *ins, int index);
 static int arch_reg_size(int reg);
 static struct triple *transform_to_arch_instruction(


@@ -1490,9 +1490,9 @@ static int set_arg(
        }
        return result;
 }
        }
        return result;
 }

-       

 
 

-static void flag_usage(FILE *fp, const struct compiler_flag *ptr, 
+
+static void flag_usage(FILE *fp, const struct compiler_flag *ptr,

        const char *prefix, const char *invert_prefix)
 {
        for(;ptr->name; ptr++) {
        const char *prefix, const char *invert_prefix)
 {
        for(;ptr->name; ptr++) {


@@ -1509,7 +1509,7 @@ static void arg_usage(FILE *fp, const struct compiler_arg *ptr,
        for(;ptr->name; ptr++) {
                const struct compiler_flag *flag;
                for(flag = &ptr->flags[0]; flag->name; flag++) {
        for(;ptr->name; ptr++) {
                const struct compiler_flag *flag;
                for(flag = &ptr->flags[0]; flag->name; flag++) {

-                       fprintf(fp, "%s%s=%s\n", 
+                       fprintf(fp, "%s%s=%s\n",

                                prefix, ptr->name, flag->name);
                }
        }
                                prefix, ptr->name, flag->name);
                }
        }


@@ -1522,7 +1522,7 @@ static int append_string(size_t *max, const char ***vec, const char *str,
        count = ++(*max);
        *vec = xrealloc(*vec, sizeof(char *)*count, "name");
        (*vec)[count -1] = 0;
        count = ++(*max);
        *vec = xrealloc(*vec, sizeof(char *)*count, "name");
        (*vec)[count -1] = 0;

-       (*vec)[count -2] = str; 
+       (*vec)[count -2] = str;

        return 0;
 }
 
        return 0;
 }
 


@@ -1553,7 +1553,7 @@ static int append_define(struct compiler_state *compiler, const char *str)
        rest = identifier(str, end);
        if (rest != end) {
                int len = end - str - 1;
        rest = identifier(str, end);
        if (rest != end) {
                int len = end - str - 1;

-               arg_error("Invalid name cannot define macro: `%*.*s'\n", 
+               arg_error("Invalid name cannot define macro: `%*.*s'\n",

                        len, len, str);
        }
        result = append_string(&compiler->define_count,
                        len, len, str);
        }
        result = append_string(&compiler->define_count,


@@ -1570,7 +1570,7 @@ static int append_undef(struct compiler_state *compiler, const char *str)
        rest = identifier(str, end);
        if (rest != end) {
                int len = end - str - 1;
        rest = identifier(str, end);
        if (rest != end) {
                int len = end - str - 1;

-               arg_error("Invalid name cannot undefine macro: `%*.*s'\n", 
+               arg_error("Invalid name cannot undefine macro: `%*.*s'\n",

                        len, len, str);
        }
        result = append_string(&compiler->undef_count,
                        len, len, str);
        }
        result = append_string(&compiler->undef_count,


@@ -1742,7 +1742,7 @@ static int get_col(struct file_state *file)
        for(col = 0; ptr < end; ptr++) {
                if (*ptr != '\t') {
                        col++;
        for(col = 0; ptr < end; ptr++) {
                if (*ptr != '\t') {
                        col++;

-               } 
+               }

                else {
                        col = (col & ~7) + 8;
                }
                else {
                        col = (col & ~7) + 8;
                }


@@ -1756,7 +1756,7 @@ static void loc(FILE *fp, struct compile_state *state, struct triple *triple)
        if (triple && triple->occurance) {
                struct occurance *spot;
                for(spot = triple->occurance; spot; spot = spot->parent) {
        if (triple && triple->occurance) {
                struct occurance *spot;
                for(spot = triple->occurance; spot; spot = spot->parent) {

-                       fprintf(fp, "%s:%d.%d: ", 
+                       fprintf(fp, "%s:%d.%d: ",

                                spot->filename, spot->line, spot->col);
                }
                return;
                                spot->filename, spot->line, spot->col);
                }
                return;


@@ -1765,11 +1765,11 @@ static void loc(FILE *fp, struct compile_state *state, struct triple *triple)
                return;
        }
        col = get_col(state->file);
                return;
        }
        col = get_col(state->file);

-       fprintf(fp, "%s:%d.%d: ", 
+       fprintf(fp, "%s:%d.%d: ",

                state->file->report_name, state->file->report_line, col);
 }
 
                state->file->report_name, state->file->report_line, col);
 }
 

-static void __attribute__ ((noreturn)) internal_error(struct compile_state *state, struct triple *ptr, 
+static void __attribute__ ((noreturn)) internal_error(struct compile_state *state, struct triple *ptr,

        const char *fmt, ...)
 {
        FILE *fp = state->errout;
        const char *fmt, ...)
 {
        FILE *fp = state->errout;


@@ -1789,7 +1789,7 @@ static void __attribute__ ((noreturn)) internal_error(struct compile_state *stat
 }
 
 
 }
 
 

-static void internal_warning(struct compile_state *state, struct triple *ptr, 
+static void internal_warning(struct compile_state *state, struct triple *ptr,

        const char *fmt, ...)
 {
        FILE *fp = state->errout;
        const char *fmt, ...)
 {
        FILE *fp = state->errout;


@@ -1807,7 +1807,7 @@ static void internal_warning(struct compile_state *state, struct triple *ptr,
 
 
 
 
 
 

-static void __attribute__ ((noreturn)) error(struct compile_state *state, struct triple *ptr, 
+static void __attribute__ ((noreturn)) error(struct compile_state *state, struct triple *ptr,

        const char *fmt, ...)
 {
        FILE *fp = state->errout;
        const char *fmt, ...)
 {
        FILE *fp = state->errout;


@@ -1828,14 +1828,14 @@ static void __attribute__ ((noreturn)) error(struct compile_state *state, struct
        exit(1);
 }
 
        exit(1);
 }
 

-static void warning(struct compile_state *state, struct triple *ptr, 
+static void warning(struct compile_state *state, struct triple *ptr,

        const char *fmt, ...)
 {
        FILE *fp = state->errout;
        va_list args;
        va_start(args, fmt);
        loc(fp, state, ptr);
        const char *fmt, ...)
 {
        FILE *fp = state->errout;
        va_list args;
        va_start(args, fmt);
        loc(fp, state, ptr);

-       fprintf(fp, "warning: "); 
+       fprintf(fp, "warning: ");

        if (ptr && (state->compiler->debug & DEBUG_ABORT_ON_ERROR)) {
                fprintf(fp, "%p %-10s ", ptr, tops(ptr->op));
        }
        if (ptr && (state->compiler->debug & DEBUG_ABORT_ON_ERROR)) {
                fprintf(fp, "%p %-10s ", ptr, tops(ptr->op));
        }


@@ -1903,7 +1903,7 @@ static void use_triple(struct triple *used, struct triple *user)
                }
                ptr = &(*ptr)->next;
        }
                }
                ptr = &(*ptr)->next;
        }

-       /* Append new to the head of the list, 
+       /* Append new to the head of the list,

         * copy_func and rename_block_variables
         * depends on this.
         */
         * copy_func and rename_block_variables
         * depends on this.
         */


@@ -1978,7 +1978,7 @@ static struct occurance *new_occurance(struct compile_state *state)
                (last->line == line) &&
                (last->function == function) &&
                ((last->filename == filename) ||
                (last->line == line) &&
                (last->function == function) &&
                ((last->filename == filename) ||

-                       (strcmp(last->filename, filename) == 0))) 
+                       (strcmp(last->filename, filename) == 0)))

        {
                get_occurance(last);
                return last;
        {
                get_occurance(last);
                return last;


@@ -2074,7 +2074,7 @@ static struct triple unknown_triple = {
 
 static size_t registers_of(struct compile_state *state, struct type *type);
 
 
 static size_t registers_of(struct compile_state *state, struct type *type);
 

-static struct triple *alloc_triple(struct compile_state *state, 
+static struct triple *alloc_triple(struct compile_state *state,

        int op, struct type *type, int lhs_wanted, int rhs_wanted,
        struct occurance *occurance)
 {
        int op, struct type *type, int lhs_wanted, int rhs_wanted,
        struct occurance *occurance)
 {


@@ -2174,7 +2174,7 @@ static struct triple *copy_triple(struct compile_state *state, struct triple *sr
        return copy;
 }
 
        return copy;
 }
 

-static struct triple *new_triple(struct compile_state *state, 
+static struct triple *new_triple(struct compile_state *state,

        int op, struct type *type, int lhs, int rhs)
 {
        struct triple *ret;
        int op, struct type *type, int lhs, int rhs)
 {
        struct triple *ret;


@@ -2184,7 +2184,7 @@ static struct triple *new_triple(struct compile_state *state,
        return ret;
 }
 
        return ret;
 }
 

-static struct triple *build_triple(struct compile_state *state, 
+static struct triple *build_triple(struct compile_state *state,

        int op, struct type *type, struct triple *left, struct triple *right,
        struct occurance *occurance)
 {
        int op, struct type *type, struct triple *left, struct triple *right,
        struct occurance *occurance)
 {


@@ -2201,7 +2201,7 @@ static struct triple *build_triple(struct compile_state *state,
        return ret;
 }
 
        return ret;
 }
 

-static struct triple *triple(struct compile_state *state, 
+static struct triple *triple(struct compile_state *state,

        int op, struct type *type, struct triple *left, struct triple *right)
 {
        struct triple *ret;
        int op, struct type *type, struct triple *left, struct triple *right)
 {
        struct triple *ret;


@@ -2217,7 +2217,7 @@ static struct triple *triple(struct compile_state *state,
        return ret;
 }
 
        return ret;
 }
 

-static struct triple *branch(struct compile_state *state, 
+static struct triple *branch(struct compile_state *state,

        struct triple *targ, struct triple *test)
 {
        struct triple *ret;
        struct triple *targ, struct triple *test)
 {
        struct triple *ret;


@@ -2260,7 +2260,7 @@ static void insert_triple(struct compile_state *state,
 
 static int triple_stores_block(struct compile_state *state, struct triple *ins)
 {
 
 static int triple_stores_block(struct compile_state *state, struct triple *ins)
 {

-       /* This function is used to determine if u.block 
+       /* This function is used to determine if u.block

         * is utilized to store the current block number.
         */
        int stores_block;
         * is utilized to store the current block number.
         */
        int stores_block;


@@ -2270,7 +2270,7 @@ static int triple_stores_block(struct compile_state *state, struct triple *ins)
 }
 
 static int triple_is_branch(struct compile_state *state, struct triple *ins);
 }
 
 static int triple_is_branch(struct compile_state *state, struct triple *ins);

-static struct block *block_of_triple(struct compile_state *state, 
+static struct block *block_of_triple(struct compile_state *state,

        struct triple *ins)
 {
        struct triple *first;
        struct triple *ins)
 {
        struct triple *first;


@@ -2279,8 +2279,8 @@ static struct block *block_of_triple(struct compile_state *state,
        }
        first = state->first;
        while(ins != first && !triple_is_branch(state, ins->prev) &&
        }
        first = state->first;
        while(ins != first && !triple_is_branch(state, ins->prev) &&

-               !triple_stores_block(state, ins)) 
-       { 
+               !triple_stores_block(state, ins))
+       {

                if (ins == ins->prev) {
                        internal_error(state, ins, "ins == ins->prev?");
                }
                if (ins == ins->prev) {
                        internal_error(state, ins, "ins == ins->prev?");
                }


@@ -2456,30 +2456,30 @@ static void display_triple(FILE *fp, struct triple *ins)
        }
        else if (ins->op == OP_INTCONST) {
                fprintf(fp, "(%p) %c%c%c %-7s %-2d %-10s <0x%08lx>         ",
        }
        else if (ins->op == OP_INTCONST) {
                fprintf(fp, "(%p) %c%c%c %-7s %-2d %-10s <0x%08lx>         ",

-                       ins, pre, post, vol, reg, ins->template_id, tops(ins->op), 
+                       ins, pre, post, vol, reg, ins->template_id, tops(ins->op),

                        (unsigned long)(ins->u.cval));
        }
        else if (ins->op == OP_ADDRCONST) {
                fprintf(fp, "(%p) %c%c%c %-7s %-2d %-10s %-10p <0x%08lx>",
                        (unsigned long)(ins->u.cval));
        }
        else if (ins->op == OP_ADDRCONST) {
                fprintf(fp, "(%p) %c%c%c %-7s %-2d %-10s %-10p <0x%08lx>",

-                       ins, pre, post, vol, reg, ins->template_id, tops(ins->op), 
+                       ins, pre, post, vol, reg, ins->template_id, tops(ins->op),

                        MISC(ins, 0), (unsigned long)(ins->u.cval));
        }
        else if (ins->op == OP_INDEX) {
                fprintf(fp, "(%p) %c%c%c %-7s %-2d %-10s %-10p <0x%08lx>",
                        MISC(ins, 0), (unsigned long)(ins->u.cval));
        }
        else if (ins->op == OP_INDEX) {
                fprintf(fp, "(%p) %c%c%c %-7s %-2d %-10s %-10p <0x%08lx>",

-                       ins, pre, post, vol, reg, ins->template_id, tops(ins->op), 
+                       ins, pre, post, vol, reg, ins->template_id, tops(ins->op),

                        RHS(ins, 0), (unsigned long)(ins->u.cval));
        }
        else if (ins->op == OP_PIECE) {
                fprintf(fp, "(%p) %c%c%c %-7s %-2d %-10s %-10p <0x%08lx>",
                        RHS(ins, 0), (unsigned long)(ins->u.cval));
        }
        else if (ins->op == OP_PIECE) {
                fprintf(fp, "(%p) %c%c%c %-7s %-2d %-10s %-10p <0x%08lx>",

-                       ins, pre, post, vol, reg, ins->template_id, tops(ins->op), 
+                       ins, pre, post, vol, reg, ins->template_id, tops(ins->op),

                        MISC(ins, 0), (unsigned long)(ins->u.cval));
        }
        else {
                int i, count;
                        MISC(ins, 0), (unsigned long)(ins->u.cval));
        }
        else {
                int i, count;

-               fprintf(fp, "(%p) %c%c%c %-7s %-2d %-10s", 
+               fprintf(fp, "(%p) %c%c%c %-7s %-2d %-10s",

                        ins, pre, post, vol, reg, ins->template_id, tops(ins->op));
                if (table_ops[ins->op].flags & BITFIELD) {
                        ins, pre, post, vol, reg, ins->template_id, tops(ins->op));
                if (table_ops[ins->op].flags & BITFIELD) {

-                       fprintf(fp, " <%2d-%2d:%2d>", 
+                       fprintf(fp, " <%2d-%2d:%2d>",

                                ins->u.bitfield.offset,
                                ins->u.bitfield.offset + ins->u.bitfield.size,
                                ins->u.bitfield.size);
                                ins->u.bitfield.offset,
                                ins->u.bitfield.offset + ins->u.bitfield.size,
                                ins->u.bitfield.size);


@@ -2509,9 +2509,9 @@ static void display_triple(FILE *fp, struct triple *ins)
                fprintf(fp, " @");
                for(ptr = ins->occurance; ptr; ptr = ptr->parent) {
                        fprintf(fp, " %s,%s:%d.%d",
                fprintf(fp, " @");
                for(ptr = ins->occurance; ptr; ptr = ptr->parent) {
                        fprintf(fp, " %s,%s:%d.%d",

-                               ptr->function, 
+                               ptr->function,

                                ptr->filename,
                                ptr->filename,

-                               ptr->line, 
+                               ptr->line,

                                ptr->col);
                }
                if (ins->op == OP_ASM) {
                                ptr->col);
                }
                if (ins->op == OP_ASM) {


@@ -2532,9 +2532,9 @@ static void display_triple_changes(
        orig_count = TRIPLE_SIZE(orig);
        if ((new->op != orig->op) ||
                (new_count != orig_count) ||
        orig_count = TRIPLE_SIZE(orig);
        if ((new->op != orig->op) ||
                (new_count != orig_count) ||

-               (memcmp(orig->param, new->param,        
+               (memcmp(orig->param, new->param,

                        orig_count * sizeof(orig->param[0])) != 0) ||
                        orig_count * sizeof(orig->param[0])) != 0) ||

-               (memcmp(&orig->u, &new->u, sizeof(orig->u)) != 0)) 
+               (memcmp(&orig->u, &new->u, sizeof(orig->u)) != 0))

        {
                struct occurance *ptr;
                int i, min_count, indent;
        {
                struct occurance *ptr;
                int i, min_count, indent;


@@ -2542,7 +2542,7 @@ static void display_triple_changes(
                if (orig->op == new->op) {
                        fprintf(fp, " %-11s", tops(orig->op));
                } else {
                if (orig->op == new->op) {
                        fprintf(fp, " %-11s", tops(orig->op));
                } else {

-                       fprintf(fp, " [%-10s %-10s]", 
+                       fprintf(fp, " [%-10s %-10s]",

                                tops(new->op), tops(orig->op));
                }
                min_count = new_count;
                                tops(new->op), tops(orig->op));
                }
                min_count = new_count;


@@ -2551,12 +2551,12 @@ static void display_triple_changes(
                }
                for(indent = i = 0; i < min_count; i++) {
                        if (orig->param[i] == new->param[i]) {
                }
                for(indent = i = 0; i < min_count; i++) {
                        if (orig->param[i] == new->param[i]) {

-                               fprintf(fp, " %-11p", 
+                               fprintf(fp, " %-11p",

                                        orig->param[i]);
                                indent += 12;
                        } else {
                                fprintf(fp, " [%-10p %-10p]",
                                        orig->param[i]);
                                indent += 12;
                        } else {
                                fprintf(fp, " [%-10p %-10p]",

-                                       new->param[i], 
+                                       new->param[i],

                                        orig->param[i]);
                                indent += 24;
                        }
                                        orig->param[i]);
                                indent += 24;
                        }


@@ -2571,7 +2571,7 @@ static void display_triple_changes(
                }
                if ((new->op == OP_INTCONST)||
                        (new->op == OP_ADDRCONST)) {
                }
                if ((new->op == OP_INTCONST)||
                        (new->op == OP_ADDRCONST)) {

-                       fprintf(fp, " <0x%08lx>", 
+                       fprintf(fp, " <0x%08lx>",

                                (unsigned long)(new->u.cval));
                        indent += 13;
                }
                                (unsigned long)(new->u.cval));
                        indent += 13;
                }


@@ -2592,11 +2592,11 @@ static void display_triple_changes(
                fprintf(fp, " @");
                for(ptr = orig->occurance; ptr; ptr = ptr->parent) {
                        fprintf(fp, " %s,%s:%d.%d",
                fprintf(fp, " @");
                for(ptr = orig->occurance; ptr; ptr = ptr->parent) {
                        fprintf(fp, " %s,%s:%d.%d",

-                               ptr->function, 
+                               ptr->function,

                                ptr->filename,
                                ptr->filename,

-                               ptr->line, 
+                               ptr->line,

                                ptr->col);
                                ptr->col);

-                       
+

                }
                fprintf(fp, "\n");
                fflush(fp);
                }
                fprintf(fp, "\n");
                fflush(fp);


@@ -2606,7 +2606,7 @@ static void display_triple_changes(
 static int triple_is_pure(struct compile_state *state, struct triple *ins, unsigned id)
 {
        /* Does the triple have no side effects.
 static int triple_is_pure(struct compile_state *state, struct triple *ins, unsigned id)
 {
        /* Does the triple have no side effects.

-        * I.e. Rexecuting the triple with the same arguments 
+        * I.e. Rexecuting the triple with the same arguments

         * gives the same value.
         */
        unsigned pure;
         * gives the same value.
         */
        unsigned pure;


@@ -2619,7 +2619,7 @@ static int triple_is_pure(struct compile_state *state, struct triple *ins, unsig
        return (pure == PURE) && !(id & TRIPLE_FLAG_VOLATILE);
 }
 
        return (pure == PURE) && !(id & TRIPLE_FLAG_VOLATILE);
 }
 

-static int triple_is_branch_type(struct compile_state *state, 
+static int triple_is_branch_type(struct compile_state *state,

        struct triple *ins, unsigned type)
 {
        /* Is this one of the passed branch types? */
        struct triple *ins, unsigned type)
 {
        /* Is this one of the passed branch types? */


@@ -2660,7 +2660,7 @@ static int triple_is_ret(struct compile_state *state, struct triple *ins)
        /* Is this triple a return instruction? */
        return triple_is_branch_type(state, ins, RETBRANCH);
 }
        /* Is this triple a return instruction? */
        return triple_is_branch_type(state, ins, RETBRANCH);
 }

- 
+

 #if DEBUG_ROMCC_WARNING
 static int triple_is_simple_ubranch(struct compile_state *state, struct triple *ins)
 {
 #if DEBUG_ROMCC_WARNING
 static int triple_is_simple_ubranch(struct compile_state *state, struct triple *ins)
 {


@@ -2741,27 +2741,27 @@ static struct triple **triple_iter(struct compile_state *state,
                }
        }
        return ret;
                }
        }
        return ret;

-       
+

 }
 
 static struct triple **triple_lhs(struct compile_state *state,
        struct triple *ins, struct triple **last)
 {
 }
 
 static struct triple **triple_lhs(struct compile_state *state,
        struct triple *ins, struct triple **last)
 {

-       return triple_iter(state, ins->lhs, &LHS(ins,0), 
+       return triple_iter(state, ins->lhs, &LHS(ins,0),

                ins, last);
 }
 
 static struct triple **triple_rhs(struct compile_state *state,
        struct triple *ins, struct triple **last)
 {
                ins, last);
 }
 
 static struct triple **triple_rhs(struct compile_state *state,
        struct triple *ins, struct triple **last)
 {

-       return triple_iter(state, ins->rhs, &RHS(ins,0), 
+       return triple_iter(state, ins->rhs, &RHS(ins,0),

                ins, last);
 }
 
 static struct triple **triple_misc(struct compile_state *state,
        struct triple *ins, struct triple **last)
 {
                ins, last);
 }
 
 static struct triple **triple_misc(struct compile_state *state,
        struct triple *ins, struct triple **last)
 {

-       return triple_iter(state, ins->misc, &MISC(ins,0), 
+       return triple_iter(state, ins->misc, &MISC(ins,0),

                ins, last);
 }
 
                ins, last);
 }
 


@@ -2829,7 +2829,7 @@ static struct triple **triple_targ(struct compile_state *state,
 static struct triple **triple_edge_targ(struct compile_state *state,
        struct triple *ins, struct triple **last)
 {
 static struct triple **triple_edge_targ(struct compile_state *state,
        struct triple *ins, struct triple **last)
 {

-       return do_triple_targ(state, ins, last, 
+       return do_triple_targ(state, ins, last,

                state->functions_joined, !state->functions_joined);
 }
 
                state->functions_joined, !state->functions_joined);
 }
 


@@ -2860,7 +2860,7 @@ static struct triple *after_lhs(struct compile_state *state, struct triple *ins)
 }
 
 /* Function piece accessor functions */
 }
 
 /* Function piece accessor functions */

-static struct triple *do_farg(struct compile_state *state, 
+static struct triple *do_farg(struct compile_state *state,

        struct triple *func, unsigned index)
 {
        struct type *ftype;
        struct triple *func, unsigned index)
 {
        struct type *ftype;


@@ -2889,7 +2889,7 @@ static struct triple *fretaddr(struct compile_state *state, struct triple *func)
 {
        return do_farg(state, func, 1);
 }
 {
        return do_farg(state, func, 1);
 }

-static struct triple *farg(struct compile_state *state, 
+static struct triple *farg(struct compile_state *state,

        struct triple *func, unsigned index)
 {
        return do_farg(state, func, index + 2);
        struct triple *func, unsigned index)
 {
        return do_farg(state, func, index + 2);


@@ -2938,7 +2938,7 @@ static void verify_use(struct compile_state *state,
        }
 }
 
        }
 }
 

-static int find_rhs_use(struct compile_state *state, 
+static int find_rhs_use(struct compile_state *state,

        struct triple *user, struct triple *used)
 {
        struct triple **param;
        struct triple *user, struct triple *used)
 {
        struct triple **param;


@@ -3171,7 +3171,7 @@ static void print_blocks(struct compile_state *state, const char *func, FILE *fp
 
 #define TOK_FIRST_MACRO   TOK_MDEFINE
 #define TOK_LAST_MACRO    TOK_MENDIF
 
 #define TOK_FIRST_MACRO   TOK_MDEFINE
 #define TOK_LAST_MACRO    TOK_MENDIF

-         
+

 #define TOK_MIF           112
 #define TOK_MELSE         113
 #define TOK_MIDENT        114
 #define TOK_MIF           112
 #define TOK_MELSE         113
 #define TOK_MIDENT        114


@@ -3291,7 +3291,7 @@ static const char *tokens[] = {
 [TOK_MIF         ] = "#if",
 [TOK_MELSE       ] = "#else",
 [TOK_MIDENT      ] = "#:ident:",
 [TOK_MIF         ] = "#if",
 [TOK_MELSE       ] = "#else",
 [TOK_MIDENT      ] = "#:ident:",

-[TOK_EOL         ] = "EOL", 
+[TOK_EOL         ] = "EOL",

 [TOK_EOF         ] = "EOF",
 };
 
 [TOK_EOF         ] = "EOF",
 };
 


@@ -3315,7 +3315,7 @@ static struct hash_entry *lookup(
        unsigned int index;
        index = hash(name, name_len);
        entry = state->hash_table[index];
        unsigned int index;
        index = hash(name, name_len);
        entry = state->hash_table[index];

-       while(entry && 
+       while(entry &&

                ((entry->name_len != name_len) ||
                        (memcmp(entry->name, name, name_len) != 0))) {
                entry = entry->next;
                ((entry->name_len != name_len) ||
                        (memcmp(entry->name, name, name_len) != 0))) {
                entry = entry->next;


@@ -3345,7 +3345,7 @@ static void ident_to_keyword(struct compile_state *state, struct token *tk)
        entry = tk->ident;
        if (entry && ((entry->tok == TOK_TYPE_NAME) ||
                (entry->tok == TOK_ENUM_CONST) ||
        entry = tk->ident;
        if (entry && ((entry->tok == TOK_TYPE_NAME) ||
                (entry->tok == TOK_ENUM_CONST) ||

-               ((entry->tok >= TOK_FIRST_KEYWORD) && 
+               ((entry->tok >= TOK_FIRST_KEYWORD) &&

                        (entry->tok <= TOK_LAST_KEYWORD)))) {
                tk->tok = entry->tok;
        }
                        (entry->tok <= TOK_LAST_KEYWORD)))) {
                tk->tok = entry->tok;
        }


@@ -3406,7 +3406,7 @@ static void symbol(
        romcc_symbol(state, ident, chain, def, type, state->scope_depth);
 }
 
        romcc_symbol(state, ident, chain, def, type, state->scope_depth);
 }
 

-static void var_symbol(struct compile_state *state, 
+static void var_symbol(struct compile_state *state,

        struct hash_entry *ident, struct triple *def)
 {
        if ((def->type->type & TYPE_MASK) == TYPE_PRODUCT) {
        struct hash_entry *ident, struct triple *def)
 {
        if ((def->type->type & TYPE_MASK) == TYPE_PRODUCT) {


@@ -3415,7 +3415,7 @@ static void var_symbol(struct compile_state *state,
        symbol(state, ident, &ident->sym_ident, def, def->type);
 }
 
        symbol(state, ident, &ident->sym_ident, def, def->type);
 }
 

-static void label_symbol(struct compile_state *state, 
+static void label_symbol(struct compile_state *state,

        struct hash_entry *ident, struct triple *label, int depth)
 {
        romcc_symbol(state, ident, &ident->sym_label, label, &void_type, depth);
        struct hash_entry *ident, struct triple *label, int depth)
 {
        romcc_symbol(state, ident, &ident->sym_label, label, &void_type, depth);


@@ -3444,7 +3444,7 @@ static void end_scope(struct compile_state *state)
        int i;
        int depth;
        /* Walk through the hash table and remove all symbols
        int i;
        int depth;
        /* Walk through the hash table and remove all symbols

-        * in the current scope. 
+        * in the current scope.

         */
        depth = state->scope_depth;
        for(i = 0; i < HASH_TABLE_SIZE; i++) {
         */
        depth = state->scope_depth;
        for(i = 0; i < HASH_TABLE_SIZE; i++) {


@@ -3527,7 +3527,7 @@ static void undef_macro(struct compile_state *state, struct hash_entry *ident)
                struct macro_arg *arg, *anext;
                macro = ident->sym_define;
                ident->sym_define = 0;
                struct macro_arg *arg, *anext;
                macro = ident->sym_define;
                ident->sym_define = 0;

-               
+

                /* Free the macro arguments... */
                anext = macro->args;
                while(anext) {
                /* Free the macro arguments... */
                anext = macro->args;
                while(anext) {


@@ -3544,8 +3544,8 @@ static void undef_macro(struct compile_state *state, struct hash_entry *ident)
        }
 }
 
        }
 }
 

-static void do_define_macro(struct compile_state *state, 
-       struct hash_entry *ident, const char *body, 
+static void do_define_macro(struct compile_state *state,
+       struct hash_entry *ident, const char *body,

        int argc, struct macro_arg *args)
 {
        struct macro *macro;
        int argc, struct macro_arg *args)
 {
        struct macro *macro;


@@ -3559,7 +3559,7 @@ static void do_define_macro(struct compile_state *state,
                int identical_bodies, identical_args;
                struct macro_arg *oarg;
                /* Explicitly allow identical redfinitions of the same macro */
                int identical_bodies, identical_args;
                struct macro_arg *oarg;
                /* Explicitly allow identical redfinitions of the same macro */

-               identical_bodies = 
+               identical_bodies =

                        (macro->buf_len == body_len) &&
                        (memcmp(macro->buf, body, body_len) == 0);
                identical_args = macro->argc == argc;
                        (macro->buf_len == body_len) &&
                        (memcmp(macro->buf, body, body_len) == 0);
                identical_args = macro->argc == argc;


@@ -3589,7 +3589,7 @@ static void do_define_macro(struct compile_state *state,
 
        ident->sym_define = macro;
 }
 
        ident->sym_define = macro;
 }

-       
+

 static void define_macro(
        struct compile_state *state,
        struct hash_entry *ident,
 static void define_macro(
        struct compile_state *state,
        struct hash_entry *ident,


@@ -3641,7 +3641,7 @@ static void register_builtin_macros(struct compile_state *state)
        register_builtin_macro(state, "__STDC__", "0");
        /* In particular I don't conform to C99 */
        register_builtin_macro(state, "__STDC_VERSION__", "199901L");
        register_builtin_macro(state, "__STDC__", "0");
        /* In particular I don't conform to C99 */
        register_builtin_macro(state, "__STDC_VERSION__", "199901L");

-       
+

 }
 
 static void process_cmdline_macros(struct compile_state *state)
 }
 
 static void process_cmdline_macros(struct compile_state *state)


@@ -3688,7 +3688,7 @@ static int digitp(int c)
 {
        int ret = 0;
        switch(c) {
 {
        int ret = 0;
        switch(c) {

-       case '0': case '1': case '2': case '3': case '4': 
+       case '0': case '1': case '2': case '3': case '4':

        case '5': case '6': case '7': case '8': case '9':
                ret = 1;
                break;
        case '5': case '6': case '7': case '8': case '9':
                ret = 1;
                break;


@@ -3708,7 +3708,7 @@ static int hexdigitp(int c)
 {
        int ret = 0;
        switch(c) {
 {
        int ret = 0;
        switch(c) {

-       case '0': case '1': case '2': case '3': case '4': 
+       case '0': case '1': case '2': case '3': case '4':

        case '5': case '6': case '7': case '8': case '9':
        case 'A': case 'B': case 'C': case 'D': case 'E': case 'F':
        case 'a': case 'b': case 'c': case 'd': case 'e': case 'f':
        case '5': case '6': case '7': case '8': case '9':
        case 'A': case 'B': case 'C': case 'D': case 'E': case 'F':
        case 'a': case 'b': case 'c': case 'd': case 'e': case 'f':


@@ -3717,7 +3717,7 @@ static int hexdigitp(int c)
        }
        return ret;
 }
        }
        return ret;
 }

-static int hexdigval(int c) 
+static int hexdigval(int c)

 {
        int val = -1;
        if ((c >= '0') && (c <= '9')) {
 {
        int val = -1;
        if ((c >= '0') && (c <= '9')) {


@@ -3736,7 +3736,7 @@ static int octdigitp(int c)
 {
        int ret = 0;
        switch(c) {
 {
        int ret = 0;
        switch(c) {

-       case '0': case '1': case '2': case '3': 
+       case '0': case '1': case '2': case '3':

        case '4': case '5': case '6': case '7':
                ret = 1;
                break;
        case '4': case '5': case '6': case '7':
                ret = 1;
                break;


@@ -3809,7 +3809,7 @@ static int char_value(struct compile_state *state,
                case '?':  c = '?';  str++; break;
                case '\'': c = '\''; str++; break;
                case '"':  c = '"';  str++; break;
                case '?':  c = '?';  str++; break;
                case '\'': c = '\''; str++; break;
                case '"':  c = '"';  str++; break;

-               case 'x': 
+               case 'x':

                        c = 0;
                        str++;
                        while((str < end) && hexdigitp(*str)) {
                        c = 0;
                        str++;
                        while((str < end) && hexdigitp(*str)) {


@@ -3818,7 +3818,7 @@ static int char_value(struct compile_state *state,
                                str++;
                        }
                        break;
                                str++;
                        }
                        break;

-               case '0': case '1': case '2': case '3': 
+               case '0': case '1': case '2': case '3':

                case '4': case '5': case '6': case '7':
                        c = 0;
                        while((str < end) && octdigitp(*str)) {
                case '4': case '5': case '6': case '7':
                        c = 0;
                        while((str < end) && octdigitp(*str)) {


@@ -3845,7 +3845,7 @@ static const char *next_char(struct file_state *file, const char *pos, int index
                int c = *pos;
                /* Is this a trigraph? */
                if (file->trigraphs &&
                int c = *pos;
                /* Is this a trigraph? */
                if (file->trigraphs &&

-                       (c == '?') && ((end - pos) >= 3) && (pos[1] == '?')) 
+                       (c == '?') && ((end - pos) >= 3) && (pos[1] == '?'))

                {
                        switch(pos[2]) {
                        case '=': c = '#'; break;
                {
                        switch(pos[2]) {
                        case '=': c = '#'; break;


@@ -3899,7 +3899,7 @@ static int get_char(struct file_state *file, const char *pos)
                c = *pos;
                /* If it is a trigraph get the trigraph value */
                if (file->trigraphs &&
                c = *pos;
                /* If it is a trigraph get the trigraph value */
                if (file->trigraphs &&

-                       (c == '?') && ((end - pos) >= 3) && (pos[1] == '?')) 
+                       (c == '?') && ((end - pos) >= 3) && (pos[1] == '?'))

                {
                        switch(pos[2]) {
                        case '=': c = '#'; break;
                {
                        switch(pos[2]) {
                        case '=': c = '#'; break;


@@ -3944,7 +3944,7 @@ static size_t char_strlen(struct file_state *file, const char *src, const char *
        return len;
 }
 
        return len;
 }
 

-static void char_strcpy(char *dest, 
+static void char_strcpy(char *dest,

        struct file_state *file, const char *src, const char *end)
 {
        while(src < end) {
        struct file_state *file, const char *src, const char *end)
 {
        while(src < end) {


@@ -3955,7 +3955,7 @@ static void char_strcpy(char *dest,
        }
 }
 
        }
 }
 

-static char *char_strdup(struct file_state *file, 
+static char *char_strdup(struct file_state *file,

        const char *start, const char *end, const char *id)
 {
        char *str;
        const char *start, const char *end, const char *id)
 {
        char *str;


@@ -4015,7 +4015,7 @@ static void save_string(struct file_state *file,
        tk->str_len = strlen(str);
 }
 
        tk->str_len = strlen(str);
 }
 

-static void raw_next_token(struct compile_state *state, 
+static void raw_next_token(struct compile_state *state,

        struct file_state *file, struct token *tk)
 {
        const char *token;
        struct file_state *file, struct token *tk)
 {
        const char *token;


@@ -4052,7 +4052,7 @@ static void raw_next_token(struct compile_state *state,
                tokp = next_char(file, tokp, 1);
                while((c = get_char(file, tokp)) != -1) {
                        /* Advance to the next character only after we verify
                tokp = next_char(file, tokp, 1);
                while((c = get_char(file, tokp)) != -1) {
                        /* Advance to the next character only after we verify

-                        * the current character is not a newline.  
+                        * the current character is not a newline.

                         * EOL is special to the preprocessor so we don't
                         * want to loose any.
                         */
                         * EOL is special to the preprocessor so we don't
                         * want to loose any.
                         */


@@ -4144,12 +4144,12 @@ static void raw_next_token(struct compile_state *state,
                /* Save the character value */
                save_string(file, tk, token, tokp, "literal character");
        }
                /* Save the character value */
                save_string(file, tk, token, tokp, "literal character");
        }

-       /* integer and floating constants 
+       /* integer and floating constants

         * Integer Constants
         * {digits}
         * 0[Xx]{hexdigits}
         * 0{octdigit}+
         * Integer Constants
         * {digits}
         * 0[Xx]{hexdigits}
         * 0{octdigit}+

-        * 
+        *

          * Floating constants
         * {digits}.{digits}[Ee][+-]?{digits}
         * {digits}.{digits}
          * Floating constants
         * {digits}.{digits}[Ee][+-]?{digits}
         * {digits}.{digits}


@@ -4259,9 +4259,9 @@ static void raw_next_token(struct compile_state *state,
                }
        }
        /* C99 alternate macro characters */
                }
        }
        /* C99 alternate macro characters */

-       else if ((c == '%') && (c1 == ':') && (c2 == '%') && (c3 == ':')) { 
+       else if ((c == '%') && (c1 == ':') && (c2 == '%') && (c3 == ':')) {

                eat += 3;
                eat += 3;

-               tok = TOK_CONCATENATE; 
+               tok = TOK_CONCATENATE;

        }
        else if ((c == '.') && (c1 == '.') && (c2 == '.')) { eat += 2; tok = TOK_DOTS; }
        else if ((c == '<') && (c1 == '<') && (c2 == '=')) { eat += 2; tok = TOK_SLEQ; }
        }
        else if ((c == '.') && (c1 == '.') && (c2 == '.')) { eat += 2; tok = TOK_DOTS; }
        else if ((c == '<') && (c1 == '<') && (c2 == '=')) { eat += 2; tok = TOK_SLEQ; }


@@ -4344,7 +4344,7 @@ struct macro_arg_value {
        size_t len;
 };
 static struct macro_arg_value *read_macro_args(
        size_t len;
 };
 static struct macro_arg_value *read_macro_args(

-       struct compile_state *state, struct macro *macro, 
+       struct compile_state *state, struct macro *macro,

        struct file_state *file, struct token *tk)
 {
        struct macro_arg_value *argv;
        struct file_state *file, struct token *tk)
 {
        struct macro_arg_value *argv;


@@ -4366,15 +4366,15 @@ static struct macro_arg_value *read_macro_args(
        }
        paren_depth = 0;
        i = 0;
        }
        paren_depth = 0;
        i = 0;

-       
+

        for(;;) {
                const char *start;
                size_t len;
                start = file->pos;
                raw_next_token(state, file, tk);
        for(;;) {
                const char *start;
                size_t len;
                start = file->pos;
                raw_next_token(state, file, tk);

-               
+

                if (!paren_depth && (tk->tok == TOK_COMMA) &&
                if (!paren_depth && (tk->tok == TOK_COMMA) &&

-                       (argv[i].ident != state->i___VA_ARGS__)) 
+                       (argv[i].ident != state->i___VA_ARGS__))

                {
                        i++;
                        if (i >= macro->argc) {
                {
                        i++;
                        if (i >= macro->argc) {


@@ -4383,11 +4383,11 @@ static struct macro_arg_value *read_macro_args(
                        }
                        continue;
                }
                        }
                        continue;
                }

-               
+

                if (tk->tok == TOK_LPAREN) {
                        paren_depth++;
                }
                if (tk->tok == TOK_LPAREN) {
                        paren_depth++;
                }

-               
+

                if (tk->tok == TOK_RPAREN) {
                        if (paren_depth == 0) {
                                break;
                if (tk->tok == TOK_RPAREN) {
                        if (paren_depth == 0) {
                                break;


@@ -4405,7 +4405,7 @@ static struct macro_arg_value *read_macro_args(
                argv[i].len += len;
        }
        if (i != macro->argc -1) {
                argv[i].len += len;
        }
        if (i != macro->argc -1) {

-               error(state, 0, "missing %s arg %d\n", 
+               error(state, 0, "missing %s arg %d\n",

                        macro->ident->name, i +2);
        }
        return argv;
                        macro->ident->name, i +2);
        }
        return argv;


@@ -4467,14 +4467,14 @@ static void append_macro_chars(struct compile_state *state,
        buf->pos += flen;
 }
 
        buf->pos += flen;
 }
 

-static int compile_macro(struct compile_state *state, 
+static int compile_macro(struct compile_state *state,

        struct file_state **filep, struct token *tk);
 
        struct file_state **filep, struct token *tk);
 

-static void macro_expand_args(struct compile_state *state, 
+static void macro_expand_args(struct compile_state *state,

        struct macro *macro, struct macro_arg_value *argv, struct token *tk)
 {
        int i;
        struct macro *macro, struct macro_arg_value *argv, struct token *tk)
 {
        int i;

-       
+

        for(i = 0; i < macro->argc; i++) {
                struct file_state fmacro, *file;
                struct macro_buf buf;
        for(i = 0; i < macro->argc; i++) {
                struct file_state fmacro, *file;
                struct macro_buf buf;


@@ -4501,7 +4501,7 @@ static void macro_expand_args(struct compile_state *state,
                file = &fmacro;
                for(;;) {
                        raw_next_token(state, file, tk);
                file = &fmacro;
                for(;;) {
                        raw_next_token(state, file, tk);

-                       
+

                        /* If we have recursed into another macro body
                         * get out of it.
                         */
                        /* If we have recursed into another macro body
                         * get out of it.
                         */


@@ -4527,7 +4527,7 @@ static void macro_expand_args(struct compile_state *state,
                        append_macro_chars(state, macro->ident->name, &buf,
                                file, tk->pos, file->pos);
                }
                        append_macro_chars(state, macro->ident->name, &buf,
                                file, tk->pos, file->pos);
                }

-                       
+

                xfree(argv[i].value);
                argv[i].value = buf.str;
                argv[i].len   = buf.pos;
                xfree(argv[i].value);
                argv[i].value = buf.str;
                argv[i].len   = buf.pos;


@@ -4560,12 +4560,12 @@ static void expand_macro(struct compile_state *state,
        fmacro.macro       = 1;
        fmacro.trigraphs   = 0;
        fmacro.join_lines  = 0;
        fmacro.macro       = 1;
        fmacro.trigraphs   = 0;
        fmacro.join_lines  = 0;

-       
+

        /* Allocate a buffer to hold the macro expansion */
        buf->len = macro->buf_len + 3;
        buf->str = xmalloc(buf->len, macro->ident->name);
        buf->pos = 0;
        /* Allocate a buffer to hold the macro expansion */
        buf->len = macro->buf_len + 3;
        buf->str = xmalloc(buf->len, macro->ident->name);
        buf->pos = 0;

-       
+

        fstart = fmacro.pos;
        raw_next_token(state, &fmacro, tk);
        while(tk->tok != TOK_EOF) {
        fstart = fmacro.pos;
        raw_next_token(state, &fmacro, tk);
        while(tk->tok != TOK_EOF) {


@@ -4609,7 +4609,7 @@ static void expand_macro(struct compile_state *state,
                                if (*str == '\\') {
                                        str = "\\";
                                        len = 2;
                                if (*str == '\\') {
                                        str = "\\";
                                        len = 2;

-                               } 
+                               }

                                else if (*str == '"') {
                                        str = "\\\"";
                                        len = 2;
                                else if (*str == '"') {
                                        str = "\\\"";
                                        len = 2;


@@ -4651,7 +4651,7 @@ static void expand_macro(struct compile_state *state,
                }
 
                append_macro_text(state, macro->ident->name, buf, fstart, flen);
                }
 
                append_macro_text(state, macro->ident->name, buf, fstart, flen);

-               
+

                fstart = fmacro.pos;
                raw_next_token(state, &fmacro, tk);
        }
                fstart = fmacro.pos;
                raw_next_token(state, &fmacro, tk);
        }


@@ -4683,19 +4683,19 @@ static void tag_macro_name(struct compile_state *state,
        fmacro.macro       = 1;
        fmacro.trigraphs   = 0;
        fmacro.join_lines  = 0;
        fmacro.macro       = 1;
        fmacro.trigraphs   = 0;
        fmacro.join_lines  = 0;

-       
+

        /* Allocate a new macro expansion buffer */
        buf->len = macro->buf_len + 3;
        buf->str = xmalloc(buf->len, macro->ident->name);
        buf->pos = 0;
        /* Allocate a new macro expansion buffer */
        buf->len = macro->buf_len + 3;
        buf->str = xmalloc(buf->len, macro->ident->name);
        buf->pos = 0;

-       
+

        fstart = fmacro.pos;
        raw_next_token(state, &fmacro, tk);
        while(tk->tok != TOK_EOF) {
                flen = fmacro.pos - fstart;
                if ((tk->tok == TOK_IDENT) &&
                        (tk->ident == macro->ident) &&
        fstart = fmacro.pos;
        raw_next_token(state, &fmacro, tk);
        while(tk->tok != TOK_EOF) {
                flen = fmacro.pos - fstart;
                if ((tk->tok == TOK_IDENT) &&
                        (tk->ident == macro->ident) &&

-                       (tk->val.notmacro == 0)) 
+                       (tk->val.notmacro == 0))

                {
                        append_macro_text(state, macro->ident->name, buf, fstart, flen);
                        fstart = "$";
                {
                        append_macro_text(state, macro->ident->name, buf, fstart, flen);
                        fstart = "$";


@@ -4703,14 +4703,14 @@ static void tag_macro_name(struct compile_state *state,
                }
 
                append_macro_text(state, macro->ident->name, buf, fstart, flen);
                }
 
                append_macro_text(state, macro->ident->name, buf, fstart, flen);

-               
+

                fstart = fmacro.pos;
                raw_next_token(state, &fmacro, tk);
        }
        xfree(fmacro.buf);
 }
 
                fstart = fmacro.pos;
                raw_next_token(state, &fmacro, tk);
        }
        xfree(fmacro.buf);
 }
 

-static int compile_macro(struct compile_state *state, 
+static int compile_macro(struct compile_state *state,

        struct file_state **filep, struct token *tk)
 {
        struct file_state *file;
        struct file_state **filep, struct token *tk)
 {
        struct file_state *file;


@@ -4817,7 +4817,7 @@ static int if_value(struct compile_state *state)
        offset = state->if_depth % CHAR_BIT;
        return !!(state->if_bytes[index] & (1 << (offset)));
 }
        offset = state->if_depth % CHAR_BIT;
        return !!(state->if_bytes[index] & (1 << (offset)));
 }

-static void set_if_value(struct compile_state *state, int value) 
+static void set_if_value(struct compile_state *state, int value)

 {
        int index, offset;
        index = state->if_depth / CHAR_BIT;
 {
        int index, offset;
        index = state->if_depth / CHAR_BIT;


@@ -4880,8 +4880,8 @@ static void raw_token(struct compile_state *state, struct token *tk)
                rescan = 0;
                file = state->file;
                /* Exit out of an include directive or macro call */
                rescan = 0;
                file = state->file;
                /* Exit out of an include directive or macro call */

-               if ((tk->tok == TOK_EOF) && 
-                       (file != state->macro_file) && file->prev) 
+               if ((tk->tok == TOK_EOF) &&
+                       (file != state->macro_file) && file->prev)

                {
                        state->file = file->prev;
                        /* file->basename is used keep it */
                {
                        state->file = file->prev;
                        /* file->basename is used keep it */


@@ -4948,8 +4948,8 @@ static void token(struct compile_state *state, struct token *tk)
                                pp_token(state, tk);
                        }
                }
                                pp_token(state, tk);
                        }
                }

-               /* Eat tokens disabled by the preprocessor 
-                * (Unless we are parsing a preprocessor directive 
+               /* Eat tokens disabled by the preprocessor
+                * (Unless we are parsing a preprocessor directive

                 */
                else if (if_eat(state) && (state->token_base == 0)) {
                        pp_token(state, tk);
                 */
                else if (if_eat(state) && (state->token_base == 0)) {
                        pp_token(state, tk);


@@ -4983,7 +4983,7 @@ static struct token *do_eat_token(struct compile_state *state, int tok)
        struct token *tk;
        int i;
        check_tok(state, get_token(state, 1), tok);
        struct token *tk;
        int i;
        check_tok(state, get_token(state, 1), tok);

-       
+

        /* Free the old token value */
        tk = get_token(state, 0);
        if (tk->str_len) {
        /* Free the old token value */
        tk = get_token(state, 0);
        if (tk->str_len) {


@@ -5161,7 +5161,7 @@ static void preprocess(struct compile_state *state, struct token *current_token)
         */
        int old_token_base;
        int tok;
         */
        int old_token_base;
        int tok;

-       
+

        state->macro_file = state->file;
 
        old_token_base = state->token_base;
        state->macro_file = state->file;
 
        old_token_base = state->token_base;


@@ -5245,7 +5245,7 @@ static void preprocess(struct compile_state *state, struct token *current_token)
                pp_eat(state, TOK_MUNDEF);
                if (if_eat(state))  /* quit early when #if'd out */
                        break;
                pp_eat(state, TOK_MUNDEF);
                if (if_eat(state))  /* quit early when #if'd out */
                        break;

-               
+

                ident = pp_eat(state, TOK_MIDENT)->ident;
 
                undef_macro(state, ident);
                ident = pp_eat(state, TOK_MIDENT)->ident;
 
                undef_macro(state, ident);


@@ -5255,7 +5255,7 @@ static void preprocess(struct compile_state *state, struct token *current_token)
                pp_eat(state, TOK_MPRAGMA);
                if (if_eat(state))  /* quit early when #if'd out */
                        break;
                pp_eat(state, TOK_MPRAGMA);
                if (if_eat(state))  /* quit early when #if'd out */
                        break;

-               warning(state, 0, "Ignoring pragma"); 
+               warning(state, 0, "Ignoring pragma");

                break;
        case TOK_MELIF:
                pp_eat(state, TOK_MELIF);
                break;
        case TOK_MELIF:
                pp_eat(state, TOK_MELIF);


@@ -5266,7 +5266,7 @@ static void preprocess(struct compile_state *state, struct token *current_token)
                if (if_value(state)) {
                        eat_tokens(state, TOK_MENDIF);
                }
                if (if_value(state)) {
                        eat_tokens(state, TOK_MENDIF);
                }

-               /* If the previous #if was not taken see if the #elif enables the 
+               /* If the previous #if was not taken see if the #elif enables the

                 * trailing code.
                 */
                else {
                 * trailing code.
                 */
                else {


@@ -5358,11 +5358,11 @@ static void preprocess(struct compile_state *state, struct token *current_token)
                                else if (tok == TOK_DOTS) {
                                        pp_eat(state, TOK_DOTS);
                                        aident = state->i___VA_ARGS__;
                                else if (tok == TOK_DOTS) {
                                        pp_eat(state, TOK_DOTS);
                                        aident = state->i___VA_ARGS__;

-                               } 
+                               }

                                else {
                                        aident = pp_eat(state, TOK_MIDENT)->ident;
                                }
                                else {
                                        aident = pp_eat(state, TOK_MIDENT)->ident;
                                }

-                               
+

                                narg = xcmalloc(sizeof(*arg), "macro arg");
                                narg->ident = aident;
 
                                narg = xcmalloc(sizeof(*arg), "macro arg");
                                narg->ident = aident;
 


@@ -5404,7 +5404,7 @@ static void preprocess(struct compile_state *state, struct token *current_token)
                                mend = get_token(state, 1)->pos;
                        }
                }
                                mend = get_token(state, 1)->pos;
                        }
                }

-               
+

                /* Now that I have found the body defined the token */
                do_define_macro(state, ident,
                        char_strdup(state->file, mstart, mend, "macro buf"),
                /* Now that I have found the body defined the token */
                do_define_macro(state, ident,
                        char_strdup(state->file, mstart, mend, "macro buf"),


@@ -5415,7 +5415,7 @@ static void preprocess(struct compile_state *state, struct token *current_token)
        {
                const char *start, *end;
                int len;
        {
                const char *start, *end;
                int len;

-               
+

                pp_eat(state, TOK_MERROR);
                /* Find the start of the line */
                raw_peek(state);
                pp_eat(state, TOK_MERROR);
                /* Find the start of the line */
                raw_peek(state);


@@ -5436,13 +5436,13 @@ static void preprocess(struct compile_state *state, struct token *current_token)
        {
                const char *start, *end;
                int len;
        {
                const char *start, *end;
                int len;

-               
+

                pp_eat(state, TOK_MWARNING);
 
                /* Find the start of the line */
                raw_peek(state);
                start = get_token(state, 1)->pos;
                pp_eat(state, TOK_MWARNING);
 
                /* Find the start of the line */
                raw_peek(state);
                start = get_token(state, 1)->pos;

-                
+

                /* Find the end of the line */
                while((tok = raw_peek(state)) != TOK_EOL) {
                        raw_eat(state, tok);
                /* Find the end of the line */
                while((tok = raw_peek(state)) != TOK_EOL) {
                        raw_eat(state, tok);


@@ -5536,7 +5536,7 @@ static void preprocess(struct compile_state *state, struct token *current_token)
                if (tok == TOK_MIDENT) {
                        name2 = get_token(state, 1)->ident->name;
                }
                if (tok == TOK_MIDENT) {
                        name2 = get_token(state, 1)->ident->name;
                }

-               error(state, 0, "Invalid preprocessor directive: %s %s", 
+               error(state, 0, "Invalid preprocessor directive: %s %s",

                        name1, name2);
                break;
        }
                        name1, name2);
                break;
        }


@@ -5621,7 +5621,7 @@ static struct type *invalid_type(struct compile_state *state, struct type *type)
        case TYPE_STRUCT:
        case TYPE_TUPLE:
                member = type->left;
        case TYPE_STRUCT:
        case TYPE_TUPLE:
                member = type->left;

-               while(member && (invalid == 0) && 
+               while(member && (invalid == 0) &&

                        ((member->type & TYPE_MASK) == TYPE_PRODUCT)) {
                        invalid = invalid_type(state, member->left);
                        member = member->right;
                        ((member->type & TYPE_MASK) == TYPE_PRODUCT)) {
                        invalid = invalid_type(state, member->left);
                        member = member->right;


@@ -5647,7 +5647,7 @@ static struct type *invalid_type(struct compile_state *state, struct type *type)
                break;
        }
        return invalid;
                break;
        }
        return invalid;

-       
+

 }
 
 #define MASK_UCHAR(X)    ((X) & ((ulong_t)0xff))
 }
 
 #define MASK_UCHAR(X)    ((X) & ((ulong_t)0xff))


@@ -5682,7 +5682,7 @@ static struct type void_ptr_type  = {
 };
 
 #if DEBUG_ROMCC_WARNING
 };
 
 #if DEBUG_ROMCC_WARNING

-static struct type void_func_type = { 
+static struct type void_func_type = {

        .type  = TYPE_FUNCTION,
        .left  = &void_type,
        .right = &void_type,
        .type  = TYPE_FUNCTION,
        .left  = &void_type,
        .right = &void_type,


@@ -5815,19 +5815,19 @@ static void name_of(FILE *fp, struct type *type)
                name_of(fp, type->right);
                break;
        case TYPE_ENUM:
                name_of(fp, type->right);
                break;
        case TYPE_ENUM:

-               fprintf(fp, "enum %s", 
+               fprintf(fp, "enum %s",

                        (type->type_ident)? type->type_ident->name : "");
                qual_of(fp, type);
                break;
        case TYPE_STRUCT:
                        (type->type_ident)? type->type_ident->name : "");
                qual_of(fp, type);
                break;
        case TYPE_STRUCT:

-               fprintf(fp, "struct %s { ", 
+               fprintf(fp, "struct %s { ",

                        (type->type_ident)? type->type_ident->name : "");
                name_of(fp, type->left);
                fprintf(fp, " } ");
                qual_of(fp, type);
                break;
        case TYPE_UNION:
                        (type->type_ident)? type->type_ident->name : "");
                name_of(fp, type->left);
                fprintf(fp, " } ");
                qual_of(fp, type);
                break;
        case TYPE_UNION:

-               fprintf(fp, "union %s { ", 
+               fprintf(fp, "union %s { ",

                        (type->type_ident)? type->type_ident->name : "");
                name_of(fp, type->left);
                fprintf(fp, " } ");
                        (type->type_ident)? type->type_ident->name : "");
                name_of(fp, type->left);
                fprintf(fp, " } ");


@@ -5844,7 +5844,7 @@ static void name_of(FILE *fp, struct type *type)
                fprintf(fp, " [%ld]", (long)(type->elements));
                break;
        case TYPE_TUPLE:
                fprintf(fp, " [%ld]", (long)(type->elements));
                break;
        case TYPE_TUPLE:

-               fprintf(fp, "tuple { "); 
+               fprintf(fp, "tuple { ");

                name_of(fp, type->left);
                fprintf(fp, " } ");
                qual_of(fp, type);
                name_of(fp, type->left);
                fprintf(fp, " } ");
                qual_of(fp, type);


@@ -5991,7 +5991,7 @@ static size_t align_of_in_bytes(struct compile_state *state, struct type *type)
 static size_t size_of(struct compile_state *state, struct type *type);
 static size_t reg_size_of(struct compile_state *state, struct type *type);
 
 static size_t size_of(struct compile_state *state, struct type *type);
 static size_t reg_size_of(struct compile_state *state, struct type *type);
 

-static size_t needed_padding(struct compile_state *state, 
+static size_t needed_padding(struct compile_state *state,

        struct type *type, size_t offset)
 {
         size_t padding, align;
        struct type *type, size_t offset)
 {
         size_t padding, align;


@@ -6013,7 +6013,7 @@ static size_t needed_padding(struct compile_state *state,
        return padding;
 }
 
        return padding;
 }
 

-static size_t reg_needed_padding(struct compile_state *state, 
+static size_t reg_needed_padding(struct compile_state *state,

        struct type *type, size_t offset)
 {
         size_t padding, align;
        struct type *type, size_t offset)
 {
         size_t padding, align;


@@ -6022,7 +6022,7 @@ static size_t reg_needed_padding(struct compile_state *state,
         * fit into the current register.
         */
        if (((type->type & TYPE_MASK) == TYPE_BITFIELD) &&
         * fit into the current register.
         */
        if (((type->type & TYPE_MASK) == TYPE_BITFIELD) &&

-               (((offset + type->elements)/REG_SIZEOF_REG) != (offset/REG_SIZEOF_REG))) 
+               (((offset + type->elements)/REG_SIZEOF_REG) != (offset/REG_SIZEOF_REG)))

        {
                align = REG_SIZEOF_REG;
        }
        {
                align = REG_SIZEOF_REG;
        }


@@ -6219,7 +6219,7 @@ static size_t size_of_in_bytes(struct compile_state *state, struct type *type)
        return bits_to_bytes(size_of(state, type));
 }
 
        return bits_to_bytes(size_of(state, type));
 }
 

-static size_t field_offset(struct compile_state *state, 
+static size_t field_offset(struct compile_state *state,

        struct type *type, struct hash_entry *field)
 {
        struct type *member;
        struct type *type, struct hash_entry *field)
 {
        struct type *member;


@@ -6260,7 +6260,7 @@ static size_t field_offset(struct compile_state *state,
        return size;
 }
 
        return size;
 }
 

-static size_t field_reg_offset(struct compile_state *state, 
+static size_t field_reg_offset(struct compile_state *state,

        struct type *type, struct hash_entry *field)
 {
        struct type *member;
        struct type *type, struct hash_entry *field)
 {
        struct type *member;


@@ -6301,7 +6301,7 @@ static size_t field_reg_offset(struct compile_state *state,
        return size;
 }
 
        return size;
 }
 

-static struct type *field_type(struct compile_state *state, 
+static struct type *field_type(struct compile_state *state,

        struct type *type, struct hash_entry *field)
 {
        struct type *member;
        struct type *type, struct hash_entry *field)
 {
        struct type *member;


@@ -6330,14 +6330,14 @@ static struct type *field_type(struct compile_state *state,
        else {
                internal_error(state, 0, "field_type only works on structures and unions");
        }
        else {
                internal_error(state, 0, "field_type only works on structures and unions");
        }

-       
+

        if (!member || (member->field_ident != field)) {
                error(state, 0, "member %s not present", field->name);
        }
        return member;
 }
 
        if (!member || (member->field_ident != field)) {
                error(state, 0, "member %s not present", field->name);
        }
        return member;
 }
 

-static size_t index_offset(struct compile_state *state, 
+static size_t index_offset(struct compile_state *state,

        struct type *type, ulong_t index)
 {
        struct type *member;
        struct type *type, ulong_t index)
 {
        struct type *member;


@@ -6383,14 +6383,14 @@ static size_t index_offset(struct compile_state *state,
                }
        }
        else {
                }
        }
        else {

-               internal_error(state, 0, 
+               internal_error(state, 0,

                        "request for index %u in something not an array, tuple or join",
                        index);
        }
        return size;
 }
 
                        "request for index %u in something not an array, tuple or join",
                        index);
        }
        return size;
 }
 

-static size_t index_reg_offset(struct compile_state *state, 
+static size_t index_reg_offset(struct compile_state *state,

        struct type *type, ulong_t index)
 {
        struct type *member;
        struct type *type, ulong_t index)
 {
        struct type *member;


@@ -6417,7 +6417,7 @@ static size_t index_reg_offset(struct compile_state *state,
                if (i != index) {
                        internal_error(state, 0, "Missing member index: %u", index);
                }
                if (i != index) {
                        internal_error(state, 0, "Missing member index: %u", index);
                }

-               
+

        }
        else if ((type->type & TYPE_MASK) == TYPE_JOIN) {
                ulong_t i;
        }
        else if ((type->type & TYPE_MASK) == TYPE_JOIN) {
                ulong_t i;


@@ -6437,7 +6437,7 @@ static size_t index_reg_offset(struct compile_state *state,
                }
        }
        else {
                }
        }
        else {

-               internal_error(state, 0, 
+               internal_error(state, 0,

                        "request for index %u in something not an array, tuple or join",
                        index);
        }
                        "request for index %u in something not an array, tuple or join",
                        index);
        }


@@ -6488,7 +6488,7 @@ static struct type *index_type(struct compile_state *state,
        }
        else {
                member = 0;
        }
        else {
                member = 0;

-               internal_error(state, 0, 
+               internal_error(state, 0,

                        "request for index %u in something not an array, tuple or join",
                        index);
        }
                        "request for index %u in something not an array, tuple or join",
                        index);
        }


@@ -6713,7 +6713,7 @@ static struct type *reg_type(
                        name_of(state->errout, type);
                        fprintf(state->errout, "\n");
                        internal_error(state, 0, "reg_type not yet defined for type");
                        name_of(state->errout, type);
                        fprintf(state->errout, "\n");
                        internal_error(state, 0, "reg_type not yet defined for type");

-                       
+

                }
        }
        /* If I have a single register compound type not a bit-field
                }
        }
        /* If I have a single register compound type not a bit-field


@@ -6741,7 +6741,7 @@ static struct type *reg_type(
 }
 
 static struct type *next_field(struct compile_state *state,
 }
 
 static struct type *next_field(struct compile_state *state,

-       struct type *type, struct type *prev_member) 
+       struct type *type, struct type *prev_member)

 {
        struct type *member;
        if ((type->type & TYPE_MASK) != TYPE_STRUCT) {
 {
        struct type *member;
        if ((type->type & TYPE_MASK) != TYPE_STRUCT) {


@@ -6762,13 +6762,13 @@ static struct type *next_field(struct compile_state *state,
                prev_member = 0;
        }
        if (prev_member) {
                prev_member = 0;
        }
        if (prev_member) {

-               internal_error(state, 0, "prev_member %s not present", 
+               internal_error(state, 0, "prev_member %s not present",

                        prev_member->field_ident->name);
        }
        return member;
 }
 
                        prev_member->field_ident->name);
        }
        return member;
 }
 

-typedef void (*walk_type_fields_cb_t)(struct compile_state *state, struct type *type, 
+typedef void (*walk_type_fields_cb_t)(struct compile_state *state, struct type *type,

        size_t ret_offset, size_t mem_offset, void *arg);
 
 static void walk_type_fields(struct compile_state *state,
        size_t ret_offset, size_t mem_offset, void *arg);
 
 static void walk_type_fields(struct compile_state *state,


@@ -6791,15 +6791,15 @@ static void walk_struct_fields(struct compile_state *state,
                if ((mtype->type & TYPE_MASK) == TYPE_PRODUCT) {
                        mtype = mtype->left;
                }
                if ((mtype->type & TYPE_MASK) == TYPE_PRODUCT) {
                        mtype = mtype->left;
                }

-               walk_type_fields(state, mtype, 
-                       reg_offset + 
+               walk_type_fields(state, mtype,
+                       reg_offset +

                        field_reg_offset(state, type, mtype->field_ident),
                        field_reg_offset(state, type, mtype->field_ident),

-                       mem_offset + 
+                       mem_offset +

                        field_offset(state, type, mtype->field_ident),
                        cb, arg);
                tptr = tptr->right;
        }
                        field_offset(state, type, mtype->field_ident),
                        cb, arg);
                tptr = tptr->right;
        }

-       
+

 }
 
 static void walk_type_fields(struct compile_state *state,
 }
 
 static void walk_type_fields(struct compile_state *state,


@@ -7086,7 +7086,7 @@ static struct type *compatible_ptrs(struct type *left, struct type *right)
                result = new_type(qual_type, result, 0);
        }
        return result;
                result = new_type(qual_type, result, 0);
        }
        return result;

-       
+

 }
 static struct triple *integral_promotion(
        struct compile_state *state, struct triple *def)
 }
 static struct triple *integral_promotion(
        struct compile_state *state, struct triple *def)


@@ -7106,7 +7106,7 @@ static struct triple *integral_promotion(
                                def->type = new_type(int_type, 0, 0);
                        }
                        else {
                                def->type = new_type(int_type, 0, 0);
                        }
                        else {

-                               def = triple(state, OP_CONVERT, 
+                               def = triple(state, OP_CONVERT,

                                        new_type(int_type, 0, 0), def, 0);
                        }
                }
                                        new_type(int_type, 0, 0), def, 0);
                        }
                }


@@ -7165,7 +7165,7 @@ static int is_compound_type(struct type *type)
        case TYPE_STRUCT:
        case TYPE_TUPLE:
        case TYPE_UNION:
        case TYPE_STRUCT:
        case TYPE_TUPLE:
        case TYPE_UNION:

-       case TYPE_JOIN: 
+       case TYPE_JOIN:

                is_compound = 1;
                break;
        default:
                is_compound = 1;
                break;
        default:


@@ -7205,8 +7205,8 @@ static int is_lvalue(struct compile_state *state, struct triple *def)
        if (!def) {
                return 0;
        }
        if (!def) {
                return 0;
        }

-       if ((def->op == OP_ADECL) || 
-               (def->op == OP_SDECL) || 
+       if ((def->op == OP_ADECL) ||
+               (def->op == OP_SDECL) ||

                (def->op == OP_DEREF) ||
                (def->op == OP_BLOBCONST) ||
                (def->op == OP_LIST)) {
                (def->op == OP_DEREF) ||
                (def->op == OP_BLOBCONST) ||
                (def->op == OP_LIST)) {


@@ -7223,7 +7223,7 @@ static void clvalue(struct compile_state *state, struct triple *def)
        if (!def) {
                internal_error(state, def, "nothing where lvalue expected?");
        }
        if (!def) {
                internal_error(state, def, "nothing where lvalue expected?");
        }

-       if (!is_lvalue(state, def)) { 
+       if (!is_lvalue(state, def)) {

                error(state, def, "lvalue expected");
        }
 }
                error(state, def, "lvalue expected");
        }
 }


@@ -7267,7 +7267,7 @@ static struct triple *int_const(
 
 static struct triple *read_expr(struct compile_state *state, struct triple *def);
 
 
 static struct triple *read_expr(struct compile_state *state, struct triple *def);
 

-static struct triple *do_mk_addr_expr(struct compile_state *state, 
+static struct triple *do_mk_addr_expr(struct compile_state *state,

        struct triple *expr, struct type *type, ulong_t offset)
 {
        struct triple *result;
        struct triple *expr, struct type *type, ulong_t offset)
 {
        struct triple *result;


@@ -7276,7 +7276,7 @@ static struct triple *do_mk_addr_expr(struct compile_state *state,
 
        ptr_type = new_type(TYPE_POINTER | (type->type & QUAL_MASK), type, 0);
 
 
        ptr_type = new_type(TYPE_POINTER | (type->type & QUAL_MASK), type, 0);
 

-       
+

        result = 0;
        if (expr->op == OP_ADECL) {
                error(state, expr, "address of auto variables not supported");
        result = 0;
        if (expr->op == OP_ADECL) {
                error(state, expr, "address of auto variables not supported");


@@ -7452,7 +7452,7 @@ static struct triple *read_expr(struct compile_state *state, struct triple *def)
        return def;
 }
 
        return def;
 }
 

-int is_write_compatible(struct compile_state *state, 
+int is_write_compatible(struct compile_state *state,

        struct type *dest, struct type *rval)
 {
        int compatible = 0;
        struct type *dest, struct type *rval)
 {
        int compatible = 0;


@@ -7604,7 +7604,7 @@ struct type *ptr_arithmetic_result(
        /* Sanity checks to ensure I am working with the proper types */
        ptr_arithmetic(state, left);
        arithmetic(state, right);
        /* Sanity checks to ensure I am working with the proper types */
        ptr_arithmetic(state, left);
        arithmetic(state, right);

-       if (TYPE_ARITHMETIC(left->type->type) && 
+       if (TYPE_ARITHMETIC(left->type->type) &&

                TYPE_ARITHMETIC(right->type->type)) {
                type = arithmetic_result(state, left, right);
        }
                TYPE_ARITHMETIC(right->type->type)) {
                type = arithmetic_result(state, left, right);
        }


@@ -7620,7 +7620,7 @@ struct type *ptr_arithmetic_result(
 
 /* boolean helper function */
 
 
 /* boolean helper function */
 

-static struct triple *ltrue_expr(struct compile_state *state, 
+static struct triple *ltrue_expr(struct compile_state *state,

        struct triple *expr)
 {
        switch(expr->op) {
        struct triple *expr)
 {
        switch(expr->op) {


@@ -7636,7 +7636,7 @@ static struct triple *ltrue_expr(struct compile_state *state,
        return expr;
 }
 
        return expr;
 }
 

-static struct triple *lfalse_expr(struct compile_state *state, 
+static struct triple *lfalse_expr(struct compile_state *state,

        struct triple *expr)
 {
        return triple(state, OP_LFALSE, &int_type, expr, 0);
        struct triple *expr)
 {
        return triple(state, OP_LFALSE, &int_type, expr, 0);


@@ -7652,15 +7652,15 @@ static struct triple *mkland_expr(
        /* Generate some intermediate triples */
        end = label(state);
        var = variable(state, &int_type);
        /* Generate some intermediate triples */
        end = label(state);
        var = variable(state, &int_type);

-       
+

        /* Store the left hand side value */
        lstore = write_expr(state, var, left);
 
        /* Jump if the value is false */
        /* Store the left hand side value */
        lstore = write_expr(state, var, left);
 
        /* Jump if the value is false */

-       jmp =  branch(state, end, 
+       jmp =  branch(state, end,

                lfalse_expr(state, read_expr(state, var)));
        mid = label(state);
                lfalse_expr(state, read_expr(state, var)));
        mid = label(state);

-       
+

        /* Store the right hand side value */
        rstore = write_expr(state, var, right);
 
        /* Store the right hand side value */
        rstore = write_expr(state, var, right);
 


@@ -7669,7 +7669,7 @@ static struct triple *mkland_expr(
 
        /* Generate the prog for a logical and */
        def = mkprog(state, var, lstore, jmp, mid, rstore, end, val, 0UL);
 
        /* Generate the prog for a logical and */
        def = mkprog(state, var, lstore, jmp, mid, rstore, end, val, 0UL);

-       
+

        return def;
 }
 
        return def;
 }
 


@@ -7682,17 +7682,17 @@ static struct triple *mklor_expr(
        /* Generate some intermediate triples */
        end = label(state);
        var = variable(state, &int_type);
        /* Generate some intermediate triples */
        end = label(state);
        var = variable(state, &int_type);

-       
+

        /* Store the left hand side value */
        left = write_expr(state, var, left);
        /* Store the left hand side value */
        left = write_expr(state, var, left);

-       
+

        /* Jump if the value is true */
        jmp = branch(state, end, read_expr(state, var));
        mid = label(state);
        /* Jump if the value is true */
        jmp = branch(state, end, read_expr(state, var));
        mid = label(state);

-       
+

        /* Store the right hand side value */
        right = write_expr(state, var, right);
        /* Store the right hand side value */
        right = write_expr(state, var, right);

-               
+

        /* An expression for the computed value*/
        val = read_expr(state, var);
 
        /* An expression for the computed value*/
        val = read_expr(state, var);
 


@@ -7703,7 +7703,7 @@ static struct triple *mklor_expr(
 }
 
 static struct triple *mkcond_expr(
 }
 
 static struct triple *mkcond_expr(

-       struct compile_state *state, 
+       struct compile_state *state,

        struct triple *test, struct triple *left, struct triple *right)
 {
        struct triple *def, *val, *var, *jmp1, *jmp2, *top, *mid, *end;
        struct triple *test, struct triple *left, struct triple *right)
 {
        struct triple *def, *val, *var, *jmp1, *jmp2, *top, *mid, *end;


@@ -7758,7 +7758,7 @@ static struct triple *mkcond_expr(
 
        /* Store the right hand side value */
        right = write_expr(state, var, right);
 
        /* Store the right hand side value */
        right = write_expr(state, var, right);

-       
+

        /* An expression for the computed value */
        val = read_expr(state, var);
 
        /* An expression for the computed value */
        val = read_expr(state, var);
 


@@ -7850,7 +7850,7 @@ static struct triple *flatten_generic(
                insert_triple(state, first, ptr);
                ptr->id |= TRIPLE_FLAG_FLATTENED;
                ptr->id &= ~TRIPLE_FLAG_LOCAL;
                insert_triple(state, first, ptr);
                ptr->id |= TRIPLE_FLAG_FLATTENED;
                ptr->id &= ~TRIPLE_FLAG_LOCAL;

-               
+

                /* Now flatten the lhs elements */
                for(i = 0; i < lhs; i++) {
                        struct triple **ins = &LHS(ptr, i);
                /* Now flatten the lhs elements */
                for(i = 0; i < lhs; i++) {
                        struct triple **ins = &LHS(ptr, i);


@@ -7881,7 +7881,7 @@ static struct triple *flatten_prog(
                unuse_triple(first, body->prev);
                use_triple(body, body->prev);
        }
                unuse_triple(first, body->prev);
                use_triple(body, body->prev);
        }

-       
+

        if (!(val->id & TRIPLE_FLAG_FLATTENED)) {
                internal_error(state, val, "val not flattened?");
        }
        if (!(val->id & TRIPLE_FLAG_FLATTENED)) {
                internal_error(state, val, "val not flattened?");
        }


@@ -7993,7 +7993,7 @@ static struct triple *flatten(
                                base = MISC(ptr, 0);
                                offset = bits_to_bytes(field_offset(state, base->type, ptr->u.field));
                                left = RHS(base, 0);
                                base = MISC(ptr, 0);
                                offset = bits_to_bytes(field_offset(state, base->type, ptr->u.field));
                                left = RHS(base, 0);

-                               ptr = triple(state, OP_ADD, left->type, 
+                               ptr = triple(state, OP_ADD, left->type,

                                        read_expr(state, left),
                                        int_const(state, &ulong_type, offset));
                                free_triple(state, base);
                                        read_expr(state, left),
                                        int_const(state, &ulong_type, offset));
                                free_triple(state, base);


@@ -8214,8 +8214,8 @@ static struct triple *mk_add_expr(
                if (!equiv_types(right->type, ptr_math)) {
                        right = mk_cast_expr(state, ptr_math, right);
                }
                if (!equiv_types(right->type, ptr_math)) {
                        right = mk_cast_expr(state, ptr_math, right);
                }

-               right = triple(state, op, ptr_math, right, 
-                       int_const(state, ptr_math, 
+               right = triple(state, op, ptr_math, right,
+                       int_const(state, ptr_math,

                                size_of_in_bytes(state, left->type->left)));
        }
        return triple(state, OP_ADD, result_type, left, right);
                                size_of_in_bytes(state, left->type->left)));
        }
        return triple(state, OP_ADD, result_type, left, right);


@@ -8241,8 +8241,8 @@ static struct triple *mk_sub_expr(
                if (!equiv_types(right->type, ptr_math)) {
                        right = mk_cast_expr(state, ptr_math, right);
                }
                if (!equiv_types(right->type, ptr_math)) {
                        right = mk_cast_expr(state, ptr_math, right);
                }

-               right = triple(state, op, ptr_math, right, 
-                       int_const(state, ptr_math, 
+               right = triple(state, op, ptr_math, right,
+                       int_const(state, ptr_math,

                                size_of_in_bytes(state, left->type->left)));
        }
        return triple(state, OP_SUB, result_type, left, right);
                                size_of_in_bytes(state, left->type->left)));
        }
        return triple(state, OP_SUB, result_type, left, right);


@@ -8288,7 +8288,7 @@ static struct triple *mk_post_dec_expr(
        struct triple *val;
        lvalue(state, def);
        val = read_expr(state, def);
        struct triple *val;
        lvalue(state, def);
        val = read_expr(state, def);

-       return triple(state, OP_VAL, def->type, 
+       return triple(state, OP_VAL, def->type,

                write_expr(state, def,
                        mk_sub_expr(state, val, int_const(state, &int_type, 1)))
                , val);
                write_expr(state, def,
                        mk_sub_expr(state, val, int_const(state, &int_type, 1)))
                , val);


@@ -8320,12 +8320,12 @@ static int is_simple_const(struct triple *ins)
        /* Is this a constant that u.cval has the value.
         * Or equivalently is this a constant that read_const
         * works on.
        /* Is this a constant that u.cval has the value.
         * Or equivalently is this a constant that read_const
         * works on.

-        * So far only OP_INTCONST qualifies.  
+        * So far only OP_INTCONST qualifies.

         */
        return (ins->op == OP_INTCONST);
 }
 
         */
        return (ins->op == OP_INTCONST);
 }
 

-static int constants_equal(struct compile_state *state, 
+static int constants_equal(struct compile_state *state,

        struct triple *left, struct triple *right)
 {
        int equal;
        struct triple *left, struct triple *right)
 {
        int equal;


@@ -8402,7 +8402,7 @@ static long_t bit_count(ulong_t value)
                }
        }
        return count;
                }
        }
        return count;

-       
+

 }
 #endif
 
 }
 #endif
 


@@ -8465,12 +8465,12 @@ static ulong_t read_const(struct compile_state *state,
        struct triple *ins, struct triple *rhs)
 {
        switch(rhs->type->type &TYPE_MASK) {
        struct triple *ins, struct triple *rhs)
 {
        switch(rhs->type->type &TYPE_MASK) {

-       case TYPE_CHAR:   
+       case TYPE_CHAR:

        case TYPE_SHORT:
        case TYPE_INT:
        case TYPE_LONG:
        case TYPE_SHORT:
        case TYPE_INT:
        case TYPE_LONG:

-       case TYPE_UCHAR:   
-       case TYPE_USHORT:  
+       case TYPE_UCHAR:
+       case TYPE_USHORT:

        case TYPE_UINT:
        case TYPE_ULONG:
        case TYPE_POINTER:
        case TYPE_UINT:
        case TYPE_ULONG:
        case TYPE_POINTER:


@@ -8520,7 +8520,7 @@ int const_eq(struct compile_state *state, struct triple *ins,
                rval = read_const(state, ins, right);
                result = (lval == rval);
        }
                rval = read_const(state, ins, right);
                result = (lval == rval);
        }

-       else if ((left->op == OP_ADDRCONST) && 
+       else if ((left->op == OP_ADDRCONST) &&

                (right->op == OP_ADDRCONST)) {
                result = (MISC(left, 0) == MISC(right, 0)) &&
                        (left->u.cval == right->u.cval);
                (right->op == OP_ADDRCONST)) {
                result = (MISC(left, 0) == MISC(right, 0)) &&
                        (left->u.cval == right->u.cval);


@@ -8530,7 +8530,7 @@ int const_eq(struct compile_state *state, struct triple *ins,
                result = -1;
        }
        return result;
                result = -1;
        }
        return result;

-       
+

 }
 
 int const_ucmp(struct compile_state *state, struct triple *ins,
 }
 
 int const_ucmp(struct compile_state *state, struct triple *ins,


@@ -8555,7 +8555,7 @@ int const_ucmp(struct compile_state *state, struct triple *ins,
                        result = -1;
                }
        }
                        result = -1;
                }
        }

-       else if ((left->op == OP_ADDRCONST) && 
+       else if ((left->op == OP_ADDRCONST) &&

                (right->op == OP_ADDRCONST) &&
                (MISC(left, 0) == MISC(right, 0))) {
                result = 0;
                (right->op == OP_ADDRCONST) &&
                (MISC(left, 0) == MISC(right, 0))) {
                result = 0;


@@ -8652,7 +8652,7 @@ static void check_lhs(struct compile_state *state, struct triple *ins)
        for(;expr;expr = triple_lhs(state, ins, expr)) {
                internal_error(state, ins, "unexpected lhs");
        }
        for(;expr;expr = triple_lhs(state, ins, expr)) {
                internal_error(state, ins, "unexpected lhs");
        }

-       
+

 }
 #endif
 
 }
 #endif
 


@@ -8710,7 +8710,7 @@ static void wipe_branch(struct compile_state *state, struct triple *ins)
 }
 #endif
 
 }
 #endif
 

-static void mkcopy(struct compile_state *state, 
+static void mkcopy(struct compile_state *state,

        struct triple *ins, struct triple *rhs)
 {
        struct block *block;
        struct triple *ins, struct triple *rhs)
 {
        struct block *block;


@@ -8732,7 +8732,7 @@ static void mkcopy(struct compile_state *state,
        use_triple(RHS(ins, 0), ins);
 }
 
        use_triple(RHS(ins, 0), ins);
 }
 

-static void mkconst(struct compile_state *state, 
+static void mkconst(struct compile_state *state,

        struct triple *ins, ulong_t value)
 {
        if (!is_integral(ins) && !is_pointer(ins)) {
        struct triple *ins, ulong_t value)
 {
        if (!is_integral(ins) && !is_pointer(ins)) {


@@ -8762,7 +8762,7 @@ static void mkaddr_const(struct compile_state *state,
 }
 
 #if DEBUG_DECOMPOSE_PRINT_TUPLES
 }
 
 #if DEBUG_DECOMPOSE_PRINT_TUPLES

-static void print_tuple(struct compile_state *state, 
+static void print_tuple(struct compile_state *state,

        struct triple *ins, struct triple *tuple)
 {
        FILE *fp = state->dbgout;
        struct triple *ins, struct triple *tuple)
 {
        FILE *fp = state->dbgout;


@@ -8773,11 +8773,11 @@ static void print_tuple(struct compile_state *state,
                name_of(fp, LHS(tuple, 0)->type);
        }
        fprintf(fp, "\n");
                name_of(fp, LHS(tuple, 0)->type);
        }
        fprintf(fp, "\n");

-       
+

 }
 #endif
 
 }
 #endif
 

-static struct triple *decompose_with_tuple(struct compile_state *state, 
+static struct triple *decompose_with_tuple(struct compile_state *state,

        struct triple *ins, struct triple *tuple)
 {
        struct triple *next;
        struct triple *ins, struct triple *tuple)
 {
        struct triple *next;


@@ -8799,7 +8799,7 @@ static struct triple *decompose_with_tuple(struct compile_state *state,
 
        propogate_use(state, ins, tuple);
        release_triple(state, ins);
 
        propogate_use(state, ins, tuple);
        release_triple(state, ins);

-       
+

        return next;
 }
 
        return next;
 }
 


@@ -8817,7 +8817,7 @@ static struct triple *decompose_unknownval(struct compile_state *state,
 #endif
 
        get_occurance(ins->occurance);
 #endif
 
        get_occurance(ins->occurance);

-       tuple = alloc_triple(state, OP_TUPLE, ins->type, -1, -1, 
+       tuple = alloc_triple(state, OP_TUPLE, ins->type, -1, -1,

                ins->occurance);
 
        for(i = 0; i < tuple->lhs; i++) {
                ins->occurance);
 
        for(i = 0; i < tuple->lhs; i++) {


@@ -8834,7 +8834,7 @@ static struct triple *decompose_unknownval(struct compile_state *state,
 }
 
 
 }
 
 

-static struct triple *decompose_read(struct compile_state *state, 
+static struct triple *decompose_read(struct compile_state *state,

        struct triple *ins)
 {
        struct triple *tuple, *lval;
        struct triple *ins)
 {
        struct triple *tuple, *lval;


@@ -8850,7 +8850,7 @@ static struct triple *decompose_read(struct compile_state *state,
                ins->occurance);
 
        if ((tuple->lhs != lval->lhs) &&
                ins->occurance);
 
        if ((tuple->lhs != lval->lhs) &&

-               (!triple_is_def(state, lval) || (tuple->lhs != 1))) 
+               (!triple_is_def(state, lval) || (tuple->lhs != 1)))

        {
                internal_error(state, ins, "lhs size inconsistency?");
        }
        {
                internal_error(state, ins, "lhs size inconsistency?");
        }


@@ -8870,7 +8870,7 @@ static struct triple *decompose_read(struct compile_state *state,
                }
 
                get_occurance(tuple->occurance);
                }
 
                get_occurance(tuple->occurance);

-               read = alloc_triple(state, OP_READ, piece->type, -1, -1, 
+               read = alloc_triple(state, OP_READ, piece->type, -1, -1,

                        tuple->occurance);
                RHS(read, 0) = piece;
 
                        tuple->occurance);
                RHS(read, 0) = piece;
 


@@ -8897,12 +8897,12 @@ static struct triple *decompose_read(struct compile_state *state,
        return decompose_with_tuple(state, ins, tuple);
 }
 
        return decompose_with_tuple(state, ins, tuple);
 }
 

-static struct triple *decompose_write(struct compile_state *state, 
+static struct triple *decompose_write(struct compile_state *state,

        struct triple *ins)
 {
        struct triple *tuple, *lval, *val;
        ulong_t i;
        struct triple *ins)
 {
        struct triple *tuple, *lval, *val;
        ulong_t i;

-       
+

        lval = MISC(ins, 0);
        val = RHS(ins, 0);
        get_occurance(ins->occurance);
        lval = MISC(ins, 0);
        val = RHS(ins, 0);
        get_occurance(ins->occurance);


@@ -8910,7 +8910,7 @@ static struct triple *decompose_write(struct compile_state *state,
                ins->occurance);
 
        if ((tuple->lhs != lval->lhs) &&
                ins->occurance);
 
        if ((tuple->lhs != lval->lhs) &&

-               (!triple_is_def(state, lval) || tuple->lhs != 1)) 
+               (!triple_is_def(state, lval) || tuple->lhs != 1))

        {
                internal_error(state, ins, "lhs size inconsistency?");
        }
        {
                internal_error(state, ins, "lhs size inconsistency?");
        }


@@ -8930,7 +8930,7 @@ static struct triple *decompose_write(struct compile_state *state,
                        }
                        pval = LHS(val, i);
                }
                        }
                        pval = LHS(val, i);
                }

-               
+

                /* See if the piece is really a bitref */
                bitref = 0;
                if (piece->op == OP_BITREF) {
                /* See if the piece is really a bitref */
                bitref = 0;
                if (piece->op == OP_BITREF) {


@@ -8958,7 +8958,7 @@ static struct triple *decompose_write(struct compile_state *state,
                }
 
                get_occurance(tuple->occurance);
                }
 
                get_occurance(tuple->occurance);

-               write = alloc_triple(state, OP_WRITE, piece->type, -1, -1, 
+               write = alloc_triple(state, OP_WRITE, piece->type, -1, -1,

                        tuple->occurance);
                MISC(write, 0) = piece;
                RHS(write, 0) = pval;
                        tuple->occurance);
                MISC(write, 0) = piece;
                RHS(write, 0) = pval;


@@ -8977,7 +8977,7 @@ static void decompose_load_cb(struct compile_state *state,
 {
        struct decompose_load_info *info = arg;
        struct triple *load;
 {
        struct decompose_load_info *info = arg;
        struct triple *load;

-       
+

        if (reg_offset > info->tuple->lhs) {
                internal_error(state, info->tuple, "lhs to small?");
        }
        if (reg_offset > info->tuple->lhs) {
                internal_error(state, info->tuple, "lhs to small?");
        }


@@ -8987,7 +8987,7 @@ static void decompose_load_cb(struct compile_state *state,
        LHS(info->tuple, reg_offset/REG_SIZEOF_REG) = load;
 }
 
        LHS(info->tuple, reg_offset/REG_SIZEOF_REG) = load;
 }
 

-static struct triple *decompose_load(struct compile_state *state, 
+static struct triple *decompose_load(struct compile_state *state,

        struct triple *ins)
 {
        struct triple *tuple;
        struct triple *ins)
 {
        struct triple *tuple;


@@ -9020,7 +9020,7 @@ static void decompose_store_cb(struct compile_state *state,
 {
        struct decompose_store_info *info = arg;
        struct triple *store;
 {
        struct decompose_store_info *info = arg;
        struct triple *store;

-       
+

        if (reg_offset > info->tuple->lhs) {
                internal_error(state, info->tuple, "lhs to small?");
        }
        if (reg_offset > info->tuple->lhs) {
                internal_error(state, info->tuple, "lhs to small?");
        }


@@ -9031,7 +9031,7 @@ static void decompose_store_cb(struct compile_state *state,
        LHS(info->tuple, reg_offset/REG_SIZEOF_REG) = store;
 }
 
        LHS(info->tuple, reg_offset/REG_SIZEOF_REG) = store;
 }
 

-static struct triple *decompose_store(struct compile_state *state, 
+static struct triple *decompose_store(struct compile_state *state,

        struct triple *ins)
 {
        struct triple *tuple;
        struct triple *ins)
 {
        struct triple *tuple;


@@ -9053,7 +9053,7 @@ static struct triple *decompose_store(struct compile_state *state,
        return decompose_with_tuple(state, ins, tuple);
 }
 
        return decompose_with_tuple(state, ins, tuple);
 }
 

-static struct triple *decompose_dot(struct compile_state *state, 
+static struct triple *decompose_dot(struct compile_state *state,

        struct triple *ins)
 {
        struct triple *tuple, *lval;
        struct triple *ins)
 {
        struct triple *tuple, *lval;


@@ -9075,7 +9075,7 @@ static struct triple *decompose_dot(struct compile_state *state,
 #endif
 
        get_occurance(ins->occurance);
 #endif
 
        get_occurance(ins->occurance);

-       tuple = alloc_triple(state, OP_TUPLE, type, -1, -1, 
+       tuple = alloc_triple(state, OP_TUPLE, type, -1, -1,

                ins->occurance);
 
        if (((ins->type->type & TYPE_MASK) == TYPE_BITFIELD) &&
                ins->occurance);
 
        if (((ins->type->type & TYPE_MASK) == TYPE_BITFIELD) &&


@@ -9110,7 +9110,7 @@ static struct triple *decompose_dot(struct compile_state *state,
                        piece->u.bitfield.offset = reg_offset % REG_SIZEOF_REG;
                }
                else if ((reg_offset % REG_SIZEOF_REG) != 0) {
                        piece->u.bitfield.offset = reg_offset % REG_SIZEOF_REG;
                }
                else if ((reg_offset % REG_SIZEOF_REG) != 0) {

-                       internal_error(state, ins, 
+                       internal_error(state, ins,

                                "request for a nonbitfield sub register?");
                }
 
                                "request for a nonbitfield sub register?");
                }
 


@@ -9120,7 +9120,7 @@ static struct triple *decompose_dot(struct compile_state *state,
        return decompose_with_tuple(state, ins, tuple);
 }
 
        return decompose_with_tuple(state, ins, tuple);
 }
 

-static struct triple *decompose_index(struct compile_state *state, 
+static struct triple *decompose_index(struct compile_state *state,

        struct triple *ins)
 {
        struct triple *tuple, *lval;
        struct triple *ins)
 {
        struct triple *tuple, *lval;


@@ -9140,7 +9140,7 @@ static struct triple *decompose_index(struct compile_state *state,
 #endif
 
        get_occurance(ins->occurance);
 #endif
 
        get_occurance(ins->occurance);

-       tuple = alloc_triple(state, OP_TUPLE, type, -1, -1, 
+       tuple = alloc_triple(state, OP_TUPLE, type, -1, -1,

                ins->occurance);
 
        for(i = 0; i < tuple->lhs; i++, idx++) {
                ins->occurance);
 
        for(i = 0; i < tuple->lhs; i++, idx++) {


@@ -9210,7 +9210,7 @@ static void decompose_compound_types(struct compile_state *state)
                case OP_INDEX:
                        next = decompose_index(state, ins);
                        break;
                case OP_INDEX:
                        next = decompose_index(state, ins);
                        break;

-                       
+

                }
 #if DEBUG_DECOMPOSE_HIRES
                fprintf(fp, "decompose next: %p \n", next);
                }
 #if DEBUG_DECOMPOSE_HIRES
                fprintf(fp, "decompose next: %p \n", next);


@@ -9234,7 +9234,7 @@ static void decompose_compound_types(struct compile_state *state)
                        else {
                                release_triple(state, ins);
                        }
                        else {
                                release_triple(state, ins);
                        }

-               } 
+               }

                ins = next;
        } while(ins != first);
        ins = first;
                ins = next;
        } while(ins != first);
        ins = first;


@@ -9243,7 +9243,7 @@ static void decompose_compound_types(struct compile_state *state)
                if (ins->op == OP_BITREF) {
                        if (ins->use) {
                                internal_error(state, ins, "bitref used");
                if (ins->op == OP_BITREF) {
                        if (ins->use) {
                                internal_error(state, ins, "bitref used");

-                       } 
+                       }

                        else {
                                release_triple(state, ins);
                        }
                        else {
                                release_triple(state, ins);
                        }


@@ -9973,7 +9973,7 @@ static void simplify_sextract(struct compile_state *state, struct triple *ins)
                val &= mask;
                val <<= (SIZEOF_LONG - ins->u.bitfield.size);
                sval = val;
                val &= mask;
                val <<= (SIZEOF_LONG - ins->u.bitfield.size);
                sval = val;

-               sval >>= (SIZEOF_LONG - ins->u.bitfield.size); 
+               sval >>= (SIZEOF_LONG - ins->u.bitfield.size);

                mkconst(state, ins, sval);
        }
 }
                mkconst(state, ins, sval);
        }
 }


@@ -10094,7 +10094,7 @@ static struct triple *branch_target(struct compile_state *state, struct triple *
         * loop back onto themselves. If I see one don't advance the
         * target.
         */
         * loop back onto themselves. If I see one don't advance the
         * target.
         */

-       while(triple_is_structural(state, targ) && 
+       while(triple_is_structural(state, targ) &&

                (targ->next != targ) && (targ->next != state->first)) {
                targ = targ->next;
        }
                (targ->next != targ) && (targ->next != state->first)) {
                targ = targ->next;
        }


@@ -10111,7 +10111,7 @@ static void simplify_branch(struct compile_state *state, struct triple *ins)
        if (ins->use != 0) {
                internal_error(state, ins, "branch use");
        }
        if (ins->use != 0) {
                internal_error(state, ins, "branch use");
        }

-       /* The challenge here with simplify branch is that I need to 
+       /* The challenge here with simplify branch is that I need to

         * make modifications to the control flow graph as well
         * as to the branch instruction itself.  That is handled
         * by rebuilding the basic blocks after simplify all is called.
         * make modifications to the control flow graph as well
         * as to the branch instruction itself.  That is handled
         * by rebuilding the basic blocks after simplify all is called.


@@ -10128,7 +10128,7 @@ static void simplify_branch(struct compile_state *state, struct triple *ins)
                struct triple *targ;
                simplified = 0;
                targ = branch_target(state, ins);
                struct triple *targ;
                simplified = 0;
                targ = branch_target(state, ins);

-               if ((targ != ins) && (targ->op == OP_BRANCH) && 
+               if ((targ != ins) && (targ->op == OP_BRANCH) &&

                        !phi_dependency(targ->u.block))
                {
                        unuse_triple(TARG(ins, 0), ins);
                        !phi_dependency(targ->u.block))
                {
                        unuse_triple(TARG(ins, 0), ins);


@@ -10208,7 +10208,7 @@ static void simplify_label(struct compile_state *state, struct triple *ins)
                                                unuse_triple(ins, use);
                                                use_triple(ins->prev, use);
                                        }
                                                unuse_triple(ins, use);
                                                use_triple(ins->prev, use);
                                        }

-                                       
+

                                }
                        }
                        if (ins->use) {
                                }
                        }
                        if (ins->use) {


@@ -10245,7 +10245,7 @@ static void simplify_phi(struct compile_state *state, struct triple *ins)
                        return;
                }
        }
                        return;
                }
        }

-       
+

        /* See if all of rhs members of a phi are the same */
        value = slot[0];
        for(i = 1; i < zrhs; i++) {
        /* See if all of rhs members of a phi are the same */
        value = slot[0];
        for(i = 1; i < zrhs; i++) {


@@ -10373,11 +10373,11 @@ static const struct simplify_table {
 [OP_BSF        ] = { simplify_bsf,     COMPILER_SIMPLIFY_OP },
 [OP_BSR        ] = { simplify_bsr,     COMPILER_SIMPLIFY_OP },
 [OP_RDMSR      ] = { simplify_noop,    COMPILER_SIMPLIFY_OP },
 [OP_BSF        ] = { simplify_bsf,     COMPILER_SIMPLIFY_OP },
 [OP_BSR        ] = { simplify_bsr,     COMPILER_SIMPLIFY_OP },
 [OP_RDMSR      ] = { simplify_noop,    COMPILER_SIMPLIFY_OP },

-[OP_WRMSR      ] = { simplify_noop,     COMPILER_SIMPLIFY_OP },               
+[OP_WRMSR      ] = { simplify_noop,     COMPILER_SIMPLIFY_OP },

 [OP_HLT        ] = { simplify_noop,     COMPILER_SIMPLIFY_OP },
 };
 
 [OP_HLT        ] = { simplify_noop,     COMPILER_SIMPLIFY_OP },
 };
 

-static inline void debug_simplify(struct compile_state *state, 
+static inline void debug_simplify(struct compile_state *state,

        simplify_t do_simplify, struct triple *ins)
 {
 #if DEBUG_SIMPLIFY_HIRES
        simplify_t do_simplify, struct triple *ins)
 {
 #if DEBUG_SIMPLIFY_HIRES


@@ -10412,14 +10412,14 @@ static void simplify(struct compile_state *state, struct triple *ins)
                else {
                        do_simplify = table_simplify[op].func;
                }
                else {
                        do_simplify = table_simplify[op].func;
                }

-               if (do_simplify && 
+               if (do_simplify &&

                        !(state->compiler->flags & table_simplify[op].flag)) {
                        do_simplify = simplify_noop;
                }
                if (do_simplify && (ins->id & TRIPLE_FLAG_VOLATILE)) {
                        do_simplify = simplify_noop;
                }
                        !(state->compiler->flags & table_simplify[op].flag)) {
                        do_simplify = simplify_noop;
                }
                if (do_simplify && (ins->id & TRIPLE_FLAG_VOLATILE)) {
                        do_simplify = simplify_noop;
                }

-       
+

                if (!do_simplify) {
                        internal_error(state, ins, "cannot simplify op: %d %s",
                                op, tops(op));
                if (!do_simplify) {
                        internal_error(state, ins, "cannot simplify op: %d %s",
                                op, tops(op));


@@ -10548,7 +10548,7 @@ static void register_builtin_function(struct compile_state *state,
        ident = lookup(state, name, name_len);
        ftype->type_ident = ident;
        symbol(state, ident, &ident->sym_ident, def, ftype);
        ident = lookup(state, name, name_len);
        ftype->type_ident = ident;
        symbol(state, ident, &ident->sym_ident, def, ftype);

-       
+

        state->file = file.prev;
        state->function = 0;
        state->main_function = 0;
        state->file = file.prev;
        state->function = 0;
        state->main_function = 0;


@@ -10595,7 +10595,7 @@ static struct type *register_builtin_type(struct compile_state *state,
 
        name_len = strlen(name);
        ident = lookup(state, name, name_len);
 
        name_len = strlen(name);
        ident = lookup(state, name, name_len);

-       
+

        if ((type->type & TYPE_MASK) == TYPE_PRODUCT) {
                ulong_t elements = 0;
                struct type *field;
        if ((type->type & TYPE_MASK) == TYPE_PRODUCT) {
                ulong_t elements = 0;
                struct type *field;


@@ -10644,23 +10644,23 @@ static void register_builtins(struct compile_state *state)
        register_builtin_function(state, "__builtin_uldiv", OP_UDIVT, uldiv_type,
                &ulong_type, &ulong_type);
 
        register_builtin_function(state, "__builtin_uldiv", OP_UDIVT, uldiv_type,
                &ulong_type, &ulong_type);
 

-       register_builtin_function(state, "__builtin_inb", OP_INB, &uchar_type, 
+       register_builtin_function(state, "__builtin_inb", OP_INB, &uchar_type,

                &ushort_type);
        register_builtin_function(state, "__builtin_inw", OP_INW, &ushort_type,
                &ushort_type);
                &ushort_type);
        register_builtin_function(state, "__builtin_inw", OP_INW, &ushort_type,
                &ushort_type);

-       register_builtin_function(state, "__builtin_inl", OP_INL, &uint_type,   
+       register_builtin_function(state, "__builtin_inl", OP_INL, &uint_type,

                &ushort_type);
 
                &ushort_type);
 

-       register_builtin_function(state, "__builtin_outb", OP_OUTB, &void_type, 
+       register_builtin_function(state, "__builtin_outb", OP_OUTB, &void_type,

                &uchar_type, &ushort_type);
                &uchar_type, &ushort_type);

-       register_builtin_function(state, "__builtin_outw", OP_OUTW, &void_type, 
+       register_builtin_function(state, "__builtin_outw", OP_OUTW, &void_type,

                &ushort_type, &ushort_type);
                &ushort_type, &ushort_type);

-       register_builtin_function(state, "__builtin_outl", OP_OUTL, &void_type, 
+       register_builtin_function(state, "__builtin_outl", OP_OUTL, &void_type,

                &uint_type, &ushort_type);
                &uint_type, &ushort_type);

-       
-       register_builtin_function(state, "__builtin_bsf", OP_BSF, &int_type, 
+
+       register_builtin_function(state, "__builtin_bsf", OP_BSF, &int_type,

                &int_type);
                &int_type);

-       register_builtin_function(state, "__builtin_bsr", OP_BSR, &int_type, 
+       register_builtin_function(state, "__builtin_bsr", OP_BSR, &int_type,

                &int_type);
 
        msr_type = register_builtin_type(state, "__builtin_msr_t",
                &int_type);
 
        msr_type = register_builtin_type(state, "__builtin_msr_t",


@@ -10671,13 +10671,13 @@ static void register_builtins(struct compile_state *state)
                &ulong_type);
        register_builtin_function(state, "__builtin_wrmsr", OP_WRMSR, &void_type,
                &ulong_type, &ulong_type, &ulong_type);
                &ulong_type);
        register_builtin_function(state, "__builtin_wrmsr", OP_WRMSR, &void_type,
                &ulong_type, &ulong_type, &ulong_type);

-       
-       register_builtin_function(state, "__builtin_hlt", OP_HLT, &void_type, 
+
+       register_builtin_function(state, "__builtin_hlt", OP_HLT, &void_type,

                &void_type);
 }
 
 static struct type *declarator(
                &void_type);
 }
 
 static struct type *declarator(

-       struct compile_state *state, struct type *type, 
+       struct compile_state *state, struct type *type,

        struct hash_entry **ident, int need_ident);
 static void decl(struct compile_state *state, struct triple *first);
 static struct type *specifier_qualifier_list(struct compile_state *state);
        struct hash_entry **ident, int need_ident);
 static void decl(struct compile_state *state, struct triple *first);
 static struct type *specifier_qualifier_list(struct compile_state *state);


@@ -11208,8 +11208,8 @@ static struct triple *shift_expr(struct compile_state *state)
                        right = read_expr(state, add_expr(state));
                        integral(state, right);
                        right = integral_promotion(state, right);
                        right = read_expr(state, add_expr(state));
                        integral(state, right);
                        right = integral_promotion(state, right);

-                       
-                       op = (tok == TOK_SL)? OP_SL : 
+
+                       op = (tok == TOK_SL)? OP_SL :

                                is_signed(left->type)? OP_SSR: OP_USR;
 
                        def = triple(state, op, left->type, left, right);
                                is_signed(left->type)? OP_SSR: OP_USR;
 
                        def = triple(state, op, left->type, left, right);


@@ -11383,7 +11383,7 @@ static struct triple *lor_expr(struct compile_state *state)
                right = read_expr(state, land_expr(state));
                bool(state, right);
 
                right = read_expr(state, land_expr(state));
                bool(state, right);
 

-               def = mklor_expr(state, 
+               def = mklor_expr(state,

                        ltrue_expr(state, left),
                        ltrue_expr(state, right));
        }
                        ltrue_expr(state, left),
                        ltrue_expr(state, right));
        }


@@ -11457,7 +11457,7 @@ static struct triple *eval_const_expr(
                do {
                        valid_ins(state, ptr);
                        if ((ptr->op == OP_PHI) || (ptr->op == OP_LIST)) {
                do {
                        valid_ins(state, ptr);
                        if ((ptr->op == OP_PHI) || (ptr->op == OP_LIST)) {

-                               internal_error(state, ptr, 
+                               internal_error(state, ptr,

                                        "unexpected %s in constant expression",
                                        tops(ptr->op));
                        }
                                        "unexpected %s in constant expression",
                                        tops(ptr->op));
                        }


@@ -11472,8 +11472,8 @@ static struct triple *eval_const_expr(
                        else if (triple_is_cbranch(state, ptr)) {
                                struct triple *cond_val;
                                cond_val = get_cv(state, cv, RHS(ptr, 0));
                        else if (triple_is_cbranch(state, ptr)) {
                                struct triple *cond_val;
                                cond_val = get_cv(state, cv, RHS(ptr, 0));

-                               if (!cond_val || !is_const(cond_val) || 
-                                       (cond_val->op != OP_INTCONST)) 
+                               if (!cond_val || !is_const(cond_val) ||
+                                       (cond_val->op != OP_INTCONST))

                                {
                                        internal_error(state, ptr, "bad branch condition");
                                }
                                {
                                        internal_error(state, ptr, "bad branch condition");
                                }


@@ -11489,16 +11489,16 @@ static struct triple *eval_const_expr(
                        else if (ptr->op == OP_WRITE) {
                                struct triple *val;
                                val = get_cv(state, cv, RHS(ptr, 0));
                        else if (ptr->op == OP_WRITE) {
                                struct triple *val;
                                val = get_cv(state, cv, RHS(ptr, 0));

-                               
-                               set_cv(state, cv, MISC(ptr, 0), 
+
+                               set_cv(state, cv, MISC(ptr, 0),

                                        copy_triple(state, val));
                                        copy_triple(state, val));

-                               set_cv(state, cv, ptr, 
+                               set_cv(state, cv, ptr,

                                        copy_triple(state, val));
                                ptr = ptr->next;
                        }
                        else if (ptr->op == OP_READ) {
                                        copy_triple(state, val));
                                ptr = ptr->next;
                        }
                        else if (ptr->op == OP_READ) {

-                               set_cv(state, cv, ptr, 
-                                       copy_triple(state, 
+                               set_cv(state, cv, ptr,
+                                       copy_triple(state,

                                                get_cv(state, cv, RHS(ptr, 0))));
                                ptr = ptr->next;
                        }
                                                get_cv(state, cv, RHS(ptr, 0))));
                                ptr = ptr->next;
                        }


@@ -11519,7 +11519,7 @@ static struct triple *eval_const_expr(
                        else {
                                error(state, ptr, "impure operation in constant expression");
                        }
                        else {
                                error(state, ptr, "impure operation in constant expression");
                        }

-                       
+

                } while(ptr != head);
 
                /* Get the result value */
                } while(ptr != head);
 
                /* Get the result value */


@@ -11565,7 +11565,7 @@ static struct triple *assignment_expr(struct compile_state *state)
         * a larger set of statements than standard C.   As long
         * as the subset of the grammar that is standard C behaves
         * correctly this should cause no problems.
         * a larger set of statements than standard C.   As long
         * as the subset of the grammar that is standard C behaves
         * correctly this should cause no problems.

-        * 
+        *

         * For the extra token strings accepted by the grammar
         * none of them should produce a valid lvalue, so they
         * should not produce functioning programs.
         * For the extra token strings accepted by the grammar
         * none of them should produce a valid lvalue, so they
         * should not produce functioning programs.


@@ -11578,7 +11578,7 @@ static struct triple *assignment_expr(struct compile_state *state)
        case TOK_EQ:
                lvalue(state, left);
                eat(state, TOK_EQ);
        case TOK_EQ:
                lvalue(state, left);
                eat(state, TOK_EQ);

-               def = write_expr(state, left, 
+               def = write_expr(state, left,

                        read_expr(state, assignment_expr(state)));
                break;
        case TOK_TIMESEQ:
                        read_expr(state, assignment_expr(state)));
                break;
        case TOK_TIMESEQ:


@@ -11598,7 +11598,7 @@ static struct triple *assignment_expr(struct compile_state *state)
                case TOK_MODEQ:   op = sign? OP_SMOD : OP_UMOD; break;
                }
                def = write_expr(state, left,
                case TOK_MODEQ:   op = sign? OP_SMOD : OP_UMOD; break;
                }
                def = write_expr(state, left,

-                       triple(state, op, left->type, 
+                       triple(state, op, left->type,

                                read_expr(state, left), right));
                break;
        case TOK_PLUSEQ:
                                read_expr(state, left), right));
                break;
        case TOK_PLUSEQ:


@@ -11634,7 +11634,7 @@ static struct triple *assignment_expr(struct compile_state *state)
                case TOK_OREQ:  op = OP_OR; break;
                }
                def = write_expr(state, left,
                case TOK_OREQ:  op = OP_OR; break;
                }
                def = write_expr(state, left,

-                       triple(state, op, left->type, 
+                       triple(state, op, left->type,

                                read_expr(state, left), right));
                break;
        }
                                read_expr(state, left), right));
                break;
        }


@@ -11711,7 +11711,7 @@ static void for_statement(struct compile_state *state, struct triple *first)
        head = test = tail = jmp1 = jmp2 = 0;
        if (peek(state) != TOK_SEMI) {
                head = expr(state);
        head = test = tail = jmp1 = jmp2 = 0;
        if (peek(state) != TOK_SEMI) {
                head = expr(state);

-       } 
+       }

        eat(state, TOK_SEMI);
        if (peek(state) != TOK_SEMI) {
                test = expr(state);
        eat(state, TOK_SEMI);
        if (peek(state) != TOK_SEMI) {
                test = expr(state);


@@ -11843,7 +11843,7 @@ static void return_statement(struct compile_state *state, struct triple *first)
        eat(state, TOK_SEMI);
 
        /* See if this last statement in a function */
        eat(state, TOK_SEMI);
 
        /* See if this last statement in a function */

-       last = ((peek(state) == TOK_RBRACE) && 
+       last = ((peek(state) == TOK_RBRACE) &&

                (state->scope_depth == GLOBAL_SCOPE_DEPTH +2));
 
        /* Find the return variable */
                (state->scope_depth == GLOBAL_SCOPE_DEPTH +2));
 
        /* Find the return variable */


@@ -12186,7 +12186,7 @@ static void asm_statement(struct compile_state *state, struct triple *first)
        for(i = 0; i < out; i++) {
                struct triple *constraint;
                constraint = out_param[i].constraint;
        for(i = 0; i < out; i++) {
                struct triple *constraint;
                constraint = out_param[i].constraint;

-               info->tmpl.lhs[i] = arch_reg_constraint(state, 
+               info->tmpl.lhs[i] = arch_reg_constraint(state,

                        out_param[i].expr->type, constraint->u.blob);
                free_triple(state, constraint);
        }
                        out_param[i].expr->type, constraint->u.blob);
                free_triple(state, constraint);
        }


@@ -12216,9 +12216,9 @@ static void asm_statement(struct compile_state *state, struct triple *first)
                        }
                        info->tmpl.lhs[val] = cinfo;
                        info->tmpl.rhs[i]   = cinfo;
                        }
                        info->tmpl.lhs[val] = cinfo;
                        info->tmpl.rhs[i]   = cinfo;

-                               
+

                } else {
                } else {

-                       info->tmpl.rhs[i] = arch_reg_constraint(state, 
+                       info->tmpl.rhs[i] = arch_reg_constraint(state,

                                in_param[i].expr->type, str);
                }
                free_triple(state, constraint);
                                in_param[i].expr->type, str);
                }
                free_triple(state, constraint);


@@ -12238,7 +12238,7 @@ static void asm_statement(struct compile_state *state, struct triple *first)
                        size_t size = arch_reg_size(info->tmpl.lhs[i].reg);
                        if (size >= SIZEOF_LONG) {
                                type = &ulong_type;
                        size_t size = arch_reg_size(info->tmpl.lhs[i].reg);
                        if (size >= SIZEOF_LONG) {
                                type = &ulong_type;

-                       } 
+                       }

                        else if (size >= SIZEOF_INT) {
                                type = &uint_type;
                        }
                        else if (size >= SIZEOF_INT) {
                                type = &uint_type;
                        }


@@ -12315,7 +12315,7 @@ static void statement(struct compile_state *state, struct triple *first)
                compound_statement(state, first);
        }
        else if (tok == TOK_IF) {
                compound_statement(state, first);
        }
        else if (tok == TOK_IF) {

-               if_statement(state, first); 
+               if_statement(state, first);

        }
        else if (tok == TOK_FOR) {
                for_statement(state, first);
        }
        else if (tok == TOK_FOR) {
                for_statement(state, first);


@@ -12345,7 +12345,7 @@ static void statement(struct compile_state *state, struct triple *first)
                asm_statement(state, first);
        }
        else if ((tok == TOK_IDENT) && (peek2(state) == TOK_COLON)) {
                asm_statement(state, first);
        }
        else if ((tok == TOK_IDENT) && (peek2(state) == TOK_COLON)) {

-               labeled_statement(state, first); 
+               labeled_statement(state, first);

        }
        else if (tok == TOK_CASE) {
                case_statement(state, first);
        }
        else if (tok == TOK_CASE) {
                case_statement(state, first);


@@ -12367,7 +12367,7 @@ static struct type *param_decl(struct compile_state *state)
        struct type *type;
        struct hash_entry *ident;
        /* Cheat so the declarator will know we are not global */
        struct type *type;
        struct hash_entry *ident;
        /* Cheat so the declarator will know we are not global */

-       start_scope(state); 
+       start_scope(state);

        ident = 0;
        type = decl_specifiers(state);
        type = declarator(state, type, &ident, 0);
        ident = 0;
        type = decl_specifiers(state);
        type = declarator(state, type, &ident, 0);


@@ -12407,7 +12407,7 @@ static struct type *type_name(struct compile_state *state)
 }
 
 static struct type *direct_declarator(
 }
 
 static struct type *direct_declarator(

-       struct compile_state *state, struct type *type, 
+       struct compile_state *state, struct type *type,

        struct hash_entry **pident, int need_ident)
 {
        struct hash_entry *ident;
        struct hash_entry **pident, int need_ident)
 {
        struct hash_entry *ident;


@@ -12485,7 +12485,7 @@ static struct type *direct_declarator(
 }
 
 static struct type *declarator(
 }
 
 static struct type *declarator(

-       struct compile_state *state, struct type *type, 
+       struct compile_state *state, struct type *type,

        struct hash_entry **pident, int need_ident)
 {
        while(peek(state) == TOK_STAR) {
        struct hash_entry **pident, int need_ident)
 {
        while(peek(state) == TOK_STAR) {


@@ -12504,7 +12504,7 @@ static struct type *typedef_name(
        ident = eat(state, TOK_TYPE_NAME)->ident;
        type = ident->sym_ident->type;
        specifiers |= type->type & QUAL_MASK;
        ident = eat(state, TOK_TYPE_NAME)->ident;
        type = ident->sym_ident->type;
        specifiers |= type->type & QUAL_MASK;

-       if ((specifiers & (STOR_MASK | QUAL_MASK)) != 
+       if ((specifiers & (STOR_MASK | QUAL_MASK)) !=

                (type->type & (STOR_MASK | QUAL_MASK))) {
                type = clone_type(specifiers, type);
        }
                (type->type & (STOR_MASK | QUAL_MASK))) {
                type = clone_type(specifiers, type);
        }


@@ -12538,7 +12538,7 @@ static struct type *enum_specifier(
                        struct type *entry;
                        eident = eat(state, TOK_IDENT)->ident;
                        if (eident->sym_ident) {
                        struct type *entry;
                        eident = eat(state, TOK_IDENT)->ident;
                        if (eident->sym_ident) {

-                               error(state, 0, "%s already declared", 
+                               error(state, 0, "%s already declared",

                                        eident->name);
                        }
                        eident->tok = TOK_ENUM_CONST;
                                        eident->name);
                        }
                        eident->tok = TOK_ENUM_CONST;


@@ -12671,13 +12671,13 @@ static struct type *struct_or_union_specifier(
                        symbol(state, ident, &ident->sym_tag, 0, struct_type);
                }
        }
                        symbol(state, ident, &ident->sym_tag, 0, struct_type);
                }
        }

-       if (ident && ident->sym_tag && 
-               ident->sym_tag->type && 
+       if (ident && ident->sym_tag &&
+               ident->sym_tag->type &&

                ((ident->sym_tag->type->type & TYPE_MASK) == type_main)) {
                struct_type = clone_type(spec, ident->sym_tag->type);
        }
        else if (ident && !struct_type) {
                ((ident->sym_tag->type->type & TYPE_MASK) == type_main)) {
                struct_type = clone_type(spec, ident->sym_tag->type);
        }
        else if (ident && !struct_type) {

-               error(state, 0, "%s %s undeclared", 
+               error(state, 0, "%s %s undeclared",

                        (type_main == TYPE_STRUCT)?"struct" : "union",
                        ident->name);
        }
                        (type_main == TYPE_STRUCT)?"struct" : "union",
                        ident->name);
        }


@@ -12965,7 +12965,7 @@ static struct type *type_specifier(
                type = typedef_name(state, spec);
                break;
        default:
                type = typedef_name(state, spec);
                break;
        default:

-               error(state, 0, "bad type specifier %s", 
+               error(state, 0, "bad type specifier %s",

                        tokens[tok]);
                break;
        }
                        tokens[tok]);
                break;
        }


@@ -13145,7 +13145,7 @@ static struct triple *initializer(
                        (equiv_types(type->left, result->type->left))) {
                        type->elements = result->type->elements;
                }
                        (equiv_types(type->left, result->type->left))) {
                        type->elements = result->type->elements;
                }

-               if (is_lvalue(state, result) && 
+               if (is_lvalue(state, result) &&

                        ((result->type->type & TYPE_MASK) == TYPE_ARRAY) &&
                        (type->type & TYPE_MASK) != TYPE_ARRAY)
                {
                        ((result->type->type & TYPE_MASK) == TYPE_ARRAY) &&
                        (type->type & TYPE_MASK) != TYPE_ARRAY)
                {


@@ -13211,7 +13211,7 @@ static struct triple *initializer(
                        }
                        dest = ((char *)buf) + bits_to_bytes(info.offset);
 #if DEBUG_INITIALIZER
                        }
                        dest = ((char *)buf) + bits_to_bytes(info.offset);
 #if DEBUG_INITIALIZER

-                       fprintf(state->errout, "dest = buf + %d max_offset: %d value_size: %d op: %d\n", 
+                       fprintf(state->errout, "dest = buf + %d max_offset: %d value_size: %d op: %d\n",

                                dest - buf,
                                bits_to_bytes(max_offset),
                                bits_to_bytes(value_size),
                                dest - buf,
                                bits_to_bytes(max_offset),
                                bits_to_bytes(value_size),


@@ -13243,7 +13243,7 @@ static struct triple *initializer(
                        info.offset += value_size;
                        if ((type->type & TYPE_MASK) == TYPE_STRUCT) {
                                info.type = next_field(state, type, info.type);
                        info.offset += value_size;
                        if ((type->type & TYPE_MASK) == TYPE_STRUCT) {
                                info.type = next_field(state, type, info.type);

-                               info.offset = field_offset(state, type, 
+                               info.offset = field_offset(state, type,

                                        info.type->field_ident);
                        }
                } while(comma && (peek(state) != TOK_RBRACE));
                                        info.type->field_ident);
                        }
                } while(comma && (peek(state) != TOK_RBRACE));


@@ -13338,7 +13338,7 @@ static struct triple *function_definition(
        if (((param->type & TYPE_MASK) != TYPE_VOID) && !param->field_ident) {
                error(state, 0, "No identifier for paramter %d\n", i);
        }
        if (((param->type & TYPE_MASK) != TYPE_VOID) && !param->field_ident) {
                error(state, 0, "No identifier for paramter %d\n", i);
        }

-       
+

        /* Get a list of statements for this function. */
        def = triple(state, OP_LIST, type, 0, 0);
 
        /* Get a list of statements for this function. */
        def = triple(state, OP_LIST, type, 0, 0);
 


@@ -13361,7 +13361,7 @@ static struct triple *function_definition(
        ctype->elements = 1;
 
        /* Add a variable for the return value */
        ctype->elements = 1;
 
        /* Add a variable for the return value */

-       crtype = new_type(TYPE_TUPLE, 
+       crtype = new_type(TYPE_TUPLE,

                /* Remove all type qualifiers from the return type */
                new_type(TYPE_PRODUCT, ctype, clone_type(0, type->left)), 0);
        crtype->elements = 2;
                /* Remove all type qualifiers from the return type */
                new_type(TYPE_PRODUCT, ctype, clone_type(0, type->left)), 0);
        crtype->elements = 2;


@@ -13394,7 +13394,7 @@ static struct triple *function_definition(
        }
 
        /* Add the declaration static const char __func__ [] = "func-name"  */
        }
 
        /* Add the declaration static const char __func__ [] = "func-name"  */

-       fname_type = new_type(TYPE_ARRAY, 
+       fname_type = new_type(TYPE_ARRAY,

                clone_type(QUAL_CONST | STOR_STATIC, &char_type), 0);
        fname_type->type |= QUAL_CONST | STOR_STATIC;
        fname_type->elements = strlen(state->function) + 1;
                clone_type(QUAL_CONST | STOR_STATIC, &char_type), 0);
        fname_type->type |= QUAL_CONST | STOR_STATIC;
        fname_type->elements = strlen(state->function) + 1;


@@ -13439,7 +13439,7 @@ static struct triple *function_definition(
        return def;
 }
 
        return def;
 }
 

-static struct triple *do_decl(struct compile_state *state, 
+static struct triple *do_decl(struct compile_state *state,

        struct type *type, struct hash_entry *ident)
 {
        struct triple *def;
        struct type *type, struct hash_entry *ident)
 {
        struct triple *def;


@@ -13477,7 +13477,7 @@ static struct triple *do_decl(struct compile_state *state,
                ((type->type & TYPE_MASK) == TYPE_ARRAY) &&
                ((type->type & STOR_MASK) != STOR_STATIC))
                error(state, 0, "non static arrays not supported");
                ((type->type & TYPE_MASK) == TYPE_ARRAY) &&
                ((type->type & STOR_MASK) != STOR_STATIC))
                error(state, 0, "non static arrays not supported");

-       if (ident && 
+       if (ident &&

                ((type->type & STOR_MASK) == STOR_STATIC) &&
                ((type->type & QUAL_CONST) == 0)) {
                error(state, 0, "non const static variables not supported");
                ((type->type & STOR_MASK) == STOR_STATIC) &&
                ((type->type & QUAL_CONST) == 0)) {
                error(state, 0, "non const static variables not supported");


@@ -13520,8 +13520,8 @@ static void decl(struct compile_state *state, struct triple *first)
                                }
                                eat(state, TOK_EQ);
                                flatten(state, first,
                                }
                                eat(state, TOK_EQ);
                                flatten(state, first,

-                                       init_expr(state, 
-                                               ident->sym_ident->def, 
+                                       init_expr(state,
+                                               ident->sym_ident->def,

                                                initializer(state, type)));
                        }
                        arrays_complete(state, type);
                                                initializer(state, type)));
                        }
                        arrays_complete(state, type);


@@ -13557,7 +13557,7 @@ static void decls(struct compile_state *state)
        }
 }
 
        }
 }
 

-/* 
+/*

  * Function inlining
  */
 struct triple_reg_set {
  * Function inlining
  */
 struct triple_reg_set {


@@ -13580,21 +13580,21 @@ static void walk_blocks(struct compile_state *state, struct basic_blocks *bb,
        void *arg);
 static void print_block(
        struct compile_state *state, struct block *block, void *arg);
        void *arg);
 static void print_block(
        struct compile_state *state, struct block *block, void *arg);

-static int do_triple_set(struct triple_reg_set **head, 
+static int do_triple_set(struct triple_reg_set **head,

        struct triple *member, struct triple *new_member);
 static void do_triple_unset(struct triple_reg_set **head, struct triple *member);
 static struct reg_block *compute_variable_lifetimes(
        struct compile_state *state, struct basic_blocks *bb);
        struct triple *member, struct triple *new_member);
 static void do_triple_unset(struct triple_reg_set **head, struct triple *member);
 static struct reg_block *compute_variable_lifetimes(
        struct compile_state *state, struct basic_blocks *bb);

-static void free_variable_lifetimes(struct compile_state *state, 
+static void free_variable_lifetimes(struct compile_state *state,

        struct basic_blocks *bb, struct reg_block *blocks);
 #if DEBUG_EXPLICIT_CLOSURES
        struct basic_blocks *bb, struct reg_block *blocks);
 #if DEBUG_EXPLICIT_CLOSURES

-static void print_live_variables(struct compile_state *state, 
+static void print_live_variables(struct compile_state *state,

        struct basic_blocks *bb, struct reg_block *rb, FILE *fp);
 #endif
 
 
 static struct triple *call(struct compile_state *state,
        struct basic_blocks *bb, struct reg_block *rb, FILE *fp);
 #endif
 
 
 static struct triple *call(struct compile_state *state,

-       struct triple *retvar, struct triple *ret_addr, 
+       struct triple *retvar, struct triple *ret_addr,

        struct triple *targ, struct triple *ret)
 {
        struct triple *call;
        struct triple *targ, struct triple *ret)
 {
        struct triple *call;


@@ -13673,19 +13673,19 @@ static void mark_live(struct compile_state *state, struct triple *func, void *ar
 
 static void mark_live_functions(struct compile_state *state)
 {
 
 static void mark_live_functions(struct compile_state *state)
 {

-       /* Ensure state->main_function is the last function in 
+       /* Ensure state->main_function is the last function in

         * the list of functions.
         */
        if ((state->main_function->next != state->functions) ||
                (state->functions->prev != state->main_function)) {
         * the list of functions.
         */
        if ((state->main_function->next != state->functions) ||
                (state->functions->prev != state->main_function)) {

-               internal_error(state, 0, 
+               internal_error(state, 0,

                        "state->main_function is not at the end of the function list ");
        }
        state->main_function->u.cval = 1;
        reverse_walk_functions(state, mark_live, 0);
 }
 
                        "state->main_function is not at the end of the function list ");
        }
        state->main_function->u.cval = 1;
        reverse_walk_functions(state, mark_live, 0);
 }
 

-static int local_triple(struct compile_state *state, 
+static int local_triple(struct compile_state *state,

        struct triple *func, struct triple *ins)
 {
        int local = (ins->id & TRIPLE_FLAG_LOCAL);
        struct triple *func, struct triple *ins)
 {
        int local = (ins->id & TRIPLE_FLAG_LOCAL);


@@ -13699,7 +13699,7 @@ static int local_triple(struct compile_state *state,
        return local;
 }
 
        return local;
 }
 

-struct triple *copy_func(struct compile_state *state, struct triple *ofunc, 
+struct triple *copy_func(struct compile_state *state, struct triple *ofunc,

        struct occurance *base_occurance)
 {
        struct triple *nfunc;
        struct occurance *base_occurance)
 {
        struct triple *nfunc;


@@ -13742,7 +13742,7 @@ struct triple *copy_func(struct compile_state *state, struct triple *ofunc,
                }
                new->id |= TRIPLE_FLAG_FLATTENED;
                new->id |= old->id & TRIPLE_FLAG_COPY;
                }
                new->id |= TRIPLE_FLAG_FLATTENED;
                new->id |= old->id & TRIPLE_FLAG_COPY;

-               
+

                /* During the copy remember new as user of old */
                use_triple(old, new);
 
                /* During the copy remember new as user of old */
                use_triple(old, new);
 


@@ -13781,7 +13781,7 @@ struct triple *copy_func(struct compile_state *state, struct triple *ofunc,
                old = old->next;
                new = new->next;
        } while((old != ofirst) && (new != nfirst));
                old = old->next;
                new = new->next;
        } while((old != ofirst) && (new != nfirst));

-       
+

        /* Make a third pass to cleanup the extra useses */
        old = ofirst;
        new = nfirst;
        /* Make a third pass to cleanup the extra useses */
        old = ofirst;
        new = nfirst;


@@ -13830,7 +13830,7 @@ static void expand_inline_call(
        }
        result = 0;
        if ((nfunc->type->left->type & TYPE_MASK) != TYPE_VOID) {
        }
        result = 0;
        if ((nfunc->type->left->type & TYPE_MASK) != TYPE_VOID) {

-               result = read_expr(state, 
+               result = read_expr(state,

                        deref_index(state, fresult(state, nfunc), 1));
        }
        if (state->compiler->debug & DEBUG_INLINE) {
                        deref_index(state, fresult(state, nfunc), 1));
        }
        if (state->compiler->debug & DEBUG_INLINE) {


@@ -13842,8 +13842,8 @@ static void expand_inline_call(
                fprintf(fp, "__________ %s _________ done\n\n", __FUNCTION__);
        }
 
                fprintf(fp, "__________ %s _________ done\n\n", __FUNCTION__);
        }
 

-       /* 
-        * Get rid of the extra triples 
+       /*
+        * Get rid of the extra triples

         */
        /* Remove the read of the return address */
        ins = RHS(nfunc, 0)->prev->prev;
         */
        /* Remove the read of the return address */
        ins = RHS(nfunc, 0)->prev->prev;


@@ -13859,7 +13859,7 @@ static void expand_inline_call(
        release_triple(state, ins);
        /* Remove the retaddres variable */
        retvar = fretaddr(state, nfunc);
        release_triple(state, ins);
        /* Remove the retaddres variable */
        retvar = fretaddr(state, nfunc);

-       if ((retvar->lhs != 1) || 
+       if ((retvar->lhs != 1) ||

                (retvar->op != OP_ADECL) ||
                (retvar->next->op != OP_PIECE) ||
                (MISC(retvar->next, 0) != retvar)) {
                (retvar->op != OP_ADECL) ||
                (retvar->next->op != OP_PIECE) ||
                (MISC(retvar->next, 0) != retvar)) {


@@ -13902,7 +13902,7 @@ static void expand_inline_call(
 /*
  *
  * Type of the result variable.
 /*
  *
  * Type of the result variable.

- * 
+ *

  *                                     result
  *                                        |
  *                             +----------+------------+
  *                                     result
  *                                        |
  *                             +----------+------------+


@@ -13912,7 +13912,7 @@ static void expand_inline_call(
  *          +------------------+---------------+
  *          |                                  |
  *       closure1                    ...   closuerN
  *          +------------------+---------------+
  *          |                                  |
  *       closure1                    ...   closuerN

- *          |                                  | 
+ *          |                                  |

  *  +----+--+-+--------+-----+       +----+----+---+-----+
  *  |    |    |        |     |       |    |        |     |
  * var1 var2 var3 ... varN result   var1 var2 ... varN result
  *  +----+--+-+--------+-----+       +----+----+---+-----+
  *  |    |    |        |     |       |    |        |     |
  * var1 var2 var3 ... varN result   var1 var2 ... varN result


@@ -13930,7 +13930,7 @@ static void expand_inline_call(
  * var1 var2 ... varN result  var1 var2 ... varN result
  */
 
  * var1 var2 ... varN result  var1 var2 ... varN result
  */
 

-static int add_closure_type(struct compile_state *state, 
+static int add_closure_type(struct compile_state *state,

        struct triple *func, struct type *closure_type)
 {
        struct type *type, *ctype, **next;
        struct triple *func, struct type *closure_type)
 {
        struct type *type, *ctype, **next;


@@ -13963,19 +13963,19 @@ static int add_closure_type(struct compile_state *state,
        fprintf(fp, "new_type: ");
        name_of(fp, type);
        fprintf(fp, "\n");
        fprintf(fp, "new_type: ");
        name_of(fp, type);
        fprintf(fp, "\n");

-       fprintf(fp, "ctype: %p %d bits: %d ", 
+       fprintf(fp, "ctype: %p %d bits: %d ",

                ctype, ctype->elements, reg_size_of(state, ctype));
        name_of(fp, ctype);
        fprintf(fp, "\n");
 #endif
                ctype, ctype->elements, reg_size_of(state, ctype));
        name_of(fp, ctype);
        fprintf(fp, "\n");
 #endif

-       
+

        /* Regenerate the variable with the new type definition */
        new_var = pre_triple(state, var, OP_ADECL, type, 0, 0);
        new_var->id |= TRIPLE_FLAG_FLATTENED;
        for(i = 0; i < new_var->lhs; i++) {
                LHS(new_var, i)->id |= TRIPLE_FLAG_FLATTENED;
        }
        /* Regenerate the variable with the new type definition */
        new_var = pre_triple(state, var, OP_ADECL, type, 0, 0);
        new_var->id |= TRIPLE_FLAG_FLATTENED;
        for(i = 0; i < new_var->lhs; i++) {
                LHS(new_var, i)->id |= TRIPLE_FLAG_FLATTENED;
        }

-       
+

        /* Point everyone at the new variable */
        propogate_use(state, var, new_var);
 
        /* Point everyone at the new variable */
        propogate_use(state, var, new_var);
 


@@ -13984,7 +13984,7 @@ static int add_closure_type(struct compile_state *state,
                release_triple(state, LHS(var, i));
        }
        release_triple(state, var);
                release_triple(state, LHS(var, i));
        }
        release_triple(state, var);

-       
+

        /* Return the index of the added closure type */
        return ctype->elements - 1;
 }
        /* Return the index of the added closure type */
        return ctype->elements - 1;
 }


@@ -14079,7 +14079,7 @@ static int lookup_closure_index(struct compile_state *state,
                for(index0 = ins->next->next;
                        (index0->op == OP_INDEX) &&
                                (MISC(index0, 0) == result) &&
                for(index0 = ins->next->next;
                        (index0->op == OP_INDEX) &&
                                (MISC(index0, 0) == result) &&

-                               (index0->u.cval == 0) ; 
+                               (index0->u.cval == 0) ;

                        index0 = write->next)
                {
                        index1 = index0->next;
                        index0 = write->next)
                {
                        index1 = index0->next;


@@ -14123,12 +14123,12 @@ static void compute_closure_variables(struct compile_state *state,
        int i, max_index;
 #define MAX_INDICIES (sizeof(used_indicies)*CHAR_BIT)
 #define ID_BITS(X) ((X) & (TRIPLE_FLAG_LOCAL -1))
        int i, max_index;
 #define MAX_INDICIES (sizeof(used_indicies)*CHAR_BIT)
 #define ID_BITS(X) ((X) & (TRIPLE_FLAG_LOCAL -1))

-       struct { 
+       struct {

                unsigned id;
                int index;
        } *info;
 
                unsigned id;
                int index;
        } *info;
 

-       
+

        /* Find the basic blocks of this function */
        bb.func = me;
        bb.first = RHS(me, 0);
        /* Find the basic blocks of this function */
        bb.func = me;
        bb.first = RHS(me, 0);


@@ -14177,7 +14177,7 @@ static void compute_closure_variables(struct compile_state *state,
                ins = ins->next;
        } while(ins != first);
 
                ins = ins->next;
        } while(ins != first);
 

-       /* 
+       /*

         * Build the list of variables to enclose.
         *
         * A target it to put the same variable in the
         * Build the list of variables to enclose.
         *
         * A target it to put the same variable in the


@@ -14362,7 +14362,7 @@ static void expand_function_call(
                if (!*closure_next) {
                        *closure_next = type;
                } else {
                if (!*closure_next) {
                        *closure_next = type;
                } else {

-                       *closure_next = new_type(TYPE_PRODUCT, *closure_next, 
+                       *closure_next = new_type(TYPE_PRODUCT, *closure_next,

                                type);
                        closure_next = &(*closure_next)->right;
                }
                                type);
                        closure_next = &(*closure_next)->right;
                }


@@ -14422,22 +14422,22 @@ static void expand_function_call(
 
        /* Initialize the return value */
        if ((rtype->type & TYPE_MASK) != TYPE_VOID) {
 
        /* Initialize the return value */
        if ((rtype->type & TYPE_MASK) != TYPE_VOID) {

-               flatten(state, ret_loc, 
-                       write_expr(state, 
+               flatten(state, ret_loc,
+                       write_expr(state,

                                deref_index(state, fresult(state, func), 1),
                                new_triple(state, OP_UNKNOWNVAL, rtype,  0, 0)));
        }
 
        ret_addr      = flatten(state, ret_loc, ret_addr);
        ret_set       = flatten(state, ret_loc, write_expr(state, retvar, ret_addr));
                                deref_index(state, fresult(state, func), 1),
                                new_triple(state, OP_UNKNOWNVAL, rtype,  0, 0)));
        }
 
        ret_addr      = flatten(state, ret_loc, ret_addr);
        ret_set       = flatten(state, ret_loc, write_expr(state, retvar, ret_addr));

-       jmp           = flatten(state, ret_loc, 
+       jmp           = flatten(state, ret_loc,

                call(state, retvar, ret_addr, func_first, func_last));
 
        /* Find the result */
        if ((rtype->type & TYPE_MASK) != TYPE_VOID) {
                struct triple * result;
                call(state, retvar, ret_addr, func_first, func_last));
 
        /* Find the result */
        if ((rtype->type & TYPE_MASK) != TYPE_VOID) {
                struct triple * result;

-               result = flatten(state, first, 
-                       read_expr(state, 
+               result = flatten(state, first,
+                       read_expr(state,

                                deref_index(state, fresult(state, func), 1)));
 
                propogate_use(state, fcall, result);
                                deref_index(state, fresult(state, func), 1)));
 
                propogate_use(state, fcall, result);


@@ -14456,7 +14456,7 @@ static void expand_function_call(
                }
                /* Generate an expression for the value */
                new = flatten(state, first,
                }
                /* Generate an expression for the value */
                new = flatten(state, first,

-                       read_expr(state, 
+                       read_expr(state,

                                closure_expr(state, func, closure_idx, i)));
 
 
                                closure_expr(state, func, closure_idx, i)));
 
 


@@ -14469,7 +14469,7 @@ static void expand_function_call(
                /*
                 * If the original is a value update the dominated uses.
                 */
                /*
                 * If the original is a value update the dominated uses.
                 */

-               
+

                /* Analyze the basic blocks so I can see who dominates whom */
                bb.func = me;
                bb.first = RHS(me, 0);
                /* Analyze the basic blocks so I can see who dominates whom */
                bb.func = me;
                bb.first = RHS(me, 0);


@@ -14477,7 +14477,7 @@ static void expand_function_call(
                        bb.func = 0;
                }
                analyze_basic_blocks(state, &bb);
                        bb.func = 0;
                }
                analyze_basic_blocks(state, &bb);

-               
+

 
 #if DEBUG_EXPLICIT_CLOSURES
                fprintf(state->errout, "Updating domindated uses: %p -> %p\n",
 
 #if DEBUG_EXPLICIT_CLOSURES
                fprintf(state->errout, "Updating domindated uses: %p -> %p\n",


@@ -14485,7 +14485,7 @@ static void expand_function_call(
 #endif
                /* If fcall dominates the use update the expression */
                for(use = set->member->use; use; use = next) {
 #endif
                /* If fcall dominates the use update the expression */
                for(use = set->member->use; use; use = next) {

-                       /* Replace use modifies the use chain and 
+                       /* Replace use modifies the use chain and

                         * removes use, so I must take a copy of the
                         * next entry early.
                         */
                         * removes use, so I must take a copy of the
                         * next entry early.
                         */


@@ -14678,7 +14678,7 @@ static void insert_function(struct compile_state *state,
 
        if (state->compiler->debug & DEBUG_INLINE) {
                FILE *fp = state->errout;
 
        if (state->compiler->debug & DEBUG_INLINE) {
                FILE *fp = state->errout;

-               fprintf(fp, "%s func count: %d\n", 
+               fprintf(fp, "%s func count: %d\n",

                        func->type->type_ident->name, func->u.cval);
        }
        if (func->u.cval == 0) {
                        func->type->type_ident->name, func->u.cval);
        }
        if (func->u.cval == 0) {


@@ -14703,7 +14703,7 @@ struct triple *input_asm(struct compile_state *state)
        struct asm_info *info;
        struct triple *def;
        int i, out;
        struct asm_info *info;
        struct triple *def;
        int i, out;

-       
+

        info = xcmalloc(sizeof(*info), "asm_info");
        info->str = "";
 
        info = xcmalloc(sizeof(*info), "asm_info");
        info->str = "";
 


@@ -14713,7 +14713,7 @@ struct triple *input_asm(struct compile_state *state)
        def = new_triple(state, OP_ASM, &void_type, out, 0);
        def->u.ainfo = info;
        def->id |= TRIPLE_FLAG_VOLATILE;
        def = new_triple(state, OP_ASM, &void_type, out, 0);
        def->u.ainfo = info;
        def->id |= TRIPLE_FLAG_VOLATILE;

-       
+

        for(i = 0; i < out; i++) {
                struct triple *piece;
                piece = triple(state, OP_PIECE, &int_type, def, 0);
        for(i = 0; i < out; i++) {
                struct triple *piece;
                piece = triple(state, OP_PIECE, &int_type, def, 0);


@@ -14729,7 +14729,7 @@ struct triple *output_asm(struct compile_state *state)
        struct asm_info *info;
        struct triple *def;
        int in;
        struct asm_info *info;
        struct triple *def;
        int in;

-       
+

        info = xcmalloc(sizeof(*info), "asm_info");
        info->str = "";
 
        info = xcmalloc(sizeof(*info), "asm_info");
        info->str = "";
 


@@ -14739,7 +14739,7 @@ struct triple *output_asm(struct compile_state *state)
        def = new_triple(state, OP_ASM, &void_type, 0, in);
        def->u.ainfo = info;
        def->id |= TRIPLE_FLAG_VOLATILE;
        def = new_triple(state, OP_ASM, &void_type, 0, in);
        def->u.ainfo = info;
        def->id |= TRIPLE_FLAG_VOLATILE;

-       
+

        return def;
 }
 
        return def;
 }
 


@@ -14776,11 +14776,11 @@ static void join_functions(struct compile_state *state)
 
        /* Verify the external arguments */
        if (registers_of(state, args_type) > ARCH_INPUT_REGS) {
 
        /* Verify the external arguments */
        if (registers_of(state, args_type) > ARCH_INPUT_REGS) {

-               error(state, state->main_function, 
+               error(state, state->main_function,

                        "Too many external input arguments");
        }
        if (registers_of(state, result_type) > ARCH_OUTPUT_REGS) {
                        "Too many external input arguments");
        }
        if (registers_of(state, result_type) > ARCH_OUTPUT_REGS) {

-               error(state, state->main_function, 
+               error(state, state->main_function,

                        "Too many external output arguments");
        }
 
                        "Too many external output arguments");
        }
 


@@ -14810,8 +14810,8 @@ static void join_functions(struct compile_state *state)
                        param = param->left;
                }
                if (registers_of(state, param) != 1) {
                        param = param->left;
                }
                if (registers_of(state, param) != 1) {

-                       error(state, state->main_function, 
-                               "Arg: %d %s requires multiple registers", 
+                       error(state, state->main_function,
+                               "Arg: %d %s requires multiple registers",

                                idx + 1, param->field_ident->name);
                }
                expr = read_expr(state, LHS(in, idx));
                                idx + 1, param->field_ident->name);
                }
                expr = read_expr(state, LHS(in, idx));


@@ -14819,7 +14819,7 @@ static void join_functions(struct compile_state *state)
                expr = flatten(state, call, expr);
                use_triple(expr, call);
 
                expr = flatten(state, call, expr);
                use_triple(expr, call);
 

-               idx++;  
+               idx++;

        }
 
 
        }
 
 


@@ -14858,7 +14858,7 @@ static void join_functions(struct compile_state *state)
        }
 
        /* Allocate a dummy containing function */
        }
 
        /* Allocate a dummy containing function */

-       func = triple(state, OP_LIST, 
+       func = triple(state, OP_LIST,

                new_type(TYPE_FUNCTION, &void_type, &void_type), 0, 0);
        func->type->type_ident = lookup(state, "", 0);
        RHS(func, 0) = state->first;
                new_type(TYPE_FUNCTION, &void_type, &void_type), 0, 0);
        func->type->type_ident = lookup(state, "", 0);
        RHS(func, 0) = state->first;


@@ -14887,7 +14887,7 @@ static void join_functions(struct compile_state *state)
 
 
 static int do_use_block(
 
 
 static int do_use_block(

-       struct block *used, struct block_set **head, struct block *user, 
+       struct block *used, struct block_set **head, struct block *user,

        int front)
 {
        struct block_set **ptr, *new;
        int front)
 {
        struct block_set **ptr, *new;


@@ -14942,13 +14942,13 @@ static void use_block(struct block *used, struct block *user)
        /* Append new to the head of the list, print_block
         * depends on this.
         */
        /* Append new to the head of the list, print_block
         * depends on this.
         */

-       count = do_use_block(used, &used->use, user, 1); 
+       count = do_use_block(used, &used->use, user, 1);

        used->users += count;
 }
 static void unuse_block(struct block *used, struct block *unuser)
 {
        int count;
        used->users += count;
 }
 static void unuse_block(struct block *used, struct block *unuser)
 {
        int count;

-       count = do_unuse_block(used, &used->use, unuser); 
+       count = do_unuse_block(used, &used->use, unuser);

        used->users -= count;
 }
 
        used->users -= count;
 }
 


@@ -15007,7 +15007,7 @@ static void unipdomf_block(struct block *block, struct block *unipdomf)
 }
 
 static int walk_triples(
 }
 
 static int walk_triples(

-       struct compile_state *state, 
+       struct compile_state *state,

        int (*cb)(struct compile_state *state, struct triple *ptr, void *arg),
        void *arg)
 {
        int (*cb)(struct compile_state *state, struct triple *ptr, void *arg),
        void *arg)
 {


@@ -15040,7 +15040,7 @@ static int do_print_triple(struct compile_state *state, struct triple *ins, void
        }
        display_triple(fp, ins);
 
        }
        display_triple(fp, ins);
 

-       if (triple_is_branch(state, ins) && ins->use && 
+       if (triple_is_branch(state, ins) && ins->use &&

                (ins->op != OP_RET) && (ins->op != OP_FCALL)) {
                internal_error(state, ins, "branch used?");
        }
                (ins->op != OP_RET) && (ins->op != OP_FCALL)) {
                internal_error(state, ins, "branch used?");
        }


@@ -15161,7 +15161,7 @@ static void free_basic_block(struct compile_state *state, struct block *block)
        while((edge = block->edges)) {
                child = edge->member;
                remove_block_edge(block, child);
        while((edge = block->edges)) {
                child = edge->member;
                remove_block_edge(block, child);

-               
+

                if (child && (child->vertex != -1)) {
                        free_basic_block(state, child);
                }
                if (child && (child->vertex != -1)) {
                        free_basic_block(state, child);
                }


@@ -15172,7 +15172,7 @@ static void free_basic_block(struct compile_state *state, struct block *block)
 #endif
 }
 
 #endif
 }
 

-static void free_basic_blocks(struct compile_state *state, 
+static void free_basic_blocks(struct compile_state *state,

        struct basic_blocks *bb)
 {
        struct triple *first, *ins;
        struct basic_blocks *bb)
 {
        struct triple *first, *ins;


@@ -15187,10 +15187,10 @@ static void free_basic_blocks(struct compile_state *state,
                }
                ins = ins->next;
        } while(ins != first);
                }
                ins = ins->next;
        } while(ins != first);

-       
+

 }
 
 }
 

-static struct block *basic_block(struct compile_state *state, 
+static struct block *basic_block(struct compile_state *state,

        struct basic_blocks *bb, struct triple *first)
 {
        struct block *block;
        struct basic_blocks *bb, struct triple *first)
 {
        struct block *block;


@@ -15209,7 +15209,7 @@ static struct block *basic_block(struct compile_state *state,
        block->vertex = bb->last_vertex;
        ptr = first;
        do {
        block->vertex = bb->last_vertex;
        ptr = first;
        do {

-               if ((ptr != first) && triple_is_label(state, ptr) && (ptr->use)) { 
+               if ((ptr != first) && triple_is_label(state, ptr) && (ptr->use)) {

                        break;
                }
                block->last = ptr;
                        break;
                }
                block->last = ptr;


@@ -15224,7 +15224,7 @@ static struct block *basic_block(struct compile_state *state,
        } while (ptr != bb->first);
        if ((ptr == bb->first) ||
                ((ptr->next == bb->first) && (
        } while (ptr != bb->first);
        if ((ptr == bb->first) ||
                ((ptr->next == bb->first) && (

-                       triple_is_end(state, ptr) || 
+                       triple_is_end(state, ptr) ||

                        triple_is_ret(state, ptr))))
        {
                /* The block has no outflowing edges */
                        triple_is_ret(state, ptr))))
        {
                /* The block has no outflowing edges */


@@ -15289,7 +15289,7 @@ static struct block *basic_block(struct compile_state *state,
        struct block_set *edge;
        FILE *fp = state->errout;
        fprintf(fp, "basic_block: %10p [%2d] ( %10p - %10p )",
        struct block_set *edge;
        FILE *fp = state->errout;
        fprintf(fp, "basic_block: %10p [%2d] ( %10p - %10p )",

-               block, block->vertex, 
+               block, block->vertex,

                block->first, block->last);
        for(edge = block->edges; edge; edge = edge->next) {
                fprintf(fp, " %10p [%2d]",
                block->first, block->last);
        for(edge = block->edges; edge; edge = edge->next) {
                fprintf(fp, " %10p [%2d]",


@@ -15333,7 +15333,7 @@ static void print_block(
        FILE *fp = arg;
 
        fprintf(fp, "\nblock: %p (%d) ",
        FILE *fp = arg;
 
        fprintf(fp, "\nblock: %p (%d) ",

-               block, 
+               block,

                block->vertex);
 
        for(edge = block->edges; edge; edge = edge->next) {
                block->vertex);
 
        for(edge = block->edges; edge; edge = edge->next) {


@@ -15357,7 +15357,7 @@ static void print_block(
        }
        fprintf(fp, "users %d: ", block->users);
        for(user = block->use; user; user = user->next) {
        }
        fprintf(fp, "users %d: ", block->users);
        for(user = block->use; user; user = user->next) {

-               fprintf(fp, "%p (%d) ", 
+               fprintf(fp, "%p (%d) ",

                        user->member,
                        user->member->vertex);
        }
                        user->member,
                        user->member->vertex);
        }


@@ -15383,7 +15383,7 @@ static void print_blocks(struct compile_state *state, const char *func, FILE *fp
        }
 }
 
        }
 }
 

-static void prune_nonblock_triples(struct compile_state *state, 
+static void prune_nonblock_triples(struct compile_state *state,

        struct basic_blocks *bb)
 {
        struct block *block;
        struct basic_blocks *bb)
 {
        struct block *block;


@@ -15415,7 +15415,7 @@ static void prune_nonblock_triples(struct compile_state *state,
        } while(ins != first);
 }
 
        } while(ins != first);
 }
 

-static void setup_basic_blocks(struct compile_state *state, 
+static void setup_basic_blocks(struct compile_state *state,

        struct basic_blocks *bb)
 {
        if (!triple_stores_block(state, bb->first)) {
        struct basic_blocks *bb)
 {
        if (!triple_stores_block(state, bb->first)) {


@@ -15430,8 +15430,8 @@ static void setup_basic_blocks(struct compile_state *state,
        bb->first_block = basic_block(state, bb, bb->first);
 
        /* Be certain the last instruction of a function, or the
        bb->first_block = basic_block(state, bb, bb->first);
 
        /* Be certain the last instruction of a function, or the

-        * entire program is in a basic block.  When it is not find 
-        * the start of the block, insert a label if necessary and build 
+        * entire program is in a basic block.  When it is not find
+        * the start of the block, insert a label if necessary and build

         * basic block.  Then add a fake edge from the start block
         * to the final block.
         */
         * basic block.  Then add a fake edge from the start block
         * to the final block.
         */


@@ -15447,7 +15447,7 @@ static void setup_basic_blocks(struct compile_state *state,
                add_block_edge(bb->first_block, tail, 0);
                use_block(tail, bb->first_block);
        }
                add_block_edge(bb->first_block, tail, 0);
                use_block(tail, bb->first_block);
        }

-       
+

        /* Find the last basic block.
         */
        bb->last_block = block_of_triple(state, bb->first->prev);
        /* Find the last basic block.
         */
        bb->last_block = block_of_triple(state, bb->first->prev);


@@ -15548,7 +15548,7 @@ static int initialize_spdblock(
        return vertex;
 }
 
        return vertex;
 }
 

-static int setup_spdblocks(struct compile_state *state, 
+static int setup_spdblocks(struct compile_state *state,

        struct basic_blocks *bb, struct sdom_block *sd)
 {
        struct block *block;
        struct basic_blocks *bb, struct sdom_block *sd)
 {
        struct block *block;


@@ -15558,7 +15558,7 @@ static int setup_spdblocks(struct compile_state *state,
 
        /* Walk through the graph and find unconnected blocks.  Add a
         * fake edge from the unconnected blocks to the end of the
 
        /* Walk through the graph and find unconnected blocks.  Add a
         * fake edge from the unconnected blocks to the end of the

-        * graph. 
+        * graph.

         */
        block = bb->first_block->last->next->u.block;
        for(; block && block != bb->first_block; block = block->last->next->u.block) {
         */
        block = bb->first_block->last->next->u.block;
        for(; block && block != bb->first_block; block = block->last->next->u.block) {


@@ -15602,16 +15602,16 @@ static void compress_ancestors(struct sdom_block *v)
        }
 }
 
        }
 }
 

-static void compute_sdom(struct compile_state *state, 
+static void compute_sdom(struct compile_state *state,

        struct basic_blocks *bb, struct sdom_block *sd)
 {
        int i;
        struct basic_blocks *bb, struct sdom_block *sd)
 {
        int i;

-       /* // step 2 
+       /* // step 2

         *  for each v <= pred(w) {
         *      u = EVAL(v);
         *  for each v <= pred(w) {
         *      u = EVAL(v);

-        *      if (semi[u] < semi[w] { 
-        *              semi[w] = semi[u]; 
-        *      } 
+        *      if (semi[u] < semi[w] {
+        *              semi[w] = semi[u];
+        *      }

         * }
         * add w to bucket(vertex(semi[w]));
         * LINK(parent(w), w);
         * }
         * add w to bucket(vertex(semi[w]));
         * LINK(parent(w), w);


@@ -15646,22 +15646,22 @@ static void compute_sdom(struct compile_state *state,
                        next = v->sdom_next;
                        unsdom_block(v);
                        u = (!v->ancestor) ? v : (compress_ancestors(v), v->label);
                        next = v->sdom_next;
                        unsdom_block(v);
                        u = (!v->ancestor) ? v : (compress_ancestors(v), v->label);

-                       v->block->idom = (u->sdom->vertex < v->sdom->vertex)? 
+                       v->block->idom = (u->sdom->vertex < v->sdom->vertex)?

                                u->block : parent->block;
                }
        }
 }
 
                                u->block : parent->block;
                }
        }
 }
 

-static void compute_spdom(struct compile_state *state, 
+static void compute_spdom(struct compile_state *state,

        struct basic_blocks *bb, struct sdom_block *sd)
 {
        int i;
        struct basic_blocks *bb, struct sdom_block *sd)
 {
        int i;

-       /* // step 2 
+       /* // step 2

         *  for each v <= pred(w) {
         *      u = EVAL(v);
         *  for each v <= pred(w) {
         *      u = EVAL(v);

-        *      if (semi[u] < semi[w] { 
-        *              semi[w] = semi[u]; 
-        *      } 
+        *      if (semi[u] < semi[w] {
+        *              semi[w] = semi[u];
+        *      }

         * }
         * add w to bucket(vertex(semi[w]));
         * LINK(parent(w), w);
         * }
         * add w to bucket(vertex(semi[w]));
         * LINK(parent(w), w);


@@ -15695,13 +15695,13 @@ static void compute_spdom(struct compile_state *state,
                        next = v->sdom_next;
                        unsdom_block(v);
                        u = (!v->ancestor) ? v : (compress_ancestors(v), v->label);
                        next = v->sdom_next;
                        unsdom_block(v);
                        u = (!v->ancestor) ? v : (compress_ancestors(v), v->label);

-                       v->block->ipdom = (u->sdom->vertex < v->sdom->vertex)? 
+                       v->block->ipdom = (u->sdom->vertex < v->sdom->vertex)?

                                u->block : parent->block;
                }
        }
 }
 
                                u->block : parent->block;
                }
        }
 }
 

-static void compute_idom(struct compile_state *state, 
+static void compute_idom(struct compile_state *state,

        struct basic_blocks *bb, struct sdom_block *sd)
 {
        int i;
        struct basic_blocks *bb, struct sdom_block *sd)
 {
        int i;


@@ -15716,7 +15716,7 @@ static void compute_idom(struct compile_state *state,
        sd[1].block->idom = 0;
 }
 
        sd[1].block->idom = 0;
 }
 

-static void compute_ipdom(struct compile_state *state, 
+static void compute_ipdom(struct compile_state *state,

        struct basic_blocks *bb, struct sdom_block *sd)
 {
        int i;
        struct basic_blocks *bb, struct sdom_block *sd)
 {
        int i;


@@ -15733,13 +15733,13 @@ static void compute_ipdom(struct compile_state *state,
 
        /* Theorem 1:
         *   Every vertex of a flowgraph G = (V, E, r) except r has
 
        /* Theorem 1:
         *   Every vertex of a flowgraph G = (V, E, r) except r has

-        *   a unique immediate dominator.  
+        *   a unique immediate dominator.

         *   The edges {(idom(w), w) |w <= V - {r}} form a directed tree
         *   The edges {(idom(w), w) |w <= V - {r}} form a directed tree

-        *   rooted at r, called the dominator tree of G, such that 
+        *   rooted at r, called the dominator tree of G, such that

         *   v dominates w if and only if v is a proper ancestor of w in
         *   the dominator tree.
         */
         *   v dominates w if and only if v is a proper ancestor of w in
         *   the dominator tree.
         */

-       /* Lemma 1:  
+       /* Lemma 1:

         *   If v and w are vertices of G such that v <= w,
         *   than any path from v to w must contain a common ancestor
         *   of v and w in T.
         *   If v and w are vertices of G such that v <= w,
         *   than any path from v to w must contain a common ancestor
         *   of v and w in T.


@@ -15752,7 +15752,7 @@ static void compute_ipdom(struct compile_state *state,
         *   sdom(u) >= sdom(w).  Then idom(w) = sdom(w).
         */
        /* Theorem 3:
         *   sdom(u) >= sdom(w).  Then idom(w) = sdom(w).
         */
        /* Theorem 3:

-        *   Let w != r and let u be a vertex for which sdom(u) is 
+        *   Let w != r and let u be a vertex for which sdom(u) is

         *   minimum amoung vertices u satisfying sdom(w) -> u -> w.
         *   Then sdom(u) <= sdom(w) and idom(u) = idom(w).
         */
         *   minimum amoung vertices u satisfying sdom(w) -> u -> w.
         *   Then sdom(u) <= sdom(w) and idom(u) = idom(w).
         */


@@ -15770,11 +15770,11 @@ static void find_immediate_dominators(struct compile_state *state,
        /* Theorem 4:
         *   For any vertex w != r.
         *   sdom(w) = min(
        /* Theorem 4:
         *   For any vertex w != r.
         *   sdom(w) = min(

-        *                 {v|(v,w) <= E  and v < w } U 
+        *                 {v|(v,w) <= E  and v < w } U

         *                 {sdom(u) | u > w and there is an edge (v, w) such that u -> v})
         */
        /* Corollary 1:
         *                 {sdom(u) | u > w and there is an edge (v, w) such that u -> v})
         */
        /* Corollary 1:

-        *   Let w != r and let u be a vertex for which sdom(u) is 
+        *   Let w != r and let u be a vertex for which sdom(u) is

         *   minimum amoung vertices u satisfying sdom(w) -> u -> w.
         *   Then:
         *                   { sdom(w) if sdom(w) = sdom(u),
         *   minimum amoung vertices u satisfying sdom(w) -> u -> w.
         *   Then:
         *                   { sdom(w) if sdom(w) = sdom(u),


@@ -15782,7 +15782,7 @@ static void find_immediate_dominators(struct compile_state *state,
         *                   { idom(u) otherwise
         */
        /* The algorithm consists of the following 4 steps.
         *                   { idom(u) otherwise
         */
        /* The algorithm consists of the following 4 steps.

-        * Step 1.  Carry out a depth-first search of the problem graph.  
+        * Step 1.  Carry out a depth-first search of the problem graph.

         *    Number the vertices from 1 to N as they are reached during
         *    the search.  Initialize the variables used in succeeding steps.
         * Step 2.  Compute the semidominators of all vertices by applying
         *    Number the vertices from 1 to N as they are reached during
         *    the search.  Initialize the variables used in succeeding steps.
         * Step 2.  Compute the semidominators of all vertices by applying


@@ -15922,7 +15922,7 @@ static void print_dominated2(
        for(i = 0; i < depth; i++) {
                fprintf(fp, "   ");
        }
        for(i = 0; i < depth; i++) {
                fprintf(fp, "   ");
        }

-       fprintf(fp, "%3d: %p (%p - %p) @", 
+       fprintf(fp, "%3d: %p (%p - %p) @",

                block->vertex, block, block->first, block->last);
        ins = block->first;
        while(ins != block->last && (ins->occurance->line == 0)) {
                block->vertex, block, block->first, block->last);
        ins = block->first;
        while(ins != block->last && (ins->occurance->line == 0)) {


@@ -15973,7 +15973,7 @@ static int print_frontiers(
                fprintf(fp, " %d", user->member->vertex);
        }
        fprintf(fp, "\n");
                fprintf(fp, " %d", user->member->vertex);
        }
        fprintf(fp, "\n");

-       
+

        for(edge = block->edges; edge; edge = edge->next) {
                vertex = print_frontiers(state, fp, edge->member, vertex);
        }
        for(edge = block->edges; edge; edge = edge->next) {
                vertex = print_frontiers(state, fp, edge->member, vertex);
        }


@@ -15984,7 +15984,7 @@ static void print_dominance_frontiers(struct compile_state *state,
 {
        fprintf(fp, "\ndominance frontiers\n");
        print_frontiers(state, fp, bb->first_block, 0);
 {
        fprintf(fp, "\ndominance frontiers\n");
        print_frontiers(state, fp, bb->first_block, 0);

-       
+

 }
 
 static void analyze_idominators(struct compile_state *state, struct basic_blocks *bb)
 }
 
 static void analyze_idominators(struct compile_state *state, struct basic_blocks *bb)


@@ -16050,7 +16050,7 @@ static void print_ipdominance_frontiers(struct compile_state *state,
 {
        fprintf(fp, "\nipdominance frontiers\n");
        print_pfrontiers(state, fp, bb->last_block, 0);
 {
        fprintf(fp, "\nipdominance frontiers\n");
        print_pfrontiers(state, fp, bb->last_block, 0);

-       
+

 }
 
 static void analyze_ipdominators(struct compile_state *state,
 }
 
 static void analyze_ipdominators(struct compile_state *state,


@@ -16086,7 +16086,7 @@ static int tdominates(struct compile_state *state,
        bsub = block_of_triple(state, sub);
        if (bdom != bsub) {
                result = bdominates(state, bdom, bsub);
        bsub = block_of_triple(state, sub);
        if (bdom != bsub) {
                result = bdominates(state, bdom, bsub);

-       } 
+       }

        else {
                struct triple *ins;
                if (!bdom || !bsub) {
        else {
                struct triple *ins;
                if (!bdom || !bsub) {


@@ -16132,7 +16132,7 @@ static void insert_phi_operations(struct compile_state *state)
                if (!triple_is_auto_var(state, var) || !var->use) {
                        continue;
                }
                if (!triple_is_auto_var(state, var) || !var->use) {
                        continue;
                }

-                       
+

                iter += 1;
                work_list = 0;
                work_list_tail = &work_list;
                iter += 1;
                work_list = 0;
                work_list_tail = &work_list;


@@ -16145,7 +16145,7 @@ static void insert_phi_operations(struct compile_state *state)
                                continue;
                        }
                        if (user->member->op != OP_WRITE) {
                                continue;
                        }
                        if (user->member->op != OP_WRITE) {

-                               internal_error(state, user->member, 
+                               internal_error(state, user->member,

                                        "bad variable access");
                        }
                        block = user->member->u.block;
                                        "bad variable access");
                        }
                        block = user->member->u.block;


@@ -16178,7 +16178,7 @@ static void insert_phi_operations(struct compile_state *state)
                                /* Insert a phi function for this variable */
                                get_occurance(var->occurance);
                                phi = alloc_triple(
                                /* Insert a phi function for this variable */
                                get_occurance(var->occurance);
                                phi = alloc_triple(

-                                       state, OP_PHI, var->type, -1, in_edges, 
+                                       state, OP_PHI, var->type, -1, in_edges,

                                        var->occurance);
                                phi->u.block = front;
                                MISC(phi, 0) = var;
                                        var->occurance);
                                phi->u.block = front;
                                MISC(phi, 0) = var;


@@ -16581,7 +16581,7 @@ static void prune_unused_phis(struct compile_state *state)
        struct triple *first, *phi;
        struct phi_triple *live;
        int phis, i;
        struct triple *first, *phi;
        struct phi_triple *live;
        int phis, i;

-       
+

        /* Find the first instruction */
        first = state->first;
 
        /* Find the first instruction */
        first = state->first;
 


@@ -16592,7 +16592,7 @@ static void prune_unused_phis(struct compile_state *state)
                        phis += 1;
                }
        }
                        phis += 1;
                }
        }

-       
+

        /* Mark them all dead */
        live = xcmalloc(sizeof(*live) * (phis + 1), "phi_triple");
        phis = 0;
        /* Mark them all dead */
        live = xcmalloc(sizeof(*live) * (phis + 1), "phi_triple");
        phis = 0;


@@ -16606,7 +16606,7 @@ static void prune_unused_phis(struct compile_state *state)
                phi->id = phis;
                phis += 1;
        }
                phi->id = phis;
                phis += 1;
        }

-       
+

        /* Mark phis alive that are used by non phis */
        for(i = 0; i < phis; i++) {
                struct triple_set *set;
        /* Mark phis alive that are used by non phis */
        for(i = 0; i < phis; i++) {
                struct triple_set *set;


@@ -16639,7 +16639,7 @@ static void prune_unused_phis(struct compile_state *state)
                                slot[j] = unknown;
                                use_triple(unknown, phi);
                                transform_to_arch_instruction(state, unknown);
                                slot[j] = unknown;
                                use_triple(unknown, phi);
                                transform_to_arch_instruction(state, unknown);

-#if 0                          
+#if 0

                                warning(state, phi, "variable not set at index %d on all paths to use", j);
 #endif
                        }
                                warning(state, phi, "variable not set at index %d on all paths to use", j);
 #endif
                        }


@@ -16773,7 +16773,7 @@ static void transform_from_ssa_form(struct compile_state *state)
                }
                var = post_triple(state, phi, OP_ADECL, phi->type, 0, 0);
                var = var->next; /* point at the var */
                }
                var = post_triple(state, phi, OP_ADECL, phi->type, 0, 0);
                var = var->next; /* point at the var */

-                       
+

                /* Replaces use of phi with var */
                propogate_use(state, phi, var);
 
                /* Replaces use of phi with var */
                propogate_use(state, phi, var);
 


@@ -16826,7 +16826,7 @@ static void transform_from_ssa_form(struct compile_state *state)
                        if (!eblock->first) {
                                internal_error(state, 0, "empty block?");
                        }
                        if (!eblock->first) {
                                internal_error(state, 0, "empty block?");
                        }

-                       
+

                        /* Make certain the write is placed in the edge block... */
                        /* Walk through the edge block backwards to find an
                         * appropriate location for the OP_WRITE.
                        /* Make certain the write is placed in the edge block... */
                        /* Walk through the edge block backwards to find an
                         * appropriate location for the OP_WRITE.


@@ -16873,7 +16873,7 @@ static void transform_from_ssa_form(struct compile_state *state)
                /* Release the phi function */
                release_triple(state, phi);
        }
                /* Release the phi function */
                release_triple(state, phi);
        }

-       
+

        /* Walk all of the operations to find the adecls */
        for(var = first->next; var != first ; var = var->next) {
                struct triple_set *use, *use_next;
        /* Walk all of the operations to find the adecls */
        for(var = first->next; var != first ; var = var->next) {
                struct triple_set *use, *use_next;


@@ -16890,7 +16890,7 @@ static void transform_from_ssa_form(struct compile_state *state)
                        int zrhs, i, used;
                        use_next = use->next;
                        user = use->member;
                        int zrhs, i, used;
                        use_next = use->next;
                        user = use->member;

-                       
+

                        /* Generate a read of var */
                        read = pre_triple(state, user, OP_READ, var->type, var, 0);
                        use_triple(var, read);
                        /* Generate a read of var */
                        read = pre_triple(state, user, OP_READ, var->type, var, 0);
                        use_triple(var, read);


@@ -16909,7 +16909,7 @@ static void transform_from_ssa_form(struct compile_state *state)
                        if (used) {
                                unuse_triple(var, user);
                                use_triple(read, user);
                        if (used) {
                                unuse_triple(var, user);
                                use_triple(read, user);

-                       } 
+                       }

                        /* If we didn't use it release the extra triple */
                        else {
                                release_triple(state, read);
                        /* If we didn't use it release the extra triple */
                        else {
                                release_triple(state, read);


@@ -16921,7 +16921,7 @@ static void transform_from_ssa_form(struct compile_state *state)
 #define HI() if (state->compiler->debug & DEBUG_REBUILD_SSA_FORM) { \
        FILE *fp = state->dbgout; \
        fprintf(fp, "@ %s:%d\n", __FILE__, __LINE__); romcc_print_blocks(state, fp); \
 #define HI() if (state->compiler->debug & DEBUG_REBUILD_SSA_FORM) { \
        FILE *fp = state->dbgout; \
        fprintf(fp, "@ %s:%d\n", __FILE__, __LINE__); romcc_print_blocks(state, fp); \

-       } 
+       }

 
 static void rebuild_ssa_form(struct compile_state *state)
 {
 
 static void rebuild_ssa_form(struct compile_state *state)
 {


@@ -16936,7 +16936,7 @@ HI();
 HI();
        rename_variables(state);
 HI();
 HI();
        rename_variables(state);
 HI();

-       
+

        prune_block_variables(state, state->bb.first_block);
 HI();
        prune_unused_phis(state);
        prune_block_variables(state, state->bb.first_block);
 HI();
        prune_unused_phis(state);


@@ -16944,7 +16944,7 @@ HI();
 }
 #undef HI
 
 }
 #undef HI
 

-/* 
+/*

  * Register conflict resolution
  * =========================================================
  */
  * Register conflict resolution
  * =========================================================
  */


@@ -16974,7 +16974,7 @@ static struct reg_info find_def_color(
                if (tinfo.reg >= MAX_REGISTERS) {
                        tinfo.reg = REG_UNSET;
                }
                if (tinfo.reg >= MAX_REGISTERS) {
                        tinfo.reg = REG_UNSET;
                }

-               if ((tinfo.reg != REG_UNSET) && 
+               if ((tinfo.reg != REG_UNSET) &&

                        (info.reg != REG_UNSET) &&
                        (tinfo.reg != info.reg)) {
                        internal_error(state, def, "register conflict");
                        (info.reg != REG_UNSET) &&
                        (tinfo.reg != info.reg)) {
                        internal_error(state, def, "register conflict");


@@ -17227,7 +17227,7 @@ static struct triple *typed_pre_copy(
        use_triple(in, ins);
        transform_to_arch_instruction(state, in);
        return in;
        use_triple(in, ins);
        transform_to_arch_instruction(state, in);
        return in;

-       
+

 }
 static struct triple *pre_copy(
        struct compile_state *state, struct triple *ins, int index)
 }
 static struct triple *pre_copy(
        struct compile_state *state, struct triple *ins, int index)


@@ -17284,7 +17284,7 @@ static void insert_copies_to_phi(struct compile_state *state)
                        move->u.block = eblock;
                        move->id |= TRIPLE_FLAG_PRE_SPLIT;
                        use_triple(val, move);
                        move->u.block = eblock;
                        move->id |= TRIPLE_FLAG_PRE_SPLIT;
                        use_triple(val, move);

-                       
+

                        slot[edge] = move;
                        unuse_triple(val, phi);
                        use_triple(move, phi);
                        slot[edge] = move;
                        unuse_triple(val, phi);
                        use_triple(move, phi);


@@ -17341,7 +17341,7 @@ struct triple_reg_set;
 struct reg_block;
 
 
 struct reg_block;
 
 

-static int do_triple_set(struct triple_reg_set **head, 
+static int do_triple_set(struct triple_reg_set **head,

        struct triple *member, struct triple *new_member)
 {
        struct triple_reg_set **ptr, *new;
        struct triple *member, struct triple *new_member)
 {
        struct triple_reg_set **ptr, *new;


@@ -17459,7 +17459,7 @@ static struct triple *part_to_piece(struct compile_state *state, struct triple *
        return ins;
 }
 
        return ins;
 }
 

-static int this_def(struct compile_state *state, 
+static int this_def(struct compile_state *state,

        struct triple *ins, struct triple *other)
 {
        if (ins == other) {
        struct triple *ins, struct triple *other)
 {
        if (ins == other) {


@@ -17637,7 +17637,7 @@ static struct reg_block *compute_variable_lifetimes(
        return blocks;
 }
 
        return blocks;
 }
 

-static void free_variable_lifetimes(struct compile_state *state, 
+static void free_variable_lifetimes(struct compile_state *state,

        struct basic_blocks *bb, struct reg_block *blocks)
 {
        int i;
        struct basic_blocks *bb, struct reg_block *blocks)
 {
        int i;


@@ -17660,16 +17660,16 @@ static void free_variable_lifetimes(struct compile_state *state,
 }
 
 typedef void (*wvl_cb_t)(
 }
 
 typedef void (*wvl_cb_t)(

-       struct compile_state *state, 
-       struct reg_block *blocks, struct triple_reg_set *live, 
+       struct compile_state *state,
+       struct reg_block *blocks, struct triple_reg_set *live,

        struct reg_block *rb, struct triple *ins, void *arg);
 
 static void walk_variable_lifetimes(struct compile_state *state,
        struct reg_block *rb, struct triple *ins, void *arg);
 
 static void walk_variable_lifetimes(struct compile_state *state,

-       struct basic_blocks *bb, struct reg_block *blocks, 
+       struct basic_blocks *bb, struct reg_block *blocks,

        wvl_cb_t cb, void *arg)
 {
        int i;
        wvl_cb_t cb, void *arg)
 {
        int i;

-       
+

        for(i = 1; i <= state->bb.last_vertex; i++) {
                struct triple_reg_set *live;
                struct triple_reg_set *entry, *next;
        for(i = 1; i <= state->bb.last_vertex; i++) {
                struct triple_reg_set *live;
                struct triple_reg_set *entry, *next;


@@ -17704,7 +17704,7 @@ static void walk_variable_lifetimes(struct compile_state *state,
                         * going on.
                         */
                         cb(state, blocks, live, rb, ptr, arg);
                         * going on.
                         */
                         cb(state, blocks, live, rb, ptr, arg);

-                       
+

                        /* Remove the current definition from live */
                        do_triple_unset(&live, ptr);
 
                        /* Remove the current definition from live */
                        do_triple_unset(&live, ptr);
 


@@ -17757,7 +17757,7 @@ static void print_live_variables_block(
                block,  block->vertex);
        for(edge = block->edges; edge; edge = edge->next) {
                fprintf(fp, " %p<-%p",
                block,  block->vertex);
        for(edge = block->edges; edge; edge = edge->next) {
                fprintf(fp, " %p<-%p",

-                       edge->member, 
+                       edge->member,

                        edge->member && edge->member->use?edge->member->use->member : 0);
        }
        fprintf(fp, "\n");
                        edge->member && edge->member->use?edge->member->use->member : 0);
        }
        fprintf(fp, "\n");


@@ -17811,7 +17811,7 @@ static void print_live_variables_block(
        fprintf(fp, "\n");
 }
 
        fprintf(fp, "\n");
 }
 

-static void print_live_variables(struct compile_state *state, 
+static void print_live_variables(struct compile_state *state,

        struct basic_blocks *bb, struct reg_block *rb, FILE *fp)
 {
        struct print_live_variable_info info;
        struct basic_blocks *bb, struct reg_block *rb, FILE *fp)
 {
        struct print_live_variable_info info;


@@ -17847,7 +17847,7 @@ struct dead_triple {
 #define TRIPLE_FLAG_FREE  1
 };
 
 #define TRIPLE_FLAG_FREE  1
 };
 

-static void print_dead_triples(struct compile_state *state, 
+static void print_dead_triples(struct compile_state *state,

        struct dead_triple *dtriple)
 {
        struct triple *first, *ins;
        struct dead_triple *dtriple)
 {
        struct triple *first, *ins;


@@ -17865,7 +17865,7 @@ static void print_dead_triples(struct compile_state *state,
                if ((ins->op == OP_LABEL) && (ins->use)) {
                        fprintf(fp, "\n%p:\n", ins);
                }
                if ((ins->op == OP_LABEL) && (ins->use)) {
                        fprintf(fp, "\n%p:\n", ins);
                }

-               fprintf(fp, "%c", 
+               fprintf(fp, "%c",

                        (dt->flags & TRIPLE_FLAG_ALIVE)?' ': '-');
                display_triple(fp, ins);
                if (triple_is_branch(state, ins)) {
                        (dt->flags & TRIPLE_FLAG_ALIVE)?' ': '-');
                display_triple(fp, ins);
                if (triple_is_branch(state, ins)) {


@@ -17932,7 +17932,7 @@ static void eliminate_inefectual_code(struct compile_state *state)
 
        /* Now put then in an array and mark all of the triples dead */
        dtriple = xcmalloc(sizeof(*dtriple) * (triples + 1), "dtriples");
 
        /* Now put then in an array and mark all of the triples dead */
        dtriple = xcmalloc(sizeof(*dtriple) * (triples + 1), "dtriples");

-       
+

        ins = first;
        i = 1;
        block = 0;
        ins = first;
        i = 1;
        block = 0;


@@ -18003,7 +18003,7 @@ static void eliminate_inefectual_code(struct compile_state *state)
        }
        print_dead_triples(state, dtriple);
        for(dt = &dtriple[1]; dt <= &dtriple[triples]; dt++) {
        }
        print_dead_triples(state, dtriple);
        for(dt = &dtriple[1]; dt <= &dtriple[triples]; dt++) {

-               if ((dt->triple->op == OP_NOOP) && 
+               if ((dt->triple->op == OP_NOOP) &&

                        (dt->flags & TRIPLE_FLAG_ALIVE)) {
                        internal_error(state, dt->triple, "noop effective?");
                }
                        (dt->flags & TRIPLE_FLAG_ALIVE)) {
                        internal_error(state, dt->triple, "noop effective?");
                }


@@ -18062,13 +18062,13 @@ static void insert_mandatory_copies(struct compile_state *state)
                        if (i < 0) {
                                continue;
                        }
                        if (i < 0) {
                                continue;
                        }

-                       
+

                        /* Find the users color requirements */
                        rinfo = arch_reg_rhs(state, entry->member, i);
                        if (rinfo.reg >= MAX_REGISTERS) {
                                rinfo.reg = REG_UNSET;
                        }
                        /* Find the users color requirements */
                        rinfo = arch_reg_rhs(state, entry->member, i);
                        if (rinfo.reg >= MAX_REGISTERS) {
                                rinfo.reg = REG_UNSET;
                        }

-                       
+

                        /* See if I need a pre_copy */
                        if (rinfo.reg != REG_UNSET) {
                                if ((reg != REG_UNSET) && (reg != rinfo.reg)) {
                        /* See if I need a pre_copy */
                        if (rinfo.reg != REG_UNSET) {
                                if ((reg != REG_UNSET) && (reg != rinfo.reg)) {


@@ -18085,14 +18085,14 @@ static void insert_mandatory_copies(struct compile_state *state)
                         * They do not take up any registers until a
                         * copy places them in one.
                         */
                         * They do not take up any registers until a
                         * copy places them in one.
                         */

-                       if ((info.reg == REG_UNNEEDED) && 
+                       if ((info.reg == REG_UNNEEDED) &&

                                (rinfo.reg != REG_UNNEEDED)) {
                                do_pre_copy = 1;
                        }
                }
                do_post_copy =
                        !do_pre_copy &&
                                (rinfo.reg != REG_UNNEEDED)) {
                                do_pre_copy = 1;
                        }
                }
                do_post_copy =
                        !do_pre_copy &&

-                       (((info.reg != REG_UNSET) && 
+                       (((info.reg != REG_UNSET) &&

                                (reg != REG_UNSET) &&
                                (info.reg != reg)) ||
                        ((info.regcm & regcm) == 0));
                                (reg != REG_UNSET) &&
                                (info.reg != reg)) ||
                        ((info.regcm & regcm) == 0));


@@ -18108,7 +18108,7 @@ static void insert_mandatory_copies(struct compile_state *state)
                        if (i < 0) {
                                continue;
                        }
                        if (i < 0) {
                                continue;
                        }

-                       
+

                        /* Find the users color requirements */
                        rinfo = arch_reg_rhs(state, entry->member, i);
                        if (rinfo.reg >= MAX_REGISTERS) {
                        /* Find the users color requirements */
                        rinfo = arch_reg_rhs(state, entry->member, i);
                        if (rinfo.reg >= MAX_REGISTERS) {


@@ -18157,7 +18157,7 @@ static void insert_mandatory_copies(struct compile_state *state)
                                }
                        }
                        regcm &= rinfo.regcm;
                                }
                        }
                        regcm &= rinfo.regcm;

-                       
+

                }
                if (do_post_copy) {
                        struct reg_info pre, post;
                }
                if (do_post_copy) {
                        struct reg_info pre, post;


@@ -18251,7 +18251,7 @@ static void print_interference_block(
                block,  block->vertex);
        for(edge = block->edges; edge; edge = edge->next) {
                fprintf(fp, " %p<-%p",
                block,  block->vertex);
        for(edge = block->edges; edge; edge = edge->next) {
                fprintf(fp, " %p<-%p",

-                       edge->member, 
+                       edge->member,

                        edge->member && edge->member->use?edge->member->use->member : 0);
        }
        fprintf(fp, "\n");
                        edge->member && edge->member->use?edge->member->use->member : 0);
        }
        fprintf(fp, "\n");


@@ -18297,7 +18297,7 @@ static void print_interference_block(
                op = ptr->op;
                done = (ptr == block->last);
                lr = rstate->lrd[ptr->id].lr;
                op = ptr->op;
                done = (ptr == block->last);
                lr = rstate->lrd[ptr->id].lr;

-               
+

                id = ptr->id;
                ptr->id = rstate->lrd[id].orig_id;
                SET_REG(ptr->id, lr->color);
                id = ptr->id;
                ptr->id = rstate->lrd[id].orig_id;
                SET_REG(ptr->id, lr->color);


@@ -18462,7 +18462,7 @@ static struct lre_hash **lre_probe(struct reg_state *rstate,
                right = tmp;
        }
        index = hash_live_edge(left, right);
                right = tmp;
        }
        index = hash_live_edge(left, right);

-       
+

        ptr = &rstate->hash[index];
        while(*ptr) {
                if (((*ptr)->left == left) && ((*ptr)->right == right)) {
        ptr = &rstate->hash[index];
        while(*ptr) {
                if (((*ptr)->left == left) && ((*ptr)->right == right)) {


@@ -18481,7 +18481,7 @@ static int interfere(struct reg_state *rstate,
        return ptr && *ptr;
 }
 
        return ptr && *ptr;
 }
 

-static void add_live_edge(struct reg_state *rstate, 
+static void add_live_edge(struct reg_state *rstate,

        struct live_range *left, struct live_range *right)
 {
        /* FIXME the memory allocation overhead is noticeable here... */
        struct live_range *left, struct live_range *right)
 {
        /* FIXME the memory allocation overhead is noticeable here... */


@@ -18520,7 +18520,7 @@ static void add_live_edge(struct reg_state *rstate,
        edge->node   = right;
        left->edges  = edge;
        left->degree += 1;
        edge->node   = right;
        left->edges  = edge;
        left->degree += 1;

-       
+

        edge = xmalloc(sizeof(*edge), "live_range_edge");
        edge->next    = right->edges;
        edge->node    = left;
        edge = xmalloc(sizeof(*edge), "live_range_edge");
        edge->next    = right->edges;
        edge->node    = left;


@@ -18572,7 +18572,7 @@ static void remove_live_edges(struct reg_state *rstate, struct live_range *range
        }
 }
 
        }
 }
 

-static void transfer_live_edges(struct reg_state *rstate, 
+static void transfer_live_edges(struct reg_state *rstate,

        struct live_range *dest, struct live_range *src)
 {
        struct live_range_edge *edge, *next;
        struct live_range *dest, struct live_range *src)
 {
        struct live_range_edge *edge, *next;


@@ -18587,7 +18587,7 @@ static void transfer_live_edges(struct reg_state *rstate,
 
 
 /* Interference graph...
 
 
 /* Interference graph...

- * 
+ *

  * new(n) --- Return a graph with n nodes but no edges.
  * add(g,x,y) --- Return a graph including g with an between x and y
  * interfere(g, x, y) --- Return true if there exists an edge between the nodes
  * new(n) --- Return a graph with n nodes but no edges.
  * add(g,x,y) --- Return a graph including g with an between x and y
  * interfere(g, x, y) --- Return true if there exists an edge between the nodes


@@ -18600,11 +18600,11 @@ static void transfer_live_edges(struct reg_state *rstate,
  * The adjacency vectors support an efficient implementation of neighbors.
  */
 
  * The adjacency vectors support an efficient implementation of neighbors.
  */
 

-/* 
+/*

  *     +---------------------------------------------------+
  *     |         +--------------+                          |
  *     v         v              |                          |
  *     +---------------------------------------------------+
  *     |         +--------------+                          |
  *     v         v              |                          |

- * renumber -> build graph -> colalesce -> spill_costs -> simplify -> select 
+ * renumber -> build graph -> colalesce -> spill_costs -> simplify -> select

  *
  * -- In simplify implment optimistic coloring... (No backtracking)
  * -- Implement Rematerialization it is the only form of spilling we can perform
  *
  * -- In simplify implment optimistic coloring... (No backtracking)
  * -- Implement Rematerialization it is the only form of spilling we can perform


@@ -18620,7 +18620,7 @@ static void transfer_live_edges(struct reg_state *rstate,
 
 #if DEBUG_ROMCC_WARNING
 static void different_colored(
 
 #if DEBUG_ROMCC_WARNING
 static void different_colored(

-       struct compile_state *state, struct reg_state *rstate, 
+       struct compile_state *state, struct reg_state *rstate,

        struct triple *parent, struct triple *ins)
 {
        struct live_range *lr;
        struct triple *parent, struct triple *ins)
 {
        struct live_range *lr;


@@ -18656,13 +18656,13 @@ static struct live_range *coalesce_ranges(
        }
        if ((lr1->color == REG_UNNEEDED) ||
                (lr2->color == REG_UNNEEDED)) {
        }
        if ((lr1->color == REG_UNNEEDED) ||
                (lr2->color == REG_UNNEEDED)) {

-               internal_error(state, 0, 
+               internal_error(state, 0,

                        "cannot coalesce live ranges without a possible color");
        }
        if ((lr1->color != lr2->color) &&
                (lr1->color != REG_UNSET) &&
                (lr2->color != REG_UNSET)) {
                        "cannot coalesce live ranges without a possible color");
        }
        if ((lr1->color != lr2->color) &&
                (lr1->color != REG_UNSET) &&
                (lr2->color != REG_UNSET)) {

-               internal_error(state, lr1->defs->def, 
+               internal_error(state, lr1->defs->def,

                        "cannot coalesce live ranges of different colors");
        }
        color = lr1->color;
                        "cannot coalesce live ranges of different colors");
        }
        color = lr1->color;


@@ -18693,7 +18693,7 @@ static struct live_range *coalesce_ranges(
        /* If there is a clear dominate live range put it in lr1,
         * For purposes of this test phi functions are
         * considered dominated by the definitions that feed into
        /* If there is a clear dominate live range put it in lr1,
         * For purposes of this test phi functions are
         * considered dominated by the definitions that feed into

-        * them. 
+        * them.

         */
        if ((lr1->defs->prev->def->op == OP_PHI) ||
                ((lr2->defs->prev->def->op != OP_PHI) &&
         */
        if ((lr1->defs->prev->def->op == OP_PHI) ||
                ((lr2->defs->prev->def->op != OP_PHI) &&


@@ -18724,12 +18724,12 @@ static struct live_range *coalesce_ranges(
                lr2->defs->def,
                lr2->color);
 #endif
                lr2->defs->def,
                lr2->color);
 #endif

-       
+

        /* Append lr2 onto lr1 */
 #if DEBUG_ROMCC_WARNINGS
 #warning "FIXME should this be a merge instead of a splice?"
 #endif
        /* Append lr2 onto lr1 */
 #if DEBUG_ROMCC_WARNINGS
 #warning "FIXME should this be a merge instead of a splice?"
 #endif

-       /* This FIXME item applies to the correctness of live_range_end 
+       /* This FIXME item applies to the correctness of live_range_end

         * and to the necessity of making multiple passes of coalesce_live_ranges.
         * A failure to find some coalesce opportunities in coaleace_live_ranges
         * does not impact the correct of the compiler just the efficiency with
         * and to the necessity of making multiple passes of coalesce_live_ranges.
         * A failure to find some coalesce opportunities in coaleace_live_ranges
         * does not impact the correct of the compiler just the efficiency with


@@ -18739,7 +18739,7 @@ static struct live_range *coalesce_ranges(
        mid1 = lr1->defs->prev;
        mid2 = lr2->defs;
        end  = lr2->defs->prev;
        mid1 = lr1->defs->prev;
        mid2 = lr2->defs;
        end  = lr2->defs->prev;

-       
+

        head->prev = end;
        end->next  = head;
 
        head->prev = end;
        end->next  = head;
 


@@ -18844,7 +18844,7 @@ static void initialize_live_ranges(
                        rstate->lr[i].classes = info.regcm;
                        rstate->lr[i].degree  = 0;
                        rstate->lrd[j].lr = &rstate->lr[i];
                        rstate->lr[i].classes = info.regcm;
                        rstate->lr[i].degree  = 0;
                        rstate->lrd[j].lr = &rstate->lr[i];

-               } 
+               }

                /* Otherwise give the triple the dummy live range. */
                else {
                        rstate->lrd[j].lr = &rstate->lr[0];
                /* Otherwise give the triple the dummy live range. */
                else {
                        rstate->lrd[j].lr = &rstate->lr[0];


@@ -18871,7 +18871,7 @@ static void initialize_live_ranges(
                if (ins->id > rstate->defs) {
                        internal_error(state, ins, "bad id");
                }
                if (ins->id > rstate->defs) {
                        internal_error(state, ins, "bad id");
                }

-               
+

                /* Walk through the template of ins and coalesce live ranges */
                zlhs = ins->lhs;
                if ((zlhs == 0) && triple_is_def(state, ins)) {
                /* Walk through the template of ins and coalesce live ranges */
                zlhs = ins->lhs;
                if ((zlhs == 0) && triple_is_def(state, ins)) {


@@ -18917,7 +18917,7 @@ static void initialize_live_ranges(
                                }
 
                                if (rinfo.reg == linfo.reg) {
                                }
 
                                if (rinfo.reg == linfo.reg) {

-                                       coalesce_ranges(state, rstate, 
+                                       coalesce_ranges(state, rstate,

                                                lhs->lr, rhs->lr);
                                }
                        }
                                                lhs->lr, rhs->lr);
                                }
                        }


@@ -18927,8 +18927,8 @@ static void initialize_live_ranges(
 }
 
 static void graph_ins(
 }
 
 static void graph_ins(

-       struct compile_state *state, 
-       struct reg_block *blocks, struct triple_reg_set *live, 
+       struct compile_state *state,
+       struct reg_block *blocks, struct triple_reg_set *live,

        struct reg_block *rb, struct triple *ins, void *arg)
 {
        struct reg_state *rstate = arg;
        struct reg_block *rb, struct triple *ins, void *arg)
 {
        struct reg_state *rstate = arg;


@@ -18943,7 +18943,7 @@ static void graph_ins(
                return;
        }
        def = rstate->lrd[ins->id].lr;
                return;
        }
        def = rstate->lrd[ins->id].lr;

-       
+

        /* Create an edge between ins and everything that is
         * alive, unless the live_range cannot share
         * a physical register with ins.
        /* Create an edge between ins and everything that is
         * alive, unless the live_range cannot share
         * a physical register with ins.


@@ -18991,8 +18991,8 @@ static struct live_range *get_verify_live_range(
 }
 
 static void verify_graph_ins(
 }
 
 static void verify_graph_ins(

-       struct compile_state *state, 
-       struct reg_block *blocks, struct triple_reg_set *live, 
+       struct compile_state *state,
+       struct reg_block *blocks, struct triple_reg_set *live,

        struct reg_block *rb, struct triple *ins, void *arg)
 {
        struct reg_state *rstate = arg;
        struct reg_block *rb, struct triple *ins, void *arg)
 {
        struct reg_state *rstate = arg;


@@ -19013,17 +19013,17 @@ static void verify_graph_ins(
                        }
                        lr2 = get_verify_live_range(state, rstate, entry2->member);
                        if (lr1 == lr2) {
                        }
                        lr2 = get_verify_live_range(state, rstate, entry2->member);
                        if (lr1 == lr2) {

-                               internal_error(state, entry2->member, 
+                               internal_error(state, entry2->member,

                                        "live range with 2 values simultaneously alive");
                        }
                        if (!arch_regcm_intersect(lr1->classes, lr2->classes)) {
                                continue;
                        }
                        if (!interfere(rstate, lr1, lr2)) {
                                        "live range with 2 values simultaneously alive");
                        }
                        if (!arch_regcm_intersect(lr1->classes, lr2->classes)) {
                                continue;
                        }
                        if (!interfere(rstate, lr1, lr2)) {

-                               internal_error(state, entry2->member, 
+                               internal_error(state, entry2->member,

                                        "edges don't interfere?");
                        }
                                        "edges don't interfere?");
                        }

-                               
+

                        lr1_found = 0;
                        lr2_degree = 0;
                        for(edge2 = lr2->edges; edge2; edge2 = edge2->next) {
                        lr1_found = 0;
                        lr2_degree = 0;
                        for(edge2 = lr2->edges; edge2; edge2 = edge2->next) {


@@ -19047,8 +19047,8 @@ static void verify_graph_ins(
 #endif
 
 static void print_interference_ins(
 #endif
 
 static void print_interference_ins(

-       struct compile_state *state, 
-       struct reg_block *blocks, struct triple_reg_set *live, 
+       struct compile_state *state,
+       struct reg_block *blocks, struct triple_reg_set *live,

        struct reg_block *rb, struct triple *ins, void *arg)
 {
        struct reg_state *rstate = arg;
        struct reg_block *rb, struct triple *ins, void *arg)
 {
        struct reg_state *rstate = arg;


@@ -19118,7 +19118,7 @@ static int coalesce_live_ranges(
         * Forcing a value to stay in a single register
         * for an extended period of time does have
         * limitations when applied to non homogenous
         * Forcing a value to stay in a single register
         * for an extended period of time does have
         * limitations when applied to non homogenous

-        * register pool.  
+        * register pool.

         *
         * The two cases I have identified are:
         * 1) Two forced register assignments may
         *
         * The two cases I have identified are:
         * 1) Two forced register assignments may


@@ -19136,7 +19136,7 @@ static int coalesce_live_ranges(
         *   functions.  This creates a 2 headed live
         *   range that cannot be sanely split.
         *
         *   functions.  This creates a 2 headed live
         *   range that cannot be sanely split.
         *

-        * - phi functions (coalesced in initialize_live_ranges) 
+        * - phi functions (coalesced in initialize_live_ranges)

         *   are handled as pre split live ranges so we will
         *   never attempt to split them.
         */
         *   are handled as pre split live ranges so we will
         *   never attempt to split them.
         */


@@ -19186,7 +19186,7 @@ static int coalesce_live_ranges(
                                if ((lr1->classes & lr2->classes) == 0) {
                                        continue;
                                }
                                if ((lr1->classes & lr2->classes) == 0) {
                                        continue;
                                }

-                               
+

                                if (interfere(rstate, lr1, lr2)) {
                                        continue;
                                }
                                if (interfere(rstate, lr1, lr2)) {
                                        continue;
                                }


@@ -19261,7 +19261,7 @@ static int correct_coalesce_conflicts(
 {
        int conflicts;
        conflicts = 0;
 {
        int conflicts;
        conflicts = 0;

-       walk_variable_lifetimes(state, &state->bb, blocks, 
+       walk_variable_lifetimes(state, &state->bb, blocks,

                fix_coalesce_conflicts, &conflicts);
        return conflicts;
 }
                fix_coalesce_conflicts, &conflicts);
        return conflicts;
 }


@@ -19277,7 +19277,7 @@ static void replace_set_use(struct compile_state *state,
        }
 }
 
        }
 }
 

-static void replace_block_use(struct compile_state *state, 
+static void replace_block_use(struct compile_state *state,

        struct reg_block *blocks, struct triple *orig, struct triple *new)
 {
        int i;
        struct reg_block *blocks, struct triple *orig, struct triple *new)
 {
        int i;


@@ -19369,7 +19369,7 @@ static struct triple *resolve_tangle(
        }
        info = find_lhs_color(state, tangle, 0);
        SET_INFO(tangle->id, info);
        }
        info = find_lhs_color(state, tangle, 0);
        SET_INFO(tangle->id, info);

-       
+

        return copy;
 }
 
        return copy;
 }
 


@@ -19395,7 +19395,7 @@ static void fix_tangles(struct compile_state *state,
                        }
                        reg_inc_used(state, used, info.reg);
                }
                        }
                        reg_inc_used(state, used, info.reg);
                }

-               
+

                /* Now find the least dominated definition of a register in
                 * conflict I have seen so far.
                 */
                /* Now find the least dominated definition of a register in
                 * conflict I have seen so far.
                 */


@@ -19408,7 +19408,7 @@ static void fix_tangles(struct compile_state *state,
                        /* Changing copies that feed into phi functions
                         * is incorrect.
                         */
                        /* Changing copies that feed into phi functions
                         * is incorrect.
                         */

-                       if (set->member->use && 
+                       if (set->member->use &&

                                (set->member->use->member->op == OP_PHI)) {
                                continue;
                        }
                                (set->member->use->member->op == OP_PHI)) {
                                continue;
                        }


@@ -19438,7 +19438,7 @@ static int correct_tangles(
        int tangles;
        tangles = 0;
        color_instructions(state);
        int tangles;
        tangles = 0;
        color_instructions(state);

-       walk_variable_lifetimes(state, &state->bb, blocks, 
+       walk_variable_lifetimes(state, &state->bb, blocks,

                fix_tangles, &tangles);
        return tangles;
 }
                fix_tangles, &tangles);
        return tangles;
 }


@@ -19469,7 +19469,7 @@ struct triple *find_constrained_def(
                if (regcm == info.regcm) {
                        continue;
                }
                if (regcm == info.regcm) {
                        continue;
                }

-               
+

                /* If there is just one use.
                 * That use cannot accept a larger register class.
                 * There are no intervening definitions except
                /* If there is just one use.
                 * That use cannot accept a larger register class.
                 * There are no intervening definitions except


@@ -19480,7 +19480,7 @@ struct triple *find_constrained_def(
 #if DEBUG_ROMCC_WARNINGS
 #warning "FIXME ignore cases that cannot be fixed (a definition followed by a use)"
 #endif
 #if DEBUG_ROMCC_WARNINGS
 #warning "FIXME ignore cases that cannot be fixed (a definition followed by a use)"
 #endif

-               
+

 
                /* Of the constrained live ranges deal with the
                 * least dominated one first.
 
                /* Of the constrained live ranges deal with the
                 * least dominated one first.


@@ -19489,7 +19489,7 @@ struct triple *find_constrained_def(
                        fprintf(state->errout, "canidate: %p %-8s regcm: %x %x\n",
                                lrd->def, tops(lrd->def->op), regcm, info.regcm);
                }
                        fprintf(state->errout, "canidate: %p %-8s regcm: %x %x\n",
                                lrd->def, tops(lrd->def->op), regcm, info.regcm);
                }

-               if (!constrained || 
+               if (!constrained ||

                        tdominates(state, lrd->def, constrained))
                {
                        constrained = lrd->def;
                        tdominates(state, lrd->def, constrained))
                {
                        constrained = lrd->def;


@@ -19499,13 +19499,13 @@ struct triple *find_constrained_def(
 }
 
 static int split_constrained_ranges(
 }
 
 static int split_constrained_ranges(

-       struct compile_state *state, struct reg_state *rstate, 
+       struct compile_state *state, struct reg_state *rstate,

        struct live_range *range)
 {
        /* Walk through the edges in conflict and our current live
         * range, and find definitions that are more severly constrained
         * than they type of data they contain require.
        struct live_range *range)
 {
        /* Walk through the edges in conflict and our current live
         * range, and find definitions that are more severly constrained
         * than they type of data they contain require.

-        * 
+        *

         * Then pick one of those ranges and relax the constraints.
         */
        struct live_range_edge *edge;
         * Then pick one of those ranges and relax the constraints.
         */
        struct live_range_edge *edge;


@@ -19533,14 +19533,14 @@ static int split_constrained_ranges(
        }
        return !!constrained;
 }
        }
        return !!constrained;
 }

-       
+

 static int split_ranges(
        struct compile_state *state, struct reg_state *rstate,
        char *used, struct live_range *range)
 {
        int split;
        if (state->compiler->debug & DEBUG_RANGE_CONFLICTS) {
 static int split_ranges(
        struct compile_state *state, struct reg_state *rstate,
        char *used, struct live_range *range)
 {
        int split;
        if (state->compiler->debug & DEBUG_RANGE_CONFLICTS) {

-               fprintf(state->errout, "split_ranges %d %s %p\n", 
+               fprintf(state->errout, "split_ranges %d %s %p\n",

                        rstate->passes, tops(range->defs->def->op), range->defs->def);
        }
        if ((range->color == REG_UNNEEDED) ||
                        rstate->passes, tops(range->defs->def->op), range->defs->def);
        }
        if ((range->color == REG_UNNEEDED) ||


@@ -19550,7 +19550,7 @@ static int split_ranges(
        split = split_constrained_ranges(state, rstate, range);
 
        /* Ideally I would split the live range that will not be used
        split = split_constrained_ranges(state, rstate, range);
 
        /* Ideally I would split the live range that will not be used

-        * for the longest period of time in hopes that this will 
+        * for the longest period of time in hopes that this will

         * (a) allow me to spill a register or
         * (b) allow me to place a value in another register.
         *
         * (a) allow me to spill a register or
         * (b) allow me to place a value in another register.
         *


@@ -19564,7 +19564,7 @@ static int split_ranges(
 #if DEBUG_ROMCC_WARNINGS
 #warning "WISHLIST implement live range splitting..."
 #endif
 #if DEBUG_ROMCC_WARNINGS
 #warning "WISHLIST implement live range splitting..."
 #endif

-       
+

        if (!split && (state->compiler->debug & DEBUG_RANGE_CONFLICTS2)) {
                FILE *fp = state->errout;
                print_interference_blocks(state, rstate, fp, 0);
        if (!split && (state->compiler->debug & DEBUG_RANGE_CONFLICTS2)) {
                FILE *fp = state->errout;
                print_interference_blocks(state, rstate, fp, 0);


@@ -19616,7 +19616,7 @@ static void cgdebug_loc(struct compile_state *state, struct triple *ins)
        }
 }
 
        }
 }
 

-static int select_free_color(struct compile_state *state, 
+static int select_free_color(struct compile_state *state,

        struct reg_state *rstate, struct live_range *range)
 {
        struct triple_set *entry;
        struct reg_state *rstate, struct live_range *range)
 {
        struct triple_set *entry;


@@ -19646,7 +19646,7 @@ static int select_free_color(struct compile_state *state,
                for(edge = range->edges; edge; edge = edge->next) {
                        i++;
                }
                for(edge = range->edges; edge; edge = edge->next) {
                        i++;
                }

-               cgdebug_printf(state, "\n%s edges: %d", 
+               cgdebug_printf(state, "\n%s edges: %d",

                        tops(range->defs->def->op), i);
                cgdebug_loc(state, range->defs->def);
                cgdebug_printf(state, "\n");
                        tops(range->defs->def->op), i);
                cgdebug_loc(state, range->defs->def);
                cgdebug_printf(state, "\n");


@@ -19656,7 +19656,7 @@ static int select_free_color(struct compile_state *state,
                                        arch_reg_str(i));
                        }
                }
                                        arch_reg_str(i));
                        }
                }

-       }       
+       }

 
        /* If a color is already assigned see if it will work */
        if (range->color != REG_UNSET) {
 
        /* If a color is already assigned see if it will work */
        if (range->color != REG_UNSET) {


@@ -19784,7 +19784,7 @@ static int select_free_color(struct compile_state *state,
         * pick the first color that is free.
         */
        if (range->color == REG_UNSET) {
         * pick the first color that is free.
         */
        if (range->color == REG_UNSET) {

-               range->color = 
+               range->color =

                        arch_select_free_register(state, used, range->classes);
        }
        if (range->color == REG_UNSET) {
                        arch_select_free_register(state, used, range->classes);
        }
        if (range->color == REG_UNSET) {


@@ -19810,7 +19810,7 @@ static int select_free_color(struct compile_state *state,
                                tops(lrd->def->op), lrd->def);
                        lrd = lrd->next;
                } while(lrd != range->defs);
                                tops(lrd->def->op), lrd->def);
                        lrd = lrd->next;
                } while(lrd != range->defs);

-                       
+

                warning(state, range->defs->def, "classes: %x",
                        range->classes);
                for(i = 0; i < MAX_REGISTERS; i++) {
                warning(state, range->defs->def, "classes: %x",
                        range->classes);
                for(i = 0; i < MAX_REGISTERS; i++) {


@@ -19923,7 +19923,7 @@ static void verify_colors(struct compile_state *state, struct reg_state *rstate)
        do {
                if (triple_is_def(state, ins)) {
                        if ((ins->id < 0) || (ins->id > rstate->defs)) {
        do {
                if (triple_is_def(state, ins)) {
                        if ((ins->id < 0) || (ins->id > rstate->defs)) {

-                               internal_error(state, ins, 
+                               internal_error(state, ins,

                                        "triple without a live range def");
                        }
                        lr = rstate->lrd[ins->id].lr;
                                        "triple without a live range def");
                        }
                        lr = rstate->lrd[ins->id].lr;


@@ -19958,7 +19958,7 @@ static void color_triples(struct compile_state *state, struct reg_state *rstate)
        ins = first;
        do {
                if ((ins->id < 0) || (ins->id > rstate->defs)) {
        ins = first;
        do {
                if ((ins->id < 0) || (ins->id > rstate->defs)) {

-                       internal_error(state, ins, 
+                       internal_error(state, ins,

                                "triple without a live range");
                }
                lrd = &rstate->lrd[ins->id];
                                "triple without a live range");
                }
                lrd = &rstate->lrd[ins->id];


@@ -19979,7 +19979,7 @@ static struct live_range *merge_sort_lr(
                mid = first + size/2;
                first = merge_sort_lr(first, mid -1);
                mid   = merge_sort_lr(mid, last);
                mid = first + size/2;
                first = merge_sort_lr(first, mid -1);
                mid   = merge_sort_lr(mid, last);

-               
+

                join = 0;
                join_tail = &join;
                /* merge the two lists */
                join = 0;
                join_tail = &join;
                /* merge the two lists */


@@ -20008,7 +20008,7 @@ static struct live_range *merge_sort_lr(
                /* Splice the remaining list */
                pick = (first)? first : mid;
                *join_tail = pick;
                /* Splice the remaining list */
                pick = (first)? first : mid;
                *join_tail = pick;

-               if (pick) { 
+               if (pick) {

                        pick->group_prev = join_tail;
                }
        }
                        pick->group_prev = join_tail;
                }
        }


@@ -20021,7 +20021,7 @@ static struct live_range *merge_sort_lr(
        return join;
 }
 
        return join;
 }
 

-static void ids_from_rstate(struct compile_state *state, 
+static void ids_from_rstate(struct compile_state *state,

        struct reg_state *rstate)
 {
        struct triple *ins, *first;
        struct reg_state *rstate)
 {
        struct triple *ins, *first;


@@ -20117,14 +20117,14 @@ static void allocate_registers(struct compile_state *state)
                        tangles = correct_tangles(state, rstate.blocks);
                } while(tangles);
 
                        tangles = correct_tangles(state, rstate.blocks);
                } while(tangles);
 

-               
+

                print_blocks(state, "resolve_tangles", state->dbgout);
                verify_consistency(state);
                print_blocks(state, "resolve_tangles", state->dbgout);
                verify_consistency(state);

-               
+

                /* Allocate and initialize the live ranges */
                initialize_live_ranges(state, &rstate);
 
                /* Allocate and initialize the live ranges */
                initialize_live_ranges(state, &rstate);
 

-               /* Note currently doing coalescing in a loop appears to 
+               /* Note currently doing coalescing in a loop appears to

                 * buys me nothing.  The code is left this way in case
                 * there is some value in it.  Or if a future bugfix
                 * yields some benefit.
                 * buys me nothing.  The code is left this way in case
                 * there is some value in it.  Or if a future bugfix
                 * yields some benefit.


@@ -20139,18 +20139,18 @@ static void allocate_registers(struct compile_state *state)
 
                        /* Compute the interference graph */
                        walk_variable_lifetimes(
 
                        /* Compute the interference graph */
                        walk_variable_lifetimes(

-                               state, &state->bb, rstate.blocks, 
+                               state, &state->bb, rstate.blocks,

                                graph_ins, &rstate);
                                graph_ins, &rstate);

-                       
+

                        /* Display the interference graph if desired */
                        if (state->compiler->debug & DEBUG_INTERFERENCE) {
                                print_interference_blocks(state, &rstate, state->dbgout, 1);
                                fprintf(state->dbgout, "\nlive variables by instruction\n");
                                walk_variable_lifetimes(
                        /* Display the interference graph if desired */
                        if (state->compiler->debug & DEBUG_INTERFERENCE) {
                                print_interference_blocks(state, &rstate, state->dbgout, 1);
                                fprintf(state->dbgout, "\nlive variables by instruction\n");
                                walk_variable_lifetimes(

-                                       state, &state->bb, rstate.blocks, 
+                                       state, &state->bb, rstate.blocks,

                                        print_interference_ins, &rstate);
                        }
                                        print_interference_ins, &rstate);
                        }

-                       
+

                        coalesced = coalesce_live_ranges(state, &rstate);
 
                        if (state->compiler->debug & DEBUG_COALESCING) {
                        coalesced = coalesce_live_ranges(state, &rstate);
 
                        if (state->compiler->debug & DEBUG_COALESCING) {


@@ -20164,13 +20164,13 @@ static void allocate_registers(struct compile_state *state)
 # endif
                /* Verify the interference graph */
                walk_variable_lifetimes(
 # endif
                /* Verify the interference graph */
                walk_variable_lifetimes(

-                       state, &state->bb, rstate.blocks, 
+                       state, &state->bb, rstate.blocks,

                        verify_graph_ins, &rstate);
 # if 0
                fprintf(state->errout, "verify_graph_ins done\n");
 #endif
 #endif
                        verify_graph_ins, &rstate);
 # if 0
                fprintf(state->errout, "verify_graph_ins done\n");
 #endif
 #endif

-                       
+

                /* Build the groups low and high.  But with the nodes
                 * first sorted by degree order.
                 */
                /* Build the groups low and high.  But with the nodes
                 * first sorted by degree order.
                 */


@@ -20190,13 +20190,13 @@ static void allocate_registers(struct compile_state *state)
                        struct live_range *range;
                        next = &(*point)->group_next;
                        range = *point;
                        struct live_range *range;
                        next = &(*point)->group_next;
                        range = *point;

-                       
+

                        /* If it has a low degree or it already has a color
                         * place the node in low.
                         */
                        if ((range->degree < regc_max_size(state, range->classes)) ||
                                (range->color != REG_UNSET)) {
                        /* If it has a low degree or it already has a color
                         * place the node in low.
                         */
                        if ((range->degree < regc_max_size(state, range->classes)) ||
                                (range->color != REG_UNSET)) {

-                               cgdebug_printf(state, "Lo: %5d degree %5d%s\n", 
+                               cgdebug_printf(state, "Lo: %5d degree %5d%s\n",

                                        range - rstate.lr, range->degree,
                                        (range->color != REG_UNSET) ? " (colored)": "");
                                *range->group_prev = range->group_next;
                                        range - rstate.lr, range->degree,
                                        (range->color != REG_UNSET) ? " (colored)": "");
                                *range->group_prev = range->group_next;


@@ -20213,7 +20213,7 @@ static void allocate_registers(struct compile_state *state)
                                next = point;
                        }
                        else {
                                next = point;
                        }
                        else {

-                               cgdebug_printf(state, "hi: %5d degree %5d%s\n", 
+                               cgdebug_printf(state, "hi: %5d degree %5d%s\n",

                                        range - rstate.lr, range->degree,
                                        (range->color != REG_UNSET) ? " (colored)": "");
                        }
                                        range - rstate.lr, range->degree,
                                        (range->color != REG_UNSET) ? " (colored)": "");
                        }


@@ -20306,7 +20306,7 @@ static int is_lattice_lo(struct compile_state *state, struct lattice_node *lnode
        return (lnode->val != lnode->def) && !is_scc_const(state, lnode->val);
 }
 
        return (lnode->val != lnode->def) && !is_scc_const(state, lnode->val);
 }
 

-static void scc_add_fedge(struct compile_state *state, struct scc_state *scc, 
+static void scc_add_fedge(struct compile_state *state, struct scc_state *scc,

        struct flow_edge *fedge)
 {
        if (state->compiler->debug & DEBUG_SCC_TRANSFORM2) {
        struct flow_edge *fedge)
 {
        if (state->compiler->debug & DEBUG_SCC_TRANSFORM2) {


@@ -20436,12 +20436,12 @@ static void initialize_scc_state(
                        ins_count, ssa_edge_count, state->bb.last_vertex);
        }
        scc->ins_count   = ins_count;
                        ins_count, ssa_edge_count, state->bb.last_vertex);
        }
        scc->ins_count   = ins_count;

-       scc->lattice     = 
+       scc->lattice     =

                xcmalloc(sizeof(*scc->lattice)*(ins_count + 1), "lattice");
                xcmalloc(sizeof(*scc->lattice)*(ins_count + 1), "lattice");

-       scc->ssa_edges   = 
+       scc->ssa_edges   =

                xcmalloc(sizeof(*scc->ssa_edges)*(ssa_edge_count + 1), "ssa_edges");
                xcmalloc(sizeof(*scc->ssa_edges)*(ssa_edge_count + 1), "ssa_edges");

-       scc->flow_blocks = 
-               xcmalloc(sizeof(*scc->flow_blocks)*(state->bb.last_vertex + 1), 
+       scc->flow_blocks =
+               xcmalloc(sizeof(*scc->flow_blocks)*(state->bb.last_vertex + 1),

                        "flow_blocks");
 
        /* Initialize pass one collect up the nodes */
                        "flow_blocks");
 
        /* Initialize pass one collect up the nodes */


@@ -20580,7 +20580,7 @@ static void initialize_scc_state(
                fedge->out_next   = 0;
                fedge->executable = 0;
                fedge->dst->in = fedge;
                fedge->out_next   = 0;
                fedge->executable = 0;
                fedge->dst->in = fedge;

-               
+

                /* Initialize the work lists */
                scc->flow_work_list = 0;
                scc->ssa_work_list  = 0;
                /* Initialize the work lists */
                scc->flow_work_list = 0;
                scc->ssa_work_list  = 0;


@@ -20592,7 +20592,7 @@ static void initialize_scc_state(
        }
 }
 
        }
 }
 

-       
+

 static void free_scc_state(
        struct compile_state *state, struct scc_state *scc)
 {
 static void free_scc_state(
        struct compile_state *state, struct scc_state *scc)
 {


@@ -20608,7 +20608,7 @@ static void free_scc_state(
        xfree(scc->flow_blocks);
        xfree(scc->ssa_edges);
        xfree(scc->lattice);
        xfree(scc->flow_blocks);
        xfree(scc->ssa_edges);
        xfree(scc->lattice);

-       
+

 }
 
 static struct lattice_node *triple_to_lattice(
 }
 
 static struct lattice_node *triple_to_lattice(


@@ -20637,7 +20637,7 @@ static struct triple *preserve_lval(
        return old;
 }
 
        return old;
 }
 

-static int lval_changed(struct compile_state *state, 
+static int lval_changed(struct compile_state *state,

        struct triple *old, struct lattice_node *lnode)
 {
        int changed;
        struct triple *old, struct lattice_node *lnode)
 {
        int changed;


@@ -20672,7 +20672,7 @@ static void scc_debug_lnode(
                struct triple *val, **expr;
                val = lnode->val? lnode->val : lnode->def;
                fprintf(fp, "%p %s %3d %10s (",
                struct triple *val, **expr;
                val = lnode->val? lnode->val : lnode->def;
                fprintf(fp, "%p %s %3d %10s (",

-                       lnode->def, 
+                       lnode->def,

                        ((lnode->def->op == OP_PHI)? "phi: ": "expr:"),
                        lnode->def->id,
                        tops(lnode->def->op));
                        ((lnode->def->op == OP_PHI)? "phi: ": "expr:"),
                        lnode->def->id,
                        tops(lnode->def->op));


@@ -20700,7 +20700,7 @@ static int compute_lnode_val(struct compile_state *state, struct scc_state *scc,
        struct triple *old, *scratch;
        struct triple **dexpr, **vexpr;
        int count, i;
        struct triple *old, *scratch;
        struct triple **dexpr, **vexpr;
        int count, i;

-       
+

        /* Store the original value */
        old = preserve_lval(state, lnode);
 
        /* Store the original value */
        old = preserve_lval(state, lnode);
 


@@ -20757,9 +20757,9 @@ static int compute_lnode_val(struct compile_state *state, struct scc_state *scc,
                lnode->val = 0; /* Lattice low by definition */
        }
        /* Find the case when I am lattice high */
                lnode->val = 0; /* Lattice low by definition */
        }
        /* Find the case when I am lattice high */

-       if (lnode->val && 
+       if (lnode->val &&

                (lnode->val->op == lnode->def->op) &&
                (lnode->val->op == lnode->def->op) &&

-               (memcmp(lnode->val->param, lnode->def->param, 
+               (memcmp(lnode->val->param, lnode->def->param,

                        count * sizeof(lnode->val->param[0])) == 0) &&
                (memcmp(&lnode->val->u, &lnode->def->u, sizeof(lnode->def->u)) == 0)) {
                lnode->val = lnode->def;
                        count * sizeof(lnode->val->param[0])) == 0) &&
                (memcmp(&lnode->val->u, &lnode->def->u, sizeof(lnode->def->u)) == 0)) {
                lnode->val = lnode->def;


@@ -20782,7 +20782,7 @@ static int compute_lnode_val(struct compile_state *state, struct scc_state *scc,
                }
        }
        /* Find the cases that are always lattice lo */
                }
        }
        /* Find the cases that are always lattice lo */

-       if (lnode->val && 
+       if (lnode->val &&

                triple_is_def(state, lnode->val) &&
                !triple_is_pure(state, lnode->val, lnode->old_id)) {
                lnode->val = 0;
                triple_is_def(state, lnode->val) &&
                !triple_is_pure(state, lnode->val, lnode->old_id)) {
                lnode->val = 0;


@@ -20790,7 +20790,7 @@ static int compute_lnode_val(struct compile_state *state, struct scc_state *scc,
        /* See if the lattice value has changed */
        changed = lval_changed(state, old, lnode);
        /* See if this value should not change */
        /* See if the lattice value has changed */
        changed = lval_changed(state, old, lnode);
        /* See if this value should not change */

-       if ((lnode->val != lnode->def) && 
+       if ((lnode->val != lnode->def) &&

                ((      !triple_is_def(state, lnode->def)  &&
                        !triple_is_cbranch(state, lnode->def)) ||
                        (lnode->def->op == OP_PIECE))) {
                ((      !triple_is_def(state, lnode->def)  &&
                        !triple_is_cbranch(state, lnode->def)) ||
                        (lnode->def->op == OP_PIECE))) {


@@ -20807,7 +20807,7 @@ static int compute_lnode_val(struct compile_state *state, struct scc_state *scc,
        if (lnode->val != scratch) {
                xfree(scratch);
        }
        if (lnode->val != scratch) {
                xfree(scratch);
        }

-       
+

        return changed;
 }
 
        return changed;
 }
 


@@ -20834,7 +20834,7 @@ static void scc_visit_cbranch(struct compile_state *state, struct scc_state *scc
                fprintf(fp, "%s: %d (",
                        tops(lnode->def->op),
                        lnode->def->id);
                fprintf(fp, "%s: %d (",
                        tops(lnode->def->op),
                        lnode->def->id);

-               
+

                for(fedge = lnode->fblock->out; fedge; fedge = fedge->out_next) {
                        fprintf(fp, " %d", fedge->dst->block->vertex);
                }
                for(fedge = lnode->fblock->out; fedge; fedge = fedge->out_next) {
                        fprintf(fp, " %d", fedge->dst->block->vertex);
                }


@@ -20882,7 +20882,7 @@ static void scc_visit_cbranch(struct compile_state *state, struct scc_state *scc
 }
 
 
 }
 
 

-static void scc_add_sedge_dst(struct compile_state *state, 
+static void scc_add_sedge_dst(struct compile_state *state,

        struct scc_state *scc, struct ssa_edge *sedge)
 {
        if (triple_is_cbranch(state, sedge->dst->def)) {
        struct scc_state *scc, struct ssa_edge *sedge)
 {
        if (triple_is_cbranch(state, sedge->dst->def)) {


@@ -20893,7 +20893,7 @@ static void scc_add_sedge_dst(struct compile_state *state,
        }
 }
 
        }
 }
 

-static void scc_visit_phi(struct compile_state *state, struct scc_state *scc, 
+static void scc_visit_phi(struct compile_state *state, struct scc_state *scc,

        struct lattice_node *lnode)
 {
        struct lattice_node *tmp;
        struct lattice_node *lnode)
 {
        struct lattice_node *tmp;


@@ -20913,7 +20913,7 @@ static void scc_visit_phi(struct compile_state *state, struct scc_state *scc,
        index = 0;
        for(fedge = lnode->fblock->in; fedge; index++, fedge = fedge->in_next) {
                if (state->compiler->debug & DEBUG_SCC_TRANSFORM) {
        index = 0;
        for(fedge = lnode->fblock->in; fedge; index++, fedge = fedge->in_next) {
                if (state->compiler->debug & DEBUG_SCC_TRANSFORM) {

-                       fprintf(state->errout, "Examining edge: %d vertex: %d executable: %d\n", 
+                       fprintf(state->errout, "Examining edge: %d vertex: %d executable: %d\n",

                                index,
                                fedge->dst->block->vertex,
                                fedge->executable
                                index,
                                fedge->dst->block->vertex,
                                fedge->executable


@@ -21001,14 +21001,14 @@ static void scc_writeback_values(
                                struct flow_edge *fedge;
                                int executable;
                                executable = 0;
                                struct flow_edge *fedge;
                                int executable;
                                executable = 0;

-                               for(fedge = lnode->fblock->in; 
+                               for(fedge = lnode->fblock->in;

                                    !executable && fedge; fedge = fedge->in_next) {
                                        executable |= fedge->executable;
                                }
                                if (executable) {
                                        internal_warning(state, lnode->def,
                                                "lattice node %d %s->%s still high?",
                                    !executable && fedge; fedge = fedge->in_next) {
                                        executable |= fedge->executable;
                                }
                                if (executable) {
                                        internal_warning(state, lnode->def,
                                                "lattice node %d %s->%s still high?",

-                                               ins->id, 
+                                               ins->id,

                                                tops(lnode->def->op),
                                                tops(lnode->val->op));
                                }
                                                tops(lnode->def->op),
                                                tops(lnode->val->op));
                                }


@@ -21024,7 +21024,7 @@ static void scc_writeback_values(
                                mkconst(state, ins, lnode->val->u.cval);
                                break;
                        case OP_ADDRCONST:
                                mkconst(state, ins, lnode->val->u.cval);
                                break;
                        case OP_ADDRCONST:

-                               mkaddr_const(state, ins, 
+                               mkaddr_const(state, ins,

                                        MISC(lnode->val, 0), lnode->val->u.cval);
                                break;
                        default:
                                        MISC(lnode->val, 0), lnode->val->u.cval);
                                break;
                        default:


@@ -21083,9 +21083,9 @@ static void scc_transform(struct compile_state *state)
                                        reps++;
                                }
                        }
                                        reps++;
                                }
                        }

-                       
+

                        if (state->compiler->debug & DEBUG_SCC_TRANSFORM) {
                        if (state->compiler->debug & DEBUG_SCC_TRANSFORM) {

-                               fprintf(state->errout, "vertex: %d reps: %d\n", 
+                               fprintf(state->errout, "vertex: %d reps: %d\n",

                                        block->vertex, reps);
                        }
 
                                        block->vertex, reps);
                        }
 


@@ -21138,11 +21138,11 @@ static void scc_transform(struct compile_state *state)
                        }
                }
        }
                        }
                }
        }

-       
+

        scc_writeback_values(state, &scc);
        free_scc_state(state, &scc);
        rebuild_ssa_form(state);
        scc_writeback_values(state, &scc);
        free_scc_state(state, &scc);
        rebuild_ssa_form(state);

-       
+

        print_blocks(state, __func__, state->dbgout);
 }
 
        print_blocks(state, __func__, state->dbgout);
 }
 


@@ -21155,7 +21155,7 @@ static void transform_to_arch_instructions(struct compile_state *state)
        do {
                ins = transform_to_arch_instruction(state, ins);
        } while(ins != first);
        do {
                ins = transform_to_arch_instruction(state, ins);
        } while(ins != first);

-       
+

        print_blocks(state, __func__, state->dbgout);
 }
 
        print_blocks(state, __func__, state->dbgout);
 }
 


@@ -21226,7 +21226,7 @@ static void verify_uses(struct compile_state *state)
                }
                ins = ins->next;
        } while(ins != first);
                }
                ins = ins->next;
        } while(ins != first);

-       
+

 }
 static void verify_blocks_present(struct compile_state *state)
 {
 }
 static void verify_blocks_present(struct compile_state *state)
 {


@@ -21240,14 +21240,14 @@ static void verify_blocks_present(struct compile_state *state)
                valid_ins(state, ins);
                if (triple_stores_block(state, ins)) {
                        if (!ins->u.block) {
                valid_ins(state, ins);
                if (triple_stores_block(state, ins)) {
                        if (!ins->u.block) {

-                               internal_error(state, ins, 
+                               internal_error(state, ins,

                                        "%p not in a block?", ins);
                        }
                }
                ins = ins->next;
        } while(ins != first);
                                        "%p not in a block?", ins);
                        }
                }
                ins = ins->next;
        } while(ins != first);

-       
-       
+
+

 }
 
 static int edge_present(struct compile_state *state, struct block *block, struct triple *edge)
 }
 
 static int edge_present(struct compile_state *state, struct block *block, struct triple *edge)


@@ -21332,12 +21332,12 @@ static void verify_blocks(struct compile_state *state)
                        }
                }
                if (block->users != users) {
                        }
                }
                if (block->users != users) {

-                       internal_error(state, block->first, 
+                       internal_error(state, block->first,

                                "computed users %d != stored users %d",
                                users, block->users);
                }
                if (!triple_stores_block(state, block->last->next)) {
                                "computed users %d != stored users %d",
                                users, block->users);
                }
                if (!triple_stores_block(state, block->last->next)) {

-                       internal_error(state, block->last->next, 
+                       internal_error(state, block->last->next,

                                "cannot find next block");
                }
                block = block->last->next->u.block;
                                "cannot find next block");
                }
                block = block->last->next->u.block;


@@ -21359,7 +21359,7 @@ static void verify_domination(struct compile_state *state)
        if (!state->bb.first_block) {
                return;
        }
        if (!state->bb.first_block) {
                return;
        }

-       
+

        first = state->first;
        ins = first;
        do {
        first = state->first;
        ins = first;
        do {


@@ -21386,7 +21386,7 @@ static void verify_domination(struct compile_state *state)
                                                bset = bset->next;
                                        }
                                        if (!bset) {
                                                bset = bset->next;
                                        }
                                        if (!bset) {

-                                               internal_error(state, set->member, 
+                                               internal_error(state, set->member,

                                                        "no edge for phi rhs %d", i);
                                        }
                                        use_point = bset->member->last;
                                                        "no edge for phi rhs %d", i);
                                        }
                                        use_point = bset->member->last;


@@ -21395,11 +21395,11 @@ static void verify_domination(struct compile_state *state)
                        if (use_point &&
                                !tdominates(state, ins, use_point)) {
                                if (is_const(ins)) {
                        if (use_point &&
                                !tdominates(state, ins, use_point)) {
                                if (is_const(ins)) {

-                                       internal_warning(state, ins, 
+                                       internal_warning(state, ins,

                                        "non dominated rhs use point %p?", use_point);
                                }
                                else {
                                        "non dominated rhs use point %p?", use_point);
                                }
                                else {

-                                       internal_error(state, ins, 
+                                       internal_error(state, ins,

                                                "non dominated rhs use point %p?", use_point);
                                }
                        }
                                                "non dominated rhs use point %p?", use_point);
                                }
                        }


@@ -21464,7 +21464,7 @@ static void verify_piece(struct compile_state *state)
 static void verify_ins_colors(struct compile_state *state)
 {
        struct triple *first, *ins;
 static void verify_ins_colors(struct compile_state *state)
 {
        struct triple *first, *ins;

-       
+

        first = state->first;
        ins = first;
        do {
        first = state->first;
        ins = first;
        do {


@@ -21581,7 +21581,7 @@ static void verify_consistency(struct compile_state *state)
                fprintf(state->dbgout, "consistency verified\n");
        }
 }
                fprintf(state->dbgout, "consistency verified\n");
        }
 }

-#else 
+#else

 static void verify_consistency(struct compile_state *state) {}
 #endif /* DEBUG_CONSISTENCY */
 
 static void verify_consistency(struct compile_state *state) {}
 #endif /* DEBUG_CONSISTENCY */
 


@@ -21694,7 +21694,7 @@ static void print_op_asm(struct compile_state *state,
                                param);
                }
                piece = (param < lhs)? LHS(ins, param) : RHS(ins, param - lhs);
                                param);
                }
                piece = (param < lhs)? LHS(ins, param) : RHS(ins, param - lhs);

-               fprintf(fp, "%s", 
+               fprintf(fp, "%s",

                        arch_reg_str(ID_REG(piece->id)));
                ptr = next -1;
        }
                        arch_reg_str(ID_REG(piece->id)));
                ptr = next -1;
        }


@@ -21954,14 +21954,14 @@ static int arch_regcm_intersect(unsigned regcm1, unsigned regcm2)
 {
        /* See if two register classes may have overlapping registers */
        unsigned gpr_mask = REGCM_GPR8 | REGCM_GPR8_LO | REGCM_GPR16_8 | REGCM_GPR16 |
 {
        /* See if two register classes may have overlapping registers */
        unsigned gpr_mask = REGCM_GPR8 | REGCM_GPR8_LO | REGCM_GPR16_8 | REGCM_GPR16 |

-               REGCM_GPR32_8 | REGCM_GPR32 | 
+               REGCM_GPR32_8 | REGCM_GPR32 |

                REGCM_DIVIDEND32 | REGCM_DIVIDEND64;
 
        /* Special case for the immediates */
        if ((regcm1 & (REGCM_IMM32 | REGCM_IMM16 | REGCM_IMM8)) &&
                ((regcm1 & ~(REGCM_IMM32 | REGCM_IMM16 | REGCM_IMM8)) == 0) &&
                (regcm2 & (REGCM_IMM32 | REGCM_IMM16 | REGCM_IMM8)) &&
                REGCM_DIVIDEND32 | REGCM_DIVIDEND64;
 
        /* Special case for the immediates */
        if ((regcm1 & (REGCM_IMM32 | REGCM_IMM16 | REGCM_IMM8)) &&
                ((regcm1 & ~(REGCM_IMM32 | REGCM_IMM16 | REGCM_IMM8)) == 0) &&
                (regcm2 & (REGCM_IMM32 | REGCM_IMM16 | REGCM_IMM8)) &&

-               ((regcm2 & ~(REGCM_IMM32 | REGCM_IMM16 | REGCM_IMM8)) == 0)) { 
+               ((regcm2 & ~(REGCM_IMM32 | REGCM_IMM16 | REGCM_IMM8)) == 0)) {

                return 0;
        }
        return (regcm1 & regcm2) ||
                return 0;
        }
        return (regcm1 & regcm2) ||


@@ -21994,7 +21994,7 @@ static void arch_reg_equivs(
                *equiv++ = REG_DXAX;
                *equiv++ = REG_EDXEAX;
                break;
                *equiv++ = REG_DXAX;
                *equiv++ = REG_EDXEAX;
                break;

-       case REG_BL:  
+       case REG_BL:

 #if X86_4_8BIT_GPRS
                *equiv++ = REG_BH;
 #endif
 #if X86_4_8BIT_GPRS
                *equiv++ = REG_BH;
 #endif


@@ -22054,19 +22054,19 @@ static void arch_reg_equivs(
                *equiv++ = REG_BH;
                *equiv++ = REG_EBX;
                break;
                *equiv++ = REG_BH;
                *equiv++ = REG_EBX;
                break;

-       case REG_CX:  
+       case REG_CX:

                *equiv++ = REG_CL;
                *equiv++ = REG_CH;
                *equiv++ = REG_ECX;
                break;
                *equiv++ = REG_CL;
                *equiv++ = REG_CH;
                *equiv++ = REG_ECX;
                break;

-       case REG_DX:  
+       case REG_DX:

                *equiv++ = REG_DL;
                *equiv++ = REG_DH;
                *equiv++ = REG_EDX;
                *equiv++ = REG_DXAX;
                *equiv++ = REG_EDXEAX;
                break;
                *equiv++ = REG_DL;
                *equiv++ = REG_DH;
                *equiv++ = REG_EDX;
                *equiv++ = REG_DXAX;
                *equiv++ = REG_EDXEAX;
                break;

-       case REG_SI:  
+       case REG_SI:

                *equiv++ = REG_ESI;
                break;
        case REG_DI:
                *equiv++ = REG_ESI;
                break;
        case REG_DI:


@@ -22102,19 +22102,19 @@ static void arch_reg_equivs(
                *equiv++ = REG_DXAX;
                *equiv++ = REG_EDXEAX;
                break;
                *equiv++ = REG_DXAX;
                *equiv++ = REG_EDXEAX;
                break;

-       case REG_ESI: 
+       case REG_ESI:

                *equiv++ = REG_SI;
                break;
                *equiv++ = REG_SI;
                break;

-       case REG_EDI: 
+       case REG_EDI:

                *equiv++ = REG_DI;
                break;
                *equiv++ = REG_DI;
                break;

-       case REG_EBP: 
+       case REG_EBP:

                *equiv++ = REG_BP;
                break;
                *equiv++ = REG_BP;
                break;

-       case REG_ESP: 
+       case REG_ESP:

                *equiv++ = REG_SP;
                break;
                *equiv++ = REG_SP;
                break;

-       case REG_DXAX: 
+       case REG_DXAX:

                *equiv++ = REG_AL;
                *equiv++ = REG_AH;
                *equiv++ = REG_DL;
                *equiv++ = REG_AL;
                *equiv++ = REG_AH;
                *equiv++ = REG_DL;


@@ -22125,7 +22125,7 @@ static void arch_reg_equivs(
                *equiv++ = REG_EDX;
                *equiv++ = REG_EDXEAX;
                break;
                *equiv++ = REG_EDX;
                *equiv++ = REG_EDXEAX;
                break;

-       case REG_EDXEAX: 
+       case REG_EDXEAX:

                *equiv++ = REG_AL;
                *equiv++ = REG_AH;
                *equiv++ = REG_DL;
                *equiv++ = REG_AL;
                *equiv++ = REG_AH;
                *equiv++ = REG_DL;


@@ -22137,15 +22137,15 @@ static void arch_reg_equivs(
                *equiv++ = REG_DXAX;
                break;
        }
                *equiv++ = REG_DXAX;
                break;
        }

-       *equiv++ = REG_UNSET; 
+       *equiv++ = REG_UNSET;

 }
 
 static unsigned arch_avail_mask(struct compile_state *state)
 {
        unsigned avail_mask;
        /* REGCM_GPR8 is not available */
 }
 
 static unsigned arch_avail_mask(struct compile_state *state)
 {
        unsigned avail_mask;
        /* REGCM_GPR8 is not available */

-       avail_mask = REGCM_GPR8_LO | REGCM_GPR16_8 | REGCM_GPR16 | 
-               REGCM_GPR32 | REGCM_GPR32_8 | 
+       avail_mask = REGCM_GPR8_LO | REGCM_GPR16_8 | REGCM_GPR16 |
+               REGCM_GPR32 | REGCM_GPR32_8 |

                REGCM_DIVIDEND32 | REGCM_DIVIDEND64 |
                REGCM_IMM32 | REGCM_IMM16 | REGCM_IMM8 | REGCM_FLAGS;
        if (state->arch->features & X86_MMX_REGS) {
                REGCM_DIVIDEND32 | REGCM_DIVIDEND64 |
                REGCM_IMM32 | REGCM_IMM16 | REGCM_IMM8 | REGCM_FLAGS;
        if (state->arch->features & X86_MMX_REGS) {


@@ -22188,7 +22188,7 @@ static unsigned arch_regcm_reg_normalize(struct compile_state *state, unsigned r
        /* Remove the immediate register classes */
        regcm &= ~(REGCM_IMM32 | REGCM_IMM16 | REGCM_IMM8);
        return regcm;
        /* Remove the immediate register classes */
        regcm &= ~(REGCM_IMM32 | REGCM_IMM16 | REGCM_IMM8);
        return regcm;

-       
+

 }
 
 static unsigned arch_reg_regcm(struct compile_state *state, int reg)
 }
 
 static unsigned arch_reg_regcm(struct compile_state *state, int reg)


@@ -22332,7 +22332,7 @@ static struct reg_info arch_reg_clobber(
        return result;
 }
 
        return result;
 }
 

-static int do_select_reg(struct compile_state *state, 
+static int do_select_reg(struct compile_state *state,

        char *used, int reg, unsigned classes)
 {
        unsigned mask;
        char *used, int reg, unsigned classes)
 {
        unsigned mask;


@@ -22357,7 +22357,7 @@ static int arch_select_free_register(
         * increase the odds the register allocator will work when
         * it guesses first give out registers from register classes
         * least likely to run out of registers.
         * increase the odds the register allocator will work when
         * it guesses first give out registers from register classes
         * least likely to run out of registers.

-        * 
+        *

         */
        int i, reg;
        reg = REG_UNSET;
         */
        int i, reg;
        reg = REG_UNSET;


@@ -22392,7 +22392,7 @@ static int arch_select_free_register(
 }
 
 
 }
 
 

-static unsigned arch_type_to_regcm(struct compile_state *state, struct type *type) 
+static unsigned arch_type_to_regcm(struct compile_state *state, struct type *type)

 {
 
 #if DEBUG_ROMCC_WARNINGS
 {
 
 #if DEBUG_ROMCC_WARNINGS


@@ -22402,13 +22402,13 @@ static unsigned arch_type_to_regcm(struct compile_state *state, struct type *typ
        mask = 0;
        switch(type->type & TYPE_MASK) {
        case TYPE_ARRAY:
        mask = 0;
        switch(type->type & TYPE_MASK) {
        case TYPE_ARRAY:

-       case TYPE_VOID: 
-               mask = 0; 
+       case TYPE_VOID:
+               mask = 0;

                break;
        case TYPE_CHAR:
        case TYPE_UCHAR:
                mask = REGCM_GPR8 | REGCM_GPR8_LO |
                break;
        case TYPE_CHAR:
        case TYPE_UCHAR:
                mask = REGCM_GPR8 | REGCM_GPR8_LO |

-                       REGCM_GPR16 | REGCM_GPR16_8 | 
+                       REGCM_GPR16 | REGCM_GPR16_8 |

                        REGCM_GPR32 | REGCM_GPR32_8 |
                        REGCM_DIVIDEND32 | REGCM_DIVIDEND64 |
                        REGCM_MMX | REGCM_XMM |
                        REGCM_GPR32 | REGCM_GPR32_8 |
                        REGCM_DIVIDEND32 | REGCM_DIVIDEND64 |
                        REGCM_MMX | REGCM_XMM |


@@ -22462,7 +22462,7 @@ static int is_imm32(struct triple *imm)
        // always true.
        return ((imm->op == OP_INTCONST) /* && (imm->u.cval <= 0xffffffffUL) */ ) ||
                (imm->op == OP_ADDRCONST);
        // always true.
        return ((imm->op == OP_INTCONST) /* && (imm->u.cval <= 0xffffffffUL) */ ) ||
                (imm->op == OP_ADDRCONST);

-       
+

 }
 static int is_imm16(struct triple *imm)
 {
 }
 static int is_imm16(struct triple *imm)
 {


@@ -22578,13 +22578,13 @@ static int get_imm8(struct triple *ins, struct triple **expr)
 #endif
 
 #define COPY8_REGCM     (REGCM_DIVIDEND64 | REGCM_DIVIDEND32 | REGCM_GPR32 | REGCM_GPR16 | REGCM_GPR8_LO | REGCM_MMX | REGCM_XMM)
 #endif
 
 #define COPY8_REGCM     (REGCM_DIVIDEND64 | REGCM_DIVIDEND32 | REGCM_GPR32 | REGCM_GPR16 | REGCM_GPR8_LO | REGCM_MMX | REGCM_XMM)

-#define COPY16_REGCM    (REGCM_DIVIDEND64 | REGCM_DIVIDEND32 | REGCM_GPR32 | REGCM_GPR16 | REGCM_MMX | REGCM_XMM)  
+#define COPY16_REGCM    (REGCM_DIVIDEND64 | REGCM_DIVIDEND32 | REGCM_GPR32 | REGCM_GPR16 | REGCM_MMX | REGCM_XMM)

 #define COPY32_REGCM    (REGCM_DIVIDEND64 | REGCM_DIVIDEND32 | REGCM_GPR32 | REGCM_MMX | REGCM_XMM)
 
 
 static struct ins_template templates[] = {
        [TEMPLATE_NOP]      = {
 #define COPY32_REGCM    (REGCM_DIVIDEND64 | REGCM_DIVIDEND32 | REGCM_GPR32 | REGCM_MMX | REGCM_XMM)
 
 
 static struct ins_template templates[] = {
        [TEMPLATE_NOP]      = {

-               .lhs = { 
+               .lhs = {

                        [ 0] = { REG_UNNEEDED, REGCM_IMMALL },
                        [ 1] = { REG_UNNEEDED, REGCM_IMMALL },
                        [ 2] = { REG_UNNEEDED, REGCM_IMMALL },
                        [ 0] = { REG_UNNEEDED, REGCM_IMMALL },
                        [ 1] = { REG_UNNEEDED, REGCM_IMMALL },
                        [ 2] = { REG_UNNEEDED, REGCM_IMMALL },


@@ -22651,10 +22651,10 @@ static struct ins_template templates[] = {
                        [63] = { REG_UNNEEDED, REGCM_IMMALL },
                },
        },
                        [63] = { REG_UNNEEDED, REGCM_IMMALL },
                },
        },

-       [TEMPLATE_INTCONST8] = { 
+       [TEMPLATE_INTCONST8] = {

                .lhs = { [0] = { REG_UNNEEDED, REGCM_IMM8 } },
        },
                .lhs = { [0] = { REG_UNNEEDED, REGCM_IMM8 } },
        },

-       [TEMPLATE_INTCONST32] = { 
+       [TEMPLATE_INTCONST32] = {

                .lhs = { [0] = { REG_UNNEEDED, REGCM_IMM32 } },
        },
        [TEMPLATE_UNKNOWNVAL] = {
                .lhs = { [0] = { REG_UNNEEDED, REGCM_IMM32 } },
        },
        [TEMPLATE_UNKNOWNVAL] = {


@@ -22684,32 +22684,32 @@ static struct ins_template templates[] = {
                .lhs = { [0] = { REG_UNSET, COPY32_REGCM } },
                .rhs = { [0] = { REG_UNNEEDED, REGCM_IMM32 | REGCM_IMM16 | REGCM_IMM8 } },
        },
                .lhs = { [0] = { REG_UNSET, COPY32_REGCM } },
                .rhs = { [0] = { REG_UNNEEDED, REGCM_IMM32 | REGCM_IMM16 | REGCM_IMM8 } },
        },

-       [TEMPLATE_PHI8] = { 
+       [TEMPLATE_PHI8] = {

                .lhs = { [0] = { REG_VIRT0, COPY8_REGCM } },
                .rhs = { [0] = { REG_VIRT0, COPY8_REGCM } },
        },
                .lhs = { [0] = { REG_VIRT0, COPY8_REGCM } },
                .rhs = { [0] = { REG_VIRT0, COPY8_REGCM } },
        },

-       [TEMPLATE_PHI16] = { 
+       [TEMPLATE_PHI16] = {

                .lhs = { [0] = { REG_VIRT0, COPY16_REGCM } },
                .lhs = { [0] = { REG_VIRT0, COPY16_REGCM } },

-               .rhs = { [0] = { REG_VIRT0, COPY16_REGCM } }, 
+               .rhs = { [0] = { REG_VIRT0, COPY16_REGCM } },

        },
        },

-       [TEMPLATE_PHI32] = { 
+       [TEMPLATE_PHI32] = {

                .lhs = { [0] = { REG_VIRT0, COPY32_REGCM } },
                .lhs = { [0] = { REG_VIRT0, COPY32_REGCM } },

-               .rhs = { [0] = { REG_VIRT0, COPY32_REGCM } }, 
+               .rhs = { [0] = { REG_VIRT0, COPY32_REGCM } },

        },
        [TEMPLATE_STORE8] = {
        },
        [TEMPLATE_STORE8] = {

-               .rhs = { 
+               .rhs = {

                        [0] = { REG_UNSET, REGCM_GPR32 },
                        [1] = { REG_UNSET, REGCM_GPR8_LO },
                },
        },
        [TEMPLATE_STORE16] = {
                        [0] = { REG_UNSET, REGCM_GPR32 },
                        [1] = { REG_UNSET, REGCM_GPR8_LO },
                },
        },
        [TEMPLATE_STORE16] = {

-               .rhs = { 
+               .rhs = {

                        [0] = { REG_UNSET, REGCM_GPR32 },
                        [1] = { REG_UNSET, REGCM_GPR16 },
                },
        },
        [TEMPLATE_STORE32] = {
                        [0] = { REG_UNSET, REGCM_GPR32 },
                        [1] = { REG_UNSET, REGCM_GPR16 },
                },
        },
        [TEMPLATE_STORE32] = {

-               .rhs = { 
+               .rhs = {

                        [0] = { REG_UNSET, REGCM_GPR32 },
                        [1] = { REG_UNSET, REGCM_GPR32 },
                },
                        [0] = { REG_UNSET, REGCM_GPR32 },
                        [1] = { REG_UNSET, REGCM_GPR32 },
                },


@@ -22728,84 +22728,84 @@ static struct ins_template templates[] = {
        },
        [TEMPLATE_BINARY8_REG] = {
                .lhs = { [0] = { REG_VIRT0, REGCM_GPR8_LO } },
        },
        [TEMPLATE_BINARY8_REG] = {
                .lhs = { [0] = { REG_VIRT0, REGCM_GPR8_LO } },

-               .rhs = { 
+               .rhs = {

                        [0] = { REG_VIRT0, REGCM_GPR8_LO },
                        [1] = { REG_UNSET, REGCM_GPR8_LO },
                },
        },
        [TEMPLATE_BINARY16_REG] = {
                .lhs = { [0] = { REG_VIRT0, REGCM_GPR16 } },
                        [0] = { REG_VIRT0, REGCM_GPR8_LO },
                        [1] = { REG_UNSET, REGCM_GPR8_LO },
                },
        },
        [TEMPLATE_BINARY16_REG] = {
                .lhs = { [0] = { REG_VIRT0, REGCM_GPR16 } },

-               .rhs = { 
+               .rhs = {

                        [0] = { REG_VIRT0, REGCM_GPR16 },
                        [1] = { REG_UNSET, REGCM_GPR16 },
                },
        },
        [TEMPLATE_BINARY32_REG] = {
                .lhs = { [0] = { REG_VIRT0, REGCM_GPR32 } },
                        [0] = { REG_VIRT0, REGCM_GPR16 },
                        [1] = { REG_UNSET, REGCM_GPR16 },
                },
        },
        [TEMPLATE_BINARY32_REG] = {
                .lhs = { [0] = { REG_VIRT0, REGCM_GPR32 } },

-               .rhs = { 
+               .rhs = {

                        [0] = { REG_VIRT0, REGCM_GPR32 },
                        [1] = { REG_UNSET, REGCM_GPR32 },
                },
        },
        [TEMPLATE_BINARY8_IMM] = {
                .lhs = { [0] = { REG_VIRT0, REGCM_GPR8_LO } },
                        [0] = { REG_VIRT0, REGCM_GPR32 },
                        [1] = { REG_UNSET, REGCM_GPR32 },
                },
        },
        [TEMPLATE_BINARY8_IMM] = {
                .lhs = { [0] = { REG_VIRT0, REGCM_GPR8_LO } },

-               .rhs = { 
+               .rhs = {

                        [0] = { REG_VIRT0,    REGCM_GPR8_LO },
                        [1] = { REG_UNNEEDED, REGCM_IMM8 },
                },
        },
        [TEMPLATE_BINARY16_IMM] = {
                .lhs = { [0] = { REG_VIRT0, REGCM_GPR16 } },
                        [0] = { REG_VIRT0,    REGCM_GPR8_LO },
                        [1] = { REG_UNNEEDED, REGCM_IMM8 },
                },
        },
        [TEMPLATE_BINARY16_IMM] = {
                .lhs = { [0] = { REG_VIRT0, REGCM_GPR16 } },

-               .rhs = { 
+               .rhs = {

                        [0] = { REG_VIRT0,    REGCM_GPR16 },
                        [1] = { REG_UNNEEDED, REGCM_IMM16 },
                },
        },
        [TEMPLATE_BINARY32_IMM] = {
                .lhs = { [0] = { REG_VIRT0, REGCM_GPR32 } },
                        [0] = { REG_VIRT0,    REGCM_GPR16 },
                        [1] = { REG_UNNEEDED, REGCM_IMM16 },
                },
        },
        [TEMPLATE_BINARY32_IMM] = {
                .lhs = { [0] = { REG_VIRT0, REGCM_GPR32 } },

-               .rhs = { 
+               .rhs = {

                        [0] = { REG_VIRT0,    REGCM_GPR32 },
                        [1] = { REG_UNNEEDED, REGCM_IMM32 },
                },
        },
        [TEMPLATE_SL8_CL] = {
                .lhs = { [0] = { REG_VIRT0, REGCM_GPR8_LO } },
                        [0] = { REG_VIRT0,    REGCM_GPR32 },
                        [1] = { REG_UNNEEDED, REGCM_IMM32 },
                },
        },
        [TEMPLATE_SL8_CL] = {
                .lhs = { [0] = { REG_VIRT0, REGCM_GPR8_LO } },

-               .rhs = { 
+               .rhs = {

                        [0] = { REG_VIRT0, REGCM_GPR8_LO },
                        [1] = { REG_CL, REGCM_GPR8_LO },
                },
        },
        [TEMPLATE_SL16_CL] = {
                .lhs = { [0] = { REG_VIRT0, REGCM_GPR16 } },
                        [0] = { REG_VIRT0, REGCM_GPR8_LO },
                        [1] = { REG_CL, REGCM_GPR8_LO },
                },
        },
        [TEMPLATE_SL16_CL] = {
                .lhs = { [0] = { REG_VIRT0, REGCM_GPR16 } },

-               .rhs = { 
+               .rhs = {

                        [0] = { REG_VIRT0, REGCM_GPR16 },
                        [1] = { REG_CL, REGCM_GPR8_LO },
                },
        },
        [TEMPLATE_SL32_CL] = {
                .lhs = { [0] = { REG_VIRT0, REGCM_GPR32 } },
                        [0] = { REG_VIRT0, REGCM_GPR16 },
                        [1] = { REG_CL, REGCM_GPR8_LO },
                },
        },
        [TEMPLATE_SL32_CL] = {
                .lhs = { [0] = { REG_VIRT0, REGCM_GPR32 } },

-               .rhs = { 
+               .rhs = {

                        [0] = { REG_VIRT0, REGCM_GPR32 },
                        [1] = { REG_CL, REGCM_GPR8_LO },
                },
        },
        [TEMPLATE_SL8_IMM] = {
                .lhs = { [0] = { REG_VIRT0, REGCM_GPR8_LO } },
                        [0] = { REG_VIRT0, REGCM_GPR32 },
                        [1] = { REG_CL, REGCM_GPR8_LO },
                },
        },
        [TEMPLATE_SL8_IMM] = {
                .lhs = { [0] = { REG_VIRT0, REGCM_GPR8_LO } },

-               .rhs = { 
+               .rhs = {

                        [0] = { REG_VIRT0,    REGCM_GPR8_LO },
                        [1] = { REG_UNNEEDED, REGCM_IMM8 },
                },
        },
        [TEMPLATE_SL16_IMM] = {
                .lhs = { [0] = { REG_VIRT0, REGCM_GPR16 } },
                        [0] = { REG_VIRT0,    REGCM_GPR8_LO },
                        [1] = { REG_UNNEEDED, REGCM_IMM8 },
                },
        },
        [TEMPLATE_SL16_IMM] = {
                .lhs = { [0] = { REG_VIRT0, REGCM_GPR16 } },

-               .rhs = { 
+               .rhs = {

                        [0] = { REG_VIRT0,    REGCM_GPR16 },
                        [1] = { REG_UNNEEDED, REGCM_IMM8 },
                },
        },
        [TEMPLATE_SL32_IMM] = {
                .lhs = { [0] = { REG_VIRT0, REGCM_GPR32 } },
                        [0] = { REG_VIRT0,    REGCM_GPR16 },
                        [1] = { REG_UNNEEDED, REGCM_IMM8 },
                },
        },
        [TEMPLATE_SL32_IMM] = {
                .lhs = { [0] = { REG_VIRT0, REGCM_GPR32 } },

-               .rhs = { 
+               .rhs = {

                        [0] = { REG_VIRT0,    REGCM_GPR32 },
                        [1] = { REG_UNNEEDED, REGCM_IMM8 },
                },
                        [0] = { REG_VIRT0,    REGCM_GPR32 },
                        [1] = { REG_UNNEEDED, REGCM_IMM8 },
                },


@@ -22887,19 +22887,19 @@ static struct ins_template templates[] = {
                .rhs = { [0] = { REG_UNSET, REGCM_GPR32 } },
        },
        [TEMPLATE_INB_DX] = {
                .rhs = { [0] = { REG_UNSET, REGCM_GPR32 } },
        },
        [TEMPLATE_INB_DX] = {

-               .lhs = { [0] = { REG_AL,  REGCM_GPR8_LO } },  
+               .lhs = { [0] = { REG_AL,  REGCM_GPR8_LO } },

                .rhs = { [0] = { REG_DX, REGCM_GPR16 } },
        },
        [TEMPLATE_INB_IMM] = {
                .rhs = { [0] = { REG_DX, REGCM_GPR16 } },
        },
        [TEMPLATE_INB_IMM] = {

-               .lhs = { [0] = { REG_AL,  REGCM_GPR8_LO } },  
+               .lhs = { [0] = { REG_AL,  REGCM_GPR8_LO } },

                .rhs = { [0] = { REG_UNNEEDED, REGCM_IMM8 } },
        },
                .rhs = { [0] = { REG_UNNEEDED, REGCM_IMM8 } },
        },

-       [TEMPLATE_INW_DX]  = { 
-               .lhs = { [0] = { REG_AX,  REGCM_GPR16 } }, 
+       [TEMPLATE_INW_DX]  = {
+               .lhs = { [0] = { REG_AX,  REGCM_GPR16 } },

                .rhs = { [0] = { REG_DX, REGCM_GPR16 } },
        },
                .rhs = { [0] = { REG_DX, REGCM_GPR16 } },
        },

-       [TEMPLATE_INW_IMM] = { 
-               .lhs = { [0] = { REG_AX,  REGCM_GPR16 } }, 
+       [TEMPLATE_INW_IMM] = {
+               .lhs = { [0] = { REG_AX,  REGCM_GPR16 } },

                .rhs = { [0] = { REG_UNNEEDED, REGCM_IMM8 } },
        },
        [TEMPLATE_INL_DX]  = {
                .rhs = { [0] = { REG_UNNEEDED, REGCM_IMM8 } },
        },
        [TEMPLATE_INL_DX]  = {


@@ -22910,19 +22910,19 @@ static struct ins_template templates[] = {
                .lhs = { [0] = { REG_EAX, REGCM_GPR32 } },
                .rhs = { [0] = { REG_UNNEEDED, REGCM_IMM8 } },
        },
                .lhs = { [0] = { REG_EAX, REGCM_GPR32 } },
                .rhs = { [0] = { REG_UNNEEDED, REGCM_IMM8 } },
        },

-       [TEMPLATE_OUTB_DX] = { 
+       [TEMPLATE_OUTB_DX] = {

                .rhs = {
                        [0] = { REG_AL,  REGCM_GPR8_LO },
                        [1] = { REG_DX, REGCM_GPR16 },
                },
        },
                .rhs = {
                        [0] = { REG_AL,  REGCM_GPR8_LO },
                        [1] = { REG_DX, REGCM_GPR16 },
                },
        },

-       [TEMPLATE_OUTB_IMM] = { 
+       [TEMPLATE_OUTB_IMM] = {

                .rhs = {
                .rhs = {

-                       [0] = { REG_AL,  REGCM_GPR8_LO },  
+                       [0] = { REG_AL,  REGCM_GPR8_LO },

                        [1] = { REG_UNNEEDED, REGCM_IMM8 },
                },
        },
                        [1] = { REG_UNNEEDED, REGCM_IMM8 },
                },
        },

-       [TEMPLATE_OUTW_DX] = { 
+       [TEMPLATE_OUTW_DX] = {

                .rhs = {
                        [0] = { REG_AX,  REGCM_GPR16 },
                        [1] = { REG_DX, REGCM_GPR16 },
                .rhs = {
                        [0] = { REG_AX,  REGCM_GPR16 },
                        [1] = { REG_DX, REGCM_GPR16 },


@@ -22930,19 +22930,19 @@ static struct ins_template templates[] = {
        },
        [TEMPLATE_OUTW_IMM] = {
                .rhs = {
        },
        [TEMPLATE_OUTW_IMM] = {
                .rhs = {

-                       [0] = { REG_AX,  REGCM_GPR16 }, 
+                       [0] = { REG_AX,  REGCM_GPR16 },

                        [1] = { REG_UNNEEDED, REGCM_IMM8 },
                },
        },
                        [1] = { REG_UNNEEDED, REGCM_IMM8 },
                },
        },

-       [TEMPLATE_OUTL_DX] = { 
+       [TEMPLATE_OUTL_DX] = {

                .rhs = {
                        [0] = { REG_EAX, REGCM_GPR32 },
                        [1] = { REG_DX, REGCM_GPR16 },
                },
        },
                .rhs = {
                        [0] = { REG_EAX, REGCM_GPR32 },
                        [1] = { REG_DX, REGCM_GPR16 },
                },
        },

-       [TEMPLATE_OUTL_IMM] = { 
+       [TEMPLATE_OUTL_IMM] = {

                .rhs = {
                .rhs = {

-                       [0] = { REG_EAX, REGCM_GPR32 }, 
+                       [0] = { REG_EAX, REGCM_GPR32 },

                        [1] = { REG_UNNEEDED, REGCM_IMM8 },
                },
        },
                        [1] = { REG_UNNEEDED, REGCM_IMM8 },
                },
        },


@@ -22951,7 +22951,7 @@ static struct ins_template templates[] = {
                .rhs = { [0] = { REG_UNSET, REGCM_GPR32 } },
        },
        [TEMPLATE_RDMSR] = {
                .rhs = { [0] = { REG_UNSET, REGCM_GPR32 } },
        },
        [TEMPLATE_RDMSR] = {

-               .lhs = { 
+               .lhs = {

                        [0] = { REG_EAX, REGCM_GPR32 },
                        [1] = { REG_EDX, REGCM_GPR32 },
                },
                        [0] = { REG_EAX, REGCM_GPR32 },
                        [1] = { REG_EDX, REGCM_GPR32 },
                },


@@ -22966,27 +22966,27 @@ static struct ins_template templates[] = {
        },
        [TEMPLATE_UMUL8] = {
                .lhs = { [0] = { REG_AX, REGCM_GPR16 } },
        },
        [TEMPLATE_UMUL8] = {
                .lhs = { [0] = { REG_AX, REGCM_GPR16 } },

-               .rhs = { 
+               .rhs = {

                        [0] = { REG_AL, REGCM_GPR8_LO },
                        [1] = { REG_UNSET, REGCM_GPR8_LO },
                },
        },
        [TEMPLATE_UMUL16] = {
                .lhs = { [0] = { REG_DXAX, REGCM_DIVIDEND32 } },
                        [0] = { REG_AL, REGCM_GPR8_LO },
                        [1] = { REG_UNSET, REGCM_GPR8_LO },
                },
        },
        [TEMPLATE_UMUL16] = {
                .lhs = { [0] = { REG_DXAX, REGCM_DIVIDEND32 } },

-               .rhs = { 
+               .rhs = {

                        [0] = { REG_AX, REGCM_GPR16 },
                        [1] = { REG_UNSET, REGCM_GPR16 },
                },
        },
        [TEMPLATE_UMUL32] = {
                .lhs = { [0] = { REG_EDXEAX, REGCM_DIVIDEND64 } },
                        [0] = { REG_AX, REGCM_GPR16 },
                        [1] = { REG_UNSET, REGCM_GPR16 },
                },
        },
        [TEMPLATE_UMUL32] = {
                .lhs = { [0] = { REG_EDXEAX, REGCM_DIVIDEND64 } },

-               .rhs = { 
+               .rhs = {

                        [0] = { REG_EAX, REGCM_GPR32 },
                        [1] = { REG_UNSET, REGCM_GPR32 },
                },
        },
        [TEMPLATE_DIV8] = {
                        [0] = { REG_EAX, REGCM_GPR32 },
                        [1] = { REG_UNSET, REGCM_GPR32 },
                },
        },
        [TEMPLATE_DIV8] = {

-               .lhs = { 
+               .lhs = {

                        [0] = { REG_AL, REGCM_GPR8_LO },
                        [1] = { REG_AH, REGCM_GPR8 },
                },
                        [0] = { REG_AL, REGCM_GPR8_LO },
                        [1] = { REG_AH, REGCM_GPR8 },
                },


@@ -22996,7 +22996,7 @@ static struct ins_template templates[] = {
                },
        },
        [TEMPLATE_DIV16] = {
                },
        },
        [TEMPLATE_DIV16] = {

-               .lhs = { 
+               .lhs = {

                        [0] = { REG_AX, REGCM_GPR16 },
                        [1] = { REG_DX, REGCM_GPR16 },
                },
                        [0] = { REG_AX, REGCM_GPR16 },
                        [1] = { REG_DX, REGCM_GPR16 },
                },


@@ -23006,7 +23006,7 @@ static struct ins_template templates[] = {
                },
        },
        [TEMPLATE_DIV32] = {
                },
        },
        [TEMPLATE_DIV32] = {

-               .lhs = { 
+               .lhs = {

                        [0] = { REG_EAX, REGCM_GPR32 },
                        [1] = { REG_EDX, REGCM_GPR32 },
                },
                        [0] = { REG_EAX, REGCM_GPR32 },
                        [1] = { REG_EDX, REGCM_GPR32 },
                },


@@ -23027,7 +23027,7 @@ static void fixup_branch(struct compile_state *state,
        }
        test = pre_triple(state, branch,
                cmp_op, cmp_type, left, right);
        }
        test = pre_triple(state, branch,
                cmp_op, cmp_type, left, right);

-       test->template_id = TEMPLATE_TEST32; 
+       test->template_id = TEMPLATE_TEST32;

        if (cmp_op == OP_CMP) {
                test->template_id = TEMPLATE_CMP32_REG;
                if (get_imm32(test, &RHS(test, 1))) {
        if (cmp_op == OP_CMP) {
                test->template_id = TEMPLATE_CMP32_REG;
                if (get_imm32(test, &RHS(test, 1))) {


@@ -23061,13 +23061,13 @@ static void fixup_branches(struct compile_state *state,
                                right = RHS(cmp, 1);
                        }
                        branch = entry->member;
                                right = RHS(cmp, 1);
                        }
                        branch = entry->member;

-                       fixup_branch(state, branch, jmp_op, 
+                       fixup_branch(state, branch, jmp_op,

                                cmp->op, cmp->type, left, right);
                }
        }
 }
 
                                cmp->op, cmp->type, left, right);
                }
        }
 }
 

-static void bool_cmp(struct compile_state *state, 
+static void bool_cmp(struct compile_state *state,

        struct triple *ins, int cmp_op, int jmp_op, int set_op)
 {
        struct triple_set *entry, *next;
        struct triple *ins, int cmp_op, int jmp_op, int set_op)
 {
        struct triple_set *entry, *next;


@@ -23134,7 +23134,7 @@ struct reg_info arch_reg_lhs(struct compile_state *state, struct triple *ins, in
                break;
        default:
                if (ins->template_id > LAST_TEMPLATE) {
                break;
        default:
                if (ins->template_id > LAST_TEMPLATE) {

-                       internal_error(state, ins, "bad template number %d", 
+                       internal_error(state, ins, "bad template number %d",

                                ins->template_id);
                }
                template = &templates[ins->template_id];
                                ins->template_id);
                }
                template = &templates[ins->template_id];


@@ -23169,7 +23169,7 @@ struct reg_info arch_reg_rhs(struct compile_state *state, struct triple *ins, in
                /* Fall through */
        default:
                if (ins->template_id > LAST_TEMPLATE) {
                /* Fall through */
        default:
                if (ins->template_id > LAST_TEMPLATE) {

-                       internal_error(state, ins, "bad template number %d", 
+                       internal_error(state, ins, "bad template number %d",

                                ins->template_id);
                }
                template = &templates[ins->template_id];
                                ins->template_id);
                }
                template = &templates[ins->template_id];


@@ -23187,7 +23187,7 @@ static struct triple *mod_div(struct compile_state *state,
        struct triple *ins, int div_op, int index)
 {
        struct triple *div, *piece0, *piece1;
        struct triple *ins, int div_op, int index)
 {
        struct triple *div, *piece0, *piece1;

-       
+

        /* Generate the appropriate division instruction */
        div = post_triple(state, ins, div_op, ins->type, 0, 0);
        RHS(div, 0) = RHS(ins, 0);
        /* Generate the appropriate division instruction */
        div = post_triple(state, ins, div_op, ins->type, 0, 0);
        RHS(div, 0) = RHS(ins, 0);


@@ -23497,8 +23497,8 @@ static struct triple *transform_to_arch_instruction(
        case OP_NEG:
                ins->template_id = TEMPLATE_UNARY32;
                break;
        case OP_NEG:
                ins->template_id = TEMPLATE_UNARY32;
                break;

-       case OP_EQ: 
-               bool_cmp(state, ins, OP_CMP, OP_JMP_EQ, OP_SET_EQ); 
+       case OP_EQ:
+               bool_cmp(state, ins, OP_CMP, OP_JMP_EQ, OP_SET_EQ);

                break;
        case OP_NOTEQ:
                bool_cmp(state, ins, OP_CMP, OP_JMP_NOTEQ, OP_SET_NOTEQ);
                break;
        case OP_NOTEQ:
                bool_cmp(state, ins, OP_CMP, OP_JMP_NOTEQ, OP_SET_NOTEQ);


@@ -23538,7 +23538,7 @@ static struct triple *transform_to_arch_instruction(
                ins->template_id = TEMPLATE_NOP;
                break;
        case OP_CBRANCH:
                ins->template_id = TEMPLATE_NOP;
                break;
        case OP_CBRANCH:

-               fixup_branch(state, ins, OP_JMP_NOTEQ, OP_TEST, 
+               fixup_branch(state, ins, OP_JMP_NOTEQ, OP_TEST,

                        RHS(ins, 0)->type, RHS(ins, 0), 0);
                break;
        case OP_CALL:
                        RHS(ins, 0)->type, RHS(ins, 0), 0);
                break;
        case OP_CALL:


@@ -23644,20 +23644,20 @@ static void generate_local_labels(struct compile_state *state)
        first = state->first;
        label = first;
        do {
        first = state->first;
        label = first;
        do {

-               if ((label->op == OP_LABEL) || 
+               if ((label->op == OP_LABEL) ||

                        (label->op == OP_SDECL)) {
                        if (label->use) {
                                label->u.cval = next_label(state);
                        } else {
                                label->u.cval = 0;
                        }
                        (label->op == OP_SDECL)) {
                        if (label->use) {
                                label->u.cval = next_label(state);
                        } else {
                                label->u.cval = 0;
                        }

-                       
+

                }
                label = label->next;
        } while(label != first);
 }
 
                }
                label = label->next;
        } while(label != first);
 }
 

-static int check_reg(struct compile_state *state, 
+static int check_reg(struct compile_state *state,

        struct triple *triple, int classes)
 {
        unsigned mask;
        struct triple *triple, int classes)
 {
        unsigned mask;


@@ -23688,7 +23688,7 @@ static const char *arch_regs[] = {
        "%edx:%eax",
        "%dx:%ax",
        "%mm0", "%mm1", "%mm2", "%mm3", "%mm4", "%mm5", "%mm6", "%mm7",
        "%edx:%eax",
        "%dx:%ax",
        "%mm0", "%mm1", "%mm2", "%mm3", "%mm4", "%mm5", "%mm6", "%mm7",

-       "%xmm0", "%xmm1", "%xmm2", "%xmm3", 
+       "%xmm0", "%xmm1", "%xmm2", "%xmm3",

        "%xmm4", "%xmm5", "%xmm6", "%xmm7",
 };
 static const char *arch_reg_str(int reg)
        "%xmm4", "%xmm5", "%xmm6", "%xmm7",
 };
 static const char *arch_reg_str(int reg)


@@ -23747,7 +23747,7 @@ static int reg_size(struct compile_state *state, struct triple *ins)
        }
        return arch_reg_size(reg);
 }
        }
        return arch_reg_size(reg);
 }

-       
+

 
 
 const char *type_suffix(struct compile_state *state, struct type *type)
 
 
 const char *type_suffix(struct compile_state *state, struct type *type)


@@ -23770,7 +23770,7 @@ static void print_const_val(
 {
        switch(ins->op) {
        case OP_INTCONST:
 {
        switch(ins->op) {
        case OP_INTCONST:

-               fprintf(fp, " $%ld ", 
+               fprintf(fp, " $%ld ",

                        (long)(ins->u.cval));
                break;
        case OP_ADDRCONST:
                        (long)(ins->u.cval));
                break;
        case OP_ADDRCONST:


@@ -23783,7 +23783,7 @@ static void print_const_val(
                        internal_error(state, ins, "unlabeled constant");
                }
                fprintf(fp, " $L%s%lu+%lu ",
                        internal_error(state, ins, "unlabeled constant");
                }
                fprintf(fp, " $L%s%lu+%lu ",

-                       state->compiler->label_prefix, 
+                       state->compiler->label_prefix,

                        (unsigned long)(MISC(ins, 0)->u.cval),
                        (unsigned long)(ins->u.cval));
                break;
                        (unsigned long)(MISC(ins, 0)->u.cval),
                        (unsigned long)(ins->u.cval));
                break;


@@ -23801,12 +23801,12 @@ static void print_const(struct compile_state *state,
                switch(ins->type->type & TYPE_MASK) {
                case TYPE_CHAR:
                case TYPE_UCHAR:
                switch(ins->type->type & TYPE_MASK) {
                case TYPE_CHAR:
                case TYPE_UCHAR:

-                       fprintf(fp, ".byte 0x%02lx\n", 
+                       fprintf(fp, ".byte 0x%02lx\n",

                                (unsigned long)(ins->u.cval));
                        break;
                case TYPE_SHORT:
                case TYPE_USHORT:
                                (unsigned long)(ins->u.cval));
                        break;
                case TYPE_SHORT:
                case TYPE_USHORT:

-                       fprintf(fp, ".short 0x%04lx\n", 
+                       fprintf(fp, ".short 0x%04lx\n",

                                (unsigned long)(ins->u.cval));
                        break;
                case TYPE_INT:
                                (unsigned long)(ins->u.cval));
                        break;
                case TYPE_INT:


@@ -23814,7 +23814,7 @@ static void print_const(struct compile_state *state,
                case TYPE_LONG:
                case TYPE_ULONG:
                case TYPE_POINTER:
                case TYPE_LONG:
                case TYPE_ULONG:
                case TYPE_POINTER:

-                       fprintf(fp, ".int %lu\n", 
+                       fprintf(fp, ".int %lu\n",

                                (unsigned long)(ins->u.cval));
                        break;
                default:
                                (unsigned long)(ins->u.cval));
                        break;
                default:


@@ -23824,7 +23824,7 @@ static void print_const(struct compile_state *state,
                        internal_error(state, ins, "Unknown constant type. Val: %lu",
                                (unsigned long)(ins->u.cval));
                }
                        internal_error(state, ins, "Unknown constant type. Val: %lu",
                                (unsigned long)(ins->u.cval));
                }

-               
+

                break;
        case OP_ADDRCONST:
                if ((MISC(ins, 0)->op != OP_SDECL) &&
                break;
        case OP_ADDRCONST:
                if ((MISC(ins, 0)->op != OP_SDECL) &&


@@ -23896,7 +23896,7 @@ static long get_mask_pool_ref(
 }
 
 static void print_binary_op(struct compile_state *state,
 }
 
 static void print_binary_op(struct compile_state *state,

-       const char *op, struct triple *ins, FILE *fp) 
+       const char *op, struct triple *ins, FILE *fp)

 {
        unsigned mask;
        mask = REGCM_GPR32 | REGCM_GPR16 | REGCM_GPR8_LO;
 {
        unsigned mask;
        mask = REGCM_GPR32 | REGCM_GPR16 | REGCM_GPR8_LO;


@@ -23923,7 +23923,7 @@ static void print_binary_op(struct compile_state *state,
                        reg(state, RHS(ins, 0), mask));
        }
 }
                        reg(state, RHS(ins, 0), mask));
        }
 }

-static void print_unary_op(struct compile_state *state, 
+static void print_unary_op(struct compile_state *state,

        const char *op, struct triple *ins, FILE *fp)
 {
        unsigned mask;
        const char *op, struct triple *ins, FILE *fp)
 {
        unsigned mask;


@@ -23987,7 +23987,7 @@ static void print_op_in(struct compile_state *state, struct triple *ins, FILE *f
                        internal_error(state, ins, "src != %%dx");
                }
                fprintf(fp, "\t%s %s, %s\n",
                        internal_error(state, ins, "src != %%dx");
                }
                fprintf(fp, "\t%s %s, %s\n",

-                       op, 
+                       op,

                        reg(state, RHS(ins, 0), REGCM_GPR16),
                        reg(state, ins, mask));
        }
                        reg(state, RHS(ins, 0), REGCM_GPR16),
                        reg(state, ins, mask));
        }


@@ -24013,7 +24013,7 @@ static void print_op_out(struct compile_state *state, struct triple *ins, FILE *
                internal_error(state, ins, "src != %%eax");
        }
        if (is_const(RHS(ins, 1))) {
                internal_error(state, ins, "src != %%eax");
        }
        if (is_const(RHS(ins, 1))) {

-               fprintf(fp, "\t%s %s,", 
+               fprintf(fp, "\t%s %s,",

                        op, reg(state, RHS(ins, 0), mask));
                print_const_val(state, RHS(ins, 1), fp);
                fprintf(fp, "\n");
                        op, reg(state, RHS(ins, 0), mask));
                print_const_val(state, RHS(ins, 1), fp);
                fprintf(fp, "\n");


@@ -24025,7 +24025,7 @@ static void print_op_out(struct compile_state *state, struct triple *ins, FILE *
                        internal_error(state, ins, "dst != %%dx");
                }
                fprintf(fp, "\t%s %s, %s\n",
                        internal_error(state, ins, "dst != %%dx");
                }
                fprintf(fp, "\t%s %s, %s\n",

-                       op, 
+                       op,

                        reg(state, RHS(ins, 0), mask),
                        reg(state, RHS(ins, 1), REGCM_GPR16));
        }
                        reg(state, RHS(ins, 0), mask),
                        reg(state, RHS(ins, 1), REGCM_GPR16));
        }


@@ -24075,7 +24075,7 @@ static void print_op_move(struct compile_state *state,
                src_regcm = arch_reg_regcm(state, src_reg);
                dst_regcm = arch_reg_regcm(state, dst_reg);
                /* If the class is the same just move the register */
                src_regcm = arch_reg_regcm(state, src_reg);
                dst_regcm = arch_reg_regcm(state, dst_reg);
                /* If the class is the same just move the register */

-               if (src_regcm & dst_regcm & 
+               if (src_regcm & dst_regcm &

                        (REGCM_GPR8_LO | REGCM_GPR16 | REGCM_GPR32)) {
                        if ((src_reg != dst_reg) || !omit_copy) {
                                fprintf(fp, "\tmov %s, %s\n",
                        (REGCM_GPR8_LO | REGCM_GPR16 | REGCM_GPR32)) {
                        if ((src_reg != dst_reg) || !omit_copy) {
                                fprintf(fp, "\tmov %s, %s\n",


@@ -24089,7 +24089,7 @@ static void print_op_move(struct compile_state *state,
                        src_reg = (src_reg - REGC_GPR32_FIRST) + REGC_GPR16_FIRST;
                        if ((src_reg != dst_reg) || !omit_copy) {
                                fprintf(fp, "\tmovw %s, %s\n",
                        src_reg = (src_reg - REGC_GPR32_FIRST) + REGC_GPR16_FIRST;
                        if ((src_reg != dst_reg) || !omit_copy) {
                                fprintf(fp, "\tmovw %s, %s\n",

-                                       arch_reg_str(src_reg), 
+                                       arch_reg_str(src_reg),

                                        arch_reg_str(dst_reg));
                        }
                }
                                        arch_reg_str(dst_reg));
                        }
                }


@@ -24126,7 +24126,7 @@ static void print_op_move(struct compile_state *state,
                        }
                }
                /* Move 8/16bit to 16/32bit */
                        }
                }
                /* Move 8/16bit to 16/32bit */

-               else if ((src_regcm & (REGCM_GPR8_LO | REGCM_GPR16)) && 
+               else if ((src_regcm & (REGCM_GPR8_LO | REGCM_GPR16)) &&

                        (dst_regcm & (REGCM_GPR16 | REGCM_GPR32))) {
                        const char *op;
                        op = is_signed(src->type)? "movsx": "movzx";
                        (dst_regcm & (REGCM_GPR16 | REGCM_GPR32))) {
                        const char *op;
                        op = is_signed(src->type)? "movsx": "movzx";


@@ -24198,7 +24198,7 @@ static void print_op_move(struct compile_state *state,
                        const char *extend;
                        extend = is_signed(src->type)? "cltd":"movl $0, %edx";
                        fprintf(fp, "\tmov %s, %%eax\n\t%s\n",
                        const char *extend;
                        extend = is_signed(src->type)? "cltd":"movl $0, %edx";
                        fprintf(fp, "\tmov %s, %%eax\n\t%s\n",

-                               arch_reg_str(src_reg), 
+                               arch_reg_str(src_reg),

                                extend);
                }
                /* Move from 64bit gpr to gpr */
                                extend);
                }
                /* Move from 64bit gpr to gpr */


@@ -24206,7 +24206,7 @@ static void print_op_move(struct compile_state *state,
                        (dst_regcm & (REGCM_GPR32 | REGCM_GPR16 | REGCM_GPR8_LO))) {
                        if (dst_regcm & REGCM_GPR32) {
                                src_reg = REG_EAX;
                        (dst_regcm & (REGCM_GPR32 | REGCM_GPR16 | REGCM_GPR8_LO))) {
                        if (dst_regcm & REGCM_GPR32) {
                                src_reg = REG_EAX;

-                       } 
+                       }

                        else if (dst_regcm & REGCM_GPR16) {
                                src_reg = REG_AX;
                        }
                        else if (dst_regcm & REGCM_GPR16) {
                                src_reg = REG_AX;
                        }


@@ -24411,19 +24411,19 @@ static void print_op_move(struct compile_state *state,
                }
 
                if (dst_regcm & (REGCM_GPR32 | REGCM_GPR16 | REGCM_GPR8_LO)) {
                }
 
                if (dst_regcm & (REGCM_GPR32 | REGCM_GPR16 | REGCM_GPR8_LO)) {

-                       fprintf(fp, "\tshl $%d, %s\n", 
-                               shift_bits, 
+                       fprintf(fp, "\tshl $%d, %s\n",
+                               shift_bits,

                                reg(state, dst, REGCM_GPR32 | REGCM_GPR16 | REGCM_GPR8_LO));
                                reg(state, dst, REGCM_GPR32 | REGCM_GPR16 | REGCM_GPR8_LO));

-                       fprintf(fp, "\tsar $%d, %s\n", 
-                               shift_bits, 
+                       fprintf(fp, "\tsar $%d, %s\n",
+                               shift_bits,

                                reg(state, dst, REGCM_GPR32 | REGCM_GPR16 | REGCM_GPR8_LO));
                }
                else if (dst_regcm & (REGCM_MMX | REGCM_XMM)) {
                        fprintf(fp, "\tpslld $%d, %s\n",
                                reg(state, dst, REGCM_GPR32 | REGCM_GPR16 | REGCM_GPR8_LO));
                }
                else if (dst_regcm & (REGCM_MMX | REGCM_XMM)) {
                        fprintf(fp, "\tpslld $%d, %s\n",

-                               shift_bits, 
+                               shift_bits,

                                reg(state, dst, REGCM_MMX | REGCM_XMM));
                        fprintf(fp, "\tpsrad $%d, %s\n",
                                reg(state, dst, REGCM_MMX | REGCM_XMM));
                        fprintf(fp, "\tpsrad $%d, %s\n",

-                               shift_bits, 
+                               shift_bits,

                                reg(state, dst, REGCM_MMX | REGCM_XMM));
                }
                else {
                                reg(state, dst, REGCM_MMX | REGCM_XMM));
                }
                else {


@@ -24454,7 +24454,7 @@ static void print_op_load(struct compile_state *state,
        case TYPE_INT:    case TYPE_UINT:
        case TYPE_LONG:   case TYPE_ULONG:
        case TYPE_POINTER:
        case TYPE_INT:    case TYPE_UINT:
        case TYPE_LONG:   case TYPE_ULONG:
        case TYPE_POINTER:

-               op = "movl"; 
+               op = "movl";

                break;
        default:
                internal_error(state, ins, "unknown type in load");
                break;
        default:
                internal_error(state, ins, "unknown type in load");


@@ -24462,7 +24462,7 @@ static void print_op_load(struct compile_state *state,
                break;
        }
        fprintf(fp, "\t%s (%s), %s\n",
                break;
        }
        fprintf(fp, "\t%s (%s), %s\n",

-               op, 
+               op,

                reg(state, src, REGCM_GPR32),
                reg(state, dst, REGCM_GPR32));
 }
                reg(state, src, REGCM_GPR32),
                reg(state, dst, REGCM_GPR32));
 }


@@ -24497,8 +24497,8 @@ static void print_op_store(struct compile_state *state,
                        reg(state, src, REGCM_GPR8_LO | REGCM_GPR16 | REGCM_GPR32),
                        reg(state, dst, REGCM_GPR32));
        }
                        reg(state, src, REGCM_GPR8_LO | REGCM_GPR16 | REGCM_GPR32),
                        reg(state, dst, REGCM_GPR32));
        }

-       
-       
+
+

 }
 
 static void print_op_smul(struct compile_state *state,
 }
 
 static void print_op_smul(struct compile_state *state,


@@ -24599,7 +24599,7 @@ static void print_op_branch(struct compile_state *state,
                        internal_error(state, branch, "Invalid branch op");
                        break;
                }
                        internal_error(state, branch, "Invalid branch op");
                        break;
                }

-               
+

        }
 #if 1
        if (branch->op == OP_CALL) {
        }
 #if 1
        if (branch->op == OP_CALL) {


@@ -24607,7 +24607,7 @@ static void print_op_branch(struct compile_state *state,
        }
 #endif
        fprintf(fp, "\t%s L%s%lu\n",
        }
 #endif
        fprintf(fp, "\t%s L%s%lu\n",

-               bop, 
+               bop,

                state->compiler->label_prefix,
                (unsigned long)(TARG(branch, 0)->u.cval));
 }
                state->compiler->label_prefix,
                (unsigned long)(TARG(branch, 0)->u.cval));
 }


@@ -24653,19 +24653,19 @@ static void print_op_set(struct compile_state *state,
                sop, reg(state, set, REGCM_GPR8_LO));
 }
 
                sop, reg(state, set, REGCM_GPR8_LO));
 }
 

-static void print_op_bit_scan(struct compile_state *state, 
-       struct triple *ins, FILE *fp) 
+static void print_op_bit_scan(struct compile_state *state,
+       struct triple *ins, FILE *fp)

 {
        const char *op;
        switch(ins->op) {
        case OP_BSF: op = "bsf"; break;
        case OP_BSR: op = "bsr"; break;
 {
        const char *op;
        switch(ins->op) {
        case OP_BSF: op = "bsf"; break;
        case OP_BSR: op = "bsr"; break;

-       default: 
+       default:

                internal_error(state, ins, "unknown bit scan");
                op = 0;
                break;
        }
                internal_error(state, ins, "unknown bit scan");
                op = 0;
                break;
        }

-       fprintf(fp, 
+       fprintf(fp,

                "\t%s %s, %s\n"
                "\tjnz 1f\n"
                "\tmovl $-1, %s\n"
                "\t%s %s, %s\n"
                "\tjnz 1f\n"
                "\tmovl $-1, %s\n"


@@ -24682,18 +24682,18 @@ static void print_sdecl(struct compile_state *state,
 {
        fprintf(fp, ".section \"" DATA_SECTION "\"\n");
        fprintf(fp, ".balign %ld\n", (long int)align_of_in_bytes(state, ins->type));
 {
        fprintf(fp, ".section \"" DATA_SECTION "\"\n");
        fprintf(fp, ".balign %ld\n", (long int)align_of_in_bytes(state, ins->type));

-       fprintf(fp, "L%s%lu:\n", 
+       fprintf(fp, "L%s%lu:\n",

                state->compiler->label_prefix, (unsigned long)(ins->u.cval));
        print_const(state, MISC(ins, 0), fp);
        fprintf(fp, ".section \"" TEXT_SECTION "\"\n");
                state->compiler->label_prefix, (unsigned long)(ins->u.cval));
        print_const(state, MISC(ins, 0), fp);
        fprintf(fp, ".section \"" TEXT_SECTION "\"\n");

-               
+

 }
 
 static void print_instruction(struct compile_state *state,
        struct triple *ins, FILE *fp)
 {
        /* Assumption: after I have exted the register allocator
 }
 
 static void print_instruction(struct compile_state *state,
        struct triple *ins, FILE *fp)
 {
        /* Assumption: after I have exted the register allocator

-        * everything is in a valid register. 
+        * everything is in a valid register.

         */
        switch(ins->op) {
        case OP_ASM:
         */
        switch(ins->op) {
        case OP_ASM:


@@ -24725,7 +24725,7 @@ static void print_instruction(struct compile_state *state,
        case OP_SDECL:
                print_sdecl(state, ins, fp);
                break;
        case OP_SDECL:
                print_sdecl(state, ins, fp);
                break;

-       case OP_COPY:   
+       case OP_COPY:

        case OP_CONVERT:
                print_op_move(state, ins, fp);
                break;
        case OP_CONVERT:
                print_op_move(state, ins, fp);
                break;


@@ -24760,10 +24760,10 @@ static void print_instruction(struct compile_state *state,
                print_op_set(state, ins, fp);
                break;
        case OP_INB:  case OP_INW:  case OP_INL:
                print_op_set(state, ins, fp);
                break;
        case OP_INB:  case OP_INW:  case OP_INL:

-               print_op_in(state, ins, fp); 
+               print_op_in(state, ins, fp);

                break;
        case OP_OUTB: case OP_OUTW: case OP_OUTL:
                break;
        case OP_OUTB: case OP_OUTW: case OP_OUTL:

-               print_op_out(state, ins, fp); 
+               print_op_out(state, ins, fp);

                break;
        case OP_BSF:
        case OP_BSR:
                break;
        case OP_BSF:
        case OP_BSR:


@@ -24792,7 +24792,7 @@ static void print_instruction(struct compile_state *state,
                if (!ins->use) {
                        return;
                }
                if (!ins->use) {
                        return;
                }

-               fprintf(fp, "L%s%lu:\n", 
+               fprintf(fp, "L%s%lu:\n",

                        state->compiler->label_prefix, (unsigned long)(ins->u.cval));
                break;
        case OP_ADECL:
                        state->compiler->label_prefix, (unsigned long)(ins->u.cval));
                break;
        case OP_ADECL:


@@ -24839,7 +24839,7 @@ static void print_instructions(struct compile_state *state)
        first = state->first;
        ins = first;
        do {
        first = state->first;
        ins = first;
        do {

-               if (print_location && 
+               if (print_location &&

                        last_occurance != ins->occurance) {
                        if (!ins->occurance->parent) {
                                fprintf(fp, "\t/* %s,%s:%d.%d */\n",
                        last_occurance != ins->occurance) {
                        if (!ins->occurance->parent) {
                                fprintf(fp, "\t/* %s,%s:%d.%d */\n",


@@ -24886,7 +24886,7 @@ static void generate_code(struct compile_state *state)
 {
        generate_local_labels(state);
        print_instructions(state);
 {
        generate_local_labels(state);
        print_instructions(state);

-       
+

 }
 
 static void print_preprocessed_tokens(struct compile_state *state)
 }
 
 static void print_preprocessed_tokens(struct compile_state *state)


@@ -24907,7 +24907,7 @@ static void print_preprocessed_tokens(struct compile_state *state)
                        break;
                }
                tk = eat(state, tok);
                        break;
                }
                tk = eat(state, tok);

-               token_str = 
+               token_str =

                        tk->ident ? tk->ident->name :
                        tk->str_len ? tk->val.str :
                        tokens[tk->tok];
                        tk->ident ? tk->ident->name :
                        tk->str_len ? tk->val.str :
                        tokens[tk->tok];


@@ -24916,8 +24916,8 @@ static void print_preprocessed_tokens(struct compile_state *state)
                while(file->macro && file->prev) {
                        file = file->prev;
                }
                while(file->macro && file->prev) {
                        file = file->prev;
                }

-               if (!file->macro && 
-                       ((file->line != line) || (file->basename != filename))) 
+               if (!file->macro &&
+                       ((file->line != line) || (file->basename != filename)))

                {
                        int i, col;
                        if ((file->basename == filename) &&
                {
                        int i, col;
                        if ((file->basename == filename) &&


@@ -24938,9 +24938,9 @@ static void print_preprocessed_tokens(struct compile_state *state)
                                fprintf(fp, " ");
                        }
                }
                                fprintf(fp, " ");
                        }
                }

-               
+

                fprintf(fp, "%s ", token_str);
                fprintf(fp, "%s ", token_str);

-               
+

                if (state->compiler->debug & DEBUG_TOKENS) {
                        loc(state->dbgout, state, 0);
                        fprintf(state->dbgout, "%s <- `%s'\n",
                if (state->compiler->debug & DEBUG_TOKENS) {
                        loc(state->dbgout, state, 0);
                        fprintf(state->dbgout, "%s <- `%s'\n",


@@ -25030,7 +25030,7 @@ static void compile(const char *filename,
        register_builtins(&state);
 
        compile_file(&state, filename, 1);
        register_builtins(&state);
 
        compile_file(&state, filename, 1);

-       
+

        while (includes) {
                compile_file(&state, includes->filename, 1);
                includes=includes->next;
        while (includes) {
                compile_file(&state, includes->filename, 1);
                includes=includes->next;


@@ -25047,8 +25047,8 @@ static void compile(const char *filename,
        /* Exit the global definition scope */
        end_scope(&state);
 
        /* Exit the global definition scope */
        end_scope(&state);
 

-       /* Now that basic compilation has happened 
-        * optimize the intermediate code 
+       /* Now that basic compilation has happened
+        * optimize the intermediate code

         */
        optimize(&state);
 
         */
        optimize(&state);
 


@@ -25104,8 +25104,8 @@ int main(int argc, char **argv)
        struct compiler_state compiler;
        struct arch_state arch;
        int all_opts;
        struct compiler_state compiler;
        struct arch_state arch;
        int all_opts;

-       
-       
+
+

        /* I don't want any surprises */
        setlocale(LC_ALL, "C");
 
        /* I don't want any surprises */
        setlocale(LC_ALL, "C");
 

diff --git a/util/romcc/tests.sh b/util/romcc/tests.sh
index 4dddbb1920705fe3001d9ba9b110184aee67d7d8..823d71d77287ad1b49cfd07aac681b3dc8e76cc6 100644 (file)
--- a/util/romcc/tests.sh
+++ b/util/romcc/tests.sh
@@ -21,7 +21,7 @@ stem="$root$N"
 base=tests/$stem
 op="-Itests/include"
 op="$op -feliminate-inefectual-code -fsimplify -fscc-transform "
 base=tests/$stem
 op="-Itests/include"
 op="$op -feliminate-inefectual-code -fsimplify -fscc-transform "

-#op="$op -O2 " 
+#op="$op -O2 "

 #op="$op -mmmx -msse"
 op="$op -finline-policy=defaulton"
 #op="$op -finline-policy=nopenalty"
 #op="$op -mmmx -msse"
 op="$op -finline-policy=defaulton"
 #op="$op -finline-policy=nopenalty"


@@ -47,12 +47,12 @@ op="$op -fdebug-scc-transform2"
 #op="-fdebug -fdebug-inline -O2 -mmmx  "
 #op="-fdebug -fdebug-live-range-conflicts -fdebug-live-range-conflicts2 -fno-debug-interference -fdebug-color-graph -fdebug-coalescing -fmax-allocation-passes=10 -O2 -mmmx -msse"
 #op="-fdebug -O2 -mmmx -msse"
 #op="-fdebug -fdebug-inline -O2 -mmmx  "
 #op="-fdebug -fdebug-live-range-conflicts -fdebug-live-range-conflicts2 -fno-debug-interference -fdebug-color-graph -fdebug-coalescing -fmax-allocation-passes=10 -O2 -mmmx -msse"
 #op="-fdebug -O2 -mmmx -msse"

-#op="-fdebug -fdebug-inline -fno-eliminate-inefectual-code -fno-always-inline -mmmx" 
-#op="-fdebug -fdebug-inline -fno-always-inline -mmmx" 
+#op="-fdebug -fdebug-inline -fno-eliminate-inefectual-code -fno-always-inline -mmmx"
+#op="-fdebug -fdebug-inline -fno-always-inline -mmmx"

 export ALLOC_CHECK_=2
 export ALLOC_CHECK_=2

-rm -f core $base.S $base.debug $base.debug2 $base.elf $base.out && 
-make romcc && 
-$ROMCC $op -o $base.S $base.c 2>&1 > $base.debug | tee $base.debug2 
+rm -f core $base.S $base.debug $base.debug2 $base.elf $base.out &&
+make romcc &&
+$ROMCC $op -o $base.S $base.c 2>&1 > $base.debug | tee $base.debug2

 if [ '(' -f $base.c ')' -a '(' '!' -f core ')' -a '(' -f $base.S ')' ]; then
        if [ "$stem" = "linux_test$N" ] ; then
                as $base.S -o $base.o &&
 if [ '(' -f $base.c ')' -a '(' '!' -f core ')' -a '(' -f $base.S ')' ]; then
        if [ "$stem" = "linux_test$N" ] ; then
                as $base.S -o $base.o &&

diff --git a/util/romcc/tests/fail_test10.c b/util/romcc/tests/fail_test10.c
index 1993e0e59cfc9f75230f324b35094efbddfc5036..7cfd9a9c3bbd203cb0cfa41752d478be02b69a38 100644 (file)
--- a/util/romcc/tests/fail_test10.c
+++ b/util/romcc/tests/fail_test10.c
@@ -14,6 +14,6 @@ static struct result main(int a, int b, struct big_arg d)
        result.b = 1;
        result.c = b + 1;
        result.d = a + 1;
        result.b = 1;
        result.c = b + 1;
        result.d = a + 1;

-               
+

 }
 
 }
 

diff --git a/util/romcc/tests/fail_test2.c b/util/romcc/tests/fail_test2.c
index 74d6eb1d94ee6d7b3a3159a8e633df1765225e87..6a02486a8dc249c30cf79134ab7556e7a738ba57 100644 (file)
--- a/util/romcc/tests/fail_test2.c
+++ b/util/romcc/tests/fail_test2.c
@@ -3,16 +3,16 @@ static void main(void)
 
         unsigned min;
        int value, latency;
 
         unsigned min;
        int value, latency;

-       
-       
+
+

        latency =  -2;
        latency =  -2;

-       
+

        if (latency > (((min) >> 8) & 0xff)) {
                value = 0xa;
        }
        if (latency > (((min) >> 8) & 0xff)) {
                value = 0xa;
        }

-       
+

        if (value < 0) return;
        if (value < 0) return;

-       
+

        ((min) = (((min) & ~0xff)));
 
 }
        ((min) = (((min) & ~0xff)));
 
 }

diff --git a/util/romcc/tests/hello_world.c b/util/romcc/tests/hello_world.c
index b5ce540dc958f8d307663921d54fc40a5c03216f..cba88a9a6d01c9c5115475a1b78ca82c83915046 100644 (file)
--- a/util/romcc/tests/hello_world.c
+++ b/util/romcc/tests/hello_world.c
@@ -66,7 +66,7 @@ void uart_wait_to_tx_byte(void)
 
 void uart_wait_until_sent(void)
 {
 
 void uart_wait_until_sent(void)
 {

-       while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40)) 
+       while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))

                ;
 }
 
                ;
 }
 


@@ -96,7 +96,7 @@ void uart_init(void)
 void __console_tx_char(unsigned char byte)
 {
        uart_tx_byte(byte);
 void __console_tx_char(unsigned char byte)
 {
        uart_tx_byte(byte);

-               
+

 }
 
 void __console_tx_string(char *str)
 }
 
 void __console_tx_string(char *str)

diff --git a/util/romcc/tests/hello_world1.c b/util/romcc/tests/hello_world1.c
index b5ce540dc958f8d307663921d54fc40a5c03216f..cba88a9a6d01c9c5115475a1b78ca82c83915046 100644 (file)
--- a/util/romcc/tests/hello_world1.c
+++ b/util/romcc/tests/hello_world1.c
@@ -66,7 +66,7 @@ void uart_wait_to_tx_byte(void)
 
 void uart_wait_until_sent(void)
 {
 
 void uart_wait_until_sent(void)
 {

-       while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40)) 
+       while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))

                ;
 }
 
                ;
 }
 


@@ -96,7 +96,7 @@ void uart_init(void)
 void __console_tx_char(unsigned char byte)
 {
        uart_tx_byte(byte);
 void __console_tx_char(unsigned char byte)
 {
        uart_tx_byte(byte);

-               
+

 }
 
 void __console_tx_string(char *str)
 }
 
 void __console_tx_string(char *str)

diff --git a/util/romcc/tests/hello_world2.c b/util/romcc/tests/hello_world2.c
index 18380d37e8948f70bfecf9764b695ac02013dd0c..c6e8092ed31d140011c8022bd3523b9d732eeccf 100644 (file)
--- a/util/romcc/tests/hello_world2.c
+++ b/util/romcc/tests/hello_world2.c
@@ -66,7 +66,7 @@ void uart_wait_to_tx_byte(void)
 
 void uart_wait_until_sent(void)
 {
 
 void uart_wait_until_sent(void)
 {

-       while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40)) 
+       while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))

                ;
 }
 
                ;
 }
 


@@ -96,7 +96,7 @@ void uart_init(void)
 void __console_tx_char(unsigned char byte)
 {
        uart_tx_byte(byte);
 void __console_tx_char(unsigned char byte)
 {
        uart_tx_byte(byte);

-               
+

 }
 
 void __console_tx_string(char *str)
 }
 
 void __console_tx_string(char *str)

diff --git a/util/romcc/tests/include/linux_console.h b/util/romcc/tests/include/linux_console.h
index 861c701e5d5f826628984d112648c5ab6fa7207f..5f9dec21f95e51fa5d5d1e8f8b0f09ca09e6c8a2 100644 (file)
--- a/util/romcc/tests/include/linux_console.h
+++ b/util/romcc/tests/include/linux_console.h
@@ -6,37 +6,37 @@
 static const char *addr_of_char(unsigned char ch)
 {
        static const char byte[] = {
 static const char *addr_of_char(unsigned char ch)
 {
        static const char byte[] = {

-               0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 
+               0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,

                0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
                0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,

-               0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 
+               0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,

                0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
                0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,

-               0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 
+               0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,

                0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
                0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,

-               0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 
+               0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,

                0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
                0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,

-               0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 
+               0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,

                0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
                0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,

-               0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 
+               0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,

                0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
                0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,

-               0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 
+               0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,

                0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,
                0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,

-               0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 
+               0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,

                0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,
                0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,

-               0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 
+               0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,

                0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
                0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,

-               0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 
+               0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,

                0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,
                0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,

-               0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 
+               0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,

                0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,
                0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,

-               0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7, 
+               0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,

                0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,
                0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,

-               0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7, 
+               0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,

                0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,
                0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,

-               0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7, 
+               0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,

                0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,
                0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,

-               0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, 
+               0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7,

                0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,
                0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,

-               0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7, 
+               0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,

                0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff,
        };
        return byte + ch;
                0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff,
        };
        return byte + ch;

diff --git a/util/romcc/tests/include/linuxi386_syscall.h b/util/romcc/tests/include/linuxi386_syscall.h
index d202661c67baa9f819cc7a19e138a15c930be60f..30b4a2c6e004495ae8cc3609f1c5edbc0fa8e156 100644 (file)
--- a/util/romcc/tests/include/linuxi386_syscall.h
+++ b/util/romcc/tests/include/linuxi386_syscall.h
@@ -34,7 +34,7 @@ static struct syscall_result syscall1(unsigned long nr, unsigned long arg1)
                : "=a" (res)
                : "a" (nr), "b" (arg1));
        return syscall_return(res);
                : "=a" (res)
                : "a" (nr), "b" (arg1));
        return syscall_return(res);

-       
+

 }
 
 static struct syscall_result syscall2(unsigned long nr, unsigned long arg1, unsigned long arg2)
 }
 
 static struct syscall_result syscall2(unsigned long nr, unsigned long arg1, unsigned long arg2)


@@ -45,7 +45,7 @@ static struct syscall_result syscall2(unsigned long nr, unsigned long arg1, unsi
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2));
        return syscall_return(res);
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2));
        return syscall_return(res);

-       
+

 }
 
 
 }
 
 


@@ -58,7 +58,7 @@ static struct syscall_result syscall3(unsigned long nr, unsigned long arg1, unsi
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3));
        return syscall_return(res);
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3));
        return syscall_return(res);

-       
+

 }
 
 static struct syscall_result syscall4(unsigned long nr, unsigned long arg1, unsigned long arg2,
 }
 
 static struct syscall_result syscall4(unsigned long nr, unsigned long arg1, unsigned long arg2,


@@ -70,7 +70,7 @@ static struct syscall_result syscall4(unsigned long nr, unsigned long arg1, unsi
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3), "S" (arg4));
        return syscall_return(res);
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3), "S" (arg4));
        return syscall_return(res);

-       
+

 }
 
 static struct syscall_result syscall5(unsigned long nr, unsigned long arg1, unsigned long arg2,
 }
 
 static struct syscall_result syscall5(unsigned long nr, unsigned long arg1, unsigned long arg2,


@@ -80,10 +80,10 @@ static struct syscall_result syscall5(unsigned long nr, unsigned long arg1, unsi
        asm volatile(
                "int $0x80"
                : "=a" (res)
        asm volatile(
                "int $0x80"
                : "=a" (res)

-               : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3), 
+               : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3),

                "S" (arg4), "D" (arg5));
        return syscall_return(res);
                "S" (arg4), "D" (arg5));
        return syscall_return(res);

-       
+

 }
 
 #define NR_exit                 1
 }
 
 #define NR_exit                 1

diff --git a/util/romcc/tests/linux_console.h b/util/romcc/tests/linux_console.h
index 0837dfc5771e8664a0ba5b0f4c6f0226f88c8f7c..1b6466eca11c9b2635d864602966301073a90b39 100644 (file)
--- a/util/romcc/tests/linux_console.h
+++ b/util/romcc/tests/linux_console.h
@@ -6,37 +6,37 @@
 static const char *addr_of_char(unsigned char ch)
 {
        static const char byte[] = {
 static const char *addr_of_char(unsigned char ch)
 {
        static const char byte[] = {

-               0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 
+               0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,

                0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
                0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,

-               0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 
+               0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,

                0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
                0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,

-               0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 
+               0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,

                0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
                0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,

-               0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 
+               0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,

                0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
                0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,

-               0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 
+               0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,

                0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
                0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,

-               0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 
+               0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,

                0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
                0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,

-               0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 
+               0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,

                0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,
                0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,

-               0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 
+               0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,

                0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,
                0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,

-               0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 
+               0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,

                0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
                0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,

-               0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 
+               0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,

                0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,
                0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,

-               0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 
+               0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,

                0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,
                0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,

-               0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7, 
+               0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,

                0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,
                0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,

-               0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7, 
+               0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,

                0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,
                0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,

-               0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7, 
+               0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,

                0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,
                0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,

-               0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, 
+               0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7,

                0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,
                0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,

-               0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7, 
+               0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,

                0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff,
        };
        return byte + ch;
                0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff,
        };
        return byte + ch;

diff --git a/util/romcc/tests/linux_test13.c b/util/romcc/tests/linux_test13.c
index 83ef239854b7734998fc5c058c5f3148717669b3..9bc80eac7dbe69fb2010a06b4c0914ec7d70e2c0 100644 (file)
--- a/util/romcc/tests/linux_test13.c
+++ b/util/romcc/tests/linux_test13.c
@@ -43,5 +43,5 @@ static void main(void)
        print_debug("A\n");
        dimm_mask = spd_detect_dimms(cpu);
        print_debug("B\n");
        print_debug("A\n");
        dimm_mask = spd_detect_dimms(cpu);
        print_debug("B\n");

-       _exit(0);       
+       _exit(0);

 }
 }

diff --git a/util/romcc/tests/linux_test2.c b/util/romcc/tests/linux_test2.c
index 8f40fa0d473b35d83123d22c5791ead4e9f93bc7..766f498a0a5a557ea20fe097d9198371cbf5cae2 100644 (file)
--- a/util/romcc/tests/linux_test2.c
+++ b/util/romcc/tests/linux_test2.c
@@ -70,14 +70,14 @@ static void setup_coherent_ht_domain(void)
        (((FN) & 0x07) << 8) | \
        ((WHERE) & 0xFF))
 
        (((FN) & 0x07) << 8) | \
        ((WHERE) & 0xFF))
 

-       /* Routing Table Node i 
-        * F0:0x40 i = 0, 
+       /* Routing Table Node i
+        * F0:0x40 i = 0,

         * F0:0x44 i = 1,
         * F0:0x44 i = 1,

-        * F0:0x48 i = 2, 
+        * F0:0x48 i = 2,

         * F0:0x4c i = 3,
         * F0:0x4c i = 3,

-        * F0:0x50 i = 4, 
+        * F0:0x50 i = 4,

         * F0:0x54 i = 5,
         * F0:0x54 i = 5,

-        * F0:0x58 i = 6, 
+        * F0:0x58 i = 6,

         * F0:0x5c i = 7
         * [ 0: 3] Request Route
         *     [0] Route to this node
         * F0:0x5c i = 7
         * [ 0: 3] Request Route
         *     [0] Route to this node


@@ -104,7 +104,7 @@ static void setup_coherent_ht_domain(void)
        PCI_ADDR(0, 0x18, 0, 0x58), 0xfff0f0f0, 0x00010101,
        PCI_ADDR(0, 0x18, 0, 0x5c), 0xfff0f0f0, 0x00010101,
 
        PCI_ADDR(0, 0x18, 0, 0x58), 0xfff0f0f0, 0x00010101,
        PCI_ADDR(0, 0x18, 0, 0x5c), 0xfff0f0f0, 0x00010101,
 

-       /* Hypetransport Transaction Control Register 
+       /* Hypetransport Transaction Control Register

         * F0:0x68
         * [ 0: 0] Disable read byte probe
         *         0 = Probes issues
         * F0:0x68
         * [ 0: 0] Disable read byte probe
         *         0 = Probes issues


@@ -146,7 +146,7 @@ static void setup_coherent_ht_domain(void)
         * [12:12] Change ISOC to Ordered
         *         0 = Bit 1 of coherent HT RdSz/WrSz command used for iosynchronous prioritization
         *         1 = Bit 1 of coherent HT RdSz/WrSz command used for ordering.
         * [12:12] Change ISOC to Ordered
         *         0 = Bit 1 of coherent HT RdSz/WrSz command used for iosynchronous prioritization
         *         1 = Bit 1 of coherent HT RdSz/WrSz command used for ordering.

-        * [14:13] Buffer Release Priority select 
+        * [14:13] Buffer Release Priority select

         *         00 = 64
         *         01 = 16
         *         10 = 8
         *         00 = 64
         *         01 = 16
         *         10 = 8


@@ -253,7 +253,7 @@ static void setup_coherent_ht_domain(void)
         * [13:13] HT Stop Tristate Enable
         *         0 = Driven during an LDTSTOP_L
         *         1 = Tristated during and LDTSTOP_L
         * [13:13] HT Stop Tristate Enable
         *         0 = Driven during an LDTSTOP_L
         *         1 = Tristated during and LDTSTOP_L

-        * [14:14] Extended CTL Time 
+        * [14:14] Extended CTL Time

         *         0 = CTL is asserted for 16 bit times during link initialization
         *         1 = CTL is asserted for 50us during link initialization
         * [18:16] Max Link Width In (Read-Only?)
         *         0 = CTL is asserted for 16 bit times during link initialization
         *         1 = CTL is asserted for 50us during link initialization
         * [18:16] Max Link Width In (Read-Only?)


@@ -519,7 +519,7 @@ static void setup_coherent_ht_domain(void)
         *         1 = base/limit registers i are read-only
         * [ 7: 4] Reserved
         * [31: 8] Memory-Mapped I/O Base Address i (39-16)
         *         1 = base/limit registers i are read-only
         * [ 7: 4] Reserved
         * [31: 8] Memory-Mapped I/O Base Address i (39-16)

-        *         This field defines the upper address bits of a 40bit address 
+        *         This field defines the upper address bits of a 40bit address

         *         that defines the start of memory-mapped I/O region i
         */
        PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00e00003,
         *         that defines the start of memory-mapped I/O region i
         */
        PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00e00003,


@@ -580,7 +580,7 @@ static void setup_coherent_ht_domain(void)
         * [ 3: 2] Reserved
         * [ 4: 4] VGA Enable
         *         0 = VGA matches Disabled
         * [ 3: 2] Reserved
         * [ 4: 4] VGA Enable
         *         0 = VGA matches Disabled

-        *         1 = matches all address < 64K and where A[9:0] is in the 
+        *         1 = matches all address < 64K and where A[9:0] is in the

         *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
         * [ 5: 5] ISA Enable
         *         0 = ISA matches Disabled
         *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
         * [ 5: 5] ISA Enable
         *         0 = ISA matches Disabled


@@ -588,7 +588,7 @@ static void setup_coherent_ht_domain(void)
         *             from matching agains this base/limit pair
         * [11: 6] Reserved
         * [24:12] PCI I/O Base i
         *             from matching agains this base/limit pair
         * [11: 6] Reserved
         * [24:12] PCI I/O Base i

-        *         This field defines the start of PCI I/O region n 
+        *         This field defines the start of PCI I/O region n

         * [31:25] Reserved
         */
        PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x0000d003,
         * [31:25] Reserved
         */
        PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x0000d003,

diff --git a/util/romcc/tests/linux_test3.c b/util/romcc/tests/linux_test3.c
index 97187ae5e6c3ec667197a24ad5206ad26ad6656d..4c7a882f7553a7e3b7f6227ba5b0c4ea3b698540 100644 (file)
--- a/util/romcc/tests/linux_test3.c
+++ b/util/romcc/tests/linux_test3.c
@@ -4,15 +4,15 @@ static void goto_test(void)
 {
        int i;
        print_debug("goto_test\n");
 {
        int i;
        print_debug("goto_test\n");

-       
+

        i = 0;
        goto bottom;
        {
        top:
        i = 0;
        goto bottom;
        {
        top:

-               print_debug("i = "); 
-               print_debug_hex8(i); 
+               print_debug("i = ");
+               print_debug_hex8(i);

                print_debug("\n");
                print_debug("\n");

-               
+

                i = i + 1;
        }
  bottom:
                i = i + 1;
        }
  bottom:

diff --git a/util/romcc/tests/linux_test4.c b/util/romcc/tests/linux_test4.c
index 1f099183625b30aefc108fecf01d7c4d07acf902..71f4d6541e11b358a44e5acc798f294c7812401d 100644 (file)
--- a/util/romcc/tests/linux_test4.c
+++ b/util/romcc/tests/linux_test4.c
@@ -7,7 +7,7 @@ struct socket_desc {
        short across;
 };
 
        short across;
 };
 

-static void main(void) 
+static void main(void)

 {
        static const struct socket_desc cpu_socketsA[] = {
                {  .up = 2,  .down = -1, .across = 1 }, /* Node 0 */
 {
        static const struct socket_desc cpu_socketsA[] = {
                {  .up = 2,  .down = -1, .across = 1 }, /* Node 0 */

diff --git a/util/romcc/tests/linux_test5.c b/util/romcc/tests/linux_test5.c
index 13093fb0fcdfc4e6abe3098d686b4e194e10f2ae..473f57289deb6773cb9606b66adcc58f99e08f26 100644 (file)
--- a/util/romcc/tests/linux_test5.c
+++ b/util/romcc/tests/linux_test5.c
@@ -4,7 +4,7 @@
 inline int log2(int value)
 {
        /* __builtin_bsr is a exactly equivalent to the x86 machine
 inline int log2(int value)
 {
        /* __builtin_bsr is a exactly equivalent to the x86 machine

-        * instruction with the exception that it returns -1  
+        * instruction with the exception that it returns -1

         * when the value presented to it is zero.
         * Otherwise __builtin_bsr returns the zero based index of
         * the highest bit set.
         * when the value presented to it is zero.
         * Otherwise __builtin_bsr returns the zero based index of
         * the highest bit set.


@@ -91,8 +91,8 @@ static unsigned spd_to_dimm(unsigned device)
 
 static void disable_dimm(unsigned index)
 {
 
 static void disable_dimm(unsigned index)
 {

-       print_debug("disabling dimm"); 
-       print_debug_hex8(index); 
+       print_debug("disabling dimm");
+       print_debug_hex8(index);

        print_debug("\r\n");
 #if 0
        pci_write_config32(PCI_DEV(0, 0x18, 2), DRAM_CSBASE + (((index << 1)+0)<<2), 0);
        print_debug("\r\n");
 #if 0
        pci_write_config32(PCI_DEV(0, 0x18, 2), DRAM_CSBASE + (((index << 1)+0)<<2), 0);


@@ -175,8 +175,8 @@ static const struct mem_param *spd_set_memclk(void)
        min_latency = 2;
 
 #if 1
        min_latency = 2;
 
 #if 1

-       print_debug("min_cycle_time: "); 
-       print_debug_hex8(min_cycle_time); 
+       print_debug("min_cycle_time: ");
+       print_debug_hex8(min_cycle_time);

        print_debug(" min_latency: ");
        print_debug_hex8(min_latency);
        print_debug("\r\n");
        print_debug(" min_latency: ");
        print_debug_hex8(min_latency);
        print_debug("\r\n");


@@ -236,8 +236,8 @@ static const struct mem_param *spd_set_memclk(void)
 #if 1
                                print_debug("device: ");
                                print_debug_hex8(device);
 #if 1
                                print_debug("device: ");
                                print_debug_hex8(device);

-                               print_debug(" new_cycle_time: "); 
-                               print_debug_hex8(new_cycle_time); 
+                               print_debug(" new_cycle_time: ");
+                               print_debug_hex8(new_cycle_time);

                                print_debug(" new_latency: ");
                                print_debug_hex8(new_latency);
                                print_debug("\r\n");
                                print_debug(" new_latency: ");
                                print_debug_hex8(new_latency);
                                print_debug("\r\n");


@@ -249,8 +249,8 @@ static const struct mem_param *spd_set_memclk(void)
 #if 1
                print_debug("device: ");
                print_debug_hex8(device);
 #if 1
                print_debug("device: ");
                print_debug_hex8(device);

-               print_debug(" new_cycle_time: "); 
-               print_debug_hex8(new_cycle_time); 
+               print_debug(" new_cycle_time: ");
+               print_debug_hex8(new_cycle_time);

                print_debug(" new_latency: ");
                print_debug_hex8(new_latency);
                print_debug("\r\n");
                print_debug(" new_latency: ");
                print_debug_hex8(new_latency);
                print_debug("\r\n");


@@ -270,8 +270,8 @@ static const struct mem_param *spd_set_memclk(void)
 #if 1
                print_debug("device: ");
                print_debug_hex8(device);
 #if 1
                print_debug("device: ");
                print_debug_hex8(device);

-               print_debug(" min_cycle_time: "); 
-               print_debug_hex8(min_cycle_time); 
+               print_debug(" min_cycle_time: ");
+               print_debug_hex8(min_cycle_time);

                print_debug(" min_latency: ");
                print_debug_hex8(min_latency);
                print_debug("\r\n");
                print_debug(" min_latency: ");
                print_debug_hex8(min_latency);
                print_debug("\r\n");


@@ -309,11 +309,11 @@ static const struct mem_param *spd_set_memclk(void)
                if ((latency != min_latency) || (index >= 3)) {
                        goto dimm_err;
                }
                if ((latency != min_latency) || (index >= 3)) {
                        goto dimm_err;
                }

-               
+

                /* Read the min_cycle_time for this latency */
                value = smbus_read_byte(device, latency_indicies[index]);
                /* Read the min_cycle_time for this latency */
                value = smbus_read_byte(device, latency_indicies[index]);

-               
-               /* All is good if the selected clock speed 
+
+               /* All is good if the selected clock speed

                 * is what I need or slower.
                 */
                if (value <= min_cycle_time) {
                 * is what I need or slower.
                 */
                if (value <= min_cycle_time) {


@@ -324,8 +324,8 @@ static const struct mem_param *spd_set_memclk(void)
                disable_dimm(spd_to_dimm(device));
        }
 #if 1
                disable_dimm(spd_to_dimm(device));
        }
 #if 1

-       print_debug("min_cycle_time: "); 
-       print_debug_hex8(min_cycle_time); 
+       print_debug("min_cycle_time: ");
+       print_debug_hex8(min_cycle_time);

        print_debug(" min_latency: ");
        print_debug_hex8(min_latency);
        print_debug("\r\n");
        print_debug(" min_latency: ");
        print_debug_hex8(min_latency);
        print_debug("\r\n");


@@ -347,7 +347,7 @@ static const struct mem_param *spd_set_memclk(void)
        value |= latencies[min_latency - 2];
        pci_write_config32(PCI_DEV(0, 0x18, 2), DRAM_CONFIG_LOW, value);
 #endif
        value |= latencies[min_latency - 2];
        pci_write_config32(PCI_DEV(0, 0x18, 2), DRAM_CONFIG_LOW, value);
 #endif

-       
+

        return param;
 }
 
        return param;
 }
 

diff --git a/util/romcc/tests/linuxi386_syscall.h b/util/romcc/tests/linuxi386_syscall.h
index 7eb513db36f1811725e1952a51ac03ec644ee84e..96a5936c3c4ef1fc9be48a1a41319c2666f3b1c5 100644 (file)
--- a/util/romcc/tests/linuxi386_syscall.h
+++ b/util/romcc/tests/linuxi386_syscall.h
@@ -34,7 +34,7 @@ static struct syscall_result syscall1(unsigned long nr, unsigned long arg1)
                : "=a" (res)
                : "a" (nr), "b" (arg1));
        return syscall_return(res);
                : "=a" (res)
                : "a" (nr), "b" (arg1));
        return syscall_return(res);

-       
+

 }
 
 static struct syscall_result syscall2(unsigned long nr, unsigned long arg1, unsigned long arg2)
 }
 
 static struct syscall_result syscall2(unsigned long nr, unsigned long arg1, unsigned long arg2)


@@ -45,7 +45,7 @@ static struct syscall_result syscall2(unsigned long nr, unsigned long arg1, unsi
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2));
        return syscall_return(res);
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2));
        return syscall_return(res);

-       
+

 }
 
 
 }
 
 


@@ -58,7 +58,7 @@ static struct syscall_result syscall3(unsigned long nr, unsigned long arg1, unsi
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3));
        return syscall_return(res);
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3));
        return syscall_return(res);

-       
+

 }
 
 static struct syscall_result syscall4(unsigned long nr, unsigned long arg1, unsigned long arg2,
 }
 
 static struct syscall_result syscall4(unsigned long nr, unsigned long arg1, unsigned long arg2,


@@ -70,7 +70,7 @@ static struct syscall_result syscall4(unsigned long nr, unsigned long arg1, unsi
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3), "S" (arg4));
        return syscall_return(res);
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3), "S" (arg4));
        return syscall_return(res);

-       
+

 }
 
 static struct syscall_result syscall5(unsigned long nr, unsigned long arg1, unsigned long arg2,
 }
 
 static struct syscall_result syscall5(unsigned long nr, unsigned long arg1, unsigned long arg2,


@@ -80,10 +80,10 @@ static struct syscall_result syscall5(unsigned long nr, unsigned long arg1, unsi
        asm volatile(
                "int $0x80"
                : "=a" (res)
        asm volatile(
                "int $0x80"
                : "=a" (res)

-               : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3), 
+               : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3),

                "S" (arg4), "D" (arg5));
        return syscall_return(res);
                "S" (arg4), "D" (arg5));
        return syscall_return(res);

-       
+

 }
 
 #define NR_exit                 1
 }
 
 #define NR_exit                 1

diff --git a/util/romcc/tests/raminit_test.c b/util/romcc/tests/raminit_test.c
index 2c6fa8c750d845c66a8c29a4d23075db0e1efebb..569d75ba62e881e83f03edd8bf75bd1ca28332c0 100644 (file)
--- a/util/romcc/tests/raminit_test.c
+++ b/util/romcc/tests/raminit_test.c
@@ -136,7 +136,7 @@ void uart_wait_to_tx_byte(void)
 
 void uart_wait_until_sent(void)
 {
 
 void uart_wait_until_sent(void)
 {

-       while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40)) 
+       while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))

                ;
 }
 
                ;
 }
 


@@ -355,7 +355,7 @@ int smbus_read_byte(unsigned device, unsigned address)
        /* CAS latency 2 */
 #if (CAS_LATENCY == 2)
 #define CAS_NB 0x17
        /* CAS latency 2 */
 #if (CAS_LATENCY == 2)
 #define CAS_NB 0x17

-       /* 
+       /*

         * 7 == 0111
         * 1 == 0001
         */
         * 7 == 0111
         * 1 == 0001
         */


@@ -367,7 +367,7 @@ int smbus_read_byte(unsigned device, unsigned address)
 #endif
 
        /* CAS latency 3 */
 #endif
 
        /* CAS latency 3 */

-#if (CAS_LATENCY == 3) 
+#if (CAS_LATENCY == 3)

 #define CAS_NB 0x13
        /*
         * 3 == 0011
 #define CAS_NB 0x13
        /*
         * 3 == 0011


@@ -381,11 +381,11 @@ int smbus_read_byte(unsigned device, unsigned address)
 #endif
 
 #ifndef CAS_NB
 #endif
 
 #ifndef CAS_NB

-#error "Nothing defined" 
+#error "Nothing defined"

 #endif
 
 /* Default values for config registers */
 #endif
 
 /* Default values for config registers */

-       
+

 static void set_nbxcfg(void)
 {
        /* NBXCFG 0x50 - 0x53 */
 static void set_nbxcfg(void)
 {
        /* NBXCFG 0x50 - 0x53 */


@@ -417,7 +417,7 @@ static void set_nbxcfg(void)
         * ECC Diagnostic Mode Enable == 0 Not Enabled
         * MDA present == 0 Not Present
         * USWC Write Post During During I/O Bridge Access Enable == 1 Enabled
         * ECC Diagnostic Mode Enable == 0 Not Enabled
         * MDA present == 0 Not Present
         * USWC Write Post During During I/O Bridge Access Enable == 1 Enabled

-        * In Order Queue Depth (IQD) (RO) == ?? 
+        * In Order Queue Depth (IQD) (RO) == ??

         */
        pcibios_write_config_dword(I440GX_BUS, I440GX_DEVFN, 0x50, 0xff00000c);
 }
         */
        pcibios_write_config_dword(I440GX_BUS, I440GX_DEVFN, 0x50, 0xff00000c);
 }


@@ -486,7 +486,7 @@ static void set_mbsc(void)
         * MD[63:0]# Buffer Strength Control 1 == 3x
         * MECC[7:0] Buffer Strength Control 2 == 3x
         * MECC[7:0] Buffer Strength Control 1 == 3x
         * MD[63:0]# Buffer Strength Control 1 == 3x
         * MECC[7:0] Buffer Strength Control 2 == 3x
         * MECC[7:0] Buffer Strength Control 1 == 3x

-        * CSB7# Buffer Strength == 3x  
+        * CSB7# Buffer Strength == 3x

         * CSA7# Buffer Strength == 3x
         * CSB6# Buffer Strength == 3x
         * CSA6# Buffer Strength == 3x
         * CSA7# Buffer Strength == 3x
         * CSB6# Buffer Strength == 3x
         * CSA6# Buffer Strength == 3x


@@ -575,13 +575,13 @@ static void set_pgpol(void)
 static void set_mbfs(void)
 {
        /* MBFS - Memory Buffer Frequencey Select Register */
 static void set_mbfs(void)
 {
        /* MBFS - Memory Buffer Frequencey Select Register */

-       /* 0xffff7f                                          
-        * [23:20] f == 1111                                 
-        * [19:16] f == 1111                                 
-        * [15:12] f == 1111                                 
-        * [11: 8] f == 1111                                 
-        * [ 7: 4] 7 == 0111                                 
-        * [ 3: 0] f == 1111                                 
+       /* 0xffff7f
+        * [23:20] f == 1111
+        * [19:16] f == 1111
+        * [15:12] f == 1111
+        * [11: 8] f == 1111
+        * [ 7: 4] 7 == 0111
+        * [ 3: 0] f == 1111

         * MAA[14:0], WEA#, SRASA#, SCASA# == 100Mhz Buffers Enabled
         * MAB[14,13,10,12:11,9:0], WEB#, SRASB#, SCASB# == 100Mhz Buffers Enabled
         * MD[63:0] Control 2 == 100 Mhz Buffer Enable
         * MAA[14:0], WEA#, SRASA#, SCASA# == 100Mhz Buffers Enabled
         * MAB[14,13,10,12:11,9:0], WEB#, SRASB#, SCASB# == 100Mhz Buffers Enabled
         * MD[63:0] Control 2 == 100 Mhz Buffer Enable


@@ -622,12 +622,12 @@ static void set_drtc(void)
 
 static void set_pmcr(void)
 {
 
 static void set_pmcr(void)
 {

-       /* PMCR -- BIOS sets 0x90 into it. 
+       /* PMCR -- BIOS sets 0x90 into it.

         * 0x10 is REQUIRED.
         * we have never used it. So why did this ever work?
         */
        pcibios_write_config_byte(I440GX_BUS, I440GX_DEVFN, 0x7a, 0x90);
         * 0x10 is REQUIRED.
         * we have never used it. So why did this ever work?
         */
        pcibios_write_config_byte(I440GX_BUS, I440GX_DEVFN, 0x7a, 0x90);

-       
+

 }
 void sdram_set_registers(void)
 {
 }
 void sdram_set_registers(void)
 {


@@ -651,7 +651,7 @@ void sdram_set_registers(void)
 int log2(int value)
 {
        /* __builtin_bsr is a exactly equivalent to the x86 machine
 int log2(int value)
 {
        /* __builtin_bsr is a exactly equivalent to the x86 machine

-        * instruction with the exception that it returns -1  
+        * instruction with the exception that it returns -1

         * when the value presented to it is zero.
         * Otherwise __builtin_bsr returns the zero based index of
         * the highest bit set.
         * when the value presented to it is zero.
         * Otherwise __builtin_bsr returns the zero based index of
         * the highest bit set.


@@ -670,7 +670,7 @@ static void spd_set_drb(void)
        unsigned end_of_memory;
        unsigned device;
        unsigned drb_reg;
        unsigned end_of_memory;
        unsigned device;
        unsigned drb_reg;

-       
+

        end_of_memory = 0; /* in multiples of 8MiB */
        device = SMBUS_MEM_DEVICE_START;
        drb_reg = 0x60;
        end_of_memory = 0; /* in multiples of 8MiB */
        device = SMBUS_MEM_DEVICE_START;
        drb_reg = 0x60;


@@ -704,13 +704,13 @@ static void spd_set_drb(void)
 #else
                        side1_bits += log2((byte2 << 8) | byte);
 #endif
 #else
                        side1_bits += log2((byte2 << 8) | byte);
 #endif

-                       
+

                        /* now I have the ram size in bits as a power of two (less 1) */
                        /* Make it mulitples of 8MB */
                        side1_bits -= 25;
                        /* now I have the ram size in bits as a power of two (less 1) */
                        /* Make it mulitples of 8MB */
                        side1_bits -= 25;

-                       
+

                        /* side two */
                        /* side two */

-                       
+

                        /* number of physical banks */
                        byte = smbus_read_byte(device, 5);
                        if (byte > 1) {
                        /* number of physical banks */
                        byte = smbus_read_byte(device, 5);
                        if (byte > 1) {


@@ -783,8 +783,8 @@ static void spd_set_dramc(void)
        }
        dramc = 0x8;
        if ((byte & 0x12) != 0) {
        }
        dramc = 0x8;
        if ((byte & 0x12) != 0) {

-               /* this is a registered part. 
-                * observation: for register parts, BIOS zeros (!) 
+               /* this is a registered part.
+                * observation: for register parts, BIOS zeros (!)

                 * registers CA-CC. This has an undocumented meaning.
                 */
                /* But it does make sense the oppisite of registered
                 * registers CA-CC. This has an undocumented meaning.
                 */
                /* But it does make sense the oppisite of registered


@@ -835,7 +835,7 @@ static void spd_enable_refresh(void)
        }
        byte &= 0x7f;
        /* Default refresh rate be conservative */
        }
        byte &= 0x7f;
        /* Default refresh rate be conservative */

-       refresh_rate = 5; 
+       refresh_rate = 5;

        /* see if the ram refresh is a supported one */
        if (byte < 6) {
 #if HAVE_STATIC_ARRAY_SUPPORT
        /* see if the ram refresh is a supported one */
        if (byte < 6) {
 #if HAVE_STATIC_ARRAY_SUPPORT


@@ -856,7 +856,7 @@ static void spd_set_sdramc(void)
 static void spd_set_rps(void)
 {
        /*
 static void spd_set_rps(void)
 {
        /*

-        * Effects:     Uses serial presence detect to set the row size 
+        * Effects:     Uses serial presence detect to set the row size

         *              on a given DIMM
         * FIXME:       Check for illegal/unsupported ram configurations and abort
         */
         *              on a given DIMM
         * FIXME:       Check for illegal/unsupported ram configurations and abort
         */


@@ -881,16 +881,16 @@ static void spd_set_rps(void)
                page_size = byte & 0xf;
                /* make it in multiples of 2Kb */
                page_size -= 11;
                page_size = byte & 0xf;
                /* make it in multiples of 2Kb */
                page_size -= 11;

-               
+

                if (page_size <= 0) continue;
                if (page_size <= 0) continue;

-               
+

                /* FIXME: do something with page sizes greather than 8KB!! */
                page_sizes |= (page_size << index);
                /* FIXME: do something with page sizes greather than 8KB!! */
                page_sizes |= (page_size << index);

-                               
+

                /* side two */
                byte = smbus_read_byte(device, 5);
                if (byte <= 1)  continue;
                /* side two */
                byte = smbus_read_byte(device, 5);
                if (byte <= 1)  continue;

-                       
+

                /* For now only handle the symmetrical case */
                page_sizes |= (page_size << (index +2));
        }
                /* For now only handle the symmetrical case */
                page_sizes |= (page_size << (index +2));
        }


@@ -898,10 +898,10 @@ static void spd_set_rps(void)
        /* we have just verified that we have to have this code. It appears that
         * the registered SDRAMs do indeed set the RPS wrong. sheesh.
         */
        /* we have just verified that we have to have this code. It appears that
         * the registered SDRAMs do indeed set the RPS wrong. sheesh.
         */

-       /* at this point, page_sizes holds the RPS for all ram. 
-        * we have verified that for registered DRAM the values are 
+       /* at this point, page_sizes holds the RPS for all ram.
+        * we have verified that for registered DRAM the values are

         * 1/2 the size they should be. So we test for registered
         * 1/2 the size they should be. So we test for registered

-        * and then double the sizes if needed. 
+        * and then double the sizes if needed.

         */
 
        dramc = pcibios_read_config_byte(I440GX_BUS, I440GX_DEVFN, 0x57);
         */
 
        dramc = pcibios_read_config_byte(I440GX_BUS, I440GX_DEVFN, 0x57);


@@ -909,9 +909,9 @@ static void spd_set_rps(void)
                /* registered */
 
                /* BIOS makes weird page size for registered! */
                /* registered */
 
                /* BIOS makes weird page size for registered! */

-               /* what we have found is you need to set the EVEN banks to 
-                * twice the size. Fortunately there is a very easy way to 
-                * do this. First, read the WORD value of register 0x74. 
+               /* what we have found is you need to set the EVEN banks to
+                * twice the size. Fortunately there is a very easy way to
+                * do this. First, read the WORD value of register 0x74.

                 */
                page_sizes += 0x1111;
        }
                 */
                page_sizes += 0x1111;
        }


@@ -938,8 +938,8 @@ static void spd_set_pgpol(void)
        bank_sizes = 0;
        bank = 0;
        device = SMBUS_MEM_DEVICE_START;
        bank_sizes = 0;
        bank = 0;
        device = SMBUS_MEM_DEVICE_START;

-       for(; device <= SMBUS_MEM_DEVICE_END; 
-           bank += 2, device += SMBUS_MEM_DEVICE_INC) { 
+       for(; device <= SMBUS_MEM_DEVICE_END;
+           bank += 2, device += SMBUS_MEM_DEVICE_INC) {

                int byte;
 
                /* logical banks */
                int byte;
 
                /* logical banks */


@@ -947,7 +947,7 @@ static void spd_set_pgpol(void)
                if (byte < 0) continue;
                if (byte < 4) continue;
                bank_sizes |= (1 << bank);
                if (byte < 0) continue;
                if (byte < 4) continue;
                bank_sizes |= (1 << bank);

-               
+

                /* side 2 */
                /* Number of physical banks */
                byte  = smbus_read_byte(device, 5);
                /* side 2 */
                /* Number of physical banks */
                byte  = smbus_read_byte(device, 5);


@@ -974,14 +974,14 @@ static void spd_set_nbxcfg(void)
        /* Say all dimms have no ECC support */
        reg = 0xff;
        index = 0;
        /* Say all dimms have no ECC support */
        reg = 0xff;
        index = 0;

-       
+

        device = SMBUS_MEM_DEVICE_START;
        for(; device <= SMBUS_MEM_DEVICE_END; index += 2, device += SMBUS_MEM_DEVICE_INC) {
                int byte;
 
                byte = smbus_read_byte(device, 11);
                if (byte < 0) continue;
        device = SMBUS_MEM_DEVICE_START;
        for(; device <= SMBUS_MEM_DEVICE_END; index += 2, device += SMBUS_MEM_DEVICE_INC) {
                int byte;
 
                byte = smbus_read_byte(device, 11);
                if (byte < 0) continue;

-#if !USE_ECC 
+#if !USE_ECC

                byte = 0; /* Disable ECC */
 #endif
                /* 0 == None, 1 == Parity, 2 == ECC */
                byte = 0; /* Disable ECC */
 #endif
                /* 0 == None, 1 == Parity, 2 == ECC */


@@ -1015,7 +1015,7 @@ static void spd_set_nbxcfg(void)
                /* try this.
                 * We should be setting bit 2 in register 76 and we're not
                 * technically we should see if CL=2 for the ram,
                /* try this.
                 * We should be setting bit 2 in register 76 and we're not
                 * technically we should see if CL=2 for the ram,

-                * but registered is so screwed up that it's kind of a lost 
+                * but registered is so screwed up that it's kind of a lost

                 * cause.
                 */
                byte = pcibios_read_config_byte(I440GX_BUS, I440GX_DEVFN, 0x76);
                 * cause.
                 */
                byte = pcibios_read_config_byte(I440GX_BUS, I440GX_DEVFN, 0x76);


@@ -1098,7 +1098,7 @@ static void dimms_read(unsigned long offset)
        int i;
        for(i = 0; i < 8; i++) {
                unsigned long dummy;
        int i;
        for(i = 0; i < 8; i++) {
                unsigned long dummy;

-               unsigned long addr; 
+               unsigned long addr;

                unsigned long next_base;
 
                next_base = dimm_base(i +1);
                unsigned long next_base;
 
                next_base = dimm_base(i +1);


@@ -1108,8 +1108,8 @@ static void dimms_read(unsigned long offset)
                }
                addr += offset;
 #if HAVE_STRING_SUPPORT
                }
                addr += offset;
 #if HAVE_STRING_SUPPORT

-               print_debug("Reading "); 
-               print_debug_hex32(addr); 
+               print_debug("Reading ");
+               print_debug_hex32(addr);

                print_debug("\n");
 #endif
 #if HAVE_POINTER_SUPPORT
                print_debug("\n");
 #endif
 #if HAVE_POINTER_SUPPORT


@@ -1120,8 +1120,8 @@ static void dimms_read(unsigned long offset)
 #endif
 #endif
 #if HAVE_STRING_SUPPORT
 #endif
 #endif
 #if HAVE_STRING_SUPPORT

-               print_debug("Reading "); 
-               print_debug_hex32(addr ^ 0xddf8); 
+               print_debug("Reading ");
+               print_debug_hex32(addr ^ 0xddf8);

                print_debug("\n");
 #endif
 #if HAVE_POINTER_SUPPORT
                print_debug("\n");
 #endif
 #if HAVE_POINTER_SUPPORT


@@ -1132,9 +1132,9 @@ static void dimms_read(unsigned long offset)
 #endif
 #endif
 #if HAVE_STRING_SUPPORT
 #endif
 #endif
 #if HAVE_STRING_SUPPORT

-               print_debug("Read "); 
-               print_debug_hex32(addr); 
-               print_debug_hex32(addr ^ 0xddf8); 
+               print_debug("Read ");
+               print_debug_hex32(addr);
+               print_debug_hex32(addr ^ 0xddf8);

                print_debug("\n");
 #endif
        }
                print_debug("\n");
 #endif
        }


@@ -1212,9 +1212,9 @@ void sdram_enable(void)
 #if HAVE_STRING_SUPPORT
        print_debug("Ram Enable 2\n");
 #endif
 #if HAVE_STRING_SUPPORT
        print_debug("Ram Enable 2\n");
 #endif

-       
+

        /* Now we need 8 AUTO REFRESH / CBR cycles to be performed */
        /* Now we need 8 AUTO REFRESH / CBR cycles to be performed */

-       
+

        sdram_set_command_cbr();
        sdram_assert_command();
        sdram_assert_command();
        sdram_set_command_cbr();
        sdram_assert_command();
        sdram_assert_command();


@@ -1224,11 +1224,11 @@ void sdram_enable(void)
        sdram_assert_command();
        sdram_assert_command();
        sdram_assert_command();
        sdram_assert_command();
        sdram_assert_command();
        sdram_assert_command();

-       
+

 #if HAVE_STRING_SUPPORT
        print_debug("Ram Enable 3\n");
 #endif
 #if HAVE_STRING_SUPPORT
        print_debug("Ram Enable 3\n");
 #endif

-       
+

        /* mode register set */
        sdram_set_mode_register();
        /* MAx[14:0] lines,
        /* mode register set */
        sdram_set_mode_register();
        /* MAx[14:0] lines,


@@ -1245,7 +1245,7 @@ void sdram_enable(void)
 
        /* normal operation */
        sdram_set_command_none();
 
        /* normal operation */
        sdram_set_command_none();

-       
+

 #if HAVE_STRING_SUPPORT
        print_debug("Ram Enable 5\n");
 #endif
 #if HAVE_STRING_SUPPORT
        print_debug("Ram Enable 5\n");
 #endif


@@ -1270,7 +1270,7 @@ void sdram_initialize(void)
        print_debug("Ram3\n");
 #endif
        /* Now that everything is setup enable the SDRAM.
        print_debug("Ram3\n");
 #endif
        /* Now that everything is setup enable the SDRAM.

-        * Some chipsets do the work for use while on others 
+        * Some chipsets do the work for use while on others

         * we need to it by hand.
         */
        sdram_enable();
         * we need to it by hand.
         */
        sdram_enable();

diff --git a/util/romcc/tests/raminit_test1.c b/util/romcc/tests/raminit_test1.c
index 2c6fa8c750d845c66a8c29a4d23075db0e1efebb..569d75ba62e881e83f03edd8bf75bd1ca28332c0 100644 (file)
--- a/util/romcc/tests/raminit_test1.c
+++ b/util/romcc/tests/raminit_test1.c
@@ -136,7 +136,7 @@ void uart_wait_to_tx_byte(void)
 
 void uart_wait_until_sent(void)
 {
 
 void uart_wait_until_sent(void)
 {

-       while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40)) 
+       while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))

                ;
 }
 
                ;
 }
 


@@ -355,7 +355,7 @@ int smbus_read_byte(unsigned device, unsigned address)
        /* CAS latency 2 */
 #if (CAS_LATENCY == 2)
 #define CAS_NB 0x17
        /* CAS latency 2 */
 #if (CAS_LATENCY == 2)
 #define CAS_NB 0x17

-       /* 
+       /*

         * 7 == 0111
         * 1 == 0001
         */
         * 7 == 0111
         * 1 == 0001
         */


@@ -367,7 +367,7 @@ int smbus_read_byte(unsigned device, unsigned address)
 #endif
 
        /* CAS latency 3 */
 #endif
 
        /* CAS latency 3 */

-#if (CAS_LATENCY == 3) 
+#if (CAS_LATENCY == 3)

 #define CAS_NB 0x13
        /*
         * 3 == 0011
 #define CAS_NB 0x13
        /*
         * 3 == 0011


@@ -381,11 +381,11 @@ int smbus_read_byte(unsigned device, unsigned address)
 #endif
 
 #ifndef CAS_NB
 #endif
 
 #ifndef CAS_NB

-#error "Nothing defined" 
+#error "Nothing defined"

 #endif
 
 /* Default values for config registers */
 #endif
 
 /* Default values for config registers */

-       
+

 static void set_nbxcfg(void)
 {
        /* NBXCFG 0x50 - 0x53 */
 static void set_nbxcfg(void)
 {
        /* NBXCFG 0x50 - 0x53 */


@@ -417,7 +417,7 @@ static void set_nbxcfg(void)
         * ECC Diagnostic Mode Enable == 0 Not Enabled
         * MDA present == 0 Not Present
         * USWC Write Post During During I/O Bridge Access Enable == 1 Enabled
         * ECC Diagnostic Mode Enable == 0 Not Enabled
         * MDA present == 0 Not Present
         * USWC Write Post During During I/O Bridge Access Enable == 1 Enabled

-        * In Order Queue Depth (IQD) (RO) == ?? 
+        * In Order Queue Depth (IQD) (RO) == ??

         */
        pcibios_write_config_dword(I440GX_BUS, I440GX_DEVFN, 0x50, 0xff00000c);
 }
         */
        pcibios_write_config_dword(I440GX_BUS, I440GX_DEVFN, 0x50, 0xff00000c);
 }


@@ -486,7 +486,7 @@ static void set_mbsc(void)
         * MD[63:0]# Buffer Strength Control 1 == 3x
         * MECC[7:0] Buffer Strength Control 2 == 3x
         * MECC[7:0] Buffer Strength Control 1 == 3x
         * MD[63:0]# Buffer Strength Control 1 == 3x
         * MECC[7:0] Buffer Strength Control 2 == 3x
         * MECC[7:0] Buffer Strength Control 1 == 3x

-        * CSB7# Buffer Strength == 3x  
+        * CSB7# Buffer Strength == 3x

         * CSA7# Buffer Strength == 3x
         * CSB6# Buffer Strength == 3x
         * CSA6# Buffer Strength == 3x
         * CSA7# Buffer Strength == 3x
         * CSB6# Buffer Strength == 3x
         * CSA6# Buffer Strength == 3x


@@ -575,13 +575,13 @@ static void set_pgpol(void)
 static void set_mbfs(void)
 {
        /* MBFS - Memory Buffer Frequencey Select Register */
 static void set_mbfs(void)
 {
        /* MBFS - Memory Buffer Frequencey Select Register */

-       /* 0xffff7f                                          
-        * [23:20] f == 1111                                 
-        * [19:16] f == 1111                                 
-        * [15:12] f == 1111                                 
-        * [11: 8] f == 1111                                 
-        * [ 7: 4] 7 == 0111                                 
-        * [ 3: 0] f == 1111                                 
+       /* 0xffff7f
+        * [23:20] f == 1111
+        * [19:16] f == 1111
+        * [15:12] f == 1111
+        * [11: 8] f == 1111
+        * [ 7: 4] 7 == 0111
+        * [ 3: 0] f == 1111

         * MAA[14:0], WEA#, SRASA#, SCASA# == 100Mhz Buffers Enabled
         * MAB[14,13,10,12:11,9:0], WEB#, SRASB#, SCASB# == 100Mhz Buffers Enabled
         * MD[63:0] Control 2 == 100 Mhz Buffer Enable
         * MAA[14:0], WEA#, SRASA#, SCASA# == 100Mhz Buffers Enabled
         * MAB[14,13,10,12:11,9:0], WEB#, SRASB#, SCASB# == 100Mhz Buffers Enabled
         * MD[63:0] Control 2 == 100 Mhz Buffer Enable


@@ -622,12 +622,12 @@ static void set_drtc(void)
 
 static void set_pmcr(void)
 {
 
 static void set_pmcr(void)
 {

-       /* PMCR -- BIOS sets 0x90 into it. 
+       /* PMCR -- BIOS sets 0x90 into it.

         * 0x10 is REQUIRED.
         * we have never used it. So why did this ever work?
         */
        pcibios_write_config_byte(I440GX_BUS, I440GX_DEVFN, 0x7a, 0x90);
         * 0x10 is REQUIRED.
         * we have never used it. So why did this ever work?
         */
        pcibios_write_config_byte(I440GX_BUS, I440GX_DEVFN, 0x7a, 0x90);

-       
+

 }
 void sdram_set_registers(void)
 {
 }
 void sdram_set_registers(void)
 {


@@ -651,7 +651,7 @@ void sdram_set_registers(void)
 int log2(int value)
 {
        /* __builtin_bsr is a exactly equivalent to the x86 machine
 int log2(int value)
 {
        /* __builtin_bsr is a exactly equivalent to the x86 machine

-        * instruction with the exception that it returns -1  
+        * instruction with the exception that it returns -1

         * when the value presented to it is zero.
         * Otherwise __builtin_bsr returns the zero based index of
         * the highest bit set.
         * when the value presented to it is zero.
         * Otherwise __builtin_bsr returns the zero based index of
         * the highest bit set.


@@ -670,7 +670,7 @@ static void spd_set_drb(void)
        unsigned end_of_memory;
        unsigned device;
        unsigned drb_reg;
        unsigned end_of_memory;
        unsigned device;
        unsigned drb_reg;

-       
+

        end_of_memory = 0; /* in multiples of 8MiB */
        device = SMBUS_MEM_DEVICE_START;
        drb_reg = 0x60;
        end_of_memory = 0; /* in multiples of 8MiB */
        device = SMBUS_MEM_DEVICE_START;
        drb_reg = 0x60;


@@ -704,13 +704,13 @@ static void spd_set_drb(void)
 #else
                        side1_bits += log2((byte2 << 8) | byte);
 #endif
 #else
                        side1_bits += log2((byte2 << 8) | byte);
 #endif

-                       
+

                        /* now I have the ram size in bits as a power of two (less 1) */
                        /* Make it mulitples of 8MB */
                        side1_bits -= 25;
                        /* now I have the ram size in bits as a power of two (less 1) */
                        /* Make it mulitples of 8MB */
                        side1_bits -= 25;

-                       
+

                        /* side two */
                        /* side two */

-                       
+

                        /* number of physical banks */
                        byte = smbus_read_byte(device, 5);
                        if (byte > 1) {
                        /* number of physical banks */
                        byte = smbus_read_byte(device, 5);
                        if (byte > 1) {


@@ -783,8 +783,8 @@ static void spd_set_dramc(void)
        }
        dramc = 0x8;
        if ((byte & 0x12) != 0) {
        }
        dramc = 0x8;
        if ((byte & 0x12) != 0) {

-               /* this is a registered part. 
-                * observation: for register parts, BIOS zeros (!) 
+               /* this is a registered part.
+                * observation: for register parts, BIOS zeros (!)

                 * registers CA-CC. This has an undocumented meaning.
                 */
                /* But it does make sense the oppisite of registered
                 * registers CA-CC. This has an undocumented meaning.
                 */
                /* But it does make sense the oppisite of registered


@@ -835,7 +835,7 @@ static void spd_enable_refresh(void)
        }
        byte &= 0x7f;
        /* Default refresh rate be conservative */
        }
        byte &= 0x7f;
        /* Default refresh rate be conservative */

-       refresh_rate = 5; 
+       refresh_rate = 5;

        /* see if the ram refresh is a supported one */
        if (byte < 6) {
 #if HAVE_STATIC_ARRAY_SUPPORT
        /* see if the ram refresh is a supported one */
        if (byte < 6) {
 #if HAVE_STATIC_ARRAY_SUPPORT


@@ -856,7 +856,7 @@ static void spd_set_sdramc(void)
 static void spd_set_rps(void)
 {
        /*
 static void spd_set_rps(void)
 {
        /*

-        * Effects:     Uses serial presence detect to set the row size 
+        * Effects:     Uses serial presence detect to set the row size

         *              on a given DIMM
         * FIXME:       Check for illegal/unsupported ram configurations and abort
         */
         *              on a given DIMM
         * FIXME:       Check for illegal/unsupported ram configurations and abort
         */


@@ -881,16 +881,16 @@ static void spd_set_rps(void)
                page_size = byte & 0xf;
                /* make it in multiples of 2Kb */
                page_size -= 11;
                page_size = byte & 0xf;
                /* make it in multiples of 2Kb */
                page_size -= 11;

-               
+

                if (page_size <= 0) continue;
                if (page_size <= 0) continue;

-               
+

                /* FIXME: do something with page sizes greather than 8KB!! */
                page_sizes |= (page_size << index);
                /* FIXME: do something with page sizes greather than 8KB!! */
                page_sizes |= (page_size << index);

-                               
+

                /* side two */
                byte = smbus_read_byte(device, 5);
                if (byte <= 1)  continue;
                /* side two */
                byte = smbus_read_byte(device, 5);
                if (byte <= 1)  continue;

-                       
+

                /* For now only handle the symmetrical case */
                page_sizes |= (page_size << (index +2));
        }
                /* For now only handle the symmetrical case */
                page_sizes |= (page_size << (index +2));
        }


@@ -898,10 +898,10 @@ static void spd_set_rps(void)
        /* we have just verified that we have to have this code. It appears that
         * the registered SDRAMs do indeed set the RPS wrong. sheesh.
         */
        /* we have just verified that we have to have this code. It appears that
         * the registered SDRAMs do indeed set the RPS wrong. sheesh.
         */

-       /* at this point, page_sizes holds the RPS for all ram. 
-        * we have verified that for registered DRAM the values are 
+       /* at this point, page_sizes holds the RPS for all ram.
+        * we have verified that for registered DRAM the values are

         * 1/2 the size they should be. So we test for registered
         * 1/2 the size they should be. So we test for registered

-        * and then double the sizes if needed. 
+        * and then double the sizes if needed.

         */
 
        dramc = pcibios_read_config_byte(I440GX_BUS, I440GX_DEVFN, 0x57);
         */
 
        dramc = pcibios_read_config_byte(I440GX_BUS, I440GX_DEVFN, 0x57);


@@ -909,9 +909,9 @@ static void spd_set_rps(void)
                /* registered */
 
                /* BIOS makes weird page size for registered! */
                /* registered */
 
                /* BIOS makes weird page size for registered! */

-               /* what we have found is you need to set the EVEN banks to 
-                * twice the size. Fortunately there is a very easy way to 
-                * do this. First, read the WORD value of register 0x74. 
+               /* what we have found is you need to set the EVEN banks to
+                * twice the size. Fortunately there is a very easy way to
+                * do this. First, read the WORD value of register 0x74.

                 */
                page_sizes += 0x1111;
        }
                 */
                page_sizes += 0x1111;
        }


@@ -938,8 +938,8 @@ static void spd_set_pgpol(void)
        bank_sizes = 0;
        bank = 0;
        device = SMBUS_MEM_DEVICE_START;
        bank_sizes = 0;
        bank = 0;
        device = SMBUS_MEM_DEVICE_START;

-       for(; device <= SMBUS_MEM_DEVICE_END; 
-           bank += 2, device += SMBUS_MEM_DEVICE_INC) { 
+       for(; device <= SMBUS_MEM_DEVICE_END;
+           bank += 2, device += SMBUS_MEM_DEVICE_INC) {

                int byte;
 
                /* logical banks */
                int byte;
 
                /* logical banks */


@@ -947,7 +947,7 @@ static void spd_set_pgpol(void)
                if (byte < 0) continue;
                if (byte < 4) continue;
                bank_sizes |= (1 << bank);
                if (byte < 0) continue;
                if (byte < 4) continue;
                bank_sizes |= (1 << bank);

-               
+

                /* side 2 */
                /* Number of physical banks */
                byte  = smbus_read_byte(device, 5);
                /* side 2 */
                /* Number of physical banks */
                byte  = smbus_read_byte(device, 5);


@@ -974,14 +974,14 @@ static void spd_set_nbxcfg(void)
        /* Say all dimms have no ECC support */
        reg = 0xff;
        index = 0;
        /* Say all dimms have no ECC support */
        reg = 0xff;
        index = 0;

-       
+

        device = SMBUS_MEM_DEVICE_START;
        for(; device <= SMBUS_MEM_DEVICE_END; index += 2, device += SMBUS_MEM_DEVICE_INC) {
                int byte;
 
                byte = smbus_read_byte(device, 11);
                if (byte < 0) continue;
        device = SMBUS_MEM_DEVICE_START;
        for(; device <= SMBUS_MEM_DEVICE_END; index += 2, device += SMBUS_MEM_DEVICE_INC) {
                int byte;
 
                byte = smbus_read_byte(device, 11);
                if (byte < 0) continue;

-#if !USE_ECC 
+#if !USE_ECC

                byte = 0; /* Disable ECC */
 #endif
                /* 0 == None, 1 == Parity, 2 == ECC */
                byte = 0; /* Disable ECC */
 #endif
                /* 0 == None, 1 == Parity, 2 == ECC */


@@ -1015,7 +1015,7 @@ static void spd_set_nbxcfg(void)
                /* try this.
                 * We should be setting bit 2 in register 76 and we're not
                 * technically we should see if CL=2 for the ram,
                /* try this.
                 * We should be setting bit 2 in register 76 and we're not
                 * technically we should see if CL=2 for the ram,

-                * but registered is so screwed up that it's kind of a lost 
+                * but registered is so screwed up that it's kind of a lost

                 * cause.
                 */
                byte = pcibios_read_config_byte(I440GX_BUS, I440GX_DEVFN, 0x76);
                 * cause.
                 */
                byte = pcibios_read_config_byte(I440GX_BUS, I440GX_DEVFN, 0x76);


@@ -1098,7 +1098,7 @@ static void dimms_read(unsigned long offset)
        int i;
        for(i = 0; i < 8; i++) {
                unsigned long dummy;
        int i;
        for(i = 0; i < 8; i++) {
                unsigned long dummy;

-               unsigned long addr; 
+               unsigned long addr;

                unsigned long next_base;
 
                next_base = dimm_base(i +1);
                unsigned long next_base;
 
                next_base = dimm_base(i +1);


@@ -1108,8 +1108,8 @@ static void dimms_read(unsigned long offset)
                }
                addr += offset;
 #if HAVE_STRING_SUPPORT
                }
                addr += offset;
 #if HAVE_STRING_SUPPORT

-               print_debug("Reading "); 
-               print_debug_hex32(addr); 
+               print_debug("Reading ");
+               print_debug_hex32(addr);

                print_debug("\n");
 #endif
 #if HAVE_POINTER_SUPPORT
                print_debug("\n");
 #endif
 #if HAVE_POINTER_SUPPORT


@@ -1120,8 +1120,8 @@ static void dimms_read(unsigned long offset)
 #endif
 #endif
 #if HAVE_STRING_SUPPORT
 #endif
 #endif
 #if HAVE_STRING_SUPPORT

-               print_debug("Reading "); 
-               print_debug_hex32(addr ^ 0xddf8); 
+               print_debug("Reading ");
+               print_debug_hex32(addr ^ 0xddf8);

                print_debug("\n");
 #endif
 #if HAVE_POINTER_SUPPORT
                print_debug("\n");
 #endif
 #if HAVE_POINTER_SUPPORT


@@ -1132,9 +1132,9 @@ static void dimms_read(unsigned long offset)
 #endif
 #endif
 #if HAVE_STRING_SUPPORT
 #endif
 #endif
 #if HAVE_STRING_SUPPORT

-               print_debug("Read "); 
-               print_debug_hex32(addr); 
-               print_debug_hex32(addr ^ 0xddf8); 
+               print_debug("Read ");
+               print_debug_hex32(addr);
+               print_debug_hex32(addr ^ 0xddf8);

                print_debug("\n");
 #endif
        }
                print_debug("\n");
 #endif
        }


@@ -1212,9 +1212,9 @@ void sdram_enable(void)
 #if HAVE_STRING_SUPPORT
        print_debug("Ram Enable 2\n");
 #endif
 #if HAVE_STRING_SUPPORT
        print_debug("Ram Enable 2\n");
 #endif

-       
+

        /* Now we need 8 AUTO REFRESH / CBR cycles to be performed */
        /* Now we need 8 AUTO REFRESH / CBR cycles to be performed */

-       
+

        sdram_set_command_cbr();
        sdram_assert_command();
        sdram_assert_command();
        sdram_set_command_cbr();
        sdram_assert_command();
        sdram_assert_command();


@@ -1224,11 +1224,11 @@ void sdram_enable(void)
        sdram_assert_command();
        sdram_assert_command();
        sdram_assert_command();
        sdram_assert_command();
        sdram_assert_command();
        sdram_assert_command();

-       
+

 #if HAVE_STRING_SUPPORT
        print_debug("Ram Enable 3\n");
 #endif
 #if HAVE_STRING_SUPPORT
        print_debug("Ram Enable 3\n");
 #endif

-       
+

        /* mode register set */
        sdram_set_mode_register();
        /* MAx[14:0] lines,
        /* mode register set */
        sdram_set_mode_register();
        /* MAx[14:0] lines,


@@ -1245,7 +1245,7 @@ void sdram_enable(void)
 
        /* normal operation */
        sdram_set_command_none();
 
        /* normal operation */
        sdram_set_command_none();

-       
+

 #if HAVE_STRING_SUPPORT
        print_debug("Ram Enable 5\n");
 #endif
 #if HAVE_STRING_SUPPORT
        print_debug("Ram Enable 5\n");
 #endif


@@ -1270,7 +1270,7 @@ void sdram_initialize(void)
        print_debug("Ram3\n");
 #endif
        /* Now that everything is setup enable the SDRAM.
        print_debug("Ram3\n");
 #endif
        /* Now that everything is setup enable the SDRAM.

-        * Some chipsets do the work for use while on others 
+        * Some chipsets do the work for use while on others

         * we need to it by hand.
         */
        sdram_enable();
         * we need to it by hand.
         */
        sdram_enable();

diff --git a/util/romcc/tests/raminit_test2.c b/util/romcc/tests/raminit_test2.c
index 2294b34e786fd4f8af00b6d93314b9440f78b1a3..d20ae6d4314a73849f1e492e9fe21bf3c5f28228 100644 (file)
--- a/util/romcc/tests/raminit_test2.c
+++ b/util/romcc/tests/raminit_test2.c
@@ -136,7 +136,7 @@ void uart_wait_to_tx_byte(void)
 
 void uart_wait_until_sent(void)
 {
 
 void uart_wait_until_sent(void)
 {

-       while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40)) 
+       while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))

                ;
 }
 
                ;
 }
 


@@ -355,7 +355,7 @@ int smbus_read_byte(unsigned device, unsigned address)
        /* CAS latency 2 */
 #if (CAS_LATENCY == 2)
 #define CAS_NB 0x17
        /* CAS latency 2 */
 #if (CAS_LATENCY == 2)
 #define CAS_NB 0x17

-       /* 
+       /*

         * 7 == 0111
         * 1 == 0001
         */
         * 7 == 0111
         * 1 == 0001
         */


@@ -367,7 +367,7 @@ int smbus_read_byte(unsigned device, unsigned address)
 #endif
 
        /* CAS latency 3 */
 #endif
 
        /* CAS latency 3 */

-#if (CAS_LATENCY == 3) 
+#if (CAS_LATENCY == 3)

 #define CAS_NB 0x13
        /*
         * 3 == 0011
 #define CAS_NB 0x13
        /*
         * 3 == 0011


@@ -381,11 +381,11 @@ int smbus_read_byte(unsigned device, unsigned address)
 #endif
 
 #ifndef CAS_NB
 #endif
 
 #ifndef CAS_NB

-#error "Nothing defined" 
+#error "Nothing defined"

 #endif
 
 /* Default values for config registers */
 #endif
 
 /* Default values for config registers */

-       
+

 static void set_nbxcfg(void)
 {
        /* NBXCFG 0x50 - 0x53 */
 static void set_nbxcfg(void)
 {
        /* NBXCFG 0x50 - 0x53 */


@@ -417,7 +417,7 @@ static void set_nbxcfg(void)
         * ECC Diagnostic Mode Enable == 0 Not Enabled
         * MDA present == 0 Not Present
         * USWC Write Post During During I/O Bridge Access Enable == 1 Enabled
         * ECC Diagnostic Mode Enable == 0 Not Enabled
         * MDA present == 0 Not Present
         * USWC Write Post During During I/O Bridge Access Enable == 1 Enabled

-        * In Order Queue Depth (IQD) (RO) == ?? 
+        * In Order Queue Depth (IQD) (RO) == ??

         */
        pcibios_write_config_dword(I440GX_BUS, I440GX_DEVFN, 0x50, 0xff00000c);
 }
         */
        pcibios_write_config_dword(I440GX_BUS, I440GX_DEVFN, 0x50, 0xff00000c);
 }


@@ -486,7 +486,7 @@ static void set_mbsc(void)
         * MD[63:0]# Buffer Strength Control 1 == 3x
         * MECC[7:0] Buffer Strength Control 2 == 3x
         * MECC[7:0] Buffer Strength Control 1 == 3x
         * MD[63:0]# Buffer Strength Control 1 == 3x
         * MECC[7:0] Buffer Strength Control 2 == 3x
         * MECC[7:0] Buffer Strength Control 1 == 3x

-        * CSB7# Buffer Strength == 3x  
+        * CSB7# Buffer Strength == 3x

         * CSA7# Buffer Strength == 3x
         * CSB6# Buffer Strength == 3x
         * CSA6# Buffer Strength == 3x
         * CSA7# Buffer Strength == 3x
         * CSB6# Buffer Strength == 3x
         * CSA6# Buffer Strength == 3x


@@ -575,13 +575,13 @@ static void set_pgpol(void)
 static void set_mbfs(void)
 {
        /* MBFS - Memory Buffer Frequencey Select Register */
 static void set_mbfs(void)
 {
        /* MBFS - Memory Buffer Frequencey Select Register */

-       /* 0xffff7f                                          
-        * [23:20] f == 1111                                 
-        * [19:16] f == 1111                                 
-        * [15:12] f == 1111                                 
-        * [11: 8] f == 1111                                 
-        * [ 7: 4] 7 == 0111                                 
-        * [ 3: 0] f == 1111                                 
+       /* 0xffff7f
+        * [23:20] f == 1111
+        * [19:16] f == 1111
+        * [15:12] f == 1111
+        * [11: 8] f == 1111
+        * [ 7: 4] 7 == 0111
+        * [ 3: 0] f == 1111

         * MAA[14:0], WEA#, SRASA#, SCASA# == 100Mhz Buffers Enabled
         * MAB[14,13,10,12:11,9:0], WEB#, SRASB#, SCASB# == 100Mhz Buffers Enabled
         * MD[63:0] Control 2 == 100 Mhz Buffer Enable
         * MAA[14:0], WEA#, SRASA#, SCASA# == 100Mhz Buffers Enabled
         * MAB[14,13,10,12:11,9:0], WEB#, SRASB#, SCASB# == 100Mhz Buffers Enabled
         * MD[63:0] Control 2 == 100 Mhz Buffer Enable


@@ -622,12 +622,12 @@ static void set_drtc(void)
 
 static void set_pmcr(void)
 {
 
 static void set_pmcr(void)
 {

-       /* PMCR -- BIOS sets 0x90 into it. 
+       /* PMCR -- BIOS sets 0x90 into it.

         * 0x10 is REQUIRED.
         * we have never used it. So why did this ever work?
         */
        pcibios_write_config_byte(I440GX_BUS, I440GX_DEVFN, 0x7a, 0x90);
         * 0x10 is REQUIRED.
         * we have never used it. So why did this ever work?
         */
        pcibios_write_config_byte(I440GX_BUS, I440GX_DEVFN, 0x7a, 0x90);

-       
+

 }
 void sdram_set_registers(void)
 {
 }
 void sdram_set_registers(void)
 {


@@ -651,7 +651,7 @@ void sdram_set_registers(void)
 int log2(int value)
 {
        /* __builtin_bsr is a exactly equivalent to the x86 machine
 int log2(int value)
 {
        /* __builtin_bsr is a exactly equivalent to the x86 machine

-        * instruction with the exception that it returns -1  
+        * instruction with the exception that it returns -1

         * when the value presented to it is zero.
         * Otherwise __builtin_bsr returns the zero based index of
         * the highest bit set.
         * when the value presented to it is zero.
         * Otherwise __builtin_bsr returns the zero based index of
         * the highest bit set.


@@ -670,7 +670,7 @@ static void spd_set_drb(void)
        unsigned end_of_memory;
        unsigned device;
        unsigned drb_reg;
        unsigned end_of_memory;
        unsigned device;
        unsigned drb_reg;

-       
+

        end_of_memory = 0; /* in multiples of 8MiB */
        device = SMBUS_MEM_DEVICE_START;
        drb_reg = 0x60;
        end_of_memory = 0; /* in multiples of 8MiB */
        device = SMBUS_MEM_DEVICE_START;
        drb_reg = 0x60;


@@ -704,13 +704,13 @@ static void spd_set_drb(void)
 #else
                        side1_bits += log2((byte2 << 8) | byte);
 #endif
 #else
                        side1_bits += log2((byte2 << 8) | byte);
 #endif

-                       
+

                        /* now I have the ram size in bits as a power of two (less 1) */
                        /* Make it mulitples of 8MB */
                        side1_bits -= 25;
                        /* now I have the ram size in bits as a power of two (less 1) */
                        /* Make it mulitples of 8MB */
                        side1_bits -= 25;

-                       
+

                        /* side two */
                        /* side two */

-                       
+

                        /* number of physical banks */
                        byte = smbus_read_byte(device, 5);
                        if (byte > 1) {
                        /* number of physical banks */
                        byte = smbus_read_byte(device, 5);
                        if (byte > 1) {


@@ -783,8 +783,8 @@ static void spd_set_dramc(void)
        }
        dramc = 0x8;
        if ((byte & 0x12) != 0) {
        }
        dramc = 0x8;
        if ((byte & 0x12) != 0) {

-               /* this is a registered part. 
-                * observation: for register parts, BIOS zeros (!) 
+               /* this is a registered part.
+                * observation: for register parts, BIOS zeros (!)

                 * registers CA-CC. This has an undocumented meaning.
                 */
                /* But it does make sense the oppisite of registered
                 * registers CA-CC. This has an undocumented meaning.
                 */
                /* But it does make sense the oppisite of registered


@@ -835,7 +835,7 @@ static void spd_enable_refresh(void)
        }
        byte &= 0x7f;
        /* Default refresh rate be conservative */
        }
        byte &= 0x7f;
        /* Default refresh rate be conservative */

-       refresh_rate = 5; 
+       refresh_rate = 5;

        /* see if the ram refresh is a supported one */
        if (byte < 6) {
 #if HAVE_STATIC_ARRAY_SUPPORT
        /* see if the ram refresh is a supported one */
        if (byte < 6) {
 #if HAVE_STATIC_ARRAY_SUPPORT


@@ -856,7 +856,7 @@ static void spd_set_sdramc(void)
 static void spd_set_rps(void)
 {
        /*
 static void spd_set_rps(void)
 {
        /*

-        * Effects:     Uses serial presence detect to set the row size 
+        * Effects:     Uses serial presence detect to set the row size

         *              on a given DIMM
         * FIXME:       Check for illegal/unsupported ram configurations and abort
         */
         *              on a given DIMM
         * FIXME:       Check for illegal/unsupported ram configurations and abort
         */


@@ -881,16 +881,16 @@ static void spd_set_rps(void)
                page_size = byte & 0xf;
                /* make it in multiples of 2Kb */
                page_size -= 11;
                page_size = byte & 0xf;
                /* make it in multiples of 2Kb */
                page_size -= 11;

-               
+

                if (page_size <= 0) continue;
                if (page_size <= 0) continue;

-               
+

                /* FIXME: do something with page sizes greather than 8KB!! */
                page_sizes |= (page_size << index);
                /* FIXME: do something with page sizes greather than 8KB!! */
                page_sizes |= (page_size << index);

-                               
+

                /* side two */
                byte = smbus_read_byte(device, 5);
                if (byte <= 1)  continue;
                /* side two */
                byte = smbus_read_byte(device, 5);
                if (byte <= 1)  continue;

-                       
+

                /* For now only handle the symmetrical case */
                page_sizes |= (page_size << (index +2));
        }
                /* For now only handle the symmetrical case */
                page_sizes |= (page_size << (index +2));
        }


@@ -898,10 +898,10 @@ static void spd_set_rps(void)
        /* we have just verified that we have to have this code. It appears that
         * the registered SDRAMs do indeed set the RPS wrong. sheesh.
         */
        /* we have just verified that we have to have this code. It appears that
         * the registered SDRAMs do indeed set the RPS wrong. sheesh.
         */

-       /* at this point, page_sizes holds the RPS for all ram. 
-        * we have verified that for registered DRAM the values are 
+       /* at this point, page_sizes holds the RPS for all ram.
+        * we have verified that for registered DRAM the values are

         * 1/2 the size they should be. So we test for registered
         * 1/2 the size they should be. So we test for registered

-        * and then double the sizes if needed. 
+        * and then double the sizes if needed.

         */
 
        dramc = pcibios_read_config_byte(I440GX_BUS, I440GX_DEVFN, 0x57);
         */
 
        dramc = pcibios_read_config_byte(I440GX_BUS, I440GX_DEVFN, 0x57);


@@ -909,9 +909,9 @@ static void spd_set_rps(void)
                /* registered */
 
                /* BIOS makes weird page size for registered! */
                /* registered */
 
                /* BIOS makes weird page size for registered! */

-               /* what we have found is you need to set the EVEN banks to 
-                * twice the size. Fortunately there is a very easy way to 
-                * do this. First, read the WORD value of register 0x74. 
+               /* what we have found is you need to set the EVEN banks to
+                * twice the size. Fortunately there is a very easy way to
+                * do this. First, read the WORD value of register 0x74.

                 */
                page_sizes += 0x1111;
        }
                 */
                page_sizes += 0x1111;
        }


@@ -938,8 +938,8 @@ static void spd_set_pgpol(void)
        bank_sizes = 0;
        bank = 0;
        device = SMBUS_MEM_DEVICE_START;
        bank_sizes = 0;
        bank = 0;
        device = SMBUS_MEM_DEVICE_START;

-       for(; device <= SMBUS_MEM_DEVICE_END; 
-           bank += 2, device += SMBUS_MEM_DEVICE_INC) { 
+       for(; device <= SMBUS_MEM_DEVICE_END;
+           bank += 2, device += SMBUS_MEM_DEVICE_INC) {

                int byte;
 
                /* logical banks */
                int byte;
 
                /* logical banks */


@@ -947,7 +947,7 @@ static void spd_set_pgpol(void)
                if (byte < 0) continue;
                if (byte < 4) continue;
                bank_sizes |= (1 << bank);
                if (byte < 0) continue;
                if (byte < 4) continue;
                bank_sizes |= (1 << bank);

-               
+

                /* side 2 */
                /* Number of physical banks */
                byte  = smbus_read_byte(device, 5);
                /* side 2 */
                /* Number of physical banks */
                byte  = smbus_read_byte(device, 5);


@@ -974,14 +974,14 @@ static void spd_set_nbxcfg(void)
        /* Say all dimms have no ECC support */
        reg = 0xff;
        index = 0;
        /* Say all dimms have no ECC support */
        reg = 0xff;
        index = 0;

-       
+

        device = SMBUS_MEM_DEVICE_START;
        for(; device <= SMBUS_MEM_DEVICE_END; index += 2, device += SMBUS_MEM_DEVICE_INC) {
                int byte;
 
                byte = smbus_read_byte(device, 11);
                if (byte < 0) continue;
        device = SMBUS_MEM_DEVICE_START;
        for(; device <= SMBUS_MEM_DEVICE_END; index += 2, device += SMBUS_MEM_DEVICE_INC) {
                int byte;
 
                byte = smbus_read_byte(device, 11);
                if (byte < 0) continue;

-#if !USE_ECC 
+#if !USE_ECC

                byte = 0; /* Disable ECC */
 #endif
                /* 0 == None, 1 == Parity, 2 == ECC */
                byte = 0; /* Disable ECC */
 #endif
                /* 0 == None, 1 == Parity, 2 == ECC */


@@ -1015,7 +1015,7 @@ static void spd_set_nbxcfg(void)
                /* try this.
                 * We should be setting bit 2 in register 76 and we're not
                 * technically we should see if CL=2 for the ram,
                /* try this.
                 * We should be setting bit 2 in register 76 and we're not
                 * technically we should see if CL=2 for the ram,

-                * but registered is so screwed up that it's kind of a lost 
+                * but registered is so screwed up that it's kind of a lost

                 * cause.
                 */
                byte = pcibios_read_config_byte(I440GX_BUS, I440GX_DEVFN, 0x76);
                 * cause.
                 */
                byte = pcibios_read_config_byte(I440GX_BUS, I440GX_DEVFN, 0x76);


@@ -1098,7 +1098,7 @@ static void dimms_read(unsigned long offset)
        int i;
        for(i = 0; i < 8; i++) {
                unsigned long dummy;
        int i;
        for(i = 0; i < 8; i++) {
                unsigned long dummy;

-               unsigned long addr; 
+               unsigned long addr;

                unsigned long next_base;
 
                next_base = dimm_base(i +1);
                unsigned long next_base;
 
                next_base = dimm_base(i +1);


@@ -1108,8 +1108,8 @@ static void dimms_read(unsigned long offset)
                }
                addr += offset;
 #if HAVE_STRING_SUPPORT
                }
                addr += offset;
 #if HAVE_STRING_SUPPORT

-               print_debug("Reading "); 
-               print_debug_hex32(addr); 
+               print_debug("Reading ");
+               print_debug_hex32(addr);

                print_debug("\n");
 #endif
 #if HAVE_POINTER_SUPPORT
                print_debug("\n");
 #endif
 #if HAVE_POINTER_SUPPORT


@@ -1120,8 +1120,8 @@ static void dimms_read(unsigned long offset)
 #endif
 #endif
 #if HAVE_STRING_SUPPORT
 #endif
 #endif
 #if HAVE_STRING_SUPPORT

-               print_debug("Reading "); 
-               print_debug_hex32(addr ^ 0xddf8); 
+               print_debug("Reading ");
+               print_debug_hex32(addr ^ 0xddf8);

                print_debug("\n");
 #endif
 #if HAVE_POINTER_SUPPORT
                print_debug("\n");
 #endif
 #if HAVE_POINTER_SUPPORT


@@ -1132,9 +1132,9 @@ static void dimms_read(unsigned long offset)
 #endif
 #endif
 #if HAVE_STRING_SUPPORT
 #endif
 #endif
 #if HAVE_STRING_SUPPORT

-               print_debug("Read "); 
-               print_debug_hex32(addr); 
-               print_debug_hex32(addr ^ 0xddf8); 
+               print_debug("Read ");
+               print_debug_hex32(addr);
+               print_debug_hex32(addr ^ 0xddf8);

                print_debug("\n");
 #endif
        }
                print_debug("\n");
 #endif
        }


@@ -1212,9 +1212,9 @@ void sdram_enable(void)
 #if HAVE_STRING_SUPPORT
        print_debug("Ram Enable 2\n");
 #endif
 #if HAVE_STRING_SUPPORT
        print_debug("Ram Enable 2\n");
 #endif

-       
+

        /* Now we need 8 AUTO REFRESH / CBR cycles to be performed */
        /* Now we need 8 AUTO REFRESH / CBR cycles to be performed */

-       
+

        sdram_set_command_cbr();
        sdram_assert_command();
        sdram_assert_command();
        sdram_set_command_cbr();
        sdram_assert_command();
        sdram_assert_command();


@@ -1224,11 +1224,11 @@ void sdram_enable(void)
        sdram_assert_command();
        sdram_assert_command();
        sdram_assert_command();
        sdram_assert_command();
        sdram_assert_command();
        sdram_assert_command();

-       
+

 #if HAVE_STRING_SUPPORT
        print_debug("Ram Enable 3\n");
 #endif
 #if HAVE_STRING_SUPPORT
        print_debug("Ram Enable 3\n");
 #endif

-       
+

        /* mode register set */
        sdram_set_mode_register();
        /* MAx[14:0] lines,
        /* mode register set */
        sdram_set_mode_register();
        /* MAx[14:0] lines,


@@ -1245,7 +1245,7 @@ void sdram_enable(void)
 
        /* normal operation */
        sdram_set_command_none();
 
        /* normal operation */
        sdram_set_command_none();

-       
+

 #if HAVE_STRING_SUPPORT
        print_debug("Ram Enable 5\n");
 #endif
 #if HAVE_STRING_SUPPORT
        print_debug("Ram Enable 5\n");
 #endif


@@ -1270,7 +1270,7 @@ void sdram_initialize(void)
        print_debug("Ram3\n");
 #endif
        /* Now that everything is setup enable the SDRAM.
        print_debug("Ram3\n");
 #endif
        /* Now that everything is setup enable the SDRAM.

-        * Some chipsets do the work for use while on others 
+        * Some chipsets do the work for use while on others

         * we need to it by hand.
         */
        sdram_enable();
         * we need to it by hand.
         */
        sdram_enable();

diff --git a/util/romcc/tests/raminit_test6.c b/util/romcc/tests/raminit_test6.c
index a0c3f055be09966f007eaa6bf70b558b48c95334..e99e355e33d8b0b3051db10dbc81bdc0f449267c 100644 (file)
--- a/util/romcc/tests/raminit_test6.c
+++ b/util/romcc/tests/raminit_test6.c
@@ -1,30 +1,30 @@
 typedef unsigned char      uint8_t;
 typedef unsigned char      uint8_t;

-typedef signed char        int8_t; 
+typedef signed char        int8_t;

 typedef unsigned short     uint16_t;
 typedef signed short       int16_t;
 typedef unsigned int       uint32_t;
 typedef signed int         int32_t;
 typedef unsigned short     uint16_t;
 typedef signed short       int16_t;
 typedef unsigned int       uint32_t;
 typedef signed int         int32_t;

- 
+

 typedef unsigned char      uint_least8_t;
 typedef unsigned char      uint_least8_t;

-typedef signed char        int_least8_t; 
+typedef signed char        int_least8_t;

 typedef unsigned short     uint_least16_t;
 typedef signed short       int_least16_t;
 typedef unsigned int       uint_least32_t;
 typedef signed int         int_least32_t;
 typedef unsigned short     uint_least16_t;
 typedef signed short       int_least16_t;
 typedef unsigned int       uint_least32_t;
 typedef signed int         int_least32_t;

- 
+

 typedef unsigned char      uint_fast8_t;
 typedef unsigned char      uint_fast8_t;

-typedef signed char        int_fast8_t; 
+typedef signed char        int_fast8_t;

 typedef unsigned int       uint_fast16_t;
 typedef signed int         int_fast16_t;
 typedef unsigned int       uint_fast32_t;
 typedef signed int         int_fast32_t;
 typedef unsigned int       uint_fast16_t;
 typedef signed int         int_fast16_t;
 typedef unsigned int       uint_fast32_t;
 typedef signed int         int_fast32_t;

- 
+

 typedef int                intptr_t;
 typedef unsigned int       uintptr_t;
 typedef int                intptr_t;
 typedef unsigned int       uintptr_t;

- 
+

 typedef long int           intmax_t;
 typedef unsigned long int  uintmax_t;
 typedef long int           intmax_t;
 typedef unsigned long int  uintmax_t;

- 
+

 static inline unsigned long apic_read(unsigned long reg)
 {
        return *((volatile unsigned long *)(0xfee00000 +reg));
 static inline unsigned long apic_read(unsigned long reg)
 {
        return *((volatile unsigned long *)(0xfee00000 +reg));


@@ -37,7 +37,7 @@ static inline void apic_wait_icr_idle(void)
 {
        do { } while ( apic_read( 0x300  ) & 0x01000  );
 }
 {
        do { } while ( apic_read( 0x300  ) & 0x01000  );
 }

- 
+

 static void outb(unsigned char value, unsigned short port)
 {
        __builtin_outb(value, port);
 static void outb(unsigned char value, unsigned short port)
 {
        __builtin_outb(value, port);


@@ -65,7 +65,7 @@ static unsigned char inl(unsigned short port)
 static inline void outsb(uint16_t port, const void *addr, unsigned long count)
 {
        __asm__ __volatile__ (
 static inline void outsb(uint16_t port, const void *addr, unsigned long count)
 {
        __asm__ __volatile__ (

-               "cld ; rep ; outsb " 
+               "cld ; rep ; outsb "

                : "=S" (addr), "=c" (count)
                : "d"(port), "0"(addr), "1" (count)
                );
                : "=S" (addr), "=c" (count)
                : "d"(port), "0"(addr), "1" (count)
                );


@@ -73,7 +73,7 @@ static inline void outsb(uint16_t port, const void *addr, unsigned long count)
 static inline void outsw(uint16_t port, const void *addr, unsigned long count)
 {
        __asm__ __volatile__ (
 static inline void outsw(uint16_t port, const void *addr, unsigned long count)
 {
        __asm__ __volatile__ (

-               "cld ; rep ; outsw " 
+               "cld ; rep ; outsw "

                : "=S" (addr), "=c" (count)
                : "d"(port), "0"(addr), "1" (count)
                );
                : "=S" (addr), "=c" (count)
                : "d"(port), "0"(addr), "1" (count)
                );


@@ -81,7 +81,7 @@ static inline void outsw(uint16_t port, const void *addr, unsigned long count)
 static inline void outsl(uint16_t port, const void *addr, unsigned long count)
 {
        __asm__ __volatile__ (
 static inline void outsl(uint16_t port, const void *addr, unsigned long count)
 {
        __asm__ __volatile__ (

-               "cld ; rep ; outsl " 
+               "cld ; rep ; outsl "

                : "=S" (addr), "=c" (count)
                : "d"(port), "0"(addr), "1" (count)
                );
                : "=S" (addr), "=c" (count)
                : "d"(port), "0"(addr), "1" (count)
                );


@@ -89,7 +89,7 @@ static inline void outsl(uint16_t port, const void *addr, unsigned long count)
 static inline void insb(uint16_t port, void *addr, unsigned long count)
 {
        __asm__ __volatile__ (
 static inline void insb(uint16_t port, void *addr, unsigned long count)
 {
        __asm__ __volatile__ (

-               "cld ; rep ; insb " 
+               "cld ; rep ; insb "

                : "=D" (addr), "=c" (count)
                : "d"(port), "0"(addr), "1" (count)
                );
                : "=D" (addr), "=c" (count)
                : "d"(port), "0"(addr), "1" (count)
                );


@@ -97,7 +97,7 @@ static inline void insb(uint16_t port, void *addr, unsigned long count)
 static inline void insw(uint16_t port, void *addr, unsigned long count)
 {
        __asm__ __volatile__ (
 static inline void insw(uint16_t port, void *addr, unsigned long count)
 {
        __asm__ __volatile__ (

-               "cld ; rep ; insw " 
+               "cld ; rep ; insw "

                : "=D" (addr), "=c" (count)
                : "d"(port), "0"(addr), "1" (count)
                );
                : "=D" (addr), "=c" (count)
                : "d"(port), "0"(addr), "1" (count)
                );


@@ -105,7 +105,7 @@ static inline void insw(uint16_t port, void *addr, unsigned long count)
 static inline void insl(uint16_t port, void *addr, unsigned long count)
 {
        __asm__ __volatile__ (
 static inline void insl(uint16_t port, void *addr, unsigned long count)
 {
        __asm__ __volatile__ (

-               "cld ; rep ; insl " 
+               "cld ; rep ; insl "

                : "=D" (addr), "=c" (count)
                : "d"(port), "0"(addr), "1" (count)
                );
                : "=D" (addr), "=c" (count)
                : "d"(port), "0"(addr), "1" (count)
                );


@@ -180,7 +180,7 @@ static uldiv_t uldiv(unsigned long numer, unsigned long denom)
 }
 int log2(int value)
 {
 }
 int log2(int value)
 {

-        
+

        return __builtin_bsr(value);
 }
 typedef unsigned device_t;
        return __builtin_bsr(value);
 }
 typedef unsigned device_t;


@@ -237,11 +237,11 @@ static device_t pci_locate_device(unsigned pci_id, device_t dev)
        }
        return (0xffffffffU) ;
 }
        }
        return (0xffffffffU) ;
 }

- 
- 
- 
- 
- 
+
+
+
+
+

 static int uart_can_tx_byte(void)
 {
        return inb(1016  + 0x05 ) & 0x20;
 static int uart_can_tx_byte(void)
 {
        return inb(1016  + 0x05 ) & 0x20;


@@ -253,29 +253,29 @@ static void uart_wait_to_tx_byte(void)
 }
 static void uart_wait_until_sent(void)
 {
 }
 static void uart_wait_until_sent(void)
 {

-       while(!(inb(1016  + 0x05 ) & 0x40)) 
+       while(!(inb(1016  + 0x05 ) & 0x40))

                ;
 }
 static void uart_tx_byte(unsigned char data)
 {
        uart_wait_to_tx_byte();
        outb(data, 1016  + 0x00 );
                ;
 }
 static void uart_tx_byte(unsigned char data)
 {
        uart_wait_to_tx_byte();
        outb(data, 1016  + 0x00 );

-        
+

        uart_wait_until_sent();
 }
 static void uart_init(void)
 {
        uart_wait_until_sent();
 }
 static void uart_init(void)
 {

-        
+

        outb(0x0, 1016  + 0x01 );
        outb(0x0, 1016  + 0x01 );

-        
+

        outb(0x01, 1016  + 0x02 );
        outb(0x01, 1016  + 0x02 );

-        
+

        outb(0x80 | 3  , 1016  + 0x03 );
        outb((115200/ 115200 )  & 0xFF,   1016  + 0x00 );
        outb(((115200/ 115200 )  >> 8) & 0xFF,    1016  + 0x01 );
        outb(3  , 1016  + 0x03 );
 }
        outb(0x80 | 3  , 1016  + 0x03 );
        outb((115200/ 115200 )  & 0xFF,   1016  + 0x00 );
        outb(((115200/ 115200 )  >> 8) & 0xFF,    1016  + 0x01 );
        outb(3  , 1016  + 0x03 );
 }

- 
+

 static void __console_tx_byte(unsigned char byte)
 {
        uart_tx_byte(byte);
 static void __console_tx_byte(unsigned char byte)
 {
        uart_tx_byte(byte);


@@ -380,12 +380,12 @@ static void print_spew_hex32(unsigned int value) { __console_tx_hex32(8 , value)
 static void print_spew(const char *str) { __console_tx_string(8 , str); }
 static void console_init(void)
 {
 static void print_spew(const char *str) { __console_tx_string(8 , str); }
 static void console_init(void)
 {

-       static const char console_test[] = 
+       static const char console_test[] =

                "\r\n\r\nLinuxBIOS-"
                "\r\n\r\nLinuxBIOS-"

-               "1.1.4"  
-               ".0Fallback"  
+               "1.1.4"
+               ".0Fallback"

                " "
                " "

-               "Thu Oct 9 20:29:48 MDT 2003"  
+               "Thu Oct 9 20:29:48 MDT 2003"

                " starting...\r\n";
        print_info(console_test);
 }
                " starting...\r\n";
        print_info(console_test);
 }


@@ -400,9 +400,9 @@ static void write_phys(unsigned long addr, unsigned long value)
 {
        asm volatile(
                "movnti %1, (%0)"
 {
        asm volatile(
                "movnti %1, (%0)"

-               :  
-               : "r" (addr), "r" (value)  
-               :  
+               :
+               : "r" (addr), "r" (value)
+               :

                );
 }
 static unsigned long read_phys(unsigned long addr)
                );
 }
 static unsigned long read_phys(unsigned long addr)


@@ -414,28 +414,28 @@ static unsigned long read_phys(unsigned long addr)
 static void ram_fill(unsigned long start, unsigned long stop)
 {
        unsigned long addr;
 static void ram_fill(unsigned long start, unsigned long stop)
 {
        unsigned long addr;

-        
+

        print_debug("DRAM fill: ");
        print_debug_hex32(start);
        print_debug("-");
        print_debug_hex32(stop);
        print_debug("\r\n");
        for(addr = start; addr < stop ; addr += 4) {
        print_debug("DRAM fill: ");
        print_debug_hex32(start);
        print_debug("-");
        print_debug_hex32(stop);
        print_debug("\r\n");
        for(addr = start; addr < stop ; addr += 4) {

-                
+

                if (!(addr & 0xffff)) {
                        print_debug_hex32(addr);
                        print_debug("\r");
                }
                write_phys(addr, addr);
        };
                if (!(addr & 0xffff)) {
                        print_debug_hex32(addr);
                        print_debug("\r");
                }
                write_phys(addr, addr);
        };

-        
+

        print_debug_hex32(addr);
        print_debug("\r\nDRAM filled\r\n");
 }
 static void ram_verify(unsigned long start, unsigned long stop)
 {
        unsigned long addr;
        print_debug_hex32(addr);
        print_debug("\r\nDRAM filled\r\n");
 }
 static void ram_verify(unsigned long start, unsigned long stop)
 {
        unsigned long addr;

-        
+

        print_debug("DRAM verify: ");
        print_debug_hex32(start);
        print_debug_char('-');
        print_debug("DRAM verify: ");
        print_debug_hex32(start);
        print_debug_char('-');


@@ -443,31 +443,31 @@ static void ram_verify(unsigned long start, unsigned long stop)
        print_debug("\r\n");
        for(addr = start; addr < stop ; addr += 4) {
                unsigned long value;
        print_debug("\r\n");
        for(addr = start; addr < stop ; addr += 4) {
                unsigned long value;

-                
+

                if (!(addr & 0xffff)) {
                        print_debug_hex32(addr);
                        print_debug("\r");
                }
                value = read_phys(addr);
                if (value != addr) {
                if (!(addr & 0xffff)) {
                        print_debug_hex32(addr);
                        print_debug("\r");
                }
                value = read_phys(addr);
                if (value != addr) {

-                        
+

                        print_err_hex32(addr);
                        print_err_char(':');
                        print_err_hex32(value);
                        print_err("\r\n");
                }
        }
                        print_err_hex32(addr);
                        print_err_char(':');
                        print_err_hex32(value);
                        print_err("\r\n");
                }
        }

-        
+

        print_debug_hex32(addr);
        print_debug("\r\nDRAM verified\r\n");
 }
 void ram_check(unsigned long start, unsigned long stop)
 {
        int result;
        print_debug_hex32(addr);
        print_debug("\r\nDRAM verified\r\n");
 }
 void ram_check(unsigned long start, unsigned long stop)
 {
        int result;

-        
+

        print_debug("Testing DRAM : ");
        print_debug_hex32(start);
        print_debug("Testing DRAM : ");
        print_debug_hex32(start);

-       print_debug("-");       
+       print_debug("-");

        print_debug_hex32(stop);
        print_debug("\r\n");
        ram_fill(start, stop);
        print_debug_hex32(stop);
        print_debug("\r\n");
        ram_fill(start, stop);


@@ -476,7 +476,7 @@ void ram_check(unsigned long start, unsigned long stop)
 }
 static int enumerate_ht_chain(unsigned link)
 {
 }
 static int enumerate_ht_chain(unsigned link)
 {

-        
+

        unsigned next_unitid, last_unitid;
        int reset_needed = 0;
        next_unitid = 1;
        unsigned next_unitid, last_unitid;
        int reset_needed = 0;
        next_unitid = 1;


@@ -485,7 +485,7 @@ static int enumerate_ht_chain(unsigned link)
                uint8_t hdr_type, pos;
                last_unitid = next_unitid;
                id = pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 0 ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8)) , 0x00 );
                uint8_t hdr_type, pos;
                last_unitid = next_unitid;
                id = pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 0 ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8)) , 0x00 );

-                
+

                if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
                        (((id >> 16) & 0xffff) == 0xffff) ||
                        (((id >> 16) & 0xffff) == 0x0000)) {
                if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
                        (((id >> 16) & 0xffff) == 0xffff) ||
                        (((id >> 16) & 0xffff) == 0x0000)) {


@@ -531,7 +531,7 @@ static void enable_smbus(void)
        pci_write_config32(dev, 0x58, 0x0f00  | 1);
        enable = pci_read_config8(dev, 0x41);
        pci_write_config8(dev, 0x41, enable | (1 << 7));
        pci_write_config32(dev, 0x58, 0x0f00  | 1);
        enable = pci_read_config8(dev, 0x41);
        pci_write_config8(dev, 0x41, enable | (1 << 7));

-        
+

        outw(inw(0x0f00  + 0xe0 ), 0x0f00  + 0xe0 );
 }
 static inline void smbus_delay(void)
        outw(inw(0x0f00  + 0xe0 ), 0x0f00  + 0xe0 );
 }
 static inline void smbus_delay(void)


@@ -550,7 +550,7 @@ static int smbus_wait_until_ready(void)
                        break;
                }
                if(loops == ((100*1000*10)  / 2)) {
                        break;
                }
                if(loops == ((100*1000*10)  / 2)) {

-                       outw(inw(0x0f00  + 0xe0 ), 
+                       outw(inw(0x0f00  + 0xe0 ),

                                0x0f00  + 0xe0 );
                }
        } while(--loops);
                                0x0f00  + 0xe0 );
                }
        } while(--loops);


@@ -563,7 +563,7 @@ static int smbus_wait_until_done(void)
        do {
                unsigned short val;
                smbus_delay();
        do {
                unsigned short val;
                smbus_delay();

-               
+

                val = inw(0x0f00  + 0xe0 );
                if (((val & 0x8) == 0) | ((val & 0x437) != 0)) {
                        break;
                val = inw(0x0f00  + 0xe0 );
                if (((val & 0x8) == 0) | ((val & 0x437) != 0)) {
                        break;


@@ -579,29 +579,29 @@ static int smbus_read_byte(unsigned device, unsigned address)
        if (smbus_wait_until_ready() < 0) {
                return -2;
        }
        if (smbus_wait_until_ready() < 0) {
                return -2;
        }

-       
-        
-        
+
+
+

        outw(inw(0x0f00  + 0xe2 ) & ~((1<<10)|(1<<9)|(1<<8)|(1<<4)), 0x0f00  + 0xe2 );
        outw(inw(0x0f00  + 0xe2 ) & ~((1<<10)|(1<<9)|(1<<8)|(1<<4)), 0x0f00  + 0xe2 );

-        
+

        outw(((device & 0x7f) << 1) | 1, 0x0f00  + 0xe4 );
        outw(((device & 0x7f) << 1) | 1, 0x0f00  + 0xe4 );

-        
+

        outb(address & 0xFF, 0x0f00  + 0xe8 );
        outb(address & 0xFF, 0x0f00  + 0xe8 );

-        
+

        outw((inw(0x0f00  + 0xe2 ) & ~7) | (0x2), 0x0f00  + 0xe2 );
        outw((inw(0x0f00  + 0xe2 ) & ~7) | (0x2), 0x0f00  + 0xe2 );

-        
-        
+
+

        outw(inw(0x0f00  + 0xe0 ), 0x0f00  + 0xe0 );
        outw(inw(0x0f00  + 0xe0 ), 0x0f00  + 0xe0 );

-        
+

        outw(0, 0x0f00  + 0xe6 );
        outw(0, 0x0f00  + 0xe6 );

-        
+

        outw((inw(0x0f00  + 0xe2 ) | (1 << 3)), 0x0f00  + 0xe2 );
        outw((inw(0x0f00  + 0xe2 ) | (1 << 3)), 0x0f00  + 0xe2 );

-        
+

        if (smbus_wait_until_done() < 0) {
                return -3;
        }
        global_status_register = inw(0x0f00  + 0xe0 );
        if (smbus_wait_until_done() < 0) {
                return -3;
        }
        global_status_register = inw(0x0f00  + 0xe0 );

-        
+

        byte = inw(0x0f00  + 0xe6 ) & 0xff;
        if (global_status_register != (1 << 4)) {
                return -1;
        byte = inw(0x0f00  + 0xe6 ) & 0xff;
        if (global_status_register != (1 << 4)) {
                return -1;


@@ -636,31 +636,31 @@ static tsc_t rdtsc(void)
 {
        tsc_t res;
        asm ("rdtsc"
 {
        tsc_t res;
        asm ("rdtsc"

-               : "=a" (res.lo), "=d"(res.hi)  
-               :  
-               :  
+               : "=a" (res.lo), "=d"(res.hi)
+               :
+               :

                );
        return res;
 }
 void init_timer(void)
 {
                );
        return res;
 }
 void init_timer(void)
 {

-        
+

        apic_write(0x320 , (1 << 17)|(1<< 16)|(0 << 12)|(0 << 0));
        apic_write(0x320 , (1 << 17)|(1<< 16)|(0 << 12)|(0 << 0));

-        
+

        apic_write(0x3E0 , 0xB );
        apic_write(0x3E0 , 0xB );

-        
+

        apic_write(0x380 , 0xffffffff);
 }
 void udelay(unsigned usecs)
 {
        uint32_t start, value, ticks;
        apic_write(0x380 , 0xffffffff);
 }
 void udelay(unsigned usecs)
 {
        uint32_t start, value, ticks;

-        
+

        ticks = usecs * 200;
        start = apic_read(0x390 );
        do {
                value = apic_read(0x390 );
        } while((start - value) < ticks);
        ticks = usecs * 200;
        start = apic_read(0x390 );
        do {
                value = apic_read(0x390 );
        } while((start - value) < ticks);

-       
+

 }
 void mdelay(unsigned msecs)
 {
 }
 void mdelay(unsigned msecs)
 {


@@ -732,8 +732,8 @@ static void print_debug_pci_dev(unsigned dev)
 static void print_pci_devices(void)
 {
        device_t dev;
 static void print_pci_devices(void)
 {
        device_t dev;

-       for(dev = ( ((( 0 ) & 0xFF) << 16) | (((  0 ) & 0x1f) << 11) | (((  0 )  & 0x7) << 8)) ; 
-               dev <= ( ((( 0 ) & 0xFF) << 16) | (((  0x1f ) & 0x1f) << 11) | (((  0x7 )  & 0x7) << 8)) ; 
+       for(dev = ( ((( 0 ) & 0xFF) << 16) | (((  0 ) & 0x1f) << 11) | (((  0 )  & 0x7) << 8)) ;
+               dev <= ( ((( 0 ) & 0xFF) << 16) | (((  0x1f ) & 0x1f) << 11) | (((  0x7 )  & 0x7) << 8)) ;

                dev += ( ((( 0 ) & 0xFF) << 16) | ((( 0 ) & 0x1f) << 11) | ((( 1 )  & 0x7) << 8)) ) {
                uint32_t id;
                id = pci_read_config32(dev, 0x00 );
                dev += ( ((( 0 ) & 0xFF) << 16) | ((( 0 ) & 0x1f) << 11) | ((( 1 )  & 0x7) << 8)) ) {
                uint32_t id;
                id = pci_read_config32(dev, 0x00 );


@@ -751,7 +751,7 @@ static void dump_pci_device(unsigned dev)
        int i;
        print_debug_pci_dev(dev);
        print_debug("\r\n");
        int i;
        print_debug_pci_dev(dev);
        print_debug("\r\n");

-       
+

        for(i = 0; i <= 255; i++) {
                unsigned char val;
                if ((i & 0x0f) == 0) {
        for(i = 0; i <= 255; i++) {
                unsigned char val;
                if ((i & 0x0f) == 0) {


@@ -769,8 +769,8 @@ static void dump_pci_device(unsigned dev)
 static void dump_pci_devices(void)
 {
        device_t dev;
 static void dump_pci_devices(void)
 {
        device_t dev;

-       for(dev = ( ((( 0 ) & 0xFF) << 16) | (((  0 ) & 0x1f) << 11) | (((  0 )  & 0x7) << 8)) ; 
-               dev <= ( ((( 0 ) & 0xFF) << 16) | (((  0x1f ) & 0x1f) << 11) | (((  0x7 )  & 0x7) << 8)) ; 
+       for(dev = ( ((( 0 ) & 0xFF) << 16) | (((  0 ) & 0x1f) << 11) | (((  0 )  & 0x7) << 8)) ;
+               dev <= ( ((( 0 ) & 0xFF) << 16) | (((  0x1f ) & 0x1f) << 11) | (((  0x7 )  & 0x7) << 8)) ;

                dev += ( ((( 0 ) & 0xFF) << 16) | ((( 0 ) & 0x1f) << 11) | ((( 1 )  & 0x7) << 8)) ) {
                uint32_t id;
                id = pci_read_config32(dev, 0x00 );
                dev += ( ((( 0 ) & 0xFF) << 16) | ((( 0 ) & 0x1f) << 11) | ((( 1 )  & 0x7) << 8)) ) {
                uint32_t id;
                id = pci_read_config32(dev, 0x00 );


@@ -791,8 +791,8 @@ static void dump_spd_registers(const struct mem_controller *ctrl)
                device = ctrl->channel0[i];
                if (device) {
                        int j;
                device = ctrl->channel0[i];
                if (device) {
                        int j;

-                       print_debug("dimm: "); 
-                       print_debug_hex8(i); 
+                       print_debug("dimm: ");
+                       print_debug_hex8(i);

                        print_debug(".0: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {
                        print_debug(".0: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {


@@ -817,8 +817,8 @@ static void dump_spd_registers(const struct mem_controller *ctrl)
                device = ctrl->channel1[i];
                if (device) {
                        int j;
                device = ctrl->channel1[i];
                if (device) {
                        int j;

-                       print_debug("dimm: "); 
-                       print_debug_hex8(i); 
+                       print_debug("dimm: ");
+                       print_debug_hex8(i);

                        print_debug(".1: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {
                        print_debug(".1: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {


@@ -842,13 +842,13 @@ static void dump_spd_registers(const struct mem_controller *ctrl)
                }
        }
 }
                }
        }
 }

- 
+

 static unsigned int cpuid(unsigned int op)
 {
        unsigned int ret;
        unsigned dummy2,dummy3,dummy4;
 static unsigned int cpuid(unsigned int op)
 {
        unsigned int ret;
        unsigned dummy2,dummy3,dummy4;

-       asm volatile ( 
-               "cpuid" 
+       asm volatile (
+               "cpuid"

                : "=a" (ret), "=b" (dummy2), "=c" (dummy3), "=d" (dummy4)
                : "a" (op)
                );
                : "=a" (ret), "=b" (dummy2), "=c" (dummy3), "=d" (dummy4)
                : "a" (op)
                );


@@ -865,13 +865,13 @@ static int is_cpu_pre_c0(void)
 static void memreset_setup(void)
 {
        if (is_cpu_pre_c0()) {
 static void memreset_setup(void)
 {
        if (is_cpu_pre_c0()) {

-                
+

                outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), 0x0f00  + 0xc0 + 28);
                outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), 0x0f00  + 0xc0 + 28);

-                
+

                outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), 0x0f00  + 0xc0 + 29);
        }
        else {
                outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), 0x0f00  + 0xc0 + 29);
        }
        else {

-                
+

                outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), 0x0f00  + 0xc0 + 29);
        }
 }
                outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), 0x0f00  + 0xc0 + 29);
        }
 }


@@ -879,15 +879,15 @@ static void memreset(int controllers, const struct mem_controller *ctrl)
 {
        if (is_cpu_pre_c0()) {
                udelay(800);
 {
        if (is_cpu_pre_c0()) {
                udelay(800);

-                
+

                outb((0<<7)|(0<<6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), 0x0f00  + 0xc0 + 28);
                udelay(90);
        }
 }
 static unsigned int generate_row(uint8_t node, uint8_t row, uint8_t maxnodes)
 {
                outb((0<<7)|(0<<6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), 0x0f00  + 0xc0 + 28);
                udelay(90);
        }
 }
 static unsigned int generate_row(uint8_t node, uint8_t row, uint8_t maxnodes)
 {

-        
-       uint32_t ret=0x00010101;  
+
+       uint32_t ret=0x00010101;

        static const unsigned int rows_2p[2][2] = {
                { 0x00050101, 0x00010404 },
                { 0x00010404, 0x00050101 }
        static const unsigned int rows_2p[2][2] = {
                { 0x00050101, 0x00010404 },
                { 0x00010404, 0x00050101 }


@@ -905,33 +905,33 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 {
        return smbus_read_byte(device, address);
 }
 {
        return smbus_read_byte(device, address);
 }

- 
+

 static void coherent_ht_mainboard(unsigned cpus)
 {
 }
 static void coherent_ht_mainboard(unsigned cpus)
 {
 }

- 
+

 void cpu_ldtstop(unsigned cpus)
 {
        uint32_t tmp;
        device_t dev;
        unsigned cnt;
        for(cnt=0; cnt<cpus; cnt++) {
 void cpu_ldtstop(unsigned cpus)
 {
        uint32_t tmp;
        device_t dev;
        unsigned cnt;
        for(cnt=0; cnt<cpus; cnt++) {

-                
+

                pci_write_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24 ) & 0x1f) << 11) | ((( 3 )  & 0x7) << 8)) ,0x81,0x23);
                pci_write_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24 ) & 0x1f) << 11) | ((( 3 )  & 0x7) << 8)) ,0x81,0x23);

-                
+

                pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24 ) & 0x1f) << 11) | ((( 3 )  & 0x7) << 8)) ,0xd4,0x00000701);
                pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24 ) & 0x1f) << 11) | ((( 3 )  & 0x7) << 8)) ,0xd4,0x00000701);

-                
+

                pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24 ) & 0x1f) << 11) | ((( 3 )  & 0x7) << 8)) ,0xd8,0x00000000);
                pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24 ) & 0x1f) << 11) | ((( 3 )  & 0x7) << 8)) ,0xd8,0x00000000);

-                
+

                tmp=pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24 ) & 0x1f) << 11) | ((( 2 )  & 0x7) << 8)) ,0x90);
                pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24 ) & 0x1f) << 11) | ((( 2 )  & 0x7) << 8)) ,0x90, tmp | (1<<24) );
        }
 }
                tmp=pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24 ) & 0x1f) << 11) | ((( 2 )  & 0x7) << 8)) ,0x90);
                pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24 ) & 0x1f) << 11) | ((( 2 )  & 0x7) << 8)) ,0x90, tmp | (1<<24) );
        }
 }

- 
- 
- 
- 
- 
+
+
+
+
+

 static void setup_resource_map(const unsigned int *register_values, int max)
 {
        int i;
 static void setup_resource_map(const unsigned int *register_values, int max)
 {
        int i;


@@ -952,8 +952,8 @@ static void setup_resource_map(const unsigned int *register_values, int max)
 static void setup_default_resource_map(void)
 {
        static const unsigned int register_values[] = {
 static void setup_default_resource_map(void)
 {
        static const unsigned int register_values[] = {

-        
-        
+
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x44 ) & 0xFF)) , 0x0000f8f8, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x4C ) & 0xFF)) , 0x0000f8f8, 0x00000001,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x54 ) & 0xFF)) , 0x0000f8f8, 0x00000002,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x44 ) & 0xFF)) , 0x0000f8f8, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x4C ) & 0xFF)) , 0x0000f8f8, 0x00000001,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x54 ) & 0xFF)) , 0x0000f8f8, 0x00000002,


@@ -962,7 +962,7 @@ static void setup_default_resource_map(void)
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x6C ) & 0xFF)) , 0x0000f8f8, 0x00000005,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x74 ) & 0xFF)) , 0x0000f8f8, 0x00000006,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x7C ) & 0xFF)) , 0x0000f8f8, 0x00000007,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x6C ) & 0xFF)) , 0x0000f8f8, 0x00000005,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x74 ) & 0xFF)) , 0x0000f8f8, 0x00000006,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x7C ) & 0xFF)) , 0x0000f8f8, 0x00000007,

-        
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x40 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x48 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x50 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x40 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x48 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x50 ) & 0xFF)) , 0x0000f8fc, 0x00000000,


@@ -971,7 +971,7 @@ static void setup_default_resource_map(void)
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x68 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x70 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x78 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x68 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x70 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x78 ) & 0xFF)) , 0x0000f8fc, 0x00000000,

-        
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x84 ) & 0xFF)) , 0x00000048, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x8C ) & 0xFF)) , 0x00000048, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x94 ) & 0xFF)) , 0x00000048, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x84 ) & 0xFF)) , 0x00000048, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x8C ) & 0xFF)) , 0x00000048, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x94 ) & 0xFF)) , 0x00000048, 0x00000000,


@@ -980,7 +980,7 @@ static void setup_default_resource_map(void)
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xAC ) & 0xFF)) , 0x00000048, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xB4 ) & 0xFF)) , 0x00000048, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xBC ) & 0xFF)) , 0x00000048, 0x00ffff00,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xAC ) & 0xFF)) , 0x00000048, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xB4 ) & 0xFF)) , 0x00000048, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xBC ) & 0xFF)) , 0x00000048, 0x00ffff00,

-        
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x80 ) & 0xFF)) , 0x000000f0, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x88 ) & 0xFF)) , 0x000000f0, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x90 ) & 0xFF)) , 0x000000f0, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x80 ) & 0xFF)) , 0x000000f0, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x88 ) & 0xFF)) , 0x000000f0, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x90 ) & 0xFF)) , 0x000000f0, 0x00000000,


@@ -989,17 +989,17 @@ static void setup_default_resource_map(void)
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xA8 ) & 0xFF)) , 0x000000f0, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xB0 ) & 0xFF)) , 0x000000f0, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xB8 ) & 0xFF)) , 0x000000f0, 0x00fc0003,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xA8 ) & 0xFF)) , 0x000000f0, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xB0 ) & 0xFF)) , 0x000000f0, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xB8 ) & 0xFF)) , 0x000000f0, 0x00fc0003,

-        
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xC4 ) & 0xFF)) , 0xFE000FC8, 0x01fff000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xCC ) & 0xFF)) , 0xFE000FC8, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xD4 ) & 0xFF)) , 0xFE000FC8, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xDC ) & 0xFF)) , 0xFE000FC8, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xC4 ) & 0xFF)) , 0xFE000FC8, 0x01fff000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xCC ) & 0xFF)) , 0xFE000FC8, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xD4 ) & 0xFF)) , 0xFE000FC8, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xDC ) & 0xFF)) , 0xFE000FC8, 0x00000000,

-        
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xC0 ) & 0xFF)) , 0xFE000FCC, 0x00000003,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xC8 ) & 0xFF)) , 0xFE000FCC, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xD0 ) & 0xFF)) , 0xFE000FCC, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xD8 ) & 0xFF)) , 0xFE000FCC, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xC0 ) & 0xFF)) , 0xFE000FCC, 0x00000003,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xC8 ) & 0xFF)) , 0xFE000FCC, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xD0 ) & 0xFF)) , 0xFE000FCC, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xD8 ) & 0xFF)) , 0xFE000FCC, 0x00000000,

-        
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xE0 ) & 0xFF)) , 0x0000FC88, 0xff000003,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xE4 ) & 0xFF)) , 0x0000FC88, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xE8 ) & 0xFF)) , 0x0000FC88, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xE0 ) & 0xFF)) , 0x0000FC88, 0xff000003,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xE4 ) & 0xFF)) , 0x0000FC88, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xE8 ) & 0xFF)) , 0x0000FC88, 0x00000000,


@@ -1012,8 +1012,8 @@ static void setup_default_resource_map(void)
 static void sdram_set_registers(const struct mem_controller *ctrl)
 {
        static const unsigned int register_values[] = {
 static void sdram_set_registers(const struct mem_controller *ctrl)
 {
        static const unsigned int register_values[] = {

-        
-        
+
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x44 ) & 0xFF)) , 0x0000f8f8, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x4C ) & 0xFF)) , 0x0000f8f8, 0x00000001,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x54 ) & 0xFF)) , 0x0000f8f8, 0x00000002,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x44 ) & 0xFF)) , 0x0000f8f8, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x4C ) & 0xFF)) , 0x0000f8f8, 0x00000001,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x54 ) & 0xFF)) , 0x0000f8f8, 0x00000002,


@@ -1022,7 +1022,7 @@ static void sdram_set_registers(const struct mem_controller *ctrl)
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x6C ) & 0xFF)) , 0x0000f8f8, 0x00000005,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x74 ) & 0xFF)) , 0x0000f8f8, 0x00000006,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x7C ) & 0xFF)) , 0x0000f8f8, 0x00000007,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x6C ) & 0xFF)) , 0x0000f8f8, 0x00000005,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x74 ) & 0xFF)) , 0x0000f8f8, 0x00000006,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x7C ) & 0xFF)) , 0x0000f8f8, 0x00000007,

-        
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x40 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x48 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x50 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x40 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x48 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x50 ) & 0xFF)) , 0x0000f8fc, 0x00000000,


@@ -1031,7 +1031,7 @@ static void sdram_set_registers(const struct mem_controller *ctrl)
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x68 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x70 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x78 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x68 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x70 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x78 ) & 0xFF)) , 0x0000f8fc, 0x00000000,

-        
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x40 ) & 0xFF)) , 0x001f01fe, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x44 ) & 0xFF)) , 0x001f01fe, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x48 ) & 0xFF)) , 0x001f01fe, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x40 ) & 0xFF)) , 0x001f01fe, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x44 ) & 0xFF)) , 0x001f01fe, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x48 ) & 0xFF)) , 0x001f01fe, 0x00000000,


@@ -1040,7 +1040,7 @@ static void sdram_set_registers(const struct mem_controller *ctrl)
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x54 ) & 0xFF)) , 0x001f01fe, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x58 ) & 0xFF)) , 0x001f01fe, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x5C ) & 0xFF)) , 0x001f01fe, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x54 ) & 0xFF)) , 0x001f01fe, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x58 ) & 0xFF)) , 0x001f01fe, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x5C ) & 0xFF)) , 0x001f01fe, 0x00000000,

-        
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x60 ) & 0xFF)) , 0xC01f01ff, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x64 ) & 0xFF)) , 0xC01f01ff, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x68 ) & 0xFF)) , 0xC01f01ff, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x60 ) & 0xFF)) , 0xC01f01ff, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x64 ) & 0xFF)) , 0xC01f01ff, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x68 ) & 0xFF)) , 0xC01f01ff, 0x00000000,


@@ -1049,33 +1049,33 @@ static void sdram_set_registers(const struct mem_controller *ctrl)
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x74 ) & 0xFF)) , 0xC01f01ff, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x78 ) & 0xFF)) , 0xC01f01ff, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x7C ) & 0xFF)) , 0xC01f01ff, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x74 ) & 0xFF)) , 0xC01f01ff, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x78 ) & 0xFF)) , 0xC01f01ff, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x7C ) & 0xFF)) , 0xC01f01ff, 0x00000000,

-        
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x80 ) & 0xFF)) , 0xffff8888, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x80 ) & 0xFF)) , 0xffff8888, 0x00000000,

-        
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x88 ) & 0xFF)) , 0xe8088008, 0x02522001   ,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x88 ) & 0xFF)) , 0xe8088008, 0x02522001   ,

-        
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x8c ) & 0xFF)) , 0xff8fe08e, (0 << 20)|(0 << 8)|(0 << 4)|(0 << 0),
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x8c ) & 0xFF)) , 0xff8fe08e, (0 << 20)|(0 << 8)|(0 << 4)|(0 << 0),

-        
-       ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x90 ) & 0xFF)) , 0xf0000000, 
-       (4 << 25)|(0 << 24)| 
-       (0 << 23)|(0 << 22)|(0 << 21)|(0 << 20)| 
-       (1 << 19)|(0 << 18)|(1 << 17)|(0 << 16)| 
-       (2 << 14)|(0 << 13)|(0 << 12)| 
-       (0 << 11)|(0 << 10)|(0 << 9)|(0 << 8)| 
+
+       ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x90 ) & 0xFF)) , 0xf0000000,
+       (4 << 25)|(0 << 24)|
+       (0 << 23)|(0 << 22)|(0 << 21)|(0 << 20)|
+       (1 << 19)|(0 << 18)|(1 << 17)|(0 << 16)|
+       (2 << 14)|(0 << 13)|(0 << 12)|
+       (0 << 11)|(0 << 10)|(0 << 9)|(0 << 8)|

        (0 << 3) |(0 << 1) |(0 << 0),
        (0 << 3) |(0 << 1) |(0 << 0),

-        
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x94 ) & 0xFF)) , 0xc180f0f0,
        (0 << 29)|(0 << 28)|(0 << 27)|(0 << 26)|(0 << 25)|
        (0 << 20)|(0 << 19)|(3  << 16)|(0 << 8)|(0 << 0),
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x94 ) & 0xFF)) , 0xc180f0f0,
        (0 << 29)|(0 << 28)|(0 << 27)|(0 << 26)|(0 << 25)|
        (0 << 20)|(0 << 19)|(3  << 16)|(0 << 8)|(0 << 0),

-        
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x98 ) & 0xFF)) , 0xfc00ffff, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x98 ) & 0xFF)) , 0xfc00ffff, 0x00000000,

-        
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  3 ) & 0x07) << 8) | ((  0x58 ) & 0xFF)) , 0xffe0e0e0, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  3 ) & 0x07) << 8) | ((  0x58 ) & 0xFF)) , 0xffe0e0e0, 0x00000000,

-        
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  3 ) & 0x07) << 8) | ((  0x5C ) & 0xFF)) , 0x0000003e, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  3 ) & 0x07) << 8) | ((  0x5C ) & 0xFF)) , 0x0000003e, 0x00000000,

-        
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  3 ) & 0x07) << 8) | ((  0x60 ) & 0xFF)) , 0xffffff00, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  3 ) & 0x07) << 8) | ((  0x60 ) & 0xFF)) , 0xffffff00, 0x00000000,

-        
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  3 ) & 0x07) << 8) | ((  0x94 ) & 0xFF)) , 0xffff8000, 0x00000f70,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  3 ) & 0x07) << 8) | ((  0x90 ) & 0xFF)) , 0xffffff80, 0x00000002,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  3 ) & 0x07) << 8) | ((  0x98 ) & 0xFF)) , 0x0000000f, 0x00068300,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  3 ) & 0x07) << 8) | ((  0x94 ) & 0xFF)) , 0xffff8000, 0x00000f70,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  3 ) & 0x07) << 8) | ((  0x90 ) & 0xFF)) , 0xffffff80, 0x00000002,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  3 ) & 0x07) << 8) | ((  0x98 ) & 0xFF)) , 0x0000000f, 0x00068300,


@@ -1107,14 +1107,14 @@ static int is_dual_channel(const struct mem_controller *ctrl)
 }
 static int is_opteron(const struct mem_controller *ctrl)
 {
 }
 static int is_opteron(const struct mem_controller *ctrl)
 {

-        
+

        uint32_t nbcap;
        nbcap = pci_read_config32(ctrl->f3, 0xE8 );
        return !!(nbcap & 0x0001 );
 }
 static int is_registered(const struct mem_controller *ctrl)
 {
        uint32_t nbcap;
        nbcap = pci_read_config32(ctrl->f3, 0xE8 );
        return !!(nbcap & 0x0001 );
 }
 static int is_registered(const struct mem_controller *ctrl)
 {

-        
+

        uint32_t dcl;
        dcl = pci_read_config32(ctrl->f2, 0x90 );
        return !(dcl & (1<<18) );
        uint32_t dcl;
        dcl = pci_read_config32(ctrl->f2, 0x90 );
        return !(dcl & (1<<18) );


@@ -1125,45 +1125,45 @@ struct dimm_size {
 };
 static struct dimm_size spd_get_dimm_size(unsigned device)
 {
 };
 static struct dimm_size spd_get_dimm_size(unsigned device)
 {

-        
+

        struct dimm_size sz;
        int value, low;
        sz.side1 = 0;
        sz.side2 = 0;
        struct dimm_size sz;
        int value, low;
        sz.side1 = 0;
        sz.side2 = 0;

-        
-       value = spd_read_byte(device, 3);        
+
+       value = spd_read_byte(device, 3);

        if (value < 0) goto out;
        sz.side1 += value & 0xf;
        if (value < 0) goto out;
        sz.side1 += value & 0xf;

-       value = spd_read_byte(device, 4);        
+       value = spd_read_byte(device, 4);

        if (value < 0) goto out;
        sz.side1 += value & 0xf;
        if (value < 0) goto out;
        sz.side1 += value & 0xf;

-       value = spd_read_byte(device, 17);       
+       value = spd_read_byte(device, 17);

        if (value < 0) goto out;
        sz.side1 += log2(value & 0xff);
        if (value < 0) goto out;
        sz.side1 += log2(value & 0xff);

-        
-       value = spd_read_byte(device, 7);        
+
+       value = spd_read_byte(device, 7);

        if (value < 0) goto out;
        value &= 0xff;
        value <<= 8;
        if (value < 0) goto out;
        value &= 0xff;
        value <<= 8;

-       
-       low = spd_read_byte(device, 6);  
+
+       low = spd_read_byte(device, 6);

        if (low < 0) goto out;
        value = value | (low & 0xff);
        sz.side1 += log2(value);
        if (low < 0) goto out;
        value = value | (low & 0xff);
        sz.side1 += log2(value);

-        
-       value = spd_read_byte(device, 5);        
+
+       value = spd_read_byte(device, 5);

        if (value <= 1) goto out;
        if (value <= 1) goto out;

-        
+

        sz.side2 = sz.side1;
        sz.side2 = sz.side1;

-       value = spd_read_byte(device, 3);        
+       value = spd_read_byte(device, 3);

        if (value < 0) goto out;
        if (value < 0) goto out;

-       if ((value & 0xf0) == 0) goto out;       
-       sz.side2 -= (value & 0x0f);              
-       sz.side2 += ((value >> 4) & 0x0f);       
-       value = spd_read_byte(device, 4);        
+       if ((value & 0xf0) == 0) goto out;
+       sz.side2 -= (value & 0x0f);
+       sz.side2 += ((value >> 4) & 0x0f);
+       value = spd_read_byte(device, 4);

        if (value < 0) goto out;
        if (value < 0) goto out;

-       sz.side2 -= (value & 0x0f);              
-       sz.side2 += ((value >> 4) & 0x0f);       
+       sz.side2 -= (value & 0x0f);
+       sz.side2 += ((value >> 4) & 0x0f);

  out:
        return sz;
 }
  out:
        return sz;
 }


@@ -1176,32 +1176,32 @@ static void set_dimm_size(const struct mem_controller *ctrl, struct dimm_size sz
        }
        map = pci_read_config32(ctrl->f2, 0x80 );
        map &= ~(0xf << (index + 4));
        }
        map = pci_read_config32(ctrl->f2, 0x80 );
        map &= ~(0xf << (index + 4));

-        
-       
+
+

        base0 = base1 = 0;
        base0 = base1 = 0;

-        
+

        if (sz.side1 >= (25 +3)) {
                map |= (sz.side1 - (25 + 3)) << (index *4);
                base0 = (1 << ((sz.side1 - (25 + 3)) + 21)) | 1;
        }
        if (sz.side1 >= (25 +3)) {
                map |= (sz.side1 - (25 + 3)) << (index *4);
                base0 = (1 << ((sz.side1 - (25 + 3)) + 21)) | 1;
        }

-        
+

        if (sz.side2 >= (25 + 3)) {
                base1 = (1 << ((sz.side2 - (25 + 3)) + 21)) | 1;
        }
        if (sz.side2 >= (25 + 3)) {
                base1 = (1 << ((sz.side2 - (25 + 3)) + 21)) | 1;
        }

-        
+

        if (is_dual_channel(ctrl)) {
                base0 = (base0 << 1) | (base0 & 1);
                base1 = (base1 << 1) | (base1 & 1);
        }
        if (is_dual_channel(ctrl)) {
                base0 = (base0 << 1) | (base0 & 1);
                base1 = (base1 << 1) | (base1 & 1);
        }

-        
+

        base0 &= ~0x001ffffe;
        base1 &= ~0x001ffffe;
        base0 &= ~0x001ffffe;
        base1 &= ~0x001ffffe;

-        
+

        pci_write_config32(ctrl->f2, 0x40  + (((index << 1)+0)<<2), base0);
        pci_write_config32(ctrl->f2, 0x40  + (((index << 1)+1)<<2), base1);
        pci_write_config32(ctrl->f2, 0x80 , map);
        pci_write_config32(ctrl->f2, 0x40  + (((index << 1)+0)<<2), base0);
        pci_write_config32(ctrl->f2, 0x40  + (((index << 1)+1)<<2), base1);
        pci_write_config32(ctrl->f2, 0x80 , map);

-       
-        
+
+

        if (base0) {
                dch = pci_read_config32(ctrl->f2, 0x94 );
                dch |= (1 << 26)  << index;
        if (base0) {
                dch = pci_read_config32(ctrl->f2, 0x94 );
                dch |= (1 << 26)  << index;


@@ -1211,7 +1211,7 @@ static void set_dimm_size(const struct mem_controller *ctrl, struct dimm_size sz
 static void spd_set_ram_size(const struct mem_controller *ctrl)
 {
        int i;
 static void spd_set_ram_size(const struct mem_controller *ctrl)
 {
        int i;

-       
+

        for(i = 0; (i < 4) && (ctrl->channel0[i]); i++) {
                struct dimm_size sz;
                sz = spd_get_dimm_size(ctrl->channel0[i]);
        for(i = 0; (i < 4) && (ctrl->channel0[i]); i++) {
                struct dimm_size sz;
                sz = spd_get_dimm_size(ctrl->channel0[i]);


@@ -1221,7 +1221,7 @@ static void spd_set_ram_size(const struct mem_controller *ctrl)
 static void route_dram_accesses(const struct mem_controller *ctrl,
        unsigned long base_k, unsigned long limit_k)
 {
 static void route_dram_accesses(const struct mem_controller *ctrl,
        unsigned long base_k, unsigned long limit_k)
 {

-        
+

        unsigned node_id;
        unsigned limit;
        unsigned base;
        unsigned node_id;
        unsigned limit;
        unsigned base;


@@ -1246,25 +1246,25 @@ static void route_dram_accesses(const struct mem_controller *ctrl,
 }
 static void set_top_mem(unsigned tom_k)
 {
 }
 static void set_top_mem(unsigned tom_k)
 {

-        
+

        if (!tom_k) {
                set_bios_reset();
                print_debug("No memory - reset");
        if (!tom_k) {
                set_bios_reset();
                print_debug("No memory - reset");

-                
+

                pci_write_config8(( ((( 0 ) & 0xFF) << 16) | (((  0x04 ) & 0x1f) << 11) | (((  3 )  & 0x7) << 8)) , 0x41, 0xf1);
                pci_write_config8(( ((( 0 ) & 0xFF) << 16) | (((  0x04 ) & 0x1f) << 11) | (((  3 )  & 0x7) << 8)) , 0x41, 0xf1);

-                
+

                outb(0x0e, 0x0cf9);
        }
                outb(0x0e, 0x0cf9);
        }

-        
+

        print_debug("RAM: 0x");
        print_debug_hex32(tom_k);
        print_debug(" KB\r\n");
        print_debug("RAM: 0x");
        print_debug_hex32(tom_k);
        print_debug(" KB\r\n");

-        
+

        msr_t msr;
        msr.lo = (tom_k & 0x003fffff) << 10;
        msr.hi = (tom_k & 0xffc00000) >> 22;
        wrmsr(0xC001001D , msr);
        msr_t msr;
        msr.lo = (tom_k & 0x003fffff) << 10;
        msr.hi = (tom_k & 0xffc00000) >> 22;
        wrmsr(0xC001001D , msr);

-        
+

        if (tom_k >= 0x003f0000) {
                tom_k = 0x3f0000;
        }
        if (tom_k >= 0x003f0000) {
                tom_k = 0x3f0000;
        }


@@ -1274,15 +1274,15 @@ static void set_top_mem(unsigned tom_k)
 }
 static unsigned long interleave_chip_selects(const struct mem_controller *ctrl)
 {
 }
 static unsigned long interleave_chip_selects(const struct mem_controller *ctrl)
 {

-        
-       static const uint32_t csbase_low[] = { 
+
+       static const uint32_t csbase_low[] = {

                (1 << (13 - 4)),
                (1 << (14 - 4)),
                (1 << (13 - 4)),
                (1 << (14 - 4)),

-               (1 << (14 - 4)), 
+               (1 << (14 - 4)),

                (1 << (15 - 4)),
                (1 << (15 - 4)),
                (1 << (16 - 4)),
                (1 << (15 - 4)),
                (1 << (15 - 4)),
                (1 << (16 - 4)),

-               (1 << (16 - 4)), 
+               (1 << (16 - 4)),

        };
        uint32_t csbase_inc;
        int chip_selects, index;
        };
        uint32_t csbase_inc;
        int chip_selects, index;


@@ -1290,16 +1290,16 @@ static unsigned long interleave_chip_selects(const struct mem_controller *ctrl)
        int dual_channel;
        unsigned common_size;
        uint32_t csbase, csmask;
        int dual_channel;
        unsigned common_size;
        uint32_t csbase, csmask;

-        
+

        chip_selects = 0;
        common_size = 0;
        for(index = 0; index < 8; index++) {
                unsigned size;
                uint32_t value;
        chip_selects = 0;
        common_size = 0;
        for(index = 0; index < 8; index++) {
                unsigned size;
                uint32_t value;

-               
+

                value = pci_read_config32(ctrl->f2, 0x40  + (index << 2));
                value = pci_read_config32(ctrl->f2, 0x40  + (index << 2));

-               
-                
+
+

                if (!(value & 1)) {
                        continue;
                }
                if (!(value & 1)) {
                        continue;
                }


@@ -1308,36 +1308,36 @@ static unsigned long interleave_chip_selects(const struct mem_controller *ctrl)
                if (common_size == 0) {
                        common_size = size;
                }
                if (common_size == 0) {
                        common_size = size;
                }

-                
+

                if (common_size != size) {
                        return 0;
                }
        }
                if (common_size != size) {
                        return 0;
                }
        }

-        
+

        bits = log2(chip_selects);
        if (((1 << bits) != chip_selects) || (bits < 1) || (bits > 3)) {
                return 0;
        bits = log2(chip_selects);
        if (((1 << bits) != chip_selects) || (bits < 1) || (bits > 3)) {
                return 0;

-               
+

        }
        }

-        
+

        if ((bits == 3) && (common_size == (1 << (32 - 3)))) {
                print_debug("8 4GB chip selects cannot be interleaved\r\n");
                return 0;
        }
        if ((bits == 3) && (common_size == (1 << (32 - 3)))) {
                print_debug("8 4GB chip selects cannot be interleaved\r\n");
                return 0;
        }

-        
+

        if (is_dual_channel(ctrl)) {
                csbase_inc = csbase_low[log2(common_size) - 1] << 1;
        } else {
                csbase_inc = csbase_low[log2(common_size)];
        }
        if (is_dual_channel(ctrl)) {
                csbase_inc = csbase_low[log2(common_size) - 1] << 1;
        } else {
                csbase_inc = csbase_low[log2(common_size)];
        }

-        
+

        csbase = 0 | 1;
        csmask = (((common_size  << bits) - 1) << 21);
        csmask |= 0xfe00 & ~((csbase_inc << bits) - csbase_inc);
        for(index = 0; index < 8; index++) {
                uint32_t value;
                value = pci_read_config32(ctrl->f2, 0x40  + (index << 2));
        csbase = 0 | 1;
        csmask = (((common_size  << bits) - 1) << 21);
        csmask |= 0xfe00 & ~((csbase_inc << bits) - csbase_inc);
        for(index = 0; index < 8; index++) {
                uint32_t value;
                value = pci_read_config32(ctrl->f2, 0x40  + (index << 2));

-                
+

                if (!(value & 1)) {
                        continue;
                }
                if (!(value & 1)) {
                        continue;
                }


@@ -1345,19 +1345,19 @@ static unsigned long interleave_chip_selects(const struct mem_controller *ctrl)
                pci_write_config32(ctrl->f2, 0x60  + (index << 2), csmask);
                csbase += csbase_inc;
        }
                pci_write_config32(ctrl->f2, 0x60  + (index << 2), csmask);
                csbase += csbase_inc;
        }

-       
+

        print_debug("Interleaved\r\n");
        print_debug("Interleaved\r\n");

-        
+

        return common_size << (15 + bits);
 }
 static unsigned long order_chip_selects(const struct mem_controller *ctrl)
 {
        unsigned long tom;
        return common_size << (15 + bits);
 }
 static unsigned long order_chip_selects(const struct mem_controller *ctrl)
 {
        unsigned long tom;

-       
-        
+
+

        tom = 0;
        for(;;) {
        tom = 0;
        for(;;) {

-                
+

                unsigned index, canidate;
                uint32_t csbase, csmask;
                unsigned size;
                unsigned index, canidate;
                uint32_t csbase, csmask;
                unsigned size;


@@ -1366,46 +1366,46 @@ static unsigned long order_chip_selects(const struct mem_controller *ctrl)
                for(index = 0; index < 8; index++) {
                        uint32_t value;
                        value = pci_read_config32(ctrl->f2, 0x40  + (index << 2));
                for(index = 0; index < 8; index++) {
                        uint32_t value;
                        value = pci_read_config32(ctrl->f2, 0x40  + (index << 2));

-                        
+

                        if (!(value & 1)) {
                                continue;
                        }
                        if (!(value & 1)) {
                                continue;
                        }

-                       
-                        
+
+

                        if (value <= csbase) {
                                continue;
                        }
                        if (value <= csbase) {
                                continue;
                        }

-                       
-                        
+
+

                        if (tom & (1 << (index + 24))) {
                                continue;
                        }
                        if (tom & (1 << (index + 24))) {
                                continue;
                        }

-                        
+

                        csbase = value;
                        canidate = index;
                }
                        csbase = value;
                        canidate = index;
                }

-                
+

                if (csbase == 0) {
                        break;
                }
                if (csbase == 0) {
                        break;
                }

-                
+

                size = csbase >> 21;
                size = csbase >> 21;

-                
+

                tom |= (1 << (canidate + 24));
                tom |= (1 << (canidate + 24));

-                
+

                csbase = (tom << 21) | 1;
                csbase = (tom << 21) | 1;

-                
+

                tom += size;
                tom += size;

-                
+

                csmask = ((size -1) << 21);
                csmask = ((size -1) << 21);

-               csmask |= 0xfe00;                
-                
+               csmask |= 0xfe00;
+

                pci_write_config32(ctrl->f2, 0x40  + (canidate << 2), csbase);
                pci_write_config32(ctrl->f2, 0x40  + (canidate << 2), csbase);

-                
+

                pci_write_config32(ctrl->f2, 0x60  + (canidate << 2), csmask);
                pci_write_config32(ctrl->f2, 0x60  + (canidate << 2), csmask);

-               
+

        }
        }

-        
+

        return (tom & ~0xff000000) << 15;
 }
 static void order_dimms(const struct mem_controller *ctrl)
        return (tom & ~0xff000000) << 15;
 }
 static void order_dimms(const struct mem_controller *ctrl)


@@ -1416,14 +1416,14 @@ static void order_dimms(const struct mem_controller *ctrl)
        if (!tom_k) {
                tom_k = order_chip_selects(ctrl);
        }
        if (!tom_k) {
                tom_k = order_chip_selects(ctrl);
        }

-        
+

        base_k = 0;
        for(node_id = 0; node_id < ctrl->node_id; node_id++) {
                uint32_t limit, base;
                unsigned index;
                index = node_id << 3;
                base = pci_read_config32(ctrl->f1, 0x40 + index);
        base_k = 0;
        for(node_id = 0; node_id < ctrl->node_id; node_id++) {
                uint32_t limit, base;
                unsigned index;
                index = node_id << 3;
                base = pci_read_config32(ctrl->f1, 0x40 + index);

-                
+

                if ((base & 3) == 3) {
                        limit = pci_read_config32(ctrl->f1, 0x44 + index);
                        base_k = ((limit + 0x00010000) & 0xffff0000) >> 2;
                if ((base & 3) == 3) {
                        limit = pci_read_config32(ctrl->f1, 0x44 + index);
                        base_k = ((limit + 0x00010000) & 0xffff0000) >> 2;


@@ -1435,8 +1435,8 @@ static void order_dimms(const struct mem_controller *ctrl)
 }
 static void disable_dimm(const struct mem_controller *ctrl, unsigned index)
 {
 }
 static void disable_dimm(const struct mem_controller *ctrl, unsigned index)
 {

-       print_debug("disabling dimm"); 
-       print_debug_hex8(index); 
+       print_debug("disabling dimm");
+       print_debug_hex8(index);

        print_debug("\r\n");
        pci_write_config32(ctrl->f2, 0x40  + (((index << 1)+0)<<2), 0);
        pci_write_config32(ctrl->f2, 0x40  + (((index << 1)+1)<<2), 0);
        print_debug("\r\n");
        pci_write_config32(ctrl->f2, 0x40  + (((index << 1)+0)<<2), 0);
        pci_write_config32(ctrl->f2, 0x40  + (((index << 1)+1)<<2), 0);


@@ -1456,11 +1456,11 @@ static void spd_handle_unbuffered_dimms(const struct mem_controller *ctrl)
                        disable_dimm(ctrl, i);
                        continue;
                }
                        disable_dimm(ctrl, i);
                        continue;
                }

-                
+

                if (value & (1 << 1)) {
                        registered = 1;
                if (value & (1 << 1)) {
                        registered = 1;

-               } 
-                
+               }
+

                else {
                        unbuffered = 1;
                }
                else {
                        unbuffered = 1;
                }


@@ -1482,29 +1482,29 @@ static void spd_enable_2channels(const struct mem_controller *ctrl)
 {
        int i;
        uint32_t nbcap;
 {
        int i;
        uint32_t nbcap;

-        
-        
+
+

        static const unsigned addresses[] = {
        static const unsigned addresses[] = {

-               2,       
-               3,       
-               4,       
-               5,       
-               6,       
-               7,       
-               9,       
-               11,      
-               13,      
-               17,      
-               18,      
-               21,      
-               23,      
-               26,      
-               27,      
-               28,      
-               29,      
-               30,      
-               41,      
-               42,      
+               2,
+               3,
+               4,
+               5,
+               6,
+               7,
+               9,
+               11,
+               13,
+               17,
+               18,
+               21,
+               23,
+               26,
+               27,
+               28,
+               29,
+               30,
+               41,
+               42,

        };
        nbcap = pci_read_config32(ctrl->f3, 0xE8 );
        if (!(nbcap & 0x0001 )) {
        };
        nbcap = pci_read_config32(ctrl->f3, 0xE8 );
        if (!(nbcap & 0x0001 )) {


@@ -1543,7 +1543,7 @@ static void spd_enable_2channels(const struct mem_controller *ctrl)
 }
 struct mem_param {
        uint8_t cycle_time;
 }
 struct mem_param {
        uint8_t cycle_time;

-       uint8_t divisor;  
+       uint8_t divisor;

        uint8_t tRC;
        uint8_t tRFC;
        uint32_t dch_memclk;
        uint8_t tRC;
        uint8_t tRFC;
        uint32_t dch_memclk;


@@ -1616,35 +1616,35 @@ static const struct mem_param *get_mem_param(unsigned min_cycle_time)
 }
 static const struct mem_param *spd_set_memclk(const struct mem_controller *ctrl)
 {
 }
 static const struct mem_param *spd_set_memclk(const struct mem_controller *ctrl)
 {

-        
+

        const struct mem_param *param;
        unsigned min_cycle_time, min_latency;
        int i;
        uint32_t value;
        static const int latency_indicies[] = { 26, 23, 9 };
        static const unsigned char min_cycle_times[] = {
        const struct mem_param *param;
        unsigned min_cycle_time, min_latency;
        int i;
        uint32_t value;
        static const int latency_indicies[] = { 26, 23, 9 };
        static const unsigned char min_cycle_times[] = {

-               [0 ] = 0x50,  
-               [1 ] = 0x60,  
-               [2 ] = 0x75,  
-               [3 ] = 0xa0,  
+               [0 ] = 0x50,
+               [1 ] = 0x60,
+               [2 ] = 0x75,
+               [3 ] = 0xa0,

        };
        value = pci_read_config32(ctrl->f3, 0xE8 );
        min_cycle_time = min_cycle_times[(value >> 5 ) & 3 ];
        min_latency = 2;
        };
        value = pci_read_config32(ctrl->f3, 0xE8 );
        min_cycle_time = min_cycle_times[(value >> 5 ) & 3 ];
        min_latency = 2;

-        
+

        for(i = 0; (i < 4) && (ctrl->channel0[i]); i++) {
                int new_cycle_time, new_latency;
                int index;
                int latencies;
                int latency;
        for(i = 0; (i < 4) && (ctrl->channel0[i]); i++) {
                int new_cycle_time, new_latency;
                int index;
                int latencies;
                int latency;

-                
+

                new_cycle_time = 0xa0;
                new_latency = 5;
                latencies = spd_read_byte(ctrl->channel0[i], 18);
                if (latencies <= 0) continue;
                new_cycle_time = 0xa0;
                new_latency = 5;
                latencies = spd_read_byte(ctrl->channel0[i], 18);
                if (latencies <= 0) continue;

-                
+

                latency = log2(latencies) -2;
                latency = log2(latencies) -2;

-                
+

                for(index = 0; index < 3; index++, latency++) {
                        int value;
                        if ((latency < 2) || (latency > 4) ||
                for(index = 0; index < 3; index++, latency++) {
                        int value;
                        if ((latency < 2) || (latency > 4) ||


@@ -1655,7 +1655,7 @@ static const struct mem_param *spd_set_memclk(const struct mem_controller *ctrl)
                        if (value < 0) {
                                continue;
                        }
                        if (value < 0) {
                                continue;
                        }

-                        
+

                        if ((value >= min_cycle_time) && (value < new_cycle_time)) {
                                new_cycle_time = value;
                                new_latency = latency;
                        if ((value >= min_cycle_time) && (value < new_cycle_time)) {
                                new_cycle_time = value;
                                new_latency = latency;


@@ -1664,17 +1664,17 @@ static const struct mem_param *spd_set_memclk(const struct mem_controller *ctrl)
                if (new_latency > 4){
                        continue;
                }
                if (new_latency > 4){
                        continue;
                }

-                
+

                if (new_cycle_time > min_cycle_time) {
                        min_cycle_time = new_cycle_time;
                }
                if (new_cycle_time > min_cycle_time) {
                        min_cycle_time = new_cycle_time;
                }

-                
+

                if (new_latency > min_latency) {
                        min_latency = new_latency;
                }
        }
                if (new_latency > min_latency) {
                        min_latency = new_latency;
                }
        }

-        
-       
+
+

        for(i = 0; (i < 4) && (ctrl->channel0[i]); i++) {
                int latencies;
                int latency;
        for(i = 0; (i < 4) && (ctrl->channel0[i]); i++) {
                int latencies;
                int latency;


@@ -1685,9 +1685,9 @@ static const struct mem_param *spd_set_memclk(const struct mem_controller *ctrl)
                if (latencies <= 0) {
                        goto dimm_err;
                }
                if (latencies <= 0) {
                        goto dimm_err;
                }

-                
+

                latency = log2(latencies) -2;
                latency = log2(latencies) -2;

-                
+

                for(index = 0; index < 3; index++, latency++) {
                        if (!(latencies & (1 << latency))) {
                                continue;
                for(index = 0; index < 3; index++, latency++) {
                        if (!(latencies & (1 << latency))) {
                                continue;


@@ -1695,36 +1695,36 @@ static const struct mem_param *spd_set_memclk(const struct mem_controller *ctrl)
                        if (latency == min_latency)
                                break;
                }
                        if (latency == min_latency)
                                break;
                }

-                
+

                if ((latency != min_latency) || (index >= 3)) {
                        goto dimm_err;
                }
                if ((latency != min_latency) || (index >= 3)) {
                        goto dimm_err;
                }

-               
-                
+
+

                value = spd_read_byte(ctrl->channel0[i], latency_indicies[index]);
                value = spd_read_byte(ctrl->channel0[i], latency_indicies[index]);

-               
-                
+
+

                if (value <= min_cycle_time) {
                        continue;
                }
                if (value <= min_cycle_time) {
                        continue;
                }

-                
+

        dimm_err:
                disable_dimm(ctrl, i);
        }
        dimm_err:
                disable_dimm(ctrl, i);
        }

-        
+

        param = get_mem_param(min_cycle_time);
        param = get_mem_param(min_cycle_time);

-        
+

        value = pci_read_config32(ctrl->f2, 0x94 );
        value &= ~(0x7  << 20 );
        value |= param->dch_memclk;
        pci_write_config32(ctrl->f2, 0x94 , value);
        static const unsigned latencies[] = { 1 , 5 , 2  };
        value = pci_read_config32(ctrl->f2, 0x94 );
        value &= ~(0x7  << 20 );
        value |= param->dch_memclk;
        pci_write_config32(ctrl->f2, 0x94 , value);
        static const unsigned latencies[] = { 1 , 5 , 2  };

-        
+

        value = pci_read_config32(ctrl->f2, 0x88 );
        value &= ~(0x7  << 0 );
        value |= latencies[min_latency - 2] << 0 ;
        pci_write_config32(ctrl->f2, 0x88 , value);
        value = pci_read_config32(ctrl->f2, 0x88 );
        value &= ~(0x7  << 0 );
        value |= latencies[min_latency - 2] << 0 ;
        pci_write_config32(ctrl->f2, 0x88 , value);

-       
+

        return param;
 }
 static int update_dimm_Trc(const struct mem_controller *ctrl, const struct mem_param *param, int i)
        return param;
 }
 static int update_dimm_Trc(const struct mem_controller *ctrl, const struct mem_param *param, int i)


@@ -1969,7 +1969,7 @@ static void set_Twtr(const struct mem_controller *ctrl, const struct mem_param *
 {
        uint32_t dth;
        unsigned clocks;
 {
        uint32_t dth;
        unsigned clocks;

-       clocks = 1;  
+       clocks = 1;

        dth = pci_read_config32(ctrl->f2, 0x8c );
        dth &= ~(0x1  << 0 );
        dth |= ((clocks - 1 ) << 0 );
        dth = pci_read_config32(ctrl->f2, 0x8c );
        dth &= ~(0x1  << 0 );
        dth |= ((clocks - 1 ) << 0 );


@@ -1988,11 +1988,11 @@ static void set_Trwt(const struct mem_controller *ctrl, const struct mem_param *
        if (is_opteron(ctrl)) {
                if (latency == 1 ) {
                        if (divisor == ((6 << 0) + 0)) {
        if (is_opteron(ctrl)) {
                if (latency == 1 ) {
                        if (divisor == ((6 << 0) + 0)) {

-                                
+

                                clocks = 3;
                        }
                        else if (divisor > ((6 << 0)+0)) {
                                clocks = 3;
                        }
                        else if (divisor > ((6 << 0)+0)) {

-                                
+

                                clocks = 2;
                        }
                }
                                clocks = 2;
                        }
                }


@@ -2001,11 +2001,11 @@ static void set_Trwt(const struct mem_controller *ctrl, const struct mem_param *
                }
                else if (latency == 2 ) {
                        if (divisor == ((6 << 0)+0)) {
                }
                else if (latency == 2 ) {
                        if (divisor == ((6 << 0)+0)) {

-                                
+

                                clocks = 4;
                        }
                        else if (divisor > ((6 << 0)+0)) {
                                clocks = 4;
                        }
                        else if (divisor > ((6 << 0)+0)) {

-                                
+

                                clocks = 3;
                        }
                }
                                clocks = 3;
                        }
                }


@@ -2037,7 +2037,7 @@ static void set_Trwt(const struct mem_controller *ctrl, const struct mem_param *
        if ((clocks < 1 ) || (clocks > 6 )) {
                die("Unknown Trwt");
        }
        if ((clocks < 1 ) || (clocks > 6 )) {
                die("Unknown Trwt");
        }

-       
+

        dth = pci_read_config32(ctrl->f2, 0x8c );
        dth &= ~(0x7  << 4 );
        dth |= ((clocks - 1 ) << 4 );
        dth = pci_read_config32(ctrl->f2, 0x8c );
        dth &= ~(0x7  << 4 );
        dth |= ((clocks - 1 ) << 4 );


@@ -2046,7 +2046,7 @@ static void set_Trwt(const struct mem_controller *ctrl, const struct mem_param *
 }
 static void set_Twcl(const struct mem_controller *ctrl, const struct mem_param *param)
 {
 }
 static void set_Twcl(const struct mem_controller *ctrl, const struct mem_param *param)
 {

-        
+

        uint32_t dth;
        unsigned clocks;
        if (is_registered(ctrl)) {
        uint32_t dth;
        unsigned clocks;
        if (is_registered(ctrl)) {


@@ -2070,19 +2070,19 @@ static void set_read_preamble(const struct mem_controller *ctrl, const struct me
        rdpreamble = 0;
        if (is_registered(ctrl)) {
                if (divisor == ((10 << 1)+0)) {
        rdpreamble = 0;
        if (is_registered(ctrl)) {
                if (divisor == ((10 << 1)+0)) {

-                        
+

                        rdpreamble = ((9 << 1)+ 0);
                }
                else if (divisor == ((7 << 1)+1)) {
                        rdpreamble = ((9 << 1)+ 0);
                }
                else if (divisor == ((7 << 1)+1)) {

-                        
+

                        rdpreamble = ((8 << 1)+0);
                }
                else if (divisor == ((6 << 1)+0)) {
                        rdpreamble = ((8 << 1)+0);
                }
                else if (divisor == ((6 << 1)+0)) {

-                        
+

                        rdpreamble = ((7 << 1)+1);
                }
                else if (divisor == ((5 << 1)+0)) {
                        rdpreamble = ((7 << 1)+1);
                }
                else if (divisor == ((5 << 1)+0)) {

-                        
+

                        rdpreamble = ((7 << 1)+0);
                }
        }
                        rdpreamble = ((7 << 1)+0);
                }
        }


@@ -2096,42 +2096,42 @@ static void set_read_preamble(const struct mem_controller *ctrl, const struct me
                        }
                }
                if (divisor == ((10 << 1)+0)) {
                        }
                }
                if (divisor == ((10 << 1)+0)) {

-                        
+

                        if (slots <= 2) {
                        if (slots <= 2) {

-                                
+

                                rdpreamble = ((9 << 1)+0);
                        } else {
                                rdpreamble = ((9 << 1)+0);
                        } else {

-                                
+

                                rdpreamble = ((14 << 1)+0);
                        }
                }
                else if (divisor == ((7 << 1)+1)) {
                                rdpreamble = ((14 << 1)+0);
                        }
                }
                else if (divisor == ((7 << 1)+1)) {

-                        
+

                        if (slots <= 2) {
                        if (slots <= 2) {

-                                
+

                                rdpreamble = ((7 << 1)+0);
                        } else {
                                rdpreamble = ((7 << 1)+0);
                        } else {

-                                
+

                                rdpreamble = ((11 << 1)+0);
                        }
                }
                else if (divisor == ((6 << 1)+0)) {
                                rdpreamble = ((11 << 1)+0);
                        }
                }
                else if (divisor == ((6 << 1)+0)) {

-                        
+

                        if (slots <= 2) {
                        if (slots <= 2) {

-                                
+

                                rdpreamble = ((7 << 1)+0);
                        } else {
                                rdpreamble = ((7 << 1)+0);
                        } else {

-                                
+

                                rdpreamble = ((9 << 1)+0);
                        }
                }
                else if (divisor == ((5 << 1)+0)) {
                                rdpreamble = ((9 << 1)+0);
                        }
                }
                else if (divisor == ((5 << 1)+0)) {

-                        
+

                        if (slots <= 2) {
                        if (slots <= 2) {

-                                
+

                                rdpreamble = ((5 << 1)+0);
                        } else {
                                rdpreamble = ((5 << 1)+0);
                        } else {

-                                
+

                                rdpreamble = ((7 << 1)+0);
                        }
                }
                                rdpreamble = ((7 << 1)+0);
                        }
                }


@@ -2154,11 +2154,11 @@ static void set_max_async_latency(const struct mem_controller *ctrl, const struc
        async_lat = 0;
        if (is_registered(ctrl)) {
                if (dimms == 4) {
        async_lat = 0;
        if (is_registered(ctrl)) {
                if (dimms == 4) {

-                        
+

                        async_lat = 9;
                        async_lat = 9;

-               } 
+               }

                else {
                else {

-                        
+

                        async_lat = 8;
                }
        }
                        async_lat = 8;
                }
        }


@@ -2167,11 +2167,11 @@ static void set_max_async_latency(const struct mem_controller *ctrl, const struc
                        die("Too many unbuffered dimms");
                }
                else if (dimms == 3) {
                        die("Too many unbuffered dimms");
                }
                else if (dimms == 3) {

-                        
+

                        async_lat = 7;
                }
                else {
                        async_lat = 7;
                }
                else {

-                        
+

                        async_lat = 6;
                }
        }
                        async_lat = 6;
                }
        }


@@ -2181,7 +2181,7 @@ static void set_max_async_latency(const struct mem_controller *ctrl, const struc
 static void set_idle_cycle_limit(const struct mem_controller *ctrl, const struct mem_param *param)
 {
        uint32_t dch;
 static void set_idle_cycle_limit(const struct mem_controller *ctrl, const struct mem_param *param)
 {
        uint32_t dch;

-        
+

        dch = pci_read_config32(ctrl->f2, 0x94 );
        dch &= ~(0x7  << 16 );
        dch |= 3  << 16 ;
        dch = pci_read_config32(ctrl->f2, 0x94 );
        dch &= ~(0x7  << 16 );
        dch |= 3  << 16 ;


@@ -2193,39 +2193,39 @@ static void spd_set_dram_timing(const struct mem_controller *ctrl, const struct
        int dimms;
        int i;
        int rc;
        int dimms;
        int i;
        int rc;

-       
+

        init_Tref(ctrl, param);
        for(i = 0; (i < 4) && ctrl->channel0[i]; i++) {
                int rc;
        init_Tref(ctrl, param);
        for(i = 0; (i < 4) && ctrl->channel0[i]; i++) {
                int rc;

-                
+

                if (update_dimm_Trc (ctrl, param, i) < 0) goto dimm_err;
                if (update_dimm_Trfc(ctrl, param, i) < 0) goto dimm_err;
                if (update_dimm_Trcd(ctrl, param, i) < 0) goto dimm_err;
                if (update_dimm_Trrd(ctrl, param, i) < 0) goto dimm_err;
                if (update_dimm_Tras(ctrl, param, i) < 0) goto dimm_err;
                if (update_dimm_Trp (ctrl, param, i) < 0) goto dimm_err;
                if (update_dimm_Trc (ctrl, param, i) < 0) goto dimm_err;
                if (update_dimm_Trfc(ctrl, param, i) < 0) goto dimm_err;
                if (update_dimm_Trcd(ctrl, param, i) < 0) goto dimm_err;
                if (update_dimm_Trrd(ctrl, param, i) < 0) goto dimm_err;
                if (update_dimm_Tras(ctrl, param, i) < 0) goto dimm_err;
                if (update_dimm_Trp (ctrl, param, i) < 0) goto dimm_err;

-                
+

                if (update_dimm_Tref(ctrl, param, i) < 0) goto dimm_err;
                if (update_dimm_Tref(ctrl, param, i) < 0) goto dimm_err;

-                
+

                if (update_dimm_x4 (ctrl, param, i) < 0) goto dimm_err;
                if (update_dimm_ecc(ctrl, param, i) < 0) goto dimm_err;
                continue;
        dimm_err:
                disable_dimm(ctrl, i);
                if (update_dimm_x4 (ctrl, param, i) < 0) goto dimm_err;
                if (update_dimm_ecc(ctrl, param, i) < 0) goto dimm_err;
                continue;
        dimm_err:
                disable_dimm(ctrl, i);

-               
+

        }
        }

-        
+

        set_Twr(ctrl, param);
        set_Twr(ctrl, param);

-        
+

        set_Twtr(ctrl, param);
        set_Trwt(ctrl, param);
        set_Twcl(ctrl, param);
        set_Twtr(ctrl, param);
        set_Trwt(ctrl, param);
        set_Twcl(ctrl, param);

-        
+

        set_read_preamble(ctrl, param);
        set_max_async_latency(ctrl, param);
        set_idle_cycle_limit(ctrl, param);
 }
        set_read_preamble(ctrl, param);
        set_max_async_latency(ctrl, param);
        set_idle_cycle_limit(ctrl, param);
 }

-static void sdram_set_spd_registers(const struct mem_controller *ctrl) 
+static void sdram_set_spd_registers(const struct mem_controller *ctrl)

 {
        const struct mem_param *param;
        spd_enable_2channels(ctrl);
 {
        const struct mem_param *param;
        spd_enable_2channels(ctrl);


@@ -2238,18 +2238,18 @@ static void sdram_set_spd_registers(const struct mem_controller *ctrl)
 static void sdram_enable(int controllers, const struct mem_controller *ctrl)
 {
        int i;
 static void sdram_enable(int controllers, const struct mem_controller *ctrl)
 {
        int i;

-        
+

        for(i = 0; i < controllers; i++) {
                uint32_t dch;
                dch = pci_read_config32(ctrl[i].f2, 0x94 );
                dch |= (1 << 25) ;
                pci_write_config32(ctrl[i].f2, 0x94 , dch);
        }
        for(i = 0; i < controllers; i++) {
                uint32_t dch;
                dch = pci_read_config32(ctrl[i].f2, 0x94 );
                dch |= (1 << 25) ;
                pci_write_config32(ctrl[i].f2, 0x94 , dch);
        }

-        
+

        memreset(controllers, ctrl);
        for(i = 0; i < controllers; i++) {
                uint32_t dcl;
        memreset(controllers, ctrl);
        for(i = 0; i < controllers; i++) {
                uint32_t dcl;

-                
+

                dcl = pci_read_config32(ctrl[i].f2, 0x90 );
                if (dcl & (1<<17) ) {
                        uint32_t mnc;
                dcl = pci_read_config32(ctrl[i].f2, 0x90 );
                if (dcl & (1<<17) ) {
                        uint32_t mnc;


@@ -2289,7 +2289,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
                if (dcl & (1<<17) ) {
                        print_debug("Clearing memory: ");
                        if (!is_cpu_pre_c0()) {
                if (dcl & (1<<17) ) {
                        print_debug("Clearing memory: ");
                        if (!is_cpu_pre_c0()) {

-                                
+

                                dcl &= ~((1<<11)  | (1<<10) );
                                pci_write_config32(ctrl[i].f2, 0x90 , dcl);
                                do {
                                dcl &= ~((1<<11)  | (1<<10) );
                                pci_write_config32(ctrl[i].f2, 0x90 , dcl);
                                do {


@@ -2299,10 +2299,10 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
                        uint32_t base, last_scrub_k, scrub_k;
                        uint32_t cnt,zstart,zend;
                        msr_t msr,msr_201;
                        uint32_t base, last_scrub_k, scrub_k;
                        uint32_t cnt,zstart,zend;
                        msr_t msr,msr_201;

-                        
+

                        pci_write_config32(ctrl[i].f3, 0x58 ,
                                (0  << 16) | (0  << 8) | (0  << 0));
                        pci_write_config32(ctrl[i].f3, 0x58 ,
                                (0  << 16) | (0  << 8) | (0  << 0));

-                        
+

                        msr_201 = rdmsr(0x201);
                        zstart = pci_read_config32(ctrl[0].f1, 0x40 + (i*8));
                        zend = pci_read_config32(ctrl[0].f1, 0x44 + (i*8));
                        msr_201 = rdmsr(0x201);
                        zstart = pci_read_config32(ctrl[0].f1, 0x40 + (i*8));
                        zend = pci_read_config32(ctrl[0].f1, 0x44 + (i*8));


@@ -2313,50 +2313,50 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
                        print_debug("-");
                        print_debug_hex32(zend);
                        print_debug("\r\n");
                        print_debug("-");
                        print_debug_hex32(zend);
                        print_debug("\r\n");

-                       
-                        
+
+

                        msr = rdmsr(0x2ff );
                        msr.lo &= ~(1<<10);
                        wrmsr(0x2ff , msr);
                        msr = rdmsr(0x2ff );
                        msr.lo &= ~(1<<10);
                        wrmsr(0x2ff , msr);

-                        
+

                        msr = rdmsr(0xc0010015);
                        msr.lo |= (1<<17);
                        wrmsr(0xc0010015,msr);
                        for(;zstart<zend;zstart+=4) {
                        msr = rdmsr(0xc0010015);
                        msr.lo |= (1<<17);
                        wrmsr(0xc0010015,msr);
                        for(;zstart<zend;zstart+=4) {

-                                
+

                                if(zstart == 0x0fc)
                                        continue;
                                if(zstart == 0x0fc)
                                        continue;

-                               
-                                
+
+

                                __asm__ volatile(
                                        "movl  %%cr0, %0\n\t"
                                        "orl  $0x40000000, %0\n\t"
                                        "movl  %0, %%cr0\n\t"
                                        :"=r" (cnt)
                                        );
                                __asm__ volatile(
                                        "movl  %%cr0, %0\n\t"
                                        "orl  $0x40000000, %0\n\t"
                                        "movl  %0, %%cr0\n\t"
                                        :"=r" (cnt)
                                        );

-                               
-                                
+
+

                                msr.lo = 1 + ((zstart&0x0ff)<<24);
                                msr.hi = (zstart&0x0ff00)>>8;
                                wrmsr(0x200,msr);
                                msr.lo = 1 + ((zstart&0x0ff)<<24);
                                msr.hi = (zstart&0x0ff00)>>8;
                                wrmsr(0x200,msr);

-                                
+

                                msr.hi = 0x000000ff;
                                msr.lo = 0xfc000800;
                                wrmsr(0x201,msr);
                                msr.hi = 0x000000ff;
                                msr.lo = 0xfc000800;
                                wrmsr(0x201,msr);

-                                
+

                                __asm__ volatile(
                                        "movl  %%cr0, %0\n\t"
                                        "andl  $0x9fffffff, %0\n\t"
                                __asm__ volatile(
                                        "movl  %%cr0, %0\n\t"
                                        "andl  $0x9fffffff, %0\n\t"

-                                       "movl  %0, %%cr0\n\t"   
-                                       :"=r" (cnt)     
+                                       "movl  %0, %%cr0\n\t"
+                                       :"=r" (cnt)

                                        );
                                        );

-                                
+

                                msr.lo = (zstart&0xff) << 24;
                                msr.hi = (zstart&0xff00) >> 8;
                                wrmsr(0xc0000100,msr);
                                msr.lo = (zstart&0xff) << 24;
                                msr.hi = (zstart&0xff00) >> 8;
                                wrmsr(0xc0000100,msr);

-                               print_debug_char((zstart > 0x0ff)?'+':'-');     
-                                       
-                                
+                               print_debug_char((zstart > 0x0ff)?'+':'-');
+
+

                                __asm__ volatile(
                                        "1: \n\t"
                                        "movl %0, %%fs:(%1)\n\t"
                                __asm__ volatile(
                                        "1: \n\t"
                                        "movl %0, %%fs:(%1)\n\t"


@@ -2365,67 +2365,67 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
                                        "jnz 1b\n\t"
                                        :
                                        : "a" (0), "D" (0), "c" (0x01000000)
                                        "jnz 1b\n\t"
                                        :
                                        : "a" (0), "D" (0), "c" (0x01000000)

-                                       );                      
+                                       );

                        }
                        }

-                       
-                        
+
+

                        __asm__ volatile(
                                "movl  %%cr0, %0\n\t"
                                "orl  $0x40000000, %0\n\t"
                                "movl  %0, %%cr0\n\t"
                        __asm__ volatile(
                                "movl  %%cr0, %0\n\t"
                                "orl  $0x40000000, %0\n\t"
                                "movl  %0, %%cr0\n\t"

-                               :"=r" (cnt)     
+                               :"=r" (cnt)

                                );
                                );

-               
-                               
+
+

                        msr = rdmsr(0x2ff );
                        msr.lo |= 0x0400;
                        wrmsr(0x2ff , msr);
                        msr = rdmsr(0x2ff );
                        msr.lo |= 0x0400;
                        wrmsr(0x2ff , msr);

-                        
+

                        msr.lo = 6;
                        msr.hi = 0;
                        wrmsr(0x200,msr);
                        wrmsr(0x201,msr_201);
                        msr.lo = 6;
                        msr.hi = 0;
                        wrmsr(0x200,msr);
                        wrmsr(0x201,msr_201);

-                        
+

                        msr.lo = 0;
                        msr.hi = 0;
                        wrmsr(0xc0000100,msr);
                        msr.lo = 0;
                        msr.hi = 0;
                        wrmsr(0xc0000100,msr);

-                        
+

                        __asm__ volatile(
                                "movl  %%cr0, %0\n\t"
                                "andl  $0x9fffffff, %0\n\t"
                        __asm__ volatile(
                                "movl  %%cr0, %0\n\t"
                                "andl  $0x9fffffff, %0\n\t"

-                               "movl  %0, %%cr0\n\t"   
-                               :"=r" (cnt)     
+                               "movl  %0, %%cr0\n\t"
+                               :"=r" (cnt)

                                );
                                );

-                       
-                        
+
+

                        msr = rdmsr(0xc0010015);
                        msr.lo &= ~(1<<17);
                        wrmsr(0xc0010015,msr);
                        msr = rdmsr(0xc0010015);
                        msr.lo &= ~(1<<17);
                        wrmsr(0xc0010015,msr);

-                        
+

                        base = pci_read_config32(ctrl[i].f1, 0x40 + (ctrl[i].node_id << 3));
                        base &= 0xffff0000;
                        base = pci_read_config32(ctrl[i].f1, 0x40 + (ctrl[i].node_id << 3));
                        base &= 0xffff0000;

-                        
+

                        pci_write_config32(ctrl[i].f3, 0x5C , base << 8);
                        pci_write_config32(ctrl[i].f3, 0x60 , base >> 24);
                        pci_write_config32(ctrl[i].f3, 0x5C , base << 8);
                        pci_write_config32(ctrl[i].f3, 0x60 , base >> 24);

-                        
-                       pci_write_config32(ctrl[i].f3, 0x58 , 
+
+                       pci_write_config32(ctrl[i].f3, 0x58 ,

                                (22  << 16) | (22  << 8) | (22  << 0));
                        print_debug("done\r\n");
                }
        }
 }
                                (22  << 16) | (22  << 8) | (22  << 0));
                        print_debug("done\r\n");
                }
        }
 }

- 
- 
- 
- 
- 
+
+
+
+
+

 typedef uint8_t u8;
 typedef uint32_t u32;
 typedef int8_t bool;
 static void disable_probes(void)
 {
 typedef uint8_t u8;
 typedef uint32_t u32;
 typedef int8_t bool;
 static void disable_probes(void)
 {

-        
-        
+
+

        u32 val;
        print_debug("Disabling read/write/fill probes for UP... ");
        val=pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ 0  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x68);
        u32 val;
        print_debug("Disabling read/write/fill probes for UP... ");
        val=pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ 0  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x68);


@@ -2433,8 +2433,8 @@ static void disable_probes(void)
        pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ 0  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x68, val);
        print_debug("done.\r\n");
 }
        pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ 0  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x68, val);
        print_debug("done.\r\n");
 }

- 
-static void wait_ap_stop(u8 node) 
+
+static void wait_ap_stop(u8 node)

 {
        unsigned long reg;
        unsigned long i;
 {
        unsigned long reg;
        unsigned long i;


@@ -2444,7 +2444,7 @@ static void wait_ap_stop(u8 node)
                if((regx & (1<<4))==1) break;
         }
        reg = pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  ,0x6c);
                if((regx & (1<<4))==1) break;
         }
        reg = pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  ,0x6c);

-        reg &= ~(1<<4);   
+        reg &= ~(1<<4);

         pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x6c, reg);
 }
 static void notify_bsp_ap_is_stopped(void)
         pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x6c, reg);
 }
 static void notify_bsp_ap_is_stopped(void)


@@ -2453,31 +2453,31 @@ static void notify_bsp_ap_is_stopped(void)
        unsigned long apic_id;
         apic_id = *((volatile unsigned long *)(0xfee00000 + 0x020 ));
        apic_id >>= 24;
        unsigned long apic_id;
         apic_id = *((volatile unsigned long *)(0xfee00000 + 0x020 ));
        apic_id >>= 24;

-        
+

         if(apic_id != 0) {
         if(apic_id != 0) {

-                
+

                 reg = pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ apic_id  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x6C);
                 reg |= 1<<4;
                 pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ apic_id  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x6C, reg);
         }
                 reg = pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ apic_id  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x6C);
                 reg |= 1<<4;
                 pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ apic_id  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x6C, reg);
         }

- 
+

 }
 }

- 
+

 static void enable_routing(u8 node)
 {
        u32 val;
 static void enable_routing(u8 node)
 {
        u32 val;

-        
-        
+
+

        print_debug("Enabling routing table for node ");
        print_debug_hex32(node);
        val=pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x6c);
        val &= ~((1<<6)|(1<<5)|(1<<4)|(1<<1)|(1<<0));
        pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x6c, val);
        print_debug("Enabling routing table for node ");
        print_debug_hex32(node);
        val=pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x6c);
        val &= ~((1<<6)|(1<<5)|(1<<4)|(1<<1)|(1<<0));
        pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x6c, val);

- 
+

        if(node!=0) {
                wait_ap_stop(node);
        }
        if(node!=0) {
                wait_ap_stop(node);
        }

- 
+

        print_debug(" done.\r\n");
 }
 static void rename_temp_node(u8 node)
        print_debug(" done.\r\n");
 }
 static void rename_temp_node(u8 node)


@@ -2486,21 +2486,21 @@ static void rename_temp_node(u8 node)
        print_debug("Renaming current temp node to ");
        print_debug_hex32(node);
        val=pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ 7  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x60);
        print_debug("Renaming current temp node to ");
        print_debug_hex32(node);
        val=pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ 7  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x60);

-       val &= (~7);   
-        val |= node;    
+       val &= (~7);
+        val |= node;

        pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ 7  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x60, val);
        print_debug(" done.\r\n");
 }
 static bool check_connection(u8 src, u8 dest, u8 link)
 {
        pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ 7  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x60, val);
        print_debug(" done.\r\n");
 }
 static bool check_connection(u8 src, u8 dest, u8 link)
 {

-        
+

        u32 val;
        u32 val;

-       
-        
+
+

        val=pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ src  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x98+link);
        if ( (val&0x17) != 0x03)
                return 0;
        val=pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ src  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x98+link);
        if ( (val&0x17) != 0x03)
                return 0;

-        
+

         val=pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ dest  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  ,0);
        if(val != 0x11001022)
                return 0;
         val=pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ dest  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  ,0);
        if(val != 0x11001022)
                return 0;


@@ -2513,37 +2513,37 @@ static void optimize_connection(u8 node1, u8 link1, u8 node2, u8 link2)
        uint16_t freq_cap1, freq_cap2, freq_cap, freq_mask;
        uint8_t width_cap1, width_cap2, width_cap, width, ln_width1, ln_width2;
        uint8_t freq;
        uint16_t freq_cap1, freq_cap2, freq_cap, freq_mask;
        uint8_t width_cap1, width_cap2, width_cap, width, ln_width1, ln_width2;
        uint8_t freq;

-        
-        
+
+

        freq_cap1  = pci_read_config16(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node1  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x80 + link1 + 0x0a );
        freq_cap2  = pci_read_config16(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node2  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x80 + link2 + 0x0a );
        freq_cap1  = pci_read_config16(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node1  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x80 + link1 + 0x0a );
        freq_cap2  = pci_read_config16(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node2  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x80 + link2 + 0x0a );

-        
-        
+
+

        freq = log2(freq_cap1 & freq_cap2 & 0xff);
        freq = log2(freq_cap1 & freq_cap2 & 0xff);

-        
+

        pci_write_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node1  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x80 + link1 + 0x09 , freq);
        pci_write_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node2  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x80 + link2 + 0x09 , freq);
        pci_write_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node1  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x80 + link1 + 0x09 , freq);
        pci_write_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node2  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x80 + link2 + 0x09 , freq);

-        
+

        width_cap1 = pci_read_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node1  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  ,  0x80 + link1 + 6 );
        width_cap2 = pci_read_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node2  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  ,  0x80 + link2 + 6 );
        width_cap1 = pci_read_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node1  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  ,  0x80 + link1 + 6 );
        width_cap2 = pci_read_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node2  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  ,  0x80 + link2 + 6 );

-        
+

        ln_width1 = link_width_to_pow2[width_cap1 & 7];
        ln_width2 = link_width_to_pow2[(width_cap2 >> 4) & 7];
        if (ln_width1 > ln_width2) {
                ln_width1 = ln_width2;
        }
        width = pow2_to_link_width[ln_width1];
        ln_width1 = link_width_to_pow2[width_cap1 & 7];
        ln_width2 = link_width_to_pow2[(width_cap2 >> 4) & 7];
        if (ln_width1 > ln_width2) {
                ln_width1 = ln_width2;
        }
        width = pow2_to_link_width[ln_width1];

-        
+

        ln_width1 = link_width_to_pow2[(width_cap1 >> 4) & 7];
        ln_width2 = link_width_to_pow2[width_cap2 & 7];
        if (ln_width1 > ln_width2) {
                ln_width1 = ln_width2;
        }
        width |= pow2_to_link_width[ln_width1] << 4;
        ln_width1 = link_width_to_pow2[(width_cap1 >> 4) & 7];
        ln_width2 = link_width_to_pow2[width_cap2 & 7];
        if (ln_width1 > ln_width2) {
                ln_width1 = ln_width2;
        }
        width |= pow2_to_link_width[ln_width1] << 4;

-       
-        
+
+

        pci_write_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node1  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x80 + link1 + 6  + 1, width);
        pci_write_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node1  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x80 + link1 + 6  + 1, width);

-        
+

        width = ((width & 0x70) >> 4) | ((width & 0x7) << 4);
        pci_write_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node2  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x80 + link2 + 6  + 1, width);
 }
        width = ((width & 0x70) >> 4) | ((width & 0x7) << 4);
        pci_write_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node2  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x80 + link2 + 6  + 1, width);
 }


@@ -2571,8 +2571,8 @@ static void setup_remote_row(u8 source, u8 dest, u8 cpus)
 }
 static void setup_remote_node(u8 node, u8 cpus)
 {
 }
 static void setup_remote_node(u8 node, u8 cpus)
 {

-       static const uint8_t pci_reg[] = { 
-               0x44, 0x4c, 0x54, 0x5c, 0x64, 0x6c, 0x74, 0x7c, 
+       static const uint8_t pci_reg[] = {
+               0x44, 0x4c, 0x54, 0x5c, 0x64, 0x6c, 0x74, 0x7c,

                0x40, 0x48, 0x50, 0x58, 0x60, 0x68, 0x70, 0x78,
                0x84, 0x8c, 0x94, 0x9c, 0xa4, 0xac, 0xb4, 0xbc,
                0x80, 0x88, 0x90, 0x98, 0xa0, 0xa8, 0xb0, 0xb8,
                0x40, 0x48, 0x50, 0x58, 0x60, 0x68, 0x70, 0x78,
                0x84, 0x8c, 0x94, 0x9c, 0xa4, 0xac, 0xb4, 0xbc,
                0x80, 0x88, 0x90, 0x98, 0xa0, 0xa8, 0xb0, 0xb8,


@@ -2585,7 +2585,7 @@ static void setup_remote_node(u8 node, u8 cpus)
        print_debug("setup_remote_node\r\n");
        for(row=0; row<cpus; row++)
                setup_remote_row(node, row, cpus);
        print_debug("setup_remote_node\r\n");
        for(row=0; row<cpus; row++)
                setup_remote_row(node, row, cpus);

-        
+

        for(i = 0; i < sizeof(pci_reg)/sizeof(pci_reg[0]); i++) {
                uint32_t value;
                uint8_t reg;
        for(i = 0; i < sizeof(pci_reg)/sizeof(pci_reg[0]); i++) {
                uint32_t value;
                uint8_t reg;


@@ -2606,24 +2606,24 @@ static u8 setup_smp(void)
        u8 cpus=2;
        print_debug("Enabling SMP settings\r\n");
        setup_row(0,0,cpus);
        u8 cpus=2;
        print_debug("Enabling SMP settings\r\n");
        setup_row(0,0,cpus);

-        
+

        setup_temp_row(0,1,cpus);
        setup_temp_row(0,1,cpus);

-       
+

        if (!check_connection(0, 7, 0x20  )) {
                print_debug("No connection to Node 1.\r\n");
        if (!check_connection(0, 7, 0x20  )) {
                print_debug("No connection to Node 1.\r\n");

-               fill_row( 0 ,7,0x00010101 ) ;    
-               setup_uniprocessor();    
+               fill_row( 0 ,7,0x00010101 ) ;
+               setup_uniprocessor();

                return 1;
        }
                return 1;
        }

-        
+

        optimize_connection(0, 0x20 , 7, 0x20 );
        optimize_connection(0, 0x20 , 7, 0x20 );

-       setup_node(0, cpus);     
-       setup_remote_node(1, cpus);   
-        rename_temp_node(1);     
-        enable_routing(1);       
-       
-       fill_row( 0 ,7,0x00010101 ) ;    
-       
+       setup_node(0, cpus);
+       setup_remote_node(1, cpus);
+        rename_temp_node(1);
+        enable_routing(1);
+
+       fill_row( 0 ,7,0x00010101 ) ;
+

        print_debug_hex32(cpus);
        print_debug(" nodes initialized.\r\n");
        return cpus;
        print_debug_hex32(cpus);
        print_debug(" nodes initialized.\r\n");
        return cpus;


@@ -2636,29 +2636,29 @@ static unsigned detect_mp_capabilities(unsigned cpus)
        print_debug_hex32(cpus);
        print_debug("\r\n");
        if (cpus>2)
        print_debug_hex32(cpus);
        print_debug("\r\n");
        if (cpus>2)

-               mask=0x06;       
+               mask=0x06;

        else
        else

-               mask=0x02;       
+               mask=0x02;

        for (node=0; node<cpus; node++) {
                if ((pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node  ) & 0x1f) << 11) | ((( 3 )  & 0x7) << 8))  , 0xe8) & mask)!=mask)
                        mp_cap= (0) ;
        }
        if (mp_cap)
                return cpus;
        for (node=0; node<cpus; node++) {
                if ((pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node  ) & 0x1f) << 11) | ((( 3 )  & 0x7) << 8))  , 0xe8) & mask)!=mask)
                        mp_cap= (0) ;
        }
        if (mp_cap)
                return cpus;

-        
+

        print_debug("One of the CPUs is not MP capable. Going back to UP\r\n");
        for (node=cpus; node>0; node--)
            for (row=cpus; row>0; row--)
                fill_row(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node-1  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , row-1, 0x00010101 );
        print_debug("One of the CPUs is not MP capable. Going back to UP\r\n");
        for (node=cpus; node>0; node--)
            for (row=cpus; row>0; row--)
                fill_row(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node-1  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , row-1, 0x00010101 );

-       
+

        return setup_uniprocessor();
 }
 static void coherent_ht_finalize(unsigned cpus)
 {
        int node;
        bool rev_a0;
        return setup_uniprocessor();
 }
 static void coherent_ht_finalize(unsigned cpus)
 {
        int node;
        bool rev_a0;

-       
-        
+
+

        print_debug("coherent_ht_finalize\r\n");
        rev_a0= is_cpu_rev_a0();
        for (node=0; node<cpus; node++) {
        print_debug("coherent_ht_finalize\r\n");
        rev_a0= is_cpu_rev_a0();
        for (node=0; node<cpus; node++) {


@@ -2686,36 +2686,36 @@ static int setup_coherent_ht_domain(void)
        cpus=setup_smp();
        cpus=detect_mp_capabilities(cpus);
        coherent_ht_finalize(cpus);
        cpus=setup_smp();
        cpus=detect_mp_capabilities(cpus);
        coherent_ht_finalize(cpus);

-        
+

        coherent_ht_mainboard(cpus);
        return reset_needed;
 }
 void sdram_no_memory(void)
 {
        print_err("No memory!!\r\n");
        coherent_ht_mainboard(cpus);
        return reset_needed;
 }
 void sdram_no_memory(void)
 {
        print_err("No memory!!\r\n");

-       while(1) { 
-               hlt(); 
+       while(1) {
+               hlt();

        }
 }
        }
 }

- 
+

 void sdram_initialize(int controllers, const struct mem_controller *ctrl)
 {
        int i;
 void sdram_initialize(int controllers, const struct mem_controller *ctrl)
 {
        int i;

-        
+

        for(i = 0; i < controllers; i++) {
                print_debug("Ram1.");
                print_debug_hex8(i);
                print_debug("\r\n");
                sdram_set_registers(ctrl + i);
        }
        for(i = 0; i < controllers; i++) {
                print_debug("Ram1.");
                print_debug_hex8(i);
                print_debug("\r\n");
                sdram_set_registers(ctrl + i);
        }

-        
+

        for(i = 0; i < controllers; i++) {
                print_debug("Ram2.");
                print_debug_hex8(i);
                print_debug("\r\n");
                sdram_set_spd_registers(ctrl + i);
        }
        for(i = 0; i < controllers; i++) {
                print_debug("Ram2.");
                print_debug_hex8(i);
                print_debug("\r\n");
                sdram_set_spd_registers(ctrl + i);
        }

-        
+

        print_debug("Ram3\r\n");
        sdram_enable(controllers, ctrl);
        print_debug("Ram4\r\n");
        print_debug("Ram3\r\n");
        sdram_enable(controllers, ctrl);
        print_debug("Ram4\r\n");


@@ -2733,17 +2733,17 @@ static void stop_this_cpu(void)
 {
        unsigned apicid;
        apicid = apic_read(0x020 ) >> 24;
 {
        unsigned apicid;
        apicid = apic_read(0x020 ) >> 24;

-        
+

        apic_write(0x310 , (( apicid )<<24) );
        apic_write(0x300 , 0x08000  | 0x04000  | 0x00500 );
        apic_write(0x310 , (( apicid )<<24) );
        apic_write(0x300 , 0x08000  | 0x04000  | 0x00500 );

-        
+

        apic_wait_icr_idle();
        apic_wait_icr_idle();

-        
+

        apic_write(0x310 , (( apicid )<<24) );
        apic_write(0x300 ,  0x08000  | 0x00500 );
        apic_write(0x310 , (( apicid )<<24) );
        apic_write(0x300 ,  0x08000  | 0x00500 );

-        
+

        apic_wait_icr_idle();
        apic_wait_icr_idle();

-        
+

        for(;;) {
                hlt();
        }
        for(;;) {
                hlt();
        }


@@ -2756,7 +2756,7 @@ static void pc87360_enable_serial(void)
 }
 static void main(void)
 {
 }
 static void main(void)
 {

-        
+

        static const struct mem_controller cpu[] = {
                {
                        .node_id = 0,
        static const struct mem_controller cpu[] = {
                {
                        .node_id = 0,


@@ -2792,9 +2792,9 @@ static void main(void)
        setup_coherent_ht_domain();
        enumerate_ht_chain(0);
        distinguish_cpu_resets(0);
        setup_coherent_ht_domain();
        enumerate_ht_chain(0);
        distinguish_cpu_resets(0);

-       
+

        enable_smbus();
        memreset_setup();
        sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu);
        enable_smbus();
        memreset_setup();
        sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu);

-        
+

 }
 }

diff --git a/util/romcc/tests/raminit_test7.c b/util/romcc/tests/raminit_test7.c
index be62d305735009caef75d65a05bad1dd54456303..184e912fffff7161e581a184085e70f24cbd2a9b 100644 (file)
--- a/util/romcc/tests/raminit_test7.c
+++ b/util/romcc/tests/raminit_test7.c
@@ -1,30 +1,30 @@
 typedef unsigned char      uint8_t;
 typedef unsigned char      uint8_t;

-typedef signed char        int8_t; 
+typedef signed char        int8_t;

 typedef unsigned short     uint16_t;
 typedef signed short       int16_t;
 typedef unsigned int       uint32_t;
 typedef signed int         int32_t;
 typedef unsigned short     uint16_t;
 typedef signed short       int16_t;
 typedef unsigned int       uint32_t;
 typedef signed int         int32_t;

- 
+

 typedef unsigned char      uint_least8_t;
 typedef unsigned char      uint_least8_t;

-typedef signed char        int_least8_t; 
+typedef signed char        int_least8_t;

 typedef unsigned short     uint_least16_t;
 typedef signed short       int_least16_t;
 typedef unsigned int       uint_least32_t;
 typedef signed int         int_least32_t;
 typedef unsigned short     uint_least16_t;
 typedef signed short       int_least16_t;
 typedef unsigned int       uint_least32_t;
 typedef signed int         int_least32_t;

- 
+

 typedef unsigned char      uint_fast8_t;
 typedef unsigned char      uint_fast8_t;

-typedef signed char        int_fast8_t; 
+typedef signed char        int_fast8_t;

 typedef unsigned int       uint_fast16_t;
 typedef signed int         int_fast16_t;
 typedef unsigned int       uint_fast32_t;
 typedef signed int         int_fast32_t;
 typedef unsigned int       uint_fast16_t;
 typedef signed int         int_fast16_t;
 typedef unsigned int       uint_fast32_t;
 typedef signed int         int_fast32_t;

- 
+

 typedef int                intptr_t;
 typedef unsigned int       uintptr_t;
 typedef int                intptr_t;
 typedef unsigned int       uintptr_t;

- 
+

 typedef long int           intmax_t;
 typedef unsigned long int  uintmax_t;
 typedef long int           intmax_t;
 typedef unsigned long int  uintmax_t;

- 
+

 static inline unsigned long apic_read(unsigned long reg)
 {
        return *((volatile unsigned long *)(0xfee00000 +reg));
 static inline unsigned long apic_read(unsigned long reg)
 {
        return *((volatile unsigned long *)(0xfee00000 +reg));


@@ -37,7 +37,7 @@ static inline void apic_wait_icr_idle(void)
 {
        do { } while ( apic_read( 0x300  ) & 0x01000  );
 }
 {
        do { } while ( apic_read( 0x300  ) & 0x01000  );
 }

- 
+

 static void outb(unsigned char value, unsigned short port)
 {
        __builtin_outb(value, port);
 static void outb(unsigned char value, unsigned short port)
 {
        __builtin_outb(value, port);


@@ -65,7 +65,7 @@ static unsigned char inl(unsigned short port)
 static inline void outsb(uint16_t port, const void *addr, unsigned long count)
 {
        __asm__ __volatile__ (
 static inline void outsb(uint16_t port, const void *addr, unsigned long count)
 {
        __asm__ __volatile__ (

-               "cld ; rep ; outsb " 
+               "cld ; rep ; outsb "

                : "=S" (addr), "=c" (count)
                : "d"(port), "0"(addr), "1" (count)
                );
                : "=S" (addr), "=c" (count)
                : "d"(port), "0"(addr), "1" (count)
                );


@@ -73,7 +73,7 @@ static inline void outsb(uint16_t port, const void *addr, unsigned long count)
 static inline void outsw(uint16_t port, const void *addr, unsigned long count)
 {
        __asm__ __volatile__ (
 static inline void outsw(uint16_t port, const void *addr, unsigned long count)
 {
        __asm__ __volatile__ (

-               "cld ; rep ; outsw " 
+               "cld ; rep ; outsw "

                : "=S" (addr), "=c" (count)
                : "d"(port), "0"(addr), "1" (count)
                );
                : "=S" (addr), "=c" (count)
                : "d"(port), "0"(addr), "1" (count)
                );


@@ -81,7 +81,7 @@ static inline void outsw(uint16_t port, const void *addr, unsigned long count)
 static inline void outsl(uint16_t port, const void *addr, unsigned long count)
 {
        __asm__ __volatile__ (
 static inline void outsl(uint16_t port, const void *addr, unsigned long count)
 {
        __asm__ __volatile__ (

-               "cld ; rep ; outsl " 
+               "cld ; rep ; outsl "

                : "=S" (addr), "=c" (count)
                : "d"(port), "0"(addr), "1" (count)
                );
                : "=S" (addr), "=c" (count)
                : "d"(port), "0"(addr), "1" (count)
                );


@@ -89,7 +89,7 @@ static inline void outsl(uint16_t port, const void *addr, unsigned long count)
 static inline void insb(uint16_t port, void *addr, unsigned long count)
 {
        __asm__ __volatile__ (
 static inline void insb(uint16_t port, void *addr, unsigned long count)
 {
        __asm__ __volatile__ (

-               "cld ; rep ; insb " 
+               "cld ; rep ; insb "

                : "=D" (addr), "=c" (count)
                : "d"(port), "0"(addr), "1" (count)
                );
                : "=D" (addr), "=c" (count)
                : "d"(port), "0"(addr), "1" (count)
                );


@@ -97,7 +97,7 @@ static inline void insb(uint16_t port, void *addr, unsigned long count)
 static inline void insw(uint16_t port, void *addr, unsigned long count)
 {
        __asm__ __volatile__ (
 static inline void insw(uint16_t port, void *addr, unsigned long count)
 {
        __asm__ __volatile__ (

-               "cld ; rep ; insw " 
+               "cld ; rep ; insw "

                : "=D" (addr), "=c" (count)
                : "d"(port), "0"(addr), "1" (count)
                );
                : "=D" (addr), "=c" (count)
                : "d"(port), "0"(addr), "1" (count)
                );


@@ -105,7 +105,7 @@ static inline void insw(uint16_t port, void *addr, unsigned long count)
 static inline void insl(uint16_t port, void *addr, unsigned long count)
 {
        __asm__ __volatile__ (
 static inline void insl(uint16_t port, void *addr, unsigned long count)
 {
        __asm__ __volatile__ (

-               "cld ; rep ; insl " 
+               "cld ; rep ; insl "

                : "=D" (addr), "=c" (count)
                : "d"(port), "0"(addr), "1" (count)
                );
                : "=D" (addr), "=c" (count)
                : "d"(port), "0"(addr), "1" (count)
                );


@@ -180,7 +180,7 @@ static uldiv_t uldiv(unsigned long numer, unsigned long denom)
 }
 int log2(int value)
 {
 }
 int log2(int value)
 {

-        
+

        return __builtin_bsr(value);
 }
 typedef unsigned device_t;
        return __builtin_bsr(value);
 }
 typedef unsigned device_t;


@@ -237,11 +237,11 @@ static device_t pci_locate_device(unsigned pci_id, device_t dev)
        }
        return (0xffffffffU) ;
 }
        }
        return (0xffffffffU) ;
 }

- 
- 
- 
- 
- 
+
+
+
+
+

 static int uart_can_tx_byte(void)
 {
        return inb(1016  + 0x05 ) & 0x20;
 static int uart_can_tx_byte(void)
 {
        return inb(1016  + 0x05 ) & 0x20;


@@ -253,29 +253,29 @@ static void uart_wait_to_tx_byte(void)
 }
 static void uart_wait_until_sent(void)
 {
 }
 static void uart_wait_until_sent(void)
 {

-       while(!(inb(1016  + 0x05 ) & 0x40)) 
+       while(!(inb(1016  + 0x05 ) & 0x40))

                ;
 }
 static void uart_tx_byte(unsigned char data)
 {
        uart_wait_to_tx_byte();
        outb(data, 1016  + 0x00 );
                ;
 }
 static void uart_tx_byte(unsigned char data)
 {
        uart_wait_to_tx_byte();
        outb(data, 1016  + 0x00 );

-        
+

        uart_wait_until_sent();
 }
 static void uart_init(void)
 {
        uart_wait_until_sent();
 }
 static void uart_init(void)
 {

-        
+

        outb(0x0, 1016  + 0x01 );
        outb(0x0, 1016  + 0x01 );

-        
+

        outb(0x01, 1016  + 0x02 );
        outb(0x01, 1016  + 0x02 );

-        
+

        outb(0x80 | 3  , 1016  + 0x03 );
        outb((115200/ 115200 )  & 0xFF,   1016  + 0x00 );
        outb(((115200/ 115200 )  >> 8) & 0xFF,    1016  + 0x01 );
        outb(3  , 1016  + 0x03 );
 }
        outb(0x80 | 3  , 1016  + 0x03 );
        outb((115200/ 115200 )  & 0xFF,   1016  + 0x00 );
        outb(((115200/ 115200 )  >> 8) & 0xFF,    1016  + 0x01 );
        outb(3  , 1016  + 0x03 );
 }

- 
+

 static void __console_tx_byte(unsigned char byte)
 {
        uart_tx_byte(byte);
 static void __console_tx_byte(unsigned char byte)
 {
        uart_tx_byte(byte);


@@ -385,12 +385,12 @@ static void print_spew_hex32(unsigned int value) { __console_tx_hex32(8 , value)
 static void print_spew(const char *str) { __console_tx_string(8 , str); }
 static void console_init(void)
 {
 static void print_spew(const char *str) { __console_tx_string(8 , str); }
 static void console_init(void)
 {

-       static const char console_test[] = 
+       static const char console_test[] =

                "\r\n\r\nLinuxBIOS-"
                "\r\n\r\nLinuxBIOS-"

-               "1.1.4"  
-               ".0Fallback"  
+               "1.1.4"
+               ".0Fallback"

                " "
                " "

-               "Thu Oct 9 20:29:48 MDT 2003"  
+               "Thu Oct 9 20:29:48 MDT 2003"

                " starting...\r\n";
        print_info(console_test);
 }
                " starting...\r\n";
        print_info(console_test);
 }


@@ -405,9 +405,9 @@ static void write_phys(unsigned long addr, unsigned long value)
 {
        asm volatile(
                "movnti %1, (%0)"
 {
        asm volatile(
                "movnti %1, (%0)"

-               :  
-               : "r" (addr), "r" (value)  
-               :  
+               :
+               : "r" (addr), "r" (value)
+               :

                );
 }
 static unsigned long read_phys(unsigned long addr)
                );
 }
 static unsigned long read_phys(unsigned long addr)


@@ -419,28 +419,28 @@ static unsigned long read_phys(unsigned long addr)
 static void ram_fill(unsigned long start, unsigned long stop)
 {
        unsigned long addr;
 static void ram_fill(unsigned long start, unsigned long stop)
 {
        unsigned long addr;

-        
+

        print_debug("DRAM fill: ");
        print_debug_hex32(start);
        print_debug("-");
        print_debug_hex32(stop);
        print_debug("\r\n");
        for(addr = start; addr < stop ; addr += 4) {
        print_debug("DRAM fill: ");
        print_debug_hex32(start);
        print_debug("-");
        print_debug_hex32(stop);
        print_debug("\r\n");
        for(addr = start; addr < stop ; addr += 4) {

-                
+

                if (!(addr & 0xffff)) {
                        print_debug_hex32(addr);
                        print_debug("\r");
                }
                write_phys(addr, addr);
        };
                if (!(addr & 0xffff)) {
                        print_debug_hex32(addr);
                        print_debug("\r");
                }
                write_phys(addr, addr);
        };

-        
+

        print_debug_hex32(addr);
        print_debug("\r\nDRAM filled\r\n");
 }
 static void ram_verify(unsigned long start, unsigned long stop)
 {
        unsigned long addr;
        print_debug_hex32(addr);
        print_debug("\r\nDRAM filled\r\n");
 }
 static void ram_verify(unsigned long start, unsigned long stop)
 {
        unsigned long addr;

-        
+

        print_debug("DRAM verify: ");
        print_debug_hex32(start);
        print_debug_char('-');
        print_debug("DRAM verify: ");
        print_debug_hex32(start);
        print_debug_char('-');


@@ -448,31 +448,31 @@ static void ram_verify(unsigned long start, unsigned long stop)
        print_debug("\r\n");
        for(addr = start; addr < stop ; addr += 4) {
                unsigned long value;
        print_debug("\r\n");
        for(addr = start; addr < stop ; addr += 4) {
                unsigned long value;

-                
+

                if (!(addr & 0xffff)) {
                        print_debug_hex32(addr);
                        print_debug("\r");
                }
                value = read_phys(addr);
                if (value != addr) {
                if (!(addr & 0xffff)) {
                        print_debug_hex32(addr);
                        print_debug("\r");
                }
                value = read_phys(addr);
                if (value != addr) {

-                        
+

                        print_err_hex32(addr);
                        print_err_char(':');
                        print_err_hex32(value);
                        print_err("\r\n");
                }
        }
                        print_err_hex32(addr);
                        print_err_char(':');
                        print_err_hex32(value);
                        print_err("\r\n");
                }
        }

-        
+

        print_debug_hex32(addr);
        print_debug("\r\nDRAM verified\r\n");
 }
 void ram_check(unsigned long start, unsigned long stop)
 {
        int result;
        print_debug_hex32(addr);
        print_debug("\r\nDRAM verified\r\n");
 }
 void ram_check(unsigned long start, unsigned long stop)
 {
        int result;

-        
+

        print_debug("Testing DRAM : ");
        print_debug_hex32(start);
        print_debug("Testing DRAM : ");
        print_debug_hex32(start);

-       print_debug("-");       
+       print_debug("-");

        print_debug_hex32(stop);
        print_debug("\r\n");
        ram_fill(start, stop);
        print_debug_hex32(stop);
        print_debug("\r\n");
        ram_fill(start, stop);


@@ -481,7 +481,7 @@ void ram_check(unsigned long start, unsigned long stop)
 }
 static int enumerate_ht_chain(unsigned link)
 {
 }
 static int enumerate_ht_chain(unsigned link)
 {

-        
+

        unsigned next_unitid, last_unitid;
        int reset_needed = 0;
        next_unitid = 1;
        unsigned next_unitid, last_unitid;
        int reset_needed = 0;
        next_unitid = 1;


@@ -490,7 +490,7 @@ static int enumerate_ht_chain(unsigned link)
                uint8_t hdr_type, pos;
                last_unitid = next_unitid;
                id = pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 0 ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8)) , 0x00 );
                uint8_t hdr_type, pos;
                last_unitid = next_unitid;
                id = pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 0 ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8)) , 0x00 );

-                
+

                if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
                        (((id >> 16) & 0xffff) == 0xffff) ||
                        (((id >> 16) & 0xffff) == 0x0000)) {
                if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
                        (((id >> 16) & 0xffff) == 0xffff) ||
                        (((id >> 16) & 0xffff) == 0x0000)) {


@@ -536,7 +536,7 @@ static void enable_smbus(void)
        pci_write_config32(dev, 0x58, 0x0f00  | 1);
        enable = pci_read_config8(dev, 0x41);
        pci_write_config8(dev, 0x41, enable | (1 << 7));
        pci_write_config32(dev, 0x58, 0x0f00  | 1);
        enable = pci_read_config8(dev, 0x41);
        pci_write_config8(dev, 0x41, enable | (1 << 7));

-        
+

        outw(inw(0x0f00  + 0xe0 ), 0x0f00  + 0xe0 );
 }
 static inline void smbus_delay(void)
        outw(inw(0x0f00  + 0xe0 ), 0x0f00  + 0xe0 );
 }
 static inline void smbus_delay(void)


@@ -555,7 +555,7 @@ static int smbus_wait_until_ready(void)
                        break;
                }
                if(loops == ((100*1000*10)  / 2)) {
                        break;
                }
                if(loops == ((100*1000*10)  / 2)) {

-                       outw(inw(0x0f00  + 0xe0 ), 
+                       outw(inw(0x0f00  + 0xe0 ),

                                0x0f00  + 0xe0 );
                }
        } while(--loops);
                                0x0f00  + 0xe0 );
                }
        } while(--loops);


@@ -568,7 +568,7 @@ static int smbus_wait_until_done(void)
        do {
                unsigned short val;
                smbus_delay();
        do {
                unsigned short val;
                smbus_delay();

-               
+

                val = inw(0x0f00  + 0xe0 );
                if (((val & 0x8) == 0) | ((val & 0x437) != 0)) {
                        break;
                val = inw(0x0f00  + 0xe0 );
                if (((val & 0x8) == 0) | ((val & 0x437) != 0)) {
                        break;


@@ -584,29 +584,29 @@ static int smbus_read_byte(unsigned device, unsigned address)
        if (smbus_wait_until_ready() < 0) {
                return -2;
        }
        if (smbus_wait_until_ready() < 0) {
                return -2;
        }

-       
-        
-        
+
+
+

        outw(inw(0x0f00  + 0xe2 ) & ~((1<<10)|(1<<9)|(1<<8)|(1<<4)), 0x0f00  + 0xe2 );
        outw(inw(0x0f00  + 0xe2 ) & ~((1<<10)|(1<<9)|(1<<8)|(1<<4)), 0x0f00  + 0xe2 );

-        
+

        outw(((device & 0x7f) << 1) | 1, 0x0f00  + 0xe4 );
        outw(((device & 0x7f) << 1) | 1, 0x0f00  + 0xe4 );

-        
+

        outb(address & 0xFF, 0x0f00  + 0xe8 );
        outb(address & 0xFF, 0x0f00  + 0xe8 );

-        
+

        outw((inw(0x0f00  + 0xe2 ) & ~7) | (0x2), 0x0f00  + 0xe2 );
        outw((inw(0x0f00  + 0xe2 ) & ~7) | (0x2), 0x0f00  + 0xe2 );

-        
-        
+
+

        outw(inw(0x0f00  + 0xe0 ), 0x0f00  + 0xe0 );
        outw(inw(0x0f00  + 0xe0 ), 0x0f00  + 0xe0 );

-        
+

        outw(0, 0x0f00  + 0xe6 );
        outw(0, 0x0f00  + 0xe6 );

-        
+

        outw((inw(0x0f00  + 0xe2 ) | (1 << 3)), 0x0f00  + 0xe2 );
        outw((inw(0x0f00  + 0xe2 ) | (1 << 3)), 0x0f00  + 0xe2 );

-        
+

        if (smbus_wait_until_done() < 0) {
                return -3;
        }
        global_status_register = inw(0x0f00  + 0xe0 );
        if (smbus_wait_until_done() < 0) {
                return -3;
        }
        global_status_register = inw(0x0f00  + 0xe0 );

-        
+

        byte = inw(0x0f00  + 0xe6 ) & 0xff;
        if (global_status_register != (1 << 4)) {
                return -1;
        byte = inw(0x0f00  + 0xe6 ) & 0xff;
        if (global_status_register != (1 << 4)) {
                return -1;


@@ -641,31 +641,31 @@ static tsc_t rdtsc(void)
 {
        tsc_t res;
        asm ("rdtsc"
 {
        tsc_t res;
        asm ("rdtsc"

-               : "=a" (res.lo), "=d"(res.hi)  
-               :  
-               :  
+               : "=a" (res.lo), "=d"(res.hi)
+               :
+               :

                );
        return res;
 }
 void init_timer(void)
 {
                );
        return res;
 }
 void init_timer(void)
 {

-        
+

        apic_write(0x320 , (1 << 17)|(1<< 16)|(0 << 12)|(0 << 0));
        apic_write(0x320 , (1 << 17)|(1<< 16)|(0 << 12)|(0 << 0));

-        
+

        apic_write(0x3E0 , 0xB );
        apic_write(0x3E0 , 0xB );

-        
+

        apic_write(0x380 , 0xffffffff);
 }
 void udelay(unsigned usecs)
 {
        uint32_t start, value, ticks;
        apic_write(0x380 , 0xffffffff);
 }
 void udelay(unsigned usecs)
 {
        uint32_t start, value, ticks;

-        
+

        ticks = usecs * 200;
        start = apic_read(0x390 );
        do {
                value = apic_read(0x390 );
        } while((start - value) < ticks);
        ticks = usecs * 200;
        start = apic_read(0x390 );
        do {
                value = apic_read(0x390 );
        } while((start - value) < ticks);

-       
+

 }
 void mdelay(unsigned msecs)
 {
 }
 void mdelay(unsigned msecs)
 {


@@ -737,8 +737,8 @@ static void print_debug_pci_dev(unsigned dev)
 static void print_pci_devices(void)
 {
        device_t dev;
 static void print_pci_devices(void)
 {
        device_t dev;

-       for(dev = ( ((( 0 ) & 0xFF) << 16) | (((  0 ) & 0x1f) << 11) | (((  0 )  & 0x7) << 8)) ; 
-               dev <= ( ((( 0 ) & 0xFF) << 16) | (((  0x1f ) & 0x1f) << 11) | (((  0x7 )  & 0x7) << 8)) ; 
+       for(dev = ( ((( 0 ) & 0xFF) << 16) | (((  0 ) & 0x1f) << 11) | (((  0 )  & 0x7) << 8)) ;
+               dev <= ( ((( 0 ) & 0xFF) << 16) | (((  0x1f ) & 0x1f) << 11) | (((  0x7 )  & 0x7) << 8)) ;

                dev += ( ((( 0 ) & 0xFF) << 16) | ((( 0 ) & 0x1f) << 11) | ((( 1 )  & 0x7) << 8)) ) {
                uint32_t id;
                id = pci_read_config32(dev, 0x00 );
                dev += ( ((( 0 ) & 0xFF) << 16) | ((( 0 ) & 0x1f) << 11) | ((( 1 )  & 0x7) << 8)) ) {
                uint32_t id;
                id = pci_read_config32(dev, 0x00 );


@@ -756,7 +756,7 @@ static void dump_pci_device(unsigned dev)
        int i;
        print_debug_pci_dev(dev);
        print_debug("\r\n");
        int i;
        print_debug_pci_dev(dev);
        print_debug("\r\n");

-       
+

        for(i = 0; i <= 255; i++) {
                unsigned char val;
                if ((i & 0x0f) == 0) {
        for(i = 0; i <= 255; i++) {
                unsigned char val;
                if ((i & 0x0f) == 0) {


@@ -774,8 +774,8 @@ static void dump_pci_device(unsigned dev)
 static void dump_pci_devices(void)
 {
        device_t dev;
 static void dump_pci_devices(void)
 {
        device_t dev;

-       for(dev = ( ((( 0 ) & 0xFF) << 16) | (((  0 ) & 0x1f) << 11) | (((  0 )  & 0x7) << 8)) ; 
-               dev <= ( ((( 0 ) & 0xFF) << 16) | (((  0x1f ) & 0x1f) << 11) | (((  0x7 )  & 0x7) << 8)) ; 
+       for(dev = ( ((( 0 ) & 0xFF) << 16) | (((  0 ) & 0x1f) << 11) | (((  0 )  & 0x7) << 8)) ;
+               dev <= ( ((( 0 ) & 0xFF) << 16) | (((  0x1f ) & 0x1f) << 11) | (((  0x7 )  & 0x7) << 8)) ;

                dev += ( ((( 0 ) & 0xFF) << 16) | ((( 0 ) & 0x1f) << 11) | ((( 1 )  & 0x7) << 8)) ) {
                uint32_t id;
                id = pci_read_config32(dev, 0x00 );
                dev += ( ((( 0 ) & 0xFF) << 16) | ((( 0 ) & 0x1f) << 11) | ((( 1 )  & 0x7) << 8)) ) {
                uint32_t id;
                id = pci_read_config32(dev, 0x00 );


@@ -796,8 +796,8 @@ static void dump_spd_registers(const struct mem_controller *ctrl)
                device = ctrl->channel0[i];
                if (device) {
                        int j;
                device = ctrl->channel0[i];
                if (device) {
                        int j;

-                       print_debug("dimm: "); 
-                       print_debug_hex8(i); 
+                       print_debug("dimm: ");
+                       print_debug_hex8(i);

                        print_debug(".0: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {
                        print_debug(".0: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {


@@ -822,8 +822,8 @@ static void dump_spd_registers(const struct mem_controller *ctrl)
                device = ctrl->channel1[i];
                if (device) {
                        int j;
                device = ctrl->channel1[i];
                if (device) {
                        int j;

-                       print_debug("dimm: "); 
-                       print_debug_hex8(i); 
+                       print_debug("dimm: ");
+                       print_debug_hex8(i);

                        print_debug(".1: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {
                        print_debug(".1: ");
                        print_debug_hex8(device);
                        for(j = 0; j < 256; j++) {


@@ -847,13 +847,13 @@ static void dump_spd_registers(const struct mem_controller *ctrl)
                }
        }
 }
                }
        }
 }

- 
+

 static unsigned int cpuid(unsigned int op)
 {
        unsigned int ret;
        unsigned dummy2,dummy3,dummy4;
 static unsigned int cpuid(unsigned int op)
 {
        unsigned int ret;
        unsigned dummy2,dummy3,dummy4;

-       asm volatile ( 
-               "cpuid" 
+       asm volatile (
+               "cpuid"

                : "=a" (ret), "=b" (dummy2), "=c" (dummy3), "=d" (dummy4)
                : "a" (op)
                );
                : "=a" (ret), "=b" (dummy2), "=c" (dummy3), "=d" (dummy4)
                : "a" (op)
                );


@@ -870,13 +870,13 @@ static int is_cpu_pre_c0(void)
 static void memreset_setup(void)
 {
        if (is_cpu_pre_c0()) {
 static void memreset_setup(void)
 {
        if (is_cpu_pre_c0()) {

-                
+

                outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), 0x0f00  + 0xc0 + 28);
                outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), 0x0f00  + 0xc0 + 28);

-                
+

                outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), 0x0f00  + 0xc0 + 29);
        }
        else {
                outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), 0x0f00  + 0xc0 + 29);
        }
        else {

-                
+

                outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), 0x0f00  + 0xc0 + 29);
        }
 }
                outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), 0x0f00  + 0xc0 + 29);
        }
 }


@@ -884,15 +884,15 @@ static void memreset(int controllers, const struct mem_controller *ctrl)
 {
        if (is_cpu_pre_c0()) {
                udelay(800);
 {
        if (is_cpu_pre_c0()) {
                udelay(800);

-                
+

                outb((0<<7)|(0<<6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), 0x0f00  + 0xc0 + 28);
                udelay(90);
        }
 }
 static unsigned int generate_row(uint8_t node, uint8_t row, uint8_t maxnodes)
 {
                outb((0<<7)|(0<<6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), 0x0f00  + 0xc0 + 28);
                udelay(90);
        }
 }
 static unsigned int generate_row(uint8_t node, uint8_t row, uint8_t maxnodes)
 {

-        
-       uint32_t ret=0x00010101;  
+
+       uint32_t ret=0x00010101;

        static const unsigned int rows_2p[2][2] = {
                { 0x00050101, 0x00010404 },
                { 0x00010404, 0x00050101 }
        static const unsigned int rows_2p[2][2] = {
                { 0x00050101, 0x00010404 },
                { 0x00010404, 0x00050101 }


@@ -910,33 +910,33 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 {
        return smbus_read_byte(device, address);
 }
 {
        return smbus_read_byte(device, address);
 }

- 
+

 static void coherent_ht_mainboard(unsigned cpus)
 {
 }
 static void coherent_ht_mainboard(unsigned cpus)
 {
 }

- 
+

 void cpu_ldtstop(unsigned cpus)
 {
        uint32_t tmp;
        device_t dev;
        unsigned cnt;
        for(cnt=0; cnt<cpus; cnt++) {
 void cpu_ldtstop(unsigned cpus)
 {
        uint32_t tmp;
        device_t dev;
        unsigned cnt;
        for(cnt=0; cnt<cpus; cnt++) {

-                
+

                pci_write_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24 ) & 0x1f) << 11) | ((( 3 )  & 0x7) << 8)) ,0x81,0x23);
                pci_write_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24 ) & 0x1f) << 11) | ((( 3 )  & 0x7) << 8)) ,0x81,0x23);

-                
+

                pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24 ) & 0x1f) << 11) | ((( 3 )  & 0x7) << 8)) ,0xd4,0x00000701);
                pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24 ) & 0x1f) << 11) | ((( 3 )  & 0x7) << 8)) ,0xd4,0x00000701);

-                
+

                pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24 ) & 0x1f) << 11) | ((( 3 )  & 0x7) << 8)) ,0xd8,0x00000000);
                pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24 ) & 0x1f) << 11) | ((( 3 )  & 0x7) << 8)) ,0xd8,0x00000000);

-                
+

                tmp=pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24 ) & 0x1f) << 11) | ((( 2 )  & 0x7) << 8)) ,0x90);
                pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24 ) & 0x1f) << 11) | ((( 2 )  & 0x7) << 8)) ,0x90, tmp | (1<<24) );
        }
 }
                tmp=pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24 ) & 0x1f) << 11) | ((( 2 )  & 0x7) << 8)) ,0x90);
                pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24 ) & 0x1f) << 11) | ((( 2 )  & 0x7) << 8)) ,0x90, tmp | (1<<24) );
        }
 }

- 
- 
- 
- 
- 
+
+
+
+
+

 static void setup_resource_map(const unsigned int *register_values, int max)
 {
        int i;
 static void setup_resource_map(const unsigned int *register_values, int max)
 {
        int i;


@@ -957,8 +957,8 @@ static void setup_resource_map(const unsigned int *register_values, int max)
 static void setup_default_resource_map(void)
 {
        static const unsigned int register_values[] = {
 static void setup_default_resource_map(void)
 {
        static const unsigned int register_values[] = {

-        
-        
+
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x44 ) & 0xFF)) , 0x0000f8f8, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x4C ) & 0xFF)) , 0x0000f8f8, 0x00000001,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x54 ) & 0xFF)) , 0x0000f8f8, 0x00000002,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x44 ) & 0xFF)) , 0x0000f8f8, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x4C ) & 0xFF)) , 0x0000f8f8, 0x00000001,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x54 ) & 0xFF)) , 0x0000f8f8, 0x00000002,


@@ -967,7 +967,7 @@ static void setup_default_resource_map(void)
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x6C ) & 0xFF)) , 0x0000f8f8, 0x00000005,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x74 ) & 0xFF)) , 0x0000f8f8, 0x00000006,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x7C ) & 0xFF)) , 0x0000f8f8, 0x00000007,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x6C ) & 0xFF)) , 0x0000f8f8, 0x00000005,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x74 ) & 0xFF)) , 0x0000f8f8, 0x00000006,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x7C ) & 0xFF)) , 0x0000f8f8, 0x00000007,

-        
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x40 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x48 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x50 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x40 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x48 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x50 ) & 0xFF)) , 0x0000f8fc, 0x00000000,


@@ -976,7 +976,7 @@ static void setup_default_resource_map(void)
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x68 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x70 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x78 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x68 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x70 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x78 ) & 0xFF)) , 0x0000f8fc, 0x00000000,

-        
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x84 ) & 0xFF)) , 0x00000048, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x8C ) & 0xFF)) , 0x00000048, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x94 ) & 0xFF)) , 0x00000048, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x84 ) & 0xFF)) , 0x00000048, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x8C ) & 0xFF)) , 0x00000048, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x94 ) & 0xFF)) , 0x00000048, 0x00000000,


@@ -985,7 +985,7 @@ static void setup_default_resource_map(void)
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xAC ) & 0xFF)) , 0x00000048, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xB4 ) & 0xFF)) , 0x00000048, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xBC ) & 0xFF)) , 0x00000048, 0x00ffff00,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xAC ) & 0xFF)) , 0x00000048, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xB4 ) & 0xFF)) , 0x00000048, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xBC ) & 0xFF)) , 0x00000048, 0x00ffff00,

-        
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x80 ) & 0xFF)) , 0x000000f0, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x88 ) & 0xFF)) , 0x000000f0, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x90 ) & 0xFF)) , 0x000000f0, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x80 ) & 0xFF)) , 0x000000f0, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x88 ) & 0xFF)) , 0x000000f0, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x90 ) & 0xFF)) , 0x000000f0, 0x00000000,


@@ -994,17 +994,17 @@ static void setup_default_resource_map(void)
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xA8 ) & 0xFF)) , 0x000000f0, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xB0 ) & 0xFF)) , 0x000000f0, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xB8 ) & 0xFF)) , 0x000000f0, 0x00fc0003,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xA8 ) & 0xFF)) , 0x000000f0, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xB0 ) & 0xFF)) , 0x000000f0, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xB8 ) & 0xFF)) , 0x000000f0, 0x00fc0003,

-        
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xC4 ) & 0xFF)) , 0xFE000FC8, 0x01fff000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xCC ) & 0xFF)) , 0xFE000FC8, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xD4 ) & 0xFF)) , 0xFE000FC8, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xDC ) & 0xFF)) , 0xFE000FC8, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xC4 ) & 0xFF)) , 0xFE000FC8, 0x01fff000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xCC ) & 0xFF)) , 0xFE000FC8, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xD4 ) & 0xFF)) , 0xFE000FC8, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xDC ) & 0xFF)) , 0xFE000FC8, 0x00000000,

-        
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xC0 ) & 0xFF)) , 0xFE000FCC, 0x00000003,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xC8 ) & 0xFF)) , 0xFE000FCC, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xD0 ) & 0xFF)) , 0xFE000FCC, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xD8 ) & 0xFF)) , 0xFE000FCC, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xC0 ) & 0xFF)) , 0xFE000FCC, 0x00000003,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xC8 ) & 0xFF)) , 0xFE000FCC, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xD0 ) & 0xFF)) , 0xFE000FCC, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xD8 ) & 0xFF)) , 0xFE000FCC, 0x00000000,

-        
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xE0 ) & 0xFF)) , 0x0000FC88, 0xff000003,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xE4 ) & 0xFF)) , 0x0000FC88, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xE8 ) & 0xFF)) , 0x0000FC88, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xE0 ) & 0xFF)) , 0x0000FC88, 0xff000003,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xE4 ) & 0xFF)) , 0x0000FC88, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0xE8 ) & 0xFF)) , 0x0000FC88, 0x00000000,


@@ -1017,8 +1017,8 @@ static void setup_default_resource_map(void)
 static void sdram_set_registers(const struct mem_controller *ctrl)
 {
        static const unsigned int register_values[] = {
 static void sdram_set_registers(const struct mem_controller *ctrl)
 {
        static const unsigned int register_values[] = {

-        
-        
+
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x44 ) & 0xFF)) , 0x0000f8f8, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x4C ) & 0xFF)) , 0x0000f8f8, 0x00000001,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x54 ) & 0xFF)) , 0x0000f8f8, 0x00000002,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x44 ) & 0xFF)) , 0x0000f8f8, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x4C ) & 0xFF)) , 0x0000f8f8, 0x00000001,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x54 ) & 0xFF)) , 0x0000f8f8, 0x00000002,


@@ -1027,7 +1027,7 @@ static void sdram_set_registers(const struct mem_controller *ctrl)
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x6C ) & 0xFF)) , 0x0000f8f8, 0x00000005,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x74 ) & 0xFF)) , 0x0000f8f8, 0x00000006,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x7C ) & 0xFF)) , 0x0000f8f8, 0x00000007,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x6C ) & 0xFF)) , 0x0000f8f8, 0x00000005,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x74 ) & 0xFF)) , 0x0000f8f8, 0x00000006,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x7C ) & 0xFF)) , 0x0000f8f8, 0x00000007,

-        
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x40 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x48 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x50 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x40 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x48 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x50 ) & 0xFF)) , 0x0000f8fc, 0x00000000,


@@ -1036,7 +1036,7 @@ static void sdram_set_registers(const struct mem_controller *ctrl)
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x68 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x70 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x78 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x68 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x70 ) & 0xFF)) , 0x0000f8fc, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  1 ) & 0x07) << 8) | ((  0x78 ) & 0xFF)) , 0x0000f8fc, 0x00000000,

-        
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x40 ) & 0xFF)) , 0x001f01fe, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x44 ) & 0xFF)) , 0x001f01fe, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x48 ) & 0xFF)) , 0x001f01fe, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x40 ) & 0xFF)) , 0x001f01fe, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x44 ) & 0xFF)) , 0x001f01fe, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x48 ) & 0xFF)) , 0x001f01fe, 0x00000000,


@@ -1045,7 +1045,7 @@ static void sdram_set_registers(const struct mem_controller *ctrl)
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x54 ) & 0xFF)) , 0x001f01fe, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x58 ) & 0xFF)) , 0x001f01fe, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x5C ) & 0xFF)) , 0x001f01fe, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x54 ) & 0xFF)) , 0x001f01fe, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x58 ) & 0xFF)) , 0x001f01fe, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x5C ) & 0xFF)) , 0x001f01fe, 0x00000000,

-        
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x60 ) & 0xFF)) , 0xC01f01ff, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x64 ) & 0xFF)) , 0xC01f01ff, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x68 ) & 0xFF)) , 0xC01f01ff, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x60 ) & 0xFF)) , 0xC01f01ff, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x64 ) & 0xFF)) , 0xC01f01ff, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x68 ) & 0xFF)) , 0xC01f01ff, 0x00000000,


@@ -1054,33 +1054,33 @@ static void sdram_set_registers(const struct mem_controller *ctrl)
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x74 ) & 0xFF)) , 0xC01f01ff, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x78 ) & 0xFF)) , 0xC01f01ff, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x7C ) & 0xFF)) , 0xC01f01ff, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x74 ) & 0xFF)) , 0xC01f01ff, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x78 ) & 0xFF)) , 0xC01f01ff, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x7C ) & 0xFF)) , 0xC01f01ff, 0x00000000,

-        
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x80 ) & 0xFF)) , 0xffff8888, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x80 ) & 0xFF)) , 0xffff8888, 0x00000000,

-        
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x88 ) & 0xFF)) , 0xe8088008, 0x02522001   ,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x88 ) & 0xFF)) , 0xe8088008, 0x02522001   ,

-        
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x8c ) & 0xFF)) , 0xff8fe08e, (0 << 20)|(0 << 8)|(0 << 4)|(0 << 0),
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x8c ) & 0xFF)) , 0xff8fe08e, (0 << 20)|(0 << 8)|(0 << 4)|(0 << 0),

-        
-       ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x90 ) & 0xFF)) , 0xf0000000, 
-       (4 << 25)|(0 << 24)| 
-       (0 << 23)|(0 << 22)|(0 << 21)|(0 << 20)| 
-       (1 << 19)|(0 << 18)|(1 << 17)|(0 << 16)| 
-       (2 << 14)|(0 << 13)|(0 << 12)| 
-       (0 << 11)|(0 << 10)|(0 << 9)|(0 << 8)| 
+
+       ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x90 ) & 0xFF)) , 0xf0000000,
+       (4 << 25)|(0 << 24)|
+       (0 << 23)|(0 << 22)|(0 << 21)|(0 << 20)|
+       (1 << 19)|(0 << 18)|(1 << 17)|(0 << 16)|
+       (2 << 14)|(0 << 13)|(0 << 12)|
+       (0 << 11)|(0 << 10)|(0 << 9)|(0 << 8)|

        (0 << 3) |(0 << 1) |(0 << 0),
        (0 << 3) |(0 << 1) |(0 << 0),

-        
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x94 ) & 0xFF)) , 0xc180f0f0,
        (0 << 29)|(0 << 28)|(0 << 27)|(0 << 26)|(0 << 25)|
        (0 << 20)|(0 << 19)|(3  << 16)|(0 << 8)|(0 << 0),
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x94 ) & 0xFF)) , 0xc180f0f0,
        (0 << 29)|(0 << 28)|(0 << 27)|(0 << 26)|(0 << 25)|
        (0 << 20)|(0 << 19)|(3  << 16)|(0 << 8)|(0 << 0),

-        
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x98 ) & 0xFF)) , 0xfc00ffff, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  2 ) & 0x07) << 8) | ((  0x98 ) & 0xFF)) , 0xfc00ffff, 0x00000000,

-        
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  3 ) & 0x07) << 8) | ((  0x58 ) & 0xFF)) , 0xffe0e0e0, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  3 ) & 0x07) << 8) | ((  0x58 ) & 0xFF)) , 0xffe0e0e0, 0x00000000,

-        
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  3 ) & 0x07) << 8) | ((  0x5C ) & 0xFF)) , 0x0000003e, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  3 ) & 0x07) << 8) | ((  0x5C ) & 0xFF)) , 0x0000003e, 0x00000000,

-        
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  3 ) & 0x07) << 8) | ((  0x60 ) & 0xFF)) , 0xffffff00, 0x00000000,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  3 ) & 0x07) << 8) | ((  0x60 ) & 0xFF)) , 0xffffff00, 0x00000000,

-        
+

        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  3 ) & 0x07) << 8) | ((  0x94 ) & 0xFF)) , 0xffff8000, 0x00000f70,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  3 ) & 0x07) << 8) | ((  0x90 ) & 0xFF)) , 0xffffff80, 0x00000002,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  3 ) & 0x07) << 8) | ((  0x98 ) & 0xFF)) , 0x0000000f, 0x00068300,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  3 ) & 0x07) << 8) | ((  0x94 ) & 0xFF)) , 0xffff8000, 0x00000f70,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  3 ) & 0x07) << 8) | ((  0x90 ) & 0xFF)) , 0xffffff80, 0x00000002,
        ( ((( 0 ) & 0xFF) << 16) | (((  0x18 ) & 0x1f) << 11) | (((  3 ) & 0x07) << 8) | ((  0x98 ) & 0xFF)) , 0x0000000f, 0x00068300,


@@ -1112,14 +1112,14 @@ static int is_dual_channel(const struct mem_controller *ctrl)
 }
 static int is_opteron(const struct mem_controller *ctrl)
 {
 }
 static int is_opteron(const struct mem_controller *ctrl)
 {

-        
+

        uint32_t nbcap;
        nbcap = pci_read_config32(ctrl->f3, 0xE8 );
        return !!(nbcap & 0x0001 );
 }
 static int is_registered(const struct mem_controller *ctrl)
 {
        uint32_t nbcap;
        nbcap = pci_read_config32(ctrl->f3, 0xE8 );
        return !!(nbcap & 0x0001 );
 }
 static int is_registered(const struct mem_controller *ctrl)
 {

-        
+

        uint32_t dcl;
        dcl = pci_read_config32(ctrl->f2, 0x90 );
        return !(dcl & (1<<18) );
        uint32_t dcl;
        dcl = pci_read_config32(ctrl->f2, 0x90 );
        return !(dcl & (1<<18) );


@@ -1130,45 +1130,45 @@ struct dimm_size {
 };
 static struct dimm_size spd_get_dimm_size(unsigned device)
 {
 };
 static struct dimm_size spd_get_dimm_size(unsigned device)
 {

-        
+

        struct dimm_size sz;
        int value, low;
        sz.side1 = 0;
        sz.side2 = 0;
        struct dimm_size sz;
        int value, low;
        sz.side1 = 0;
        sz.side2 = 0;

-        
-       value = spd_read_byte(device, 3);        
+
+       value = spd_read_byte(device, 3);

        if (value < 0) goto out;
        sz.side1 += value & 0xf;
        if (value < 0) goto out;
        sz.side1 += value & 0xf;

-       value = spd_read_byte(device, 4);        
+       value = spd_read_byte(device, 4);

        if (value < 0) goto out;
        sz.side1 += value & 0xf;
        if (value < 0) goto out;
        sz.side1 += value & 0xf;

-       value = spd_read_byte(device, 17);       
+       value = spd_read_byte(device, 17);

        if (value < 0) goto out;
        sz.side1 += log2(value & 0xff);
        if (value < 0) goto out;
        sz.side1 += log2(value & 0xff);

-        
-       value = spd_read_byte(device, 7);        
+
+       value = spd_read_byte(device, 7);

        if (value < 0) goto out;
        value &= 0xff;
        value <<= 8;
        if (value < 0) goto out;
        value &= 0xff;
        value <<= 8;

-       
-       low = spd_read_byte(device, 6);  
+
+       low = spd_read_byte(device, 6);

        if (low < 0) goto out;
        value = value | (low & 0xff);
        sz.side1 += log2(value);
        if (low < 0) goto out;
        value = value | (low & 0xff);
        sz.side1 += log2(value);

-        
-       value = spd_read_byte(device, 5);        
+
+       value = spd_read_byte(device, 5);

        if (value <= 1) goto out;
        if (value <= 1) goto out;

-        
+

        sz.side2 = sz.side1;
        sz.side2 = sz.side1;

-       value = spd_read_byte(device, 3);        
+       value = spd_read_byte(device, 3);

        if (value < 0) goto out;
        if (value < 0) goto out;

-       if ((value & 0xf0) == 0) goto out;       
-       sz.side2 -= (value & 0x0f);              
-       sz.side2 += ((value >> 4) & 0x0f);       
-       value = spd_read_byte(device, 4);        
+       if ((value & 0xf0) == 0) goto out;
+       sz.side2 -= (value & 0x0f);
+       sz.side2 += ((value >> 4) & 0x0f);
+       value = spd_read_byte(device, 4);

        if (value < 0) goto out;
        if (value < 0) goto out;

-       sz.side2 -= (value & 0x0f);              
-       sz.side2 += ((value >> 4) & 0x0f);       
+       sz.side2 -= (value & 0x0f);
+       sz.side2 += ((value >> 4) & 0x0f);

  out:
        return sz;
 }
  out:
        return sz;
 }


@@ -1181,32 +1181,32 @@ static void set_dimm_size(const struct mem_controller *ctrl, struct dimm_size sz
        }
        map = pci_read_config32(ctrl->f2, 0x80 );
        map &= ~(0xf << (index + 4));
        }
        map = pci_read_config32(ctrl->f2, 0x80 );
        map &= ~(0xf << (index + 4));

-        
-       
+
+

        base0 = base1 = 0;
        base0 = base1 = 0;

-        
+

        if (sz.side1 >= (25 +3)) {
                map |= (sz.side1 - (25 + 3)) << (index *4);
                base0 = (1 << ((sz.side1 - (25 + 3)) + 21)) | 1;
        }
        if (sz.side1 >= (25 +3)) {
                map |= (sz.side1 - (25 + 3)) << (index *4);
                base0 = (1 << ((sz.side1 - (25 + 3)) + 21)) | 1;
        }

-        
+

        if (sz.side2 >= (25 + 3)) {
                base1 = (1 << ((sz.side2 - (25 + 3)) + 21)) | 1;
        }
        if (sz.side2 >= (25 + 3)) {
                base1 = (1 << ((sz.side2 - (25 + 3)) + 21)) | 1;
        }

-        
+

        if (is_dual_channel(ctrl)) {
                base0 = (base0 << 1) | (base0 & 1);
                base1 = (base1 << 1) | (base1 & 1);
        }
        if (is_dual_channel(ctrl)) {
                base0 = (base0 << 1) | (base0 & 1);
                base1 = (base1 << 1) | (base1 & 1);
        }

-        
+

        base0 &= ~0x001ffffe;
        base1 &= ~0x001ffffe;
        base0 &= ~0x001ffffe;
        base1 &= ~0x001ffffe;

-        
+

        pci_write_config32(ctrl->f2, 0x40  + (((index << 1)+0)<<2), base0);
        pci_write_config32(ctrl->f2, 0x40  + (((index << 1)+1)<<2), base1);
        pci_write_config32(ctrl->f2, 0x80 , map);
        pci_write_config32(ctrl->f2, 0x40  + (((index << 1)+0)<<2), base0);
        pci_write_config32(ctrl->f2, 0x40  + (((index << 1)+1)<<2), base1);
        pci_write_config32(ctrl->f2, 0x80 , map);

-       
-        
+
+

        if (base0) {
                dch = pci_read_config32(ctrl->f2, 0x94 );
                dch |= (1 << 26)  << index;
        if (base0) {
                dch = pci_read_config32(ctrl->f2, 0x94 );
                dch |= (1 << 26)  << index;


@@ -1216,7 +1216,7 @@ static void set_dimm_size(const struct mem_controller *ctrl, struct dimm_size sz
 static void spd_set_ram_size(const struct mem_controller *ctrl)
 {
        int i;
 static void spd_set_ram_size(const struct mem_controller *ctrl)
 {
        int i;

-       
+

        for(i = 0; (i < 4) && (ctrl->channel0[i]); i++) {
                struct dimm_size sz;
                sz = spd_get_dimm_size(ctrl->channel0[i]);
        for(i = 0; (i < 4) && (ctrl->channel0[i]); i++) {
                struct dimm_size sz;
                sz = spd_get_dimm_size(ctrl->channel0[i]);


@@ -1226,7 +1226,7 @@ static void spd_set_ram_size(const struct mem_controller *ctrl)
 static void route_dram_accesses(const struct mem_controller *ctrl,
        unsigned long base_k, unsigned long limit_k)
 {
 static void route_dram_accesses(const struct mem_controller *ctrl,
        unsigned long base_k, unsigned long limit_k)
 {

-        
+

        unsigned node_id;
        unsigned limit;
        unsigned base;
        unsigned node_id;
        unsigned limit;
        unsigned base;


@@ -1251,25 +1251,25 @@ static void route_dram_accesses(const struct mem_controller *ctrl,
 }
 static void set_top_mem(unsigned tom_k)
 {
 }
 static void set_top_mem(unsigned tom_k)
 {

-        
+

        if (!tom_k) {
                set_bios_reset();
                print_debug("No memory - reset");
        if (!tom_k) {
                set_bios_reset();
                print_debug("No memory - reset");

-                
+

                pci_write_config8(( ((( 0 ) & 0xFF) << 16) | (((  0x04 ) & 0x1f) << 11) | (((  3 )  & 0x7) << 8)) , 0x41, 0xf1);
                pci_write_config8(( ((( 0 ) & 0xFF) << 16) | (((  0x04 ) & 0x1f) << 11) | (((  3 )  & 0x7) << 8)) , 0x41, 0xf1);

-                
+

                outb(0x0e, 0x0cf9);
        }
                outb(0x0e, 0x0cf9);
        }

-        
+

        print_debug("RAM: 0x");
        print_debug_hex32(tom_k);
        print_debug(" KB\r\n");
        print_debug("RAM: 0x");
        print_debug_hex32(tom_k);
        print_debug(" KB\r\n");

-        
+

        msr_t msr;
        msr.lo = (tom_k & 0x003fffff) << 10;
        msr.hi = (tom_k & 0xffc00000) >> 22;
        wrmsr(0xC001001D , msr);
        msr_t msr;
        msr.lo = (tom_k & 0x003fffff) << 10;
        msr.hi = (tom_k & 0xffc00000) >> 22;
        wrmsr(0xC001001D , msr);

-        
+

        if (tom_k >= 0x003f0000) {
                tom_k = 0x3f0000;
        }
        if (tom_k >= 0x003f0000) {
                tom_k = 0x3f0000;
        }


@@ -1279,15 +1279,15 @@ static void set_top_mem(unsigned tom_k)
 }
 static unsigned long interleave_chip_selects(const struct mem_controller *ctrl)
 {
 }
 static unsigned long interleave_chip_selects(const struct mem_controller *ctrl)
 {

-        
-       static const uint32_t csbase_low[] = { 
+
+       static const uint32_t csbase_low[] = {

                (1 << (13 - 4)),
                (1 << (14 - 4)),
                (1 << (13 - 4)),
                (1 << (14 - 4)),

-               (1 << (14 - 4)), 
+               (1 << (14 - 4)),

                (1 << (15 - 4)),
                (1 << (15 - 4)),
                (1 << (16 - 4)),
                (1 << (15 - 4)),
                (1 << (15 - 4)),
                (1 << (16 - 4)),

-               (1 << (16 - 4)), 
+               (1 << (16 - 4)),

        };
        uint32_t csbase_inc;
        int chip_selects, index;
        };
        uint32_t csbase_inc;
        int chip_selects, index;


@@ -1295,16 +1295,16 @@ static unsigned long interleave_chip_selects(const struct mem_controller *ctrl)
        int dual_channel;
        unsigned common_size;
        uint32_t csbase, csmask;
        int dual_channel;
        unsigned common_size;
        uint32_t csbase, csmask;

-        
+

        chip_selects = 0;
        common_size = 0;
        for(index = 0; index < 8; index++) {
                unsigned size;
                uint32_t value;
        chip_selects = 0;
        common_size = 0;
        for(index = 0; index < 8; index++) {
                unsigned size;
                uint32_t value;

-               
+

                value = pci_read_config32(ctrl->f2, 0x40  + (index << 2));
                value = pci_read_config32(ctrl->f2, 0x40  + (index << 2));

-               
-                
+
+

                if (!(value & 1)) {
                        continue;
                }
                if (!(value & 1)) {
                        continue;
                }


@@ -1313,36 +1313,36 @@ static unsigned long interleave_chip_selects(const struct mem_controller *ctrl)
                if (common_size == 0) {
                        common_size = size;
                }
                if (common_size == 0) {
                        common_size = size;
                }

-                
+

                if (common_size != size) {
                        return 0;
                }
        }
                if (common_size != size) {
                        return 0;
                }
        }

-        
+

        bits = log2(chip_selects);
        if (((1 << bits) != chip_selects) || (bits < 1) || (bits > 3)) {
                return 0;
        bits = log2(chip_selects);
        if (((1 << bits) != chip_selects) || (bits < 1) || (bits > 3)) {
                return 0;

-               
+

        }
        }

-        
+

        if ((bits == 3) && (common_size == (1 << (32 - 3)))) {
                print_debug("8 4GB chip selects cannot be interleaved\r\n");
                return 0;
        }
        if ((bits == 3) && (common_size == (1 << (32 - 3)))) {
                print_debug("8 4GB chip selects cannot be interleaved\r\n");
                return 0;
        }

-        
+

        if (is_dual_channel(ctrl)) {
                csbase_inc = csbase_low[log2(common_size) - 1] << 1;
        } else {
                csbase_inc = csbase_low[log2(common_size)];
        }
        if (is_dual_channel(ctrl)) {
                csbase_inc = csbase_low[log2(common_size) - 1] << 1;
        } else {
                csbase_inc = csbase_low[log2(common_size)];
        }

-        
+

        csbase = 0 | 1;
        csmask = (((common_size  << bits) - 1) << 21);
        csmask |= 0xfe00 & ~((csbase_inc << bits) - csbase_inc);
        for(index = 0; index < 8; index++) {
                uint32_t value;
                value = pci_read_config32(ctrl->f2, 0x40  + (index << 2));
        csbase = 0 | 1;
        csmask = (((common_size  << bits) - 1) << 21);
        csmask |= 0xfe00 & ~((csbase_inc << bits) - csbase_inc);
        for(index = 0; index < 8; index++) {
                uint32_t value;
                value = pci_read_config32(ctrl->f2, 0x40  + (index << 2));

-                
+

                if (!(value & 1)) {
                        continue;
                }
                if (!(value & 1)) {
                        continue;
                }


@@ -1350,19 +1350,19 @@ static unsigned long interleave_chip_selects(const struct mem_controller *ctrl)
                pci_write_config32(ctrl->f2, 0x60  + (index << 2), csmask);
                csbase += csbase_inc;
        }
                pci_write_config32(ctrl->f2, 0x60  + (index << 2), csmask);
                csbase += csbase_inc;
        }

-       
+

        print_debug("Interleaved\r\n");
        print_debug("Interleaved\r\n");

-        
+

        return common_size << (15 + bits);
 }
 static unsigned long order_chip_selects(const struct mem_controller *ctrl)
 {
        unsigned long tom;
        return common_size << (15 + bits);
 }
 static unsigned long order_chip_selects(const struct mem_controller *ctrl)
 {
        unsigned long tom;

-       
-        
+
+

        tom = 0;
        for(;;) {
        tom = 0;
        for(;;) {

-                
+

                unsigned index, canidate;
                uint32_t csbase, csmask;
                unsigned size;
                unsigned index, canidate;
                uint32_t csbase, csmask;
                unsigned size;


@@ -1371,46 +1371,46 @@ static unsigned long order_chip_selects(const struct mem_controller *ctrl)
                for(index = 0; index < 8; index++) {
                        uint32_t value;
                        value = pci_read_config32(ctrl->f2, 0x40  + (index << 2));
                for(index = 0; index < 8; index++) {
                        uint32_t value;
                        value = pci_read_config32(ctrl->f2, 0x40  + (index << 2));

-                        
+

                        if (!(value & 1)) {
                                continue;
                        }
                        if (!(value & 1)) {
                                continue;
                        }

-                       
-                        
+
+

                        if (value <= csbase) {
                                continue;
                        }
                        if (value <= csbase) {
                                continue;
                        }

-                       
-                        
+
+

                        if (tom & (1 << (index + 24))) {
                                continue;
                        }
                        if (tom & (1 << (index + 24))) {
                                continue;
                        }

-                        
+

                        csbase = value;
                        canidate = index;
                }
                        csbase = value;
                        canidate = index;
                }

-                
+

                if (csbase == 0) {
                        break;
                }
                if (csbase == 0) {
                        break;
                }

-                
+

                size = csbase >> 21;
                size = csbase >> 21;

-                
+

                tom |= (1 << (canidate + 24));
                tom |= (1 << (canidate + 24));

-                
+

                csbase = (tom << 21) | 1;
                csbase = (tom << 21) | 1;

-                
+

                tom += size;
                tom += size;

-                
+

                csmask = ((size -1) << 21);
                csmask = ((size -1) << 21);

-               csmask |= 0xfe00;                
-                
+               csmask |= 0xfe00;
+

                pci_write_config32(ctrl->f2, 0x40  + (canidate << 2), csbase);
                pci_write_config32(ctrl->f2, 0x40  + (canidate << 2), csbase);

-                
+

                pci_write_config32(ctrl->f2, 0x60  + (canidate << 2), csmask);
                pci_write_config32(ctrl->f2, 0x60  + (canidate << 2), csmask);

-               
+

        }
        }

-        
+

        return (tom & ~0xff000000) << 15;
 }
 static void order_dimms(const struct mem_controller *ctrl)
        return (tom & ~0xff000000) << 15;
 }
 static void order_dimms(const struct mem_controller *ctrl)


@@ -1421,14 +1421,14 @@ static void order_dimms(const struct mem_controller *ctrl)
        if (!tom_k) {
                tom_k = order_chip_selects(ctrl);
        }
        if (!tom_k) {
                tom_k = order_chip_selects(ctrl);
        }

-        
+

        base_k = 0;
        for(node_id = 0; node_id < ctrl->node_id; node_id++) {
                uint32_t limit, base;
                unsigned index;
                index = node_id << 3;
                base = pci_read_config32(ctrl->f1, 0x40 + index);
        base_k = 0;
        for(node_id = 0; node_id < ctrl->node_id; node_id++) {
                uint32_t limit, base;
                unsigned index;
                index = node_id << 3;
                base = pci_read_config32(ctrl->f1, 0x40 + index);

-                
+

                if ((base & 3) == 3) {
                        limit = pci_read_config32(ctrl->f1, 0x44 + index);
                        base_k = ((limit + 0x00010000) & 0xffff0000) >> 2;
                if ((base & 3) == 3) {
                        limit = pci_read_config32(ctrl->f1, 0x44 + index);
                        base_k = ((limit + 0x00010000) & 0xffff0000) >> 2;


@@ -1440,8 +1440,8 @@ static void order_dimms(const struct mem_controller *ctrl)
 }
 static void disable_dimm(const struct mem_controller *ctrl, unsigned index)
 {
 }
 static void disable_dimm(const struct mem_controller *ctrl, unsigned index)
 {

-       print_debug("disabling dimm"); 
-       print_debug_hex8(index); 
+       print_debug("disabling dimm");
+       print_debug_hex8(index);

        print_debug("\r\n");
        pci_write_config32(ctrl->f2, 0x40  + (((index << 1)+0)<<2), 0);
        pci_write_config32(ctrl->f2, 0x40  + (((index << 1)+1)<<2), 0);
        print_debug("\r\n");
        pci_write_config32(ctrl->f2, 0x40  + (((index << 1)+0)<<2), 0);
        pci_write_config32(ctrl->f2, 0x40  + (((index << 1)+1)<<2), 0);


@@ -1461,11 +1461,11 @@ static void spd_handle_unbuffered_dimms(const struct mem_controller *ctrl)
                        disable_dimm(ctrl, i);
                        continue;
                }
                        disable_dimm(ctrl, i);
                        continue;
                }

-                
+

                if (value & (1 << 1)) {
                        registered = 1;
                if (value & (1 << 1)) {
                        registered = 1;

-               } 
-                
+               }
+

                else {
                        unbuffered = 1;
                }
                else {
                        unbuffered = 1;
                }


@@ -1487,29 +1487,29 @@ static void spd_enable_2channels(const struct mem_controller *ctrl)
 {
        int i;
        uint32_t nbcap;
 {
        int i;
        uint32_t nbcap;

-        
-        
+
+

        static const unsigned addresses[] = {
        static const unsigned addresses[] = {

-               2,       
-               3,       
-               4,       
-               5,       
-               6,       
-               7,       
-               9,       
-               11,      
-               13,      
-               17,      
-               18,      
-               21,      
-               23,      
-               26,      
-               27,      
-               28,      
-               29,      
-               30,      
-               41,      
-               42,      
+               2,
+               3,
+               4,
+               5,
+               6,
+               7,
+               9,
+               11,
+               13,
+               17,
+               18,
+               21,
+               23,
+               26,
+               27,
+               28,
+               29,
+               30,
+               41,
+               42,

        };
        nbcap = pci_read_config32(ctrl->f3, 0xE8 );
        if (!(nbcap & 0x0001 )) {
        };
        nbcap = pci_read_config32(ctrl->f3, 0xE8 );
        if (!(nbcap & 0x0001 )) {


@@ -1548,7 +1548,7 @@ static void spd_enable_2channels(const struct mem_controller *ctrl)
 }
 struct mem_param {
        uint8_t cycle_time;
 }
 struct mem_param {
        uint8_t cycle_time;

-       uint8_t divisor;  
+       uint8_t divisor;

        uint8_t tRC;
        uint8_t tRFC;
        uint32_t dch_memclk;
        uint8_t tRC;
        uint8_t tRFC;
        uint32_t dch_memclk;


@@ -1621,35 +1621,35 @@ static const struct mem_param *get_mem_param(unsigned min_cycle_time)
 }
 static const struct mem_param *spd_set_memclk(const struct mem_controller *ctrl)
 {
 }
 static const struct mem_param *spd_set_memclk(const struct mem_controller *ctrl)
 {

-        
+

        const struct mem_param *param;
        unsigned min_cycle_time, min_latency;
        int i;
        uint32_t value;
        static const int latency_indicies[] = { 26, 23, 9 };
        static const unsigned char min_cycle_times[] = {
        const struct mem_param *param;
        unsigned min_cycle_time, min_latency;
        int i;
        uint32_t value;
        static const int latency_indicies[] = { 26, 23, 9 };
        static const unsigned char min_cycle_times[] = {

-               [0 ] = 0x50,  
-               [1 ] = 0x60,  
-               [2 ] = 0x75,  
-               [3 ] = 0xa0,  
+               [0 ] = 0x50,
+               [1 ] = 0x60,
+               [2 ] = 0x75,
+               [3 ] = 0xa0,

        };
        value = pci_read_config32(ctrl->f3, 0xE8 );
        min_cycle_time = min_cycle_times[(value >> 5 ) & 3 ];
        min_latency = 2;
        };
        value = pci_read_config32(ctrl->f3, 0xE8 );
        min_cycle_time = min_cycle_times[(value >> 5 ) & 3 ];
        min_latency = 2;

-        
+

        for(i = 0; (i < 4) && (ctrl->channel0[i]); i++) {
                int new_cycle_time, new_latency;
                int index;
                int latencies;
                int latency;
        for(i = 0; (i < 4) && (ctrl->channel0[i]); i++) {
                int new_cycle_time, new_latency;
                int index;
                int latencies;
                int latency;

-                
+

                new_cycle_time = 0xa0;
                new_latency = 5;
                latencies = spd_read_byte(ctrl->channel0[i], 18);
                if (latencies <= 0) continue;
                new_cycle_time = 0xa0;
                new_latency = 5;
                latencies = spd_read_byte(ctrl->channel0[i], 18);
                if (latencies <= 0) continue;

-                
+

                latency = log2(latencies) -2;
                latency = log2(latencies) -2;

-                
+

                for(index = 0; index < 3; index++, latency++) {
                        int value;
                        if ((latency < 2) || (latency > 4) ||
                for(index = 0; index < 3; index++, latency++) {
                        int value;
                        if ((latency < 2) || (latency > 4) ||


@@ -1660,7 +1660,7 @@ static const struct mem_param *spd_set_memclk(const struct mem_controller *ctrl)
                        if (value < 0) {
                                continue;
                        }
                        if (value < 0) {
                                continue;
                        }

-                        
+

                        if ((value >= min_cycle_time) && (value < new_cycle_time)) {
                                new_cycle_time = value;
                                new_latency = latency;
                        if ((value >= min_cycle_time) && (value < new_cycle_time)) {
                                new_cycle_time = value;
                                new_latency = latency;


@@ -1669,17 +1669,17 @@ static const struct mem_param *spd_set_memclk(const struct mem_controller *ctrl)
                if (new_latency > 4){
                        continue;
                }
                if (new_latency > 4){
                        continue;
                }

-                
+

                if (new_cycle_time > min_cycle_time) {
                        min_cycle_time = new_cycle_time;
                }
                if (new_cycle_time > min_cycle_time) {
                        min_cycle_time = new_cycle_time;
                }

-                
+

                if (new_latency > min_latency) {
                        min_latency = new_latency;
                }
        }
                if (new_latency > min_latency) {
                        min_latency = new_latency;
                }
        }

-        
-       
+
+

        for(i = 0; (i < 4) && (ctrl->channel0[i]); i++) {
                int latencies;
                int latency;
        for(i = 0; (i < 4) && (ctrl->channel0[i]); i++) {
                int latencies;
                int latency;


@@ -1690,9 +1690,9 @@ static const struct mem_param *spd_set_memclk(const struct mem_controller *ctrl)
                if (latencies <= 0) {
                        goto dimm_err;
                }
                if (latencies <= 0) {
                        goto dimm_err;
                }

-                
+

                latency = log2(latencies) -2;
                latency = log2(latencies) -2;

-                
+

                for(index = 0; index < 3; index++, latency++) {
                        if (!(latencies & (1 << latency))) {
                                continue;
                for(index = 0; index < 3; index++, latency++) {
                        if (!(latencies & (1 << latency))) {
                                continue;


@@ -1700,36 +1700,36 @@ static const struct mem_param *spd_set_memclk(const struct mem_controller *ctrl)
                        if (latency == min_latency)
                                break;
                }
                        if (latency == min_latency)
                                break;
                }

-                
+

                if ((latency != min_latency) || (index >= 3)) {
                        goto dimm_err;
                }
                if ((latency != min_latency) || (index >= 3)) {
                        goto dimm_err;
                }

-               
-                
+
+

                value = spd_read_byte(ctrl->channel0[i], latency_indicies[index]);
                value = spd_read_byte(ctrl->channel0[i], latency_indicies[index]);

-               
-                
+
+

                if (value <= min_cycle_time) {
                        continue;
                }
                if (value <= min_cycle_time) {
                        continue;
                }

-                
+

        dimm_err:
                disable_dimm(ctrl, i);
        }
        dimm_err:
                disable_dimm(ctrl, i);
        }

-        
+

        param = get_mem_param(min_cycle_time);
        param = get_mem_param(min_cycle_time);

-        
+

        value = pci_read_config32(ctrl->f2, 0x94 );
        value &= ~(0x7  << 20 );
        value |= param->dch_memclk;
        pci_write_config32(ctrl->f2, 0x94 , value);
        static const unsigned latencies[] = { 1 , 5 , 2  };
        value = pci_read_config32(ctrl->f2, 0x94 );
        value &= ~(0x7  << 20 );
        value |= param->dch_memclk;
        pci_write_config32(ctrl->f2, 0x94 , value);
        static const unsigned latencies[] = { 1 , 5 , 2  };

-        
+

        value = pci_read_config32(ctrl->f2, 0x88 );
        value &= ~(0x7  << 0 );
        value |= latencies[min_latency - 2] << 0 ;
        pci_write_config32(ctrl->f2, 0x88 , value);
        value = pci_read_config32(ctrl->f2, 0x88 );
        value &= ~(0x7  << 0 );
        value |= latencies[min_latency - 2] << 0 ;
        pci_write_config32(ctrl->f2, 0x88 , value);

-       
+

        return param;
 }
 static int update_dimm_Trc(const struct mem_controller *ctrl, const struct mem_param *param, int i)
        return param;
 }
 static int update_dimm_Trc(const struct mem_controller *ctrl, const struct mem_param *param, int i)


@@ -1974,7 +1974,7 @@ static void set_Twtr(const struct mem_controller *ctrl, const struct mem_param *
 {
        uint32_t dth;
        unsigned clocks;
 {
        uint32_t dth;
        unsigned clocks;

-       clocks = 1;  
+       clocks = 1;

        dth = pci_read_config32(ctrl->f2, 0x8c );
        dth &= ~(0x1  << 0 );
        dth |= ((clocks - 1 ) << 0 );
        dth = pci_read_config32(ctrl->f2, 0x8c );
        dth &= ~(0x1  << 0 );
        dth |= ((clocks - 1 ) << 0 );


@@ -1993,11 +1993,11 @@ static void set_Trwt(const struct mem_controller *ctrl, const struct mem_param *
        if (is_opteron(ctrl)) {
                if (latency == 1 ) {
                        if (divisor == ((6 << 0) + 0)) {
        if (is_opteron(ctrl)) {
                if (latency == 1 ) {
                        if (divisor == ((6 << 0) + 0)) {

-                                
+

                                clocks = 3;
                        }
                        else if (divisor > ((6 << 0)+0)) {
                                clocks = 3;
                        }
                        else if (divisor > ((6 << 0)+0)) {

-                                
+

                                clocks = 2;
                        }
                }
                                clocks = 2;
                        }
                }


@@ -2006,11 +2006,11 @@ static void set_Trwt(const struct mem_controller *ctrl, const struct mem_param *
                }
                else if (latency == 2 ) {
                        if (divisor == ((6 << 0)+0)) {
                }
                else if (latency == 2 ) {
                        if (divisor == ((6 << 0)+0)) {

-                                
+

                                clocks = 4;
                        }
                        else if (divisor > ((6 << 0)+0)) {
                                clocks = 4;
                        }
                        else if (divisor > ((6 << 0)+0)) {

-                                
+

                                clocks = 3;
                        }
                }
                                clocks = 3;
                        }
                }


@@ -2042,7 +2042,7 @@ static void set_Trwt(const struct mem_controller *ctrl, const struct mem_param *
        if ((clocks < 1 ) || (clocks > 6 )) {
                die("Unknown Trwt");
        }
        if ((clocks < 1 ) || (clocks > 6 )) {
                die("Unknown Trwt");
        }

-       
+

        dth = pci_read_config32(ctrl->f2, 0x8c );
        dth &= ~(0x7  << 4 );
        dth |= ((clocks - 1 ) << 4 );
        dth = pci_read_config32(ctrl->f2, 0x8c );
        dth &= ~(0x7  << 4 );
        dth |= ((clocks - 1 ) << 4 );


@@ -2051,7 +2051,7 @@ static void set_Trwt(const struct mem_controller *ctrl, const struct mem_param *
 }
 static void set_Twcl(const struct mem_controller *ctrl, const struct mem_param *param)
 {
 }
 static void set_Twcl(const struct mem_controller *ctrl, const struct mem_param *param)
 {

-        
+

        uint32_t dth;
        unsigned clocks;
        if (is_registered(ctrl)) {
        uint32_t dth;
        unsigned clocks;
        if (is_registered(ctrl)) {


@@ -2075,19 +2075,19 @@ static void set_read_preamble(const struct mem_controller *ctrl, const struct me
        rdpreamble = 0;
        if (is_registered(ctrl)) {
                if (divisor == ((10 << 1)+0)) {
        rdpreamble = 0;
        if (is_registered(ctrl)) {
                if (divisor == ((10 << 1)+0)) {

-                        
+

                        rdpreamble = ((9 << 1)+ 0);
                }
                else if (divisor == ((7 << 1)+1)) {
                        rdpreamble = ((9 << 1)+ 0);
                }
                else if (divisor == ((7 << 1)+1)) {

-                        
+

                        rdpreamble = ((8 << 1)+0);
                }
                else if (divisor == ((6 << 1)+0)) {
                        rdpreamble = ((8 << 1)+0);
                }
                else if (divisor == ((6 << 1)+0)) {

-                        
+

                        rdpreamble = ((7 << 1)+1);
                }
                else if (divisor == ((5 << 1)+0)) {
                        rdpreamble = ((7 << 1)+1);
                }
                else if (divisor == ((5 << 1)+0)) {

-                        
+

                        rdpreamble = ((7 << 1)+0);
                }
        }
                        rdpreamble = ((7 << 1)+0);
                }
        }


@@ -2101,42 +2101,42 @@ static void set_read_preamble(const struct mem_controller *ctrl, const struct me
                        }
                }
                if (divisor == ((10 << 1)+0)) {
                        }
                }
                if (divisor == ((10 << 1)+0)) {

-                        
+

                        if (slots <= 2) {
                        if (slots <= 2) {

-                                
+

                                rdpreamble = ((9 << 1)+0);
                        } else {
                                rdpreamble = ((9 << 1)+0);
                        } else {

-                                
+

                                rdpreamble = ((14 << 1)+0);
                        }
                }
                else if (divisor == ((7 << 1)+1)) {
                                rdpreamble = ((14 << 1)+0);
                        }
                }
                else if (divisor == ((7 << 1)+1)) {

-                        
+

                        if (slots <= 2) {
                        if (slots <= 2) {

-                                
+

                                rdpreamble = ((7 << 1)+0);
                        } else {
                                rdpreamble = ((7 << 1)+0);
                        } else {

-                                
+

                                rdpreamble = ((11 << 1)+0);
                        }
                }
                else if (divisor == ((6 << 1)+0)) {
                                rdpreamble = ((11 << 1)+0);
                        }
                }
                else if (divisor == ((6 << 1)+0)) {

-                        
+

                        if (slots <= 2) {
                        if (slots <= 2) {

-                                
+

                                rdpreamble = ((7 << 1)+0);
                        } else {
                                rdpreamble = ((7 << 1)+0);
                        } else {

-                                
+

                                rdpreamble = ((9 << 1)+0);
                        }
                }
                else if (divisor == ((5 << 1)+0)) {
                                rdpreamble = ((9 << 1)+0);
                        }
                }
                else if (divisor == ((5 << 1)+0)) {

-                        
+

                        if (slots <= 2) {
                        if (slots <= 2) {

-                                
+

                                rdpreamble = ((5 << 1)+0);
                        } else {
                                rdpreamble = ((5 << 1)+0);
                        } else {

-                                
+

                                rdpreamble = ((7 << 1)+0);
                        }
                }
                                rdpreamble = ((7 << 1)+0);
                        }
                }


@@ -2159,11 +2159,11 @@ static void set_max_async_latency(const struct mem_controller *ctrl, const struc
        async_lat = 0;
        if (is_registered(ctrl)) {
                if (dimms == 4) {
        async_lat = 0;
        if (is_registered(ctrl)) {
                if (dimms == 4) {

-                        
+

                        async_lat = 9;
                        async_lat = 9;

-               } 
+               }

                else {
                else {

-                        
+

                        async_lat = 8;
                }
        }
                        async_lat = 8;
                }
        }


@@ -2172,11 +2172,11 @@ static void set_max_async_latency(const struct mem_controller *ctrl, const struc
                        die("Too many unbuffered dimms");
                }
                else if (dimms == 3) {
                        die("Too many unbuffered dimms");
                }
                else if (dimms == 3) {

-                        
+

                        async_lat = 7;
                }
                else {
                        async_lat = 7;
                }
                else {

-                        
+

                        async_lat = 6;
                }
        }
                        async_lat = 6;
                }
        }


@@ -2186,7 +2186,7 @@ static void set_max_async_latency(const struct mem_controller *ctrl, const struc
 static void set_idle_cycle_limit(const struct mem_controller *ctrl, const struct mem_param *param)
 {
        uint32_t dch;
 static void set_idle_cycle_limit(const struct mem_controller *ctrl, const struct mem_param *param)
 {
        uint32_t dch;

-        
+

        dch = pci_read_config32(ctrl->f2, 0x94 );
        dch &= ~(0x7  << 16 );
        dch |= 3  << 16 ;
        dch = pci_read_config32(ctrl->f2, 0x94 );
        dch &= ~(0x7  << 16 );
        dch |= 3  << 16 ;


@@ -2198,39 +2198,39 @@ static void spd_set_dram_timing(const struct mem_controller *ctrl, const struct
        int dimms;
        int i;
        int rc;
        int dimms;
        int i;
        int rc;

-       
+

        init_Tref(ctrl, param);
        for(i = 0; (i < 4) && ctrl->channel0[i]; i++) {
                int rc;
        init_Tref(ctrl, param);
        for(i = 0; (i < 4) && ctrl->channel0[i]; i++) {
                int rc;

-                
+

                if (update_dimm_Trc (ctrl, param, i) < 0) goto dimm_err;
                if (update_dimm_Trfc(ctrl, param, i) < 0) goto dimm_err;
                if (update_dimm_Trcd(ctrl, param, i) < 0) goto dimm_err;
                if (update_dimm_Trrd(ctrl, param, i) < 0) goto dimm_err;
                if (update_dimm_Tras(ctrl, param, i) < 0) goto dimm_err;
                if (update_dimm_Trp (ctrl, param, i) < 0) goto dimm_err;
                if (update_dimm_Trc (ctrl, param, i) < 0) goto dimm_err;
                if (update_dimm_Trfc(ctrl, param, i) < 0) goto dimm_err;
                if (update_dimm_Trcd(ctrl, param, i) < 0) goto dimm_err;
                if (update_dimm_Trrd(ctrl, param, i) < 0) goto dimm_err;
                if (update_dimm_Tras(ctrl, param, i) < 0) goto dimm_err;
                if (update_dimm_Trp (ctrl, param, i) < 0) goto dimm_err;

-                
+

                if (update_dimm_Tref(ctrl, param, i) < 0) goto dimm_err;
                if (update_dimm_Tref(ctrl, param, i) < 0) goto dimm_err;

-                
+

                if (update_dimm_x4 (ctrl, param, i) < 0) goto dimm_err;
                if (update_dimm_ecc(ctrl, param, i) < 0) goto dimm_err;
                continue;
        dimm_err:
                disable_dimm(ctrl, i);
                if (update_dimm_x4 (ctrl, param, i) < 0) goto dimm_err;
                if (update_dimm_ecc(ctrl, param, i) < 0) goto dimm_err;
                continue;
        dimm_err:
                disable_dimm(ctrl, i);

-               
+

        }
        }

-        
+

        set_Twr(ctrl, param);
        set_Twr(ctrl, param);

-        
+

        set_Twtr(ctrl, param);
        set_Trwt(ctrl, param);
        set_Twcl(ctrl, param);
        set_Twtr(ctrl, param);
        set_Trwt(ctrl, param);
        set_Twcl(ctrl, param);

-        
+

        set_read_preamble(ctrl, param);
        set_max_async_latency(ctrl, param);
        set_idle_cycle_limit(ctrl, param);
 }
        set_read_preamble(ctrl, param);
        set_max_async_latency(ctrl, param);
        set_idle_cycle_limit(ctrl, param);
 }

-static void sdram_set_spd_registers(const struct mem_controller *ctrl) 
+static void sdram_set_spd_registers(const struct mem_controller *ctrl)

 {
        const struct mem_param *param;
        spd_enable_2channels(ctrl);
 {
        const struct mem_param *param;
        spd_enable_2channels(ctrl);


@@ -2243,18 +2243,18 @@ static void sdram_set_spd_registers(const struct mem_controller *ctrl)
 static void sdram_enable(int controllers, const struct mem_controller *ctrl)
 {
        int i;
 static void sdram_enable(int controllers, const struct mem_controller *ctrl)
 {
        int i;

-        
+

        for(i = 0; i < controllers; i++) {
                uint32_t dch;
                dch = pci_read_config32(ctrl[i].f2, 0x94 );
                dch |= (1 << 25) ;
                pci_write_config32(ctrl[i].f2, 0x94 , dch);
        }
        for(i = 0; i < controllers; i++) {
                uint32_t dch;
                dch = pci_read_config32(ctrl[i].f2, 0x94 );
                dch |= (1 << 25) ;
                pci_write_config32(ctrl[i].f2, 0x94 , dch);
        }

-        
+

        memreset(controllers, ctrl);
        for(i = 0; i < controllers; i++) {
                uint32_t dcl;
        memreset(controllers, ctrl);
        for(i = 0; i < controllers; i++) {
                uint32_t dcl;

-                
+

                dcl = pci_read_config32(ctrl[i].f2, 0x90 );
                if (dcl & (1<<17) ) {
                        uint32_t mnc;
                dcl = pci_read_config32(ctrl[i].f2, 0x90 );
                if (dcl & (1<<17) ) {
                        uint32_t mnc;


@@ -2294,7 +2294,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
                if (dcl & (1<<17) ) {
                        print_debug("Clearing memory: ");
                        if (!is_cpu_pre_c0()) {
                if (dcl & (1<<17) ) {
                        print_debug("Clearing memory: ");
                        if (!is_cpu_pre_c0()) {

-                                
+

                                dcl &= ~((1<<11)  | (1<<10) );
                                pci_write_config32(ctrl[i].f2, 0x90 , dcl);
                                do {
                                dcl &= ~((1<<11)  | (1<<10) );
                                pci_write_config32(ctrl[i].f2, 0x90 , dcl);
                                do {


@@ -2304,10 +2304,10 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
                        uint32_t base, last_scrub_k, scrub_k;
                        uint32_t cnt,zstart,zend;
                        msr_t msr,msr_201;
                        uint32_t base, last_scrub_k, scrub_k;
                        uint32_t cnt,zstart,zend;
                        msr_t msr,msr_201;

-                        
+

                        pci_write_config32(ctrl[i].f3, 0x58 ,
                                (0  << 16) | (0  << 8) | (0  << 0));
                        pci_write_config32(ctrl[i].f3, 0x58 ,
                                (0  << 16) | (0  << 8) | (0  << 0));

-                        
+

                        msr_201 = rdmsr(0x201);
                        zstart = pci_read_config32(ctrl[0].f1, 0x40 + (i*8));
                        zend = pci_read_config32(ctrl[0].f1, 0x44 + (i*8));
                        msr_201 = rdmsr(0x201);
                        zstart = pci_read_config32(ctrl[0].f1, 0x40 + (i*8));
                        zend = pci_read_config32(ctrl[0].f1, 0x44 + (i*8));


@@ -2318,50 +2318,50 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
                        print_debug("-");
                        print_debug_hex32(zend);
                        print_debug("\r\n");
                        print_debug("-");
                        print_debug_hex32(zend);
                        print_debug("\r\n");

-                       
-                        
+
+

                        msr = rdmsr(0x2ff );
                        msr.lo &= ~(1<<10);
                        wrmsr(0x2ff , msr);
                        msr = rdmsr(0x2ff );
                        msr.lo &= ~(1<<10);
                        wrmsr(0x2ff , msr);

-                        
+

                        msr = rdmsr(0xc0010015);
                        msr.lo |= (1<<17);
                        wrmsr(0xc0010015,msr);
                        for(;zstart<zend;zstart+=4) {
                        msr = rdmsr(0xc0010015);
                        msr.lo |= (1<<17);
                        wrmsr(0xc0010015,msr);
                        for(;zstart<zend;zstart+=4) {

-                                
+

                                if(zstart == 0x0fc)
                                        continue;
                                if(zstart == 0x0fc)
                                        continue;

-                               
-                                
+
+

                                __asm__ volatile(
                                        "movl  %%cr0, %0\n\t"
                                        "orl  $0x40000000, %0\n\t"
                                        "movl  %0, %%cr0\n\t"
                                        :"=r" (cnt)
                                        );
                                __asm__ volatile(
                                        "movl  %%cr0, %0\n\t"
                                        "orl  $0x40000000, %0\n\t"
                                        "movl  %0, %%cr0\n\t"
                                        :"=r" (cnt)
                                        );

-                               
-                                
+
+

                                msr.lo = 1 + ((zstart&0x0ff)<<24);
                                msr.hi = (zstart&0x0ff00)>>8;
                                wrmsr(0x200,msr);
                                msr.lo = 1 + ((zstart&0x0ff)<<24);
                                msr.hi = (zstart&0x0ff00)>>8;
                                wrmsr(0x200,msr);

-                                
+

                                msr.hi = 0x000000ff;
                                msr.lo = 0xfc000800;
                                wrmsr(0x201,msr);
                                msr.hi = 0x000000ff;
                                msr.lo = 0xfc000800;
                                wrmsr(0x201,msr);

-                                
+

                                __asm__ volatile(
                                        "movl  %%cr0, %0\n\t"
                                        "andl  $0x9fffffff, %0\n\t"
                                __asm__ volatile(
                                        "movl  %%cr0, %0\n\t"
                                        "andl  $0x9fffffff, %0\n\t"

-                                       "movl  %0, %%cr0\n\t"   
-                                       :"=r" (cnt)     
+                                       "movl  %0, %%cr0\n\t"
+                                       :"=r" (cnt)

                                        );
                                        );

-                                
+

                                msr.lo = (zstart&0xff) << 24;
                                msr.hi = (zstart&0xff00) >> 8;
                                wrmsr(0xc0000100,msr);
                                msr.lo = (zstart&0xff) << 24;
                                msr.hi = (zstart&0xff00) >> 8;
                                wrmsr(0xc0000100,msr);

-                               print_debug_char((zstart > 0x0ff)?'+':'-');     
-                                       
-                                
+                               print_debug_char((zstart > 0x0ff)?'+':'-');
+
+

                                __asm__ volatile(
                                        "1: \n\t"
                                        "movl %0, %%fs:(%1)\n\t"
                                __asm__ volatile(
                                        "1: \n\t"
                                        "movl %0, %%fs:(%1)\n\t"


@@ -2370,67 +2370,67 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
                                        "jnz 1b\n\t"
                                        :
                                        : "a" (0), "D" (0), "c" (0x01000000)
                                        "jnz 1b\n\t"
                                        :
                                        : "a" (0), "D" (0), "c" (0x01000000)

-                                       );                      
+                                       );

                        }
                        }

-                       
-                        
+
+

                        __asm__ volatile(
                                "movl  %%cr0, %0\n\t"
                                "orl  $0x40000000, %0\n\t"
                                "movl  %0, %%cr0\n\t"
                        __asm__ volatile(
                                "movl  %%cr0, %0\n\t"
                                "orl  $0x40000000, %0\n\t"
                                "movl  %0, %%cr0\n\t"

-                               :"=r" (cnt)     
+                               :"=r" (cnt)

                                );
                                );

-               
-                               
+
+

                        msr = rdmsr(0x2ff );
                        msr.lo |= 0x0400;
                        wrmsr(0x2ff , msr);
                        msr = rdmsr(0x2ff );
                        msr.lo |= 0x0400;
                        wrmsr(0x2ff , msr);

-                        
+

                        msr.lo = 6;
                        msr.hi = 0;
                        wrmsr(0x200,msr);
                        wrmsr(0x201,msr_201);
                        msr.lo = 6;
                        msr.hi = 0;
                        wrmsr(0x200,msr);
                        wrmsr(0x201,msr_201);

-                        
+

                        msr.lo = 0;
                        msr.hi = 0;
                        wrmsr(0xc0000100,msr);
                        msr.lo = 0;
                        msr.hi = 0;
                        wrmsr(0xc0000100,msr);

-                        
+

                        __asm__ volatile(
                                "movl  %%cr0, %0\n\t"
                                "andl  $0x9fffffff, %0\n\t"
                        __asm__ volatile(
                                "movl  %%cr0, %0\n\t"
                                "andl  $0x9fffffff, %0\n\t"

-                               "movl  %0, %%cr0\n\t"   
-                               :"=r" (cnt)     
+                               "movl  %0, %%cr0\n\t"
+                               :"=r" (cnt)

                                );
                                );

-                       
-                        
+
+

                        msr = rdmsr(0xc0010015);
                        msr.lo &= ~(1<<17);
                        wrmsr(0xc0010015,msr);
                        msr = rdmsr(0xc0010015);
                        msr.lo &= ~(1<<17);
                        wrmsr(0xc0010015,msr);

-                        
+

                        base = pci_read_config32(ctrl[i].f1, 0x40 + (ctrl[i].node_id << 3));
                        base &= 0xffff0000;
                        base = pci_read_config32(ctrl[i].f1, 0x40 + (ctrl[i].node_id << 3));
                        base &= 0xffff0000;

-                        
+

                        pci_write_config32(ctrl[i].f3, 0x5C , base << 8);
                        pci_write_config32(ctrl[i].f3, 0x60 , base >> 24);
                        pci_write_config32(ctrl[i].f3, 0x5C , base << 8);
                        pci_write_config32(ctrl[i].f3, 0x60 , base >> 24);

-                        
-                       pci_write_config32(ctrl[i].f3, 0x58 , 
+
+                       pci_write_config32(ctrl[i].f3, 0x58 ,

                                (22  << 16) | (22  << 8) | (22  << 0));
                        print_debug("done\r\n");
                }
        }
 }
                                (22  << 16) | (22  << 8) | (22  << 0));
                        print_debug("done\r\n");
                }
        }
 }

- 
- 
- 
- 
- 
+
+
+
+
+

 typedef uint8_t u8;
 typedef uint32_t u32;
 typedef int8_t bool;
 static void disable_probes(void)
 {
 typedef uint8_t u8;
 typedef uint32_t u32;
 typedef int8_t bool;
 static void disable_probes(void)
 {

-        
-        
+
+

        u32 val;
        print_debug("Disabling read/write/fill probes for UP... ");
        val=pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ 0  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x68);
        u32 val;
        print_debug("Disabling read/write/fill probes for UP... ");
        val=pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ 0  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x68);


@@ -2438,8 +2438,8 @@ static void disable_probes(void)
        pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ 0  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x68, val);
        print_debug("done.\r\n");
 }
        pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ 0  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x68, val);
        print_debug("done.\r\n");
 }

- 
-static void wait_ap_stop(u8 node) 
+
+static void wait_ap_stop(u8 node)

 {
        unsigned long reg;
        unsigned long i;
 {
        unsigned long reg;
        unsigned long i;


@@ -2449,7 +2449,7 @@ static void wait_ap_stop(u8 node)
                if((regx & (1<<4))==1) break;
         }
        reg = pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  ,0x6c);
                if((regx & (1<<4))==1) break;
         }
        reg = pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  ,0x6c);

-        reg &= ~(1<<4);   
+        reg &= ~(1<<4);

         pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x6c, reg);
 }
 static void notify_bsp_ap_is_stopped(void)
         pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x6c, reg);
 }
 static void notify_bsp_ap_is_stopped(void)


@@ -2458,31 +2458,31 @@ static void notify_bsp_ap_is_stopped(void)
        unsigned long apic_id;
         apic_id = *((volatile unsigned long *)(0xfee00000 + 0x020 ));
        apic_id >>= 24;
        unsigned long apic_id;
         apic_id = *((volatile unsigned long *)(0xfee00000 + 0x020 ));
        apic_id >>= 24;

-        
+

         if(apic_id != 0) {
         if(apic_id != 0) {

-                
+

                 reg = pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ apic_id  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x6C);
                 reg |= 1<<4;
                 pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ apic_id  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x6C, reg);
         }
                 reg = pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ apic_id  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x6C);
                 reg |= 1<<4;
                 pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ apic_id  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x6C, reg);
         }

- 
+

 }
 }

- 
+

 static void enable_routing(u8 node)
 {
        u32 val;
 static void enable_routing(u8 node)
 {
        u32 val;

-        
-        
+
+

        print_debug("Enabling routing table for node ");
        print_debug_hex32(node);
        val=pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x6c);
        val &= ~((1<<6)|(1<<5)|(1<<4)|(1<<1)|(1<<0));
        pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x6c, val);
        print_debug("Enabling routing table for node ");
        print_debug_hex32(node);
        val=pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x6c);
        val &= ~((1<<6)|(1<<5)|(1<<4)|(1<<1)|(1<<0));
        pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x6c, val);

- 
+

        if(node!=0) {
                wait_ap_stop(node);
        }
        if(node!=0) {
                wait_ap_stop(node);
        }

- 
+

        print_debug(" done.\r\n");
 }
 static void rename_temp_node(u8 node)
        print_debug(" done.\r\n");
 }
 static void rename_temp_node(u8 node)


@@ -2491,21 +2491,21 @@ static void rename_temp_node(u8 node)
        print_debug("Renaming current temp node to ");
        print_debug_hex32(node);
        val=pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ 7  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x60);
        print_debug("Renaming current temp node to ");
        print_debug_hex32(node);
        val=pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ 7  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x60);

-       val &= (~7);   
-        val |= node;    
+       val &= (~7);
+        val |= node;

        pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ 7  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x60, val);
        print_debug(" done.\r\n");
 }
 static bool check_connection(u8 src, u8 dest, u8 link)
 {
        pci_write_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ 7  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x60, val);
        print_debug(" done.\r\n");
 }
 static bool check_connection(u8 src, u8 dest, u8 link)
 {

-        
+

        u32 val;
        u32 val;

-       
-        
+
+

        val=pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ src  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x98+link);
        if ( (val&0x17) != 0x03)
                return 0;
        val=pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ src  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x98+link);
        if ( (val&0x17) != 0x03)
                return 0;

-        
+

         val=pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ dest  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  ,0);
        if(val != 0x11001022)
                return 0;
         val=pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ dest  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  ,0);
        if(val != 0x11001022)
                return 0;


@@ -2518,37 +2518,37 @@ static void optimize_connection(u8 node1, u8 link1, u8 node2, u8 link2)
        uint16_t freq_cap1, freq_cap2, freq_cap, freq_mask;
        uint8_t width_cap1, width_cap2, width_cap, width, ln_width1, ln_width2;
        uint8_t freq;
        uint16_t freq_cap1, freq_cap2, freq_cap, freq_mask;
        uint8_t width_cap1, width_cap2, width_cap, width, ln_width1, ln_width2;
        uint8_t freq;

-        
-        
+
+

        freq_cap1  = pci_read_config16(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node1  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x80 + link1 + 0x0a );
        freq_cap2  = pci_read_config16(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node2  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x80 + link2 + 0x0a );
        freq_cap1  = pci_read_config16(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node1  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x80 + link1 + 0x0a );
        freq_cap2  = pci_read_config16(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node2  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x80 + link2 + 0x0a );

-        
-        
+
+

        freq = log2(freq_cap1 & freq_cap2 & 0xff);
        freq = log2(freq_cap1 & freq_cap2 & 0xff);

-        
+

        pci_write_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node1  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x80 + link1 + 0x09 , freq);
        pci_write_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node2  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x80 + link2 + 0x09 , freq);
        pci_write_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node1  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x80 + link1 + 0x09 , freq);
        pci_write_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node2  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x80 + link2 + 0x09 , freq);

-        
+

        width_cap1 = pci_read_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node1  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  ,  0x80 + link1 + 6 );
        width_cap2 = pci_read_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node2  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  ,  0x80 + link2 + 6 );
        width_cap1 = pci_read_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node1  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  ,  0x80 + link1 + 6 );
        width_cap2 = pci_read_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node2  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  ,  0x80 + link2 + 6 );

-        
+

        ln_width1 = link_width_to_pow2[width_cap1 & 7];
        ln_width2 = link_width_to_pow2[(width_cap2 >> 4) & 7];
        if (ln_width1 > ln_width2) {
                ln_width1 = ln_width2;
        }
        width = pow2_to_link_width[ln_width1];
        ln_width1 = link_width_to_pow2[width_cap1 & 7];
        ln_width2 = link_width_to_pow2[(width_cap2 >> 4) & 7];
        if (ln_width1 > ln_width2) {
                ln_width1 = ln_width2;
        }
        width = pow2_to_link_width[ln_width1];

-        
+

        ln_width1 = link_width_to_pow2[(width_cap1 >> 4) & 7];
        ln_width2 = link_width_to_pow2[width_cap2 & 7];
        if (ln_width1 > ln_width2) {
                ln_width1 = ln_width2;
        }
        width |= pow2_to_link_width[ln_width1] << 4;
        ln_width1 = link_width_to_pow2[(width_cap1 >> 4) & 7];
        ln_width2 = link_width_to_pow2[width_cap2 & 7];
        if (ln_width1 > ln_width2) {
                ln_width1 = ln_width2;
        }
        width |= pow2_to_link_width[ln_width1] << 4;

-       
-        
+
+

        pci_write_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node1  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x80 + link1 + 6  + 1, width);
        pci_write_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node1  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x80 + link1 + 6  + 1, width);

-        
+

        width = ((width & 0x70) >> 4) | ((width & 0x7) << 4);
        pci_write_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node2  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x80 + link2 + 6  + 1, width);
 }
        width = ((width & 0x70) >> 4) | ((width & 0x7) << 4);
        pci_write_config8(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node2  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , 0x80 + link2 + 6  + 1, width);
 }


@@ -2576,8 +2576,8 @@ static void setup_remote_row(u8 source, u8 dest, u8 cpus)
 }
 static void setup_remote_node(u8 node, u8 cpus)
 {
 }
 static void setup_remote_node(u8 node, u8 cpus)
 {

-       static const uint8_t pci_reg[] = { 
-               0x44, 0x4c, 0x54, 0x5c, 0x64, 0x6c, 0x74, 0x7c, 
+       static const uint8_t pci_reg[] = {
+               0x44, 0x4c, 0x54, 0x5c, 0x64, 0x6c, 0x74, 0x7c,

                0x40, 0x48, 0x50, 0x58, 0x60, 0x68, 0x70, 0x78,
                0x84, 0x8c, 0x94, 0x9c, 0xa4, 0xac, 0xb4, 0xbc,
                0x80, 0x88, 0x90, 0x98, 0xa0, 0xa8, 0xb0, 0xb8,
                0x40, 0x48, 0x50, 0x58, 0x60, 0x68, 0x70, 0x78,
                0x84, 0x8c, 0x94, 0x9c, 0xa4, 0xac, 0xb4, 0xbc,
                0x80, 0x88, 0x90, 0x98, 0xa0, 0xa8, 0xb0, 0xb8,


@@ -2590,7 +2590,7 @@ static void setup_remote_node(u8 node, u8 cpus)
        print_debug("setup_remote_node\r\n");
        for(row=0; row<cpus; row++)
                setup_remote_row(node, row, cpus);
        print_debug("setup_remote_node\r\n");
        for(row=0; row<cpus; row++)
                setup_remote_row(node, row, cpus);

-        
+

        for(i = 0; i < sizeof(pci_reg)/sizeof(pci_reg[0]); i++) {
                uint32_t value;
                uint8_t reg;
        for(i = 0; i < sizeof(pci_reg)/sizeof(pci_reg[0]); i++) {
                uint32_t value;
                uint8_t reg;


@@ -2611,24 +2611,24 @@ static u8 setup_smp(void)
        u8 cpus=2;
        print_debug("Enabling SMP settings\r\n");
        setup_row(0,0,cpus);
        u8 cpus=2;
        print_debug("Enabling SMP settings\r\n");
        setup_row(0,0,cpus);

-        
+

        setup_temp_row(0,1,cpus);
        setup_temp_row(0,1,cpus);

-       
+

        if (!check_connection(0, 7, 0x20  )) {
                print_debug("No connection to Node 1.\r\n");
        if (!check_connection(0, 7, 0x20  )) {
                print_debug("No connection to Node 1.\r\n");

-               fill_row( 0 ,7,0x00010101 ) ;    
-               setup_uniprocessor();    
+               fill_row( 0 ,7,0x00010101 ) ;
+               setup_uniprocessor();

                return 1;
        }
                return 1;
        }

-        
+

        optimize_connection(0, 0x20 , 7, 0x20 );
        optimize_connection(0, 0x20 , 7, 0x20 );

-       setup_node(0, cpus);     
-       setup_remote_node(1, cpus);   
-        rename_temp_node(1);     
-        enable_routing(1);       
-       
-       fill_row( 0 ,7,0x00010101 ) ;    
-       
+       setup_node(0, cpus);
+       setup_remote_node(1, cpus);
+        rename_temp_node(1);
+        enable_routing(1);
+
+       fill_row( 0 ,7,0x00010101 ) ;
+

        print_debug_hex32(cpus);
        print_debug(" nodes initialized.\r\n");
        return cpus;
        print_debug_hex32(cpus);
        print_debug(" nodes initialized.\r\n");
        return cpus;


@@ -2641,29 +2641,29 @@ static unsigned detect_mp_capabilities(unsigned cpus)
        print_debug_hex32(cpus);
        print_debug("\r\n");
        if (cpus>2)
        print_debug_hex32(cpus);
        print_debug("\r\n");
        if (cpus>2)

-               mask=0x06;       
+               mask=0x06;

        else
        else

-               mask=0x02;       
+               mask=0x02;

        for (node=0; node<cpus; node++) {
                if ((pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node  ) & 0x1f) << 11) | ((( 3 )  & 0x7) << 8))  , 0xe8) & mask)!=mask)
                        mp_cap= (0) ;
        }
        if (mp_cap)
                return cpus;
        for (node=0; node<cpus; node++) {
                if ((pci_read_config32(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node  ) & 0x1f) << 11) | ((( 3 )  & 0x7) << 8))  , 0xe8) & mask)!=mask)
                        mp_cap= (0) ;
        }
        if (mp_cap)
                return cpus;

-        
+

        print_debug("One of the CPUs is not MP capable. Going back to UP\r\n");
        for (node=cpus; node>0; node--)
            for (row=cpus; row>0; row--)
                fill_row(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node-1  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , row-1, 0x00010101 );
        print_debug("One of the CPUs is not MP capable. Going back to UP\r\n");
        for (node=cpus; node>0; node--)
            for (row=cpus; row>0; row--)
                fill_row(( ((( 0 ) & 0xFF) << 16) | ((( 24+ node-1  ) & 0x1f) << 11) | ((( 0 )  & 0x7) << 8))  , row-1, 0x00010101 );

-       
+

        return setup_uniprocessor();
 }
 static void coherent_ht_finalize(unsigned cpus)
 {
        int node;
        bool rev_a0;
        return setup_uniprocessor();
 }
 static void coherent_ht_finalize(unsigned cpus)
 {
        int node;
        bool rev_a0;

-       
-        
+
+

        print_debug("coherent_ht_finalize\r\n");
        rev_a0= is_cpu_rev_a0();
        for (node=0; node<cpus; node++) {
        print_debug("coherent_ht_finalize\r\n");
        rev_a0= is_cpu_rev_a0();
        for (node=0; node<cpus; node++) {


@@ -2691,36 +2691,36 @@ static int setup_coherent_ht_domain(void)
        cpus=setup_smp();
        cpus=detect_mp_capabilities(cpus);
        coherent_ht_finalize(cpus);
        cpus=setup_smp();
        cpus=detect_mp_capabilities(cpus);
        coherent_ht_finalize(cpus);

-        
+

        coherent_ht_mainboard(cpus);
        return reset_needed;
 }
 void sdram_no_memory(void)
 {
        print_err("No memory!!\r\n");
        coherent_ht_mainboard(cpus);
        return reset_needed;
 }
 void sdram_no_memory(void)
 {
        print_err("No memory!!\r\n");

-       while(1) { 
-               hlt(); 
+       while(1) {
+               hlt();

        }
 }
        }
 }

- 
+

 void sdram_initialize(int controllers, const struct mem_controller *ctrl)
 {
        int i;
 void sdram_initialize(int controllers, const struct mem_controller *ctrl)
 {
        int i;

-        
+

        for(i = 0; i < controllers; i++) {
                print_debug("Ram1.");
                print_debug_hex8(i);
                print_debug("\r\n");
                sdram_set_registers(ctrl + i);
        }
        for(i = 0; i < controllers; i++) {
                print_debug("Ram1.");
                print_debug_hex8(i);
                print_debug("\r\n");
                sdram_set_registers(ctrl + i);
        }

-        
+

        for(i = 0; i < controllers; i++) {
                print_debug("Ram2.");
                print_debug_hex8(i);
                print_debug("\r\n");
                sdram_set_spd_registers(ctrl + i);
        }
        for(i = 0; i < controllers; i++) {
                print_debug("Ram2.");
                print_debug_hex8(i);
                print_debug("\r\n");
                sdram_set_spd_registers(ctrl + i);
        }

-        
+

        print_debug("Ram3\r\n");
        sdram_enable(controllers, ctrl);
        print_debug("Ram4\r\n");
        print_debug("Ram3\r\n");
        sdram_enable(controllers, ctrl);
        print_debug("Ram4\r\n");


@@ -2738,17 +2738,17 @@ static void stop_this_cpu(void)
 {
        unsigned apicid;
        apicid = apic_read(0x020 ) >> 24;
 {
        unsigned apicid;
        apicid = apic_read(0x020 ) >> 24;

-        
+

        apic_write(0x310 , (( apicid )<<24) );
        apic_write(0x300 , 0x08000  | 0x04000  | 0x00500 );
        apic_write(0x310 , (( apicid )<<24) );
        apic_write(0x300 , 0x08000  | 0x04000  | 0x00500 );

-        
+

        apic_wait_icr_idle();
        apic_wait_icr_idle();

-        
+

        apic_write(0x310 , (( apicid )<<24) );
        apic_write(0x300 ,  0x08000  | 0x00500 );
        apic_write(0x310 , (( apicid )<<24) );
        apic_write(0x300 ,  0x08000  | 0x00500 );

-        
+

        apic_wait_icr_idle();
        apic_wait_icr_idle();

-        
+

        for(;;) {
                hlt();
        }
        for(;;) {
                hlt();
        }


@@ -2761,7 +2761,7 @@ static void pc87360_enable_serial(void)
 }
 static void main(void)
 {
 }
 static void main(void)
 {

-        
+

        static const struct mem_controller cpu[] = {
                {
                        .node_id = 0,
        static const struct mem_controller cpu[] = {
                {
                        .node_id = 0,


@@ -2797,9 +2797,9 @@ static void main(void)
        setup_coherent_ht_domain();
        enumerate_ht_chain(0);
        distinguish_cpu_resets(0);
        setup_coherent_ht_domain();
        enumerate_ht_chain(0);
        distinguish_cpu_resets(0);

-       
+

        enable_smbus();
        memreset_setup();
        sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu);
        enable_smbus();
        memreset_setup();
        sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu);

-        
+

 }
 }

diff --git a/util/romcc/tests/simple_test.c b/util/romcc/tests/simple_test.c
index 4065c51a2fb0a40e7b11a134fd54e0734bd812d8..9791d9e352f480f7301e69ffec88987e0a706787 100644 (file)
--- a/util/romcc/tests/simple_test.c
+++ b/util/romcc/tests/simple_test.c
@@ -78,7 +78,7 @@ void uart_wait_to_tx_byte(void)
 
 void uart_wait_until_sent(void)
 {
 
 void uart_wait_until_sent(void)
 {

-       while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40)) 
+       while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))

                ;
 }
 
                ;
 }
 


@@ -170,7 +170,7 @@ static void and(void)
        i = 1;
        j = 2;
        k = i && j;
        i = 1;
        j = 2;
        k = i && j;

-       
+

 }
 static void and_test(void)
 {
 }
 static void and_test(void)
 {


@@ -236,9 +236,9 @@ static void fun(void)
 static void func(void)
 {
        int bar, baz;
 static void func(void)
 {
        int bar, baz;

-       int i; 
-  
-       baz = add(1, 2); 
+       int i;
+
+       baz = add(1, 2);

        baz = add(1, 2);
        bar = 1;
        baz = 2;
        baz = add(1, 2);
        bar = 1;
        baz = 2;

diff --git a/util/romcc/tests/simple_test1.c b/util/romcc/tests/simple_test1.c
index 4065c51a2fb0a40e7b11a134fd54e0734bd812d8..9791d9e352f480f7301e69ffec88987e0a706787 100644 (file)
--- a/util/romcc/tests/simple_test1.c
+++ b/util/romcc/tests/simple_test1.c
@@ -78,7 +78,7 @@ void uart_wait_to_tx_byte(void)
 
 void uart_wait_until_sent(void)
 {
 
 void uart_wait_until_sent(void)
 {

-       while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40)) 
+       while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))

                ;
 }
 
                ;
 }
 


@@ -170,7 +170,7 @@ static void and(void)
        i = 1;
        j = 2;
        k = i && j;
        i = 1;
        j = 2;
        k = i && j;

-       
+

 }
 static void and_test(void)
 {
 }
 static void and_test(void)
 {


@@ -236,9 +236,9 @@ static void fun(void)
 static void func(void)
 {
        int bar, baz;
 static void func(void)
 {
        int bar, baz;

-       int i; 
-  
-       baz = add(1, 2); 
+       int i;
+
+       baz = add(1, 2);

        baz = add(1, 2);
        bar = 1;
        baz = 2;
        baz = add(1, 2);
        bar = 1;
        baz = 2;

diff --git a/util/romcc/tests/simple_test10.c b/util/romcc/tests/simple_test10.c
index 3e7f510d676bed4db3a90c6153dde563e8478f8f..af9bf076a12dcdeb9417f972d95f4a52ef44d3e0 100644 (file)
--- a/util/romcc/tests/simple_test10.c
+++ b/util/romcc/tests/simple_test10.c
@@ -11,7 +11,7 @@ static void spd_set_drb(void)
         */
        unsigned end_of_memory;
        unsigned char device;
         */
        unsigned end_of_memory;
        unsigned char device;

-       
+

        end_of_memory = 0; /* in multiples of 8MiB */
        device = SMBUS_MEM_DEVICE_START;
        while (device <= SMBUS_MEM_DEVICE_END) {
        end_of_memory = 0; /* in multiples of 8MiB */
        device = SMBUS_MEM_DEVICE_START;
        while (device <= SMBUS_MEM_DEVICE_END) {

diff --git a/util/romcc/tests/simple_test19.c b/util/romcc/tests/simple_test19.c
index 0bdcf422ef3569253566b19f5b68c6dba7be2330..cb1f4940d7916a9b64062a3b6cfed09a23e06ed5 100644 (file)
--- a/util/romcc/tests/simple_test19.c
+++ b/util/romcc/tests/simple_test19.c
@@ -1,4 +1,4 @@
-static void hlt(void) 
+static void hlt(void)

 {
        __builtin_hlt();
 }
 {
        __builtin_hlt();
 }

diff --git a/util/romcc/tests/simple_test2.c b/util/romcc/tests/simple_test2.c
index aef936a8ff3b9eb616b3f28da025af3f3b215a71..b576d3064d256a1f0d6ecdff86e8292fcf6a999c 100644 (file)
--- a/util/romcc/tests/simple_test2.c
+++ b/util/romcc/tests/simple_test2.c
@@ -18,7 +18,7 @@ static void spd_set_drb(void)
         */
        unsigned end_of_memory;
        unsigned device;
         */
        unsigned end_of_memory;
        unsigned device;

-       
+

        end_of_memory = 0; /* in multiples of 8MiB */
        device = SMBUS_MEM_DEVICE_START;
        while (device <= SMBUS_MEM_DEVICE_END) {
        end_of_memory = 0; /* in multiples of 8MiB */
        device = SMBUS_MEM_DEVICE_START;
        while (device <= SMBUS_MEM_DEVICE_END) {

diff --git a/util/romcc/tests/simple_test20.c b/util/romcc/tests/simple_test20.c
index 1998853af1838aae5adb9e53eca51a79db1b608a..f32aeac8af28d844d47c375ed1fea57f41e9341b 100644 (file)
--- a/util/romcc/tests/simple_test20.c
+++ b/util/romcc/tests/simple_test20.c
@@ -86,7 +86,7 @@ void uart_wait_to_tx_byte(void)
 
 void uart_wait_until_sent(void)
 {
 
 void uart_wait_until_sent(void)
 {

-       while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40)) 
+       while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))

                ;
 }
 
                ;
 }
 

diff --git a/util/romcc/tests/simple_test22.c b/util/romcc/tests/simple_test22.c
index 81d2ed008d013c316a3ff4c4aecfdc451f91b80a..a67f5fd36cda830c5fdc26a2dbc97d01a3a03d15 100644 (file)
--- a/util/romcc/tests/simple_test22.c
+++ b/util/romcc/tests/simple_test22.c
@@ -34,7 +34,7 @@ static struct syscall_result syscall1(unsigned long nr, unsigned long arg1)
                : "=a" (res)
                : "a" (nr), "b" (arg1));
        return syscall_return(res);
                : "=a" (res)
                : "a" (nr), "b" (arg1));
        return syscall_return(res);

-       
+

 }
 
 static struct syscall_result syscall2(unsigned long nr, unsigned long arg1, unsigned long arg2)
 }
 
 static struct syscall_result syscall2(unsigned long nr, unsigned long arg1, unsigned long arg2)


@@ -45,7 +45,7 @@ static struct syscall_result syscall2(unsigned long nr, unsigned long arg1, unsi
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2));
        return syscall_return(res);
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2));
        return syscall_return(res);

-       
+

 }
 
 
 }
 
 


@@ -58,7 +58,7 @@ static struct syscall_result syscall3(unsigned long nr, unsigned long arg1, unsi
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3));
        return syscall_return(res);
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3));
        return syscall_return(res);

-       
+

 }
 
 static struct syscall_result syscall4(unsigned long nr, unsigned long arg1, unsigned long arg2,
 }
 
 static struct syscall_result syscall4(unsigned long nr, unsigned long arg1, unsigned long arg2,


@@ -70,7 +70,7 @@ static struct syscall_result syscall4(unsigned long nr, unsigned long arg1, unsi
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3), "S" (arg4));
        return syscall_return(res);
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3), "S" (arg4));
        return syscall_return(res);

-       
+

 }
 
 static struct syscall_result syscall5(unsigned long nr, unsigned long arg1, unsigned long arg2,
 }
 
 static struct syscall_result syscall5(unsigned long nr, unsigned long arg1, unsigned long arg2,


@@ -80,10 +80,10 @@ static struct syscall_result syscall5(unsigned long nr, unsigned long arg1, unsi
        asm volatile(
                "int $0x80"
                : "=a" (res)
        asm volatile(
                "int $0x80"
                : "=a" (res)

-               : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3), 
+               : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3),

                "S" (arg4), "D" (arg5));
        return syscall_return(res);
                "S" (arg4), "D" (arg5));
        return syscall_return(res);

-       
+

 }
 
 #define NR_exit                 1
 }
 
 #define NR_exit                 1

diff --git a/util/romcc/tests/simple_test27.c b/util/romcc/tests/simple_test27.c
index f278f62e8a4d1e865c68e780fd09fcad271eee14..ac5236806145386b859830f676d8980ee303fed2 100644 (file)
--- a/util/romcc/tests/simple_test27.c
+++ b/util/romcc/tests/simple_test27.c
@@ -66,7 +66,7 @@ void uart_wait_to_tx_byte(void)
 
 void uart_wait_until_sent(void)
 {
 
 void uart_wait_until_sent(void)
 {

-       while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40)) 
+       while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))

                ;
 }
 
                ;
 }
 


@@ -96,7 +96,7 @@ void uart_init(void)
 void __console_tx_char(unsigned char byte)
 {
        uart_tx_byte(byte);
 void __console_tx_char(unsigned char byte)
 {
        uart_tx_byte(byte);

-               
+

 }
 
 void __console_tx_string(char *str)
 }
 
 void __console_tx_string(char *str)

diff --git a/util/romcc/tests/simple_test3.c b/util/romcc/tests/simple_test3.c
index 008d0ab528341607054e5065fcd4f2fe9113b5fa..864760c4183f7d369042a1801a8245fd67422e5b 100644 (file)
--- a/util/romcc/tests/simple_test3.c
+++ b/util/romcc/tests/simple_test3.c
@@ -7,7 +7,7 @@ static void spd_set_drb(void)
         */
        unsigned end_of_memory;
        unsigned device;
         */
        unsigned end_of_memory;
        unsigned device;

-       
+

        end_of_memory = 0; /* in multiples of 8MiB */
        device = 0x50;
        while (device <= 0x53) {
        end_of_memory = 0; /* in multiples of 8MiB */
        device = 0x50;
        while (device <= 0x53) {


@@ -23,7 +23,7 @@ static void spd_set_drb(void)
                        /* Make it mulitples of 8MB */
                        side1_bits -= 25;
                }
                        /* Make it mulitples of 8MB */
                        side1_bits -= 25;
                }

-               
+

                /* Compute the end address for the DRB register */
                /* Only process dimms < 2GB (2^8 * 8MB) */
                if (1) {
                /* Compute the end address for the DRB register */
                /* Only process dimms < 2GB (2^8 * 8MB) */
                if (1) {

diff --git a/util/romcc/tests/simple_test30.c b/util/romcc/tests/simple_test30.c
index 6582a91c1acc90bcd69bca5b0d8eced417ecba15..ede20917d97f60871c2ee9b629b3f5e4b3905c88 100644 (file)
--- a/util/romcc/tests/simple_test30.c
+++ b/util/romcc/tests/simple_test30.c
@@ -34,7 +34,7 @@ static struct syscall_result syscall1(unsigned long nr, unsigned long arg1)
                : "=a" (res)
                : "a" (nr), "b" (arg1));
        return syscall_return(res);
                : "=a" (res)
                : "a" (nr), "b" (arg1));
        return syscall_return(res);

-       
+

 }
 
 static struct syscall_result syscall2(unsigned long nr, unsigned long arg1, unsigned long arg2)
 }
 
 static struct syscall_result syscall2(unsigned long nr, unsigned long arg1, unsigned long arg2)


@@ -45,7 +45,7 @@ static struct syscall_result syscall2(unsigned long nr, unsigned long arg1, unsi
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2));
        return syscall_return(res);
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2));
        return syscall_return(res);

-       
+

 }
 
 
 }
 
 


@@ -58,7 +58,7 @@ static struct syscall_result syscall3(unsigned long nr, unsigned long arg1, unsi
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3));
        return syscall_return(res);
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3));
        return syscall_return(res);

-       
+

 }
 
 static struct syscall_result syscall4(unsigned long nr, unsigned long arg1, unsigned long arg2,
 }
 
 static struct syscall_result syscall4(unsigned long nr, unsigned long arg1, unsigned long arg2,


@@ -70,7 +70,7 @@ static struct syscall_result syscall4(unsigned long nr, unsigned long arg1, unsi
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3), "S" (arg4));
        return syscall_return(res);
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3), "S" (arg4));
        return syscall_return(res);

-       
+

 }
 
 static struct syscall_result syscall5(unsigned long nr, unsigned long arg1, unsigned long arg2,
 }
 
 static struct syscall_result syscall5(unsigned long nr, unsigned long arg1, unsigned long arg2,


@@ -80,10 +80,10 @@ static struct syscall_result syscall5(unsigned long nr, unsigned long arg1, unsi
        asm volatile(
                "int $0x80"
                : "=a" (res)
        asm volatile(
                "int $0x80"
                : "=a" (res)

-               : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3), 
+               : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3),

                "S" (arg4), "D" (arg5));
        return syscall_return(res);
                "S" (arg4), "D" (arg5));
        return syscall_return(res);

-       
+

 }
 
 #define NR_exit                 1
 }
 
 #define NR_exit                 1


@@ -301,37 +301,37 @@ static void _exit(int status)
 static const char *addr_of_char(unsigned char ch)
 {
        static const char byte[] = {
 static const char *addr_of_char(unsigned char ch)
 {
        static const char byte[] = {

-               0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 
+               0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,

                0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
                0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,

-               0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 
+               0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,

                0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
                0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,

-               0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 
+               0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,

                0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
                0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,

-               0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 
+               0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,

                0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
                0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,

-               0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 
+               0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,

                0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
                0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,

-               0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 
+               0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,

                0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
                0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,

-               0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 
+               0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,

                0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,
                0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,

-               0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 
+               0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,

                0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,
                0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,

-               0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 
+               0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,

                0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
                0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,

-               0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 
+               0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,

                0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,
                0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,

-               0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 
+               0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,

                0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,
                0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,

-               0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7, 
+               0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,

                0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,
                0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,

-               0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7, 
+               0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,

                0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,
                0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,

-               0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7, 
+               0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,

                0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,
                0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,

-               0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, 
+               0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7,

                0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,
                0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,

-               0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7, 
+               0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,

                0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff,
        };
        return byte + ch;
                0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff,
        };
        return byte + ch;


@@ -484,14 +484,14 @@ static void setup_coherent_ht_domain(void)
        (((FN) & 0x07) << 8) | \
        ((WHERE) & 0xFF))
 
        (((FN) & 0x07) << 8) | \
        ((WHERE) & 0xFF))
 

-       /* Routing Table Node i 
-        * F0:0x40 i = 0, 
+       /* Routing Table Node i
+        * F0:0x40 i = 0,

         * F0:0x44 i = 1,
         * F0:0x44 i = 1,

-        * F0:0x48 i = 2, 
+        * F0:0x48 i = 2,

         * F0:0x4c i = 3,
         * F0:0x4c i = 3,

-        * F0:0x50 i = 4, 
+        * F0:0x50 i = 4,

         * F0:0x54 i = 5,
         * F0:0x54 i = 5,

-        * F0:0x58 i = 6, 
+        * F0:0x58 i = 6,

         * F0:0x5c i = 7
         * [ 0: 3] Request Route
         *     [0] Route to this node
         * F0:0x5c i = 7
         * [ 0: 3] Request Route
         *     [0] Route to this node


@@ -518,7 +518,7 @@ static void setup_coherent_ht_domain(void)
        PCI_ADDR(0, 0x18, 0, 0x58), 0xfff0f0f0, 0x00010101,
        PCI_ADDR(0, 0x18, 0, 0x5c), 0xfff0f0f0, 0x00010101,
 
        PCI_ADDR(0, 0x18, 0, 0x58), 0xfff0f0f0, 0x00010101,
        PCI_ADDR(0, 0x18, 0, 0x5c), 0xfff0f0f0, 0x00010101,
 

-       /* Hypetransport Transaction Control Register 
+       /* Hypetransport Transaction Control Register

         * F0:0x68
         * [ 0: 0] Disable read byte probe
         *         0 = Probes issues
         * F0:0x68
         * [ 0: 0] Disable read byte probe
         *         0 = Probes issues


@@ -560,7 +560,7 @@ static void setup_coherent_ht_domain(void)
         * [12:12] Change ISOC to Ordered
         *         0 = Bit 1 of coherent HT RdSz/WrSz command used for iosynchronous prioritization
         *         1 = Bit 1 of coherent HT RdSz/WrSz command used for ordering.
         * [12:12] Change ISOC to Ordered
         *         0 = Bit 1 of coherent HT RdSz/WrSz command used for iosynchronous prioritization
         *         1 = Bit 1 of coherent HT RdSz/WrSz command used for ordering.

-        * [14:13] Buffer Release Priority select 
+        * [14:13] Buffer Release Priority select

         *         00 = 64
         *         01 = 16
         *         10 = 8
         *         00 = 64
         *         01 = 16
         *         10 = 8


@@ -667,7 +667,7 @@ static void setup_coherent_ht_domain(void)
         * [13:13] HT Stop Tristate Enable
         *         0 = Driven during an LDTSTOP_L
         *         1 = Tristated during and LDTSTOP_L
         * [13:13] HT Stop Tristate Enable
         *         0 = Driven during an LDTSTOP_L
         *         1 = Tristated during and LDTSTOP_L

-        * [14:14] Extended CTL Time 
+        * [14:14] Extended CTL Time

         *         0 = CTL is asserted for 16 bit times during link initialization
         *         1 = CTL is asserted for 50us during link initialization
         * [18:16] Max Link Width In (Read-Only?)
         *         0 = CTL is asserted for 16 bit times during link initialization
         *         1 = CTL is asserted for 50us during link initialization
         * [18:16] Max Link Width In (Read-Only?)


@@ -933,7 +933,7 @@ static void setup_coherent_ht_domain(void)
         *         1 = base/limit registers i are read-only
         * [ 7: 4] Reserved
         * [31: 8] Memory-Mapped I/O Base Address i (39-16)
         *         1 = base/limit registers i are read-only
         * [ 7: 4] Reserved
         * [31: 8] Memory-Mapped I/O Base Address i (39-16)

-        *         This field defines the upper address bits of a 40bit address 
+        *         This field defines the upper address bits of a 40bit address

         *         that defines the start of memory-mapped I/O region i
         */
        PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00e00003,
         *         that defines the start of memory-mapped I/O region i
         */
        PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00e00003,


@@ -994,7 +994,7 @@ static void setup_coherent_ht_domain(void)
         * [ 3: 2] Reserved
         * [ 4: 4] VGA Enable
         *         0 = VGA matches Disabled
         * [ 3: 2] Reserved
         * [ 4: 4] VGA Enable
         *         0 = VGA matches Disabled

-        *         1 = matches all address < 64K and where A[9:0] is in the 
+        *         1 = matches all address < 64K and where A[9:0] is in the

         *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
         * [ 5: 5] ISA Enable
         *         0 = ISA matches Disabled
         *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
         * [ 5: 5] ISA Enable
         *         0 = ISA matches Disabled


@@ -1002,7 +1002,7 @@ static void setup_coherent_ht_domain(void)
         *             from matching agains this base/limit pair
         * [11: 6] Reserved
         * [24:12] PCI I/O Base i
         *             from matching agains this base/limit pair
         * [11: 6] Reserved
         * [24:12] PCI I/O Base i

-        *         This field defines the start of PCI I/O region n 
+        *         This field defines the start of PCI I/O region n

         * [31:25] Reserved
         */
        PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x0000d003,
         * [31:25] Reserved
         */
        PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x0000d003,

diff --git a/util/romcc/tests/simple_test32.c b/util/romcc/tests/simple_test32.c
index bd6947a2ba74244f1c53b92419c6b3a0ff6c518d..28dbb8972e88604e62e06242ed89127e69b133e8 100644 (file)
--- a/util/romcc/tests/simple_test32.c
+++ b/util/romcc/tests/simple_test32.c
@@ -3,7 +3,7 @@ void main(void)
        unsigned long addr, start, stop;
        start = 0x00100000;
        stop = 0x00180000;
        unsigned long addr, start, stop;
        start = 0x00100000;
        stop = 0x00180000;

-       
+

 
        for(addr = start; addr < stop ;) {
                unsigned char ch;
 
        for(addr = start; addr < stop ;) {
                unsigned char ch;


@@ -12,7 +12,7 @@ void main(void)
                        while(__builtin_inb(0x3f))
                                ;
                        __builtin_outb(ch, 0x3f8);
                        while(__builtin_inb(0x3f))
                                ;
                        __builtin_outb(ch, 0x3f8);

-                       
+

                        while(__builtin_inb(0x3f))
                                ;
                }
                        while(__builtin_inb(0x3f))
                                ;
                }

diff --git a/util/romcc/tests/simple_test36.c b/util/romcc/tests/simple_test36.c
index 9044bda7b97c745867232bd44f2091632d4e784e..53aaf91aedf66a52b38b71412ae5e766c7841349 100644 (file)
--- a/util/romcc/tests/simple_test36.c
+++ b/util/romcc/tests/simple_test36.c
@@ -34,7 +34,7 @@ static void order_dimms(void)
                __builtin_outl(0xc260, 0xCF8);
                __builtin_outl(csmask, 0xCFC);
         }
                __builtin_outl(0xc260, 0xCF8);
                __builtin_outl(csmask, 0xCFC);
         }

-       
+

        tom &=  ~0xff000000;
 
        __builtin_outl(tom, 0x1234);
        tom &=  ~0xff000000;
 
        __builtin_outl(tom, 0x1234);

diff --git a/util/romcc/tests/simple_test37.c b/util/romcc/tests/simple_test37.c
index 85c622b17d598ea61788609310eb91c29f8a11c8..d6ddc2ec98b9f95949fb016cc1b21073f98848b3 100644 (file)
--- a/util/romcc/tests/simple_test37.c
+++ b/util/romcc/tests/simple_test37.c
@@ -4,7 +4,7 @@ static void main(void)
 
        csbase = 0x40;
        csmask = 0xfe00;
 
        csbase = 0x40;
        csmask = 0xfe00;

-       
+

        __builtin_outl(csbase, 0x40);
        __builtin_outl(csmask, 0x60);
 }
        __builtin_outl(csbase, 0x40);
        __builtin_outl(csmask, 0x60);
 }

diff --git a/util/romcc/tests/simple_test38.c b/util/romcc/tests/simple_test38.c
index db001a26a868c5c60b93a999e86989c53dfde2b9..9239664fdfd09158471471947993d94f99e28f32 100644 (file)
--- a/util/romcc/tests/simple_test38.c
+++ b/util/romcc/tests/simple_test38.c
@@ -34,7 +34,7 @@ static struct syscall_result syscall1(unsigned long nr, unsigned long arg1)
                : "=a" (res)
                : "a" (nr), "b" (arg1));
        return syscall_return(res);
                : "=a" (res)
                : "a" (nr), "b" (arg1));
        return syscall_return(res);

-       
+

 }
 
 static struct syscall_result syscall2(unsigned long nr, unsigned long arg1, unsigned long arg2)
 }
 
 static struct syscall_result syscall2(unsigned long nr, unsigned long arg1, unsigned long arg2)


@@ -45,7 +45,7 @@ static struct syscall_result syscall2(unsigned long nr, unsigned long arg1, unsi
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2));
        return syscall_return(res);
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2));
        return syscall_return(res);

-       
+

 }
 
 
 }
 
 


@@ -58,7 +58,7 @@ static struct syscall_result syscall3(unsigned long nr, unsigned long arg1, unsi
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3));
        return syscall_return(res);
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3));
        return syscall_return(res);

-       
+

 }
 
 static struct syscall_result syscall4(unsigned long nr, unsigned long arg1, unsigned long arg2,
 }
 
 static struct syscall_result syscall4(unsigned long nr, unsigned long arg1, unsigned long arg2,


@@ -70,7 +70,7 @@ static struct syscall_result syscall4(unsigned long nr, unsigned long arg1, unsi
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3), "S" (arg4));
        return syscall_return(res);
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3), "S" (arg4));
        return syscall_return(res);

-       
+

 }
 
 static struct syscall_result syscall5(unsigned long nr, unsigned long arg1, unsigned long arg2,
 }
 
 static struct syscall_result syscall5(unsigned long nr, unsigned long arg1, unsigned long arg2,


@@ -80,10 +80,10 @@ static struct syscall_result syscall5(unsigned long nr, unsigned long arg1, unsi
        asm volatile(
                "int $0x80"
                : "=a" (res)
        asm volatile(
                "int $0x80"
                : "=a" (res)

-               : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3), 
+               : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3),

                "S" (arg4), "D" (arg5));
        return syscall_return(res);
                "S" (arg4), "D" (arg5));
        return syscall_return(res);

-       
+

 }
 
 #define NR_exit                 1
 }
 
 #define NR_exit                 1


@@ -301,37 +301,37 @@ static void _exit(int status)
 static const char *addr_of_char(unsigned char ch)
 {
        static const char byte[] = {
 static const char *addr_of_char(unsigned char ch)
 {
        static const char byte[] = {

-               0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 
+               0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,

                0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
                0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,

-               0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 
+               0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,

                0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
                0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,

-               0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 
+               0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,

                0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
                0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,

-               0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 
+               0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,

                0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
                0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,

-               0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 
+               0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,

                0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
                0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,

-               0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 
+               0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,

                0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
                0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,

-               0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 
+               0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,

                0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,
                0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,

-               0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 
+               0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,

                0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,
                0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,

-               0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 
+               0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,

                0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
                0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,

-               0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 
+               0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,

                0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,
                0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,

-               0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 
+               0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,

                0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,
                0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,

-               0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7, 
+               0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,

                0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,
                0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,

-               0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7, 
+               0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,

                0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,
                0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,

-               0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7, 
+               0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,

                0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,
                0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,

-               0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, 
+               0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7,

                0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,
                0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,

-               0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7, 
+               0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,

                0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff,
        };
        return byte + ch;
                0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff,
        };
        return byte + ch;


@@ -401,15 +401,15 @@ static void goto_test(void)
 {
        int i;
        print_debug("goto_test\n");
 {
        int i;
        print_debug("goto_test\n");

-       
+

        i = 0;
        goto bottom;
        {
        top:
        i = 0;
        goto bottom;
        {
        top:

-               print_debug("i = "); 
-               print_debug_hex8(i); 
+               print_debug("i = ");
+               print_debug_hex8(i);

                print_debug("\n");
                print_debug("\n");

-               
+

                i = i + 1;
        }
  bottom:
                i = i + 1;
        }
  bottom:

diff --git a/util/romcc/tests/simple_test39.c b/util/romcc/tests/simple_test39.c
index a7b999bf7bf56709b209b6945ab468c9139585e2..1c67cab5907e22661fa0cc7c364216c1513a0619 100644 (file)
--- a/util/romcc/tests/simple_test39.c
+++ b/util/romcc/tests/simple_test39.c
@@ -34,7 +34,7 @@ static struct syscall_result syscall1(unsigned long nr, unsigned long arg1)
                : "=a" (res)
                : "a" (nr), "b" (arg1));
        return syscall_return(res);
                : "=a" (res)
                : "a" (nr), "b" (arg1));
        return syscall_return(res);

-       
+

 }
 
 static struct syscall_result syscall2(unsigned long nr, unsigned long arg1, unsigned long arg2)
 }
 
 static struct syscall_result syscall2(unsigned long nr, unsigned long arg1, unsigned long arg2)


@@ -45,7 +45,7 @@ static struct syscall_result syscall2(unsigned long nr, unsigned long arg1, unsi
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2));
        return syscall_return(res);
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2));
        return syscall_return(res);

-       
+

 }
 
 
 }
 
 


@@ -58,7 +58,7 @@ static struct syscall_result syscall3(unsigned long nr, unsigned long arg1, unsi
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3));
        return syscall_return(res);
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3));
        return syscall_return(res);

-       
+

 }
 
 static struct syscall_result syscall4(unsigned long nr, unsigned long arg1, unsigned long arg2,
 }
 
 static struct syscall_result syscall4(unsigned long nr, unsigned long arg1, unsigned long arg2,


@@ -70,7 +70,7 @@ static struct syscall_result syscall4(unsigned long nr, unsigned long arg1, unsi
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3), "S" (arg4));
        return syscall_return(res);
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3), "S" (arg4));
        return syscall_return(res);

-       
+

 }
 
 static struct syscall_result syscall5(unsigned long nr, unsigned long arg1, unsigned long arg2,
 }
 
 static struct syscall_result syscall5(unsigned long nr, unsigned long arg1, unsigned long arg2,


@@ -80,10 +80,10 @@ static struct syscall_result syscall5(unsigned long nr, unsigned long arg1, unsi
        asm volatile(
                "int $0x80"
                : "=a" (res)
        asm volatile(
                "int $0x80"
                : "=a" (res)

-               : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3), 
+               : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3),

                "S" (arg4), "D" (arg5));
        return syscall_return(res);
                "S" (arg4), "D" (arg5));
        return syscall_return(res);

-       
+

 }
 
 #define NR_exit                 1
 }
 
 #define NR_exit                 1


@@ -301,37 +301,37 @@ static void _exit(int status)
 static const char *addr_of_char(unsigned char ch)
 {
        static const char byte[] = {
 static const char *addr_of_char(unsigned char ch)
 {
        static const char byte[] = {

-               0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 
+               0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,

                0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
                0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,

-               0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 
+               0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,

                0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
                0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,

-               0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 
+               0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,

                0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
                0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,

-               0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 
+               0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,

                0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
                0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,

-               0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 
+               0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,

                0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
                0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,

-               0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 
+               0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,

                0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
                0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,

-               0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 
+               0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,

                0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,
                0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,

-               0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 
+               0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,

                0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,
                0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,

-               0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 
+               0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,

                0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
                0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,

-               0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 
+               0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,

                0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,
                0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,

-               0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 
+               0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,

                0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,
                0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,

-               0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7, 
+               0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,

                0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,
                0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,

-               0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7, 
+               0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,

                0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,
                0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,

-               0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7, 
+               0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,

                0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,
                0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,

-               0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, 
+               0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7,

                0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,
                0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,

-               0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7, 
+               0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,

                0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff,
        };
        return byte + ch;
                0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff,
        };
        return byte + ch;


@@ -401,15 +401,15 @@ static void goto_test(void)
 {
        int i;
        print_debug("goto_test\n");
 {
        int i;
        print_debug("goto_test\n");

-       
+

        i = 0;
        goto bottom;
        {
        top:
        i = 0;
        goto bottom;
        {
        top:

-               print_debug("i = "); 
-               print_debug_hex8(i); 
+               print_debug("i = ");
+               print_debug_hex8(i);

                print_debug("\n");
                print_debug("\n");

-               
+

                i = i + 1;
        }
  bottom:
                i = i + 1;
        }
  bottom:


@@ -424,7 +424,7 @@ struct socket_desc {
        short across;
 };
 
        short across;
 };
 

-static void main(void) 
+static void main(void)

 {
        static const struct socket_desc cpu_socketsA[] = {
                {  .up = 2,  .down = -1, .across = 1 }, /* Node 0 */
 {
        static const struct socket_desc cpu_socketsA[] = {
                {  .up = 2,  .down = -1, .across = 1 }, /* Node 0 */

diff --git a/util/romcc/tests/simple_test4.c b/util/romcc/tests/simple_test4.c
index 4f72dcad677bdc287983c25626913f2d8d7cfc0d..2ac6a4d5f44d18d87d2859d9003dc575f1935e83 100644 (file)
--- a/util/romcc/tests/simple_test4.c
+++ b/util/romcc/tests/simple_test4.c
@@ -86,7 +86,7 @@ static void pcibios_write_config_dword(
 int log2(int value)
 {
        /* __builtin_bsr is a exactly equivalent to the x86 machine
 int log2(int value)
 {
        /* __builtin_bsr is a exactly equivalent to the x86 machine

-        * instruction with the exception that it returns -1  
+        * instruction with the exception that it returns -1

         * when the value presented to it is zero.
         * Otherwise __builtin_bsr returns the zero based index of
         * the highest bit set.
         * when the value presented to it is zero.
         * Otherwise __builtin_bsr returns the zero based index of
         * the highest bit set.


@@ -149,7 +149,7 @@ void uart_wait_to_tx_byte(void)
 
 void uart_wait_until_sent(void)
 {
 
 void uart_wait_until_sent(void)
 {

-       while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40)) 
+       while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))

                ;
 }
 
                ;
 }
 


@@ -274,7 +274,7 @@ void print_spew(char *str) { __console_tx_string(str); }
 #define PM_BUS 0
 #define PM_DEVFN (PIIX4_DEVFN+3)
 
 #define PM_BUS 0
 #define PM_DEVFN (PIIX4_DEVFN+3)
 

-#if HAVE_CONSTANT_PROPOGATION 
+#if HAVE_CONSTANT_PROPOGATION

 #define SMBUS_IO_BASE 0x1000
 #define SMBHSTSTAT 0
 #define SMBHSTCTL  2
 #define SMBUS_IO_BASE 0x1000
 #define SMBHSTSTAT 0
 #define SMBHSTCTL  2


@@ -428,7 +428,7 @@ static void spd_set_drb(void)
        unsigned end_of_memory;
        unsigned char device;
        unsigned char drb_reg;
        unsigned end_of_memory;
        unsigned char device;
        unsigned char drb_reg;

-       
+

        end_of_memory = 0; /* in multiples of 8MiB */
        device = SMBUS_MEM_DEVICE_START;
 #if !CALCULATE_DRB_REG
        end_of_memory = 0; /* in multiples of 8MiB */
        device = SMBUS_MEM_DEVICE_START;
 #if !CALCULATE_DRB_REG


@@ -464,13 +464,13 @@ static void spd_set_drb(void)
 #else
                        side1_bits += log2((((byte2 << 8) | byte));
 #endif
 #else
                        side1_bits += log2((((byte2 << 8) | byte));
 #endif

-                       
+

                        /* now I have the ram size in bits as a power of two (less 1) */
                        /* Make it mulitples of 8MB */
                        side1_bits -= 25;
 
                        /* side two */
                        /* now I have the ram size in bits as a power of two (less 1) */
                        /* Make it mulitples of 8MB */
                        side1_bits -= 25;
 
                        /* side two */

-                       
+

                        /* number of physical banks */
                        byte = smbus_read_byte(device, 5);
                        if (byte > 1) {
                        /* number of physical banks */
                        byte = smbus_read_byte(device, 5);
                        if (byte > 1) {


@@ -487,7 +487,7 @@ static void spd_set_drb(void)
 #if CALCULATE_DRB_REG
                drb_reg = ((device - SMBUS_MEM_DEVICE_START) << 1) + 0x60;
 #endif
 #if CALCULATE_DRB_REG
                drb_reg = ((device - SMBUS_MEM_DEVICE_START) << 1) + 0x60;
 #endif

-               
+

 #if HAVE_STRING_SUPPORT
                print_debug("end_of_memory: "); print_debug_hex32(end_of_memory); print_debug("\n");
 #endif
 #if HAVE_STRING_SUPPORT
                print_debug("end_of_memory: "); print_debug_hex32(end_of_memory); print_debug("\n");
 #endif

diff --git a/util/romcc/tests/simple_test43.c b/util/romcc/tests/simple_test43.c
index 4fb2735d83308f7ad2d038b2d8d407692875e792..464f26f9184aea0cf21dc5003d4a93b7d35e8c66 100644 (file)
--- a/util/romcc/tests/simple_test43.c
+++ b/util/romcc/tests/simple_test43.c
@@ -24,13 +24,13 @@ static void spd_set_memclk(void)
                        if (!loops) {
                                goto end;
                        }
                        if (!loops) {
                                goto end;
                        }

-                       
+

                        loops = 1000000;
                        while(--loops)
                                ;
                        loops = 1000000;
                        while(--loops)
                                ;

-               end:    
+               end:

                        ;
                        ;

-                       
+

                 }
                loops = 1000000;
                while(--loops)
                 }
                loops = 1000000;
                while(--loops)

diff --git a/util/romcc/tests/simple_test45.c b/util/romcc/tests/simple_test45.c
index beb041708c3343bcb3f2ff11273924d70956c6ac..5e8d742fa8509070ca9381b0e57904586bcc2117 100644 (file)
--- a/util/romcc/tests/simple_test45.c
+++ b/util/romcc/tests/simple_test45.c
@@ -10,8 +10,8 @@ static void spd_set_memclk(void)
        device = 0x50;
        new_cycle_time = 0xa0;
        new_latency = 5;
        device = 0x50;
        new_cycle_time = 0xa0;
        new_latency = 5;

-       
-       
+
+

        latency = 0;
        for(index = 0; index < 3; index++, latency++) {
                unsigned long loops;
        latency = 0;
        for(index = 0; index < 3; index++, latency++) {
                unsigned long loops;


@@ -23,10 +23,10 @@ static void spd_set_memclk(void)
                if (!loops) {
                        continue;
                }
                if (!loops) {
                        continue;
                }

-               
+

                __builtin_outb(device, 0xe4);
                __builtin_outb(index, 0xe8);
                __builtin_outb(device, 0xe4);
                __builtin_outb(index, 0xe8);

-               
+

                loops = 1000000;
                while(--loops)
                        ;
                loops = 1000000;
                while(--loops)
                        ;

diff --git a/util/romcc/tests/simple_test46.c b/util/romcc/tests/simple_test46.c
index bd84246b027c1b2856a88f2f0c32ac3d172936a7..0b831254a112541a056bf12177d65b234bc3fbc5 100644 (file)
--- a/util/romcc/tests/simple_test46.c
+++ b/util/romcc/tests/simple_test46.c
@@ -22,16 +22,16 @@ static void spd_set_memclk(void)
                if (loops < 0) {
                        continue;
                }
                if (loops < 0) {
                        continue;
                }

-               
+

                __builtin_outb(device, 0x10e4);
                __builtin_outb(address, 0x10e8);
                __builtin_outb(device, 0x10e4);
                __builtin_outb(address, 0x10e8);

-               
+

                loops = 1000000;
                if ((loops?0:-1) < 0) {
                        continue;
                }
        }
                loops = 1000000;
                if ((loops?0:-1) < 0) {
                        continue;
                }
        }

-       
+

        if (new_cycle_time > min_cycle_time) {
                min_cycle_time = new_cycle_time;
        }
        if (new_cycle_time > min_cycle_time) {
                min_cycle_time = new_cycle_time;
        }

diff --git a/util/romcc/tests/simple_test47.c b/util/romcc/tests/simple_test47.c
index 28d72eaa9abc897b4b4ead6bcdb9d6e0a8eb1a58..d1c54aeced2ec48a19ae72524f618aa44e8268d1 100644 (file)
--- a/util/romcc/tests/simple_test47.c
+++ b/util/romcc/tests/simple_test47.c
@@ -16,18 +16,18 @@ static void spd_set_memclk(void)
        for(index = 0; index < 3; index++, latency++) {
                unsigned long loops;
                unsigned address = index;
        for(index = 0; index < 3; index++, latency++) {
                unsigned long loops;
                unsigned address = index;

-               
+

                loops = 1000000;
                do {
                } while(--loops);
                if (loops) {
                        continue;
                }
                loops = 1000000;
                do {
                } while(--loops);
                if (loops) {
                        continue;
                }

-               
+

                __builtin_outb(device, 0x10e4);
                __builtin_outb(device, 0x10e4);

-               
+

                __builtin_outb(address & 0xFF, 0x10e8);
                __builtin_outb(address & 0xFF, 0x10e8);

-               
+

                loops = 1000000;
                while(--loops)
                        ;
                loops = 1000000;
                while(--loops)
                        ;

diff --git a/util/romcc/tests/simple_test48.c b/util/romcc/tests/simple_test48.c
index 779ecfdc9695118575e604298ed0cd46f7d37add..cf9ee8ab0f17ac6895361f2c506c00f705a0e206 100644 (file)
--- a/util/romcc/tests/simple_test48.c
+++ b/util/romcc/tests/simple_test48.c
@@ -9,5 +9,5 @@ static void main(void)
        __builtin_outb(j, 0xef90);
  next:
        __builtin_outb(i, 0x5678);
        __builtin_outb(j, 0xef90);
  next:
        __builtin_outb(i, 0x5678);

-               
+

 }
 }

diff --git a/util/romcc/tests/simple_test49.c b/util/romcc/tests/simple_test49.c
index a5a12c1cd84b5dc0555a6f19371ec3c3c52ddb0c..b18b4cb4b91999574bf28130f5c5661cd439c707 100644 (file)
--- a/util/romcc/tests/simple_test49.c
+++ b/util/romcc/tests/simple_test49.c
@@ -11,5 +11,5 @@ static void main(void)
                }
        }
        __builtin_outb(i, 0x5678);
                }
        }
        __builtin_outb(i, 0x5678);

-               
+

 }
 }

diff --git a/util/romcc/tests/simple_test5.c b/util/romcc/tests/simple_test5.c
index efc1e9489a8ae54063aaa650edf3c221d71529e0..725d7453df79c7c48461407367f87c5c988b4be0 100644 (file)
--- a/util/romcc/tests/simple_test5.c
+++ b/util/romcc/tests/simple_test5.c
@@ -85,7 +85,7 @@ static void pcibios_write_config_dword(
 int log2(int value)
 {
        /* __builtin_bsr is a exactly equivalent to the x86 machine
 int log2(int value)
 {
        /* __builtin_bsr is a exactly equivalent to the x86 machine

-        * instruction with the exception that it returns -1  
+        * instruction with the exception that it returns -1

         * when the value presented to it is zero.
         * Otherwise __builtin_bsr returns the zero based index of
         * the highest bit set.
         * when the value presented to it is zero.
         * Otherwise __builtin_bsr returns the zero based index of
         * the highest bit set.


@@ -102,7 +102,7 @@ int log2(int value)
 #define PM_BUS 0
 #define PM_DEVFN (PIIX4_DEVFN+3)
 
 #define PM_BUS 0
 #define PM_DEVFN (PIIX4_DEVFN+3)
 

-#if HAVE_CONSTANT_PROPOGATION 
+#if HAVE_CONSTANT_PROPOGATION

 #define SMBUS_IO_BASE 0x1000
 #define SMBHSTSTAT 0
 #define SMBHSTCTL  2
 #define SMBUS_IO_BASE 0x1000
 #define SMBHSTSTAT 0
 #define SMBHSTCTL  2


@@ -290,7 +290,7 @@ static void spd_enable_refresh(void)
        }
        byte &= 0x7f;
        /* Default refresh rate be conservative */
        }
        byte &= 0x7f;
        /* Default refresh rate be conservative */

-       refresh_rate = 5; 
+       refresh_rate = 5;

        /* see if the ram refresh is a supported one */
        if (byte < 6) {
 #if HAVE_STATIC_ARRAY_SUPPORT
        /* see if the ram refresh is a supported one */
        if (byte < 6) {
 #if HAVE_STATIC_ARRAY_SUPPORT

diff --git a/util/romcc/tests/simple_test50.c b/util/romcc/tests/simple_test50.c
index 51c7c505c97046ecccc727ea093311297d0a5425..f8d29b716fe333cf14581eca985a43d177b1af65 100644 (file)
--- a/util/romcc/tests/simple_test50.c
+++ b/util/romcc/tests/simple_test50.c
@@ -3,17 +3,17 @@ typedef __builtin_ldiv_t ldiv_t;
 typedef __builtin_udiv_t udiv_t;
 typedef __builtin_uldiv_t uldiv_t;
 
 typedef __builtin_udiv_t udiv_t;
 typedef __builtin_uldiv_t uldiv_t;
 

-static div_t div(int numer, int denom) 
-{ 
-       return __builtin_div(numer, denom); 
+static div_t div(int numer, int denom)
+{
+       return __builtin_div(numer, denom);

 }
 }

-static ldiv_t ldiv(long numer, long denom) 
-{ 
-       return __builtin_ldiv(numer, denom); 
+static ldiv_t ldiv(long numer, long denom)
+{
+       return __builtin_ldiv(numer, denom);

 }
 static udiv_t udiv(unsigned numer, unsigned denom)
 }
 static udiv_t udiv(unsigned numer, unsigned denom)

-{ 
-       return __builtin_udiv(numer, denom); 
+{
+       return __builtin_udiv(numer, denom);

 }
 static uldiv_t uldiv(unsigned long numer, unsigned long denom)
 {
 }
 static uldiv_t uldiv(unsigned long numer, unsigned long denom)
 {

diff --git a/util/romcc/tests/simple_test54.c b/util/romcc/tests/simple_test54.c
index ec3208f4aa6663ecea2948182834c613fd5828a2..37dce795c5d3a2203c23bdb3f978ce871bb8faf5 100644 (file)
--- a/util/romcc/tests/simple_test54.c
+++ b/util/romcc/tests/simple_test54.c
@@ -34,7 +34,7 @@ static struct syscall_result syscall1(unsigned long nr, unsigned long arg1)
                : "=a" (res)
                : "a" (nr), "b" (arg1));
        return syscall_return(res);
                : "=a" (res)
                : "a" (nr), "b" (arg1));
        return syscall_return(res);

-       
+

 }
 
 static struct syscall_result syscall2(unsigned long nr, unsigned long arg1, unsigned long arg2)
 }
 
 static struct syscall_result syscall2(unsigned long nr, unsigned long arg1, unsigned long arg2)


@@ -45,7 +45,7 @@ static struct syscall_result syscall2(unsigned long nr, unsigned long arg1, unsi
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2));
        return syscall_return(res);
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2));
        return syscall_return(res);

-       
+

 }
 
 
 }
 
 


@@ -58,7 +58,7 @@ static struct syscall_result syscall3(unsigned long nr, unsigned long arg1, unsi
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3));
        return syscall_return(res);
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3));
        return syscall_return(res);

-       
+

 }
 
 static struct syscall_result syscall4(unsigned long nr, unsigned long arg1, unsigned long arg2,
 }
 
 static struct syscall_result syscall4(unsigned long nr, unsigned long arg1, unsigned long arg2,


@@ -70,7 +70,7 @@ static struct syscall_result syscall4(unsigned long nr, unsigned long arg1, unsi
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3), "S" (arg4));
        return syscall_return(res);
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3), "S" (arg4));
        return syscall_return(res);

-       
+

 }
 
 static struct syscall_result syscall5(unsigned long nr, unsigned long arg1, unsigned long arg2,
 }
 
 static struct syscall_result syscall5(unsigned long nr, unsigned long arg1, unsigned long arg2,


@@ -80,10 +80,10 @@ static struct syscall_result syscall5(unsigned long nr, unsigned long arg1, unsi
        asm volatile(
                "int $0x80"
                : "=a" (res)
        asm volatile(
                "int $0x80"
                : "=a" (res)

-               : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3), 
+               : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3),

                "S" (arg4), "D" (arg5));
        return syscall_return(res);
                "S" (arg4), "D" (arg5));
        return syscall_return(res);

-       
+

 }
 
 #define NR_exit                 1
 }
 
 #define NR_exit                 1


@@ -301,37 +301,37 @@ static void _exit(int status)
 static const char *addr_of_char(unsigned char ch)
 {
        static const char byte[] = {
 static const char *addr_of_char(unsigned char ch)
 {
        static const char byte[] = {

-               0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 
+               0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,

                0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
                0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,

-               0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 
+               0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,

                0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
                0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,

-               0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 
+               0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,

                0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
                0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,

-               0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 
+               0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,

                0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
                0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,

-               0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 
+               0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,

                0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
                0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,

-               0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 
+               0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,

                0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
                0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,

-               0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 
+               0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,

                0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,
                0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,

-               0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 
+               0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,

                0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,
                0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,

-               0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 
+               0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,

                0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
                0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,

-               0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 
+               0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,

                0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,
                0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,

-               0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 
+               0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,

                0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,
                0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,

-               0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7, 
+               0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,

                0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,
                0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,

-               0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7, 
+               0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,

                0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,
                0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,

-               0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7, 
+               0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,

                0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,
                0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,

-               0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, 
+               0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7,

                0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,
                0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,

-               0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7, 
+               0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,

                0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff,
        };
        return byte + ch;
                0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff,
        };
        return byte + ch;


@@ -407,7 +407,7 @@ static void print_debug(const char *str) { console_tx_string(str); }
 int log2(int value)
 {
        /* __builtin_bsr is a exactly equivalent to the x86 machine
 int log2(int value)
 {
        /* __builtin_bsr is a exactly equivalent to the x86 machine

-        * instruction with the exception that it returns -1  
+        * instruction with the exception that it returns -1

         * when the value presented to it is zero.
         * Otherwise __builtin_bsr returns the zero based index of
         * the highest bit set.
         * when the value presented to it is zero.
         * Otherwise __builtin_bsr returns the zero based index of
         * the highest bit set.


@@ -503,8 +503,8 @@ static unsigned spd_to_dimm(unsigned device)
 
 static void disable_dimm(unsigned index)
 {
 
 static void disable_dimm(unsigned index)
 {

-       print_debug("disabling dimm"); 
-       print_debug_hex8(index); 
+       print_debug("disabling dimm");
+       print_debug_hex8(index);

        print_debug("\r\n");
 #if 0
        pci_write_config32(PCI_DEV(0, 0x18, 2), DRAM_CSBASE + (((index << 1)+0)<<2), 0);
        print_debug("\r\n");
 #if 0
        pci_write_config32(PCI_DEV(0, 0x18, 2), DRAM_CSBASE + (((index << 1)+0)<<2), 0);


@@ -587,8 +587,8 @@ static const struct mem_param *spd_set_memclk(void)
        min_latency = 2;
 
 #if 1
        min_latency = 2;
 
 #if 1

-       print_debug("min_cycle_time: "); 
-       print_debug_hex8(min_cycle_time); 
+       print_debug("min_cycle_time: ");
+       print_debug_hex8(min_cycle_time);

        print_debug(" min_latency: ");
        print_debug_hex8(min_latency);
        print_debug("\r\n");
        print_debug(" min_latency: ");
        print_debug_hex8(min_latency);
        print_debug("\r\n");


@@ -648,8 +648,8 @@ static const struct mem_param *spd_set_memclk(void)
 #if 1
                                print_debug("device: ");
                                print_debug_hex8(device);
 #if 1
                                print_debug("device: ");
                                print_debug_hex8(device);

-                               print_debug(" new_cycle_time: "); 
-                               print_debug_hex8(new_cycle_time); 
+                               print_debug(" new_cycle_time: ");
+                               print_debug_hex8(new_cycle_time);

                                print_debug(" new_latency: ");
                                print_debug_hex8(new_latency);
                                print_debug("\r\n");
                                print_debug(" new_latency: ");
                                print_debug_hex8(new_latency);
                                print_debug("\r\n");


@@ -661,8 +661,8 @@ static const struct mem_param *spd_set_memclk(void)
 #if 1
                print_debug("device: ");
                print_debug_hex8(device);
 #if 1
                print_debug("device: ");
                print_debug_hex8(device);

-               print_debug(" new_cycle_time: "); 
-               print_debug_hex8(new_cycle_time); 
+               print_debug(" new_cycle_time: ");
+               print_debug_hex8(new_cycle_time);

                print_debug(" new_latency: ");
                print_debug_hex8(new_latency);
                print_debug("\r\n");
                print_debug(" new_latency: ");
                print_debug_hex8(new_latency);
                print_debug("\r\n");


@@ -682,8 +682,8 @@ static const struct mem_param *spd_set_memclk(void)
 #if 1
                print_debug("device: ");
                print_debug_hex8(device);
 #if 1
                print_debug("device: ");
                print_debug_hex8(device);

-               print_debug(" min_cycle_time: "); 
-               print_debug_hex8(min_cycle_time); 
+               print_debug(" min_cycle_time: ");
+               print_debug_hex8(min_cycle_time);

                print_debug(" min_latency: ");
                print_debug_hex8(min_latency);
                print_debug("\r\n");
                print_debug(" min_latency: ");
                print_debug_hex8(min_latency);
                print_debug("\r\n");


@@ -721,11 +721,11 @@ static const struct mem_param *spd_set_memclk(void)
                if ((latency != min_latency) || (index >= 3)) {
                        goto dimm_err;
                }
                if ((latency != min_latency) || (index >= 3)) {
                        goto dimm_err;
                }

-               
+

                /* Read the min_cycle_time for this latency */
                value = smbus_read_byte(device, latency_indicies[index]);
                /* Read the min_cycle_time for this latency */
                value = smbus_read_byte(device, latency_indicies[index]);

-               
-               /* All is good if the selected clock speed 
+
+               /* All is good if the selected clock speed

                 * is what I need or slower.
                 */
                if (value <= min_cycle_time) {
                 * is what I need or slower.
                 */
                if (value <= min_cycle_time) {


@@ -736,8 +736,8 @@ static const struct mem_param *spd_set_memclk(void)
                disable_dimm(spd_to_dimm(device));
        }
 #if 1
                disable_dimm(spd_to_dimm(device));
        }
 #if 1

-       print_debug("min_cycle_time: "); 
-       print_debug_hex8(min_cycle_time); 
+       print_debug("min_cycle_time: ");
+       print_debug_hex8(min_cycle_time);

        print_debug(" min_latency: ");
        print_debug_hex8(min_latency);
        print_debug("\r\n");
        print_debug(" min_latency: ");
        print_debug_hex8(min_latency);
        print_debug("\r\n");


@@ -759,7 +759,7 @@ static const struct mem_param *spd_set_memclk(void)
        value |= latencies[min_latency - 2];
        pci_write_config32(PCI_DEV(0, 0x18, 2), DRAM_CONFIG_LOW, value);
 #endif
        value |= latencies[min_latency - 2];
        pci_write_config32(PCI_DEV(0, 0x18, 2), DRAM_CONFIG_LOW, value);
 #endif

-       
+

        return param;
 }
 
        return param;
 }
 

diff --git a/util/romcc/tests/simple_test56.c b/util/romcc/tests/simple_test56.c
index 831ee9a4ca2cea44251cb7ca845c6ae575cbd2e4..570b4eeec3dee6a1dc8d56a21ef4374f895647c7 100644 (file)
--- a/util/romcc/tests/simple_test56.c
+++ b/util/romcc/tests/simple_test56.c
@@ -31,7 +31,7 @@ static void spd_enable_refresh(void)
        }
        byte &= 0x7f;
        /* Default refresh rate be conservative */
        }
        byte &= 0x7f;
        /* Default refresh rate be conservative */

-       refresh_rate = 5; 
+       refresh_rate = 5;

        /* see if the ram refresh is a supported one */
        if (byte < 6) {
                refresh_rate = refresh_rates[byte];
        /* see if the ram refresh is a supported one */
        if (byte < 6) {
                refresh_rate = refresh_rates[byte];

diff --git a/util/romcc/tests/simple_test59.c b/util/romcc/tests/simple_test59.c
index 4b0ee36133f194b8063ef510489adaa457784459..a54c0435d398599416a3a6922779488cd9e01b57 100644 (file)
--- a/util/romcc/tests/simple_test59.c
+++ b/util/romcc/tests/simple_test59.c
@@ -34,7 +34,7 @@ static struct syscall_result syscall1(unsigned long nr, unsigned long arg1)
                : "=a" (res)
                : "a" (nr), "b" (arg1));
        return syscall_return(res);
                : "=a" (res)
                : "a" (nr), "b" (arg1));
        return syscall_return(res);

-       
+

 }
 
 static struct syscall_result syscall2(unsigned long nr, unsigned long arg1, unsigned long arg2)
 }
 
 static struct syscall_result syscall2(unsigned long nr, unsigned long arg1, unsigned long arg2)


@@ -45,7 +45,7 @@ static struct syscall_result syscall2(unsigned long nr, unsigned long arg1, unsi
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2));
        return syscall_return(res);
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2));
        return syscall_return(res);

-       
+

 }
 
 
 }
 
 


@@ -58,7 +58,7 @@ static struct syscall_result syscall3(unsigned long nr, unsigned long arg1, unsi
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3));
        return syscall_return(res);
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3));
        return syscall_return(res);

-       
+

 }
 
 static struct syscall_result syscall4(unsigned long nr, unsigned long arg1, unsigned long arg2,
 }
 
 static struct syscall_result syscall4(unsigned long nr, unsigned long arg1, unsigned long arg2,


@@ -70,7 +70,7 @@ static struct syscall_result syscall4(unsigned long nr, unsigned long arg1, unsi
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3), "S" (arg4));
        return syscall_return(res);
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3), "S" (arg4));
        return syscall_return(res);

-       
+

 }
 
 static struct syscall_result syscall5(unsigned long nr, unsigned long arg1, unsigned long arg2,
 }
 
 static struct syscall_result syscall5(unsigned long nr, unsigned long arg1, unsigned long arg2,


@@ -80,10 +80,10 @@ static struct syscall_result syscall5(unsigned long nr, unsigned long arg1, unsi
        asm volatile(
                "int $0x80"
                : "=a" (res)
        asm volatile(
                "int $0x80"
                : "=a" (res)

-               : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3), 
+               : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3),

                "S" (arg4), "D" (arg5));
        return syscall_return(res);
                "S" (arg4), "D" (arg5));
        return syscall_return(res);

-       
+

 }
 
 #define NR_exit                 1
 }
 
 #define NR_exit                 1


@@ -301,37 +301,37 @@ static void _exit(int status)
 static const char *addr_of_char(unsigned char ch)
 {
        static const char byte[] = {
 static const char *addr_of_char(unsigned char ch)
 {
        static const char byte[] = {

-               0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 
+               0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,

                0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
                0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,

-               0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 
+               0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,

                0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
                0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,

-               0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 
+               0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,

                0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
                0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,

-               0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 
+               0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,

                0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
                0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,

-               0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 
+               0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,

                0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
                0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,

-               0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 
+               0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,

                0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
                0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,

-               0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 
+               0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,

                0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,
                0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,

-               0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 
+               0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,

                0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,
                0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,

-               0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 
+               0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,

                0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
                0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,

-               0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 
+               0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,

                0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,
                0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,

-               0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 
+               0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,

                0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,
                0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,

-               0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7, 
+               0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,

                0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,
                0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,

-               0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7, 
+               0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,

                0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,
                0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,

-               0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7, 
+               0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,

                0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,
                0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,

-               0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, 
+               0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7,

                0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,
                0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,

-               0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7, 
+               0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,

                0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff,
        };
        return byte + ch;
                0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff,
        };
        return byte + ch;

diff --git a/util/romcc/tests/simple_test6.c b/util/romcc/tests/simple_test6.c
index aba7f1f5493bcfc89546107470a889081b3f9da6..147614e84b1563006a3a8caa45ed966f88119f4a 100644 (file)
--- a/util/romcc/tests/simple_test6.c
+++ b/util/romcc/tests/simple_test6.c
@@ -81,7 +81,7 @@ static void pcibios_write_config_dword(
 int log2(int value)
 {
        /* __builtin_bsr is a exactly equivalent to the x86 machine
 int log2(int value)
 {
        /* __builtin_bsr is a exactly equivalent to the x86 machine

-        * instruction with the exception that it returns -1  
+        * instruction with the exception that it returns -1

         * when the value presented to it is zero.
         * Otherwise __builtin_bsr returns the zero based index of
         * the highest bit set.
         * when the value presented to it is zero.
         * Otherwise __builtin_bsr returns the zero based index of
         * the highest bit set.


@@ -98,7 +98,7 @@ int log2(int value)
 #define PM_BUS 0
 #define PM_DEVFN (PIIX4_DEVFN+3)
 
 #define PM_BUS 0
 #define PM_DEVFN (PIIX4_DEVFN+3)
 

-#if HAVE_CONSTANT_PROPOGATION 
+#if HAVE_CONSTANT_PROPOGATION

 #define SMBUS_IO_BASE 0x1000
 #define SMBHSTSTAT 0
 #define SMBHSTCTL  2
 #define SMBUS_IO_BASE 0x1000
 #define SMBHSTSTAT 0
 #define SMBHSTCTL  2

diff --git a/util/romcc/tests/simple_test61.c b/util/romcc/tests/simple_test61.c
index 583a9db36b7160ca39697320ea7cf7850f454fa2..2b235ccd5eac4b38cc8cc60a0aeebc116a11b1f0 100644 (file)
--- a/util/romcc/tests/simple_test61.c
+++ b/util/romcc/tests/simple_test61.c
@@ -16,7 +16,7 @@ static void spd_set_nbxcfg(void)
 
                /* set the device I'm talking too */
                __builtin_outb(device, 0x1004);
 
                /* set the device I'm talking too */
                __builtin_outb(device, 0x1004);

-               
+

                /* poll for transaction completion */
                byte = __builtin_inb(0x10);
                while(byte == 0) {
                /* poll for transaction completion */
                byte = __builtin_inb(0x10);
                while(byte == 0) {

diff --git a/util/romcc/tests/simple_test65.c b/util/romcc/tests/simple_test65.c
index 642882c2a2cd27be86a7c07e74b1af748b1f8c4e..9921e2e9cce30dce24b39994f648ce95f6daf6c2 100644 (file)
--- a/util/romcc/tests/simple_test65.c
+++ b/util/romcc/tests/simple_test65.c
@@ -6,5 +6,5 @@ static void main(void)
 {
        enum tag foo;
        foo = Y;
 {
        enum tag foo;
        foo = Y;

-       
+

 }
 }

diff --git a/util/romcc/tests/simple_test66.c b/util/romcc/tests/simple_test66.c
index 5857855700a1116714abb6c248f0826b3f70780e..afc0255345ed8423df777e42cf235002aea27602 100644 (file)
--- a/util/romcc/tests/simple_test66.c
+++ b/util/romcc/tests/simple_test66.c
@@ -1,8 +1,8 @@
 typedef unsigned char uint8_t;
 static unsigned int generate_row(uint8_t row, uint8_t maxnodes)
 {
 typedef unsigned char uint8_t;
 static unsigned int generate_row(uint8_t row, uint8_t maxnodes)
 {

-        
-       unsigned int ret=0x00010101;  
+
+       unsigned int ret=0x00010101;

        static const unsigned int rows_2p[2][2] = {
                { 0x00050101, 0x00010404 },
                { 0x00010404, 0x00050101 }
        static const unsigned int rows_2p[2][2] = {
                { 0x00050101, 0x00010404 },
                { 0x00010404, 0x00050101 }

diff --git a/util/romcc/tests/simple_test67.c b/util/romcc/tests/simple_test67.c
index 3bfdc5a0725a6d644d501a8d25af39c02c993207..70d7170292c56098e8da3c6295bac8c9e4eae744 100644 (file)
--- a/util/romcc/tests/simple_test67.c
+++ b/util/romcc/tests/simple_test67.c
@@ -11,7 +11,7 @@ static void main(void)
        if (!(dcl & (1 << 8))) {
                if (dimms == 4) {
                        async_lat = 9;
        if (!(dcl & (1 << 8))) {
                if (dimms == 4) {
                        async_lat = 9;

-               } 
+               }

                else {
                        async_lat = 8;
                }
                else {
                        async_lat = 8;
                }

diff --git a/util/romcc/tests/simple_test7.c b/util/romcc/tests/simple_test7.c
index 571f2cdb71a37fd3737b98032f2ac3e48795f0d6..a2065463a31bdac1daff756a81046a9e30912d57 100644 (file)
--- a/util/romcc/tests/simple_test7.c
+++ b/util/romcc/tests/simple_test7.c
@@ -1,4 +1,4 @@
-void main(void) 
+void main(void)

 {
        int i;
        i = 0;
 {
        int i;
        i = 0;


@@ -8,5 +8,5 @@ void main(void)
                j = i++;
                __builtin_outb(j, 0xdc);
        } while(i <= 9);
                j = i++;
                __builtin_outb(j, 0xdc);
        } while(i <= 9);

-       
+

 }
 }

diff --git a/util/romcc/tests/simple_test72.c b/util/romcc/tests/simple_test72.c
index 2011fea7fa2a406497ec99b290650822108f4404..10f6ee9f4dd80680f862f116c1a216885b10193b 100644 (file)
--- a/util/romcc/tests/simple_test72.c
+++ b/util/romcc/tests/simple_test72.c
@@ -1,37 +1,37 @@
 static const char *addr_of_char(unsigned char ch)
 {
        static const char byte[] = {
 static const char *addr_of_char(unsigned char ch)
 {
        static const char byte[] = {

-               0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 
+               0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,

                0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
                0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,

-               0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 
+               0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,

                0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
                0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,

-               0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 
+               0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,

                0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
                0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,

-               0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 
+               0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,

                0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
                0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,

-               0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 
+               0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,

                0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
                0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,

-               0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 
+               0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,

                0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
                0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,

-               0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 
+               0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,

                0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,
                0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,

-               0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 
+               0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,

                0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,
                0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,

-               0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 
+               0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,

                0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
                0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,

-               0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 
+               0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,

                0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,
                0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,

-               0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 
+               0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,

                0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,
                0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,

-               0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7, 
+               0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,

                0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,
                0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,

-               0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7, 
+               0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,

                0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,
                0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,

-               0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7, 
+               0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,

                0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,
                0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,

-               0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, 
+               0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7,

                0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,
                0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,

-               0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7, 
+               0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,

                0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff,
        };
        return byte + ch;
                0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff,
        };
        return byte + ch;


@@ -45,7 +45,7 @@ static void print_debug_char(int c)
                :
                : "a" (4), "b" (1), "c" (addr_of_char(c)), "d" (1)
                );
                :
                : "a" (4), "b" (1), "c" (addr_of_char(c)), "d" (1)
                );

-       
+

 }
 static void print_debug_nibble(unsigned nibble)
 {
 }
 static void print_debug_nibble(unsigned nibble)
 {


@@ -122,7 +122,7 @@ static void spd_set_memclk(void)
        int index;
        int latencies;
        int latency;
        int index;
        int latencies;
        int latency;

-       
+

        /* First find the supported CAS latencies
         * Byte 18 for DDR SDRAM is interpreted:
         * bit 0 == CAS Latency = 1.0
        /* First find the supported CAS latencies
         * Byte 18 for DDR SDRAM is interpreted:
         * bit 0 == CAS Latency = 1.0


@@ -138,12 +138,12 @@ static void spd_set_memclk(void)
        new_latency = 5;
 
        latencies = smbus_read_byte(device, 18);
        new_latency = 5;
 
        latencies = smbus_read_byte(device, 18);

-       
+

        /* Compute the lowest cas latency supported */
        latency = __builtin_bsr(latencies) -2;
 
        /* Loop through and find a fast clock with a low latency */
        /* Compute the lowest cas latency supported */
        latency = __builtin_bsr(latencies) -2;
 
        /* Loop through and find a fast clock with a low latency */

-       for(index = 0; index < 1; index++, latency++) 
+       for(index = 0; index < 1; index++, latency++)

        {
                int value;
 
        {
                int value;
 


@@ -152,7 +152,7 @@ static void spd_set_memclk(void)
                        continue;
                }
                value = smbus_read_byte(device, index);
                        continue;
                }
                value = smbus_read_byte(device, index);

-               
+

                /* Only increase the latency if we decreas the clock */
                if ((value >= min_cycle_time) && (value < new_cycle_time)) {
                        new_cycle_time = value;
                /* Only increase the latency if we decreas the clock */
                if ((value >= min_cycle_time) && (value < new_cycle_time)) {
                        new_cycle_time = value;

diff --git a/util/romcc/tests/simple_test73.c b/util/romcc/tests/simple_test73.c
index f9e00cd4f8f606f45013f2cf1719cbfc27bd9da5..da69cf5e7d59d5072a84b16e95014ed3819c4162 100644 (file)
--- a/util/romcc/tests/simple_test73.c
+++ b/util/romcc/tests/simple_test73.c
@@ -1,37 +1,37 @@
 static const char *addr_of_char(unsigned char ch)
 {
        static const char byte[] = {
 static const char *addr_of_char(unsigned char ch)
 {
        static const char byte[] = {

-               0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 
+               0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,

                0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
                0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,

-               0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 
+               0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,

                0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
                0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,

-               0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 
+               0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,

                0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
                0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,

-               0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 
+               0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,

                0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
                0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,

-               0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 
+               0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,

                0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
                0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,

-               0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 
+               0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,

                0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
                0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,

-               0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 
+               0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,

                0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,
                0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,

-               0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 
+               0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,

                0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,
                0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,

-               0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 
+               0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,

                0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
                0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,

-               0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 
+               0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,

                0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,
                0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,

-               0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 
+               0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,

                0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,
                0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,

-               0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7, 
+               0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,

                0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,
                0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,

-               0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7, 
+               0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,

                0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,
                0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,

-               0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7, 
+               0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,

                0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,
                0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,

-               0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, 
+               0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7,

                0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,
                0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,

-               0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7, 
+               0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,

                0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff,
        };
        return byte + ch;
                0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff,
        };
        return byte + ch;

diff --git a/util/romcc/tests/simple_test74.c b/util/romcc/tests/simple_test74.c
index 177e00f29e25bb11195e885d2a9cfb8dc318276c..fff1a16e3fe2933d4b997c3870d135083e6d63ba 100644 (file)
--- a/util/romcc/tests/simple_test74.c
+++ b/util/romcc/tests/simple_test74.c
@@ -24,7 +24,7 @@ static struct syscall_result syscall1(unsigned long nr, unsigned long arg1)
                : "=a" (res)
                : "a" (nr), "b" (arg1));
        return syscall_return(res);
                : "=a" (res)
                : "a" (nr), "b" (arg1));
        return syscall_return(res);

-       
+

 }
 
 
 }
 
 


@@ -37,7 +37,7 @@ static struct syscall_result syscall3(unsigned long nr, unsigned long arg1, unsi
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3));
        return syscall_return(res);
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3));
        return syscall_return(res);

-       
+

 }
 
 #define NR_exit                 1
 }
 
 #define NR_exit                 1

diff --git a/util/romcc/tests/simple_test75.c b/util/romcc/tests/simple_test75.c
index 1ad87bd2a0d79f3ff8279ac6b7e9cee3a3025812..ae28a3ce1a305452bb9d55a604880eb5ab9d1236 100644 (file)
--- a/util/romcc/tests/simple_test75.c
+++ b/util/romcc/tests/simple_test75.c
@@ -1,7 +1,7 @@
 static void goto_test(void)
 {
        int i;
 static void goto_test(void)
 {
        int i;

-       
+

        i = 0;
        goto bottom;
        {
        i = 0;
        goto bottom;
        {

diff --git a/util/romcc/tests/simple_test76.c b/util/romcc/tests/simple_test76.c
index 4f682d37d41c8366f3ef56e908cc453e8c4e0ee0..74b1cf1657fcb391d80ad27805e79f4992b2f6dc 100644 (file)
--- a/util/romcc/tests/simple_test76.c
+++ b/util/romcc/tests/simple_test76.c
@@ -23,7 +23,7 @@ static struct syscall_result syscall1(unsigned long nr, unsigned long arg1)
                : "=a" (res)
                : "a" (nr), "b" (arg1));
        return syscall_return(res);
                : "=a" (res)
                : "a" (nr), "b" (arg1));
        return syscall_return(res);

-       
+

 }
 
 static struct syscall_result syscall3(unsigned long nr, unsigned long arg1, unsigned long arg2,
 }
 
 static struct syscall_result syscall3(unsigned long nr, unsigned long arg1, unsigned long arg2,


@@ -35,7 +35,7 @@ static struct syscall_result syscall3(unsigned long nr, unsigned long arg1, unsi
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3));
        return syscall_return(res);
                : "=a" (res)
                : "a" (nr), "b" (arg1), "c" (arg2), "d" (arg3));
        return syscall_return(res);

-       
+

 }
 
 #define NR_exit                 1
 }
 
 #define NR_exit                 1

diff --git a/util/romcc/tests/simple_test81.c b/util/romcc/tests/simple_test81.c
index e942679d677cb6b41bf336e2e3392504a50950ff..1f647aae8d0c2041f7f1bc0bea414995a582d06b 100644 (file)
--- a/util/romcc/tests/simple_test81.c
+++ b/util/romcc/tests/simple_test81.c
@@ -4,5 +4,5 @@ static void main(void)
        i = __builtin_inb(0x1234);
        int j;
        j = __builtin_inb(0xabcd);
        i = __builtin_inb(0x1234);
        int j;
        j = __builtin_inb(0xabcd);

-               
+

 }
 }

diff --git a/util/sconfig/lex.yy.c_shipped b/util/sconfig/lex.yy.c_shipped
index 7239b25df40b2e07c347761acc1f2dcb7dc998f0..c43d5bb3bd8860dddfbb55f7699fae37d33f9a72 100644 (file)
--- a/util/sconfig/lex.yy.c_shipped
+++ b/util/sconfig/lex.yy.c_shipped
@@ -33,7 +33,7 @@
 #if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L
 
 /* C99 says to define __STDC_LIMIT_MACROS before including stdint.h,
 #if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L
 
 /* C99 says to define __STDC_LIMIT_MACROS before including stdint.h,

- * if you want the limit (max/min) macros for int types. 
+ * if you want the limit (max/min) macros for int types.

  */
 #ifndef __STDC_LIMIT_MACROS
 #define __STDC_LIMIT_MACROS 1
  */
 #ifndef __STDC_LIMIT_MACROS
 #define __STDC_LIMIT_MACROS 1


@@ -50,7 +50,7 @@ typedef uint32_t flex_uint32_t;
 typedef signed char flex_int8_t;
 typedef short int flex_int16_t;
 typedef int flex_int32_t;
 typedef signed char flex_int8_t;
 typedef short int flex_int16_t;
 typedef int flex_int32_t;

-typedef unsigned char flex_uint8_t; 
+typedef unsigned char flex_uint8_t;

 typedef unsigned short int flex_uint16_t;
 typedef unsigned int flex_uint32_t;
 #endif /* ! C99 */
 typedef unsigned short int flex_uint16_t;
 typedef unsigned int flex_uint32_t;
 #endif /* ! C99 */


@@ -161,7 +161,7 @@ extern FILE *yyin, *yyout;
 #define EOB_ACT_LAST_MATCH 2
 
     #define YY_LESS_LINENO(n)
 #define EOB_ACT_LAST_MATCH 2
 
     #define YY_LESS_LINENO(n)

-    
+

 /* Return all but the first "n" matched characters back to the input stream. */
 #define yyless(n) \
        do \
 /* Return all but the first "n" matched characters back to the input stream. */
 #define yyless(n) \
        do \


@@ -223,7 +223,7 @@ struct yy_buffer_state
 
     int yy_bs_lineno; /**< The line count. */
     int yy_bs_column; /**< The column count. */
 
     int yy_bs_lineno; /**< The line count. */
     int yy_bs_column; /**< The column count. */

-    
+

        /* Whether to try to fill the input buffer when we reach the
         * end of it.
         */
        /* Whether to try to fill the input buffer when we reach the
         * end of it.
         */


@@ -589,7 +589,7 @@ extern int yywrap (void );
 #endif
 
     static void yyunput (int c,char *buf_ptr  );
 #endif
 
     static void yyunput (int c,char *buf_ptr  );

-    
+

 #ifndef yytext_ptr
 static void yy_flex_strncpy (char *,yyconst char *,int );
 #endif
 #ifndef yytext_ptr
 static void yy_flex_strncpy (char *,yyconst char *,int );
 #endif


@@ -710,7 +710,7 @@ YY_DECL
        register yy_state_type yy_current_state;
        register char *yy_cp, *yy_bp;
        register int yy_act;
        register yy_state_type yy_current_state;
        register char *yy_cp, *yy_bp;
        register int yy_act;

-    
+

        if ( !(yy_init) )
                {
                (yy_init) = 1;
        if ( !(yy_init) )
                {
                (yy_init) = 1;


@@ -1172,7 +1172,7 @@ static int yy_get_next_buffer (void)
 {
        register yy_state_type yy_current_state;
        register char *yy_cp;
 {
        register yy_state_type yy_current_state;
        register char *yy_cp;

-    
+

        yy_current_state = (yy_start);
 
        for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp )
        yy_current_state = (yy_start);
 
        for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp )


@@ -1226,7 +1226,7 @@ static int yy_get_next_buffer (void)
     static void yyunput (int c, register char * yy_bp )
 {
        register char *yy_cp;
     static void yyunput (int c, register char * yy_bp )
 {
        register char *yy_cp;

-    
+

     yy_cp = (yy_c_buf_p);
 
        /* undo effects of setting up yytext */
     yy_cp = (yy_c_buf_p);
 
        /* undo effects of setting up yytext */


@@ -1269,7 +1269,7 @@ static int yy_get_next_buffer (void)
 
 {
        int c;
 
 {
        int c;

-    
+

        *(yy_c_buf_p) = (yy_hold_char);
 
        if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR )
        *(yy_c_buf_p) = (yy_hold_char);
 
        if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR )


@@ -1336,12 +1336,12 @@ static int yy_get_next_buffer (void)
 
 /** Immediately switch to a different input stream.
  * @param input_file A readable stream.
 
 /** Immediately switch to a different input stream.
  * @param input_file A readable stream.

- * 
+ *

  * @note This function does not reset the start condition to @c INITIAL .
  */
     void yyrestart  (FILE * input_file )
 {
  * @note This function does not reset the start condition to @c INITIAL .
  */
     void yyrestart  (FILE * input_file )
 {

-    
+

        if ( ! YY_CURRENT_BUFFER ){
         yyensure_buffer_stack ();
                YY_CURRENT_BUFFER_LVALUE =
        if ( ! YY_CURRENT_BUFFER ){
         yyensure_buffer_stack ();
                YY_CURRENT_BUFFER_LVALUE =


@@ -1354,11 +1354,11 @@ static int yy_get_next_buffer (void)
 
 /** Switch to a different input buffer.
  * @param new_buffer The new input buffer.
 
 /** Switch to a different input buffer.
  * @param new_buffer The new input buffer.

- * 
+ *

  */
     void yy_switch_to_buffer  (YY_BUFFER_STATE  new_buffer )
 {
  */
     void yy_switch_to_buffer  (YY_BUFFER_STATE  new_buffer )
 {

-    
+

        /* TODO. We should be able to replace this entire function body
         * with
         *              yypop_buffer_state();
        /* TODO. We should be able to replace this entire function body
         * with
         *              yypop_buffer_state();


@@ -1398,13 +1398,13 @@ static void yy_load_buffer_state  (void)
 /** Allocate and initialize an input buffer state.
  * @param file A readable stream.
  * @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE.
 /** Allocate and initialize an input buffer state.
  * @param file A readable stream.
  * @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE.

- * 
+ *

  * @return the allocated buffer state.
  */
     YY_BUFFER_STATE yy_create_buffer  (FILE * file, int  size )
 {
        YY_BUFFER_STATE b;
  * @return the allocated buffer state.
  */
     YY_BUFFER_STATE yy_create_buffer  (FILE * file, int  size )
 {
        YY_BUFFER_STATE b;

-    
+

        b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state )  );
        if ( ! b )
                YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" );
        b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state )  );
        if ( ! b )
                YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" );


@@ -1427,11 +1427,11 @@ static void yy_load_buffer_state  (void)
 
 /** Destroy the buffer.
  * @param b a buffer created with yy_create_buffer()
 
 /** Destroy the buffer.
  * @param b a buffer created with yy_create_buffer()

- * 
+ *

  */
     void yy_delete_buffer (YY_BUFFER_STATE  b )
 {
  */
     void yy_delete_buffer (YY_BUFFER_STATE  b )
 {

-    
+

        if ( ! b )
                return;
 
        if ( ! b )
                return;
 


@@ -1447,7 +1447,7 @@ static void yy_load_buffer_state  (void)
 #ifndef __cplusplus
 extern int isatty (int );
 #endif /* __cplusplus */
 #ifndef __cplusplus
 extern int isatty (int );
 #endif /* __cplusplus */

-    
+

 /* Initializes or reinitializes a buffer.
  * This function is sometimes called more than once on the same buffer,
  * such as during a yyrestart() or at EOF.
 /* Initializes or reinitializes a buffer.
  * This function is sometimes called more than once on the same buffer,
  * such as during a yyrestart() or at EOF.


@@ -1456,7 +1456,7 @@ extern int isatty (int );
 
 {
        int oerrno = errno;
 
 {
        int oerrno = errno;

-    
+

        yy_flush_buffer(b );
 
        b->yy_input_file = file;
        yy_flush_buffer(b );
 
        b->yy_input_file = file;


@@ -1472,13 +1472,13 @@ extern int isatty (int );
     }
 
         b->yy_is_interactive = file ? (isatty( fileno(file) ) > 0) : 0;
     }
 
         b->yy_is_interactive = file ? (isatty( fileno(file) ) > 0) : 0;

-    
+

        errno = oerrno;
 }
 
 /** Discard all buffered characters. On the next scan, YY_INPUT will be called.
  * @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER.
        errno = oerrno;
 }
 
 /** Discard all buffered characters. On the next scan, YY_INPUT will be called.
  * @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER.

- * 
+ *

  */
     void yy_flush_buffer (YY_BUFFER_STATE  b )
 {
  */
     void yy_flush_buffer (YY_BUFFER_STATE  b )
 {


@@ -1507,7 +1507,7 @@ extern int isatty (int );
  *  the current state. This function will allocate the stack
  *  if necessary.
  *  @param new_buffer The new state.
  *  the current state. This function will allocate the stack
  *  if necessary.
  *  @param new_buffer The new state.

- *  
+ *

  */
 void yypush_buffer_state (YY_BUFFER_STATE new_buffer )
 {
  */
 void yypush_buffer_state (YY_BUFFER_STATE new_buffer )
 {


@@ -1537,7 +1537,7 @@ void yypush_buffer_state (YY_BUFFER_STATE new_buffer )
 
 /** Removes and deletes the top of the stack, if present.
  *  The next element becomes the new top.
 
 /** Removes and deletes the top of the stack, if present.
  *  The next element becomes the new top.

- *  
+ *

  */
 void yypop_buffer_state (void)
 {
  */
 void yypop_buffer_state (void)
 {


@@ -1561,7 +1561,7 @@ void yypop_buffer_state (void)
 static void yyensure_buffer_stack (void)
 {
        int num_to_alloc;
 static void yyensure_buffer_stack (void)
 {
        int num_to_alloc;

-    
+

        if (!(yy_buffer_stack)) {
 
                /* First allocation is just for 2 elements, since we don't know if this
        if (!(yy_buffer_stack)) {
 
                /* First allocation is just for 2 elements, since we don't know if this


@@ -1574,9 +1574,9 @@ static void yyensure_buffer_stack (void)
                                                                );
                if ( ! (yy_buffer_stack) )
                        YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" );
                                                                );
                if ( ! (yy_buffer_stack) )
                        YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" );

-                                                                 
+

                memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*));
                memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*));

-                               
+

                (yy_buffer_stack_max) = num_to_alloc;
                (yy_buffer_stack_top) = 0;
                return;
                (yy_buffer_stack_max) = num_to_alloc;
                (yy_buffer_stack_top) = 0;
                return;


@@ -1604,13 +1604,13 @@ static void yyensure_buffer_stack (void)
 /** Setup the input buffer state to scan directly from a user-specified character buffer.
  * @param base the character buffer
  * @param size the size in bytes of the character buffer
 /** Setup the input buffer state to scan directly from a user-specified character buffer.
  * @param base the character buffer
  * @param size the size in bytes of the character buffer

- * 
- * @return the newly allocated buffer state object. 
+ *
+ * @return the newly allocated buffer state object.

  */
 YY_BUFFER_STATE yy_scan_buffer  (char * base, yy_size_t  size )
 {
        YY_BUFFER_STATE b;
  */
 YY_BUFFER_STATE yy_scan_buffer  (char * base, yy_size_t  size )
 {
        YY_BUFFER_STATE b;

-    
+

        if ( size < 2 ||
             base[size-2] != YY_END_OF_BUFFER_CHAR ||
             base[size-1] != YY_END_OF_BUFFER_CHAR )
        if ( size < 2 ||
             base[size-2] != YY_END_OF_BUFFER_CHAR ||
             base[size-1] != YY_END_OF_BUFFER_CHAR )


@@ -1639,14 +1639,14 @@ YY_BUFFER_STATE yy_scan_buffer  (char * base, yy_size_t  size )
 /** Setup the input buffer state to scan a string. The next call to yylex() will
  * scan from a @e copy of @a str.
  * @param yystr a NUL-terminated string to scan
 /** Setup the input buffer state to scan a string. The next call to yylex() will
  * scan from a @e copy of @a str.
  * @param yystr a NUL-terminated string to scan

- * 
+ *

  * @return the newly allocated buffer state object.
  * @note If you want to scan bytes that may contain NUL values, then use
  *       yy_scan_bytes() instead.
  */
 YY_BUFFER_STATE yy_scan_string (yyconst char * yystr )
 {
  * @return the newly allocated buffer state object.
  * @note If you want to scan bytes that may contain NUL values, then use
  *       yy_scan_bytes() instead.
  */
 YY_BUFFER_STATE yy_scan_string (yyconst char * yystr )
 {

-    
+

        return yy_scan_bytes(yystr,strlen(yystr) );
 }
 
        return yy_scan_bytes(yystr,strlen(yystr) );
 }
 


@@ -1654,7 +1654,7 @@ YY_BUFFER_STATE yy_scan_string (yyconst char * yystr )
  * scan from a @e copy of @a bytes.
  * @param bytes the byte buffer to scan
  * @param len the number of bytes in the buffer pointed to by @a bytes.
  * scan from a @e copy of @a bytes.
  * @param bytes the byte buffer to scan
  * @param len the number of bytes in the buffer pointed to by @a bytes.

- * 
+ *

  * @return the newly allocated buffer state object.
  */
 YY_BUFFER_STATE yy_scan_bytes  (yyconst char * yybytes, int  _yybytes_len )
  * @return the newly allocated buffer state object.
  */
 YY_BUFFER_STATE yy_scan_bytes  (yyconst char * yybytes, int  _yybytes_len )


@@ -1663,7 +1663,7 @@ YY_BUFFER_STATE yy_scan_bytes  (yyconst char * yybytes, int  _yybytes_len )
        char *buf;
        yy_size_t n;
        int i;
        char *buf;
        yy_size_t n;
        int i;

-    
+

        /* Get memory for full buffer, including space for trailing EOB's. */
        n = _yybytes_len + 2;
        buf = (char *) yyalloc(n  );
        /* Get memory for full buffer, including space for trailing EOB's. */
        n = _yybytes_len + 2;
        buf = (char *) yyalloc(n  );


@@ -1717,16 +1717,16 @@ static void yy_fatal_error (yyconst char* msg )
 /* Accessor  methods (get/set functions) to struct members. */
 
 /** Get the current line number.
 /* Accessor  methods (get/set functions) to struct members. */
 
 /** Get the current line number.

- * 
+ *

  */
 int yyget_lineno  (void)
 {
  */
 int yyget_lineno  (void)
 {

-        
+

     return yylineno;
 }
 
 /** Get the input stream.
     return yylineno;
 }
 
 /** Get the input stream.

- * 
+ *

  */
 FILE *yyget_in  (void)
 {
  */
 FILE *yyget_in  (void)
 {


@@ -1734,7 +1734,7 @@ FILE *yyget_in  (void)
 }
 
 /** Get the output stream.
 }
 
 /** Get the output stream.

- * 
+ *

  */
 FILE *yyget_out  (void)
 {
  */
 FILE *yyget_out  (void)
 {


@@ -1742,7 +1742,7 @@ FILE *yyget_out  (void)
 }
 
 /** Get the length of the current token.
 }
 
 /** Get the length of the current token.

- * 
+ *

  */
 int yyget_leng  (void)
 {
  */
 int yyget_leng  (void)
 {


@@ -1750,7 +1750,7 @@ int yyget_leng  (void)
 }
 
 /** Get the current token.
 }
 
 /** Get the current token.

- * 
+ *

  */
 
 char *yyget_text  (void)
  */
 
 char *yyget_text  (void)


@@ -1760,18 +1760,18 @@ char *yyget_text  (void)
 
 /** Set the current line number.
  * @param line_number
 
 /** Set the current line number.
  * @param line_number

- * 
+ *

  */
 void yyset_lineno (int  line_number )
 {
  */
 void yyset_lineno (int  line_number )
 {

-    
+

     yylineno = line_number;
 }
 
 /** Set the input stream. This does not discard the current
  * input buffer.
  * @param in_str A readable stream.
     yylineno = line_number;
 }
 
 /** Set the input stream. This does not discard the current
  * input buffer.
  * @param in_str A readable stream.

- * 
+ *

  * @see yy_switch_to_buffer
  */
 void yyset_in (FILE *  in_str )
  * @see yy_switch_to_buffer
  */
 void yyset_in (FILE *  in_str )


@@ -1825,7 +1825,7 @@ static int yy_init_globals (void)
 /* yylex_destroy is for both reentrant and non-reentrant scanners. */
 int yylex_destroy  (void)
 {
 /* yylex_destroy is for both reentrant and non-reentrant scanners. */
 int yylex_destroy  (void)
 {

-    
+

     /* Pop the buffer stack, destroying each element. */
        while(YY_CURRENT_BUFFER){
                yy_delete_buffer(YY_CURRENT_BUFFER  );
     /* Pop the buffer stack, destroying each element. */
        while(YY_CURRENT_BUFFER){
                yy_delete_buffer(YY_CURRENT_BUFFER  );

diff --git a/util/sconfig/sconfig.tab.c_shipped b/util/sconfig/sconfig.tab.c_shipped
index ac41d262f24596c8df688f01e3bb6c1c27c8341d..27c570dd0f27107ff133cc84bce698988a514872 100644 (file)
--- a/util/sconfig/sconfig.tab.c_shipped
+++ b/util/sconfig/sconfig.tab.c_shipped
@@ -2,20 +2,20 @@
 /* A Bison parser, made by GNU Bison 2.4.1.  */
 
 /* Skeleton implementation for Bison's Yacc-like parsers in C
 /* A Bison parser, made by GNU Bison 2.4.1.  */
 
 /* Skeleton implementation for Bison's Yacc-like parsers in C

-   
+

       Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
    Free Software Foundation, Inc.
       Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
    Free Software Foundation, Inc.

-   
+

    This program is free software: you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation, either version 3 of the License, or
    (at your option) any later version.
    This program is free software: you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation, either version 3 of the License, or
    (at your option) any later version.

-   
+

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.
    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

-   
+

    You should have received a copy of the GNU General Public License
    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
 
    You should have received a copy of the GNU General Public License
    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
 


@@ -28,7 +28,7 @@
    special exception, which will cause the skeleton and the resulting
    Bison output files to be licensed under the GNU General Public
    License without this special exception.
    special exception, which will cause the skeleton and the resulting
    Bison output files to be licensed under the GNU General Public
    License without this special exception.

-   
+

    This special exception was added by the Free Software Foundation in
    version 2.2 of Bison.  */
 
    This special exception was added by the Free Software Foundation in
    version 2.2 of Bison.  */
 

diff --git a/util/sconfig/sconfig.tab.h_shipped b/util/sconfig/sconfig.tab.h_shipped
index 8c6b5f61442bdc2dbb870a9c34041f9ffc7516e3..2c24fef256c6e5c31524541e45fad8b8f48cc387 100644 (file)
--- a/util/sconfig/sconfig.tab.h_shipped
+++ b/util/sconfig/sconfig.tab.h_shipped
@@ -2,20 +2,20 @@
 /* A Bison parser, made by GNU Bison 2.4.1.  */
 
 /* Skeleton interface for Bison's Yacc-like parsers in C
 /* A Bison parser, made by GNU Bison 2.4.1.  */
 
 /* Skeleton interface for Bison's Yacc-like parsers in C

-   
+

       Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
    Free Software Foundation, Inc.
       Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
    Free Software Foundation, Inc.

-   
+

    This program is free software: you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation, either version 3 of the License, or
    (at your option) any later version.
    This program is free software: you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation, either version 3 of the License, or
    (at your option) any later version.

-   
+

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.
    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

-   
+

    You should have received a copy of the GNU General Public License
    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
 
    You should have received a copy of the GNU General Public License
    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
 


@@ -28,7 +28,7 @@
    special exception, which will cause the skeleton and the resulting
    Bison output files to be licensed under the GNU General Public
    License without this special exception.
    special exception, which will cause the skeleton and the resulting
    Bison output files to be licensed under the GNU General Public
    License without this special exception.

-   
+

    This special exception was added by the Free Software Foundation in
    version 2.2 of Bison.  */
 
    This special exception was added by the Free Software Foundation in
    version 2.2 of Bison.  */
 

diff --git a/util/superiotool/smsc.c b/util/superiotool/smsc.c
index 2e203ad5e3a5abbe410495020063ed17428d280a..e3125c15c355c12928673c66aee3607c2624eaa3 100644 (file)
--- a/util/superiotool/smsc.c
+++ b/util/superiotool/smsc.c
@@ -68,7 +68,7 @@ static const struct superio_registers reg_table[] = {
                        {0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x01,0x01,0x01,
                         0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x00,
                         0x00,0x00,0x00,MISC,EOT}},
                        {0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x01,0x01,0x01,
                         0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x00,
                         0x00,0x00,0x00,MISC,EOT}},

-               {EOT}}},        
+               {EOT}}},

        {0x03, "FDC37C93xFR", {
                /* FIXME: There's another 0x03 but found on port 0x0d/0x0e! */
                {EOT}}},
        {0x03, "FDC37C93xFR", {
                /* FIXME: There's another 0x03 but found on port 0x0d/0x0e! */
                {EOT}}},

diff --git a/util/superiotool/superiotool.8 b/util/superiotool/superiotool.8
index 35046d1809c53ab1462a760c748db08dbb044507..8bbcddfd93821a96b1b285e93bb49dcfc996d3f5 100644 (file)
--- a/util/superiotool/superiotool.8
+++ b/util/superiotool/superiotool.8
@@ -2,7 +2,7 @@
 .SH NAME
 superiotool \- Super I/O detection tool
 .SH SYNOPSIS
 .SH NAME
 superiotool \- Super I/O detection tool
 .SH SYNOPSIS

-.B superiotool \fR[\fB\-delVvh\fR] 
+.B superiotool \fR[\fB\-delVvh\fR]

 .SH DESCRIPTION
 .B superiotool
 is a GPL'd user-space utility which can
 .SH DESCRIPTION
 .B superiotool
 is a GPL'd user-space utility which can

diff --git a/util/vgabios/Makefile b/util/vgabios/Makefile
index ffa30a9650f04ca29d03c2d1290211f731604292..0a8dae6d599d8ac62fa37e0815930406eee12b59 100644 (file)
--- a/util/vgabios/Makefile
+++ b/util/vgabios/Makefile
@@ -9,7 +9,7 @@
 CC       =  gcc
 CFLAGS   = -O2 -g -fomit-frame-pointer
 CFLAGS  += -Wall -Wundef -Wstrict-prototypes -Wmissing-prototypes
 CC       =  gcc
 CFLAGS   = -O2 -g -fomit-frame-pointer
 CFLAGS  += -Wall -Wundef -Wstrict-prototypes -Wmissing-prototypes

-CFLAGS  += -Wwrite-strings -Wredundant-decls -Wno-trigraphs 
+CFLAGS  += -Wwrite-strings -Wredundant-decls -Wno-trigraphs

 CFLAGS  += -Wstrict-aliasing -Wshadow -Wextra
 
 INCLUDES = -Iinclude -I../../src/devices/oprom/include/
 CFLAGS  += -Wstrict-aliasing -Wshadow -Wextra
 
 INCLUDES = -Iinclude -I../../src/devices/oprom/include/


@@ -27,7 +27,7 @@ all: testbios
 
 testbios: $(OBJS)
        $(CC) $(CFLAGS) -o $@ $^ $(LIBS)
 
 testbios: $(OBJS)
        $(CC) $(CFLAGS) -o $@ $^ $(LIBS)

- 
+

 helper_exec.o: helper_exec.c test.h
 
 clean:
 helper_exec.o: helper_exec.c test.h
 
 clean:

diff --git a/util/vgabios/testbios.c b/util/vgabios/testbios.c
index 2646a29ffd542da61ff06764c2e65d6a658520c9..c12e72187e4289321714f0d30baddf31c0efc037 100644 (file)
--- a/util/vgabios/testbios.c
+++ b/util/vgabios/testbios.c
@@ -267,7 +267,7 @@ int main(int argc, char **argv)
                        }
                }
        }
                        }
                }
        }

-       
+

        if (absegname) {
                abseg = mapitin(absegname, (off_t) 0xa0000, 0x20000);
                if (!abseg)
        if (absegname) {
                abseg = mapitin(absegname, (off_t) 0xa0000, 0x20000);
                if (!abseg)


@@ -302,7 +302,7 @@ int main(int argc, char **argv)
        if (devfn) {
                printf("Loading ax with BusDevFn = %x\n",devfn);
        }
        if (devfn) {
                printf("Loading ax with BusDevFn = %x\n",devfn);
        }

-       
+

        current->ax = devfn   ? devfn : 0xff;
        current->dx = 0x80;
        //      current->ip = 0;
        current->ax = devfn   ? devfn : 0xff;
        current->dx = 0x80;
        //      current->ip = 0;


@@ -359,7 +359,7 @@ unsigned short get_device(char *arg_val)
        unsigned short devfn=0;
        long bus=0,dev=0,fn=0,need_pack=0;
        char *tok;
        unsigned short devfn=0;
        long bus=0,dev=0,fn=0,need_pack=0;
        char *tok;

-       
+

        tok = strsep(&arg_val,":");
        if (arg_val != NULL) {
                bus = strtol(tok,0,16);
        tok = strsep(&arg_val,":");
        if (arg_val != NULL) {
                bus = strtol(tok,0,16);


@@ -377,10 +377,10 @@ unsigned short get_device(char *arg_val)
        }
        else {
                if (need_pack ==1 && (strlen(tok))) {
        }
        else {
                if (need_pack ==1 && (strlen(tok))) {

-                       dev = strtol(tok,0,16);                 
+                       dev = strtol(tok,0,16);

                }
        }
                }
        }

-       
+

        if ( need_pack == 1) {
                devfn = bus<<8 | (dev<<3) | fn;
        }
        if ( need_pack == 1) {
                devfn = bus<<8 | (dev<<3) | fn;
        }