src/mainboard/ibm/e326/irq_tables.c

   1 #include <arch/pirq_routing.h>
   2 #include <device/pci.h>
   3
   4 #define IRQ_ROUTER_BUS          0
   5 #define IRQ_ROUTER_DEVFN        PCI_DEVFN(4,3)
   6 #define IRQ_ROUTER_VENDOR       0x1022
   7 #define IRQ_ROUTER_DEVICE       0x746b
   8
   9 #define AVAILABLE_IRQS 0xdef8
  10 #define IRQ_SLOT(slot, bus, dev, fn, linka, linkb, linkc, linkd) \
  11         { bus, (dev<<3)|fn, {{ linka, AVAILABLE_IRQS}, { linkb, AVAILABLE_IRQS}, \
  12         {linkc, AVAILABLE_IRQS}, {linkd, AVAILABLE_IRQS}}, slot, 0}
  13
  14 /*  Each IRQ_SLOT entry consists of:
  15  *  bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu
  16  */
  17
  18 const struct irq_routing_table intel_irq_routing_table = {
  19         PIRQ_SIGNATURE,         /* u32 signature */
  20         PIRQ_VERSION,           /* u16 version   */
  21         32+16*CONFIG_IRQ_SLOT_COUNT,    /* there can be total CONFIG_IRQ_SLOT_COUNT table entries */
  22         IRQ_ROUTER_BUS,         /* Where the interrupt router lies (bus) */
  23         IRQ_ROUTER_DEVFN,       /* Where the interrupt router lies (dev) */
  24         0x00,                   /* IRQs devoted exclusively to PCI usage */
  25         IRQ_ROUTER_VENDOR,      /* Vendor */
  26         IRQ_ROUTER_DEVICE,      /* Device */
  27         0x00,                   /* Crap (miniport) */
  28         { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
  29         0x34,                   /*  u8 checksum , mod 256 checksum must give zero */
  30         {       /* slot(0=onboard), devfn, irqlinks (line id, 0=not routed) */
  31                 /* Northbridge, Node 0 */
  32                 IRQ_SLOT(0x0, 0x00,0x18,0x0, 0,0,0,0),
  33                 /* AMD-8131 PCI-X Bridge */
  34                 IRQ_SLOT(0x0, 0x01,0x01,0x0, 0,0,0,0),
  35                 /* Onboard LSI SCSI Controller */
  36                 IRQ_SLOT(0x0, 0x02,0x02,0x0, 3,0,0,0),
  37                 /* Onboard Broadcom NICs */
  38                 IRQ_SLOT(0x0, 0x02,0x01,0x0, 1,2,0,0),
  39                 /* AMD-8131 PCI-X Bridge */
  40                 IRQ_SLOT(0x0, 0x01,0x02,0x0, 0,0,0,0),
  41                 /* PCI Slot 1-2 */
  42                 IRQ_SLOT(0x1, 0x03,0x03,0x0, 1,2,3,4),
  43                 IRQ_SLOT(0x2, 0x03,0x04,0x0, 2,3,4,1),
  44                 /* AMD-8111 PCI Bridge */
  45                 IRQ_SLOT(0x0, 0x01,0x03,0x0, 0,0,0,0),
  46                 /* USB Controller */
  47                 IRQ_SLOT(0x0, 0x04,0x00,0x0, 0,0,0,4),
  48                 /* ATI Rage XL VGA */
  49                 IRQ_SLOT(0x0, 0x04,0x05,0x0, 1,0,0,0),
  50                 /* AMD-8111 LPC Dridge */
  51                 IRQ_SLOT(0x0, 0x01,0x04,0x0, 0,0,0,0),
  52                 /* Northbridge, Node 1 */
  53                 IRQ_SLOT(0x0, 0x00,0x19,0x0, 0,0,0,0),
  54
  55         }
  56 };
  57 unsigned long write_pirq_routing_table(unsigned long addr)
  58 {
  59         return copy_pirq_routing_table(addr);
  60 }