Since some people disapprove of white space cleanups mixed in regular commits
[coreboot.git] / src / mainboard / digitallogic / adl855pc / romstage.c
1 #include <stdint.h>
2 #include <device/pci_def.h>
3 #include <arch/io.h>
4 #include <device/pnp_def.h>
5 #include <arch/romcc_io.h>
6 #include <arch/hlt.h>
7 //#include "option_table.h"
8 #include <stdlib.h>
9 #include "pc80/udelay_io.c"
10 #include "pc80/mc146818rtc_early.c"
11 #include "pc80/serial.c"
12 #include "console/console.c"
13 #include "lib/ramtest.c"
14 #include "southbridge/intel/i82801dx/i82801dx.h"
15 #include "southbridge/intel/i82801dx/i82801dx_early_smbus.c"
16 #include "northbridge/intel/i855/raminit.h"
17 #include "northbridge/intel/i855/debug.c"
18 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
19 #include "cpu/x86/mtrr/earlymtrr.c"
20 #include "cpu/x86/bist.h"
21
22 #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
23
24 static inline int spd_read_byte(unsigned device, unsigned address)
25 {
26         return smbus_read_byte(device, address);
27 }
28
29 #include "northbridge/intel/i855/raminit.c"
30 #include "northbridge/intel/i855/reset_test.c"
31 #include "lib/generic_sdram.c"
32
33 void main(unsigned long bist)
34 {
35         static const struct mem_controller memctrl[] = {
36                 {
37                         .d0 = PCI_DEV(0, 0, 1),
38                         .channel0 = { (0xa<<3)|0, 0 },
39                 },
40         };
41
42         if (bist == 0) {
43 #if 0
44                 enable_lapic();
45                 init_timer();
46 #endif
47         }
48
49         w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
50         uart_init();
51         console_init();
52
53         /* Halt if there was a built in self test failure */
54         report_bist_failure(bist);
55
56 #if 0
57         print_pci_devices();
58 #endif
59
60         if(!bios_reset_detected()) {
61                 enable_smbus();
62 #if 0
63                 dump_spd_registers(&memctrl[0]);
64                 dump_smbus_registers();
65 #endif
66
67                 sdram_initialize(ARRAY_SIZE(memctrl), memctrl);
68
69         }
70
71 #if 0
72         dump_pci_devices();
73         dump_pci_device(PCI_DEV(0, 0, 0));
74
75         // Check all of memory
76         ram_check(0x00000000, msr.lo+(msr.hi<<32));
77         // Check 16MB of memory @ 0
78         ram_check(0x00000000, 0x01000000);
79         // Check 16MB of memory @ 2GB
80         ram_check(0x80000000, 0x81000000);
81 #endif
82 }
83