cd622907abb910999c2e077b2dcfea34ffdcac02
[coreboot.git] / src / southbridge / intel / i82801ex / i82801ex_ide.c
1 #include <console/console.h>
2 #include <device/device.h>
3 #include <device/pci.h>
4 #include <device/pci_ids.h>
5 #include <device/pci_ops.h>
6 #include "i82801ex.h"
7
8 static void ide_init(struct device *dev)
9 {
10         /* Enable IDE devices and timmings */
11         pci_write_config16(dev, 0x40, 0x0a307); // IDE0
12         pci_write_config16(dev, 0x42, 0x0a307); // IDE1
13         pci_write_config8(dev, 0x48, 0x05);
14         pci_write_config16(dev, 0x4a, 0x0101);
15         pci_write_config16(dev, 0x54, 0x5055);
16         printk(BIOS_DEBUG, "IDE Enabled\n");
17 }
18
19 static void i82801ex_ide_set_subsystem(device_t dev, unsigned vendor, unsigned device)
20 {
21         /* This value is also visible in uchi[0-2] and smbus functions */
22         pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, 
23                 ((device & 0xffff) << 16) | (vendor & 0xffff));
24 }
25
26 static struct pci_operations lops_pci = {
27         .set_subsystem = i82801ex_ide_set_subsystem,
28 };
29 static struct device_operations ide_ops  = {
30         .read_resources   = pci_dev_read_resources,
31         .set_resources    = pci_dev_set_resources,
32         .enable_resources = pci_dev_enable_resources,
33         .init             = ide_init,
34         .scan_bus         = 0,
35         .ops_pci          = &lops_pci,
36 };
37
38 static const struct pci_driver ide_driver __pci_driver = {
39         .ops    = &ide_ops,
40         .vendor = PCI_VENDOR_ID_INTEL,
41         .device = PCI_DEVICE_ID_INTEL_82801ER_IDE,
42 };
43