src/mainboard/amd/serengeti_cheetah/fadt.c

   1 /*
   2  * ACPI - create the Fixed ACPI Description Tables (FADT)
   3  * (C) Copyright 2005 Stefan Reinauer <stepan@openbios.org>
   4  */
   5
   6 #include <string.h>
   7 #include <console/console.h>
   8 #include <arch/acpi.h>
   9
  10 extern unsigned pm_base; /* pm_base should be set in sb acpi */
  11
  12 void acpi_create_fadt(acpi_fadt_t *fadt,acpi_facs_t *facs,void *dsdt){
  13
  14         acpi_header_t *header=&(fadt->header);
  15
  16         printk(BIOS_DEBUG, "pm_base: 0x%04x\n", pm_base);
  17
  18         /* Prepare the header */
  19         memset((void *)fadt,0,sizeof(acpi_fadt_t));
  20         memcpy(header->signature,"FACP",4);
  21         header->length = 244;
  22         header->revision = 1;
  23         memcpy(header->oem_id,OEM_ID,6);
  24         memcpy(header->oem_table_id,"COREBOOT",8);
  25         memcpy(header->asl_compiler_id,ASLC,4);
  26         header->asl_compiler_revision=0;
  27
  28         fadt->firmware_ctrl=(u32)facs;
  29         fadt->dsdt= (u32)dsdt;
  30         // 3=Workstation,4=Enterprise Server, 7=Performance Server
  31         fadt->preferred_pm_profile=0x03;
  32         fadt->sci_int=9;
  33         // disable system management mode by setting to 0:
  34         fadt->smi_cmd = 0;//pm_base+0x2f;
  35         fadt->acpi_enable = 0xf0;
  36         fadt->acpi_disable = 0xf1;
  37         fadt->s4bios_req = 0x0;
  38         fadt->pstate_cnt = 0xe2;
  39
  40         fadt->pm1a_evt_blk = pm_base;
  41         fadt->pm1b_evt_blk = 0x0000;
  42         fadt->pm1a_cnt_blk = pm_base+0x04;
  43         fadt->pm1b_cnt_blk = 0x0000;
  44         fadt->pm2_cnt_blk  = 0x0000;
  45         fadt->pm_tmr_blk   = pm_base+0x08;
  46         fadt->gpe0_blk     = pm_base+0x20;
  47         fadt->gpe1_blk     = pm_base+0xb0;
  48
  49         fadt->pm1_evt_len  =  4;
  50         fadt->pm1_cnt_len  =  2;
  51         fadt->pm2_cnt_len  =  0;
  52         fadt->pm_tmr_len   =  4;
  53         fadt->gpe0_blk_len =  4;
  54         fadt->gpe1_blk_len =  8;
  55         fadt->gpe1_base    = 16;
  56
  57         fadt->cst_cnt    = 0xe3;
  58         fadt->p_lvl2_lat =  101;
  59         fadt->p_lvl3_lat = 1001;
  60         fadt->flush_size = 0;
  61         fadt->flush_stride = 0;
  62         fadt->duty_offset = 1;
  63         fadt->duty_width = 3;
  64         fadt->day_alrm = 0; // 0x7d these have to be
  65         fadt->mon_alrm = 0; // 0x7e added to cmos.layout
  66         fadt->century =  0; // 0x7f to make rtc alrm work
  67         fadt->iapc_boot_arch = 0x3; // See table 5-11
  68         fadt->flags = 0x25;
  69
  70         fadt->res2 = 0;
  71
  72         fadt->reset_reg.space_id = 1;
  73         fadt->reset_reg.bit_width = 8;
  74         fadt->reset_reg.bit_offset = 0;
  75         fadt->reset_reg.resv = 0;
  76         fadt->reset_reg.addrl = 0xcf9;
  77         fadt->reset_reg.addrh = 0x0;
  78
  79         fadt->reset_value = 6;
  80         fadt->x_firmware_ctl_l = (u32)facs;
  81         fadt->x_firmware_ctl_h = 0;
  82         fadt->x_dsdt_l = (u32)dsdt;
  83         fadt->x_dsdt_h = 0;
  84
  85         fadt->x_pm1a_evt_blk.space_id = 1;
  86         fadt->x_pm1a_evt_blk.bit_width = 32;
  87         fadt->x_pm1a_evt_blk.bit_offset = 0;
  88         fadt->x_pm1a_evt_blk.resv = 0;
  89         fadt->x_pm1a_evt_blk.addrl = pm_base;
  90         fadt->x_pm1a_evt_blk.addrh = 0x0;
  91
  92         fadt->x_pm1b_evt_blk.space_id = 1;
  93         fadt->x_pm1b_evt_blk.bit_width = 4;
  94         fadt->x_pm1b_evt_blk.bit_offset = 0;
  95         fadt->x_pm1b_evt_blk.resv = 0;
  96         fadt->x_pm1b_evt_blk.addrl = 0x0;
  97         fadt->x_pm1b_evt_blk.addrh = 0x0;
  98
  99
 100         fadt->x_pm1a_cnt_blk.space_id = 1;
 101         fadt->x_pm1a_cnt_blk.bit_width = 16;
 102         fadt->x_pm1a_cnt_blk.bit_offset = 0;
 103         fadt->x_pm1a_cnt_blk.resv = 0;
 104         fadt->x_pm1a_cnt_blk.addrl = pm_base+4;
 105         fadt->x_pm1a_cnt_blk.addrh = 0x0;
 106
 107         fadt->x_pm1b_cnt_blk.space_id = 1;
 108         fadt->x_pm1b_cnt_blk.bit_width = 2;
 109         fadt->x_pm1b_cnt_blk.bit_offset = 0;
 110         fadt->x_pm1b_cnt_blk.resv = 0;
 111         fadt->x_pm1b_cnt_blk.addrl = 0x0;
 112         fadt->x_pm1b_cnt_blk.addrh = 0x0;
 113
 114
 115         fadt->x_pm2_cnt_blk.space_id = 1;
 116         fadt->x_pm2_cnt_blk.bit_width = 0;
 117         fadt->x_pm2_cnt_blk.bit_offset = 0;
 118         fadt->x_pm2_cnt_blk.resv = 0;
 119         fadt->x_pm2_cnt_blk.addrl = 0x0;
 120         fadt->x_pm2_cnt_blk.addrh = 0x0;
 121
 122
 123         fadt->x_pm_tmr_blk.space_id = 1;
 124         fadt->x_pm_tmr_blk.bit_width = 32;
 125         fadt->x_pm_tmr_blk.bit_offset = 0;
 126         fadt->x_pm_tmr_blk.resv = 0;
 127         fadt->x_pm_tmr_blk.addrl = pm_base+0x08;
 128         fadt->x_pm_tmr_blk.addrh = 0x0;
 129
 130
 131         fadt->x_gpe0_blk.space_id = 1;
 132         fadt->x_gpe0_blk.bit_width = 32;
 133         fadt->x_gpe0_blk.bit_offset = 0;
 134         fadt->x_gpe0_blk.resv = 0;
 135         fadt->x_gpe0_blk.addrl = pm_base+0x20;
 136         fadt->x_gpe0_blk.addrh = 0x0;
 137
 138
 139         fadt->x_gpe1_blk.space_id = 1;
 140         fadt->x_gpe1_blk.bit_width = 64;
 141         fadt->x_gpe1_blk.bit_offset = 16;
 142         fadt->x_gpe1_blk.resv = 0;
 143         fadt->x_gpe1_blk.addrl = pm_base+0xb0;
 144         fadt->x_gpe1_blk.addrh = 0x0;
 145
 146         header->checksum = acpi_checksum((void *)fadt, sizeof(acpi_fadt_t));
 147
 148 }