2 * This file is part of the coreboot project.
4 * Copyright (C) 2007-2009 coresystems GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 /* This is board specific information: IRQ routing for the
25 // PCI Interrupt Routing
30 // PCIe Graphics 0:1.0
31 Package() { 0x0001ffff, 0, 0, 16 },
32 Package() { 0x0001ffff, 1, 0, 17 },
33 Package() { 0x0001ffff, 2, 0, 18 },
34 Package() { 0x0001ffff, 3, 0, 19 },
35 // Onboard graphics (IGD) 0:2.0
36 Package() { 0x0002ffff, 0, 0, 16 },
37 // High Definition Audio 0:1b.0
38 Package() { 0x001bffff, 0, 0, 22 },
39 // PCIe Root Ports 0:1c.x
40 Package() { 0x001cffff, 0, 0, 17 },
41 Package() { 0x001cffff, 1, 0, 16 },
42 Package() { 0x001cffff, 2, 0, 18 },
43 Package() { 0x001cffff, 3, 0, 19 },
44 // USB and EHCI 0:1d.x
45 Package() { 0x001dffff, 0, 0, 23 },
46 Package() { 0x001dffff, 1, 0, 19 },
47 Package() { 0x001dffff, 2, 0, 18 },
48 Package() { 0x001dffff, 3, 0, 16 },
49 // AC97 0:1e.2, 0:1e.3
50 Package() { 0x001effff, 0, 0, 22 },
51 Package() { 0x001effff, 1, 0, 20 },
53 Package() { 0x001fffff, 0, 0, 18 },
54 Package() { 0x001fffff, 1, 0, 19 },
58 // PCIe Graphics 0:1.0
59 Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
60 Package() { 0x0001ffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },
61 Package() { 0x0001ffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },
62 Package() { 0x0001ffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },
63 // Onboard graphics (IGD) 0:2.0
64 Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
65 // High Definition Audio 0:1b.0
66 Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKF, 0 },
67 // PCIe Root Ports 0:1c.x
68 Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKB, 0 },
69 Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKA, 0 },
70 Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },
71 Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },
72 // USB and EHCI 0:1d.x
73 Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKH, 0 },
74 Package() { 0x001dffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },
75 Package() { 0x001dffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },
76 Package() { 0x001dffff, 3, \_SB.PCI0.LPCB.LNKA, 0 },
77 // AC97 0:1e.2, 0:1e.3
78 Package() { 0x001effff, 0, \_SB.PCI0.LPCB.LNKG, 0 },
79 Package() { 0x001effff, 1, \_SB.PCI0.LPCB.LNKE, 0 },
81 Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKC, 0 },
82 Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },