Since some people disapprove of white space cleanups mixed in regular commits
[coreboot.git] / src / mainboard / supermicro / x6dhr_ig / devicetree.cb
1 chip northbridge/intel/e7520 # mch
2         device pci_domain 0 on
3                 chip southbridge/intel/i82801ex # i82801er
4                         # USB ports
5                         device pci 1d.0 on end
6                         device pci 1d.1 on end
7                         device pci 1d.2 on end
8                         device pci 1d.3 on end
9                         device pci 1d.7 on end
10
11                         # -> VGA
12                         device pci 1e.0 on end
13
14                         # -> IDE
15                         device pci 1f.0 on
16                                 chip superio/winbond/w83627hf
17                                         device pnp 2e.0 off end
18                                         device pnp 2e.2 on
19                                                  io 0x60 = 0x3f8
20                                                 irq 0x70 = 4
21                                         end
22                                         device pnp 2e.3 on
23                                                  io 0x60 = 0x2f8
24                                                 irq 0x70 = 3
25                                         end
26                                         device pnp 2e.4 off end
27                                         device pnp 2e.5 off end
28                                         device pnp 2e.6 off end
29                                         device pnp 2e.7 off end
30                                         device pnp 2e.9 off end
31                                         device pnp 2e.a on  end
32                                         device pnp 2e.b off end
33                                 end
34                         end
35                         device pci 1f.1 on end
36                         device pci 1f.2 on end
37                         device pci 1f.3 on end
38
39                         register "pirq_a_d" = "0x0b070a05"
40                         register "pirq_e_h" = "0x0a808080"
41                 end
42                 device pci 00.0 on end
43                 device pci 00.1  on end
44                 device pci 01.0 on end
45                 device pci 02.0 on end
46                 device pci 03.0 on
47                         chip southbridge/intel/pxhd # pxhd1
48                                 # Bus bridges and ioapics usually bus 2
49                                 device pci 0.0 on end
50                                 device pci 0.1 on end
51                                 device pci 0.2 on
52                                 # On board gig e1000
53                                         chip drivers/generic/generic
54                                                 device pci 02.0 on end
55                                                 device pci 02.1 on end
56                                         end
57                                 end
58                                 device pci 0.3 on end
59                         end
60                 end
61                 device pci 04.0 on
62                         chip southbridge/intel/pxhd # pxhd2
63                                 # Bus bridges and ioapics usually bus 5
64                                 device pci 0.0 on end
65                                 # Slot 6  is usually 6:2.0
66                                 device pci 0.1 on end
67                                 device pci 0.2 on end
68                                 # Slot 7 is usually 7:2.0
69                                 device pci 0.3 on end
70                         end
71                 end
72                 device pci 06.0 on end
73         end
74         device apic_cluster 0 on
75                 chip cpu/intel/socket_mPGA604 # cpu 0
76                         device apic 0 on end
77                 end
78                 chip cpu/intel/socket_mPGA604 # cpu 1
79                         device apic 6 on end
80                 end
81         end
82         register "intrline" = "0x00070105"
83 end
84