src/mainboard/tyan/s2882/irq_tables.c

   1 /* This file was generated by getpir.c, do not modify!
   2    (but if you do, please run checkpir on it to verify)
   3    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
   4
   5    Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM
   6 */
   7 #include <console/console.h>
   8 #include <device/pci.h>
   9 #include <string.h>
  10 #include <stdint.h>
  11 #include <arch/pirq_routing.h>
  12
  13 const struct irq_routing_table intel_irq_routing_table = {
  14         PIRQ_SIGNATURE, /* u32 signature */
  15         PIRQ_VERSION,   /* u16 version   */
  16         32+16*CONFIG_IRQ_SLOT_COUNT,        /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
  17         1,           /* Where the interrupt router lies (bus) */
  18         (4<<3)|3,           /* Where the interrupt router lies (dev) */
  19         0,         /* IRQs devoted exclusively to PCI usage */
  20         0x1022,         /* Vendor */
  21         0x746b,         /* Device */
  22         0,         /* Crap (miniport) */
  23         { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
  24         0xff,         /*  u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structu
  25 re (including checksum) */
  26         {
  27                 {1,(4<<3)|0, {{0x1, 0xdef8}, {0x2, 0xdef8}, {0x3, 0xdef8}, {0x4, 0xdef8}}, 0, 0},
  28                 {0x4,0, {{0, 0}, {0, 0}, {0, 0}, {0x4, 0xdef8}}, 0, 0},
  29                 {0x4,(6<<3)|0, {{0x3, 0xdef8}, {0, 0}, {0, 0}, {0, 0}}, 0, 0},
  30                 {0x3,(3<<3)|0, {{0x1, 0xdef8}, {0x2, 0xdef8}, {0x3, 0xdef8}, {0x4, 0xdef8}}, 0x1, 0},
  31                 {0x3,(1<<3)|0, {{0x2, 0xdef8}, {0x3, 0xdef8}, {0x4, 0xdef8}, {0x1, 0xdef8}}, 0x2, 0},
  32                 {0x2,(3<<3)|0, {{0x4, 0xdef8}, {0x1, 0xdef8}, {0x2, 0xdef8}, {0x3, 0xdef8}}, 0x3, 0},
  33                 {0x2,(2<<3)|0, {{0x3, 0xdef8}, {0x4, 0xdef8}, {0x1, 0xdef8}, {0x2, 0xdef8}}, 0x4, 0},
  34                 {0x4,(4<<3)|0, {{0x1, 0xdef8}, {0x2, 0xdef8}, {0x3, 0xdef8}, {0x4, 0xdef8}}, 0x5, 0},
  35                 {0x4,(5<<3)|0, {{0x4, 0xdef8}, {0, 0}, {0, 0}, {0, 0}}, 0, 0},
  36                 {0x4,(8<<3)|0, {{0x3, 0xdef8}, {0, 0}, {0, 0}, {0, 0}}, 0, 0},
  37                 {0x2,(6<<3)|0, {{0x1, 0xdef8}, {0x2, 0xdef8}, {0, 0}, {0, 0}}, 0, 0},
  38                 {0x2,(5<<3)|0, {{0x3, 0xdef8}, {0x1, 0xdef8}, {0x2, 0xdef8}, {0, 0}}, 0, 0},
  39                 {0x2,(9<<3)|0, {{0x1, 0xdef8}, {0x2, 0xdef8}, {0, 0}, {0, 0}}, 0, 0},
  40                 {0x3,(4<<3)|0, {{0x2, 0xdef8}, {0x3, 0xdef8}, {0x4, 0xdef8}, {0x1, 0xdef8}}, 0x6, 0},
  41                 {0x3,(5<<3)|0, {{0x3, 0xdef8}, {0x4, 0xdef8}, {0x1, 0xdef8}, {0x2, 0xdef8}}, 0x7, 0},
  42         }
  43 };
  44
  45 static unsigned node_link_to_bus(unsigned node, unsigned link)
  46 {
  47         device_t dev;
  48         unsigned reg;
  49
  50         dev = dev_find_slot(0, PCI_DEVFN(0x18, 1));
  51         if (!dev) {
  52                 return 0;
  53         }
  54         for(reg = 0xE0; reg < 0xF0; reg += 0x04) {
  55                 uint32_t config_map;
  56                 unsigned dst_node;
  57                 unsigned dst_link;
  58                 unsigned bus_base;
  59                 config_map = pci_read_config32(dev, reg);
  60                 if ((config_map & 3) != 3) {
  61                         continue;
  62                 }
  63                 dst_node = (config_map >> 4) & 7;
  64                 dst_link = (config_map >> 8) & 3;
  65                 bus_base = (config_map >> 16) & 0xff;
  66 #if 0
  67                 printk(BIOS_DEBUG, "node.link=bus: %d.%d=%d 0x%2x->0x%08x\n",
  68                         dst_node, dst_link, bus_base,
  69                         reg, config_map);
  70 #endif
  71                 if ((dst_node == node) && (dst_link == link))
  72                 {
  73                         return bus_base;
  74                 }
  75         }
  76         return 0;
  77 }
  78
  79 static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,
  80                 uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
  81                 uint8_t slot, uint8_t rfu)
  82 {
  83         pirq_info->bus = bus;
  84         pirq_info->devfn = devfn;
  85                 pirq_info->irq[0].link = link0;
  86                 pirq_info->irq[0].bitmap = bitmap0;
  87                 pirq_info->irq[1].link = link1;
  88                 pirq_info->irq[1].bitmap = bitmap1;
  89                 pirq_info->irq[2].link = link2;
  90                 pirq_info->irq[2].bitmap = bitmap2;
  91                 pirq_info->irq[3].link = link3;
  92                 pirq_info->irq[3].bitmap = bitmap3;
  93         pirq_info->slot = slot;
  94         pirq_info->rfu = rfu;
  95 }
  96
  97 unsigned long write_pirq_routing_table(unsigned long addr)
  98 {
  99
 100         struct irq_routing_table *pirq;
 101         struct irq_info *pirq_info;
 102         unsigned slot_num;
 103         uint8_t *v;
 104
 105         uint8_t sum=0;
 106         int i;
 107
 108         unsigned char bus_chain_0;
 109         unsigned char bus_8131_1;
 110         unsigned char bus_8131_2;
 111         unsigned char bus_8111_1;
 112         {
 113                 device_t dev;
 114
 115                 /* HT chain 0 */
 116                 bus_chain_0 = node_link_to_bus(0, 0);
 117                 if (bus_chain_0 == 0) {
 118                         printk(BIOS_DEBUG, "ERROR - cound not find bus for node 0 chain 0, using defaults\n");
 119                         bus_chain_0 = 1;
 120                 }
 121
 122                 /* 8111 */
 123                 dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x03,0));
 124                 if (dev) {
 125                         bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
 126                 }
 127                 else {
 128                         printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
 129
 130                         bus_8111_1 = 4;
 131                 }
 132                 /* 8131-1 */
 133                 dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x01,0));
 134                 if (dev) {
 135                         bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
 136
 137                 }
 138                 else {
 139                         printk(BIOS_DEBUG, "ERROR - could not find PCI 1:01.0, using defaults\n");
 140
 141                         bus_8131_1 = 2;
 142                 }
 143                 /* 8131-2 */
 144                 dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x02,0));
 145                 if (dev) {
 146                         bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
 147
 148                 }
 149                 else {
 150                         printk(BIOS_DEBUG, "ERROR - could not find PCI 1:02.0, using defaults\n");
 151
 152                         bus_8131_2 = 3;
 153                 }
 154         }
 155
 156         /* Align the table to be 16 byte aligned. */
 157         addr += 15;
 158         addr &= ~15;
 159
 160         /* This table must be betweeen 0xf0000 & 0x100000 */
 161         printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...\n", addr);
 162
 163         pirq = (void *)(addr);
 164         v = (uint8_t *)(addr);
 165
 166         pirq->signature = PIRQ_SIGNATURE;
 167         pirq->version  = PIRQ_VERSION;
 168
 169         pirq->rtr_bus = bus_chain_0;
 170         pirq->rtr_devfn = (4<<3)|3;
 171
 172         pirq->exclusive_irqs = 0;
 173
 174         pirq->rtr_vendor = 0x1022;
 175         pirq->rtr_device = 0x746b;
 176
 177         pirq->miniport_data = 0;
 178
 179         memset(pirq->rfu, 0, sizeof(pirq->rfu));
 180
 181         pirq_info = (void *) ( &pirq->checksum + 1);
 182         slot_num = 0;
 183
 184         {
 185                 device_t dev;
 186                 dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x04,3));
 187                 if (dev) {
 188                         /* initialize PCI interupts - these assignments depend
 189                         on the PCB routing of PINTA-D
 190
 191                         PINTA = IRQ5
 192                         PINTB = IRQ9
 193                         PINTC = IRQ11
 194                         PINTD = IRQ10
 195                         */
 196                         pci_write_config16(dev, 0x56, 0xab95);
 197                 }
 198         }
 199
 200         printk(BIOS_DEBUG, "setting Onboard AMD Southbridge \n");
 201         static const unsigned char slotIrqs_1_4[4] = { 5, 9, 11, 10 };
 202         pci_assign_irqs(bus_chain_0, 4, slotIrqs_1_4);
 203         write_pirq_info(pirq_info, bus_chain_0,(4<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
 204         pirq_info++; slot_num++;
 205
 206         printk(BIOS_DEBUG, "setting Onboard AMD USB \n");
 207         static const unsigned char slotIrqs_8111_1_0[4] = { 0, 0, 0, 10 };
 208         pci_assign_irqs(bus_8111_1, 0, slotIrqs_8111_1_0);
 209         write_pirq_info(pirq_info, bus_8111_1,0, 0, 0, 0, 0, 0, 0, 0x4, 0xdef8, 0, 0);
 210         pirq_info++; slot_num++;
 211
 212         printk(BIOS_DEBUG, "setting Onboard ATI Display Adapter\n");
 213         static const unsigned char slotIrqs_8111_1_6[4] = { 11, 0, 0, 0 };
 214         pci_assign_irqs(bus_8111_1, 6, slotIrqs_8111_1_6);
 215         write_pirq_info(pirq_info, bus_8111_1,(6<<3)|0, 0x3, 0xdef8, 0, 0, 0, 0, 0, 0, 0, 0);
 216         pirq_info++; slot_num++;
 217
 218         printk(BIOS_DEBUG, "setting Slot 1\n");
 219         static const unsigned char slotIrqs_8131_2_3[4] = { 5, 9, 11, 10 };
 220         pci_assign_irqs(bus_8131_2, 3, slotIrqs_8131_2_3);
 221         write_pirq_info(pirq_info, bus_8131_2,(3<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0x1, 0);
 222         pirq_info++; slot_num++;
 223
 224         printk(BIOS_DEBUG, "setting Slot 2\n");
 225         static const unsigned char slotIrqs_8131_2_1[4] = { 9, 11, 10, 5 };
 226         pci_assign_irqs(bus_8131_2, 1, slotIrqs_8131_2_1);
 227         write_pirq_info(pirq_info, bus_8131_2,(1<<3)|0, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0x1, 0xdef8, 0x2, 0);
 228         pirq_info++; slot_num++;
 229
 230         printk(BIOS_DEBUG, "setting Slot 3\n");
 231         static const unsigned char slotIrqs_8131_1_3[4] = { 10, 5, 9, 11 };
 232         pci_assign_irqs(bus_8131_1, 3, slotIrqs_8131_1_3);
 233         write_pirq_info(pirq_info, bus_8131_1,(3<<3)|0, 0x4, 0xdef8, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x3, 0);
 234         pirq_info++; slot_num++;
 235
 236         printk(BIOS_DEBUG, "setting Slot 4\n");
 237         static const unsigned char slotIrqs_8131_1_2[4] = { 11, 10, 5, 9 };
 238         pci_assign_irqs(bus_8131_1, 2, slotIrqs_8131_1_2);
 239         write_pirq_info(pirq_info, bus_8131_1,(2<<3)|0, 0x3, 0xdef8, 0x4, 0xdef8, 0x1, 0xdef8, 0x2, 0xdef8, 0x4, 0);
 240         pirq_info++; slot_num++;
 241
 242         printk(BIOS_DEBUG, "setting Slot 5 \n");
 243         static const unsigned char slotIrqs_8111_1_4[4] = { 5, 9, 11, 10 };
 244         pci_assign_irqs(bus_8111_1, 4, slotIrqs_8111_1_4);
 245         write_pirq_info(pirq_info, bus_8111_1,(4<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0x5, 0);
 246         pirq_info++; slot_num++;
 247
 248         printk(BIOS_DEBUG, "setting Onboard SI Serial ATA\n");
 249         static const unsigned char slotIrqs_8111_1_5[4] = { 10, 0, 0, 0 };
 250         pci_assign_irqs(bus_8111_1, 5, slotIrqs_8111_1_5);
 251         write_pirq_info(pirq_info, bus_8111_1,(5<<3)|0, 0x4, 0xdef8, 0, 0, 0, 0, 0, 0, 0, 0);
 252         pirq_info++; slot_num++;
 253
 254         printk(BIOS_DEBUG, "setting Onboard Intel NIC\n");
 255         static const unsigned char slotIrqs_8111_1_8[4] = { 11, 0, 0, 0 };
 256         pci_assign_irqs(bus_8111_1, 8, slotIrqs_8111_1_8);
 257         write_pirq_info(pirq_info, bus_8111_1,(8<<3)|0, 0x3, 0xdef8, 0, 0, 0, 0, 0, 0, 0, 0);
 258         pirq_info++; slot_num++;
 259
 260         printk(BIOS_DEBUG, "setting Onboard Adaptec  SCSI\n");
 261         static const unsigned char slotIrqs_8131_1_6[4] = { 5, 9, 0, 0 };
 262         pci_assign_irqs(bus_8131_1, 6, slotIrqs_8131_1_6);
 263         write_pirq_info(pirq_info, bus_8131_1,(6<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0, 0, 0, 0, 0, 0);
 264         pirq_info++; slot_num++;
 265 #if 0
 266         //??
 267         write_pirq_info(pirq_info, bus_8131_1,(5<<3)|0, 0x3, 0xdef8, 0x1, 0xdef8, 0x2, 0xdef8, 0, 0, 0, 0);
 268         pirq_info++; slot_num++;
 269 #endif
 270
 271         printk(BIOS_DEBUG, "setting Onboard Broadcom NIC\n");
 272         static const unsigned char slotIrqs_8131_1_9[4] = { 5, 9, 0, 0 };
 273         pci_assign_irqs(bus_8131_1, 9, slotIrqs_8131_1_9);
 274         write_pirq_info(pirq_info, bus_8131_1,(9<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0, 0, 0, 0, 0, 0);
 275         pirq_info++; slot_num++;
 276 #if 0
 277         //?? what's this?
 278         write_pirq_info(pirq_info, bus_8131_2,(4<<3)|0, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0x1, 0xdef8, 0x6, 0);
 279         pirq_info++; slot_num++;
 280 #endif
 281
 282 #if 0
 283         //?? what's this?
 284         write_pirq_info(pirq_info, bus_8131_2,(5<<3)|0, 0x3, 0xdef8, 0x4, 0xdef8, 0x1, 0xdef8, 0x2, 0xdef8, 0x7, 0);
 285         pirq_info++; slot_num++;
 286 #endif
 287
 288         pirq->size = 32 + 16 * slot_num;
 289
 290         for (i = 0; i < pirq->size; i++)
 291                 sum += v[i];
 292
 293         sum = pirq->checksum - sum;
 294
 295         if (sum != pirq->checksum) {
 296                 pirq->checksum = sum;
 297         }
 298
 299         printk(BIOS_INFO, "done.\n");
 300
 301         return  (unsigned long) pirq_info;
 302
 303 }