2 * This file is part of the coreboot project.
4 * Copyright (C) 2009 One Laptop per Child, Association, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 #include <device/pci_ids.h>
22 #define SMBUS_IO_BASE 0x0500 //from award bios
23 #define PMIO_BASE VX800_ACPI_IO_BASE //might as well set this while we're here
25 #define SMBHSTSTAT SMBUS_IO_BASE + 0x0
26 #define SMBSLVSTAT SMBUS_IO_BASE + 0x1
27 #define SMBHSTCTL SMBUS_IO_BASE + 0x2
28 #define SMBHSTCMD SMBUS_IO_BASE + 0x3
29 #define SMBXMITADD SMBUS_IO_BASE + 0x4
30 #define SMBHSTDAT0 SMBUS_IO_BASE + 0x5
31 #define SMBHSTDAT1 SMBUS_IO_BASE + 0x6
32 /* Rest of these aren't currently used... */
33 #define SMBBLKDAT SMBUS_IO_BASE + 0x7
34 #define SMBSLVCTL SMBUS_IO_BASE + 0x8
35 #define SMBTRNSADD SMBUS_IO_BASE + 0x9
36 #define SMBSLVDATA SMBUS_IO_BASE + 0xa
37 #define SMLINK_PIN_CTL SMBUS_IO_BASE + 0xe
38 #define SMBUS_PIN_CTL SMBUS_IO_BASE + 0xf
40 /* Define register settings */
41 #define HOST_RESET 0xff
42 #define DIMM_BASE 0xa0 // 1010000 is base for DIMM in SMBus
43 #define READ_CMD 0x01 // 1 in the 0 bit of SMBHSTADD states to READ
45 #define SMBUS_TIMEOUT (100*1000*10)
47 #define I2C_TRANS_CMD 0x40
48 #define CLOCK_SLAVE_ADDRESS 0x69
50 #define SMBUS_DELAY() outb(0x80, 0x80)
52 #ifdef CONFIG_DEBUG_SMBUS
53 #define PRINT_DEBUG(x) print_debug(x)
54 #define PRINT_DEBUG_HEX16(x) print_debug_hex16(x)
56 #define PRINT_DEBUG(x)
57 #define PRINT_DEBUG_HEX16(x)
60 /* Internal functions */
61 static void smbus_print_error(unsigned char host_status_register, int loops)
63 // print_err("some i2c error\n");
64 /* Check if there actually was an error */
65 if (host_status_register == 0x00 || host_status_register == 0x40 ||
66 host_status_register == 0x42)
68 print_err("smbus_error: ");
69 print_err_hex8(host_status_register);
71 if (loops >= SMBUS_TIMEOUT) {
72 print_err("SMBus Timout\n");
74 if (host_status_register & (1 << 4)) {
75 print_err("Interrup/SMI# was Failed Bus Transaction\n");
77 if (host_status_register & (1 << 3)) {
78 print_err("Bus Error\n");
80 if (host_status_register & (1 << 2)) {
81 print_err("Device Error\n");
83 if (host_status_register & (1 << 1)) {
84 /* This isn't a real error... */
85 print_debug("Interrupt/SMI# was Successful Completion\n");
87 if (host_status_register & (1 << 0)) {
88 print_err("Host Busy\n");
92 static void smbus_wait_until_ready(void)
97 /* Yes, this is a mess, but it's the easiest way to do it */
98 while (((inb(SMBHSTSTAT) & 1) == 1) && (loops <= SMBUS_TIMEOUT)) {
102 smbus_print_error(inb(SMBHSTSTAT), loops);
105 static void smbus_reset(void)
107 outb(HOST_RESET, SMBHSTSTAT);
110 /* Public functions */
112 static unsigned int get_spd_data(unsigned int dimm, unsigned int offset)
117 /* clear host data port */
118 outb(0x00, SMBHSTDAT0);
120 smbus_wait_until_ready();
122 /* Do some mathmatic magic */
127 outb(dimm | 0x1, SMBXMITADD);
128 outb(offset, SMBHSTCMD);
129 outb(0x48, SMBHSTCTL);
133 smbus_wait_until_ready();
135 val = inb(SMBHSTDAT0);
140 static void enable_smbus(void)
145 pci_locate_device(PCI_ID
146 (PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VX855_LPC),
149 if (dev == PCI_DEV_INVALID) {
150 /* This won't display text if enable_smbus() is before serial init */
151 die("Power Managment Controller not found\n");
154 /* Set clock source */
155 pci_write_config8(dev, 0x94, 0x20);
157 /* Write SMBus IO base to 0xd0, and enable SMBus */
158 pci_write_config16(dev, 0xd0, SMBUS_IO_BASE | 1);
160 /* Set to Award value */
161 pci_write_config8(dev, 0xd2, 0x05);
163 /* Make it work for I/O ... */
164 pci_write_config16(dev, 0x04, 0x0003);
167 /* clear host data port */
168 outb(0x00, SMBHSTDAT0);
170 smbus_wait_until_ready();
174 * A fixup for some systems that need time for the SMBus to "warm up". This is
175 * needed on some VT823x based systems, where the SMBus spurts out bad data for
176 * a short time after power on. This has been seen on the VIA Epia series and
177 * Jetway J7F2-series. It reads the ID byte from SMBus, looking for
178 * known-good data from a slot/address. Exits on either good data or a timeout.
180 * TODO: This should probably go into some global file, but one would need to
181 * be created just for it. If some other chip needs/wants it, we can
182 * worry about it then.
184 * @param mem_ctrl The memory controller and SMBus addresses.
186 static void smbus_fixup(const struct mem_controller *mem_ctrl)
188 int i, ram_slots, current_slot = 0;
191 ram_slots = ARRAY_SIZE(mem_ctrl->channel0);
193 print_err("smbus_fixup() thinks there are no RAM slots!\n");
197 PRINT_DEBUG("Waiting for SMBus to warm up");
200 * Bad SPD data should be either 0 or 0xff, but YMMV. So we look for
201 * the ID bytes of SDRAM, DDR, DDR2, and DDR3 (and anything in between).
202 * VT8237R has only been seen on DDR and DDR2 based systems, so far.
204 for (i = 0; (i < SMBUS_TIMEOUT && ((result < SPD_MEMORY_TYPE_SDRAM) ||
206 SPD_MEMORY_TYPE_SDRAM_DDR3)));
209 if (current_slot > ram_slots)
212 result = get_spd_data(mem_ctrl->channel0[current_slot],
218 if (i >= SMBUS_TIMEOUT)
219 print_err("SMBus timed out while warming up\n");
221 PRINT_DEBUG("Done\n");
224 /* Debugging Function */
225 #if CONFIG_DEBUG_SMBUS
226 static void dump_spd_data(void)
228 int dimm, offset, regs;
231 for (dimm = 0; dimm < 8; dimm++) {
232 print_debug("SPD Data for DIMM ");
233 print_debug_hex8(dimm);
236 val = get_spd_data(dimm, 0);
239 } else if (val == 0x80) {
242 print_debug("No DIMM present\n");
245 for (offset = 0; offset < regs; offset++) {
246 print_debug(" Offset ");
247 print_debug_hex8(offset);
248 print_debug(" = 0x");
249 print_debug_hex8(get_spd_data(dimm, offset));
255 #define dump_spd_data()