Since some people disapprove of white space cleanups mixed in regular commits
[coreboot.git] / src / mainboard / kontron / 986lcd-m / dsdt.asl
1 /*
2  * This file is part of the coreboot project.
3  *
4  * Copyright (C) 2007-2009 coresystems GmbH
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; version 2 of the License.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18  */
19
20 DefinitionBlock(
21         "dsdt.aml",
22         "DSDT",
23         0x02,           // DSDT revision: ACPI v2.0
24         "COREv2",       // OEM id
25         "COREBOOT",     // OEM table id
26         0x20090419      // OEM revision
27 )
28 {
29         // Some generic macros
30         #include "acpi/platform.asl"
31
32         // global NVS and variables
33         #include "../../../southbridge/intel/i82801gx/acpi/globalnvs.asl"
34
35         // General Purpose Events
36         //#include "acpi/gpe.asl"
37
38         //#include "acpi/thermal.asl"
39
40         Scope (\_SB) {
41                 Device (PCI0)
42                 {
43                         #include "../../../northbridge/intel/i945/acpi/i945.asl"
44                         #include "../../../southbridge/intel/i82801gx/acpi/ich7.asl"
45                 }
46         }
47
48         /* Chipset specific sleep states */
49         #include "../../../southbridge/intel/i82801gx/acpi/sleepstates.asl"
50 }