2 static void print_debug_pci_dev(unsigned dev)
5 print_debug_hex8((dev >> 16) & 0xff);
7 print_debug_hex8((dev >> 11) & 0x1f);
9 print_debug_hex8((dev >> 8) & 7);
12 static void print_pci_devices(void)
15 for(dev = PCI_DEV(0, 0, 0);
16 dev <= PCI_DEV(0, 0x1f, 0x7);
17 dev += PCI_DEV(0,0,1)) {
19 id = pci_read_config32(dev, PCI_VENDOR_ID);
20 if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
21 (((id >> 16) & 0xffff) == 0xffff) ||
22 (((id >> 16) & 0xffff) == 0x0000)) {
25 print_debug_pci_dev(dev);
30 static void dump_pci_device(unsigned dev)
33 print_debug_pci_dev(dev);
36 for(i = 0; i <= 255; i++) {
38 if ((i & 0x0f) == 0) {
40 print_debug_char(':');
42 val = pci_read_config8(dev, i);
43 print_debug_char(' ');
44 print_debug_hex8(val);
45 if ((i & 0x0f) == 0x0f) {
51 static void dump_pci_devices(void)
54 for(dev = PCI_DEV(0, 0, 0);
55 dev <= PCI_DEV(0, 0x1f, 0x7);
56 dev += PCI_DEV(0,0,1)) {
58 id = pci_read_config32(dev, PCI_VENDOR_ID);
59 if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
60 (((id >> 16) & 0xffff) == 0xffff) ||
61 (((id >> 16) & 0xffff) == 0x0000)) {
68 static void dump_spd_registers(int controllers, const struct mem_controller *ctrl)
71 for(n = 0; n < controllers; n++) {
74 activate_spd_rom(&ctrl[n]);
75 for(i = 0; i < 4; i++) {
77 device = ctrl[n].channel0[i];
80 print_debug("dimm: ");
82 print_debug_char('.');
85 print_debug_hex8(device);
86 for(j = 0; j < 256; j++) {
94 status = spd_read_byte(device, j);
96 print_debug("bad device\n");
100 byte = status & 0xff;
101 print_debug_hex8(byte);
103 print_debug_hex8(status & 0xff);
105 print_debug_char(' ');
109 device = ctrl[n].channel1[i];
112 print_debug("dimm: ");
114 print_debug_char('.');
117 print_debug_hex8(device);
118 for(j = 0; j < 256; j++) {
121 if ((j & 0xf) == 0) {
126 status = spd_read_byte(device, j);
128 print_debug("bad device\n");
132 byte = status & 0xff;
133 print_debug_hex8(byte);
135 print_debug_hex8(status & 0xff);
137 print_debug_char(' ');