3 #define SET_FIDVID_DEBUG 0
5 #define SET_FIDVID_ONE_BY_ONE 1
7 #define SET_FIDVID_STORE_AP_APICID_AT_FIRST 1
15 static inline void print_debug_fv(const char *str, u32 val)
17 #if SET_FIDVID_DEBUG == 1
18 printk(BIOS_DEBUG, "%s%x\n", str, val);
22 static inline void print_debug_fv_8(const char *str, u8 val)
24 #if SET_FIDVID_DEBUG == 1
25 printk(BIOS_DEBUG, "%s%02x\n", str, val);
29 static inline void print_debug_fv_64(const char *str, u32 val, u32 val2)
31 #if SET_FIDVID_DEBUG == 1
32 printk(BIOS_DEBUG, "%s%x%x\n", str, val, val2);
36 static void enable_fid_change(void)
42 nodes = ((pci_read_config32(PCI_DEV(0, 0x18, 0), 0x60) >> 4) & 7) + 1;
44 for (i = 0; i < nodes; i++) {
45 dword = pci_read_config32(PCI_DEV(0, 0x18 + i, 3), 0xd8);
47 dword |= (2 << 28) | (0x02710);
48 pci_write_config32(PCI_DEV(0, 0x18 + i, 3), 0xd8, dword);
51 pci_write_config32(PCI_DEV(0, 0x18 + i, 3), 0xd4, dword);
53 /* disable the DRAM interface at first, it will be enabled
55 dword = pci_read_config32(PCI_DEV(0, 0x18 + i, 2), 0x94);
57 pci_write_config32(PCI_DEV(0, 0x18 + i, 2), 0x94, dword);
59 dword = 0x23070700; /* enable FID/VID change */
60 // dword = 0x00070000; /* enable FID/VID change */
61 pci_write_config32(PCI_DEV(0, 0x18 + i, 3), 0x80, dword);
63 #if CONFIG_HAVE_ACPI_RESUME
68 pci_write_config32(PCI_DEV(0, 0x18 + i, 3), 0x84, dword);
73 #if SET_FIDVID_ONE_BY_ONE == 0
74 static unsigned set_fidvid_without_init(unsigned fidvid)
80 fid = (fidvid >> 8) & 0x3f;
81 vid = (fidvid >> 16) & 0x3f;
85 msr.lo = (vid << 8) | fid;
86 wrmsr(0xc0010041, msr);
91 static u32 set_fidvid(unsigned apicid, unsigned fidvid, int showmessage)
94 /* CurrentFID--> 4x(00h) 5x(02h) 6x(04h) 7x(06h) ...
95 * --------------------------------------
96 * TargetFID | Next_FID, Next_FID, Next_FID, Next_FID ...
97 * | | Next_FID, Next_FID, Next_FID, Next_FID ...
98 * \|/ | Next_FID, Next_FID, Next_FID, Next_FID ...
100 static const u8 next_fid_200[] = {
101 /* x4 x5 x6 x7 x8 x9 x10 x11 x12 x13 x14 x15 x16 */
102 /* x4 */ 0, -1, -1, -1, 0, 0, 9, 10, 11, 12, 13, 14, 15, /* 800 */
103 /* x5 */ -1, 0, -1, -1, -1, 5, 5, 5, 11, 12, 13, 14, 15, /* 1000 */
104 /* x6 */ -1, -1, 0, -1, -1, -1, -1, 6, 6, 6, 13, 14, 15, /* 1200 */
105 /* x7 */ -1, -1, -1, 0, -1, -1, -1, -1, -1, 7, 7, 7, 15, /* 1400 */
106 /* lower table to upper table boarder (table 70 and 71 in BKDG) */
107 /* x8 */ 8, -1, -1, -1, 0, 8, 9, 10, 11, 12, 13, 14, 15, /* 1600 */
108 /* x9 */ 9, 9, -1, -1, 9, 0, 9, 10, 11, 12, 13, 14, 15, /* 1800 */
109 /*x10 */ 9, 10, -1, -1, 9, 10, 0, 10, 11, 12, 13, 14, 15, /* 2000 */
110 /*x11 */ 9, 11, 11, -1, 9, 10, 11, 0, 11, 12, 13, 14, 15, /* 2200 */
111 /*x12 */ 9, 11, 12, -1, 9, 10, 11, 12, 0, 12, 13, 14, 15, /* 2400 */
112 /*x13 */ 9, 11, 13, 13, 9, 10, 11, 12, 13, 0, 13, 14, 15, /* 2600 */
113 /*x14 */ 9, 11, 13, 14, 9, 10, 11, 12, 13, 14, 0, 14, 15, /* 2800 */
114 /*x15 */ 9, 11, 13, 15, 9, 10, 11, 12, 13, 14, 15, 0, 15, /* 3000 */
115 /*x15 */ 9, 11, 13, 15, 9, 10, 11, 12, 13, 14, 15, 16, 0, /* 3200 */
132 if (apicid != apicidx) {
134 "wrong apicid, we want change %x, but it is %x\n",
139 fid_new = (fidvid >> 8) & 0x3f;
140 vid_new = (fidvid >> 16) & 0x3f;
142 msr = rdmsr(0xc0010042);
144 vid_cur = msr.hi & 0x3f;
145 fid_cur = msr.lo & 0x3f;
147 if ((vid_cur == vid_new) && (fid_cur == fid_new))
150 vid_max = (msr.hi >> (48 - 32)) & 0x3f;
151 fid_max = ((msr.lo >> 16) & 0x3f); /* max fid */
154 if (fid_max >= ((25 - 4) * 2)) { /* FX max fid is 5G */
155 fid_max = ((msr.lo >> 8) & 0x3f) + 5 * 2; /* max FID is min fid + 1G */
156 if (fid_max >= ((25 - 4) * 2)) {
157 fid_max = (10 - 4) * 2; /* hard set to 2G */
163 /* TODO - make this more correct. Not a big deal for setting max...
165 * if TargetFID > InitialFID
166 * TargetVID = FinalVID - RVO
168 * if CurrentVID > FinalVID
169 * TargetVID = FinalVID - RVO
171 * TargetVID = CurrentVIDD - RVO
174 msr.lo = (vid_max << 8) | (fid_cur);
176 msr.lo |= (1 << 16); /* init changes */
178 wrmsr(0xc0010041, msr);
183 for (loop = 0; loop < 100000; loop++) {
184 msr = rdmsr(0xc0010042);
185 if (!(msr.lo & (1 << 31)))
188 vid_cur = msr.hi & 0x3f;
190 /* BKDG figure 12 and 13
191 * if current fid is odd
192 * current fid -1 (next lower and even fid)(odd fid for rev G)
193 * if current fid in high-freq table
194 * while current fid < target fid
195 * transition to next higher fid in table
196 * else if target fid > VCO portal of current fid
197 * transition to highest portal fid in higher fid table
198 * while current fid < target fid
199 * transition to next higher fid in table
201 * transition to target fid
204 printk(BIOS_DEBUG, "Current fid_cur: 0x%x, fid_max: 0x%x\n", fid_cur,
206 printk(BIOS_DEBUG, "Requested fid_new: 0x%x\n", fid_new);
208 step_limit = 8; /* max 8 steps just in case... */
209 while ((fid_cur != fid_new) && (step_limit--)) {
213 if (fid_cur < fid_new)
214 /* Force Fid steps even. step == 0 means 100MHz step */
215 step = ((fid_new / 2) - (fid_cur / 2)) * 2;
217 step = ((fid_cur / 2) - (fid_new / 2)) * 2;
219 /* If 200Mhz step OR past 3200 max table value */
220 if ((step == 2) || (fid_new >= 0x18 || fid_cur >= 0x18)) {
222 printk(BIOS_DEBUG, "200MHZ step ");
224 /* Step +/- 200MHz at a time */
225 if (fid_cur < fid_new)
226 fid_temp = fid_cur + 2;
228 fid_temp = fid_cur - 2;
230 } else if (step > 2) { /* If more than a 200Mhz step */
233 /* look it up in the table */
234 printk(BIOS_DEBUG, "FidVid table step ");
237 next_fid_200[((fid_new / 2) * 13) + (fid_cur / 2)];
240 fid_temp = (temp - 4) * 2; /* Table 108 */
244 break; /* table error */
246 } else { /* step < 2 (100MHZ) */
247 printk(BIOS_DEBUG, "100MHZ step ");
249 /* The table adjust in 200MHz increments. If requested,
250 * do the 100MHz increment if the CPU supports it.*/
251 if (cpuid_edx(0x80000007) & (1 << 6)) {
252 fid_temp = fid_cur + 1;
254 /* 100 MHZ not supported. Get out of the loop */
255 printk(BIOS_DEBUG, "is not supported.\n");
260 if (fid_temp > fid_max) {
261 printk(BIOS_DEBUG, "fid_temp 0x%x > fid_max 0x%x\n",
266 printk(BIOS_DEBUG, "fidvid: 0x%x\n", fid_temp);
269 msr.hi = 0x190; /* 2 us for AMD NPT Family 0Fh Processors */
270 msr.lo = (vid_cur << 8) | fid_temp;
272 msr.lo |= (1 << 16); /* init changes */
274 wrmsr(0xc0010041, msr);
279 #if SET_FIDVID_DEBUG == 1
281 print_debug_fv_8("set_fidvid APICID = ", apicid);
282 print_debug_fv_64("fidvid ctrl msr ", msr.hi, msr.lo);
286 for (loop = 0; loop < 100000; loop++) {
287 msr = rdmsr(0xc0010042);
288 if (!(msr.lo & (1 << 31)))
291 fid_cur = msr.lo & 0x3f;
293 #if SET_FIDVID_DEBUG == 1
295 print_debug_fv_64("fidvid status msr ", msr.hi, msr.lo);
300 /* set vid to final */
301 /* TODO - make this more correct. Not a big deal for setting max...
303 * if TargetFID > InitialFID
304 * TargetVID = FinalVID - RVO
306 * if CurrentVID > FinalVID
307 * TargetVID = FinalVID - RVO
309 * TargetVID = CurrentVIDD - RVO
312 msr.lo = (vid_new << 8) | (fid_cur);
314 msr.lo |= (1 << 16); // init changes
316 wrmsr(0xc0010041, msr);
321 for (loop = 0; loop < 100000; loop++) {
322 msr = rdmsr(0xc0010042);
323 if (!(msr.lo & (1 << 31)))
326 vid_cur = msr.hi & 0x3f;
328 fidvid = (vid_cur << 16) | (fid_cur << 8);
331 if (vid_new != vid_cur) {
332 printk(BIOS_ERR, "set vid failed for apicid =%02x\n",
335 if (fid_new != fid_cur) {
336 printk(BIOS_ERR, "set fid failed for apicid =%02x\n",
345 static void init_fidvid_ap(unsigned bsp_apicid, unsigned apicid)
349 unsigned timeout = 1;
356 msr = rdmsr(0xc0010042);
357 fid_max = ((msr.lo >> 16) & 0x3f); /* max fid */
359 if (fid_max >= ((25 - 4) * 2)) { /* FX max fid is 5G */
360 fid_max = ((msr.lo >> 8) & 0x3f) + 5 * 2; /* maxFID = minFID + 1G */
361 if (fid_max >= ((25 - 4) * 2)) {
362 fid_max = (10 - 4) * 2; // hard set to 2G
368 send |= ((msr.hi >> (48 - 32)) & 0x3f) << 16; /* max vid */
369 send |= (apicid << 24); /* ap apicid */
371 #if SET_FIDVID_ONE_BY_ONE == 1
372 vid_cur = msr.hi & 0x3f;
373 fid_cur = msr.lo & 0x3f;
377 msr.lo = (vid_cur << 8) | (fid_cur);
378 wrmsr(0xc0010041, msr);
381 timeout = wait_cpu_state(bsp_apicid, 1);
383 printk(BIOS_DEBUG, "fidvid_ap_stage1: time out while reading"
384 " from BSP on %02x\n", apicid);
386 /* send signal to BSP about this AP max fid and vid */
387 /* AP at state 1 that sent our fid and vid */
388 lapic_write(LAPIC_MSG_REG, send | 1);
390 // wait_cpu_state(bsp_apicid, 2); /* don't need we can use apicid directly */
393 /* remote read BSP signal that include vid/fid that need to set */
394 if (lapic_remote_read(bsp_apicid, LAPIC_MSG_REG, &readback) !=
397 if (((readback >> 24) & 0xff) == apicid)
398 break; /* it is this cpu turn */
402 #if SET_FIDVID_ONE_BY_ONE == 1
403 readback = set_fidvid(apicid, readback & 0xffff00, 1); // this AP
405 readback = set_fidvid_without_init(readback & 0xffff00); // this AP
407 /* send signal to BSP that this AP fid/vid is set */
408 /* allow to change state2 is together with apicid */
409 /* AP at state that We set the requested fid/vid */
410 send = (apicid << 24) | (readback & 0x00ffff00);
412 printk(BIOS_DEBUG, "%s: time out while reading from BSP on %02x",
416 lapic_write(LAPIC_MSG_REG, send | 2);
418 timeout = wait_cpu_state(bsp_apicid, 3);
420 printk(BIOS_DEBUG, "%s: time out while reading from BSP on %02x",
425 static u32 calc_common_fidvid(unsigned fidvid, unsigned fidvidx)
427 /* FIXME: need to check the change path to verify if it is reachable
428 * when common fid is small than 1.6G */
429 if ((fidvid & 0xff00) <= (fidvidx & 0xff00)) {
437 unsigned common_fidvid;
440 static void init_fidvid_bsp_stage1(u32 ap_apicid, void *gp)
445 struct fidvid_st *fvp = gp;
448 print_debug_fv("state 1: ap_apicid=", ap_apicid);
452 if (lapic_remote_read(ap_apicid, LAPIC_MSG_REG, &readback) != 0)
454 if ((readback & 0xff) == 1) {
456 break; /* target ap is in stage 1 */
461 printk(BIOS_DEBUG, "%s: timed out reading from ap %02x\n",
462 __func__, ap_apicid);
466 print_debug_fv("\treadback = ", readback);
468 fvp->common_fidvid = calc_common_fidvid(fvp->common_fidvid, readback & 0xffff00);
470 print_debug_fv("\tcommon_fidvid=", fvp->common_fidvid);
473 static void init_fidvid_bsp_stage2(unsigned ap_apicid, void *gp)
475 unsigned readback = 0;
476 unsigned timeout = 1;
478 struct fidvid_st *fvp = gp;
481 print_debug_fv("state 2: ap_apicid=", ap_apicid);
483 /* all set to state2 */
484 lapic_write(LAPIC_MSG_REG, fvp->common_fidvid | (ap_apicid << 24) | 2);
488 if (lapic_remote_read(ap_apicid, LAPIC_MSG_REG, &readback) != 0)
490 if ((readback & 0xff) == 2) {
492 break; /* target ap is stage 2, it's FID has beed set */
497 printk(BIOS_DEBUG, "%s: time out while reading from ap %02x",
498 __func__, ap_apicid);
502 print_debug_fv("\treadback=", readback);
505 #if SET_FIDVID_STORE_AP_APICID_AT_FIRST == 1
506 struct ap_apicid_st {
508 unsigned apicid[16]; /* 8 way dual core need 16 */
511 static void store_ap_apicid(unsigned ap_apicid, void *gp)
513 struct ap_apicid_st *p = gp;
515 p->apicid[p->num++] = ap_apicid;
520 static void init_fidvid_bsp(unsigned bsp_apicid)
527 #if SET_FIDVID_STORE_AP_APICID_AT_FIRST == 1
528 struct ap_apicid_st ap_apicidx;
533 msr = rdmsr(0xc0010042);
534 fid_max = ((msr.lo >> 16) & 0x3f); /* max fid */
536 if (fid_max >= ((25 - 4) * 2)) { /* FX max fid is 5G */
537 fid_max = ((msr.lo >> 8) & 0x3f) + 5 * 2; /* maxFID = minFID + 1G */
538 if (fid_max >= ((25 - 4) * 2)) {
539 fid_max = (10 - 4) * 2; /* hard set to 2G */
543 vid_max = ((msr.hi >> (48 - 32)) & 0x3f); //max vid
544 fv.common_fidvid = (fid_max << 8) | (vid_max << 16);
546 /* for all APs (We know the APIC ID of all APs even the APIC ID is lifted)
547 * remote read from AP about max fid/vid */
549 /* let all ap trains to state 1 */
550 lapic_write(LAPIC_MSG_REG, (bsp_apicid << 24) | 1);
552 /* calculate the common max fid/vid that could be used for
554 #if SET_FIDVID_STORE_AP_APICID_AT_FIRST == 1
557 for_each_ap(bsp_apicid, SET_FIDVID_CORE0_ONLY, store_ap_apicid, &ap_apicidx);
559 for (i = 0; i < ap_apicidx.num; i++) {
560 init_fidvid_bsp_stage1(ap_apicidx.apicid[i], &fv);
563 for_each_ap(bsp_apicid, SET_FIDVID_CORE0_ONLY, init_fidvid_bsp_stage1, &fv);
568 /* Can we use max only? So we can only set fid in one around,
569 * otherwise we need to set that to max after raminit */
570 /* set fid vid to DQS training required */
571 fid = (fv.common_fidvid >> 8) & 0x3f;
572 vid = (fv.common_fidvid >> 16) & 0x3f;
574 if (fid > (10 - 4) * 2) {
575 fid = (10 - 4) * 2; // x10
579 vid += 4; /* unit is 12.5mV */
581 vid += 2; /* unit is 25mV */
584 fv.common_fidvid = (fid << 8) | (vid << 16);
586 print_debug_fv("common_fidvid=", fv.common_fidvid);
590 #if SET_FIDVID_ONE_BY_ONE == 1
591 /* set BSP fid and vid */
592 print_debug_fv("bsp apicid=", bsp_apicid);
593 fv.common_fidvid = set_fidvid(bsp_apicid, fv.common_fidvid, 1);
594 print_debug_fv("common_fidvid=", fv.common_fidvid);
597 /* For all APs ( We know the APIC ID of all AP even the APIC ID is lifted)
598 * send signal to the AP it could change it's fid/vid */
599 /* remote read singnal from AP that AP is done */
601 fv.common_fidvid &= 0xffff00;
603 /* set state 2 allow is in init_fidvid_bsp_stage2 */
604 #if SET_FIDVID_STORE_AP_APICID_AT_FIRST == 1
605 for (i = 0; i < ap_apicidx.num; i++) {
606 init_fidvid_bsp_stage2(ap_apicidx.apicid[i], &fv);
609 for_each_ap(bsp_apicid, SET_FIDVID_CORE0_ONLY, init_fidvid_bsp_stage2, &fv);
612 #if SET_FIDVID_ONE_BY_ONE == 0
613 /* set BSP fid and vid */
614 print_debug_fv("bsp apicid=", bsp_apicid);
615 fv.common_fidvid = set_fidvid(bsp_apicid, fv.common_fidvid, 1);
616 print_debug_fv("common_fidvid=", fv.common_fidvid);
620 /* clear the state */
621 lapic_write(LAPIC_MSG_REG, fv.common_fidvid | (bsp_apicid << 24) | 3);
623 /* here wait a while, so last ap could read pack, and stop it, don't
624 * call init_timer too early or just don't use init_timer */