2 * inteltool - dump all registers on an Intel CPU + chipset based system.
4 * Copyright (C) 2008-2010 by coresystems GmbH
5 * written by Stefan Reinauer <stepan@coresystems.de>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 #include "inteltool.h"
24 static const io_register_t ich7_pm_registers[] = {
25 { 0x00, 2, "PM1_STS" },
26 { 0x02, 2, "PM1_EN" },
27 { 0x04, 4, "PM1_CNT" },
28 { 0x08, 4, "PM1_TMR" },
29 { 0x0c, 4, "RESERVED" },
30 { 0x10, 4, "PROC_CNT" },
31 #if DANGEROUS_REGISTERS
32 /* These registers return 0 on read, but reading them may cause
33 * the system to enter C2/C3/C4 state, which might hang the system.
35 { 0x14, 1, "LV2 (Mobile/Ultra Mobile)" },
36 { 0x15, 1, "LV3 (Mobile/Ultra Mobile)" },
37 { 0x16, 1, "LV4 (Mobile/Ultra Mobile)" },
39 { 0x17, 1, "RESERVED" },
40 { 0x18, 4, "RESERVED" },
41 { 0x1c, 4, "RESERVED" },
42 { 0x20, 1, "PM2_CNT (Mobile/Ultra Mobile)" },
43 { 0x21, 1, "RESERVED" },
44 { 0x22, 2, "RESERVED" },
45 { 0x24, 4, "RESERVED" },
46 { 0x28, 4, "GPE0_STS" },
47 { 0x2C, 4, "GPE0_EN" },
48 { 0x30, 4, "SMI_EN" },
49 { 0x34, 4, "SMI_STS" },
50 { 0x38, 2, "ALT_GP_SMI_EN" },
51 { 0x3a, 2, "ALT_GP_SMI_STS" },
52 { 0x3c, 4, "RESERVED" },
53 { 0x40, 2, "RESERVED" },
54 { 0x42, 1, "GPE_CNTL" },
55 { 0x43, 1, "RESERVED" },
56 { 0x44, 2, "DEVACT_STS" },
57 { 0x46, 2, "RESERVED" },
58 { 0x48, 4, "RESERVED" },
59 { 0x4c, 4, "RESERVED" },
60 { 0x50, 1, "SS_CNT (Mobile/Ultra Mobile)" },
61 { 0x51, 1, "RESERVED" },
62 { 0x52, 2, "RESERVED" },
63 { 0x54, 4, "C3_RES (Mobile/Ultra Mobile)" },
64 { 0x58, 4, "RESERVED" },
65 { 0x5c, 4, "RESERVED" },
66 /* Here start the TCO registers */
67 { 0x60, 2, "TCO_RLD" },
68 { 0x62, 1, "TCO_DAT_IN" },
69 { 0x63, 1, "TCO_DAT_OUT" },
70 { 0x64, 2, "TCO1_STS" },
71 { 0x66, 2, "TCO2_STS" },
72 { 0x68, 2, "TCO1_CNT" },
73 { 0x6a, 2, "TCO2_CNT" },
74 { 0x6c, 2, "TCO_MESSAGE" },
75 { 0x6e, 1, "TCO_WDCNT" },
76 { 0x6f, 1, "RESERVED" },
77 { 0x70, 1, "SW_IRQ_GEN" },
78 { 0x71, 1, "RESERVED" },
79 { 0x72, 2, "TCO_TMR" },
80 { 0x74, 4, "RESERVED" },
81 { 0x78, 4, "RESERVED" },
82 { 0x7c, 4, "RESERVED" },
85 static const io_register_t ich8_pm_registers[] = {
86 { 0x00, 2, "PM1_STS" },
87 { 0x02, 2, "PM1_EN" },
88 { 0x04, 4, "PM1_CNT" },
89 { 0x08, 4, "PM1_TMR" },
90 { 0x0c, 4, "RESERVED" },
91 { 0x10, 4, "PROC_CNT" },
92 #if DANGEROUS_REGISTERS
93 /* These registers return 0 on read, but reading them may cause
94 * the system to enter Cx states, which might hang the system.
96 { 0x14, 1, "LV2 (Mobile)" },
97 { 0x15, 1, "LV3 (Mobile)" },
98 { 0x16, 1, "LV4 (Mobile)" },
99 { 0x17, 1, "LV5 (Mobile)" },
100 { 0x18, 1, "LV6 (Mobile)" },
102 { 0x19, 1, "RESERVED" },
103 { 0x1a, 2, "RESERVED" },
104 { 0x1c, 4, "RESERVED" },
105 { 0x20, 1, "PM2_CNT (Mobile)" },
106 { 0x21, 1, "RESERVED" },
107 { 0x22, 2, "RESERVED" },
108 { 0x24, 4, "RESERVED" },
109 { 0x28, 4, "GPE0_STS" },
110 { 0x2C, 4, "GPE0_EN" },
111 { 0x30, 4, "SMI_EN" },
112 { 0x34, 4, "SMI_STS" },
113 { 0x38, 2, "ALT_GP_SMI_EN" },
114 { 0x3a, 2, "ALT_GP_SMI_STS" },
115 { 0x3c, 4, "RESERVED" },
116 { 0x40, 2, "RESERVED" },
117 { 0x42, 1, "GPE_CNTL" },
118 { 0x43, 1, "RESERVED" },
119 { 0x44, 2, "DEVACT_STS" },
120 { 0x46, 2, "RESERVED" },
121 { 0x48, 4, "RESERVED" },
122 { 0x4c, 4, "RESERVED" },
123 { 0x50, 1, "SS_CNT (Mobile)" },
124 { 0x51, 1, "RESERVED" },
125 { 0x52, 2, "RESERVED" },
126 { 0x54, 4, "C3_RES (Mobile)" },
127 { 0x58, 4, "C5_RES (Mobile)" },
128 { 0x5c, 4, "RESERVED" },
129 /* Here start the TCO registers */
130 { 0x60, 2, "TCO_RLD" },
131 { 0x62, 1, "TCO_DAT_IN" },
132 { 0x63, 1, "TCO_DAT_OUT" },
133 { 0x64, 2, "TCO1_STS" },
134 { 0x66, 2, "TCO2_STS" },
135 { 0x68, 2, "TCO1_CNT" },
136 { 0x6a, 2, "TCO2_CNT" },
137 { 0x6c, 2, "TCO_MESSAGE" },
138 { 0x6e, 1, "TCO_WDCNT" },
139 { 0x6f, 1, "RESERVED" },
140 { 0x70, 1, "SW_IRQ_GEN" },
141 { 0x71, 1, "RESERVED" },
142 { 0x72, 2, "TCO_TMR" },
143 { 0x74, 4, "RESERVED" },
144 { 0x78, 4, "RESERVED" },
145 { 0x7c, 4, "RESERVED" },
149 * INTEL I/O Controller Hub 6 Family
150 * http://www.intel.com/assets/pdf/datasheet/301473.pdf
152 static const io_register_t ich6_pm_registers[] = {
154 { 0x00, 2, "PM1_STS" },
155 { 0x02, 2, "PM1_EN" },
156 { 0x04, 4, "PM1_CNT" },
157 { 0x08, 4, "PM1_TMR" },
158 { 0x10, 4, "PROC_CNT" },
159 #if DANGEROUS_REGISTERS
160 /* These registers return 0 on read, but reading them may cause
161 * the system to enter C2/C3/C4 state, which might hang the system.
164 { 0x15, 1, "LV3 (Mobile Only)" },
165 { 0x16, 1, "LV4 (Mobile Only)" },
167 { 0x20, 1, "PM2_CNT (Mobile Only)" },
168 { 0x28, 4, "GPE0_STS" },
169 { 0x2c, 4, "GPE0_EN" },
170 { 0x30, 4, "SMI_EN" },
171 { 0x34, 4, "SMI_STS" },
172 { 0x38, 2, "ALT_GP_SMI_EN" },
173 { 0x3a, 2, "ALT_GP_SMI_STS" },
174 { 0x44, 2, "DEVACT_STS" },
175 { 0x50, 1, "SS_CNT (Mobile Only)" },
176 { 0x54, 4, "C3_RES (Mobile Only)" },
179 static const io_register_t ich4_pm_registers[] = {
180 { 0x00, 2, "PM1_STS" },
181 { 0x02, 2, "PM1_EN" },
182 { 0x04, 4, "PM1_CNT" },
183 { 0x08, 4, "PM1_TMR" },
184 { 0x0c, 4, "RESERVED" },
185 { 0x10, 4, "PROC_CNT" },
186 #if DANGEROUS_REGISTERS
187 /* These registers return 0 on read, but reading them may cause
188 * the system to enter C2/C3/C4 state, which might hang the system.
190 { 0x14, 1, "LV2 (Mobile)" },
191 { 0x15, 1, "LV3 (Mobile)" },
192 { 0x16, 1, "LV4 (Mobile)" },
194 { 0x17, 1, "RESERVED" },
195 { 0x18, 4, "RESERVED" },
196 { 0x1c, 4, "RESERVED" },
197 { 0x20, 1, "PM2_CNT (Mobile)" },
198 { 0x21, 1, "RESERVED" },
199 { 0x22, 2, "RESERVED" },
200 { 0x24, 4, "RESERVED" },
201 { 0x28, 4, "GPE0_STS" },
202 { 0x2C, 4, "GPE0_EN" },
203 { 0x30, 4, "SMI_EN" },
204 { 0x34, 4, "SMI_STS" },
205 { 0x38, 2, "ALT_GP_SMI_EN" },
206 { 0x3a, 2, "ALT_GP_SMI_STS" },
207 { 0x3c, 4, "RESERVED" },
208 { 0x40, 2, "MON_SMI" },
209 { 0x42, 2, "RESERVED" },
210 { 0x44, 2, "DEVACT_STS" },
211 { 0x46, 2, "RESERVED" },
212 { 0x48, 4, "DEVTRAP_EN" },
213 { 0x4c, 2, "BUS_ADDR_TRACK" },
214 { 0x4e, 2, "BUS_CYC_TRACK" },
215 { 0x50, 1, "SS_CNT (Mobile/Ultra Mobile)" },
216 { 0x51, 1, "RESERVED" },
217 { 0x52, 2, "RESERVED" },
218 { 0x54, 4, "RESERVED" },
219 { 0x58, 4, "RESERVED" },
220 { 0x5c, 4, "RESERVED" },
221 /* Here start the TCO registers */
222 { 0x60, 1, "TCO_RLD" },
223 { 0x61, 1, "TCO_TMR" },
224 { 0x62, 1, "TCO_DAT_IN" },
225 { 0x63, 1, "TCO_DAT_OUT" },
226 { 0x64, 2, "TCO1_STS" },
227 { 0x66, 2, "TCO2_STS" },
228 { 0x68, 2, "TCO1_CNT" },
229 { 0x6a, 2, "TCO2_CNT" },
230 { 0x6c, 2, "TCO_MESSAGE" },
231 { 0x6e, 1, "TCO_WDSTATUS" },
232 { 0x6f, 1, "RESERVED" },
233 { 0x70, 1, "SW_IRQ_GEN" },
234 { 0x71, 1, "RESERVED" },
235 { 0x72, 2, "RESERVED" },
236 { 0x74, 4, "RESERVED" },
237 { 0x78, 4, "RESERVED" },
238 { 0x7c, 4, "RESERVED" },
241 static const io_register_t ich0_pm_registers[] = {
242 { 0x00, 2, "PM1_STS" },
243 { 0x02, 2, "PM1_EN" },
244 { 0x04, 4, "PM1_CNT" },
245 { 0x08, 4, "PM1_TMR" },
246 { 0x0c, 4, "RESERVED" },
247 { 0x10, 4, "PROC_CNT" },
248 #if DANGEROUS_REGISTERS
249 /* This register returns 0 on read, but reading it may cause
250 * the system to enter C2 state, which might hang the system.
253 { 0x15, 1, "RESERVED" },
254 { 0x16, 2, "RESERVED" },
256 { 0x18, 4, "RESERVED" },
257 { 0x1c, 4, "RESERVED" },
258 { 0x20, 4, "RESERVED" },
259 { 0x24, 4, "RESERVED" },
260 { 0x28, 4, "GPE0_STS" },
261 { 0x2C, 4, "GPE0_EN" },
262 { 0x30, 2, "SMI_EN" },
263 { 0x32, 2, "RESERVED" },
264 { 0x34, 2, "SMI_STS" },
265 { 0x36, 2, "RESERVED" },
266 { 0x38, 4, "RESERVED" },
267 { 0x3c, 4, "RESERVED" },
268 { 0x40, 2, "IOMON_STS_EN" },
269 { 0x42, 2, "RESERVED" },
270 { 0x44, 2, "DEVACT_STS" },
271 { 0x46, 2, "RESERVED" },
272 { 0x48, 4, "RESERVED" },
273 { 0x4c, 2, "BUS_ADDR_TRACK" },
274 { 0x4e, 1, "BUS_CYC_TRACK" },
275 { 0x4f, 1, "RESERVED" },
276 { 0x50, 4, "RESERVED" },
277 { 0x54, 4, "RESERVED" },
278 { 0x58, 4, "RESERVED" },
279 { 0x5c, 4, "RESERVED" },
280 /* Here start the TCO registers */
281 { 0x60, 1, "TCO_RLD" },
282 { 0x61, 1, "TCO_TMR" },
283 { 0x62, 1, "TCO_DAT_IN" },
284 { 0x63, 1, "TCO_DAT_OUT" },
285 { 0x64, 2, "TCO1_STS" },
286 { 0x66, 2, "TCO2_STS" },
287 { 0x68, 2, "TCO1_CNT" },
288 { 0x6a, 2, "TCO2_CNT" },
289 { 0x6c, 1, "TCO_MESSAGE1" },
290 { 0x6d, 1, "TCO_MESSAGE2" },
291 { 0x6e, 1, "TCO_WDSTATUS" },
292 { 0x6f, 1, "RESERVED" },
293 { 0x70, 4, "RESERVED" },
294 { 0x74, 4, "RESERVED" },
295 { 0x78, 4, "RESERVED" },
296 { 0x7c, 4, "RESERVED" },
299 static const io_register_t i82371xx_pm_registers[] = {
300 { 0x00, 2, "PMSTS" },
302 { 0x04, 2, "PMCNTRL" },
303 { 0x06, 2, "RESERVED" },
304 { 0x08, 1, "PMTMR" },
305 { 0x09, 1, "RESERVED" },
306 { 0x0A, 1, "RESERVED" },
307 { 0x0B, 1, "RESERVED" },
308 { 0x0C, 2, "GPSTS" },
310 { 0x10, 4, "PCNTRL" },
311 #if DANGEROUS_REGISTERS
313 * This register returns 0 on read, but reading it may cause
314 * the system to enter C2 state, which might hang the system.
316 { 0x14, 1, "PLVL2" },
317 { 0x15, 1, "PLVL3" },
318 { 0x16, 2, "RESERVED" },
320 { 0x18, 2, "GLBSTS" },
321 { 0x1A, 2, "RESERVED" },
322 { 0x1c, 4, "DEVSTS" },
323 { 0x20, 2, "GLBEN" },
324 { 0x22, 1, "RESERVED" },
325 { 0x23, 1, "RESERVED" },
326 { 0x24, 1, "RESERVED" },
327 { 0x25, 1, "RESERVED" },
328 { 0x26, 1, "RESERVED" },
329 { 0x27, 1, "RESERVED" },
330 { 0x28, 4, "GLBCTL" },
331 { 0x2C, 4, "DEVCTL" },
332 /* The registers 0x30-0x33 and 0x34-0x37 allow byte-wise reads only. */
333 { 0x30, 1, "GPIREG 0" },
334 { 0x31, 1, "GPIREG 1" },
335 { 0x32, 1, "GPIREG 2" },
336 { 0x33, 1, "GPIREG 3" },
337 { 0x34, 1, "GPOREG 0" },
338 { 0x35, 1, "GPOREG 1" },
339 { 0x36, 1, "GPOREG 2" },
340 { 0x37, 1, "GPOREG 3" },
343 int print_pmbase(struct pci_dev *sb)
347 const io_register_t *pm_registers;
349 printf("\n============= PMBASE ============\n\n");
351 switch (sb->device_id) {
352 case PCI_DEVICE_ID_INTEL_ICH7:
353 case PCI_DEVICE_ID_INTEL_ICH7M:
354 case PCI_DEVICE_ID_INTEL_ICH7DH:
355 case PCI_DEVICE_ID_INTEL_ICH7MDH:
356 pmbase = pci_read_word(sb, 0x40) & 0xfffc;
357 pm_registers = ich7_pm_registers;
358 size = ARRAY_SIZE(ich7_pm_registers);
360 case PCI_DEVICE_ID_INTEL_ICH8M:
361 pmbase = pci_read_word(sb, 0x40) & 0xfffc;
362 pm_registers = ich8_pm_registers;
363 size = ARRAY_SIZE(ich8_pm_registers);
365 case PCI_DEVICE_ID_INTEL_ICH6:
366 pmbase = pci_read_word(sb, 0x40) & 0xfffc;
367 pm_registers = ich6_pm_registers;
368 size = ARRAY_SIZE(ich6_pm_registers);
370 case PCI_DEVICE_ID_INTEL_ICH4:
371 pmbase = pci_read_word(sb, 0x40) & 0xfffc;
372 pm_registers = ich4_pm_registers;
373 size = ARRAY_SIZE(ich4_pm_registers);
375 case PCI_DEVICE_ID_INTEL_ICH0:
376 pmbase = pci_read_word(sb, 0x40) & 0xfffc;
377 pm_registers = ich0_pm_registers;
378 size = ARRAY_SIZE(ich0_pm_registers);
380 case PCI_DEVICE_ID_INTEL_82371XX:
381 pmbase = pci_read_word(sb, 0x40) & 0xfffc;
382 pm_registers = i82371xx_pm_registers;
383 size = ARRAY_SIZE(i82371xx_pm_registers);
385 case 0x1234: // Dummy for non-existent functionality
386 printf("This southbridge does not have PMBASE.\n");
389 printf("Error: Dumping PMBASE on this southbridge is not (yet) supported.\n");
393 printf("PMBASE = 0x%04x (IO)\n\n", pmbase);
395 for (i = 0; i < size; i++) {
396 switch (pm_registers[i].size) {
398 printf("pmbase+0x%04x: 0x%08x (%s)\n",
399 pm_registers[i].addr,
400 inl(pmbase+pm_registers[i].addr),
401 pm_registers[i].name);
404 printf("pmbase+0x%04x: 0x%04x (%s)\n",
405 pm_registers[i].addr,
406 inw(pmbase+pm_registers[i].addr),
407 pm_registers[i].name);
410 printf("pmbase+0x%04x: 0x%02x (%s)\n",
411 pm_registers[i].addr,
412 inb(pmbase+pm_registers[i].addr),
413 pm_registers[i].name);