src/arch/i386/boot/mpspec.c

   1 #include <console/console.h>
   2 #include <device/path.h>
   3 #include <device/pci_ids.h>
   4 #include <cpu/cpu.h>
   5 #include <arch/smp/mpspec.h>
   6 #include <string.h>
   7 #include <arch/cpu.h>
   8 #include <cpu/x86/lapic.h>
   9
  10 unsigned char smp_compute_checksum(void *v, int len)
  11 {
  12         unsigned char *bytes;
  13         unsigned char checksum;
  14         int i;
  15         bytes = v;
  16         checksum = 0;
  17         for(i = 0; i < len; i++) {
  18                 checksum -= bytes[i];
  19         }
  20         return checksum;
  21 }
  22
  23 void *smp_write_floating_table(unsigned long addr)
  24 {
  25         /* 16 byte align the table address */
  26         addr = (addr + 0xf) & (~0xf);
  27         return smp_write_floating_table_physaddr(addr, addr + SMP_FLOATING_TABLE_LEN);
  28 }
  29
  30 void *smp_write_floating_table_physaddr(unsigned long addr, unsigned long mpf_physptr)
  31 {
  32         struct intel_mp_floating *mf;
  33         void *v;
  34
  35         v = (void *)addr;
  36         mf = v;
  37         mf->mpf_signature[0] = '_';
  38         mf->mpf_signature[1] = 'M';
  39         mf->mpf_signature[2] = 'P';
  40         mf->mpf_signature[3] = '_';
  41         mf->mpf_physptr = mpf_physptr;
  42         mf->mpf_length = 1;
  43         mf->mpf_specification = 4;
  44         mf->mpf_checksum = 0;
  45         mf->mpf_feature1 = 0;
  46         mf->mpf_feature2 = 0;
  47         mf->mpf_feature3 = 0;
  48         mf->mpf_feature4 = 0;
  49         mf->mpf_feature5 = 0;
  50         mf->mpf_checksum = smp_compute_checksum(mf, mf->mpf_length*16);
  51         return v;
  52 }
  53
  54 void *smp_next_mpc_entry(struct mp_config_table *mc)
  55 {
  56         void *v;
  57         v = (void *)(((char *)mc) + mc->mpc_length);
  58         return v;
  59 }
  60 static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned length)
  61 {
  62         mc->mpc_length += length;
  63         mc->mpc_entry_count++;
  64 }
  65
  66 void *smp_next_mpe_entry(struct mp_config_table *mc)
  67 {
  68         void *v;
  69         v = (void *)(((char *)mc) + mc->mpc_length + mc->mpe_length);
  70         return v;
  71 }
  72 static void smp_add_mpe_entry(struct mp_config_table *mc, mpe_t mpe)
  73 {
  74         mc->mpe_length += mpe->mpe_length;
  75 }
  76
  77 void smp_write_processor(struct mp_config_table *mc,
  78         unsigned char apicid, unsigned char apicver,
  79         unsigned char cpuflag, unsigned int cpufeature,
  80         unsigned int featureflag)
  81 {
  82         struct mpc_config_processor *mpc;
  83         mpc = smp_next_mpc_entry(mc);
  84         memset(mpc, '\0', sizeof(*mpc));
  85         mpc->mpc_type = MP_PROCESSOR;
  86         mpc->mpc_apicid = apicid;
  87         mpc->mpc_apicver = apicver;
  88         mpc->mpc_cpuflag = cpuflag;
  89         mpc->mpc_cpufeature = cpufeature;
  90         mpc->mpc_featureflag = featureflag;
  91         smp_add_mpc_entry(mc, sizeof(*mpc));
  92 }
  93
  94 /* If we assume a symmetric processor configuration we can
  95  * get all of the information we need to write the processor
  96  * entry from the bootstrap processor.
  97  * Plus I don't think linux really even cares.
  98  * Having the proper apicid's in the table so the non-bootstrap
  99  *  processors can be woken up should be enough.
 100  */
 101 void smp_write_processors(struct mp_config_table *mc)
 102 {
 103         int boot_apic_id;
 104         unsigned apic_version;
 105         unsigned cpu_features;
 106         unsigned cpu_feature_flags;
 107         struct cpuid_result result;
 108         device_t cpu;
 109
 110         boot_apic_id = lapicid();
 111         apic_version = lapic_read(LAPIC_LVR) & 0xff;
 112         result = cpuid(1);
 113         cpu_features = result.eax;
 114         cpu_feature_flags = result.edx;
 115         for(cpu = all_devices; cpu; cpu = cpu->next) {
 116                 unsigned long cpu_flag;
 117                 if ((cpu->path.type != DEVICE_PATH_APIC) ||
 118                         (cpu->bus->dev->path.type != DEVICE_PATH_APIC_CLUSTER))
 119                 {
 120                         continue;
 121                 }
 122                 if (!cpu->enabled) {
 123                         continue;
 124                 }
 125                 cpu_flag = MPC_CPU_ENABLED;
 126                 if (boot_apic_id == cpu->path.apic.apic_id) {
 127                         cpu_flag = MPC_CPU_ENABLED | MPC_CPU_BOOTPROCESSOR;
 128                 }
 129                 smp_write_processor(mc,
 130                         cpu->path.apic.apic_id, apic_version,
 131                         cpu_flag, cpu_features, cpu_feature_flags
 132                 );
 133         }
 134 }
 135
 136 void smp_write_bus(struct mp_config_table *mc,
 137         unsigned char id, const char *bustype)
 138 {
 139         struct mpc_config_bus *mpc;
 140         mpc = smp_next_mpc_entry(mc);
 141         memset(mpc, '\0', sizeof(*mpc));
 142         mpc->mpc_type = MP_BUS;
 143         mpc->mpc_busid = id;
 144         memcpy(mpc->mpc_bustype, bustype, sizeof(mpc->mpc_bustype));
 145         smp_add_mpc_entry(mc, sizeof(*mpc));
 146 }
 147
 148 void smp_write_ioapic(struct mp_config_table *mc,
 149         unsigned char id, unsigned char ver,
 150         unsigned long apicaddr)
 151 {
 152         struct mpc_config_ioapic *mpc;
 153         mpc = smp_next_mpc_entry(mc);
 154         memset(mpc, '\0', sizeof(*mpc));
 155         mpc->mpc_type = MP_IOAPIC;
 156         mpc->mpc_apicid = id;
 157         mpc->mpc_apicver = ver;
 158         mpc->mpc_flags = MPC_APIC_USABLE;
 159         mpc->mpc_apicaddr = apicaddr;
 160         smp_add_mpc_entry(mc, sizeof(*mpc));
 161 }
 162
 163 void smp_write_intsrc(struct mp_config_table *mc,
 164         unsigned char irqtype, unsigned short irqflag,
 165         unsigned char srcbus, unsigned char srcbusirq,
 166         unsigned char dstapic, unsigned char dstirq)
 167 {
 168         struct mpc_config_intsrc *mpc;
 169         mpc = smp_next_mpc_entry(mc);
 170         memset(mpc, '\0', sizeof(*mpc));
 171         mpc->mpc_type = MP_INTSRC;
 172         mpc->mpc_irqtype = irqtype;
 173         mpc->mpc_irqflag = irqflag;
 174         mpc->mpc_srcbus = srcbus;
 175         mpc->mpc_srcbusirq = srcbusirq;
 176         mpc->mpc_dstapic = dstapic;
 177         mpc->mpc_dstirq = dstirq;
 178         smp_add_mpc_entry(mc, sizeof(*mpc));
 179 #ifdef DEBUG_MPTABLE
 180         printk(BIOS_DEBUG, "add intsrc srcbus 0x%x srcbusirq 0x%x, dstapic 0x%x, dstirq 0x%x\n",
 181                                 srcbus, srcbusirq, dstapic, dstirq);
 182         hexdump(__func__, mpc, sizeof(*mpc));
 183 #endif
 184 }
 185
 186 void smp_write_intsrc_pci_bridge(struct mp_config_table *mc,
 187         unsigned char irqtype, unsigned short irqflag,
 188         struct device *dev,
 189         unsigned char dstapic, unsigned char *dstirq)
 190 {
 191         struct device *child;
 192
 193         int linkn;
 194         int i;
 195         int srcbus;
 196         int slot;
 197
 198         struct bus *link;
 199         unsigned char dstirq_x[4];
 200
 201         for (linkn = 0; linkn < dev->links; linkn++) {
 202
 203                 link = &dev->link[linkn];
 204                 child = link->children;
 205                 srcbus = link->secondary;
 206
 207                 while (child) {
 208                         if (child->path.type != DEVICE_PATH_PCI)
 209                                 goto next;
 210
 211                         slot = (child->path.pci.devfn >> 3);
 212                         /* round pins */
 213                         for (i = 0; i < 4; i++)
 214                                 dstirq_x[i] = dstirq[(i + slot) % 4];
 215
 216                         if ((child->class >> 16) != PCI_BASE_CLASS_BRIDGE) {
 217                                 /* pci device */
 218                                 printk(BIOS_DEBUG, "route irq: %s\n", dev_path(child));
 219                                 for (i = 0; i < 4; i++)
 220                                         smp_write_intsrc(mc, irqtype, irqflag, srcbus, (slot<<2)|i, dstapic, dstirq_x[i]);
 221                                 goto next;
 222                         }
 223
 224                         switch (child->class>>8) {
 225                         case PCI_CLASS_BRIDGE_PCI:
 226                         case PCI_CLASS_BRIDGE_PCMCIA:
 227                         case PCI_CLASS_BRIDGE_CARDBUS:
 228                                 printk(BIOS_DEBUG, "route irq bridge: %s\n", dev_path(child));
 229                                 smp_write_intsrc_pci_bridge(mc, irqtype, irqflag, child, dstapic, dstirq_x);
 230                         }
 231
 232                 next:
 233                         child = child->sibling;
 234                 }
 235
 236         }
 237 }
 238
 239 void smp_write_lintsrc(struct mp_config_table *mc,
 240         unsigned char irqtype, unsigned short irqflag,
 241         unsigned char srcbusid, unsigned char srcbusirq,
 242         unsigned char destapic, unsigned char destapiclint)
 243 {
 244         struct mpc_config_lintsrc *mpc;
 245         mpc = smp_next_mpc_entry(mc);
 246         memset(mpc, '\0', sizeof(*mpc));
 247         mpc->mpc_type = MP_LINTSRC;
 248         mpc->mpc_irqtype = irqtype;
 249         mpc->mpc_irqflag = irqflag;
 250         mpc->mpc_srcbusid = srcbusid;
 251         mpc->mpc_srcbusirq = srcbusirq;
 252         mpc->mpc_destapic = destapic;
 253         mpc->mpc_destapiclint = destapiclint;
 254         smp_add_mpc_entry(mc, sizeof(*mpc));
 255 }
 256
 257 void smp_write_address_space(struct mp_config_table *mc,
 258         unsigned char busid, unsigned char address_type,
 259         unsigned int address_base_low, unsigned int address_base_high,
 260         unsigned int address_length_low, unsigned int address_length_high)
 261 {
 262         struct mp_exten_system_address_space *mpe;
 263         mpe = smp_next_mpe_entry(mc);
 264         memset(mpe, '\0', sizeof(*mpe));
 265         mpe->mpe_type = MPE_SYSTEM_ADDRESS_SPACE;
 266         mpe->mpe_length = sizeof(*mpe);
 267         mpe->mpe_busid = busid;
 268         mpe->mpe_address_type = address_type;
 269         mpe->mpe_address_base_low  = address_base_low;
 270         mpe->mpe_address_base_high = address_base_high;
 271         mpe->mpe_address_length_low  = address_length_low;
 272         mpe->mpe_address_length_high = address_length_high;
 273         smp_add_mpe_entry(mc, (mpe_t)mpe);
 274 }
 275
 276
 277 void smp_write_bus_hierarchy(struct mp_config_table *mc,
 278         unsigned char busid, unsigned char bus_info,
 279         unsigned char parent_busid)
 280 {
 281         struct mp_exten_bus_hierarchy *mpe;
 282         mpe = smp_next_mpe_entry(mc);
 283         memset(mpe, '\0', sizeof(*mpe));
 284         mpe->mpe_type = MPE_BUS_HIERARCHY;
 285         mpe->mpe_length = sizeof(*mpe);
 286         mpe->mpe_busid = busid;
 287         mpe->mpe_bus_info = bus_info;
 288         mpe->mpe_parent_busid = parent_busid;
 289         smp_add_mpe_entry(mc, (mpe_t)mpe);
 290 }
 291
 292 void smp_write_compatibility_address_space(struct mp_config_table *mc,
 293         unsigned char busid, unsigned char address_modifier,
 294         unsigned int range_list)
 295 {
 296         struct mp_exten_compatibility_address_space *mpe;
 297         mpe = smp_next_mpe_entry(mc);
 298         memset(mpe, '\0', sizeof(*mpe));
 299         mpe->mpe_type = MPE_COMPATIBILITY_ADDRESS_SPACE;
 300         mpe->mpe_length = sizeof(*mpe);
 301         mpe->mpe_busid = busid;
 302         mpe->mpe_address_modifier = address_modifier;
 303         mpe->mpe_range_list = range_list;
 304         smp_add_mpe_entry(mc, (mpe_t)mpe);
 305 }
 306