4 #include <device/device.h>
6 * Structure definitions for SMP machines following the
7 * Intel Multiprocessing Specification 1.1 and 1.4.
11 * This tag identifies where the SMP configuration
15 #define SMP_MAGIC_IDENT (('_'<<24)|('P'<<16)|('M'<<8)|'_')
18 * a maximum of 16 APICs with the current APIC ID architecture.
23 #define SMP_FLOATING_TABLE_LEN sizeof(struct intel_mp_floating)
25 struct intel_mp_floating
27 char mpf_signature[4]; /* "_MP_" */
28 unsigned long mpf_physptr; /* Configuration table address */
29 unsigned char mpf_length; /* Our length (paragraphs) */
30 unsigned char mpf_specification;/* Specification version */
31 unsigned char mpf_checksum; /* Checksum (makes sum 0) */
32 unsigned char mpf_feature1; /* Standard or configuration ? */
33 unsigned char mpf_feature2; /* Bit7 set for IMCR|PIC */
34 #define MP_FEATURE_VIRTUALWIRE (1 << 7)
35 #define MP_FEATURE_PIC (0 << 7)
36 unsigned char mpf_feature3; /* Unused (0) */
37 unsigned char mpf_feature4; /* Unused (0) */
38 unsigned char mpf_feature5; /* Unused (0) */
39 } __attribute__((packed));
41 struct mp_config_table
43 char mpc_signature[4];
44 #define MPC_SIGNATURE "PCMP"
45 unsigned short mpc_length; /* Size of table */
46 char mpc_spec; /* 0x01 */
49 char mpc_productid[12];
50 unsigned long mpc_oemptr; /* 0 if not present */
51 unsigned short mpc_oemsize; /* 0 if not present */
52 unsigned short mpc_entry_count;
53 unsigned long mpc_lapic; /* APIC address */
54 unsigned short mpe_length; /* Extended Table size */
55 unsigned char mpe_checksum; /* Extended Table checksum */
56 unsigned char reserved;
57 } __attribute__((packed));
59 /* Followed by entries */
61 #define MP_PROCESSOR 0
67 struct mpc_config_processor
69 unsigned char mpc_type;
70 unsigned char mpc_apicid; /* Local APIC number */
71 unsigned char mpc_apicver; /* Its versions */
72 unsigned char mpc_cpuflag;
73 #define MPC_CPU_ENABLED 1 /* Processor is available */
74 #define MPC_CPU_BOOTPROCESSOR 2 /* Processor is the BP */
75 unsigned long mpc_cpufeature;
76 #define MPC_CPU_STEPPING_MASK 0x0F
77 #define MPC_CPU_MODEL_MASK 0xF0
78 #define MPC_CPU_FAMILY_MASK 0xF00
79 unsigned long mpc_featureflag; /* CPUID feature value */
80 unsigned long mpc_reserved[2];
81 } __attribute__((packed));
85 unsigned char mpc_type;
86 unsigned char mpc_busid;
87 unsigned char mpc_bustype[6];
88 } __attribute__((packed));
90 #define BUSTYPE_EISA "EISA"
91 #define BUSTYPE_ISA "ISA"
92 #define BUSTYPE_INTERN "INTERN" /* Internal BUS */
93 #define BUSTYPE_MCA "MCA"
94 #define BUSTYPE_VL "VL" /* Local bus */
95 #define BUSTYPE_PCI "PCI"
96 #define BUSTYPE_PCMCIA "PCMCIA"
98 struct mpc_config_ioapic
100 unsigned char mpc_type;
101 unsigned char mpc_apicid;
102 unsigned char mpc_apicver;
103 unsigned char mpc_flags;
104 #define MPC_APIC_USABLE 0x01
105 unsigned long mpc_apicaddr;
106 } __attribute__((packed));
108 struct mpc_config_intsrc
110 unsigned char mpc_type;
111 unsigned char mpc_irqtype;
112 unsigned short mpc_irqflag;
113 unsigned char mpc_srcbus;
114 unsigned char mpc_srcbusirq;
115 unsigned char mpc_dstapic;
116 unsigned char mpc_dstirq;
117 } __attribute__((packed));
119 enum mp_irq_source_types {
126 #define MP_IRQ_POLARITY_DEFAULT 0x0
127 #define MP_IRQ_POLARITY_HIGH 0x1
128 #define MP_IRQ_POLARITY_LOW 0x3
129 #define MP_IRQ_POLARITY_MASK 0x3
130 #define MP_IRQ_TRIGGER_DEFAULT 0x0
131 #define MP_IRQ_TRIGGER_EDGE 0x4
132 #define MP_IRQ_TRIGGER_LEVEL 0xc
133 #define MP_IRQ_TRIGGER_MASK 0xc
136 struct mpc_config_lintsrc
138 unsigned char mpc_type;
139 unsigned char mpc_irqtype;
140 unsigned short mpc_irqflag;
141 unsigned char mpc_srcbusid;
142 unsigned char mpc_srcbusirq;
143 unsigned char mpc_destapic;
144 #define MP_APIC_ALL 0xFF
145 unsigned char mpc_destapiclint;
146 } __attribute__((packed));
149 * Default configurations
151 * 1 2 CPU ISA 82489DX
152 * 2 2 CPU EISA 82489DX neither IRQ 0 timer nor IRQ 13 DMA chaining
153 * 3 2 CPU EISA 82489DX
154 * 4 2 CPU MCA 82489DX
160 #define MAX_IRQ_SOURCES 128
161 #define MAX_MP_BUSSES 32
169 /* Followed by entries */
171 #define MPE_SYSTEM_ADDRESS_SPACE 0x80
172 #define MPE_BUS_HIERARCHY 0x81
173 #define MPE_COMPATIBILITY_ADDRESS_SPACE 0x82
175 struct mp_exten_config {
176 unsigned char mpe_type;
177 unsigned char mpe_length;
178 } __attribute__((packed));
180 typedef struct mp_exten_config *mpe_t;
182 struct mp_exten_system_address_space {
183 unsigned char mpe_type;
184 unsigned char mpe_length;
185 unsigned char mpe_busid;
186 unsigned char mpe_address_type;
187 #define ADDRESS_TYPE_IO 0
188 #define ADDRESS_TYPE_MEM 1
189 #define ADDRESS_TYPE_PREFETCH 2
190 unsigned int mpe_address_base_low;
191 unsigned int mpe_address_base_high;
192 unsigned int mpe_address_length_low;
193 unsigned int mpe_address_length_high;
194 } __attribute__((packed));
196 struct mp_exten_bus_hierarchy {
197 unsigned char mpe_type;
198 unsigned char mpe_length;
199 unsigned char mpe_busid;
200 unsigned char mpe_bus_info;
201 #define BUS_SUBTRACTIVE_DECODE 1
202 unsigned char mpe_parent_busid;
203 unsigned char reserved[3];
204 } __attribute__((packed));
206 struct mp_exten_compatibility_address_space {
207 unsigned char mpe_type;
208 unsigned char mpe_length;
209 unsigned char mpe_busid;
210 unsigned char mpe_address_modifier;
211 #define ADDRESS_RANGE_SUBTRACT 1
212 #define ADDRESS_RANGE_ADD 0
213 unsigned int mpe_range_list;
214 #define RANGE_LIST_IO_ISA 0
220 #define RANGE_LIST_IO_VGA 1
230 } __attribute__((packed));
232 /* Default local apic addr */
233 #define LAPIC_ADDR 0xFEE00000
235 void *smp_next_mpc_entry(struct mp_config_table *mc);
236 void *smp_next_mpe_entry(struct mp_config_table *mc);
238 void smp_write_processor(struct mp_config_table *mc,
239 unsigned char apicid, unsigned char apicver,
240 unsigned char cpuflag, unsigned int cpufeature,
241 unsigned int featureflag);
242 void smp_write_processors(struct mp_config_table *mc);
243 void smp_write_bus(struct mp_config_table *mc,
244 unsigned char id, const char *bustype);
245 void smp_write_ioapic(struct mp_config_table *mc,
246 unsigned char id, unsigned char ver,
247 unsigned long apicaddr);
248 void smp_write_intsrc(struct mp_config_table *mc,
249 unsigned char irqtype, unsigned short irqflag,
250 unsigned char srcbus, unsigned char srcbusirq,
251 unsigned char dstapic, unsigned char dstirq);
252 void smp_write_intsrc_pci_bridge(struct mp_config_table *mc,
253 unsigned char irqtype, unsigned short irqflag,
255 unsigned char dstapic, unsigned char *dstirq);
256 void smp_write_lintsrc(struct mp_config_table *mc,
257 unsigned char irqtype, unsigned short irqflag,
258 unsigned char srcbusid, unsigned char srcbusirq,
259 unsigned char destapic, unsigned char destapiclint);
260 void smp_write_address_space(struct mp_config_table *mc,
261 unsigned char busid, unsigned char address_type,
262 unsigned int address_base_low, unsigned int address_base_high,
263 unsigned int address_length_low, unsigned int address_length_high);
264 void smp_write_bus_hierarchy(struct mp_config_table *mc,
265 unsigned char busid, unsigned char bus_info,
266 unsigned char parent_busid);
267 void smp_write_compatibility_address_space(struct mp_config_table *mc,
268 unsigned char busid, unsigned char address_modifier,
269 unsigned int range_list);
270 unsigned char smp_compute_checksum(void *v, int len);
271 void *smp_write_floating_table(unsigned long addr);
272 void *smp_write_floating_table_physaddr(unsigned long addr,
273 unsigned long mpf_physptr);
274 unsigned long write_smp_table(unsigned long addr);