1 #include <console/console.h>
3 #include <pc80/mc146818rtc.h>
4 #include <boot/coreboot_tables.h>
6 #if CONFIG_HAVE_OPTION_TABLE
7 #include <option_table.h>
10 /* control registers - Moto names
18 /**********************************************************************
20 **********************************************************************/
21 #define RTC_FREQ_SELECT RTC_REG_A
23 /* update-in-progress - set to "1" 244 microsecs before RTC goes off the bus,
24 * reset after update (may take 1.984ms @ 32768Hz RefClock) is complete,
25 * totalling to a max high interval of 2.228 ms.
28 # define RTC_DIV_CTL 0x70
29 /* divider control: refclock values 4.194 / 1.049 MHz / 32.768 kHz */
30 # define RTC_REF_CLCK_4MHZ 0x00
31 # define RTC_REF_CLCK_1MHZ 0x10
32 # define RTC_REF_CLCK_32KHZ 0x20
33 /* 2 values for divider stage reset, others for "testing purposes only" */
34 # define RTC_DIV_RESET1 0x60
35 # define RTC_DIV_RESET2 0x70
36 /* Periodic intr. / Square wave rate select. 0=none, 1=32.8kHz,... 15=2Hz */
37 # define RTC_RATE_SELECT 0x0F
38 # define RTC_RATE_NONE 0x00
39 # define RTC_RATE_32786HZ 0x01
40 # define RTC_RATE_16384HZ 0x02
41 # define RTC_RATE_8192HZ 0x03
42 # define RTC_RATE_4096HZ 0x04
43 # define RTC_RATE_2048HZ 0x05
44 # define RTC_RATE_1024HZ 0x06
45 # define RTC_RATE_512HZ 0x07
46 # define RTC_RATE_256HZ 0x08
47 # define RTC_RATE_128HZ 0x09
48 # define RTC_RATE_64HZ 0x0a
49 # define RTC_RATE_32HZ 0x0b
50 # define RTC_RATE_16HZ 0x0c
51 # define RTC_RATE_8HZ 0x0d
52 # define RTC_RATE_4HZ 0x0e
53 # define RTC_RATE_2HZ 0x0f
55 /**********************************************************************/
56 #define RTC_CONTROL RTC_REG_B
57 # define RTC_SET 0x80 /* disable updates for clock setting */
58 # define RTC_PIE 0x40 /* periodic interrupt enable */
59 # define RTC_AIE 0x20 /* alarm interrupt enable */
60 # define RTC_UIE 0x10 /* update-finished interrupt enable */
61 # define RTC_SQWE 0x08 /* enable square-wave output */
62 # define RTC_DM_BINARY 0x04 /* all time/date values are BCD if clear */
63 # define RTC_24H 0x02 /* 24 hour mode - else hours bit 7 means pm */
64 # define RTC_DST_EN 0x01 /* auto switch DST - works f. USA only */
66 /**********************************************************************/
67 #define RTC_INTR_FLAGS RTC_REG_C
68 /* caution - cleared by read */
69 # define RTC_IRQF 0x80 /* any of the following 3 is active */
74 /**********************************************************************/
75 #define RTC_VALID RTC_REG_D
76 # define RTC_VRT 0x80 /* valid RAM and time */
77 /**********************************************************************/
79 static inline unsigned char cmos_read(unsigned char addr)
86 outb(addr, RTC_BASE_PORT + offs + 0);
87 return inb(RTC_BASE_PORT + offs + 1);
90 static inline void cmos_write(unsigned char val, unsigned char addr)
97 outb(addr, RTC_BASE_PORT + offs + 0);
98 outb(val, RTC_BASE_PORT + offs + 1);
101 #if CONFIG_HAVE_OPTION_TABLE
102 static int rtc_checksum_valid(int range_start, int range_end, int cks_loc)
105 unsigned sum, old_sum;
107 for(i = range_start; i <= range_end; i++) {
110 sum = (~sum)&0x0ffff;
111 old_sum = ((cmos_read(cks_loc)<<8) | cmos_read(cks_loc+1))&0x0ffff;
112 return sum == old_sum;
115 static void rtc_set_checksum(int range_start, int range_end, int cks_loc)
120 for(i = range_start; i <= range_end; i++) {
123 sum = ~(sum & 0x0ffff);
124 cmos_write(((sum >> 8) & 0x0ff), cks_loc);
125 cmos_write(((sum >> 0) & 0x0ff), cks_loc+1);
130 #define RTC_CONTROL_DEFAULT (RTC_24H)
131 #define RTC_FREQ_SELECT_DEFAULT (RTC_REF_CLCK_32KHZ | RTC_RATE_1024HZ)
133 #if CONFIG_ARCH_ALPHA
134 #define RTC_CONTROL_DEFAULT (RTC_SQWE | RTC_24H)
135 #define RTC_FREQ_SELECT_DEFAULT (RTC_REF_CLCK_32KHZ | RTC_RATE_1024HZ)
139 void rtc_init(int invalid)
141 #if CONFIG_HAVE_OPTION_TABLE
143 int cmos_invalid, checksum_invalid;
146 printk(BIOS_DEBUG, "RTC Init\n");
148 #if CONFIG_HAVE_OPTION_TABLE
149 /* See if there has been a CMOS power problem. */
150 x = cmos_read(RTC_VALID);
151 cmos_invalid = !(x & RTC_VRT);
153 /* See if there is a CMOS checksum error */
154 checksum_invalid = !rtc_checksum_valid(PC_CKS_RANGE_START,
155 PC_CKS_RANGE_END,PC_CKS_LOC);
157 if (invalid || cmos_invalid || checksum_invalid) {
158 printk(BIOS_WARNING, "RTC:%s%s%s zeroing cmos\n",
159 invalid?" Clear requested":"",
160 cmos_invalid?" Power Problem":"",
161 checksum_invalid?" Checksum invalid":"");
166 for(i = 10; i < 48; i++) {
171 /* Now setup a default date of Sat 1 January 2000 */
172 cmos_write(0, 0x00); /* seconds */
173 cmos_write(0, 0x02); /* minutes */
174 cmos_write(1, 0x04); /* hours */
175 cmos_write(7, 0x06); /* day of week */
176 cmos_write(1, 0x07); /* day of month */
177 cmos_write(1, 0x08); /* month */
178 cmos_write(0, 0x09); /* year */
184 /* Setup the real time clock */
185 cmos_write(RTC_CONTROL_DEFAULT, RTC_CONTROL);
186 /* Setup the frequency it operates at */
187 cmos_write(RTC_FREQ_SELECT_DEFAULT, RTC_FREQ_SELECT);
189 #if CONFIG_HAVE_OPTION_TABLE
190 /* See if there is a LB CMOS checksum error */
191 checksum_invalid = !rtc_checksum_valid(LB_CKS_RANGE_START,
192 LB_CKS_RANGE_END,LB_CKS_LOC);
194 printk(BIOS_DEBUG, "Invalid CMOS LB checksum\n");
196 /* Make certain we have a valid checksum */
197 rtc_set_checksum(PC_CKS_RANGE_START,
198 PC_CKS_RANGE_END,PC_CKS_LOC);
201 /* Clear any pending interrupts */
202 (void) cmos_read(RTC_INTR_FLAGS);
206 #if CONFIG_USE_OPTION_TABLE == 1
207 /* This routine returns the value of the requested bits
208 input bit = bit count from the beginning of the cmos image
209 length = number of bits to include in the value
210 ret = a character pointer to where the value is to be returned
211 output the value placed in ret
212 returns 0 = successful, -1 = an error occurred
214 static int get_cmos_value(unsigned long bit, unsigned long length, void *vret)
217 unsigned long byte,byte_bit;
221 /* The table is checked when it is built to ensure all
224 byte=bit/8; /* find the byte where the data starts */
225 byte_bit=bit%8; /* find the bit in the byte where the data starts */
226 if(length<9) { /* one byte or less */
227 uchar = cmos_read(byte); /* load the byte */
228 uchar >>= byte_bit; /* shift the bits to byte align */
229 /* clear unspecified bits */
230 ret[0] = uchar & ((1 << length) -1);
232 else { /* more that one byte so transfer the whole bytes */
233 for(i=0;length;i++,length-=8,byte++) {
235 ret[i]=cmos_read(byte);
241 int get_option(void *dest, const char *name)
243 extern struct cmos_option_table option_table;
244 struct cmos_option_table *ct;
245 struct cmos_entries *ce;
249 /* Figure out how long name is */
250 namelen = strnlen(name, CMOS_MAX_NAME_LENGTH);
252 /* find the requested entry record */
254 ce=(struct cmos_entries*)((unsigned char *)ct + ct->header_length);
255 for(;ce->tag==LB_TAG_OPTION;
256 ce=(struct cmos_entries*)((unsigned char *)ce + ce->size)) {
257 if (memcmp(ce->name, name, namelen) == 0) {
263 printk(BIOS_DEBUG, "WARNING: No CMOS option '%s'.\n", name);
267 if(get_cmos_value(ce->bit, ce->length, dest))
269 if(!rtc_checksum_valid(LB_CKS_RANGE_START,
270 LB_CKS_RANGE_END,LB_CKS_LOC))
274 #endif /* CONFIG_USE_OPTION_TABLE */