Martin Perner [Sun, 19 Dec 2010 17:04:20 +0000 (18:04 +0100)]
[bench] vm: made loading of address correct
Stefan Rebernig [Sun, 19 Dec 2010 16:46:48 +0000 (17:46 +0100)]
modelsim lauffähig
Markus Hofstätter [Sun, 19 Dec 2010 16:22:55 +0000 (17:22 +0100)]
Added missing signals to sensitivity and extended writeback
Martin Perner [Sun, 19 Dec 2010 13:45:59 +0000 (14:45 +0100)]
[bench] vm: now working correct
1) forgot to increment stackpointer
2) used inputcounter and not inputaddress for load
Markus Hofstätter [Sun, 19 Dec 2010 10:36:42 +0000 (11:36 +0100)]
Boosted Add-Op
Stefan Rebernig [Sun, 19 Dec 2010 09:11:56 +0000 (10:11 +0100)]
version not running!
uart synthetisierbar, reg zw. exec und wb eingebaut, forward und jump funktioniert noch nicht!!!
Martin Perner [Sat, 18 Dec 2010 15:23:14 +0000 (16:23 +0100)]
[bench] vm: bug fix
forgot sign extension => upper 16bits weren't cleared
Bernhard Urban [Sat, 18 Dec 2010 12:12:42 +0000 (13:12 +0100)]
3a_asm: 'not'-fix (thx @ martin)
Manfred [Sat, 18 Dec 2010 11:40:46 +0000 (12:40 +0100)]
uart: sollte jetzt eigentlich alles gehen
Martin Perner [Sat, 18 Dec 2010 10:54:22 +0000 (11:54 +0100)]
[bench] vm: jump is with int8_t, not with uint8_t
Martin Perner [Sat, 18 Dec 2010 09:17:19 +0000 (10:17 +0100)]
[bench] bugfixes, more to come ...
Martin Perner [Sat, 18 Dec 2010 00:44:31 +0000 (01:44 +0100)]
[bench] vm: lut, inputdata, bug fixes
jump has still a bug, more bugs not know till know
but only tested till the first jump :P
Martin Perner [Fri, 17 Dec 2010 23:51:34 +0000 (00:51 +0100)]
[vm] wrong order of input + minibug
Martin Perner [Fri, 17 Dec 2010 23:48:39 +0000 (00:48 +0100)]
[sim] corrected address calc for branch, again
Martin Perner [Fri, 17 Dec 2010 23:48:23 +0000 (00:48 +0100)]
[disasm] output missmatched opcode
Stefan Rebernig [Fri, 17 Dec 2010 22:30:39 +0000 (23:30 +0100)]
7seg small changes
Bernhard Urban [Fri, 17 Dec 2010 21:48:44 +0000 (22:48 +0100)]
3a_asm: 'nicer' fix for ldil vs. ldilt fail
note that sign and highlow are swapped now...
Bernhard Urban [Fri, 17 Dec 2010 21:48:44 +0000 (22:48 +0100)]
Revert "3a_asm: ugly workaroud with ldil vs. ldilt"
This reverts commit
79de90a76b7822145fcc57f45afb83ac34225bbf.
Stefan Rebernig [Fri, 17 Dec 2010 21:47:04 +0000 (22:47 +0100)]
nochmal...
Stefan Rebernig [Fri, 17 Dec 2010 21:43:27 +0000 (22:43 +0100)]
instr mem durch case, fibonacci als programm, 7seg als extension geadded, resultat am 7seg ausgegeben,
fmax muss optimiert werden, evtl. reg vor ram und ext
Bernhard Urban [Fri, 17 Dec 2010 19:46:57 +0000 (20:46 +0100)]
[bench] vm.s asm's now
Bernhard Urban [Fri, 17 Dec 2010 19:35:21 +0000 (20:35 +0100)]
3a_asm: ugly workaroud with ldil vs. ldilt
workaround now. just don't use ldil, since "low" is default anyway. kkthxbye
Martin Perner [Fri, 17 Dec 2010 13:49:51 +0000 (14:49 +0100)]
[sim] bug + display
fixed bug in branch, jumps are not counting the instr. amount, not
the address difference
displaying of branch and add changed/fixed
Martin Perner [Fri, 17 Dec 2010 13:49:23 +0000 (14:49 +0100)]
[bench] fix bug in mul
Stefan REBERNIG [Fri, 17 Dec 2010 11:29:21 +0000 (12:29 +0100)]
writeback_stage: differenzieren zwischen memory und extension geht ( btw wer sich über die eigenaritgen commit messages wunder des is net der stefan sondern da mani der grad mit seim account arbeitet :D )
Stefan REBERNIG [Fri, 17 Dec 2010 09:35:39 +0000 (10:35 +0100)]
wb extension
Manfred [Fri, 17 Dec 2010 09:34:45 +0000 (10:34 +0100)]
uart: rxd drin
Martin Perner [Fri, 17 Dec 2010 09:30:17 +0000 (10:30 +0100)]
[bench] vm
everything implemented, nothing tested
Stefan REBERNIG [Fri, 17 Dec 2010 09:15:32 +0000 (10:15 +0100)]
uart: blinkt zwar nur am led aber des is schon net schlecht :D
Martin Perner [Thu, 16 Dec 2010 23:42:25 +0000 (00:42 +0100)]
[bench] vm
added input data
still doesn't compile => not tested
mul missing
Martin Perner [Thu, 16 Dec 2010 22:02:20 +0000 (23:02 +0100)]
[bench] vm
basic stuff added
Martin Perner [Sat, 13 Nov 2010 23:21:06 +0000 (00:21 +0100)]
sim: replace exit() by flag
which will lead to nearly none memleak
Bernhard Urban [Thu, 16 Dec 2010 17:51:41 +0000 (18:51 +0100)]
erster versuch das ganze mal zu flashen -> es blinkt!!111
Manfred [Thu, 16 Dec 2010 13:19:56 +0000 (14:19 +0100)]
uart : es sendet !!!!
Manfred [Tue, 14 Dec 2010 12:34:23 +0000 (13:34 +0100)]
uart:uart entitiy
Stefan Rebernig [Tue, 14 Dec 2010 11:56:06 +0000 (12:56 +0100)]
fmax incr
Stefan Rebernig [Sat, 11 Dec 2010 16:33:03 +0000 (17:33 +0100)]
added todo-vhdl.txt
Stefan Rebernig [Sat, 11 Dec 2010 16:11:12 +0000 (17:11 +0100)]
fibonacci die 2.
Stefan Rebernig [Sat, 11 Dec 2010 15:55:45 +0000 (16:55 +0100)]
fibonacci tested rc1, 107 cycles, 1k2le, 57MHz
Stefan Rebernig [Sat, 11 Dec 2010 14:33:56 +0000 (15:33 +0100)]
fib 1
Markus Hofstätter [Sat, 11 Dec 2010 14:31:34 +0000 (15:31 +0100)]
bugfix ld
Stefan Rebernig [Sat, 11 Dec 2010 12:54:19 +0000 (13:54 +0100)]
fib
Bernhard Urban [Sat, 11 Dec 2010 12:32:04 +0000 (13:32 +0100)]
3a_asm: use '-b' for binary representation
Bernhard Urban [Sat, 11 Dec 2010 12:32:04 +0000 (13:32 +0100)]
3a_asm: divide the computed address with four at br and call
Stefan Rebernig [Sat, 11 Dec 2010 11:38:54 +0000 (12:38 +0100)]
call/return
Stefan Rebernig [Sat, 11 Dec 2010 11:23:13 +0000 (12:23 +0100)]
return - erster versuch
Markus Hofstätter [Sat, 11 Dec 2010 11:22:47 +0000 (12:22 +0100)]
return added
Markus Hofstätter [Sat, 11 Dec 2010 10:47:05 +0000 (11:47 +0100)]
another typo
Markus Hofstätter [Sat, 11 Dec 2010 10:37:22 +0000 (11:37 +0100)]
typos
Markus Hofstätter [Sat, 11 Dec 2010 10:29:45 +0000 (11:29 +0100)]
next step: call
Stefan Rebernig [Sat, 11 Dec 2010 10:29:12 +0000 (11:29 +0100)]
decoder for st-op
U-Thor\Schakal [Sat, 11 Dec 2010 09:34:05 +0000 (10:34 +0100)]
bugfix: sp operation first approach.
U-Thor\Schakal [Fri, 3 Dec 2010 12:56:16 +0000 (13:56 +0100)]
modified: interfaces according to SP operation
Markus Hofstätter [Thu, 2 Dec 2010 16:11:09 +0000 (17:11 +0100)]
modified: first approach to pointers. not finished, alu missing etc.
Stefan Rebernig [Thu, 2 Dec 2010 13:29:02 +0000 (14:29 +0100)]
static branch - small bug fix
Stefan Rebernig [Wed, 1 Dec 2010 22:23:56 +0000 (23:23 +0100)]
static branch - getestet, 58MHz lt quartus
Stefan Rebernig [Wed, 1 Dec 2010 19:38:48 +0000 (20:38 +0100)]
static branch incl prediction rc1
Stefan Rebernig [Wed, 1 Dec 2010 15:14:50 +0000 (16:14 +0100)]
static branch 1.0
Markus Hofstätter [Wed, 1 Dec 2010 15:14:16 +0000 (16:14 +0100)]
added: alu jumps
Manfred [Wed, 1 Dec 2010 14:12:49 +0000 (15:12 +0100)]
write_back: mini fix
Manfred [Wed, 1 Dec 2010 14:04:39 +0000 (15:04 +0100)]
extension : gpm extension
Manfred [Wed, 1 Dec 2010 10:09:16 +0000 (11:09 +0100)]
extension: jetzt gibts des file auch :D
Manfred [Wed, 1 Dec 2010 10:05:03 +0000 (11:05 +0100)]
extension: comment added to isa
Manfred [Tue, 30 Nov 2010 22:34:36 +0000 (23:34 +0100)]
extension: instanziert in tb und toplvlentity sowie in den vsim dofiles
Manfred [Tue, 30 Nov 2010 21:43:05 +0000 (22:43 +0100)]
extension : entity fix
Manfred [Tue, 30 Nov 2010 21:37:58 +0000 (22:37 +0100)]
extension: entity + splitter zur adressierung
Markus Hofstätter [Tue, 30 Nov 2010 14:09:04 +0000 (15:09 +0100)]
alu: return to previous
Markus Hofstätter [Mon, 29 Nov 2010 15:35:36 +0000 (16:35 +0100)]
stw alu bugfix
Markus Hofstätter [Mon, 29 Nov 2010 14:48:35 +0000 (15:48 +0100)]
stw alu
Stefan Rebernig [Mon, 29 Nov 2010 14:42:08 +0000 (15:42 +0100)]
stw.2
Stefan Rebernig [Mon, 29 Nov 2010 14:32:53 +0000 (15:32 +0100)]
st
Markus Hofstätter [Mon, 29 Nov 2010 13:58:15 +0000 (14:58 +0100)]
ldi add finished
Markus Hofstätter [Mon, 29 Nov 2010 13:49:15 +0000 (14:49 +0100)]
added: alu ldi
Stefan Rebernig [Mon, 29 Nov 2010 13:48:41 +0000 (14:48 +0100)]
decoder add ldi
Markus Hofstätter [Mon, 29 Nov 2010 13:39:58 +0000 (14:39 +0100)]
Added: LDST_OP
Stefan Rebernig [Fri, 26 Nov 2010 13:42:05 +0000 (14:42 +0100)]
forward unit testcases (from assignments), everything works fine!
Manfred [Thu, 18 Nov 2010 11:14:28 +0000 (12:14 +0100)]
5 abgabe finish
Manfred [Thu, 18 Nov 2010 10:52:07 +0000 (11:52 +0100)]
blabla
Manfred [Thu, 18 Nov 2010 10:10:41 +0000 (11:10 +0100)]
new testbench
Stefan Rebernig [Wed, 17 Nov 2010 10:14:44 +0000 (11:14 +0100)]
kleine Änderungen
Stefan Rebernig [Tue, 16 Nov 2010 13:26:01 +0000 (14:26 +0100)]
kleinigkeit ausgebessert
Stefan Rebernig [Tue, 16 Nov 2010 12:29:06 +0000 (13:29 +0100)]
2nd forward unit - 58MHz with 31bit shift...
Stefan Rebernig [Tue, 16 Nov 2010 07:31:53 +0000 (08:31 +0100)]
nop insertion added
Stefan Rebernig [Mon, 15 Nov 2010 19:28:45 +0000 (20:28 +0100)]
pipeline erste version mit 31bit shifter (kostet 7MHz und viele LEs)
Stefan Rebernig [Mon, 15 Nov 2010 18:55:31 +0000 (19:55 +0100)]
test pipe 2
Stefan Rebernig [Mon, 15 Nov 2010 17:32:14 +0000 (18:32 +0100)]
pipe v1
Markus Hofstätter [Mon, 15 Nov 2010 16:58:40 +0000 (17:58 +0100)]
Fixed some bugs.
Markus Hofstätter [Mon, 15 Nov 2010 15:38:38 +0000 (16:38 +0100)]
gpm module and exec first buggy version.
Stefan Rebernig [Mon, 15 Nov 2010 15:37:15 +0000 (16:37 +0100)]
blub
Stefan Rebernig [Mon, 15 Nov 2010 15:24:23 +0000 (16:24 +0100)]
writeback stage
Markus Hofstätter [Mon, 15 Nov 2010 13:09:35 +0000 (14:09 +0100)]
Merge branch 'master' of wien.tomnetworks.com:calu
Conflicts:
cpu/src/exec_op/shift_op_b.vhd
Stefan [Mon, 15 Nov 2010 12:53:30 +0000 (13:53 +0100)]
displacement
Markus HOFSTAETTER [Mon, 15 Nov 2010 12:49:35 +0000 (13:49 +0100)]
exec impl.
Stefan [Mon, 15 Nov 2010 12:17:09 +0000 (13:17 +0100)]
added pipe 2 reg, testbench, top_level_entity, ...
Stefan [Mon, 15 Nov 2010 10:37:06 +0000 (11:37 +0100)]
pipe2
Markus Hofstätter [Sun, 14 Nov 2010 14:14:20 +0000 (15:14 +0100)]
Seperation to differen execute operations.
Stefan [Sun, 14 Nov 2010 16:17:47 +0000 (17:17 +0100)]
quartus tcl script für meinen cyclone II, top level entity für fetch und decode
Stefan [Sun, 14 Nov 2010 15:26:08 +0000 (16:26 +0100)]
gitignore für sim
Stefan [Sun, 14 Nov 2010 15:15:30 +0000 (16:15 +0100)]
do file for testbench - a few test instructions added to instruction mem
Stefan [Sun, 14 Nov 2010 14:10:43 +0000 (15:10 +0100)]
fetch und decode kompilierbar, generelle tb, änderung in pkgs, eigene decoder entity