[bench] fix bug in mul

diff --git a/8_benchs/src/vm.s b/8_benchs/src/vm.s
index 3570bee6755d5a45d8678bd2b35c47a8eb55507c..1b30daf3622970bc3f9e72e81b00ee6095c8ded0 100644 (file)
--- a/8_benchs/src/vm.s
+++ b/8_benchs/src/vm.s
@@ -113,29 +113,27 @@ vm_mul:
 
        ;return init
        ldis r8, 0  
-       ;counter init
-       ldis r9, 0
        ;save of sp-1
        mov r7, r0
        ;check if sp-1 is even or odd
        andx r0, 1
        ;add sp to result
        adddnz r8, r8, r6
-       ;store sp-1 in r0 
-       addidnz r0, r7, 0
        ;if odd decrement sp-1
        subinz r7, r7, 1
+       ;just to get zero flag unset
+       addizs r7, r7, 0
 loop:
        ;if last was not zero
-       ;add to sp sp-1
-       adddnz r6, r6, r0
-       adddnz r6, r6, r0
+       ;add to sp-1 to result
+       adddnz r8, r8, r6
+       adddnz r8, r8, r6
        ;decrement sp-1 by 2
-       subinz r7, r7, 2
+       subi r7, r7, 2
        ;jump if not zero
        brnz+ loop
        ;save result
-       stw r6, 0-4(r3)
+       stw r8, 0-4(r3)
        br+ vm_loop
 
 ;case +