kleine Änderungen

diff --git a/cpu/src/alu_pkg.vhd b/cpu/src/alu_pkg.vhd
index 13285d9eb3e461f2463018c83a39a030f6ff986d..16a175cf9470f4f958de5311c5e4dc0af5fca25b 100755 (executable)
--- a/cpu/src/alu_pkg.vhd
+++ b/cpu/src/alu_pkg.vhd
@@ -42,7 +42,7 @@ package alu_pkg is
                
        end record alu_result_rec;
        
-       constant SHIFT_WIDTH : integer := 4; --log2c(gp_register_t'length);
+       constant SHIFT_WIDTH : integer := 1; --log2c(gp_register_t'length);
        
        constant COND_ZERO : condition_t := "0001";
        constant COND_NZERO : condition_t := "0000";

diff --git a/cpu/src/core_top.vhd b/cpu/src/core_top.vhd
index 8892f758df4bf27b9627c3b61049770f6af59cbe..58a2377856a52be7d5d68c1ca11ea2a69fbfc1dd 100644 (file)
--- a/cpu/src/core_top.vhd
+++ b/cpu/src/core_top.vhd
@@ -11,7 +11,9 @@ entity core_top is
                --System input pins
                        sys_clk : in std_logic;
                        sys_res : in std_logic;
-                       result : out gp_register_t
+                       result : out gp_register_t;
+                       jump_result : out instruction_addr_t;
+                       reg_wr_data : out gp_register_t
                        
                );
 
@@ -123,4 +125,7 @@ begin
        result <= result_pin;
        nop_pin <= (alu_jump_bit_pin xor brpr_pin);
 
+       jump_result <= jump_result_pin;
+
+       reg_wr_data <= reg_wr_data_pin;
 end behav;

diff --git a/cpu/src/decode_stage_b.vhd b/cpu/src/decode_stage_b.vhd
index 7d42e8fdf9f56a829512f8072e8e163d331bdcad..14846b227dc9cf202181500064fa0dc3c5049968 100644 (file)
--- a/cpu/src/decode_stage_b.vhd
+++ b/cpu/src/decode_stage_b.vhd
@@ -164,7 +164,7 @@ begin
                rtw_rec_nxt.rtw_reg1 <= ('1' and reg_we);
        end if;
 
-       if (reg_w_addr = instr_spl.reg_src1_addr) then
+       if (reg_w_addr = instr_spl.reg_src2_addr) then
                rtw_rec_nxt.rtw_reg2 <= ('1' and reg_we);
        end if;
 

diff --git a/cpu/src/execute_stage_b.vhd b/cpu/src/execute_stage_b.vhd
index 4d69cee026749452d225597e6c1d981d33d5934f..73c7bf27e638d8cc0a063306cf22117f82f80d5f 100644 (file)
--- a/cpu/src/execute_stage_b.vhd
+++ b/cpu/src/execute_stage_b.vhd
@@ -77,7 +77,7 @@ begin
 
 end process asyn;
 
-forward: process(regfile_val, reg_we, reg_addr, dec_instr.src1,dec_instr.src2)
+forward: process(regfile_val, reg_we, reg_addr, dec_instr)
 begin
        left_operand <= dec_instr.src1;
         right_operand <= dec_instr.src2;
@@ -98,9 +98,13 @@ alu_jump <= reg.alu_jump;
 brpr <= reg.brpr;
 wr_en <= reg.wr_en;
 dmem <= alu_nxt.mem_op;
+--dmem <= reg.result(4);
 dmem_write_en <= alu_nxt.mem_en;
+--dmem_write_en <= reg.result(0);
+--dmem_write_en <= '1';
 hword <= alu_nxt.hw_op;
+--hword <= reg.result(1);
 byte_s <= alu_nxt.byte_op;
-
+--byte_s <= reg.result(2);
 end behav;
 

diff --git a/cpu/src/writeback_stage_b.vhd b/cpu/src/writeback_stage_b.vhd
index d432cbdeb00ec161da6bf1cc821d12e504dec274..196af9c5af85f0908ab8695db119737a8374aca9 100644 (file)
--- a/cpu/src/writeback_stage_b.vhd
+++ b/cpu/src/writeback_stage_b.vhd
@@ -111,7 +111,7 @@ end process;
 
 
 
-out_logic: process(write_en, result_addr)
+out_logic: process(write_en, result_addr, wb_reg, alu_jmp)
 
 begin  
        reg_we <= (write_en or (wb_reg.dmem_en and not(wb_reg.dmem_write_en))) and not(alu_jmp);