st

diff --git a/cpu/src/common_pkg.vhd b/cpu/src/common_pkg.vhd
index ba8d1a63da30d2cf79c14ca77f82a5afd39608b1..8d3ac51d545c5283e9d5a6c935c21785f3f67d92 100755 (executable)
--- a/cpu/src/common_pkg.vhd
+++ b/cpu/src/common_pkg.vhd
@@ -74,6 +74,8 @@ package common_pkg is
 
                immediate : std_logic_vector(WORD_WIDTH-1 downto 0);
 
+               displacement : gp_register_t;
+
                jmptype : std_logic_vector(1 downto 0);
 
                high_low, fill, signext, bp: std_logic;
@@ -101,6 +103,8 @@ package common_pkg is
                op_group : op_info_t;
                op_detail : op_opt_t;
                brpr : std_logic;
+
+               displacement : gp_register_t;
                
                src1 : gp_register_t;
                src2 : gp_register_t;

diff --git a/cpu/src/decode_stage_b.vhd b/cpu/src/decode_stage_b.vhd
index de4b162427b4b21122656830fb60b70644651a45..92c0f7186d645f4b47b6a9f929fe3f2482f663b7 100644 (file)
--- a/cpu/src/decode_stage_b.vhd
+++ b/cpu/src/decode_stage_b.vhd
@@ -66,7 +66,7 @@ begin
                dec_op_inst.saddr1 <= (others => '0');
                dec_op_inst.saddr2 <= (others => '0');
                dec_op_inst.daddr <= (others => '0');
-
+               dec_op_inst.displacement <= (others => '0');
 
        elsif rising_edge(clk) then
                rtw_rec <= rtw_rec_nxt;
@@ -116,6 +116,7 @@ begin
        dec_op_inst_nxt.saddr2 <= instr_spl.reg_src2_addr;
        dec_op_inst_nxt.daddr <= instr_spl.reg_dest_addr; --(others => '0');
        dec_op_inst_nxt.op_group <= instr_spl.op_group;
+       dec_op_inst_nxt.displacement <= instr_spl.displacement;
 
 end process;
 

diff --git a/cpu/src/decoder_b.vhd b/cpu/src/decoder_b.vhd
index d1b49c1da4a6e5d4ad6a28ae0aee51b4d2be2b01..11d2e3b66738ad001c7ebe4d9dba8b9be0f2113d 100644 (file)
--- a/cpu/src/decoder_b.vhd
+++ b/cpu/src/decoder_b.vhd
@@ -31,6 +31,7 @@ begin
        instr_s.signext := '0';
        instr_s.bp := '0';
        instr_s.op_detail := (others => '0');
+       instr_s.displacement := (others => '0');
 
        instr_s.op_group := ADDSUB_OP;
 
@@ -259,9 +260,9 @@ begin
        if (instr_s.opcode = "01111" or instr_s.opcode = "10001" or instr_s.opcode = "10011" or instr_s.opcode = "10101") then
 
        --when "01111" =>               --stw
-               instr_s.reg_src1_addr := instruction(22 downto 19);     -- register value
-               instr_s.reg_src2_addr := instruction(18 downto 15);     -- mem addr
-               instr_s.immediate(14 downto 0) := instruction(14 downto 0);
+               instr_s.reg_src2_addr := instruction(22 downto 19);     -- register value
+               instr_s.reg_src1_addr := instruction(18 downto 15);     -- mem addr
+               instr_s.displacement(14 downto 0) := instruction(14 downto 0);
        end if;
 
 --     when "10001" =>         --sth