extension: instanziert in tb und toplvlentity sowie in den vsim dofiles

diff --git a/cpu/sim/testcore.do b/cpu/sim/testcore.do
index e16bb857b6dd0b3fa991a52f341b8955ea6bee79..4113490be0ad99a26722e484cb5822f3894fc5b9 100644 (file)
--- a/cpu/sim/testcore.do
+++ b/cpu/sim/testcore.do
@@ -32,6 +32,10 @@ vcom -work work ../src/alu_b.vhd
 vcom -work work ../src/gpm.vhd
 vcom -work work ../src/gpm_b.vhd
 
+vcom -work work ../src/extension_pkg.vhd
+vcom -work work ../src/extension.vhd
+vcom -work work ../src/extension_b.vhd
+
 vcom -work work ../src/execute_stage.vhd
 vcom -work work ../src/execute_stage_b.vhd
 

diff --git a/cpu/sim/testcore1.do b/cpu/sim/testcore1.do
index e32ebbce95c5779c7b93f2021ac2a35979f3e362..c9d6b2b90671cbf7db52c38303eaaa61e903195b 100644 (file)
--- a/cpu/sim/testcore1.do
+++ b/cpu/sim/testcore1.do
@@ -32,6 +32,10 @@ vcom -work work ../src/alu_b.vhd
 vcom -work work ../src/gpm.vhd
 vcom -work work ../src/gpm_b.vhd
 
+vcom -work work ../src/extension_pkg.vhd
+vcom -work work ../src/extension.vhd
+vcom -work work ../src/extension_b.vhd
+
 vcom -work work ../src/execute_stage.vhd
 vcom -work work ../src/execute_stage_b.vhd
 
@@ -107,4 +111,6 @@ add wave  -group writebackstageregister -radix hexadecimal /pipeline_tb/writebac
 add wave  -group writebackstageregister -radix hexadecimal /pipeline_tb/writeback_st/reg_addr
 add wave  -group writebackstageregister -radix hexadecimal /pipeline_tb/writeback_st/regfile_val
 
+
+
 run 5000 ns

diff --git a/cpu/src/core_top.vhd b/cpu/src/core_top.vhd
index 58a2377856a52be7d5d68c1ca11ea2a69fbfc1dd..80a87b5afd8aa74fe295bf7dc561654a0a4876f3 100644 (file)
--- a/cpu/src/core_top.vhd
+++ b/cpu/src/core_top.vhd
@@ -47,6 +47,12 @@ architecture behav of core_top is
                  signal hword_pin  : std_logic;
                  signal byte_s_pin : std_logic;
                 signal nop_pin : std_logic;
+               -- extension signals
+               signal ext_gpmp :  extmod_rec;
+               signal pointer : pointer_count;
+               signal dec_in,p_en : std_logic;
+               signal data_out    : gp_register_t;
+               signal pointer_val : gp_register_t;
 
 
 begin
@@ -110,6 +116,21 @@ begin
                 wr_en_pin, dmem_pin, dmem_wr_en_pin, hword_pin, byte_s_pin,
                 reg_wr_data_pin, reg_we_pin, reg_w_addr_pin, jump_result_pin, alu_jump_bit_pin);
 
+
+       gpmp_inst :  extension
+               generic map ('0')
+               port map (
+                       sys_clk,
+                       sys_reset,
+                       ext_gpmp,
+                       pointer,
+                       dec_in,
+                       p_en,
+                       data_out,
+                       pointer_val
+                       
+               );
+
                
 --init : process(all)
 

diff --git a/cpu/src/execute_stage_b.vhd b/cpu/src/execute_stage_b.vhd
index 550c1e9683bb1fec35bcbcadf33c371b22edd37e..16e1334db418114648fba4ef68393af8ad447ee7 100644 (file)
--- a/cpu/src/execute_stage_b.vhd
+++ b/cpu/src/execute_stage_b.vhd
@@ -5,6 +5,7 @@ use IEEE.numeric_std.all;
 use work.common_pkg.all;
 use work.alu_pkg.all;
 use work.gpm_pkg.all;
+use work.extension_pkg.all;
 
 architecture behav of execute_stage is
 
@@ -15,6 +16,7 @@ signal left_operand, right_operand : gp_register_t;
 signal alu_state, alu_nxt : alu_result_rec;
 signal psw : status_rec;
 
+
 type exec_internal is record
         result : gp_register_t;
         res_addr : gp_addr_t;
@@ -35,6 +37,10 @@ gpm_inst : gpm
         generic map(RESET_VALUE)
         port map(clk,reset,alu_nxt,psw);
 
+
+
+
+
 syn: process(clk, reset)
 
 begin

diff --git a/cpu/src/extension.vhd b/cpu/src/extension.vhd
index 94094095dbc87b0f6bc14423226a20f7d78c6e49..a5e7a49f53b0b80f7f8590e2f69b2341d2e2c0f8 100644 (file)
--- a/cpu/src/extension.vhd
+++ b/cpu/src/extension.vhd
@@ -9,7 +9,7 @@ entity extension is
 
        generic (
                        -- active reset value
-                       RESET_VALUE : std_logic;
+                       RESET_VALUE : std_logic
                        );
        port(
                --System inputs

diff --git a/cpu/src/extension_pkg.vhd b/cpu/src/extension_pkg.vhd
index af6ae700ea1a55aa1bbae402937b29bb01b40377..cf50bafd69ba21ad1f8447432ac43d2d7a7f67e3 100644 (file)
--- a/cpu/src/extension_pkg.vhd
+++ b/cpu/src/extension_pkg.vhd
@@ -33,9 +33,29 @@ constant EXT_EXTMEM_ADDR: ext_addrid_t := x"FFFFFFB";
 constant EXT_TIMER_ADDR:  ext_addrid_t := x"FFFFFFC";
 constant EXT_AC97_ADDR:   ext_addrid_t := x"FFFFFFD";
 constant EXT_UART_ADDR:   ext_addrid_t := x"FFFFFFE";
-constant EXT_GPM_ADDR:    ext_addrid_t := x"FFFFFFF";
-
-
+constant EXT_GPMP_ADDR:    ext_addrid_t := x"FFFFFFF";
+
+ component extension is
+        --some modules won't need all inputs/outputs
+       generic (
+                       -- active reset value
+                       RESET_VALUE : std_logic
+                       );
+       port(
+               --System inputs
+                       clk :   in std_logic;
+                       reset : in std_logic;
+               -- Input
+                       ext_reg : in extmod_rec;
+                       pointer : in pointer_count;
+                       dec_inc : in std_logic;
+                       p_en    : in std_logic;
+               -- Ouput
+                       data_out    : out gp_register_t;
+                       pointer_val : out gp_register_t
+                       
+               );
+ end component extension;
 
 
 

diff --git a/cpu/src/pipeline_tb.vhd b/cpu/src/pipeline_tb.vhd
index d51196b00deb2a3869dd20630babf00b6a31b700..ff8fd608d31130bcc5c5301772251fbcb39c9651 100644 (file)
--- a/cpu/src/pipeline_tb.vhd
+++ b/cpu/src/pipeline_tb.vhd
@@ -4,6 +4,7 @@ use IEEE.numeric_std.all;
 
 use work.common_pkg.all;
 use work.core_pkg.all;
+use work.extension_pkg.all;
 -------------------------------------------------------------------------------
 -- ENTITY
 -------------------------------------------------------------------------------
@@ -48,6 +49,12 @@ architecture behavior of pipeline_tb is
                  signal hword_pin  : std_logic;
                  signal byte_s_pin : std_logic;
                 signal nop_pin : std_logic;
+               -- extension signals
+               signal ext_gpmp :  extmod_rec;
+               signal pointer : pointer_count;
+               signal dec_in,p_en : std_logic;
+               signal data_out    : gp_register_t;
+               signal pointer_val : gp_register_t;
 
 begin
 
@@ -126,6 +133,22 @@ begin
                 reg_wr_data_pin, reg_we_pin, reg_w_addr_pin, jump_result_pin, alu_jump_bit_pin);
 
 
+       gpmp_inst :  extension
+               generic map ('0')
+               port map (
+                       sys_clk_pin,
+                       sys_res_n_pin,
+                       ext_gpmp,
+                       pointer,
+                       dec_in,
+                       p_en,
+                       data_out,
+                       pointer_val
+                       
+               );
+
+
+
        nop_pin <= (alu_jump_bit_pin xor brpr_pin);
 
 -------------------------------------------------------------------------------

diff --git a/cpu/src/writeback_stage_b.vhd b/cpu/src/writeback_stage_b.vhd
index 950681389babc814d256fad2e5b9874bb865b6c9..91373df7d55f1d4e9b0c14e90babc7c6db80b7bc 100644 (file)
--- a/cpu/src/writeback_stage_b.vhd
+++ b/cpu/src/writeback_stage_b.vhd
@@ -13,7 +13,8 @@ architecture behav of writeback_stage is
 signal data_ram_read : word_t;
 
 signal wb_reg, wb_reg_nxt : writeback_rec;
-signal ext_uart,ext_timer,ext_gpm :  extmod_rec;
+
+signal ext_uart,ext_timer,ext_gpmp :  extmod_rec;
 
 
 
@@ -35,7 +36,7 @@ begin
                        data_ram_read
                );
 
-
+       
 syn: process(clk, reset)
 
 begin
@@ -157,16 +158,16 @@ begin
                                when "11" => ext_timer.byte_en <= "1000";
                                when others => null;
                        end case;
-       when EXT_GPM_ADDR => 
-               ext_gpm.sel <='1';
-               ext_gpm.wr_en <= wb_reg_nxt.dmem_write_en;
-               ext_gpm.data <= ram_data;
-               ext_gpm.addr <= wb_reg_nxt.address(wb_reg_nxt.address'high downto BYTEADDR);
+       when EXT_GPMP_ADDR => 
+               ext_gpmp.sel <='1';
+               ext_gpmp.wr_en <= wb_reg_nxt.dmem_write_en;
+               ext_gpmp.data <= ram_data;
+               ext_gpmp.addr <= wb_reg_nxt.address(wb_reg_nxt.address'high downto BYTEADDR);
                case wb_reg.address(1 downto 0) is
-                               when "00" => ext_gpm.byte_en <= "0001";
-                               when "01" => ext_gpm.byte_en <= "0010";
-                               when "10" => ext_gpm.byte_en <= "0100";
-                               when "11" => ext_gpm.byte_en <= "1000";
+                               when "00" => ext_gpmp.byte_en <= "0001";
+                               when "01" => ext_gpmp.byte_en <= "0010";
+                               when "10" => ext_gpmp.byte_en <= "0100";
+                               when "11" => ext_gpmp.byte_en <= "1000";
                                when others => null;
                        end case;
        -- hier kann man weiter extensions adden :) Konstanten sind im extension pkg definiert