extension : gpm extension

diff --git a/cpu/sim/testcore.do b/cpu/sim/testcore.do
index 4113490be0ad99a26722e484cb5822f3894fc5b9..b79d4c3a578cf875150803362fb02c7810fa7119 100644 (file)
--- a/cpu/sim/testcore.do
+++ b/cpu/sim/testcore.do
@@ -65,6 +65,6 @@ add wave  -radix hexadecimal /pipeline_tb/decode_st/reg_w_addr
 add wave  -radix hexadecimal /pipeline_tb/decode_st/reg_wr_data
 add wave  -radix hexadecimal /pipeline_tb/decode_st/reg_we
 
-add wave  -radix hexadecimal /pipeline_tb/exec_st/gpm_inst/psw
+add wave  -radix hexadecimal /pipeline_tb/exec_st/gpmp_inst/psw
 
 run 5000 ns

diff --git a/cpu/sim/testcore1.do b/cpu/sim/testcore1.do
index c9d6b2b90671cbf7db52c38303eaaa61e903195b..def1de97dd2015ea9cb9843d8a044cefc49b820a 100644 (file)
--- a/cpu/sim/testcore1.do
+++ b/cpu/sim/testcore1.do
@@ -98,7 +98,7 @@ add wave  -group execstage -radix hexadecimal /pipeline_tb/exec_st/alu_inst/righ
 add wave  -group execstage -radix hexadecimal /pipeline_tb/exec_st/reg_nxt
 
 
-add wave  -group execstageregister -radix hexadecimal /pipeline_tb/exec_st/gpm_inst/psw
+add wave  -group execstageregister -radix hexadecimal /pipeline_tb/exec_st/gpmp_inst/psw
 add wave  -group execstageregister -radix hexadecimal /pipeline_tb/exec_st/reg
 add wave  -group writebackstage -radix hexadecimal /pipeline_tb/writeback_st/result
 add wave  -group writebackstage -radix hexadecimal /pipeline_tb/writeback_st/result_addr

diff --git a/cpu/src/core_top.vhd b/cpu/src/core_top.vhd
index 80a87b5afd8aa74fe295bf7dc561654a0a4876f3..f0e1a4ac069af9971e4b8ece779b6571ca698170 100644 (file)
--- a/cpu/src/core_top.vhd
+++ b/cpu/src/core_top.vhd
@@ -47,12 +47,7 @@ architecture behav of core_top is
                  signal hword_pin  : std_logic;
                  signal byte_s_pin : std_logic;
                 signal nop_pin : std_logic;
-               -- extension signals
-               signal ext_gpmp :  extmod_rec;
-               signal pointer : pointer_count;
-               signal dec_in,p_en : std_logic;
-               signal data_out    : gp_register_t;
-               signal pointer_val : gp_register_t;
+
 
 
 begin
@@ -117,19 +112,7 @@ begin
                 reg_wr_data_pin, reg_we_pin, reg_w_addr_pin, jump_result_pin, alu_jump_bit_pin);
 
 
-       gpmp_inst :  extension
-               generic map ('0')
-               port map (
-                       sys_clk,
-                       sys_reset,
-                       ext_gpmp,
-                       pointer,
-                       dec_in,
-                       p_en,
-                       data_out,
-                       pointer_val
-                       
-               );
+
 
                
 --init : process(all)

diff --git a/cpu/src/execute_stage_b.vhd b/cpu/src/execute_stage_b.vhd
index 16e1334db418114648fba4ef68393af8ad447ee7..88d3541bbdaaa1e2ec5a820cd300a07396bbcccc 100644 (file)
--- a/cpu/src/execute_stage_b.vhd
+++ b/cpu/src/execute_stage_b.vhd
@@ -15,6 +15,10 @@ signal op_detail : op_opt_t;
 signal left_operand, right_operand : gp_register_t;
 signal alu_state, alu_nxt : alu_result_rec;
 signal psw : status_rec;
+               -- extension signals
+               signal ext_gpmp :  extmod_rec;
+               signal data_out    : gp_register_t;
+
 
 
 type exec_internal is record
@@ -33,11 +37,19 @@ alu_inst : alu
 port map(clk, reset, condition, op_group, 
          left_operand, right_operand, dec_instr.displacement, op_detail, alu_state, alu_nxt,addr,data);
 
-gpm_inst : gpm
-        generic map(RESET_VALUE)
-        port map(clk,reset,alu_nxt,psw);
 
 
+       gpmp_inst :  extension_gpm
+               generic map (RESET_VALUE)
+               port map (
+                       clk,
+                       reset,
+                       ext_gpmp,
+                       data_out,
+                       alu_nxt,
+                       psw
+                       
+               );
 
 
 

diff --git a/cpu/src/extension.vhd b/cpu/src/extension.vhd
index a5e7a49f53b0b80f7f8590e2f69b2341d2e2c0f8..9ddb33e2f8d5855b253ea863a4cfd6aaf103cf66 100644 (file)
--- a/cpu/src/extension.vhd
+++ b/cpu/src/extension.vhd
@@ -4,8 +4,10 @@ use IEEE.numeric_std.all;
 
 use work.common_pkg.all;
 use work.extension_pkg.all;
+use work.alu_pkg.all;
+use work.gpm_pkg.all;
 
-entity extension is
+entity extension_gpm is
 
        generic (
                        -- active reset value
@@ -15,15 +17,15 @@ entity extension is
                --System inputs
                        clk :   in std_logic;
                        reset : in std_logic;
+               -- Standartinterface                    
+                       ext_reg  : in extmod_rec;
+                       data_out : out gp_register_t;
                -- Input
-                       ext_reg : in extmod_rec;
-                       pointer : in pointer_count;
-                       dec_inc : in std_logic;
-                       p_en    : in std_logic;
+                       alu_nxt : in alu_result_rec;
                -- Ouput
-                       data_out    : out gp_register_t;
-                       pointer_val : out gp_register_t
+                        psw     : out status_rec
+
                        
                );
                
-end extension;
+end extension_gpm;

diff --git a/cpu/src/extension_b.vhd b/cpu/src/extension_b.vhd
index 1947bde77ba738377e2817691e3c0acee3d1a8eb..a035511b1284e489e2d14ee37d95175ace76c738 100644 (file)
--- a/cpu/src/extension_b.vhd
+++ b/cpu/src/extension_b.vhd
@@ -8,24 +8,29 @@ use work.core_pkg.all;
 use work.mem_pkg.all;
 use work.extension_pkg.all;
 
-architecture behav of extension is
+architecture behav of extension_gpm is
+type gpm_internal is record
+        status : status_rec;
+end record gpm_internal;
 
+signal reg, reg_nxt : gpm_internal;
 
 begin
-
-
-syn: process(clk, reset)
-
+syn : process (clk, reset)
 begin
+        if (reset = RESET_VALUE) then
+                reg.status <= ('0','0','0','0');
+        elsif rising_edge(clk) then
+                reg <= reg_nxt;
+        end if;
+end process syn;
+
+asyn : process (clk, reset, alu_nxt)
+begin
+        reg_nxt.status <= alu_nxt.status;
+end process asyn;
 
-       if (reset = RESET_VALUE) then
-               
-       elsif rising_edge(clk) then
-               
-       end if;
-       
-end process; 
-
+psw <= reg.status;
 
 end behav;
 

diff --git a/cpu/src/extension_pkg.vhd b/cpu/src/extension_pkg.vhd
index cf50bafd69ba21ad1f8447432ac43d2d7a7f67e3..49d5cdbae5e214369faa08c6ef33130a6cca6f6d 100644 (file)
--- a/cpu/src/extension_pkg.vhd
+++ b/cpu/src/extension_pkg.vhd
@@ -4,7 +4,8 @@ use IEEE.std_logic_1164.all;
 use IEEE.numeric_std.all;
 
 use work.common_pkg.all;
-
+use work.alu_pkg.all;
+use work.gpm_pkg.all;
 
 package extension_pkg is
 
@@ -35,7 +36,7 @@ constant EXT_AC97_ADDR:   ext_addrid_t := x"FFFFFFD";
 constant EXT_UART_ADDR:   ext_addrid_t := x"FFFFFFE";
 constant EXT_GPMP_ADDR:    ext_addrid_t := x"FFFFFFF";
 
- component extension is
+ component extension_gpm is
         --some modules won't need all inputs/outputs
        generic (
                        -- active reset value
@@ -45,17 +46,17 @@ constant EXT_GPMP_ADDR:    ext_addrid_t := x"FFFFFFF";
                --System inputs
                        clk :   in std_logic;
                        reset : in std_logic;
+               -- Standartinterface                    
+                       ext_reg  : in extmod_rec;
+                       data_out : out gp_register_t;
                -- Input
-                       ext_reg : in extmod_rec;
-                       pointer : in pointer_count;
-                       dec_inc : in std_logic;
-                       p_en    : in std_logic;
+                       alu_nxt : in alu_result_rec;
                -- Ouput
-                       data_out    : out gp_register_t;
-                       pointer_val : out gp_register_t
+                        psw     : out status_rec
+
                        
                );
- end component extension;
+ end component extension_gpm;
 
 
 

diff --git a/cpu/src/pipeline_tb.vhd b/cpu/src/pipeline_tb.vhd
index ff8fd608d31130bcc5c5301772251fbcb39c9651..7a9056170ed8af397b1c87033446b8ca8f048361 100644 (file)
--- a/cpu/src/pipeline_tb.vhd
+++ b/cpu/src/pipeline_tb.vhd
@@ -49,12 +49,7 @@ architecture behavior of pipeline_tb is
                  signal hword_pin  : std_logic;
                  signal byte_s_pin : std_logic;
                 signal nop_pin : std_logic;
-               -- extension signals
-               signal ext_gpmp :  extmod_rec;
-               signal pointer : pointer_count;
-               signal dec_in,p_en : std_logic;
-               signal data_out    : gp_register_t;
-               signal pointer_val : gp_register_t;
+
 
 begin
 
@@ -133,20 +128,6 @@ begin
                 reg_wr_data_pin, reg_we_pin, reg_w_addr_pin, jump_result_pin, alu_jump_bit_pin);
 
 
-       gpmp_inst :  extension
-               generic map ('0')
-               port map (
-                       sys_clk_pin,
-                       sys_res_n_pin,
-                       ext_gpmp,
-                       pointer,
-                       dec_in,
-                       p_en,
-                       data_out,
-                       pointer_val
-                       
-               );
-
 
 
        nop_pin <= (alu_jump_bit_pin xor brpr_pin);

diff --git a/cpu/src/r_w_ram_b.vhd b/cpu/src/r_w_ram_b.vhd
index 1093b1b479a4fa2921e13d4eb150265591cd49f4..94362f7ecf6bcc3ea7c15e1a0a70d295a1e9c625 100644 (file)
--- a/cpu/src/r_w_ram_b.vhd
+++ b/cpu/src/r_w_ram_b.vhd
@@ -18,6 +18,7 @@ architecture behaviour of r_w_ram is
                                    3 => "11100000001000010001100000000000", -- r4 = r2 + r3
                                    4 => "11100010001010100000100000000000", -- r5 = r4 and r1
                                     5 => "11100111101010100000000000000001", -- stw r5,r4,1
+                                   6 => "11101100001000100000000000000000", --cmp r4 , r4       => 2-2 => 1001
 
                                  others => x"F0000000");