calu.git
2010-12-17 Stefan REBERNIGwb extension
2010-12-17 Manfreduart: rxd drin
2010-12-17 Martin Perner[bench] vm
2010-12-17 Stefan REBERNIGuart: blinkt zwar nur am led aber des is schon net...
2010-12-16 Martin Perner[bench] vm
2010-12-16 Martin Perner[bench] vm
2010-12-16 Martin Pernersim: replace exit() by flag
2010-12-16 Bernhard Urbanerster versuch das ganze mal zu flashen -> es blinkt...
2010-12-16 Manfreduart : es sendet !!!!
2010-12-14 Manfreduart:uart entitiy
2010-12-14 Stefan Rebernigfmax incr
2010-12-11 Stefan Rebernigadded todo-vhdl.txt
2010-12-11 Stefan Rebernigfibonacci die 2.
2010-12-11 Stefan Rebernigfibonacci tested rc1, 107 cycles, 1k2le, 57MHz
2010-12-11 Stefan Rebernigfib 1
2010-12-11 Markus Hofstätterbugfix ld
2010-12-11 Stefan Rebernigfib
2010-12-11 Bernhard Urban3a_asm: use '-b' for binary representation
2010-12-11 Bernhard Urban3a_asm: divide the computed address with four at br...
2010-12-11 Stefan Rebernigcall/return
2010-12-11 Stefan Rebernigreturn - erster versuch
2010-12-11 Markus Hofstätterreturn added
2010-12-11 Markus Hofstätteranother typo
2010-12-11 Markus Hofstättertypos
2010-12-11 Markus Hofstätternext step: call
2010-12-11 Stefan Rebernigdecoder for st-op
2010-12-11 U-Thor\Schakalbugfix: sp operation first approach.
2010-12-11 U-Thor\Schakalmodified: interfaces according to SP operation
2010-12-02 Markus Hofstättermodified: first approach to pointers. not finished...
2010-12-02 Stefan Rebernigstatic branch - small bug fix
2010-12-01 Stefan Rebernigstatic branch - getestet, 58MHz lt quartus
2010-12-01 Stefan Rebernigstatic branch incl prediction rc1
2010-12-01 Stefan Rebernigstatic branch 1.0
2010-12-01 Markus Hofstätteradded: alu jumps
2010-12-01 Manfredwrite_back: mini fix
2010-12-01 Manfredextension : gpm extension
2010-12-01 Manfredextension: jetzt gibts des file auch :D
2010-12-01 Manfredextension: comment added to isa
2010-11-30 Manfredextension: instanziert in tb und toplvlentity sowie...
2010-11-30 Manfredextension : entity fix
2010-11-30 Manfredextension: entity + splitter zur adressierung
2010-11-30 Markus Hofstätteralu: return to previous
2010-11-29 Markus Hofstätterstw alu bugfix
2010-11-29 Markus Hofstätterstw alu
2010-11-29 Stefan Rebernigstw.2
2010-11-29 Stefan Rebernigst
2010-11-29 Markus Hofstätterldi add finished
2010-11-29 Markus Hofstätteradded: alu ldi
2010-11-29 Stefan Rebernigdecoder add ldi
2010-11-29 Markus HofstätterAdded: LDST_OP
2010-11-26 Stefan Rebernigforward unit testcases (from assignments), everything...
2010-11-18 Manfred5 abgabe finish
2010-11-18 Manfredblabla
2010-11-18 Manfrednew testbench
2010-11-17 Stefan Rebernigkleine Änderungen
2010-11-16 Stefan Rebernigkleinigkeit ausgebessert
2010-11-16 Stefan Rebernig2nd forward unit - 58MHz with 31bit shift...
2010-11-16 Stefan Rebernignop insertion added
2010-11-15 Stefan Rebernigpipeline erste version mit 31bit shifter (kostet 7MHz...
2010-11-15 Stefan Rebernigtest pipe 2
2010-11-15 Stefan Rebernigpipe v1
2010-11-15 Markus HofstätterFixed some bugs.
2010-11-15 Markus Hofstättergpm module and exec first buggy version.
2010-11-15 Stefan Rebernigblub
2010-11-15 Stefan Rebernigwriteback stage
2010-11-15 Markus HofstätterMerge branch 'master' of wien.tomnetworks.com:calu
2010-11-15 Stefandisplacement
2010-11-15 Markus HOFSTAETTERexec impl.
2010-11-15 Stefanadded pipe 2 reg, testbench, top_level_entity, ...
2010-11-15 Stefanpipe2
2010-11-14 Markus HofstätterSeperation to differen execute operations.
2010-11-14 Stefanquartus tcl script für meinen cyclone II, top level...
2010-11-14 Stefangitignore für sim
2010-11-14 Stefando file for testbench - a few test instructions added...
2010-11-14 Stefanfetch und decode kompilierbar, generelle tb, änderung...
2010-11-14 Markus HofstätterAdded interface types
2010-11-14 Markus HofstaetterAdded arithmetic and logical vhdl functions
2010-11-13 Martin Pernersim: instrs can have different effect on perf count
2010-11-13 Stefandecode stage die erste
2010-11-13 Stefanaktualisierung block diagramm
2010-11-11 Martin Pernerbench: commenting
2010-11-11 Martin Pernerbench: wurm says 'commit!!!!!11elfeins'
2010-11-11 Martin Pernerbench: fibmmem ++
2010-11-11 Martin Pernerblock: stufen => stages, usw
2010-11-10 StefanBlockdiagrammbeschreibung
2010-11-10 Stefanupdate blockdiagramm
2010-11-10 StefanBlockdiagramm: PC in PIPE1 verschoben
2010-11-10 Martin Pernerbench: fib mega mem style
2010-11-10 U-Thor\Schakaladded rw-r port ram
2010-11-10 StefanVHDL Grundkonstrukt
2010-11-10 Bernhard Urbanbench: fibmem.s @ 169 instructions
2010-11-10 StefanBlock: First version
2010-11-09 Bernhard Urbanbench: fibmem.s @ 177 instructions
2010-11-09 Bernhard Urbanbench: fibmem.s @ 193 instructions
2010-11-09 Martin Pernerbench: added datadeps
2010-11-09 Martin Pernerbench: bugfixes
2010-11-09 Martin Pernersim: removed old ram presets
2010-11-09 Bernhard Urbanbench: added max.s and sum.s
2010-11-09 Martin Pernerbench: added benchmarks, fib.s already done
2010-11-09 Martin Pernersim: added performance counter
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