Add constants for fast path resume copying
[coreboot.git] / src / cpu /
2012-04-05 Stefan ReinauerFix timer frequency detection on Sandybridge
2012-04-05 Stefan ReinauerInvalidate cache before first jump
2012-04-05 Stefan ReinauerUpdate documentation in smmrelocate.S to mention TSEG
2012-04-05 Stefan ReinauerAdd support for Intel Sandybridge CPU
2012-04-04 Stefan ReinauerAdd support to run SMM handler in TSEG instead of ASEG
2012-04-03 Stefan ReinauerAdd support for Intel Turbo Boost feature
2012-04-02 Kyösti MälkkiApply cache-as-ram conditionally on socket mPGA604
2012-04-02 zbaoS3 code whitespaces changes.
2012-03-31 Patrick GeorgiWhitespace fixes
2012-03-31 Kyösti MälkkiIntel cpus: get MAXPHYADDR at runtime for new CAR
2012-03-31 Kyösti MälkkiIntel cpus: add hyper-threading CPU support to new CAR
2012-03-31 Kyösti MälkkiIntel cpus: improve CPU compatibility of new CAR
2012-03-31 Kyösti MälkkiAdd support for RAM-less multi-processor init
2012-03-31 Kyösti MälkkiIntel cpus: apply some good programming practices in...
2012-03-31 Kyösti MälkkiIntel cpus: cache actual size of the Flash ROM device
2012-03-31 Kyösti MälkkiIntel cpus: copy model_6ex CAR code
2012-03-30 Duncan LaurieMake MTRR min hole alignment 64MB
2012-03-30 Duncan LaurieFix MB calculation in the reporting of the MTRR hole
2012-03-30 Duncan LaurieMTRR: add alternate allocation method for odd memory...
2012-03-30 Duncan LaurieAdd Kconfig options to enable TSEG and set a size
2012-03-30 Stefan Reinauerdrop use of MAX_PHYSICAL_CPUS and MAX_CPUS where not...
2012-03-29 Stefan ReinauerAdd an option to keep the ROM cached after romstage
2012-03-25 Kyösti MälkkiFix possible deadlock on SMP stop_this_cpu
2012-03-25 Kyösti MälkkiIntel cpus: Fix deadlock on hyper-threading init
2012-03-17 Kyösti MälkkiIntel cpus: Include CAR from socket
2012-03-16 Kyösti MälkkiRename AMD_AGESA to CPU_AMD_AGESA
2012-03-16 Kyösti MälkkiFix AMD Agesa leaking Kconfig
2012-03-16 Patrick GeorgiROMCC boards have no XIP limit
2012-03-16 Patrick GeorgiVia Epia-N and C3: Set ioapic delivery type in Kconfig
2012-03-16 Kyösti MälkkiFix address of IDT in real-mode entry
2012-03-09 Stefan Reinauermove console includes to central console/console.h
2012-03-07 Patrick GeorgiMove C labels to start-of-line
2012-02-20 Marc JonesFix MTRR TOM2 WB cache setup for AMD CPUs > revF.
2012-02-17 Patrick GeorgiRemove whitespace.
2012-02-16 Kerry ShehAGESA F15: AGESA family15 model 00-0fh cpu wrapper
2012-02-16 Kyösti MälkkiIntel cpus: use CPU_PHYSMASK_HI define in CAR
2012-02-15 Kyösti MälkkiIntel model_106cx: Use symbolic names for MTRR bits
2012-02-13 Kyösti MälkkiAMD Geode cpus: apply un-written naming rules
2012-02-10 Kyösti MälkkiIntel cpus: apply un-written naming rules
2012-02-09 Sven SchnelleAdd Intel Socket LGA771
2012-02-09 Kyösti MälkkiVIA cpus: apply un-written naming rules
2012-01-23 Vikram Narayananpost code: Replaced hard-coded post code with macro
2012-01-21 Vikram Narayanantrivial: spelling fixes in comments
2012-01-20 Stefan ReinauerLeave SSE and MMX instructions enabled in coreboot
2012-01-10 Sven SchnelleMTRR: get physical address size from CPUID
2012-01-09 Nils JacobsFix Geode GX2 + LX caching for tiny bootblock.
2012-01-09 Sven SchnelleACPI: mark empty get_cst_entries() weak
2011-12-26 Marc JonesFix Fam10 MMCONF_SUPPORT_DEFAULT setting.
2011-12-13 Marc JonesUse MMCONF for all AMD family 10 CPUs.
2011-12-05 Kyösti MälkkiBootblock does not need a unique boot_cpu()
2011-11-24 Kyösti MälkkiRemove unused code files and cosmetic changes
2011-11-22 Florian Zumbiehlk8 raminit: add workaround for erratum #181 on non...
2011-11-22 Kyösti MälkkiFix post_code in 16bit entry
2011-11-01 Stefan Reinauerremove trailing whitespace
2011-11-01 Patrick GeorgiRemove XIP_ROM_BASE
2011-10-30 Rudolf MarekFix slow CAR execution introduced by 7c7d87182feb78cb2b...
2011-10-28 Patrick GeorgiGet rid of the old romstage-as-bootblock ROM layout
2011-10-28 Patrick GeorgiGet rid of AUTO_XIP_ROM_BASE
2011-10-25 Sven SchnelleSPEEDSTEP: write _CST tables
2011-10-17 Kyösti MälkkiActivate older Xeon P4 microcodes
2011-10-17 Oskar EnokssonFixes several issues with amd k8 SSDT P-state generation
2011-10-15 Stefan ReinauerSMM: Move wbinvd after pmode jump
2011-10-13 Stefan ReinauerLoad an IDT with NULL limit
2011-10-11 Oskar EnokssonFixed broken MTRR for >4GB memory on AMD K8 fam 0fh...
2011-09-24 QingPei WangAdd AMD Family 10h PH-E0 support
2011-09-12 efdesign98Miscellaneous AMD F14 warning fixes
2011-09-09 Patrick GeorgiCrank up CPU speed on Intel Core and Core2 CPUs
2011-09-06 Kerry SheAMD F14 Rev C0 update
2011-08-06 efdesign98Update AMD F14 Agesa to support Rev C0 cpus
2011-08-04 Keith Huicpu/intel/slot_1: Init L2 cache on SECC(2) CPUs.
2011-07-22 efdesign98Add SSE3 dependent code
2011-07-21 efdesign98Update AMD SR5650 and SB700
2011-07-18 efdesign98Add AMD Family 10 support to cpu folder
2011-07-13 Rudolf MarekMake AMD SMM SMP aware
2011-07-04 Rudolf MarekSmall SMM fixups
2011-06-28 efdesign98Addition of Family12/SB900 wrapper code
2011-06-21 efdesign98Move existing AMD Ffamily14 code to f14 folder
2011-06-21 efdesign98Rename {CPU|NB|SB}/amd/*_wrapper folders
2011-06-18 Sven SchnelleSMM: flush caches after disabling caching
2011-06-15 Sven SchnelleSMM: don't overwrite SMM memory on resume
2011-05-15 Scott DuplichanCosmetic cleanup.
2011-05-15 Scott DuplichanCorrect the number of MCA error reporting banks cleared.
2011-05-15 Scott Duplichan1) Initialize BSP fixed MTRRs to match AP fixed MTRR...
2011-05-10 Patrick GeorgiChange read_option() to a macro that wraps some API...
2011-05-10 Vikram NarayananThis replaces the fixed shift values in the apic timer...
2011-05-03 Sven SchnelleEnable caching for ROM area in model_6ex/cache_as_ram.inc
2011-04-26 Stefan ReinauerAdd support for memory mapped UARTs to coreboot and...
2011-04-21 Stefan Reinauermore ifdef -> if fixes.
2011-04-21 Stefan Reinauermore ifdef -> if fixes
2011-04-19 Stefan ReinauerFix some more misuses of ifdef/if defined
2011-04-14 Stefan Reinauerdrop half an uart8250 implementation from smiutil and...
2011-04-14 Stefan Reinauerearlymtrr.c: wipe some dead code, use names instead...
2011-04-14 Stefan Reinauerdrop incorrectly used CONFIG_ROM_IMAGE_SIZE and unused...
2011-04-14 Stefan ReinauerUse symbolic names for some MTRR bits instead of number...
2011-04-11 Alexandru GagniucUnify use of post_code
2011-03-28 Zheng BaoAdd AMD C32 support.
2011-03-17 Marc JonesFix breaking the build after removing files in tthe...
2011-03-04 Jonathan KollaschAdd P-states for select Socket 754 processors.
2011-03-03 Jonathan KollaschCorrect off-by-one problem in AMD pre-rev-F model-F...
2011-02-28 Xavi Drudis FerranImproving BKDG implementation of P-states,
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