Addition of Family12/SB900 wrapper code
authorefdesign98 <efdesign98@gmail.com>
Tue, 21 Jun 2011 02:56:06 +0000 (19:56 -0700)
committerStefan Reinauer <stefan.reinauer@coreboot.org>
Tue, 28 Jun 2011 21:09:25 +0000 (23:09 +0200)
commit7c0c64e1033b4edf9a488e8e31948726ee17465e
tree17d6b727807ed513c68ac00b9255577a86717b1b
parent7c634ae8c18d1e311b5b96f09b5e6af23e57eaf7
Addition of Family12/SB900 wrapper code

This change adds the wrapper code for the AMD Family12
cpus and the AMD Hudson-2 (SB900) southbridge to the cpu,
northbridge and southbridge folders respectively.

Change-Id: I22b6efe0017d0af03eaa36a1db1615e5f38da06c
Signed-off-by: Frank Vibrans <frank.vibrans@amd.com>
Signed-off-by: efdesign98 <efdesign98@gmail.com>
Reviewed-on: http://review.coreboot.org/53
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
47 files changed:
src/cpu/amd/agesa/Kconfig
src/cpu/amd/agesa/Makefile.inc
src/cpu/amd/agesa/family12/Kconfig [new file with mode: 0755]
src/cpu/amd/agesa/family12/Makefile.inc [new file with mode: 0755]
src/cpu/amd/agesa/family12/apic_timer.c [new file with mode: 0755]
src/cpu/amd/agesa/family12/cache_as_ram.inc [new file with mode: 0755]
src/cpu/amd/agesa/family12/chip.h [new file with mode: 0755]
src/cpu/amd/agesa/family12/chip_name.c [new file with mode: 0755]
src/cpu/amd/agesa/family12/model_12_init.c [new file with mode: 0755]
src/include/cpu/amd/amdfam12.h [new file with mode: 0755]
src/include/device/pci_ids.h
src/mainboard/amd/inagua/Kconfig
src/mainboard/amd/inagua/Makefile.inc
src/northbridge/amd/Makefile.inc
src/northbridge/amd/agesa/Kconfig
src/northbridge/amd/agesa/Makefile.inc
src/northbridge/amd/agesa/family12/Kconfig [new file with mode: 0755]
src/northbridge/amd/agesa/family12/Makefile.inc [new file with mode: 0755]
src/northbridge/amd/agesa/family12/amdfam12_conf.c [new file with mode: 0755]
src/northbridge/amd/agesa/family12/bootblock.c [new file with mode: 0755]
src/northbridge/amd/agesa/family12/chip.h [new file with mode: 0755]
src/northbridge/amd/agesa/family12/northbridge.c [new file with mode: 0755]
src/northbridge/amd/agesa/family12/northbridge.h [new file with mode: 0755]
src/northbridge/amd/agesa/family12/root_complex/Kconfig [new file with mode: 0755]
src/northbridge/amd/agesa/family12/root_complex/chip.h [new file with mode: 0755]
src/northbridge/amd/agesa/family12/ssdt.asl [new file with mode: 0755]
src/southbridge/amd/Makefile.inc
src/southbridge/amd/cimx/Kconfig
src/southbridge/amd/cimx/Makefile.inc
src/southbridge/amd/cimx/sb900/Amd.h [new file with mode: 0755]
src/southbridge/amd/cimx/sb900/AmdSbLib.h [new file with mode: 0755]
src/southbridge/amd/cimx/sb900/Kconfig [new file with mode: 0755]
src/southbridge/amd/cimx/sb900/Makefile.inc [new file with mode: 0755]
src/southbridge/amd/cimx/sb900/SbEarly.h [new file with mode: 0755]
src/southbridge/amd/cimx/sb900/SbPlatform.h [new file with mode: 0755]
src/southbridge/amd/cimx/sb900/bootblock.c [new file with mode: 0755]
src/southbridge/amd/cimx/sb900/cbtypes.h [new file with mode: 0755]
src/southbridge/amd/cimx/sb900/chip.h [new file with mode: 0755]
src/southbridge/amd/cimx/sb900/chip_name.c [new file with mode: 0755]
src/southbridge/amd/cimx/sb900/early.c [new file with mode: 0755]
src/southbridge/amd/cimx/sb900/late.c [new file with mode: 0755]
src/southbridge/amd/cimx/sb900/lpc.c [new file with mode: 0755]
src/southbridge/amd/cimx/sb900/lpc.h [new file with mode: 0755]
src/southbridge/amd/cimx/sb900/smbus.c [new file with mode: 0755]
src/southbridge/amd/cimx/sb900/smbus.h [new file with mode: 0755]
src/vendorcode/Makefile.inc
src/vendorcode/amd/agesa/f14/Makefile.inc