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(parent: 6bdc83b) | patch
Improving BKDG implementation of P-states,
authorXavi Drudis Ferran <xdrudis@tinet.cat>
Mon, 28 Feb 2011 03:59:34 +0000 (03:59 +0000)
committerMarc Jones <marc.jones@amd.com>
Mon, 28 Feb 2011 03:59:34 +0000 (03:59 +0000)
commitb6711723208e35451f1f65910a50e8c2a3f6eb3b
tree63dc1857e342dacb3460f82a71d0bc1729b0c6b0tree | snapshot
parent6bdc83bf5e76aa0b36cb5f52c11544091d71770bcommit | diff
Improving BKDG implementation of P-states,
CPU and northbridge frequency and voltage
handling for Fam 10 in SVI mode.

I don't understand what this was doing nor find docs for these regs
Maybe it was left over from some copy & paste ?

Signed-off-by: Xavi Drudis Ferran <xdrudis@tinet.cat>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6411 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
src/cpu/amd/model_10xxx/fidvid.c diff | blob | history
my coreboot WIP stuff (asus m5a99x-evo board)