Fix slow CAR execution introduced by 7c7d87182feb78cb2bc02fb3558bef56a41682c9

It is meant to be a address and not a dereference. Otherwise MTRR
is filled with code and not with the address.

This is what I hate at most on the AT&T syntax. Instead of taking
the address, it was a dereference. Not greatly visible, except
I wondered why opcode is not 0xb4 but 0xa1 and it took another
half an our to see it.

Change-Id: I6b339656024de8f6e6b3cde63b16b7ff5562d055
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Reviewed-on: http://review.coreboot.org/358
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)

diff --git a/src/cpu/amd/car/cache_as_ram.inc b/src/cpu/amd/car/cache_as_ram.inc
index 9d2b400f497156ce4277fe838d4ef22c3dcfa2d2..b9e02f3b8fdd30e34e324a41e0031146d06b6549 100644 (file)
--- a/src/cpu/amd/car/cache_as_ram.inc
+++ b/src/cpu/amd/car/cache_as_ram.inc
@@ -290,7 +290,7 @@ clear_fixed_var_mtrr_out:
         * IMPORTANT: The following calculation _must_ be done at runtime. See
         * http://www.coreboot.org/pipermail/coreboot/2010-October/060855.html
         */
-       movl    copy_and_run, %eax
+       movl    $copy_and_run, %eax
        andl    $(~(CONFIG_XIP_ROM_SIZE - 1)), %eax
        orl     $MTRR_TYPE_WRBACK, %eax
        wrmsr

diff --git a/src/cpu/intel/car/cache_as_ram.inc b/src/cpu/intel/car/cache_as_ram.inc
index 4ad2fce071997fa00a1f9c8d42a0f2cb08051d1d..26fec6e5946122794ac49b906042676e69faf41e 100644 (file)
--- a/src/cpu/intel/car/cache_as_ram.inc
+++ b/src/cpu/intel/car/cache_as_ram.inc
@@ -241,7 +241,7 @@ clear_fixed_var_mtrr_out:
         * IMPORTANT: The following calculation _must_ be done at runtime. See
         * http://www.coreboot.org/pipermail/coreboot/2010-October/060855.html
         */
-       movl    copy_and_run, %eax
+       movl    $copy_and_run, %eax
        andl    $(~(CONFIG_XIP_ROM_SIZE - 1)), %eax
        orl     $MTRR_TYPE_WRBACK, %eax
        wrmsr

diff --git a/src/cpu/intel/model_106cx/cache_as_ram.inc b/src/cpu/intel/model_106cx/cache_as_ram.inc
index b45599ac1b7ea09dc95e4b6e722165052d922030..9f7ceaf247d79838d718a2995dbe79b598bac24e 100644 (file)
--- a/src/cpu/intel/model_106cx/cache_as_ram.inc
+++ b/src/cpu/intel/model_106cx/cache_as_ram.inc
@@ -106,7 +106,7 @@ clear_mtrrs:
         * IMPORTANT: The following calculation _must_ be done at runtime. See
         * http://www.coreboot.org/pipermail/coreboot/2010-October/060855.html
         */
-       movl    copy_and_run, %eax
+       movl    $copy_and_run, %eax
        andl    $(~(CONFIG_XIP_ROM_SIZE - 1)), %eax
        orl     $MTRR_TYPE_WRBACK, %eax
        wrmsr

diff --git a/src/cpu/intel/model_6ex/cache_as_ram.inc b/src/cpu/intel/model_6ex/cache_as_ram.inc
index fa35fc9994ff74a876b1ef168b39a89dc020c91b..3a12cf6dd308762d41b715fe605e1da76c46bcaf 100644 (file)
--- a/src/cpu/intel/model_6ex/cache_as_ram.inc
+++ b/src/cpu/intel/model_6ex/cache_as_ram.inc
@@ -106,7 +106,7 @@ clear_mtrrs:
         * IMPORTANT: The following calculation _must_ be done at runtime. See
         * http://www.coreboot.org/pipermail/coreboot/2010-October/060855.html
         */
-       movl    copy_and_run, %eax
+       movl    $copy_and_run, %eax
        andl    $(~(CONFIG_XIP_ROM_SIZE - 1)), %eax
        orl     $MTRR_TYPE_WRBACK, %eax
        wrmsr

diff --git a/src/cpu/intel/model_6fx/cache_as_ram.inc b/src/cpu/intel/model_6fx/cache_as_ram.inc
index a8690112c83cdd0115080002dc9f696624c8800e..2ba187271e7a30e22910e664a7c4d1027afcda1f 100644 (file)
--- a/src/cpu/intel/model_6fx/cache_as_ram.inc
+++ b/src/cpu/intel/model_6fx/cache_as_ram.inc
@@ -113,7 +113,7 @@ clear_mtrrs:
         * IMPORTANT: The following calculation _must_ be done at runtime. See
         * http://www.coreboot.org/pipermail/coreboot/2010-October/060855.html
         */
-       movl    copy_and_run, %eax
+       movl    $copy_and_run, %eax
        andl    $(~(CONFIG_XIP_ROM_SIZE - 1)), %eax
        orl     $MTRR_TYPE_WRBACK, %eax
        wrmsr

diff --git a/src/cpu/via/car/cache_as_ram.inc b/src/cpu/via/car/cache_as_ram.inc
index d0c43c96c0c5e8b6c18fe3d4c7929d68c0de4cab..ad2805ea2afc44a2e03ca3b4236daf6ed3a46282 100644 (file)
--- a/src/cpu/via/car/cache_as_ram.inc
+++ b/src/cpu/via/car/cache_as_ram.inc
@@ -120,7 +120,7 @@ clear_fixed_var_mtrr_out:
         * IMPORTANT: The following calculation _must_ be done at runtime. See
         * http://www.coreboot.org/pipermail/coreboot/2010-October/060855.html
         */
-       movl    copy_and_run, %eax
+       movl    $copy_and_run, %eax
        andl    $(~(CONFIG_XIP_ROM_SIZE - 1)), %eax
        orl     $MTRR_TYPE_WRBACK, %eax
        wrmsr
@@ -166,7 +166,7 @@ clear_fixed_var_mtrr_out:
         * IMPORTANT: The following calculation _must_ be done at runtime. See
         * http://www.coreboot.org/pipermail/coreboot/2010-October/060855.html
         */
-       movl    copy_and_run, %esi
+       movl    $copy_and_run, %esi
        andl    $(~(CONFIG_XIP_ROM_SIZE - 1)), %ei
        movl    %esi, %edi
        movl    $(CONFIG_XIP_ROM_SIZE >> 2), %ecx
@@ -247,7 +247,7 @@ testok:
         * IMPORTANT: The following calculation _must_ be done at runtime. See
         * http://www.coreboot.org/pipermail/coreboot/2010-October/060855.html
         */
-       movl    copy_and_run, %eax
+       movl    $copy_and_run, %eax
        andl    $(~(CONFIG_XIP_ROM_SIZE - 1)), %eax
        orl     $MTRR_TYPE_WRBACK, %eax
        wrmsr