Via Epia-N and C3: Set ioapic delivery type in Kconfig
authorPatrick Georgi <patrick@georgi-clan.de>
Fri, 16 Mar 2012 18:28:15 +0000 (19:28 +0100)
committerPatrick Georgi <patrick@georgi-clan.de>
Fri, 16 Mar 2012 19:40:47 +0000 (20:40 +0100)
The original comment says it's a Via C3 and not Epia requirement
to deliver IOAPIC interrupts on APIC serial bus.

Change-Id: I73c55755e0ec1ac5756b4ee7ccdfc8eb93184e4f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/435
Tested-by: build bot (Jenkins)
src/arch/x86/Kconfig
src/arch/x86/lib/ioapic.c
src/cpu/via/c3/Kconfig

index e71d0f313ae3b0b515970ee7dfb04d34f7c1d761..c5a0c0e2f5b1a24562c23528e12a942877c4cf9c 100644 (file)
@@ -88,4 +88,12 @@ config LITTLE_ENDIAN
        bool
        default !BIG_ENDIAN
 
+config IOAPIC_INTERRUPTS_ON_FSB
+       bool
+       default y if !IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS
+
+config IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS
+       bool
+       default n
+
 endmenu
index 81d964cf94ee6dbc5318d8bfc52f002d63c103dc..e974d7cce68a6ec1bd6ee4a082343dcee129b4e6 100644 (file)
@@ -89,15 +89,7 @@ void setup_ioapic(u32 ioapic_base, u8 ioapic_id)
                ioapic_interrupts = 24;
        printk(BIOS_DEBUG, "IOAPIC: %d interrupts\n", ioapic_interrupts);
 
-// XXX this decision should probably be made elsewhere, and
-// it's the C3, not the EPIA this depends on.
-#if CONFIG_EPIA_VT8237R_INIT
-#define IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS
-#else
-#define IOAPIC_INTERRUPTS_ON_FSB
-#endif
-
-#ifdef IOAPIC_INTERRUPTS_ON_FSB
+#ifdef CONFIG_IOAPIC_INTERRUPTS_ON_FSB
        /*
         * For the Pentium 4 and above APICs deliver their interrupts
         * on the front side bus, enable that.
@@ -106,7 +98,7 @@ void setup_ioapic(u32 ioapic_base, u8 ioapic_id)
        io_apic_write(ioapic_base, 0x03,
                      io_apic_read(ioapic_base, 0x03) | (1 << 0));
 #endif
-#ifdef IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS
+#ifdef CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS
        printk(BIOS_DEBUG, "IOAPIC: Enabling interrupts on APIC serial bus\n");
        io_apic_write(ioapic_base, 0x03, 0);
 #endif
index a5b4f226730d2cd62a4434748be420993d56f584..259a1f211d7e1278fe9c5b58ee76f9c85a70c447 100644 (file)
@@ -7,5 +7,6 @@ config CPU_SPECIFIC_OPTIONS
        def_bool y
        select UDELAY_TSC
        select MMX
+       select IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS
 
 endif # CPU_VIA_C3