config BOOTBLOCK_SOUTHBRIDGE_INIT
string
+config BIG_ENDIAN
+ bool
+ default n
+
+config LITTLE_ENDIAN
+ bool
+ default !BIG_ENDIAN
+
endmenu
#include <cbfs.h>
#include <lib.h>
-#ifndef CONFIG_BIG_ENDIAN
+#if !CONFIG_BIG_ENDIAN
#define ntohl(x) ( ((x&0xff)<<24) | ((x&0xff00)<<8) | \
((x&0xff0000) >> 8) | ((x&0xff000000) >> 24) )
#else
return 0;
break;
}
-#if CONFIG_COMPRESSED_PAYLOAD_NRV2B==1
+#if CONFIG_COMPRESSED_PAYLOAD_NRV2B
case CBFS_COMPRESS_NRV2B: {
printk(BIOS_DEBUG, "using NRV2B\n");
unsigned long unrv2b(u8 *src, u8 *dst, unsigned long *ilen_p);
void SystemPreInit(void)
{
/* they want a jump ... */
-#ifndef CONFIG_CACHE_AS_RAM
+#if !CONFIG_CACHE_AS_RAM
__asm__ __volatile__("jmp .+2\ninvd\njmp .+2\n");
#endif
StartTimer1();
{
/* they want a jump ... */
-#ifndef CONFIG_CACHE_AS_RAM
+#if !CONFIG_CACHE_AS_RAM
__asm__ __volatile__("jmp .+2\ninvd\njmp .+2\n");
#endif
StartTimer1();
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#ifndef CONFIG_NORTHBRIDGE_AMD_AMDFAM10
-#define CONFIG_NORTHBRIDGE_AMD_AMDFAM10 0
-#endif
-
#include "rev.h"
#define NBHTIU_INDEX 0x94 /* Note: It is different with RS690, whose HTIU index is 0xA8 */