Correct off-by-one problem in AMD pre-rev-F model-F PowerNow code.

With this change the last P-state entry of the last CPU in the table
is successfully conveyed into the SSDT.

Signed-off-by: Jonathan Kollasch <jakllsch@kollasch.net>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6430 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

diff --git a/src/cpu/amd/model_fxx/powernow_acpi.c b/src/cpu/amd/model_fxx/powernow_acpi.c
index 09f6ae56d71fed9157edde35a7eb1b541492a7be..023292b96adbbb299c00c30a63fba6aead34822d 100644 (file)
--- a/src/cpu/amd/model_fxx/powernow_acpi.c
+++ b/src/cpu/amd/model_fxx/powernow_acpi.c
@@ -622,7 +622,7 @@ static int pstates_algorithm(u32 pcontrol_blk, u8 plen, u8 onlyBSP)
                Pstate_vid[Pstate_num] = vid_to_reg(data->pstates[Pstate_num - 1].voltage);
                Pstate_power[Pstate_num] = data->pstates[Pstate_num - 1].tdp * 100;
                Pstate_num++;
-       } while ((Pstate_num < MAXP) && (data->pstates[Pstate_num].freqMhz != 0));
+       } while ((Pstate_num < MAXP) && (data->pstates[Pstate_num - 1].freqMhz != 0));
 
        for (i=0;i<Pstate_num;i++)
                printk(BIOS_DEBUG, "P#%d freq %d [MHz] voltage %d [mV] TDP %d [mW]\n", i,