Intel cpus: Include CAR from socket

It was not obvious which CAR was compiled in. Also build would fail
if a socket included two models with both having an include for CAR.

Change-Id: I000c2e24807c3d99347a43d120333c13fbf91af4
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/626
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>

diff --git a/src/cpu/intel/model_6ex/Makefile.inc b/src/cpu/intel/model_6ex/Makefile.inc
index 0053ae788cdaa4492420bce55948cb2296af0ad2..cc4dc7b8ee81a8265141a65fff291b48cf7f0682 100644 (file)
--- a/src/cpu/intel/model_6ex/Makefile.inc
+++ b/src/cpu/intel/model_6ex/Makefile.inc
@@ -1,4 +1,3 @@
 driver-y += model_6ex_init.c
 subdirs-y += ../../x86/name
 
-cpu_incs += $(src)/cpu/intel/model_6ex/cache_as_ram.inc

diff --git a/src/cpu/intel/socket_LGA771/Makefile.inc b/src/cpu/intel/socket_LGA771/Makefile.inc
index 319430f9307885e9c8d4434426d95663c9ab3c1a..ef520a35936c22f35de5ce054469be3cfb7a9093 100644 (file)
--- a/src/cpu/intel/socket_LGA771/Makefile.inc
+++ b/src/cpu/intel/socket_LGA771/Makefile.inc
@@ -9,3 +9,4 @@ subdirs-y += ../../x86/smm
 subdirs-y += ../microcode
 subdirs-y += ../hyperthreading
 
+cpu_incs += $(src)/cpu/intel/model_6ex/cache_as_ram.inc

diff --git a/src/cpu/intel/socket_mFCPGA478/Makefile.inc b/src/cpu/intel/socket_mFCPGA478/Makefile.inc
index 74433a278a5caa8c895f763082500808fd2d909a..29973af77adb7a10eaeef6286b79532abaa0b1bc 100644 (file)
--- a/src/cpu/intel/socket_mFCPGA478/Makefile.inc
+++ b/src/cpu/intel/socket_mFCPGA478/Makefile.inc
@@ -12,3 +12,4 @@ subdirs-y += ../microcode
 subdirs-y += ../hyperthreading
 subdirs-y += ../speedstep
 
+cpu_incs += $(src)/cpu/intel/model_6ex/cache_as_ram.inc