Uwe Hermann [Sat, 1 Jan 2011 18:10:07 +0000 (18:10 +0000)]
AMD Bimini: Drop duplicate ASL files as we did for other boards.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6232
2b7e53f0-3cfb-0310-b3e9-
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Kerry She [Sat, 1 Jan 2011 18:04:42 +0000 (18:04 +0000)]
Add support for the AMD Bimini eval mainboard.
Signed-off-by: Kerry She <Kerry.she@amd.com>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6231
2b7e53f0-3cfb-0310-b3e9-
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Kerry She [Sat, 1 Jan 2011 17:52:34 +0000 (17:52 +0000)]
Add AMD SB800 southbridge support via cimx_wrapper.
Signed-off-by: Kerry She <Kerry.she@amd.com>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6230
2b7e53f0-3cfb-0310-b3e9-
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Kerry She [Sat, 1 Jan 2011 17:44:07 +0000 (17:44 +0000)]
Add AMD SB800 southbridge CIMx code.
The main CIMx code is in a src/vendorcode directory and should not be
changed with regard to coding style etc. in order to remain easily syncable
with the "upstream" AMD code.
Signed-off-by: Kerry She <Kerry.she@amd.com>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6229
2b7e53f0-3cfb-0310-b3e9-
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Jonathan Kollasch [Fri, 31 Dec 2010 19:20:23 +0000 (19:20 +0000)]
Use $(MAKE) instead of make when cleaning for SeaBIOS.
Signed-off-by: Jonathan Kollasch <jakllsch@kollasch.net>
Acked-by: Jonathan Kollasch <jakllsch@kollasch.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6228
2b7e53f0-3cfb-0310-b3e9-
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Zheng Bao [Fri, 31 Dec 2010 01:46:12 +0000 (01:46 +0000)]
Add RS785(RS880) support. Just few pci_ids.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6227
2b7e53f0-3cfb-0310-b3e9-
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Zheng Bao [Fri, 31 Dec 2010 01:38:45 +0000 (01:38 +0000)]
Add detection of Nuvoton WPCM450.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6226
2b7e53f0-3cfb-0310-b3e9-
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Nils Jacobs [Thu, 30 Dec 2010 19:23:29 +0000 (19:23 +0000)]
Remove duplicated GX2 processor IIOC mode setting on CS5535 southbridge code
and fix CIS mode comments.
Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6225
2b7e53f0-3cfb-0310-b3e9-
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Nils Jacobs [Thu, 30 Dec 2010 19:21:08 +0000 (19:21 +0000)]
Use die() to assure the processor can't wake up from an interrupt.
Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6224
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Thu, 30 Dec 2010 17:39:50 +0000 (17:39 +0000)]
Per default, use SeaBIOS payload instead of no payload.
Add choice to use stable or master version of seabios repository
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6223
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Thu, 30 Dec 2010 16:57:58 +0000 (16:57 +0000)]
superiotool: Don't skip probing on a port if a a chip was detected on another port.
Only skip probing if chip was found on the same port already to avoid
duplicates.
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6222
2b7e53f0-3cfb-0310-b3e9-
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Nils Jacobs [Wed, 29 Dec 2010 21:12:10 +0000 (21:12 +0000)]
-Change the remaining GLIU1 port 5 register names from VIP (Video Input Port)
to FG (FooGlue). As the GX2 has no VIP port.
-Change the Memmory setup MSR register names so they correspond better to the
databook. (Part1)
This is less confusing for beginners.
-Add a MSR printing function to northbridge.c like in the Geode LX code.
-Remove the AES register names.(GX2 has no AES registers)
-Delete some unused code.
-Clean up GX2 northbridge code to match Geode LX code.
-Add missing copyright header to northbridge.c.
-Move hardcoded IRQ defining from northbridge.c to irq_tables.c .
Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6221
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Wed, 29 Dec 2010 21:02:50 +0000 (21:02 +0000)]
fix i810 boards with ram init debugging disabled.
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6220
2b7e53f0-3cfb-0310-b3e9-
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Nils Jacobs [Wed, 29 Dec 2010 20:31:31 +0000 (20:31 +0000)]
-Clean up some comments.
-Remove some white spaces.
-Remove some leading zeros.
-Fix a typo in LX code.
Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6219
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Mon, 27 Dec 2010 14:31:05 +0000 (14:31 +0000)]
proper printk handling in src/northbridge/intel/i82810/raminit.c
and drop some romcc relics in 440bx code too
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6218
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Mon, 27 Dec 2010 13:30:39 +0000 (13:30 +0000)]
__PRE_RAM__ is defined by the makefile
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6217
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Mon, 27 Dec 2010 13:29:38 +0000 (13:29 +0000)]
dump_spd_registers() is only defined when ram init debugging is on.
Most boards unconditionally call this. Fix it in header file instead of each single romstage.c
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6216
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Mon, 27 Dec 2010 11:34:57 +0000 (11:34 +0000)]
Fix most CONFIG_DEBUG_RAM_SETUP issues.
The intel/xe7501devkit is still broken, I think the (romcc) image is too big to
fit in the bootblock if CONFIG_DEBUG_RAM_SETUP is enabled. It would make sense
to convert all CPU_INTEL_SOCKET_MPGA604 to CAR, but I have no hardware to test.
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6215
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Mon, 27 Dec 2010 08:21:23 +0000 (08:21 +0000)]
Intel SCH: make state machine binary selection available in Kconfig for now.
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6214
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Sun, 26 Dec 2010 16:49:57 +0000 (16:49 +0000)]
All the values should stay untouched or be set automatically by the resource
allocator. If that does not work out, they should be set in the code. Setting
them in Kconfig is the worst possible thing to do.
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6213
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Sun, 26 Dec 2010 14:12:38 +0000 (14:12 +0000)]
Random fixes for TI pci1x2x / Nokia IP530 / others.
- nokia/ip530/devicetree.cb, southbridge/ti/pci1x2x/pci1x2x.c:
- Fix SMSC
FDC37B787 name (was a typo).
- Disable PS/2 keyboard/mouse LDN, the IP530 doesn't have either.
- Fix typo: s/PCI_DEVICE_ID_TI_1420/PCI_DEVICE_ID_TI_1520/.
- All of these are confirmed by Marc Bertens on IRC.
- Fix a few CHIP_NAME HP board names.
- Random whitespace and coding-style fixes.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6212
2b7e53f0-3cfb-0310-b3e9-
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Nils Jacobs [Sun, 26 Dec 2010 05:24:50 +0000 (05:24 +0000)]
Move Geode GX2 UMA video memory size to Kconfig
Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6211
2b7e53f0-3cfb-0310-b3e9-
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Nils Jacobs [Sun, 26 Dec 2010 05:21:18 +0000 (05:21 +0000)]
Remove dead and unused Geode GX2 code
Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6210
2b7e53f0-3cfb-0310-b3e9-
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Nils Jacobs [Sun, 26 Dec 2010 05:16:47 +0000 (05:16 +0000)]
Replace Geode GX2 MSR addresses for GLCP on GLIU1 with names
Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6209
2b7e53f0-3cfb-0310-b3e9-
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Nils Jacobs [Sun, 26 Dec 2010 05:12:49 +0000 (05:12 +0000)]
Clean up Geode GX2 comments, whitespace and coding style. Trivial.
Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6208
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Sat, 25 Dec 2010 22:54:41 +0000 (22:54 +0000)]
Nokia IP530: Add missing "select SDRAMPWR_4DIMM".
This is needed for all Intel 440BX boards with 4 DIMM slots (such as this one).
Thanks Marc Bertens <mbertens@xs4all.nl> for bringing up the issue and
for the success report for this fix on IRC.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6207
2b7e53f0-3cfb-0310-b3e9-
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Keith Hui [Thu, 23 Dec 2010 17:12:03 +0000 (17:12 +0000)]
Fix build with CONFIG_DEBUG_RAM_SETUP on Intel 440BX, use printk().
It's a good thing to use printk() instead of print_*() anyway
on 440BX (and other chipsets which have been converted to CAR).
Build tested and boot-tested on ASUS P2B-LS.
Signed-off-by: Keith Hui <buurin@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6206
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Mon, 20 Dec 2010 23:40:23 +0000 (23:40 +0000)]
Various Winbond/Nuvoton W83527HG fixes as per datasheet.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6205
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Sun, 19 Dec 2010 21:20:14 +0000 (21:20 +0000)]
The same mechanisms are used for normal and fallback images.
Hence drop the FALLBACK_ prefix
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6204
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Sun, 19 Dec 2010 01:08:40 +0000 (01:08 +0000)]
ASUS M2N-E: Enable PCI-E x16 slot.
Simple devicetree.cb fix, tested on hardware using a PCI-E x16 graphics card.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6203
2b7e53f0-3cfb-0310-b3e9-
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Rudolf Marek [Sat, 18 Dec 2010 23:30:59 +0000 (23:30 +0000)]
SMM on AMD K8 Part 2/2
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6202
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Sat, 18 Dec 2010 23:29:37 +0000 (23:29 +0000)]
SMM for AMD K8 Part 1/2
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6201
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Sat, 18 Dec 2010 13:22:37 +0000 (13:22 +0000)]
Fix a few whitespace and coding style issues.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6200
2b7e53f0-3cfb-0310-b3e9-
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Patrick Georgi [Sat, 18 Dec 2010 11:55:06 +0000 (11:55 +0000)]
A couple of Poulsbo fixes:
- Don't include cmc.bin to the build. It's required, but we don't ship it
- mptable's API changes a bit. Adapt.
- Fix ACPI for new iasl versions with improved code validation
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6199
2b7e53f0-3cfb-0310-b3e9-
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Patrick Georgi [Sat, 18 Dec 2010 07:48:43 +0000 (07:48 +0000)]
Support Intel SCH (Poulsbo) and add iwave/iWRainbowG6 board
which uses it.
Compiles, but not boot tested lately.
Many things missing (eg. SMM support, proper ACPI, ...)
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6198
2b7e53f0-3cfb-0310-b3e9-
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Idwer Vollering [Fri, 17 Dec 2010 22:34:58 +0000 (22:34 +0000)]
inteltool: Model 0xf2x, ICH5, i865 support.
Add support for dumping the MSRs on model_f2x and dumping GPIOs and PM
registers on ICH5. Add ICH5 and i865 to the supported chips list.
Enable the dumping of BAR6 on i865.
Sample output:
Disabling memory access:
$ sudo setpci -s 6.0 0x04.b=0x0
$ sudo ./inteltool -m | head -n 9
Intel CPU: Processor Type: 0, Family f, Model 2, Stepping 7
Intel Northbridge: 8086:2570 (i865)
Intel Southbridge: 8086:24d0 (ICH5)
============= MCHBAR ============
Access to BAR6 is currently disabled, attempting to enable.
Enabled successfully.
BAR6 = 0xfecf0000 (MEM)
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Acked-by: Joseph Smith <joe@settoplinux.org>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6197
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Fri, 17 Dec 2010 18:04:26 +0000 (18:04 +0000)]
Remove some more unused/incorrect hda_verb.h files.
As discussed on the mailing list at
http://www.coreboot.org/pipermail/coreboot/2010-December/062393.html
http://www.coreboot.org/pipermail/coreboot/2010-December/062510.html
Someone who owns these boards should create correct files at some point.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6196
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Fri, 17 Dec 2010 02:32:42 +0000 (02:32 +0000)]
Update reference toolchain due to some inlining bugs in 4.5.1
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6195
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Fri, 17 Dec 2010 01:51:34 +0000 (01:51 +0000)]
fix the tree again.
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6194
2b7e53f0-3cfb-0310-b3e9-
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Marc Jones [Fri, 17 Dec 2010 01:27:22 +0000 (01:27 +0000)]
This was accidently not svn added when the compiler was updated.
Update coreboot crossgcc toolchain, GDB 4.5.1, MPFR 3.0.0, GDB 7.2.
Add libelf_cv_elf_h_works=no to produce a libelf.h for Cygwin.
Add GDB patch to handle #pragma pack in the i386-elf gcc target.
Signed-off-by: Marc Jones <marcj303@gmail.com>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6193
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Fri, 17 Dec 2010 00:13:54 +0000 (00:13 +0000)]
add license headers to some trivial files and pc87427.h
Mostly done according to initial file creator.
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6192
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Fri, 17 Dec 2010 00:08:21 +0000 (00:08 +0000)]
drop one more version of doing serial uart output differently.
coreboot made it kind of complicated to print a character on serial. Not quite
as complicated as UEFI, but too much for a good design. Fix it.
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6191
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Fri, 17 Dec 2010 00:03:18 +0000 (00:03 +0000)]
guard against the case that CONFIG_WAIT_BEFORE_CPUS_INIT is not defined at all.
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6190
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Thu, 16 Dec 2010 23:57:43 +0000 (23:57 +0000)]
drop unused code in div64.h
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6189
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Thu, 16 Dec 2010 23:57:00 +0000 (23:57 +0000)]
print what make is doing (CBFS call)
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6188
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Thu, 16 Dec 2010 23:52:04 +0000 (23:52 +0000)]
don't hardcode CONFIG_PC80_SYSTEM
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6187
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Thu, 16 Dec 2010 23:37:17 +0000 (23:37 +0000)]
- Fix shortcoming in Kconfig when handling multiple "choice"s
- move some variables where they belong
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6186
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Stefan Reinauer [Thu, 16 Dec 2010 23:24:27 +0000 (23:24 +0000)]
fix according to coding guidelines
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6185
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Uwe Hermann [Thu, 16 Dec 2010 19:57:54 +0000 (19:57 +0000)]
Add TINY_BOOTBLOCK support for the SiS966 southbridge.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6184
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Uwe Hermann [Thu, 16 Dec 2010 19:51:38 +0000 (19:51 +0000)]
Get mptable OEM/product ID from kconfig variables.
We currently use "COREBOOT" unconditionally as the "OEM ID" in our
mptable.c files, and hardcode the mainboard name in mptable.c like this:
mptable_init(mc, "DK8-HTX ", LAPIC_ADDR);
However, the spec says
"OEM ID: A string that identifies the manufacturer of the system hardware."
(Table 4-2, page 42)
so "COREBOOT" doesn't match the spec, we should use the hardware vendor name.
Thus, use CONFIG_MAINBOARD_VENDOR which we have already as the "OEM ID"
(truncate/fill it to 8 characters as per spec).
Also, use CONFIG_MAINBOARD_PART_NUMBER (the board name) as "product ID",
and truncate/fill it to 12 characters as per spec, if needed.
Abuild-tested.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6183
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Patrick Georgi [Thu, 16 Dec 2010 07:36:28 +0000 (07:36 +0000)]
Add support for cbfs-files-y to the build system.
That variable allows chipset components to add files to
the CBFS image, for details see
http://www.coreboot.org/pipermail/coreboot/2010-December/062483.html
Compared to the patch in that mail this commit improves dependency
tracking a bit.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Joseph Smith <joe@settoplinux.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6182
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Uwe Hermann [Wed, 15 Dec 2010 11:32:11 +0000 (11:32 +0000)]
Build fix.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6181
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Uwe Hermann [Wed, 15 Dec 2010 08:56:19 +0000 (08:56 +0000)]
Cleanup up HD audio codec / hda_verb.h files.
Most of the current hda_verb.h files are identical (same MD5 sum) and are
intended for a specific MCP55 board with the Realtek ALC880 audio codec,
which has the vendor/device ID of 0x10ec0880. They were splitted out from the
MCP55 southbridge code and put into board dirs a long time ago (which is
correct, as those settings are indeed board-specific), but they were never
adapted to those boards.
Here's the table of which codec is soldered onto which board, based on
checking the vendor website board spec pages, and the board manuals:
- GIGABYTE GA-M57SLI-S4: Realtek ALC883
- MSI MS-7260: Realtek ALC883
- MSI MS-9652: Realtek ALC888
- MSI MS-9282: Server board, doesn't have audio at all
- Tyan S2912: Server board, doesn't have audio at all
- All Supermicro boards: Server boards, don't have audio at all
- NVIDIA l1_2pvv: No public info to be found, but I assume this was the
original MCP55 eval board for the port and it's probably has the Realtek
ALC880 codec used in the original hda_verb.h.
These are the codec vendor device/IDs involved:
Realtek ALC880: 0x10ec0880
Realtek ALC883: 0x10ec0883
Realtek ALC888: 0x10ec0888
The following files are marked as incorrect / TODO, as the ID of the codec
doesn't match and thus will never get actually used (you'll see
"HDA: no verb!" or similar in the coreboot logs). Even if the ID matched,
the rest of the table would be incorrect anyway because the values are
highly board-specific.
./src/mainboard/gigabyte/m57sli/hda_verb.h
./src/mainboard/msi/ms9652_fam10/hda_verb.h
./src/mainboard/msi/ms9282/hda_verb.h
The following files can be safely dropped as these are server boards and
don't have HD audio (or other audio) at all:
./src/mainboard/supermicro/h8dmr/hda_verb.h
./src/mainboard/supermicro/h8qme_fam10/hda_verb.h
./src/mainboard/supermicro/h8dme/hda_verb.h
./src/mainboard/supermicro/h8dmr_fam10/hda_verb.h
./src/mainboard/tyan/s2912/hda_verb.h
./src/mainboard/tyan/s2912_fam10/hda_verb.h
The following two are correct and can stay:
./src/mainboard/nvidia/l1_2pvv/hda_verb.h
./src/mainboard/getac/p470/hda_verb.h
Abuild-tested.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6180
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Zheng Bao [Tue, 14 Dec 2010 02:02:34 +0000 (02:02 +0000)]
Add dump support for the Winbond/Nuvoton W83527HG.
The datasheet is available on nuvoton's website.
http://www.nuvoton.com/NuvotonMOSS/Community/ProductInfo.aspx?
tp_GUID=
cf73485c-9e0a-4218-9bee-
89dfe9a7bb87
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6179
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Zheng Bao [Tue, 14 Dec 2010 01:47:18 +0000 (01:47 +0000)]
Set the ROMSIZE as 4MB.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6178
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Stefan Reinauer [Mon, 13 Dec 2010 22:16:45 +0000 (22:16 +0000)]
no leading zeroes.
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6177
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Rudolf Marek [Mon, 13 Dec 2010 20:43:33 +0000 (20:43 +0000)]
Attached patch implements the memory speed reductions (and 2T/1T clock logic) for DDR1 memory (939 sockets). The details can be found in BKDG chapter 4.1.3.3.
The patch looks at certain DDR configurations (dual rank/single rank) and lowers the clocks to 2T or frequency as guide suggest. It sets the DualDIMMen bit which I believe should be set for non-dual channel configs.
The patch does not implement support for three dimm configurations supported from revE.
On the other hand it should improve greatly memory stability across the 939 platform.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6176
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Rudolf Marek [Mon, 13 Dec 2010 20:04:25 +0000 (20:04 +0000)]
This patch just turns on the ACPI resume.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6175
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Rudolf Marek [Mon, 13 Dec 2010 20:02:23 +0000 (20:02 +0000)]
Compile cbmem.c instead of including it in romstage,
and do that only if resume is done.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6174
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Rudolf Marek [Mon, 13 Dec 2010 19:59:13 +0000 (19:59 +0000)]
Following patch adds support for suspend/resume functions. I had to change the get_cbmem_toc because macro magic did not work well.
The writes to NVRAM are not used in asrock board (k8 pre rev f) but they should work when used with am2 boards. In fact maybe the suspend will work on mahogany or others ;) - with some simple patch which follows for asrock.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6173
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Rudolf Marek [Mon, 13 Dec 2010 19:53:58 +0000 (19:53 +0000)]
Following patch adds support to bring out the memory out of self refresh when doing resume.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
The patch is based on my 2008 patch.
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6172
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Rudolf Marek [Mon, 13 Dec 2010 19:50:25 +0000 (19:50 +0000)]
We hardcode highmemory size in every northbridge! This is bad, and especially if suspend to ram is involved. Let the default be taken from cbmem.h which also handles the suspend logic.
Abuild tested. Please check all changes if I did not make any wrong while converting this to bytes.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6171
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Uwe Hermann [Mon, 13 Dec 2010 13:44:33 +0000 (13:44 +0000)]
Add support for the ASUS M2N-E board.
This is an AMD K8 + NVIDIA MCP55 + ITE IT8716F mainboard.
It has a working hda_verb.h file for HD audio, and a fanctl.c file is
used to enable the CPU fan (among others) so that we don't kill the
CPU due to excessive heat.
Even though some TODOs remain of course, it works good enough to
successfully boot Linux (e.g. via SeaBIOS).
The full status report is available at:
http://www.coreboot.org/ASUS_M2N-E
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6170
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Zheng Bao [Sun, 12 Dec 2010 14:40:29 +0000 (14:40 +0000)]
Add detection support for the Winbond W83527HG Super I/O.
Running result.
superiotool r6131
Found Winbond W83527HG (id=0xb0, rev=0x73) at 0x2e
The documentation is not available yet.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6169
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Stefan Reinauer [Sun, 12 Dec 2010 00:37:41 +0000 (00:37 +0000)]
fix model 106cx
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6168
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Rudolf Marek [Sat, 11 Dec 2010 23:28:17 +0000 (23:28 +0000)]
Fix the build failure. We have now common fadt.c.
[PATCH] SB700 common FADT was not applied to this board because it was in the meanwhile added.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Rudolf Marek <r.marek@assembler.cz>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6167
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Rudolf Marek [Sat, 11 Dec 2010 22:41:31 +0000 (22:41 +0000)]
I was bitten by the rename, this is part of r6165.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6166
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Rudolf Marek [Sat, 11 Dec 2010 22:26:10 +0000 (22:26 +0000)]
Following patch makes just one fadt.c file. For SB700.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6165
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Stefan Reinauer [Sat, 11 Dec 2010 22:14:44 +0000 (22:14 +0000)]
factor out cpu power management base into a separate file. And fix a bug in
model_1067x
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6164
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Stefan Reinauer [Sat, 11 Dec 2010 22:12:32 +0000 (22:12 +0000)]
catch some illegal configurations (trivial)
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6163
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Stefan Reinauer [Sat, 11 Dec 2010 22:07:07 +0000 (22:07 +0000)]
Don't skip already built targets anymore, because a recent change could have
broken them again. Instead rely on coreboot's dependencies to figure out
what to rebuild.
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6162
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Stefan Reinauer [Sat, 11 Dec 2010 20:33:41 +0000 (20:33 +0000)]
After this has been brought up many times before, rename src/arch/i386 to
src/arch/x86.
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6161
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Fri, 10 Dec 2010 12:52:50 +0000 (12:52 +0000)]
Two hda_verb.h files: Add more comments.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6160
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Uwe Hermann [Fri, 10 Dec 2010 09:02:50 +0000 (09:02 +0000)]
Add TINY_BOOTBLOCK support for AMD SB700.
Factor out the ROM decode enable functionality into bootblock.c and
handle it via the usual TINY_BOOTBLOCK mechanism.
Use "select TINY_BOOTBLOCK" in the southbridge, not individual boards.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6159
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Uwe Hermann [Thu, 9 Dec 2010 18:09:14 +0000 (18:09 +0000)]
Merge enable_rom.c files into bootblock.c files.
All southbridges using TINY_BOOTBLOCK have a bootblock.c files which
simply includes an enable_rom.c files. As discussed on the mailing
list, drop the enable_rom.c file by merging it into bootblock.c.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6158
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Uwe Hermann [Thu, 9 Dec 2010 13:10:57 +0000 (13:10 +0000)]
Build fix, forgot to run abuild on the latest tree.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6157
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Uwe Hermann [Thu, 9 Dec 2010 12:39:48 +0000 (12:39 +0000)]
Deduplicate various ACPI .asl files.
The files debug.asl, globutil.asl, and statdef.asl are duplicated in
many K8/Fam10h boards. However, they're neither board-specific nor
K8/Fam10h-specific nor AMD-specific, so move them to src/arch/i386/acpi.
debug.asl contains generic chunks for I/O port 0x80 handling, and debug
output over serial port (init COM port, send byte, send string, etc).
globutil.asl contains utility methods for string comparison, string length
and similar stuff.
statdef.asl contains generic ACPI bit definitions / status codes from
the ACPI spec (not board- or chipset-specific).
This patch was mostly generated by:
mkdir src/arch/i386/acpi
svn add src/arch/i386/acpi
svn cp src/mainboard/amd/dbm690t/acpi/debug.asl src/arch/i386/acpi/
svn cp src/mainboard/amd/dbm690t/acpi/globutil.asl src/arch/i386/acpi/
svn cp src/mainboard/amd/dbm690t/acpi/statdef.asl src/arch/i386/acpi/
cd src/mainboard
find . -name debug.asl -exec svn rm {} \;
find . -name globutil.asl -exec svn rm {} \;
find . -name statdef.asl -exec svn rm {} \;
Abuild-tested.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6156
2b7e53f0-3cfb-0310-b3e9-
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Zheng Bao [Thu, 9 Dec 2010 06:18:29 +0000 (06:18 +0000)]
Add missing instruction break.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Zheng Bao <zheng.bao@amd.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6155
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Tobias Diedrich [Wed, 8 Dec 2010 21:45:57 +0000 (21:45 +0000)]
These empty files sneaked in from another patch and shouldn't have been included in r6153, remove them.
Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6154
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Tobias Diedrich [Wed, 8 Dec 2010 21:40:12 +0000 (21:40 +0000)]
Tobias Diedrich wrote:
> Definitively a iasl problem, it can't even disassemble it's own
> output back to something equivalent to the input file.
> It seems to be generating Bytecode for the Add where it shouldn't.
Here is a solution using the SSDT.
Unfortunately iasl does not resolve simple arithmetic at compile
time, so we can not use Add(DEFAULT_PMBASE, PCNTRL) in the
Processor statement.
This patch instead dynamically generates the processor statement.
I can't use the speedstep generate_cpu_entries() directly since the
cpu doesn't support speedstep.
For now the code is in the southbridge directory, but maybe it
should go into cpu/intel/ somewhere.
IIRC notebook cpus of the era can already have speedstep, so it
would probably be possible to pair the i82371eb with a
speedstep-capable cpu...
Also, I don't know if multiprocessor boards (abit bp6?) would need
to be handled differently.
Abuild-tested.
Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6153
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Patrick Georgi [Wed, 8 Dec 2010 19:58:30 +0000 (19:58 +0000)]
Allow user to define location for Kconfig config via
DOTCONFIG make variable (defaults to .config).
Let abuild use that.
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6152
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Uwe Hermann [Wed, 8 Dec 2010 08:22:04 +0000 (08:22 +0000)]
Move "select CACHE_AS_RAM" lines from boards into CPU socket.
All K8/Fam10h boards use CAR, so move the "select CACHE_AS_RAM"
into the socket directories, and remove it from the individual boards.
Do the same for Intel CPUs/sockets where all boards use CAR.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6151
2b7e53f0-3cfb-0310-b3e9-
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stepan [Wed, 8 Dec 2010 07:07:33 +0000 (07:07 +0000)]
second round name simplification. drop the <component>_ prefix.
the prefix was introduced in the early v2 tree many years ago
because our old build system "newconfig" could not handle two files with
the same name in different paths like /path/to/usb.c and
/another/path/to/usb.c correctly. Only one of the files would end up
being compiled into the final image.
Since Kconfig (actually since shortly before we switched to Kconfig) we
don't suffer from that problem anymore. So we could drop the sb700_
prefix from all those filenames (or, the <componentname>_ prefix in general)
- makes it easier to fork off a new chipset
- makes it easier to diff against other chipsets
- storing redundant information in filenames seems wrong
Signed-off-by: <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6150
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
stepan [Wed, 8 Dec 2010 05:42:47 +0000 (05:42 +0000)]
first round name simplification. drop the <component>_ prefix.
the prefix was introduced in the early v2 tree many years ago
because our old build system "newconfig" could not handle two files with
the same name in different paths like /path/to/usb.c and
/another/path/to/usb.c correctly. Only one of the files would end up
being compiled into the final image.
Since Kconfig (actually since shortly before we switched to Kconfig) we
don't suffer from that problem anymore. So we could drop the sb700_
prefix from all those filenames (or, the <componentname>_ prefix in general)
- makes it easier to fork off a new chipset
- makes it easier to diff against other chipsets
- storing redundant information in filenames seems wrong
Signed-off-by: <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6149
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Myles Watson [Tue, 7 Dec 2010 19:34:01 +0000 (19:34 +0000)]
Move MMCONF resource into the domain for fam10 for the resource allocator.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Scott Duplichan <scott@notabs.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6148
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Uwe Hermann [Tue, 7 Dec 2010 19:16:07 +0000 (19:16 +0000)]
Get rid of some unneeded function prototypes in romstage.c files.
Abuild-tested.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6147
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Zheng Bao [Tue, 7 Dec 2010 06:27:44 +0000 (06:27 +0000)]
Trivial. Fix typo.
sh> find -name "acpi_tables.c" | xargs sed -i "s/FDAT/FADT/g"
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Zheng Bao <zheng.bao@amd.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6146
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Uwe Hermann [Mon, 6 Dec 2010 20:27:12 +0000 (20:27 +0000)]
Drop unused/obsolete CONFIG_COMPRESS from a few board Kconfigs.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6145
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Uwe Hermann [Mon, 6 Dec 2010 18:20:48 +0000 (18:20 +0000)]
Get rid of some useless/empty *_fixups.c files.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6144
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Uwe Hermann [Mon, 6 Dec 2010 18:17:01 +0000 (18:17 +0000)]
Winbond W83627HF: Use existing functions instead of open-coding.
Use w83627hf_set_clksel_48() where needed instead or open-coding the same
functionality, and also use w83627hf_enable_serial() instead of
w83627hf_enable_dev() (which does exactly the same, but isn't wrapped in the
enter/exit config mode functions).
Abuild-tested.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6143
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Zheng Bao [Mon, 6 Dec 2010 08:19:38 +0000 (08:19 +0000)]
Before lane reversal,
De-asserts STRAP_BIF_all_valid for
PCIE-GFX core.
After lane reversal,
Asserts STRAP_BIF_all_valid for
PCIE-GFX core.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: QingPei Wang <wangqingpei@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6142
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Juhana Helovuo [Mon, 6 Dec 2010 01:11:12 +0000 (01:11 +0000)]
Add initial support for the ASUS M4A78-EM.
Signed-off-by: Juhana Helovuo <juhe@iki.fi>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6141
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Uwe Hermann [Sun, 5 Dec 2010 22:36:14 +0000 (22:36 +0000)]
W83627DHG/W83627EHG fixups for virtual LDNs.
W83627DHG:
- Add proper "virtual LDN" handling for the LDNs that need it (i.e., those
that don't have their "enable" bit in bit 0 of the 0x30 register).
- Fix various I/O masks in the pnp_dev_info[] array as per
datasheet. Add missing PNP_IRQ0 to the W83627DHG_ACPI LDN.
W83627EHG:
- Similar to W83627DHG, improve the "virtual LDN" setup a bit (it was
mostly implemented already, though).
- Add missing PNP_IRQ0 to the W83627EHG_ACPI LDN.
Also: Fix up devicetree.cb of all boards using W83627DHG/W83627EHG to adapt
for the virtual LDNs.
include/device/pnp.h: Add comment that 'function' (which refers to the
LDN and should probably be renamed later) has to be at least 16 bits
wide. In theory LDNs could use u8, but due to the virtual LDN info being
encoded in the "high byte" of 'function' it must be at least u16.
asrock/939a785gmh/romstage.c: Drop unused GPIO6_DEV.
ibase/mb899/romstage.c: Use DUMMY_DEV instead of a specific LDN (serial
port 1 in this case) to avoid confusion. The global registers
manipulated there are accessible from any LDN.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Rudolf Marek <r.marek@assembler.cz>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6140
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Stefan Reinauer [Sat, 4 Dec 2010 20:50:39 +0000 (20:50 +0000)]
ACPI table dumping wrapper script
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6139
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Rudolf Marek [Sat, 4 Dec 2010 10:08:55 +0000 (10:08 +0000)]
Following patch removes the cut-and-paste stuff from Mahagony and fixes the _CRS object to make it work (same code as on M2V-MX SE)
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6138
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Marc Jones [Fri, 3 Dec 2010 00:45:56 +0000 (00:45 +0000)]
Update coreboot crossgcc toolchain, GCC 4.5.1, MPFR 3.0.0, GDB 7.2.
Add libelf_cv_elf_h_works=no to produce a libelf.h for Cygwin.
Add GDB patch to handle #pragma pack in the i386-elf gcc target.
Signed-off-by: Marc Jones <marcj303@gmail.com>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6137
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Zheng Bao [Thu, 2 Dec 2010 01:50:38 +0000 (01:50 +0000)]
More explicite and straight way to set seed.
The read-modify-write wasn't needed. This is easier to understand.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6136
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Rudolf Marek [Tue, 30 Nov 2010 21:21:33 +0000 (21:21 +0000)]
The patch just make the power LED on.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6135
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Rudolf Marek [Tue, 30 Nov 2010 20:18:53 +0000 (20:18 +0000)]
Fix the SPD to channel mapping. Please note that there is something wrong with UMA.
Single channel (in slot DDR1 and DDR3) produces strange artefacts on screen (and hang)
Dual Channel (in DDR1 and DDR2 aka blue slot) - works nice
All slots populated - same case as Single channel - must be something wrong with UMA.
Tested with 2x 512MB CAS 2.5 DDR400
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Rudolf Marek <r.marek@assembler.cz>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6134
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Zheng Bao [Tue, 30 Nov 2010 02:05:17 +0000 (02:05 +0000)]
Trivial. Reindent and dos2unix.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Zheng Bao <zheng.bao@amd.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6133
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