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(parent: 312fc96) | patch
Support Intel SCH (Poulsbo) and add iwave/iWRainbowG6 board
authorPatrick Georgi <patrick.georgi@coresystems.de>
Sat, 18 Dec 2010 07:48:43 +0000 (07:48 +0000)
committerPatrick Georgi <patrick.georgi@coresystems.de>
Sat, 18 Dec 2010 07:48:43 +0000 (07:48 +0000)
commitbe61a173512ece32de01562995a91fbbf3f5b335
treeacf01fc4637bc97ca0e395158254a57ae247a402tree | snapshot
parent312fc96874ff2b3fd1a839b72dd10edb1b8937b8commit | diff
Support Intel SCH (Poulsbo) and add iwave/iWRainbowG6 board
which uses it.

Compiles, but not boot tested lately.
Many things missing (eg. SMM support, proper ACPI, ...)

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6198 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
81 files changed:
src/cpu/x86/smm/smmrelocate.S diff | blob | history
src/mainboard/Kconfig diff | blob | history
src/mainboard/iwave/Kconfig [new file with mode: 0644] blob
src/mainboard/iwave/iWRainbowG6/Kconfig [new file with mode: 0644] blob
src/mainboard/iwave/iWRainbowG6/Makefile.inc [new file with mode: 0644] blob
src/mainboard/iwave/iWRainbowG6/acpi/cpu.asl [new file with mode: 0644] blob
src/mainboard/iwave/iWRainbowG6/acpi/ec.asl [new file with mode: 0644] blob
src/mainboard/iwave/iWRainbowG6/acpi/globalnvs.asl [new file with mode: 0644] blob
src/mainboard/iwave/iWRainbowG6/acpi/northbridge_pci_irqs.asl [new file with mode: 0644] blob
src/mainboard/iwave/iWRainbowG6/acpi/platform.asl [new file with mode: 0644] blob
src/mainboard/iwave/iWRainbowG6/acpi/sleepstates.asl [new file with mode: 0644] blob
src/mainboard/iwave/iWRainbowG6/acpi/southbridge_pci_irqs.asl [new file with mode: 0644] blob
src/mainboard/iwave/iWRainbowG6/acpi/superio.asl [new file with mode: 0644] blob
src/mainboard/iwave/iWRainbowG6/acpi/thermal.asl [new file with mode: 0644] blob
src/mainboard/iwave/iWRainbowG6/acpi/video.asl [new file with mode: 0644] blob
src/mainboard/iwave/iWRainbowG6/acpi_tables.c [new file with mode: 0644] blob
src/mainboard/iwave/iWRainbowG6/chip.h [new file with mode: 0644] blob
src/mainboard/iwave/iWRainbowG6/cmos.layout [new file with mode: 0644] blob
src/mainboard/iwave/iWRainbowG6/devicetree.cb [new file with mode: 0644] blob
src/mainboard/iwave/iWRainbowG6/dmi.h [new file with mode: 0644] blob
src/mainboard/iwave/iWRainbowG6/dsdt.asl [new file with mode: 0644] blob
src/mainboard/iwave/iWRainbowG6/fadt.c [new file with mode: 0644] blob
src/mainboard/iwave/iWRainbowG6/hda_verb.h [new file with mode: 0644] blob
src/mainboard/iwave/iWRainbowG6/irq_tables.c [new file with mode: 0644] blob
src/mainboard/iwave/iWRainbowG6/mainboard.c [new file with mode: 0644] blob
src/mainboard/iwave/iWRainbowG6/mainboard_smi.c [new file with mode: 0644] blob
src/mainboard/iwave/iWRainbowG6/mptable.c [new file with mode: 0644] blob
src/mainboard/iwave/iWRainbowG6/romstage.c [new file with mode: 0644] blob
src/northbridge/intel/Kconfig diff | blob | history
src/northbridge/intel/Makefile.inc diff | blob | history
src/northbridge/intel/sch/Kconfig [new file with mode: 0644] blob
src/northbridge/intel/sch/Makefile.inc [new file with mode: 0644] blob
src/northbridge/intel/sch/acpi.c [new file with mode: 0644] blob
src/northbridge/intel/sch/acpi/hostbridge.asl [new file with mode: 0644] blob
src/northbridge/intel/sch/acpi/igd.asl [new file with mode: 0644] blob
src/northbridge/intel/sch/acpi/peg.asl [new file with mode: 0644] blob
src/northbridge/intel/sch/acpi/sch.asl [new file with mode: 0644] blob
src/northbridge/intel/sch/chip.h [new file with mode: 0644] blob
src/northbridge/intel/sch/early_init.c [new file with mode: 0644] blob
src/northbridge/intel/sch/gma.c [new file with mode: 0644] blob
src/northbridge/intel/sch/northbridge.c [new file with mode: 0644] blob
src/northbridge/intel/sch/nvs.h [new file with mode: 0644] blob
src/northbridge/intel/sch/pcie_config.c [new file with mode: 0644] blob
src/northbridge/intel/sch/port_access.c [new file with mode: 0644] blob
src/northbridge/intel/sch/raminit.c [new file with mode: 0644] blob
src/northbridge/intel/sch/raminit.h [new file with mode: 0644] blob
src/northbridge/intel/sch/sch.h [new file with mode: 0644] blob
src/southbridge/intel/Kconfig diff | blob | history
src/southbridge/intel/Makefile.inc diff | blob | history
src/southbridge/intel/sch/Kconfig [new file with mode: 0644] blob
src/southbridge/intel/sch/Makefile.inc [new file with mode: 0644] blob
src/southbridge/intel/sch/acpi/ac97.asl [new file with mode: 0644] blob
src/southbridge/intel/sch/acpi/audio.asl [new file with mode: 0644] blob
src/southbridge/intel/sch/acpi/globalnvs.asl [new file with mode: 0644] blob
src/southbridge/intel/sch/acpi/irqlinks.asl [new file with mode: 0644] blob
src/southbridge/intel/sch/acpi/lpc.asl [new file with mode: 0644] blob
src/southbridge/intel/sch/acpi/pata.asl [new file with mode: 0644] blob
src/southbridge/intel/sch/acpi/pci.asl [new file with mode: 0644] blob
src/southbridge/intel/sch/acpi/pcie.asl [new file with mode: 0644] blob
src/southbridge/intel/sch/acpi/sch.asl [new file with mode: 0644] blob
src/southbridge/intel/sch/acpi/sleepstates.asl [new file with mode: 0644] blob
src/southbridge/intel/sch/acpi/smbus.asl [new file with mode: 0644] blob
src/southbridge/intel/sch/acpi/usb.asl [new file with mode: 0644] blob
src/southbridge/intel/sch/audio.c [new file with mode: 0644] blob
src/southbridge/intel/sch/chip.h [new file with mode: 0644] blob
src/southbridge/intel/sch/early_smbus.c [new file with mode: 0644] blob
src/southbridge/intel/sch/ide.c [new file with mode: 0644] blob
src/southbridge/intel/sch/lpc.c [new file with mode: 0644] blob
src/southbridge/intel/sch/mmc.c [new file with mode: 0644] blob
src/southbridge/intel/sch/pcie.c [new file with mode: 0644] blob
src/southbridge/intel/sch/reset.c [new file with mode: 0644] blob
src/southbridge/intel/sch/sch.h [new file with mode: 0644] blob
src/southbridge/intel/sch/smbus.c [new file with mode: 0644] blob
src/southbridge/intel/sch/smbus.h [new file with mode: 0644] blob
src/southbridge/intel/sch/smi.c [new file with mode: 0644] blob
src/southbridge/intel/sch/smihandler.c [new file with mode: 0644] blob
src/southbridge/intel/sch/south.c [new file with mode: 0644] blob
src/southbridge/intel/sch/usb.c [new file with mode: 0644] blob
src/southbridge/intel/sch/usb_client.c [new file with mode: 0644] blob
src/southbridge/intel/sch/usb_debug.c [new file with mode: 0644] blob
src/southbridge/intel/sch/usb_ehci.c [new file with mode: 0644] blob
my coreboot WIP stuff (asus m5a99x-evo board)