Get rid of some unneeded function prototypes in romstage.c files.

Abuild-tested.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6147 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

diff --git a/src/mainboard/a-trend/atc-6220/romstage.c b/src/mainboard/a-trend/atc-6220/romstage.c
index cf44109e065a209509af0f83dbfbd8c83b5aa790..327a13ca523473877db2aa2b5bb697cef408d9ce 100644 (file)
--- a/src/mainboard/a-trend/atc-6220/romstage.c
+++ b/src/mainboard/a-trend/atc-6220/romstage.c
@@ -36,9 +36,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
        return smbus_read_byte(device, address);

diff --git a/src/mainboard/a-trend/atc-6240/romstage.c b/src/mainboard/a-trend/atc-6240/romstage.c
index cddaffb41cf268daedb7b5c1df1e14684fdbaa78..a15dc4be98bfba350892122844539471ff4cc84f 100644 (file)
--- a/src/mainboard/a-trend/atc-6240/romstage.c
+++ b/src/mainboard/a-trend/atc-6240/romstage.c
@@ -36,9 +36,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x3f0, W83627HF_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
        return smbus_read_byte(device, address);

diff --git a/src/mainboard/abit/be6-ii_v2_0/romstage.c b/src/mainboard/abit/be6-ii_v2_0/romstage.c
index 101b1f06fb9b42b70128dd302e5a2f53a4310006..4b05e63cf0f1046f408364e6d5418e7e452e725e 100644 (file)
--- a/src/mainboard/abit/be6-ii_v2_0/romstage.c
+++ b/src/mainboard/abit/be6-ii_v2_0/romstage.c
@@ -38,9 +38,6 @@
 /* FIXME: It's a Winbond W83977EF, actually. */
 #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
        return smbus_read_byte(device, address);

diff --git a/src/mainboard/amd/mahogany_fam10/romstage.c b/src/mainboard/amd/mahogany_fam10/romstage.c
index 9079044919adca98c281619ab9933d6a3657db68..1157b008325a6baf7c93f9c7dc575a7cdb7c6590 100644 (file)
--- a/src/mainboard/amd/mahogany_fam10/romstage.c
+++ b/src/mainboard/amd/mahogany_fam10/romstage.c
@@ -42,7 +42,6 @@
 #include "northbridge/amd/amdfam10/reset_test.c"
 #include <console/loglevel.h>
 #include "cpu/x86/bist.h"
-static int smbus_read_byte(u32 device, u32 address);
 #include "superio/ite/it8718f/it8718f_early_serial.c"
 #include <usbdebug.h>
 #include "cpu/x86/mtrr/earlymtrr.c"

diff --git a/src/mainboard/amd/tilapia_fam10/romstage.c b/src/mainboard/amd/tilapia_fam10/romstage.c
index 5c7858c19bba2e6601523353d28de14456651221..ddb5076c125a84166988738770d627c29ef6e1b5 100644 (file)
--- a/src/mainboard/amd/tilapia_fam10/romstage.c
+++ b/src/mainboard/amd/tilapia_fam10/romstage.c
@@ -42,7 +42,6 @@
 #include "northbridge/amd/amdfam10/reset_test.c"
 #include <console/loglevel.h>
 #include "cpu/x86/bist.h"
-static int smbus_read_byte(u32 device, u32 address);
 #include "superio/ite/it8718f/it8718f_early_serial.c"
 #include <usbdebug.h>
 #include "cpu/x86/mtrr/earlymtrr.c"

diff --git a/src/mainboard/asus/m4a78-em/romstage.c b/src/mainboard/asus/m4a78-em/romstage.c
index 540ada64321fda57f55377a02535351f52397757..c18b58b87baa601cbe2ad8f0abeebf67783eae94 100644 (file)
--- a/src/mainboard/asus/m4a78-em/romstage.c
+++ b/src/mainboard/asus/m4a78-em/romstage.c
@@ -42,7 +42,6 @@
 #include "northbridge/amd/amdfam10/reset_test.c"
 #include <console/loglevel.h>
 #include "cpu/x86/bist.h"
-static int smbus_read_byte(u32 device, u32 address);
 #include "superio/ite/it8712f/it8712f_early_serial.c"
 #include <usbdebug.h>
 #include "cpu/x86/mtrr/earlymtrr.c"

diff --git a/src/mainboard/asus/m4a785-m/romstage.c b/src/mainboard/asus/m4a785-m/romstage.c
index 540ada64321fda57f55377a02535351f52397757..c18b58b87baa601cbe2ad8f0abeebf67783eae94 100644 (file)
--- a/src/mainboard/asus/m4a785-m/romstage.c
+++ b/src/mainboard/asus/m4a785-m/romstage.c
@@ -42,7 +42,6 @@
 #include "northbridge/amd/amdfam10/reset_test.c"
 #include <console/loglevel.h>
 #include "cpu/x86/bist.h"
-static int smbus_read_byte(u32 device, u32 address);
 #include "superio/ite/it8712f/it8712f_early_serial.c"
 #include <usbdebug.h>
 #include "cpu/x86/mtrr/earlymtrr.c"

diff --git a/src/mainboard/asus/mew-am/romstage.c b/src/mainboard/asus/mew-am/romstage.c
index aad5ed3852787f34a816df05cafb6e0edac4b3df..ea28d56843d17b580b2625dd2d5ec6ab4f3f51b6 100644 (file)
--- a/src/mainboard/asus/mew-am/romstage.c
+++ b/src/mainboard/asus/mew-am/romstage.c
@@ -34,9 +34,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 void main(unsigned long bist)
 {
        smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

diff --git a/src/mainboard/asus/mew-vm/romstage.c b/src/mainboard/asus/mew-vm/romstage.c
index 87aca12f5d348d7029afff978d2b18e3b0dd1cfd..60ae77415586e781e21240deb4167fb374786bec 100644 (file)
--- a/src/mainboard/asus/mew-vm/romstage.c
+++ b/src/mainboard/asus/mew-vm/romstage.c
@@ -34,9 +34,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x2e, LPC47B272_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 void main(unsigned long bist)
 {
        lpc47b272_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

diff --git a/src/mainboard/asus/p2b-d/romstage.c b/src/mainboard/asus/p2b-d/romstage.c
index a4abad4d09c0041738b273777f395061603a8f4b..ae09d8b8af7d44a505b8230c1e7b48da967ad2cf 100644 (file)
--- a/src/mainboard/asus/p2b-d/romstage.c
+++ b/src/mainboard/asus/p2b-d/romstage.c
@@ -37,9 +37,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
        return smbus_read_byte(device, address);

diff --git a/src/mainboard/asus/p2b-ds/romstage.c b/src/mainboard/asus/p2b-ds/romstage.c
index 31f09718476dbfb098eecab00f6d3b5197666cd5..40038b57e8c490d028ca66a3cd4dea24ed4ccdd6 100644 (file)
--- a/src/mainboard/asus/p2b-ds/romstage.c
+++ b/src/mainboard/asus/p2b-ds/romstage.c
@@ -36,9 +36,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
        return smbus_read_byte(device, address);

diff --git a/src/mainboard/asus/p2b-f/romstage.c b/src/mainboard/asus/p2b-f/romstage.c
index 41926d0bd32d6083f02141662d0cd27216b15f90..658ac408ec5942890482a39a91694f7a004fce78 100644 (file)
--- a/src/mainboard/asus/p2b-f/romstage.c
+++ b/src/mainboard/asus/p2b-f/romstage.c
@@ -38,9 +38,6 @@
 /* FIXME: The ASUS P2B-F has a Winbond W83977EF, actually. */
 #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
        return smbus_read_byte(device, address);

diff --git a/src/mainboard/asus/p2b-ls/romstage.c b/src/mainboard/asus/p2b-ls/romstage.c
index b480aa55c2965af7ebe9dde3e1c042bde1787572..0bf4172e5a2a6d9debf8fc74ec28e8bccf94999e 100644 (file)
--- a/src/mainboard/asus/p2b-ls/romstage.c
+++ b/src/mainboard/asus/p2b-ls/romstage.c
@@ -38,9 +38,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
        return smbus_read_byte(device, address);

diff --git a/src/mainboard/asus/p2b/romstage.c b/src/mainboard/asus/p2b/romstage.c
index cf44109e065a209509af0f83dbfbd8c83b5aa790..327a13ca523473877db2aa2b5bb697cef408d9ce 100644 (file)
--- a/src/mainboard/asus/p2b/romstage.c
+++ b/src/mainboard/asus/p2b/romstage.c
@@ -36,9 +36,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
        return smbus_read_byte(device, address);

diff --git a/src/mainboard/asus/p3b-f/romstage.c b/src/mainboard/asus/p3b-f/romstage.c
index 04fa6a73c354687e4995e37dad13280da92e6b41..97600fae6521e4e78ba47a5eb6d2f87cdf4825c8 100644 (file)
--- a/src/mainboard/asus/p3b-f/romstage.c
+++ b/src/mainboard/asus/p3b-f/romstage.c
@@ -35,10 +35,6 @@
 #include "superio/winbond/w83977tf/w83977tf_early_serial.c"
 #include <lib.h>
 
-void enable_pm(void);
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 /* FIXME: The ASUS P3B-F has a Winbond W83977EF, actually. */
 #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
 

diff --git a/src/mainboard/azza/pt-6ibd/romstage.c b/src/mainboard/azza/pt-6ibd/romstage.c
index 9d97c87dfcfc82020d03e71d2da62faef2e7ed6e..957a5f7eb408aafdb5713dc11d2ea5189f04aaee 100644 (file)
--- a/src/mainboard/azza/pt-6ibd/romstage.c
+++ b/src/mainboard/azza/pt-6ibd/romstage.c
@@ -38,9 +38,6 @@
 /* FIXME: It's a Winbond W83977EF, actually. */
 #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
        return smbus_read_byte(device, address);

diff --git a/src/mainboard/biostar/m6tba/romstage.c b/src/mainboard/biostar/m6tba/romstage.c
index d341e4c8b5f00c6a26a34f86b0cb1502fad37bec..697d554076cf751ceb7eff0a5312e8fed8e18cd8 100644 (file)
--- a/src/mainboard/biostar/m6tba/romstage.c
+++ b/src/mainboard/biostar/m6tba/romstage.c
@@ -36,9 +36,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x3f0, SMSCSUPERIO_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
        return smbus_read_byte(device, address);

diff --git a/src/mainboard/compaq/deskpro_en_sff_p600/romstage.c b/src/mainboard/compaq/deskpro_en_sff_p600/romstage.c
index 0f317809b736685f3ac3c8e141ed0dfd3b9a31cb..718c096976bc311ad46f0503db7d3674dd0a536c 100644 (file)
--- a/src/mainboard/compaq/deskpro_en_sff_p600/romstage.c
+++ b/src/mainboard/compaq/deskpro_en_sff_p600/romstage.c
@@ -38,9 +38,6 @@
 /* FIXME: This should be PC97307 (but it's buggy at the moment)! */
 #define SERIAL_DEV PNP_DEV(0x15c, PC97317_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
        return smbus_read_byte(device, address);

diff --git a/src/mainboard/ecs/p6iwp-fe/romstage.c b/src/mainboard/ecs/p6iwp-fe/romstage.c
index a3c1f20af055ea290c935fdaefea1482329a7b44..4e12777e645f21f522347bb6681cd25fa228e459 100644 (file)
--- a/src/mainboard/ecs/p6iwp-fe/romstage.c
+++ b/src/mainboard/ecs/p6iwp-fe/romstage.c
@@ -33,9 +33,6 @@
 #include "superio/ite/it8712f/it8712f_early_serial.c"
 #include <lib.h>
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 void main(unsigned long bist)
 {
        it8712f_24mhz_clkin();

diff --git a/src/mainboard/getac/p470/romstage.c b/src/mainboard/getac/p470/romstage.c
index c8753309999f279d2f3fe7632bbe9b20cdf8cf36..affc36a542ccf07b1c234c2a0d1f4590004702c3 100644 (file)
--- a/src/mainboard/getac/p470/romstage.c
+++ b/src/mainboard/getac/p470/romstage.c
@@ -35,8 +35,6 @@
 #include "northbridge/intel/i945/raminit.h"
 #include "southbridge/intel/i82801gx/i82801gx.h"
 
-void enable_smbus(void);
-
 void setup_ich7_gpios(void)
 {
        u32 gpios;

diff --git a/src/mainboard/gigabyte/ga-6bxc/romstage.c b/src/mainboard/gigabyte/ga-6bxc/romstage.c
index 17bf59d03aa693b3451c036d6149684e4528484e..f4ed6fa89d0e0bd123bf977566a9c59294a090c7 100644 (file)
--- a/src/mainboard/gigabyte/ga-6bxc/romstage.c
+++ b/src/mainboard/gigabyte/ga-6bxc/romstage.c
@@ -37,9 +37,6 @@ void it8671f_48mhz_clkin(void);
 
 #define SERIAL_DEV PNP_DEV(0x3f0, IT8671F_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
        return smbus_read_byte(device, address);

diff --git a/src/mainboard/gigabyte/ga-6bxe/romstage.c b/src/mainboard/gigabyte/ga-6bxe/romstage.c
index b93b87f0e78a06e7058ce9d2620ae424121639bf..31af09e62cd2abf05495ded00710be19fdb5da33 100644 (file)
--- a/src/mainboard/gigabyte/ga-6bxe/romstage.c
+++ b/src/mainboard/gigabyte/ga-6bxe/romstage.c
@@ -38,9 +38,6 @@ static void it8671f_48mhz_clkin(void);
 
 #define SERIAL_DEV PNP_DEV(0x3f0, IT8671F_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
        return smbus_read_byte(device, address);

diff --git a/src/mainboard/gigabyte/ma785gmt/romstage.c b/src/mainboard/gigabyte/ma785gmt/romstage.c
index 1f6ebdd1aad82f9f14dd847181f3073eac38dcd6..8daa2b1dcda696012d831e21ac1be53118ae502d 100644 (file)
--- a/src/mainboard/gigabyte/ma785gmt/romstage.c
+++ b/src/mainboard/gigabyte/ma785gmt/romstage.c
@@ -38,7 +38,6 @@
 #include "northbridge/amd/amdfam10/reset_test.c"
 #include <console/loglevel.h>
 #include "cpu/x86/bist.h"
-static int smbus_read_byte(u32 device, u32 address);
 #include "superio/ite/it8718f/it8718f_early_serial.c"
 #include <usbdebug.h>
 #include "cpu/x86/mtrr/earlymtrr.c"

diff --git a/src/mainboard/gigabyte/ma78gm/romstage.c b/src/mainboard/gigabyte/ma78gm/romstage.c
index 21f80c25672a859a841a873777d205fc4b82e366..bbf1f58a70f505c1b303b79a29c562d837f8456a 100644 (file)
--- a/src/mainboard/gigabyte/ma78gm/romstage.c
+++ b/src/mainboard/gigabyte/ma78gm/romstage.c
@@ -42,7 +42,6 @@
 #include "northbridge/amd/amdfam10/reset_test.c"
 #include <console/loglevel.h>
 #include "cpu/x86/bist.h"
-static int smbus_read_byte(u32 device, u32 address);
 #include "superio/ite/it8718f/it8718f_early_serial.c"
 #include <usbdebug.h>
 #include "cpu/x86/mtrr/earlymtrr.c"

diff --git a/src/mainboard/hp/e_vectra_p2706t/romstage.c b/src/mainboard/hp/e_vectra_p2706t/romstage.c
index 776b841b6bc85295a4831003193c14655beb010e..1ecc686ddb0cb8f33918d7bc6c6ef80556380f14 100644 (file)
--- a/src/mainboard/hp/e_vectra_p2706t/romstage.c
+++ b/src/mainboard/hp/e_vectra_p2706t/romstage.c
@@ -38,9 +38,6 @@
 /* TODO: It's a PC87364 actually! */
 #define SERIAL_DEV PNP_DEV(0x2e, PC87360_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 void main(unsigned long bist)
 {
        /* TODO: It's a PC87364 actually! */

diff --git a/src/mainboard/ibase/mb899/romstage.c b/src/mainboard/ibase/mb899/romstage.c
index 990263012239f2e32c07d9749f5202c9d1daf3ec..f85fa16af556f021de29416f919280f75b98ca27 100644 (file)
--- a/src/mainboard/ibase/mb899/romstage.c
+++ b/src/mainboard/ibase/mb899/romstage.c
@@ -40,8 +40,6 @@
 #define SERIAL_DEV PNP_DEV(0x4e, W83627EHG_SP1)
 #define DUMMY_DEV PNP_DEV(0x4e, 0)
 
-void enable_smbus(void);
-
 void setup_ich7_gpios(void)
 {
        printk(BIOS_DEBUG, " GPIOS...");

diff --git a/src/mainboard/iei/kino-780am2-fam10/romstage.c b/src/mainboard/iei/kino-780am2-fam10/romstage.c
index 8ef205aab787c14127745f205eb6463cc1219f66..86da8f6c87eef64b2ff8517e1cc37c5909ffdd83 100644 (file)
--- a/src/mainboard/iei/kino-780am2-fam10/romstage.c
+++ b/src/mainboard/iei/kino-780am2-fam10/romstage.c
@@ -42,7 +42,6 @@
 #include "northbridge/amd/amdfam10/reset_test.c"
 #include <console/loglevel.h>
 #include "cpu/x86/bist.h"
-static int smbus_read_byte(u32 device, u32 address);
 #include "superio/fintek/f71859/f71859_early_serial.c"
 #include <usbdebug.h>
 #include "cpu/x86/mtrr/earlymtrr.c"

diff --git a/src/mainboard/intel/d810e2cb/romstage.c b/src/mainboard/intel/d810e2cb/romstage.c
index fcdbb3156e513d99f1d445a9d08eeabf1ec552c5..81e2d5d3487141f4fb819862139ba8cbcd13054b 100644 (file)
--- a/src/mainboard/intel/d810e2cb/romstage.c
+++ b/src/mainboard/intel/d810e2cb/romstage.c
@@ -35,9 +35,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x4e, SMSCSUPERIO_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 void main(unsigned long bist)
 {
        /* Set southbridge and Super I/O GPIOs. */

diff --git a/src/mainboard/intel/d945gclf/romstage.c b/src/mainboard/intel/d945gclf/romstage.c
index 8b79f2dc571de7f6a93a22a3a5dfe4c106189de0..8b02163ab89481022fa318ed77ac50007c824442 100644 (file)
--- a/src/mainboard/intel/d945gclf/romstage.c
+++ b/src/mainboard/intel/d945gclf/romstage.c
@@ -39,8 +39,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627THG_SP1)
 
-void enable_smbus(void);
-
 void setup_ich7_gpios(void)
 {
        /* TODO: This is highly board specific and should be moved */

diff --git a/src/mainboard/jetway/pa78vm5/romstage.c b/src/mainboard/jetway/pa78vm5/romstage.c
index a1688dfcb781a3b9f1f89011d646a9f40ce9f968..4711aecfdd5a96ab16407d86213cdbc37e38f1e6 100644 (file)
--- a/src/mainboard/jetway/pa78vm5/romstage.c
+++ b/src/mainboard/jetway/pa78vm5/romstage.c
@@ -43,7 +43,6 @@
 #include "northbridge/amd/amdfam10/reset_test.c"
 #include <console/loglevel.h>
 #include "cpu/x86/bist.h"
-static int smbus_read_byte(u32 device, u32 address);
 #include "superio/fintek/f71863fg/f71863fg_early_serial.c"
 #include <usbdebug.h>
 #include "cpu/x86/mtrr/earlymtrr.c"

diff --git a/src/mainboard/kontron/986lcd-m/romstage.c b/src/mainboard/kontron/986lcd-m/romstage.c
index 59d54d260f991e56267cbc4facbe398511dc9f31..bd42f5f68ec7e56357e8176c83d4b63c29c02385 100644 (file)
--- a/src/mainboard/kontron/986lcd-m/romstage.c
+++ b/src/mainboard/kontron/986lcd-m/romstage.c
@@ -34,7 +34,6 @@
 #include <console/console.h>
 #include <cpu/x86/bist.h>
 #include "superio/winbond/w83627thg/w83627thg_early_serial.c"
-void enable_smbus(void);
 #include "northbridge/intel/i945/i945.h"
 #include "northbridge/intel/i945/raminit.h"
 #include "southbridge/intel/i82801gx/i82801gx.h"

diff --git a/src/mainboard/mitac/6513wu/romstage.c b/src/mainboard/mitac/6513wu/romstage.c
index a46e5673f8b7d6f93afdfc7b66d81935b1e76610..d0cdc178be96d0a6381e47ba2d9a8b9b837d5511 100644 (file)
--- a/src/mainboard/mitac/6513wu/romstage.c
+++ b/src/mainboard/mitac/6513wu/romstage.c
@@ -35,9 +35,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x4e, SMSCSUPERIO_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 void main(unsigned long bist)
 {
        smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

diff --git a/src/mainboard/msi/ms6119/romstage.c b/src/mainboard/msi/ms6119/romstage.c
index 23b727733e68633500bf6e3ef023df9a87b026fd..950c838ebcfa830e509c56bf0587a31b84e99419 100644 (file)
--- a/src/mainboard/msi/ms6119/romstage.c
+++ b/src/mainboard/msi/ms6119/romstage.c
@@ -36,9 +36,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
        return smbus_read_byte(device, address);

diff --git a/src/mainboard/msi/ms6147/romstage.c b/src/mainboard/msi/ms6147/romstage.c
index 2740abb7a8f226872b3408cf86169b866aa29f82..b3b40b21f1c9d25e7d8b8b919df97e56ca61b1c9 100644 (file)
--- a/src/mainboard/msi/ms6147/romstage.c
+++ b/src/mainboard/msi/ms6147/romstage.c
@@ -36,9 +36,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
        return smbus_read_byte(device, address);

diff --git a/src/mainboard/msi/ms6156/romstage.c b/src/mainboard/msi/ms6156/romstage.c
index 630f313b1b7290167dcb2307db14e1d04038c806..04b25208b24e24e65595309f6d7091a831ce5c3b 100644 (file)
--- a/src/mainboard/msi/ms6156/romstage.c
+++ b/src/mainboard/msi/ms6156/romstage.c
@@ -36,9 +36,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
        return smbus_read_byte(device, address);

diff --git a/src/mainboard/msi/ms6178/romstage.c b/src/mainboard/msi/ms6178/romstage.c
index 19d4c81488ecfe8071b6057d87dcd577b1f569ed..dd3a5226a89c4c61930007ed58b7601f7e701d70 100644 (file)
--- a/src/mainboard/msi/ms6178/romstage.c
+++ b/src/mainboard/msi/ms6178/romstage.c
@@ -35,9 +35,6 @@
 #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
 #define DUMMY_DEV PNP_DEV(0x2e, 0)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 void main(unsigned long bist)
 {
        w83627hf_set_clksel_48(DUMMY_DEV);

diff --git a/src/mainboard/nec/powermate2000/romstage.c b/src/mainboard/nec/powermate2000/romstage.c
index 0444b08d5c55df959e37eecaad79485e373d6e1b..95fa3b20ec28937f3b24bf8a695d54fd7d0b1550 100644 (file)
--- a/src/mainboard/nec/powermate2000/romstage.c
+++ b/src/mainboard/nec/powermate2000/romstage.c
@@ -34,9 +34,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 void main(unsigned long bist)
 {
        smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

diff --git a/src/mainboard/nokia/ip530/romstage.c b/src/mainboard/nokia/ip530/romstage.c
index fdffbf9d0698480b4fb62aef37f2ae2fca9d240e..b3f29de016de6d38380ff2cd164268cf518513ae 100644 (file)
--- a/src/mainboard/nokia/ip530/romstage.c
+++ b/src/mainboard/nokia/ip530/romstage.c
@@ -36,9 +36,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x3f0, SMSCSUPERIO_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
        return smbus_read_byte(device, address);

diff --git a/src/mainboard/roda/rk886ex/romstage.c b/src/mainboard/roda/rk886ex/romstage.c
index 109d2e81020666b5d65f28dbc5b93b6a8a04c8db..85d163baf8347026f7d90f315c145068befc4b98 100644 (file)
--- a/src/mainboard/roda/rk886ex/romstage.c
+++ b/src/mainboard/roda/rk886ex/romstage.c
@@ -37,8 +37,6 @@
 #include "northbridge/intel/i945/raminit.h"
 #include "southbridge/intel/i82801gx/i82801gx.h"
 
-void enable_smbus(void);
-
 void setup_ich7_gpios(void)
 {
        printk(BIOS_DEBUG, " GPIOS...");

diff --git a/src/mainboard/soyo/sy-6ba-plus-iii/romstage.c b/src/mainboard/soyo/sy-6ba-plus-iii/romstage.c
index 99eb7b6b717395c8ff0686688fe943e6646d82f4..de87edb4515fe7560bcd97530562746037d03891 100644 (file)
--- a/src/mainboard/soyo/sy-6ba-plus-iii/romstage.c
+++ b/src/mainboard/soyo/sy-6ba-plus-iii/romstage.c
@@ -37,9 +37,6 @@ void it8671f_48mhz_clkin(void);
 
 #define SERIAL_DEV PNP_DEV(0x370, IT8671F_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
        return smbus_read_byte(device, address);

diff --git a/src/mainboard/tyan/s1846/romstage.c b/src/mainboard/tyan/s1846/romstage.c
index 8cb436be0f46ec2646c58cf544eced8ea491fd61..fb48f0702e8f7c911f434eebf8e078adcbd186bb 100644 (file)
--- a/src/mainboard/tyan/s1846/romstage.c
+++ b/src/mainboard/tyan/s1846/romstage.c
@@ -36,9 +36,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x2e, PC87309_SP1)
 
-void enable_smbus(void);
-int smbus_read_byte(u8 device, u8 address);
-
 int spd_read_byte(unsigned int device, unsigned int address)
 {
        return smbus_read_byte(device, address);

diff --git a/src/northbridge/intel/i945/i945.h b/src/northbridge/intel/i945/i945.h
index 477c4a559d2805b7d8c825aa625247a168b7de50..bd111405440c3f824cc932fc507ccd6711cc9ff3 100644 (file)
--- a/src/northbridge/intel/i945/i945.h
+++ b/src/northbridge/intel/i945/i945.h
@@ -337,9 +337,6 @@ int i945_silicon_revision(void);
 void i945_early_initialization(void);
 void i945_late_initialization(void);
 
-/* provided by southbridge code */
-int smbus_read_byte(unsigned device, unsigned address);
-
 /* provided by mainboard code */
 void setup_ich7_gpios(void);
 

diff --git a/src/southbridge/intel/i82371eb/i82371eb.h b/src/southbridge/intel/i82371eb/i82371eb.h
index 2fcad8d6ee28bccd00e28d30287f1ab6862490b3..709b8327a81851774f241e9f031bdda608689e7c 100644 (file)
--- a/src/southbridge/intel/i82371eb/i82371eb.h
+++ b/src/southbridge/intel/i82371eb/i82371eb.h
@@ -36,6 +36,12 @@ void i82371eb_hard_reset(void);
 #endif
 #endif
 
+#if defined(__PRE_RAM__) && !defined(__ROMCC__)
+void enable_smbus(void);
+int smbus_read_byte(u8 device, u8 address);
+void enable_pm(void);
+#endif
+
 /* If 'cond' is true this macro sets the bit(s) specified by 'bits' in the
  * 'reg' variable, otherwise it clears those bits.
  *

diff --git a/src/southbridge/intel/i82371eb/i82371eb_early_pm.c b/src/southbridge/intel/i82371eb/i82371eb_early_pm.c
index 66c2712b7b8d383fdb694c2cabcc8664b8b0e683..5e52985428884db0c62e0f7638a45381646bd5f4 100644 (file)
--- a/src/southbridge/intel/i82371eb/i82371eb_early_pm.c
+++ b/src/southbridge/intel/i82371eb/i82371eb_early_pm.c
@@ -26,8 +26,6 @@
 #include <console/console.h>
 #include "i82371eb.h"
 
-void enable_pm(void);
-
 void enable_pm(void)
 {
        device_t dev;

diff --git a/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c b/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c
index b7c79075eb02144e96685116abb1a3c87b4dca0f..8505762933bf9246fc13ad972e77532d8666ae9a 100644 (file)
--- a/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c
+++ b/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c
@@ -27,8 +27,6 @@
 #include "i82371eb.h"
 #include "i82371eb_smbus.h"
 
-int smbus_read_byte(u8 device, u8 address);
-
 void enable_smbus(void)
 {
        device_t dev;

diff --git a/src/southbridge/intel/i82371eb/i82371eb_smbus.h b/src/southbridge/intel/i82371eb/i82371eb_smbus.h
index 54e7906223a06745d1da1732fa410bb10fe56ace..f82f2edc739511096ac424eb8aa6d829906490e4 100644 (file)
--- a/src/southbridge/intel/i82371eb/i82371eb_smbus.h
+++ b/src/southbridge/intel/i82371eb/i82371eb_smbus.h
@@ -1,4 +1,5 @@
 #include <device/smbus_def.h>
+#include "i82371eb.h"
 
 #define SMBHST_STATUS  0x0
 #define SMBHST_CTL     0x2
@@ -10,7 +11,6 @@
 #define SMBUS_STATUS_MASK 0x1e
 #define SMBUS_ERROR_FLAG (1<<2)
 
-void enable_smbus(void);
 int do_smbus_read_byte(unsigned smbus_io_base, unsigned device, unsigned address);
 
 static inline void smbus_delay(void)

diff --git a/src/southbridge/intel/i82801ax/i82801ax.h b/src/southbridge/intel/i82801ax/i82801ax.h
index 585de6e3c4c95394223febbd79319d9071d7c7fb..bd192e019e2bfc9c3d67613986d10749e7144757 100644 (file)
--- a/src/southbridge/intel/i82801ax/i82801ax.h
+++ b/src/southbridge/intel/i82801ax/i82801ax.h
@@ -23,7 +23,12 @@
 
 #if !defined(__PRE_RAM__)
 #include "chip.h"
-extern void i82801ax_enable(device_t dev);
+void i82801ax_enable(device_t dev);
+#endif
+
+#if defined(__PRE_RAM__) && !defined(__ROMCC__)
+void enable_smbus(void);
+int smbus_read_byte(u8 device, u8 address);
 #endif
 
 #define SMBUS_IO_BASE          0x0f00

diff --git a/src/southbridge/intel/i82801ax/i82801ax_early_smbus.c b/src/southbridge/intel/i82801ax/i82801ax_early_smbus.c
index d30ed57e07d0d9f2d63afa91cac57fc74bb8fde5..dca3a28eec615305413175807802017322a2abbc 100644 (file)
--- a/src/southbridge/intel/i82801ax/i82801ax_early_smbus.c
+++ b/src/southbridge/intel/i82801ax/i82801ax_early_smbus.c
@@ -28,8 +28,6 @@
 #include "i82801ax.h"
 #include "i82801ax_smbus.h"
 
-int smbus_read_byte(u8 device, u8 address);
-
 void enable_smbus(void)
 {
        device_t dev;

diff --git a/src/southbridge/intel/i82801ax/i82801ax_smbus.h b/src/southbridge/intel/i82801ax/i82801ax_smbus.h
index bf7a479a492acdb31f276b8ddf27b7ac2c6cef57..26893a76d997f1987b5694b65c2dc0f03004306b 100644 (file)
--- a/src/southbridge/intel/i82801ax/i82801ax_smbus.h
+++ b/src/southbridge/intel/i82801ax/i82801ax_smbus.h
@@ -19,8 +19,8 @@
  */
 
 #include <device/smbus_def.h>
+#include "i82801ax.h"
 
-void enable_smbus(void);
 int do_smbus_read_byte(u16 smbus_io_base, u8 device, u8 address);
 
 static void smbus_delay(void)

diff --git a/src/southbridge/intel/i82801bx/i82801bx.h b/src/southbridge/intel/i82801bx/i82801bx.h
index eae6de6d86d2ed24be148cff2172826e8752ed3c..090cddfbaef63b4f1ca3aff1bd76765e2e46c330 100644 (file)
--- a/src/southbridge/intel/i82801bx/i82801bx.h
+++ b/src/southbridge/intel/i82801bx/i82801bx.h
@@ -26,6 +26,11 @@
 extern void i82801bx_enable(device_t dev);
 #endif
 
+#if defined(__PRE_RAM__) && !defined(__ROMCC__)
+void enable_smbus(void);
+int smbus_read_byte(u8 device, u8 address);
+#endif
+
 #define SMBUS_IO_BASE          0x0f00
 #define PMBASE_ADDR            0x0400
 #define GPIO_BASE_ADDR         0x0500

diff --git a/src/southbridge/intel/i82801bx/i82801bx_early_smbus.c b/src/southbridge/intel/i82801bx/i82801bx_early_smbus.c
index 92a5403edd0671398fbf2d021dc6560dfec809ce..6a2097ea14165e5bf8e060426198993716ba46d9 100644 (file)
--- a/src/southbridge/intel/i82801bx/i82801bx_early_smbus.c
+++ b/src/southbridge/intel/i82801bx/i82801bx_early_smbus.c
@@ -28,8 +28,6 @@
 #include "i82801bx.h"
 #include "i82801bx_smbus.h"
 
-int smbus_read_byte(u8 device, u8 address);
-
 void enable_smbus(void)
 {
        device_t dev;

diff --git a/src/southbridge/intel/i82801bx/i82801bx_smbus.h b/src/southbridge/intel/i82801bx/i82801bx_smbus.h
index 066feade070d5976638ed20f2354dce1f28c3f6c..c04e9dc8d3b000458b69f1e91b1e70feb01e6f32 100644 (file)
--- a/src/southbridge/intel/i82801bx/i82801bx_smbus.h
+++ b/src/southbridge/intel/i82801bx/i82801bx_smbus.h
@@ -20,8 +20,6 @@
 
 #include <device/smbus_def.h>
 
-void enable_smbus(void);
-
 static void smbus_delay(void)
 {
        inb(0x80);

diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h
index f6a54e94d5029f3b282aaab7dc104d43f9ba0f64..37bcf572b9e9416a9a4ee5afa2eaba913be12cdb 100644 (file)
--- a/src/southbridge/intel/i82801gx/i82801gx.h
+++ b/src/southbridge/intel/i82801gx/i82801gx.h
@@ -46,6 +46,11 @@ extern void i82801gx_enable(device_t dev);
 void i82801gx_enable_usbdebug(unsigned int port);
 #endif
 
+#if defined(__PRE_RAM__) && !defined(__ROMCC__) && !defined(ASSEMBLY)
+void enable_smbus(void);
+int smbus_read_byte(unsigned device, unsigned address);
+#endif
+
 #define MAINBOARD_POWER_OFF    0
 #define MAINBOARD_POWER_ON     1
 #define MAINBOARD_POWER_KEEP   2

diff --git a/src/southbridge/intel/i82801gx/i82801gx_early_smbus.c b/src/southbridge/intel/i82801gx/i82801gx_early_smbus.c
index 658b4831652b8c337fc4871dea0ffb404b0c3bff..0298cc94cd4fb303102404c0e739b6b5deb43549 100644 (file)
--- a/src/southbridge/intel/i82801gx/i82801gx_early_smbus.c
+++ b/src/southbridge/intel/i82801gx/i82801gx_early_smbus.c
@@ -26,8 +26,6 @@
 #include "i82801gx.h"
 #include "i82801gx_smbus.h"
 
-int smbus_read_byte(unsigned device, unsigned address);
-
 void enable_smbus(void)
 {
        device_t dev;

diff --git a/src/southbridge/intel/i82801gx/i82801gx_smbus.h b/src/southbridge/intel/i82801gx/i82801gx_smbus.h
index d1aaf5b517086ab0ad6acebe616c90dcb20b732f..a03e4cd9571c7a55eafe51db05c30cfa459d0f92 100644 (file)
--- a/src/southbridge/intel/i82801gx/i82801gx_smbus.h
+++ b/src/southbridge/intel/i82801gx/i82801gx_smbus.h
@@ -19,8 +19,7 @@
  */
 
 #include <device/smbus_def.h>
-
-void enable_smbus(void);
+#include "i82801gx.h"
 
 static void smbus_delay(void)
 {