Patrick Georgi [Fri, 1 Oct 2010 14:50:12 +0000 (14:50 +0000)]
Move CACHE_AS_RAM_ADDRESS_DEBUG out of romstage.c into Kconfig,
rename it slightly, make it visible only on relevant northbridges,
drop it entirely from via boards (as they seem to have picked it
up from AMD code without using it themselves), and make it
default to false for all boards.
Some romstages used to set this to "true" (ie. "print debug output"),
but I didn't follow up on it in Kconfig - if you need it to debug CAR,
enable it yourself.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5898
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Fri, 1 Oct 2010 12:24:57 +0000 (12:24 +0000)]
fix VIA C7 code.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5897
2b7e53f0-3cfb-0310-b3e9-
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Patrick Georgi [Fri, 1 Oct 2010 11:34:05 +0000 (11:34 +0000)]
ICS951462_ADDRESS defined but _never_ used. Drop it.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5896
2b7e53f0-3cfb-0310-b3e9-
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Peter Stuge [Fri, 1 Oct 2010 10:02:33 +0000 (10:02 +0000)]
Make i945/raminit.c:fsbclk() return u16 rather than int
This is needed for Gentoo gcc-4.1.2 to build the i945 code. A warning is
thrown because the comparison in the last hunk is between u16 and -1 and
can never be true.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5895
2b7e53f0-3cfb-0310-b3e9-
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Patrick Georgi [Fri, 1 Oct 2010 09:58:44 +0000 (09:58 +0000)]
Remove a couple of defines that seem to be the result of
copy&paste, without actually being used.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5894
2b7e53f0-3cfb-0310-b3e9-
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Peter Stuge [Fri, 1 Oct 2010 09:13:18 +0000 (09:13 +0000)]
Split NORTHBRIDGE_INTEL_I945 into more precise _I945GC and _I945GM
Both chipsets use the src/northbridge/intel/i945 code but that code
needs to know which chipset is actually used. Having separate
NORTHBRIDGE_ options allows the I945GC/I945GM choice to be removed
since code can test the NORTHBRIDGE_ option directly.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5893
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Fri, 1 Oct 2010 09:11:15 +0000 (09:11 +0000)]
Add missing parenthesis (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5892
2b7e53f0-3cfb-0310-b3e9-
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Patrick Georgi [Fri, 1 Oct 2010 08:02:45 +0000 (08:02 +0000)]
Move several i945 config #defines from romstage.c to Kconfig.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5891
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Fri, 1 Oct 2010 07:27:51 +0000 (07:27 +0000)]
CAR simplifications, typos, readability improvements (trivial).
- Use some more #defines instead of hard-coding values.
- Merge multiple movl/orl or movl/andl lines into one where possible.
- Add some TODOs in places which seem to have either an incorrect
code or incorrect comment.
- Fix typos: s/for/from/, s/BSC/BSP/, s/size/carsize/.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5890
2b7e53f0-3cfb-0310-b3e9-
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Zheng Bao [Fri, 1 Oct 2010 06:27:35 +0000 (06:27 +0000)]
Trivial. Re-indent the code.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Zheng Bao <zheng.bao@amd.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5889
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Thu, 30 Sep 2010 23:15:36 +0000 (23:15 +0000)]
Various cosmetic and coding style fixes in CAR code (trivial).
Also, whitespace fixes, consistency fixes, and drop some of the less
useful comments.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5888
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Thu, 30 Sep 2010 21:22:40 +0000 (21:22 +0000)]
Use existing, readable MTRR #defines instead of hardcoding numbers.
Replace $0x200 with $MTRRphysBase_MSR(0) etc. Also, move some #ifdef stuff
a little bit around (should not affect any functionality) to make the
Intel/AMD/VIA CAR implementations more similar and easier to compare.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5887
2b7e53f0-3cfb-0310-b3e9-
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Patrick Georgi [Thu, 30 Sep 2010 16:55:02 +0000 (16:55 +0000)]
Rename build system variables to be more intuitive, and
at the same time let the user specify sources instead
of object files:
- objs becomes ramstage-srcs
- initobjs becomes romstage-srcs
- driver becomes driver-srcs
- smmobj becomes smm-srcs
The user servicable parts are named accordingly:
ramstage-y, romstage-y, driver-y, smm-y
Also, the object file names are properly renamed now, using
.ramstage.o, .romstage.o, .driver.o, .smm.o suffixes consistently.
Remove stubbed out via/epia-m700 dsdt/ssdt files - they didn't
easily fit in the build system and aren't useful anyway.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coreystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5886
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Thu, 30 Sep 2010 07:56:12 +0000 (07:56 +0000)]
fix Kontron KT690 and clean up socket S1G1 boards accordingly.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5885
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Thu, 30 Sep 2010 07:45:58 +0000 (07:45 +0000)]
drop unneeded earlymtrr.c include
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5884
2b7e53f0-3cfb-0310-b3e9-
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Warren Turkal [Thu, 30 Sep 2010 03:35:00 +0000 (03:35 +0000)]
Move CAR settings to board config for socket 940 boards.
For the a number of the socket 940 based machines, I collapsed their CAR
configurations into the socket config.
However, I have kept a number of overrides in place for the following
machines:
* broadcom/blast
* ibm/e32{5,6}
* newisys/khepri
* sunw/ultra40
* tyan/s488{0,2}
These machines used different setting than the defaults for socket 940
systems.
Signed-off-by: Warren Turkal <wt@penguintechs.org>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5883
2b7e53f0-3cfb-0310-b3e9-
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Warren Turkal [Thu, 30 Sep 2010 03:13:21 +0000 (03:13 +0000)]
Move VIA C7 board CAR config to VIA C7 instead of boards.
This change is somewhat dangerous as it enables CAR for some boards that
it was not enabled for before.
Signed-off-by: Warren Turkal <wt@penguintechs.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5882
2b7e53f0-3cfb-0310-b3e9-
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Patrick Georgi [Wed, 29 Sep 2010 20:28:59 +0000 (20:28 +0000)]
Don't run clean-abuild on distclean target. It breaks full abuild runs.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5881
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Wed, 29 Sep 2010 10:51:05 +0000 (10:51 +0000)]
Forgot to 'svn add' src/cpu/x86/name (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5880
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Wed, 29 Sep 2010 09:54:16 +0000 (09:54 +0000)]
Factor out fill_processor_name() and strcpy() functions.
The fill_processor_name() function was duplicated in multiple
model_*_init.c files, move it into a new src/cpu/x86/name
directory.
The strcpy() function was also duplicated multiple times, move it
to <string.h> where we already have similar functions.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5879
2b7e53f0-3cfb-0310-b3e9-
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Jonathan Kollasch [Tue, 28 Sep 2010 21:11:48 +0000 (21:11 +0000)]
As $PWD is not exported by all shells, use make-builtin $(CURDIR)
instead of $(PWD).
Signed-off-by: Jonathan Kollasch <jakllsch@kollasch.net>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5878
2b7e53f0-3cfb-0310-b3e9-
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Warren Turkal [Tue, 28 Sep 2010 21:02:03 +0000 (21:02 +0000)]
Fix small typo in root Makefile.
Signed-off-by: Warren Turkal <wt@penguintechs.org>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5877
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Tue, 28 Sep 2010 17:48:24 +0000 (17:48 +0000)]
Drop some unneeded "#if CONFIG_USBDEBUG" (trivial).
We don't surround the <usbdebug.h> #include with those checks in other
places either. Abuild-tested.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5876
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Myles Watson [Tue, 28 Sep 2010 16:16:58 +0000 (16:16 +0000)]
Remove redundant HW_MEM_HOLE_SIZEK and HW_MEM_HOLE_SIZE_AUTO_INC settings.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5875
2b7e53f0-3cfb-0310-b3e9-
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Zheng Bao [Tue, 28 Sep 2010 04:43:16 +0000 (04:43 +0000)]
Trivial. re-Indent the code.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Zheng Bao <zheng.bao@amd.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5874
2b7e53f0-3cfb-0310-b3e9-
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Warren Turkal [Mon, 27 Sep 2010 21:28:21 +0000 (21:28 +0000)]
I missed these boards in a previous commit.
Signed-off-by: Warren Turkal <wt@penguintechs.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5873
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Mon, 27 Sep 2010 21:26:46 +0000 (21:26 +0000)]
Good bye, OLPC...
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Nils Jacobs <njacobs8@hetnet.nl>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5872
2b7e53f0-3cfb-0310-b3e9-
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Warren Turkal [Mon, 27 Sep 2010 21:18:26 +0000 (21:18 +0000)]
All these boards already had the CACHE_AS_RAM option in their individual
configs. I just moved it the the CPU that they all use.
Signed-off-by: Warren Turkal <wt@penguintechs.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5871
2b7e53f0-3cfb-0310-b3e9-
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Warren Turkal [Mon, 27 Sep 2010 21:15:56 +0000 (21:15 +0000)]
Move CAR config from mainboard to CPU config for AMD GX2 boards.
Signed-off-by: Warren Turkal <wt@penguintechs.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5870
2b7e53f0-3cfb-0310-b3e9-
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Warren Turkal [Mon, 27 Sep 2010 21:14:19 +0000 (21:14 +0000)]
The commandline parsing for abuild doing a couple of buggy things:
* Long options of the form --opt=arg were not having the arg stripped
off into a another argument in the output. As a result, all long
options with args had to be written like "--opt arg" on the command
line to be recognized.
* The --remove option was shifting too many times.
As a bonus, I also added some logic to make "make distclean" cleanup
the default abuild build dir.
Signed-off-by: Warren Turkal <wt@penguintechs.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5869
2b7e53f0-3cfb-0310-b3e9-
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Warren Turkal [Mon, 27 Sep 2010 21:11:54 +0000 (21:11 +0000)]
This patch moves one of the CAR configs to the socket from the single
mainboard that uses it.
Signed-off-by: Warren Turkal <wt@penguintechs.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5868
2b7e53f0-3cfb-0310-b3e9-
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Xavi Drudis Ferran [Mon, 27 Sep 2010 21:08:40 +0000 (21:08 +0000)]
Obviously missing brackets.
Signed-off-by: Xavi Drudis Ferran <xdrudis@tinet.cat>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5867
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Mon, 27 Sep 2010 21:00:34 +0000 (21:00 +0000)]
drop some dead code from model_fxx_init.c
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5866
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Mon, 27 Sep 2010 20:51:33 +0000 (20:51 +0000)]
oops. always run abuild on a clean tree with no other patches applied.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5865
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Mon, 27 Sep 2010 18:57:07 +0000 (18:57 +0000)]
RAMBASE = 0x4000 is no longer needed. Drop it.
Now we only need to clean out the FAM10 stack mess and we're good to go with a
uniform RAMBASE.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5864
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Mon, 27 Sep 2010 18:55:00 +0000 (18:55 +0000)]
drop excessive blank line
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5863
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Mon, 27 Sep 2010 18:49:46 +0000 (18:49 +0000)]
Add 2 missing license headers based on svn logs and remove an unneeded #include
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5862
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Mon, 27 Sep 2010 18:48:15 +0000 (18:48 +0000)]
minor include cleanups
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5861
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Mon, 27 Sep 2010 18:03:18 +0000 (18:03 +0000)]
Add a kconfig option to allow the user to select a specific physical
USB port for use as Debug Port (on chipsets which support that).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5860
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Mon, 27 Sep 2010 17:53:17 +0000 (17:53 +0000)]
Add a few missing license headers based on svn logs, and also add a
few more code comments to src/cpu/x86/*.inc files.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5859
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Mon, 27 Sep 2010 11:11:09 +0000 (11:11 +0000)]
drop double include (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5858
2b7e53f0-3cfb-0310-b3e9-
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Jonathan Kollasch [Sun, 26 Sep 2010 16:01:08 +0000 (16:01 +0000)]
Duplicate the MCP55 EHCI Debug Port enable code for use with CK804.
Signed-off-by: Jonathan Kollasch <jakllsch@kollasch.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5857
2b7e53f0-3cfb-0310-b3e9-
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Warren Turkal [Sun, 26 Sep 2010 15:23:28 +0000 (15:23 +0000)]
i82801bx defines the hard reset function, so move the "select" statement to
that component rather than the mainboard.
The intel/
d810e2cb is the only board using the i82801bx southbridge.
Signed-off-by: Warren Turkal <wt@penguintechs.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5856
2b7e53f0-3cfb-0310-b3e9-
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Warren Turkal [Sun, 26 Sep 2010 15:20:56 +0000 (15:20 +0000)]
Remove hard reset config from some mainboard configs
Most of the mainboards with i82801gx SBs seem to use the
HAVE_HARD_RESET, which is already selected in the i82801gx SB config.
Removing it from some of those boards should be a functional no-op.
Signed-off-by: Warren Turkal <wt@penguintechs.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5855
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Sun, 26 Sep 2010 15:19:44 +0000 (15:19 +0000)]
drop some more unneeded ../../..
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5854
2b7e53f0-3cfb-0310-b3e9-
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Warren Turkal [Sun, 26 Sep 2010 15:18:21 +0000 (15:18 +0000)]
Normalize the config option for the Intel Atom CPU.
All Intel CPU models appear to be identified with the form
INTEL_CPU_MODEL_xxxxx. I haved changed the Atom to fit this normal form.
A side effect is that the CPU doesn't need to be listed on the boards
that support it since the socket identifies the CPUs it supports.
Signed-off-by: Warren Turkal <wt@penguintechs.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5853
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Sun, 26 Sep 2010 15:15:48 +0000 (15:15 +0000)]
the utility is called dumpmmcr, not dump_mmcr
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5852
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Sun, 26 Sep 2010 15:04:46 +0000 (15:04 +0000)]
dumpmmcr utility is available under util and shares most of the code.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5851
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Sun, 26 Sep 2010 15:04:14 +0000 (15:04 +0000)]
update license header for dumpmmcr utility according to svn history.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5850
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Sun, 26 Sep 2010 10:34:36 +0000 (10:34 +0000)]
Fix the build, CONFIG_USBDEBUG must always be defined (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5849
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Sun, 26 Sep 2010 07:35:55 +0000 (07:35 +0000)]
Only show the USB Debug Port kconfig option to the user if a mainboard
is selected that uses a chipset which actually has that functionality _and_
we have code to initialize the Debug Port in coreboot (for that chipset).
Also, remove the duplicate list of PCI IDs and just link to the wiki page at:
http://www.coreboot.org/EHCI_Debug_Port
The list is now less useful in the kconfig help as this option will only
appear for those boards where it's actually supported.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5848
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Sat, 25 Sep 2010 23:47:15 +0000 (23:47 +0000)]
Various Debug Port southbridge implementation fixes / cosmetics.
- Use PCI_COMMAND and PCI_COMMAND_MEMORY from pci_def.h instead of
hardcoding their values.
- SB600/SB700: Drop useless/unused SB600_DEVN_BASE and SB700_DEVN_BASE.
- ICH7: Drop unused EHCI_CONFIG_FLAG and EHCI_PORTSC.
- s/uint32_t/u32/.
- Cosmetics, whitespace, coding style fixes and added code comments.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5847
2b7e53f0-3cfb-0310-b3e9-
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Patrick Georgi [Sat, 25 Sep 2010 17:24:10 +0000 (17:24 +0000)]
Mark read-only data as read-only, so the global vars test doesn't fail on it.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5846
2b7e53f0-3cfb-0310-b3e9-
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Patrick Georgi [Sat, 25 Sep 2010 17:01:13 +0000 (17:01 +0000)]
Add an EHCI driver to libpayload's USB stack.
Interrupt transfer support is missing (ie. no keyboard),
bulk and control transfers work (ie. mass storage).
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5845
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Sat, 25 Sep 2010 16:17:20 +0000 (16:17 +0000)]
Drop some useless "../../../" in #includes (trivial).
Build-tested using abuild.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5844
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Sat, 25 Sep 2010 14:58:28 +0000 (14:58 +0000)]
Various CONFIG_DEBUG_RAM_SETUP related fixes (trivial).
Some boards still used the old DEBUG_RAM_SETUP (without _CONFIG prefix).
Also, consistently use "#if CONFIG_DEBUG_RAM_SETUP" (not #ifdef) as we do
elsewhere.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5843
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Sat, 25 Sep 2010 14:23:31 +0000 (14:23 +0000)]
Various USB Debug Port fixes (trivial).
- Drop unused DBGP_DEFAULT #defines on boards with chipsets where no
USB Debug Port support is implemented anyway (at the moment, at least):
- hp/dl145_g3
- hp/dl165_g6_fam10
- ICH7: Move unrelated code out of set_debug_port(). All ICH southbridges
with Debug Port hardcode the physical USB port used as Debug Port to 1.
In other words, this port is not user-configurable (as seems to be
the case on NVIDIA MCP55). For now we keep the 'port' parameter in order
to not change the API, this might be fixed differently later.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5842
2b7e53f0-3cfb-0310-b3e9-
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Patrick Georgi [Sat, 25 Sep 2010 14:15:41 +0000 (14:15 +0000)]
Make globals in romstage break the build, so we don't have to
wonder why variables in .data or .bss (both somewhere in ROM space)
are wrong.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5841
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Sat, 25 Sep 2010 12:37:33 +0000 (12:37 +0000)]
Drop <cpu/amd/mtrr.h> #include from Intel CPUs.
Three CAR implementations on Intel CPUs include <cpu/amd/mtrr.h>, which
is obviously wrong, so drop the #includes. None of their #defines are used
in the Intel code.
Build-tested with two of the affected boards.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5840
2b7e53f0-3cfb-0310-b3e9-
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Myles Watson [Sat, 25 Sep 2010 10:42:55 +0000 (10:42 +0000)]
Keep the mc146818rtc.h include close to the option table include where
possible.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5839
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Sat, 25 Sep 2010 10:40:47 +0000 (10:40 +0000)]
- Fix race condition in option_table.h generation by moving the include
statement to those files that actually need it. This significantly
reduces the number of dependencies, so it's no longer extremely ugly to
specify them manually (see the src/pc80/Makefile.inc portion)
- Add double include guards around option_table.h defines
- Also, drop the AMD DBM690T work around for the issue
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5838
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Fri, 24 Sep 2010 23:37:25 +0000 (23:37 +0000)]
Make SB600/SB700 more similar for easier diffs (trivial).
Also fixes random whitespace issues, typos, etc.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5837
2b7e53f0-3cfb-0310-b3e9-
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Patrick Georgi [Fri, 24 Sep 2010 22:15:54 +0000 (22:15 +0000)]
Fix CCACHE handling, and make use of ccache's BASEDIR feature
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5836
2b7e53f0-3cfb-0310-b3e9-
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Patrick Georgi [Fri, 24 Sep 2010 18:42:56 +0000 (18:42 +0000)]
Automatically fetch bus information for mptable from
the device tree, instead of using hardcoded values.
If this changes behaviour, this is either
- a bug in mptable_write_buses(), or
- a bug in the old mptable or device config, that is
they were inconsistent.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5835
2b7e53f0-3cfb-0310-b3e9-
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Patrick Georgi [Fri, 24 Sep 2010 18:28:50 +0000 (18:28 +0000)]
Undo stupid mistake in r5832
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5834
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Fri, 24 Sep 2010 18:18:20 +0000 (18:18 +0000)]
Hook up all AMD SB600/SB700 boards to the EHCI Debug Port infrastructure.
Without a (currently) dummy set_debug_port() function the build fails,
this may or may not be fixed differently in the future.
Manually build-tested on all SB600/SB700 boards, and tested on hardware on
one SB600 board I own, works fine.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5833
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Patrick Georgi [Fri, 24 Sep 2010 18:12:46 +0000 (18:12 +0000)]
Fix hp/dl165_g6_fam10 build. Failed to take r5800 and
another recent change into account.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5832
2b7e53f0-3cfb-0310-b3e9-
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Arne Georg Gleditsch [Fri, 24 Sep 2010 17:35:32 +0000 (17:35 +0000)]
Add support for HP DL165-G6 with Fam10 CPU.
Original patch was
Signed-off-by: Arne Georg Gleditsch <arne.gleditsch@numascale.com>
Updates to accomodate changes in coreboot are
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5831
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Thu, 23 Sep 2010 18:48:27 +0000 (18:48 +0000)]
Whitespace/typo/cosmetic fixes (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5830
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Thu, 23 Sep 2010 18:29:40 +0000 (18:29 +0000)]
Fix some wrong capitalizations, reformat comments, fix a typo.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5829
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Thu, 23 Sep 2010 18:16:46 +0000 (18:16 +0000)]
USB Debug Port related license header fixes (trivial).
- Add missing license headers, or missing (C) lines to various files.
(most are from AMD / Yinghai Lu, based on svn logs)
- src/include/ehci.h was taken from the Linux kernel. Updating it to
the latest version from git HEAD while I'm at it (build-tested with
one board). It also sports some new EHCI 1.1 addendum #defines which
we may or may not need.
This new file also already has a proper GPL header.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5828
2b7e53f0-3cfb-0310-b3e9-
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Marc Jones [Thu, 23 Sep 2010 15:38:55 +0000 (15:38 +0000)]
Generate and extract debug sysmbols for coreboot. *.debug files can be
used for source level debug.
Signed-off-by: Marc Jones <marcj303@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5827
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Wed, 22 Sep 2010 23:42:32 +0000 (23:42 +0000)]
Fix a compiler warning in src/lib/usbdebug.c (trivial).
The 'delay' variable shadows the global 'delay()' function, yielding
this compiler warning/error:
src/pc80/../lib/usbdebug.c: In function `ehci_reset_port':
src/pc80/../lib/usbdebug.c:281: error: declaration of `delay' shadows a global declaration
src/lib/delay.c:9: error: shadowed declaration is here
This fixes the issue by renaming the 'delay' variable to 'delay_ms'.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5826
2b7e53f0-3cfb-0310-b3e9-
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Rudolf Marek [Wed, 22 Sep 2010 22:46:47 +0000 (22:46 +0000)]
Here is a proposed way how to handle the SATA PHY settings on SB700. It
consits of weak function which always exists (with defaults) and a possibility to
override this with normal function in main.c. This is the other way of
doing that and not using the devictree.cb.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5825
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Tue, 21 Sep 2010 23:53:47 +0000 (23:53 +0000)]
First round of i82801ax clean-ups (trivial).
After we splitted up the old i82801xx driver which was supposed to support
multiple generations of ICH* chipsets, some of the generified code
is now obsolete in i82801ax which should only cover ICH/ICH0 and none of
the later ICH* generations.
Hence:
- Drop "struct pci_driver" entries for chipsets other than ICH/ICH0.
- Drop drivers for hardware that is not present on ICH/ICH0: NIC, SATA, EHCI.
- Drop PIRQE-PIRQH #defines and code, not available on this chipset.
- Simplify some parts of the code (more will follow).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5824
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Tue, 21 Sep 2010 21:16:27 +0000 (21:16 +0000)]
Cut the crap.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5823
2b7e53f0-3cfb-0310-b3e9-
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Zheng Bao [Tue, 21 Sep 2010 02:51:31 +0000 (02:51 +0000)]
Complete the code which was missing.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5822
2b7e53f0-3cfb-0310-b3e9-
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Zheng Bao [Tue, 21 Sep 2010 01:24:55 +0000 (01:24 +0000)]
Fix the typo. Field DisAutoRefresh is in DramTimngHi.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5821
2b7e53f0-3cfb-0310-b3e9-
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Keith Hui [Mon, 20 Sep 2010 23:41:37 +0000 (23:41 +0000)]
A number of cleanups for 440BX raminit code.
Resolves a number of TODOs items within, and clarified a number of other TODOs.
Change register_values[] from long to u8 (byte). For what we are doing
this is sufficient and makes it only 1/4 the size.
Remove a hard-coding of SDRAMC register that is redundant and now
incorrect, now that SDRAMC is conditioned on SDRAMPWR_4DIMM Kconfig
and set through register_values[].
This fixes all boards with 3 DIMM slots (e.g. ASUS P2B, A-Trend ATC-6220).
RPS registers are now set in runtime code; remove it from
register_values[] table.
Bring DUMPNORTH() back. The code it refers to is still there.
Move #define of NB up so the DUMPNORTH() macro can use it.
Signed-off-by: Keith Hui <buurin@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5820
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Sun, 19 Sep 2010 21:12:05 +0000 (21:12 +0000)]
Make ASUS P3B-F RAM init actually work by enabling SPD access.
On this board all reads from SPD return 0xff by default, there's a custom
GPIO fiddling needed to enable access to the SPD SMBus offsets at
0x50-0x53. While coreboot actually sort of booted sometimes before r5193,
that was just sheer luck as the RAM init was hardcoded in certain ways.
Since the proper, more heavily SPD-based RAM init the brokenness of the
ASUS P3B-F RAM init was becoming visible.
This patch uses GPIOs to enable access to the SPD SMBus offsets,
and resets the GPIOs again after RAM init (this is needed to allow for
lm-sensors to work, for example).
Tested successfully on hardware.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Idwer Vollering <vidwer@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5819
2b7e53f0-3cfb-0310-b3e9-
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Scott Duplichan [Fri, 17 Sep 2010 21:38:40 +0000 (21:38 +0000)]
AMD Fam10 code breaks with gcc 4.5.0.
Root cause: After function STOP_CAR_AND_CPU disables cache as
ram, the cache as ram stack can no longer be used. Called
functions must be inlined to avoid stack usage. Also, the
compiler must keep local variables register based and not
allocated them from the stack. With gcc 4.5.0, some functions
declared as inline are not being inlined. This patch forces
these functions to always be inlined by adding the qualifier
__attribute__((always_inline)) to their declaration.
Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5818
2b7e53f0-3cfb-0310-b3e9-
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Arne Georg Gleditsch [Fri, 17 Sep 2010 00:13:52 +0000 (00:13 +0000)]
Clear bit 35 of msr c001_102a in Fam10 rev C cores.
Signed-off-by: Arne Georg Gleditsch <arne.gleditsch@numascale.com>
Acked-by: Scott Duplichan <scott@notabs.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5817
2b7e53f0-3cfb-0310-b3e9-
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Marc Jones [Thu, 16 Sep 2010 21:36:44 +0000 (21:36 +0000)]
Add default libpayload build, xcompile, and lpgcc setup to tint.
Signed-off-by: Marc Jones <marc.jones@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5816
2b7e53f0-3cfb-0310-b3e9-
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Marc Jones [Thu, 16 Sep 2010 21:04:54 +0000 (21:04 +0000)]
Add more Fam10 CPUID strings from the AMD revision guide. Includes
newer Phenom II.
Signed-off-by: Marc Jones <marcj303@gmail.com>
Acked-by: Paul Menzel <paulepanter@users.sourceforge.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5815
2b7e53f0-3cfb-0310-b3e9-
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Scott Duplichan [Tue, 14 Sep 2010 17:28:41 +0000 (17:28 +0000)]
This patch corrects a coding error in the original implementation
of 'Erratum 343 for AMD Fam10h CPUs' (rev 4345). The original code
sets msr c001_102a bit 3 when bit 35 was intended.
Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5814
2b7e53f0-3cfb-0310-b3e9-
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Marc Jones [Mon, 13 Sep 2010 19:31:21 +0000 (19:31 +0000)]
IEI Kino added to IEI mainboard Kconfig. I missed this in r5812
Signed-off-by: Marc Jones <marcj303@gmail.com>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5813
2b7e53f0-3cfb-0310-b3e9-
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Marc Jones [Mon, 13 Sep 2010 19:24:38 +0000 (19:24 +0000)]
IEI Kino mainboard support based on Mahogany Fam10.
svn copy amd/mahogany iei/kino-780am2-fam10; then apply the patch.
Signed-off-by: Marc Jones <marcj303@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5812
2b7e53f0-3cfb-0310-b3e9-
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Myles Watson [Mon, 13 Sep 2010 17:46:13 +0000 (17:46 +0000)]
CONFIG_MMCONF_SUPPORT is always defined. Fix build.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5811
2b7e53f0-3cfb-0310-b3e9-
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Arne Georg Gleditsch [Mon, 13 Sep 2010 15:11:35 +0000 (15:11 +0000)]
Move initialization of MMCONF BAR to cache_as_ram setup phase, in order
to make sure MMCONF is set up before use. Otherwise, PCI config
accesses run before init_cpus() will be lost if MMCONF is enabled
(unless explicitly done as port-based accesses).
This obsoletes removal of RES_PCI_IO, PCI_ADDR(0, 1, 0, 0x78) in
mcp55_early_setup, so reinsert.
Signed-off-by: Arne Georg Gleditsch <arne.gleditsch@numascale.com>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5810
2b7e53f0-3cfb-0310-b3e9-
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Juhana Helovuo [Mon, 13 Sep 2010 14:51:26 +0000 (14:51 +0000)]
Add support for Asus M4A785-M.
Signed-off-by: Juhana Helovuo <juhe@iki.fi>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5809
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Myles Watson [Mon, 13 Sep 2010 14:50:20 +0000 (14:50 +0000)]
Add reserved areas for fam10.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5808
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Myles Watson [Mon, 13 Sep 2010 14:49:02 +0000 (14:49 +0000)]
Port k8 UMA handling to fam10.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5807
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Juhana Helovuo [Mon, 13 Sep 2010 14:47:22 +0000 (14:47 +0000)]
Generate multiboot tables from coreboot tables.
Signed-off-by: Juhana Helovuo <juhe@iki.fi>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5806
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Juhana Helovuo [Mon, 13 Sep 2010 14:43:02 +0000 (14:43 +0000)]
Print an error and correct pci scan limits. Skip sb700 ISA DMA init if needed.
Signed-off-by: Juhana Helovuo <juhe@iki.fi>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5805
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Myles Watson [Mon, 13 Sep 2010 13:23:20 +0000 (13:23 +0000)]
Fix a typo reported by Sylvain Hitier.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5804
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Myles Watson [Mon, 13 Sep 2010 13:14:48 +0000 (13:14 +0000)]
Convert i945 boards to use reserved resources instead of directly adding
coreboot table entries in every mainboard.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5803
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Marc Jones [Fri, 10 Sep 2010 22:13:34 +0000 (22:13 +0000)]
Add F71859 SIO.
Signed-off-by: Marc Jones <marcj303@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5802
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Jens Rottmann [Fri, 10 Sep 2010 21:51:34 +0000 (21:51 +0000)]
Add support for LiPPERT Hurricane-LX (EPIC board with AMD Geode-LX,
CS5536, ITE IT8712F). Board support is based on the SpaceRunner-LX
(with tiny bits from the RoadRunner-LX) even though the hardware really
was the ancestor of our three other -LX boards and in fact among the
earliest Geode-LX boards on the market. (Might even have been the first
Geode-LX EPIC?)
Signed-off-by: Jens Rottmann <JRottmann@LiPPERTEmbedded.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5801
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Myles Watson [Fri, 10 Sep 2010 18:33:24 +0000 (18:33 +0000)]
Move memory type information out of some AMD sockets.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5800
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Patrick Georgi [Thu, 9 Sep 2010 22:12:40 +0000 (22:12 +0000)]
Adapt comment, too. (trivial)
Noticed-by: Uwe Hermann
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5799
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