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Fix the typo. Field DisAutoRefresh is in DramTimngHi.
author
Zheng Bao
<zheng.bao@amd.com>
Tue, 21 Sep 2010 01:24:55 +0000
(
01:24
+0000)
committer
Zheng Bao
<Zheng.Bao@amd.com>
Tue, 21 Sep 2010 01:24:55 +0000
(
01:24
+0000)
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5821
2b7e53f0
-3cfb-0310-b3e9-
8179ed1497e1
src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
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diff --git
a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
index b6782bc007916d0c8cb289879684710cf379b186..08677ad27b0363603355bb7e424e052b5936607e 100644
(file)
--- a/
src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
+++ b/
src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
@@
-1220,7
+1220,7
@@
static void SPD2ndTiming(struct MCTStatStruc *pMCTstat,
Set_NB32(dev, 0x88 + reg_off, DramTimingLo); /*DCT Timing Low*/
if (pDCTstat->Speed > 4) {
- DramTiming
Lo
|= 1 << DisAutoRefresh;
+ DramTiming
Hi
|= 1 << DisAutoRefresh;
}
DramTimingHi |= 0x000018FF;
Set_NB32(dev, 0x8c + reg_off, DramTimingHi); /*DCT Timing Hi*/