Convert i945 boards to use reserved resources instead of directly adding

coreboot table entries in every mainboard.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5803 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

diff --git a/src/mainboard/getac/p470/Kconfig b/src/mainboard/getac/p470/Kconfig
index b258a8ba3abe1e77a1400fb158d388dbdb80ab85..720bdf559bd13098dd9d7c311a0d716e5cd8f262 100644 (file)
--- a/src/mainboard/getac/p470/Kconfig
+++ b/src/mainboard/getac/p470/Kconfig
@@ -36,7 +36,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select HAVE_HARD_RESET
        select HAVE_ACPI_RESUME
        select HAVE_ACPI_SLIC
-       select HAVE_MAINBOARD_RESOURCES
        select MMCONF_SUPPORT
        select AP_IN_SIPI_WAIT
        select UDELAY_LAPIC

diff --git a/src/mainboard/getac/p470/mainboard.c b/src/mainboard/getac/p470/mainboard.c
index c2e9e1831e12bd38b8a3e06eaca019ba80f943d5..a861f43855da8fc275a11951c2ac62822690fd68 100644 (file)
--- a/src/mainboard/getac/p470/mainboard.c
+++ b/src/mainboard/getac/p470/mainboard.c
@@ -98,11 +98,6 @@ static void mainboard_enable(device_t dev)
        verb_setup();
 }
 
-int add_mainboard_resources(struct lb_memory *mem)
-{
-       return add_northbridge_resources(mem);
-}
-
 struct chip_operations mainboard_ops = {
        CHIP_NAME("Getac P470 Rugged Notebook")
        .enable_dev = mainboard_enable,

diff --git a/src/mainboard/ibase/mb899/Kconfig b/src/mainboard/ibase/mb899/Kconfig
index c4fa996fba7e9956fe47de0ecd48522e1f5d0135..ef910f6646adf6eb7eabc63383cc937e58cb1e05 100644 (file)
--- a/src/mainboard/ibase/mb899/Kconfig
+++ b/src/mainboard/ibase/mb899/Kconfig
@@ -15,7 +15,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select HAVE_HARD_RESET
        select HAVE_OPTION_TABLE
        select HAVE_ACPI_RESUME
-       select HAVE_MAINBOARD_RESOURCES
        select MMCONF_SUPPORT
        select HAVE_SMI_HANDLER
        select BOARD_ROMSIZE_KB_512

diff --git a/src/mainboard/ibase/mb899/mainboard.c b/src/mainboard/ibase/mb899/mainboard.c
index 507ca842e7fb75c4f0abdb5f9464c61a792542aa..5989685ebddadfb2ae95e9ec67c09ae2732b7686 100644 (file)
--- a/src/mainboard/ibase/mb899/mainboard.c
+++ b/src/mainboard/ibase/mb899/mainboard.c
@@ -29,11 +29,6 @@
 #include <arch/coreboot_tables.h>
 #include "chip.h"
 
-int add_mainboard_resources(struct lb_memory *mem)
-{
-       return add_northbridge_resources(mem);
-}
-
 #if CONFIG_PCI_OPTION_ROM_RUN_YABEL
 static int int15_handler(void)
 {

diff --git a/src/mainboard/intel/d945gclf/Kconfig b/src/mainboard/intel/d945gclf/Kconfig
index 32a25d7fa7da83f8efd2979dd53f3fef8c6d897f..f1ec575c8b3fe26fb45999157864c9b79f13e968 100644 (file)
--- a/src/mainboard/intel/d945gclf/Kconfig
+++ b/src/mainboard/intel/d945gclf/Kconfig
@@ -36,7 +36,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select HAVE_MP_TABLE
        select HAVE_ACPI_TABLES
        select HAVE_ACPI_RESUME
-       select HAVE_MAINBOARD_RESOURCES
        select MMCONF_SUPPORT
        select HAVE_ACPI_TABLES
        select HAVE_SMI_HANDLER

diff --git a/src/mainboard/intel/d945gclf/mainboard.c b/src/mainboard/intel/d945gclf/mainboard.c
index a94b2061cd69e414867c3f0653f7767b05199ee3..ff08b8a6f060e720adb041f4b316596202578b48 100644 (file)
--- a/src/mainboard/intel/d945gclf/mainboard.c
+++ b/src/mainboard/intel/d945gclf/mainboard.c
@@ -23,11 +23,6 @@
 #include <arch/coreboot_tables.h>
 #include "chip.h"
 
-int add_mainboard_resources(struct lb_memory *mem)
-{
-       return add_northbridge_resources(mem);
-}
-
 struct chip_operations mainboard_ops = {
        CHIP_NAME("Intel D945GCLF Mainboard")
 };

diff --git a/src/mainboard/kontron/986lcd-m/Kconfig b/src/mainboard/kontron/986lcd-m/Kconfig
index 8a8dcb8835e415988962ebe48a04d3bcd3d827a2..15bc2dac15da6f864e92608910351d0b6f53bd1a 100644 (file)
--- a/src/mainboard/kontron/986lcd-m/Kconfig
+++ b/src/mainboard/kontron/986lcd-m/Kconfig
@@ -15,7 +15,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select HAVE_OPTION_TABLE
        select HAVE_HARD_RESET
        select HAVE_ACPI_RESUME
-       select HAVE_MAINBOARD_RESOURCES
        select MMCONF_SUPPORT
        select HAVE_SMI_HANDLER
        select BOARD_ROMSIZE_KB_1024

diff --git a/src/mainboard/kontron/986lcd-m/mainboard.c b/src/mainboard/kontron/986lcd-m/mainboard.c
index 8dcf44143bf00b501205e0941adbae1b312928d9..f806ede3638eae44759e66895dea4e3abfadb5c3 100644 (file)
--- a/src/mainboard/kontron/986lcd-m/mainboard.c
+++ b/src/mainboard/kontron/986lcd-m/mainboard.c
@@ -20,20 +20,13 @@
 #include <types.h>
 #include <device/device.h>
 #include <console/console.h>
-#include <boot/tables.h>
 #if defined(CONFIG_PCI_OPTION_ROM_RUN_YABEL) && CONFIG_PCI_OPTION_ROM_RUN_YABEL
 #include <x86emu/x86emu.h>
 #endif
 #include <pc80/mc146818rtc.h>
 #include <arch/io.h>
-#include <arch/coreboot_tables.h>
 #include "chip.h"
 
-int add_mainboard_resources(struct lb_memory *mem)
-{
-       return add_northbridge_resources(mem);
-}
-
 #if defined(CONFIG_PCI_OPTION_ROM_RUN_YABEL) && CONFIG_PCI_OPTION_ROM_RUN_YABEL
 static int int15_handler(void)
 {

diff --git a/src/mainboard/roda/rk886ex/mainboard.c b/src/mainboard/roda/rk886ex/mainboard.c
index acfdfaa67b06c0489ac92ce00207d54cfeb49a2a..f444e0aad7b9629c811a30a4213412dcf369b05f 100644 (file)
--- a/src/mainboard/roda/rk886ex/mainboard.c
+++ b/src/mainboard/roda/rk886ex/mainboard.c
@@ -134,11 +134,6 @@ static void mainboard_enable(device_t dev)
 #endif
 }
 
-int add_mainboard_resources(struct lb_memory *mem)
-{
-       return add_northbridge_resources(mem);
-}
-
 struct chip_operations mainboard_ops = {
        CHIP_NAME("Roda Computer GmbH RK886EX Rugged Notebook (ROCKY3+)")
        .enable_dev = mainboard_enable,

diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c
index 0f5a502b69ea61e690c4e0f537f7f529b7fe0817..aab82bdd4aecc3d6fb97839d4511f096d84ef679 100644 (file)
--- a/src/northbridge/intel/i945/northbridge.c
+++ b/src/northbridge/intel/i945/northbridge.c
@@ -70,20 +70,26 @@ static int get_pcie_bar(u32 *base, u32 *len)
 /* IDG memory */
 uint64_t uma_memory_base=0, uma_memory_size=0;
 
-int add_northbridge_resources(struct lb_memory *mem)
+static void add_fixed_resources(struct device *dev, int index)
 {
+       struct resource *resource;
        u32 pcie_config_base, pcie_config_size;
 
        printk(BIOS_DEBUG, "Adding UMA memory area\n");
-       lb_add_memory_range(mem, LB_MEM_RESERVED,
-               uma_memory_base, uma_memory_size);
-
-       printk(BIOS_DEBUG, "Adding PCIe config bar\n");
-       get_pcie_bar(&pcie_config_base, &pcie_config_size);
-       lb_add_memory_range(mem, LB_MEM_RESERVED,
-               pcie_config_base, pcie_config_size);
+       resource = new_resource(dev, index);
+       resource->base = (resource_t) uma_memory_base;
+       resource->size = (resource_t) uma_memory_size;
+       resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE |
+           IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
 
-       return 0;
+       if (get_pcie_bar(&pcie_config_base, &pcie_config_size)) {
+               printk(BIOS_DEBUG, "Adding PCIe config bar\n");
+               resource = new_resource(dev, index+1);
+               resource->base = (resource_t) pcie_config_base;
+               resource->size = (resource_t) pcie_config_size;
+               resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE |
+                   IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
+       }
 }
 
 static void ram_resource(device_t dev, unsigned long index, unsigned long basek,
@@ -208,6 +214,8 @@ static void pci_domain_set_resources(device_t dev)
                ram_resource(dev, 5, 4096 * 1024, tomk - 4 * 1024 * 1024);
        }
 
+       add_fixed_resources(dev, 6);
+
        assign_resources(dev->link_list);
 
 #if CONFIG_WRITE_HIGH_TABLES==1