// __PRE_RAM__ means: use "unsigned" for device, not a struct.
-/* Configuration of the i945 driver */
-#define CHIPSET_I945GM 1
-/* Usually system firmware turns off system memory clock signals to
- * unused SO-DIMM slots to reduce EMI and power consumption.
- * However, the Kontron 986LCD-M does not like unused clock signals to
- * be disabled. If other similar mainboard occur, it would make sense
- * to make this an entry in the sysinfo structure, and pre-initialize that
- * structure in the mainboard's romstage.c main() function. For now a
- * #define will do.
- */
-#define OVERRIDE_CLOCK_DISABLE 1
-#define CHANNEL_XOR_RANDOMIZATION 1
-
#include <stdint.h>
#include <string.h>
#include <arch/io.h>
default "8086,27a2"
depends on NORTHBRIDGE_INTEL_I945
+choice
+ default I945GM
+ depends on NORTHBRIDGE_INTEL_I945
+ help
+ Different i945 variants require slightly different setup.
+
+config I945GM
+ bool "i945GM (Mobile) chipset"
+
+config I945GC
+ bool "i945GC chipset"
+
+endchoice
+
+config CHANNEL_XOR_RANDOMIZATION
+ bool
+ default n
+ depends on NORTHBRIDGE_INTEL_I945
+
+config OVERRIDE_CLOCK_DISABLE
+ bool
+ default n
+ depends on NORTHBRIDGE_INTEL_I945
+ help
+ Usually system firmware turns off system memory clock
+ signals to unused SO-DIMM slots to reduce EMI and power
+ consumption.
+ However, some boards do not like unused clock signals to
+ be disabled.
+
+config MAXIMUM_SUPPORTED_FREQUENCY
+ int
+ default 0
+ depends on NORTHBRIDGE_INTEL_I945
+ help
+ If non-zero, this designates the maximum DDR frequency
+ the board supports, despite what the chipset should be
+ capable of.
static int memclk(void)
{
int offset = 0;
-#ifdef CHIPSET_I945GM
+#if CONFIG_I945GM
offset++;
#endif
switch (((MCHBAR32(CLKCFG) >> 4) & 7) - offset) {
return -1;
}
-#ifdef CHIPSET_I945GM
+#if CONFIG_I945GM
static int fsbclk(void)
{
switch (MCHBAR32(CLKCFG) & 7) {
return -1;
}
#endif
-#ifdef CHIPSET_I945GC
+#if CONFIG_I945GC
static int fsbclk(void)
{
switch (MCHBAR32(CLKCFG) & 7) {
{
u32 reg32;
-#ifdef MAXIMUM_SUPPORTED_FREQUENCY
- return MAXIMUM_SUPPORTED_FREQUENCY;
+#if CONFIG_MAXIMUM_SUPPORTED_FREQUENCY
+ return CONFIG_MAXIMUM_SUPPORTED_FREQUENCY;
#endif
reg32 = pci_read_config32(PCI_DEV(0, 0x00, 0), 0xe4); /* CAPID0 + 4 */
return nc;
}
-#ifdef CHIPSET_I945GM
+#if CONFIG_I945GM
/* Strength multiplier tables */
static const u8 dual_channel_strength_multiplier[] = {
0x44, 0x11, 0x11, 0x11, 0x44, 0x44, 0x44, 0x11,
0x33, 0x00, 0x11, 0x00, 0x44, 0x44, 0x33, 0x11
};
#endif
-#ifdef CHIPSET_I945GC
+#if CONFIG_I945GC
static const u8 dual_channel_strength_multiplier[] = {
0x44, 0x22, 0x00, 0x00, 0x44, 0x44, 0x44, 0x22,
0x44, 0x22, 0x00, 0x00, 0x44, 0x44, 0x44, 0x22,
/**
* We add the indices according to our clocks from CLKCFG.
*/
-#ifdef CHIPSET_I945GM
+#if CONFIG_I945GM
static const u32 data_clock_crossing[] = {
0x00100401, 0x00000000, /* DDR400 FSB400 */
0xffffffff, 0xffffffff, /* nonexistant */
};
#endif
-#ifdef CHIPSET_I945GC
+#if CONFIG_I945GC
/* i945 G/P */
static const u32 data_clock_crossing[] = {
0xffffffff, 0xffffffff, /* nonexistant */
if (sysinfo->interleaved) {
reg32 = MCHBAR32(DCC);
-#if CHANNEL_XOR_RANDOMIZATION
+#if CONFIG_CHANNEL_XOR_RANDOMIZATION
reg32 &= ~(1 << 10);
reg32 |= (1 << 9);
#else
{
u8 clocks[2] = { 0, 0 };
-#ifdef CHIPSET_I945GM
+#if CONFIG_I945GM
#define CLOCKS_WIDTH 2
#endif
-#ifdef CHIPSET_I945GC
+#if CONFIG_I945GC
#define CLOCKS_WIDTH 3
#endif
if (sysinfo->dimm[0] != SYSINFO_DIMM_NOT_POPULATED)
if (sysinfo->dimm[3] != SYSINFO_DIMM_NOT_POPULATED)
clocks[1] |= ((1 << CLOCKS_WIDTH)-1) << CLOCKS_WIDTH;
-#ifdef OVERRIDE_CLOCK_DISABLE
+#if CONFIG_OVERRIDE_CLOCK_DISABLE
/* Usually system firmware turns off system memory clock signals
* to unused SO-DIMM slots to reduce EMI and power consumption.
* However, the Kontron 986LCD-M does not like unused clock
* signals to be disabled.
- * If other similar mainboard occur, it would make sense to make
- * this an entry in the sysinfo structure, and pre-initialize that
- * structure in the mainboard's romstage.c main() function.
- * For now an #ifdef will do.
*/
clocks[0] = 0xf; /* force all clock gate pairs to enable */