Add a few missing license headers based on svn logs, and also add a

few more code comments to src/cpu/x86/*.inc files.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5859 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

diff --git a/src/cpu/x86/fpu_enable.inc b/src/cpu/x86/fpu_enable.inc
index bd7a7ff63071cba1077a8ca3c00496677fe56204..f3eedcdaf605cb19da3761865237a4bc57332dab 100644 (file)
--- a/src/cpu/x86/fpu_enable.inc
+++ b/src/cpu/x86/fpu_enable.inc
@@ -1,10 +1,39 @@
-       /* preserve BIST in %eax */
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2002 Eric Biederman <ebiederm@xmission.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
 __fpu_start:
-       movl %eax, %ebp
+       /* Preserve BIST. */
+       movl    %eax, %ebp
 
-       /* Disable floating point emulation */
+       /*
+        * Clear the CR0[2] bit (the "Emulation" flag, EM).
+        *
+        * This indicates that the processor has an (internal or external)
+        * x87 FPU, i.e. floating point operations will be executed by the
+        * hardware (and not emulated in software).
+        *
+        * Additionally, if this bit is not cleared, MMX/SSE instructions won't
+        * work, i.e., they will trigger an invalid opcode exception (#UD).
+        */
        movl    %cr0, %eax
-       andl    $~(1<<2), %eax
+       andl    $~(1 << 2), %eax
        movl    %eax, %cr0
 
-       movl %ebp, %eax
+       /* Restore BIST. */
+       movl    %ebp, %eax

diff --git a/src/cpu/x86/mmx_disable.inc b/src/cpu/x86/mmx_disable.inc
index 97d62d60f58723389d0186b0a3f677fda15eb07c..1a4e70f0c6b63498ce171492784bd6193d091ffa 100644 (file)
--- a/src/cpu/x86/mmx_disable.inc
+++ b/src/cpu/x86/mmx_disable.inc
@@ -1,2 +1,24 @@
-       /* Clear out an mmx state */
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2002 Eric Biederman <ebiederm@xmission.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+       /*
+        * Execute the EMMS (Empty MMX Technology State) instruction.
+        */
        emms
+

diff --git a/src/cpu/x86/sse_disable.inc b/src/cpu/x86/sse_disable.inc
index a42cb412594f40a0ec8930577c6e085f71f94e1e..37458c9cd2e6814631924ddf758c618b8d37dd67 100644 (file)
--- a/src/cpu/x86/sse_disable.inc
+++ b/src/cpu/x86/sse_disable.inc
@@ -1,8 +1,26 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2002 Eric Biederman <ebiederm@xmission.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
        /*
         * Put the processor back into a reset state
-        * with respect to the xmm registers.
+        * with respect to the XMM registers.
         */
-
        xorps %xmm0, %xmm0
        xorps %xmm1, %xmm1
        xorps %xmm2, %xmm2
@@ -12,7 +30,15 @@
        xorps %xmm6, %xmm6
        xorps %xmm7, %xmm7
 
-       /* Disable sse instructions */
+       /*
+        * Disable SSE instructions.
+        *
+        * Clear CR4[9] (OSFXSR) and CR4[10] (OSXMMEXCPT) so that the
+        * processor can no longer execute SSE instructions, and unmasked
+        * SIMD floating point exceptions will generate an invalid opcode
+        * exception (#UD).
+        */
        movl    %cr4, %eax
-       andl    $~(3<<9), %eax
+       andl    $~(3 << 9), %eax
        movl    %eax, %cr4
+

diff --git a/src/cpu/x86/sse_enable.inc b/src/cpu/x86/sse_enable.inc
index 95724b71f7705eeb5537e599471bfe06cc139cd7..8dc4f3a2aed5f557c65da9782bed86ecb2921262 100644 (file)
--- a/src/cpu/x86/sse_enable.inc
+++ b/src/cpu/x86/sse_enable.inc
@@ -1,14 +1,30 @@
-       /* preserve BIST in %eax */
-       movl %eax, %ebp
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2002 Eric Biederman <ebiederm@xmission.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
 
-       /*
-        * Enable the use of the xmm registers
-        */
+       /* Preserve BIST. */
+       movl    %eax, %ebp
 
-       /* Enable sse instructions */
+       /* Enable SSE instructions. */
        movl    %cr4, %eax
-       orl     $(1<<9), %eax
+       orl     $(1 << 9), %eax
        movl    %eax, %cr4
 
+       /* Restore BIST. */
        movl    %ebp, %eax