Keep the mc146818rtc.h include close to the option table include where

possible.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5839 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

diff --git a/src/mainboard/dell/s1850/romstage.c b/src/mainboard/dell/s1850/romstage.c
index c2533d72e5027d308db27e1c1549649c32361fe4..d96e196dc7b2d91a2465d8538322a58dc75aefc4 100644 (file)
--- a/src/mainboard/dell/s1850/romstage.c
+++ b/src/mainboard/dell/s1850/romstage.c
@@ -5,7 +5,6 @@
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
-#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"

diff --git a/src/mainboard/intel/jarrell/romstage.c b/src/mainboard/intel/jarrell/romstage.c
index 1caf4b9548a0906936bf6d3fb94d78d3ef52a4b2..4df85cfe803bd444d3cd9b4327b34e34f0529e09 100644 (file)
--- a/src/mainboard/intel/jarrell/romstage.c
+++ b/src/mainboard/intel/jarrell/romstage.c
@@ -5,7 +5,6 @@
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
-#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"

diff --git a/src/mainboard/supermicro/x6dai_g/romstage.c b/src/mainboard/supermicro/x6dai_g/romstage.c
index bfbb3bcb7fe6e953bf932629cdfd04d807c5618f..6f8ea1264f3a1b903c423efaad4c81e1b088fac9 100644 (file)
--- a/src/mainboard/supermicro/x6dai_g/romstage.c
+++ b/src/mainboard/supermicro/x6dai_g/romstage.c
@@ -5,7 +5,6 @@
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
-#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "pc80/udelay_io.c"

diff --git a/src/mainboard/supermicro/x6dhe_g/romstage.c b/src/mainboard/supermicro/x6dhe_g/romstage.c
index 8151518eee7b27474136defb64c1dd3948468b67..745da9a0598ba83b693ce812450626485626f1cf 100644 (file)
--- a/src/mainboard/supermicro/x6dhe_g/romstage.c
+++ b/src/mainboard/supermicro/x6dhe_g/romstage.c
@@ -5,7 +5,6 @@
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
-#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "pc80/udelay_io.c"

diff --git a/src/mainboard/supermicro/x6dhe_g2/romstage.c b/src/mainboard/supermicro/x6dhe_g2/romstage.c
index 7f20e0a697275a804f3dbcd93d53fb834a560e6d..6a2b2ea0c5801ca5591dcf775917ef64d45db5f5 100644 (file)
--- a/src/mainboard/supermicro/x6dhe_g2/romstage.c
+++ b/src/mainboard/supermicro/x6dhe_g2/romstage.c
@@ -5,7 +5,6 @@
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
-#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"

diff --git a/src/mainboard/supermicro/x6dhr_ig/romstage.c b/src/mainboard/supermicro/x6dhr_ig/romstage.c
index 1269eb97c2cbab6edb111f63cb9b5d8313335a8b..9d56f5c3ac3d69cff6f9cefd1dfd0212b6aef315 100644 (file)
--- a/src/mainboard/supermicro/x6dhr_ig/romstage.c
+++ b/src/mainboard/supermicro/x6dhr_ig/romstage.c
@@ -5,7 +5,6 @@
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
-#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"

diff --git a/src/mainboard/supermicro/x6dhr_ig2/romstage.c b/src/mainboard/supermicro/x6dhr_ig2/romstage.c
index 245c03ed8c087dbb66c229e5bb4f42d5df4f1906..a0f6b4951c83883a7de678fe0ec21588c1bde5a9 100644 (file)
--- a/src/mainboard/supermicro/x6dhr_ig2/romstage.c
+++ b/src/mainboard/supermicro/x6dhr_ig2/romstage.c
@@ -5,7 +5,6 @@
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
-#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"

diff --git a/src/northbridge/intel/e7520/raminit.c b/src/northbridge/intel/e7520/raminit.c
index 0ef73cc02696054446c45f0d2d28260197ef0234..e9827c43b99446a004855e002a4c0acddde85139 100644 (file)
--- a/src/northbridge/intel/e7520/raminit.c
+++ b/src/northbridge/intel/e7520/raminit.c
@@ -23,6 +23,7 @@
 #include <stdlib.h>
 #include "raminit.h"
 #include "e7520.h"
+#include <pc80/mc146818rtc.h>
 #if CONFIG_HAVE_OPTION_TABLE
 #include "option_table.h"
 #endif
@@ -626,7 +627,7 @@ static int spd_set_dram_controller_mode(const struct mem_controller *ctrl,
        if (read_option(CMOS_VSTART_ECC_memory, CMOS_VLEN_ECC_memory, 1) == 0) {
                ecc = 0;  /* ECC off in CMOS so disable it */
                print_debug("ECC off\n");
-       } else 
+       } else
 #endif
        {
                print_debug("ECC on\n");

diff --git a/src/northbridge/intel/e7525/raminit.c b/src/northbridge/intel/e7525/raminit.c
index a33b0c7680a488dc44c60e6606aa4c2f8bca2fb6..b482bb9fec2272a171df24dbbbd5942cb3135e36 100644 (file)
--- a/src/northbridge/intel/e7525/raminit.c
+++ b/src/northbridge/intel/e7525/raminit.c
@@ -23,6 +23,7 @@
 #include <stdlib.h>
 #include "raminit.h"
 #include "e7525.h"
+#include <pc80/mc146818rtc.h>
 #if CONFIG_HAVE_OPTION_TABLE
 #include "option_table.h"
 #endif