#include <console/console.h>
#include <arch/io.h>
#include <arch/pirq_routing.h>
-#include "../../../southbridge/amd/cs5536/cs5536.h"
+#include "southbridge/amd/cs5536/cs5536.h"
/* Platform IRQs */
#define PIRQA 10
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
#include <cpu/amd/amdk8_sysconf.h>
-#include "../../../northbridge/amd/amdk8/amdk8_acpi.h"
+#include "northbridge/amd/amdk8/amdk8_acpi.h"
#include <arch/cpu.h>
#include <cpu/amd/model_fxx_powernow.h>
#include <arch/acpi.h>
#include <arch/io.h>
#include <device/device.h>
-#include "../../../southbridge/amd/sb600/sb600.h"
+#include "southbridge/amd/sb600/sb600.h"
/*extern*/ u16 pm_base = 0x800;
/* pm_base should be set in sb acpi */
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
#include <cpu/amd/amdk8_sysconf.h>
-#include "../../../northbridge/amd/amdk8/amdk8_acpi.h"
+#include "northbridge/amd/amdk8/amdk8_acpi.h"
#include <arch/cpu.h>
#include <cpu/amd/model_fxx_powernow.h>
#include <arch/acpi.h>
#include <arch/io.h>
#include <device/device.h>
-#include "../../../southbridge/amd/sb700/sb700.h"
+#include "southbridge/amd/sb700/sb700.h"
/*extern*/ u16 pm_base = 0x800;
/* pm_base should be set in sb acpi */
#include <arch/acpi.h>
#include <arch/io.h>
#include <device/device.h>
-#include "../../../southbridge/amd/sb700/sb700.h"
+#include "southbridge/amd/sb700/sb700.h"
/*extern*/ u16 pm_base = 0x800;
/* pm_base should be set in sb acpi */
#include <console/console.h>
#include <arch/io.h>
#include <arch/pirq_routing.h>
-#include "../../../southbridge/amd/cs5536/cs5536.h"
+#include "southbridge/amd/cs5536/cs5536.h"
/* Platform IRQs */
#define PIRQA 11
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
#include <cpu/amd/amdk8_sysconf.h>
-#include "../../../northbridge/amd/amdk8/amdk8_acpi.h"
+#include "northbridge/amd/amdk8/amdk8_acpi.h"
#include <arch/cpu.h>
#include <cpu/amd/model_fxx_powernow.h>
#include <arch/acpi.h>
#include <arch/io.h>
#include <device/device.h>
-#include "../../../southbridge/amd/sb600/sb600.h"
+#include "southbridge/amd/sb600/sb600.h"
/*extern*/ u16 pm_base = 0x800;
/* pm_base should be set in sb acpi */
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
#include <cpu/amd/amdk8_sysconf.h>
-#include "../../../northbridge/amd/amdk8/amdk8_acpi.h"
+#include "northbridge/amd/amdk8/amdk8_acpi.h"
#include "mb_sysconf.h"
#include <arch/acpi.h>
#include <arch/io.h>
#include <device/device.h>
-#include "../../../southbridge/amd/sb700/sb700.h"
+#include "southbridge/amd/sb700/sb700.h"
/*extern*/ u16 pm_base = 0x800;
/* pm_base should be set in sb acpi */
#include <console/console.h>
#include <arch/io.h>
#include <arch/pirq_routing.h>
-#include "../../../southbridge/amd/cs5536/cs5536.h"
+#include "southbridge/amd/cs5536/cs5536.h"
/* Platform IRQs */
#define PIRQA 10
#include <arch/io.h>
#include <cpu/x86/msr.h>
#include <cpu/amd/lxdef.h>
-#include "../../../southbridge/amd/cs5536/cs5536.h"
+#include "southbridge/amd/cs5536/cs5536.h"
#include "chip.h"
static void init_gpio(void)
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
#include <cpu/amd/amdk8_sysconf.h>
-#include "../../../northbridge/amd/amdk8/amdk8_acpi.h"
+#include "northbridge/amd/amdk8/amdk8_acpi.h"
#include <arch/cpu.h>
#include <cpu/amd/model_fxx_powernow.h>
#include <arch/acpi.h>
#include <arch/io.h>
#include <device/device.h>
-#include "../../../southbridge/amd/sb700/sb700.h"
+#include "southbridge/amd/sb700/sb700.h"
/*extern*/ u16 pm_base = 0x800;
/* pm_base should be set in sb acpi */
#include <arch/smp/mpspec.h>
#include <device/device.h>
#include <device/pci_ids.h>
-#include "../../../southbridge/via/vt8237r/vt8237r.h"
-#include "../../../southbridge/via/k8t890/k8t890.h"
+#include "southbridge/via/vt8237r/vt8237r.h"
+#include "southbridge/via/k8t890/k8t890.h"
extern const unsigned char AmlCode[];
#include <string.h>
#include <stdint.h>
#include <arch/smp/mpspec.h>
-#include "../../../southbridge/via/vt8237r/vt8237r.h"
-#include "../../../southbridge/via/k8t890/k8t890.h"
+#include "southbridge/via/vt8237r/vt8237r.h"
+#include "southbridge/via/k8t890/k8t890.h"
static void *smp_write_config_table(void *v)
{
#include <arch/smp/mpspec.h>
#include <device/device.h>
#include <device/pci_ids.h>
-#include "../../../southbridge/via/vt8237r/vt8237r.h"
-#include "../../../southbridge/via/k8t890/k8t890.h"
-#include "../../../northbridge/amd/amdk8/amdk8_acpi.h"
+#include "southbridge/via/vt8237r/vt8237r.h"
+#include "southbridge/via/k8t890/k8t890.h"
+#include "northbridge/amd/amdk8/amdk8_acpi.h"
#include <cpu/amd/model_fxx_powernow.h>
extern const unsigned char AmlCode[];
#include <arch/acpi.h>
#include <arch/io.h>
#include <device/device.h>
-#include "../../../southbridge/amd/sb700/sb700.h"
+#include "southbridge/amd/sb700/sb700.h"
/*extern*/ u16 pm_base = 0x800;
/* pm_base should be set in sb acpi */
#include <console/console.h>
#include <arch/io.h>
#include <arch/pirq_routing.h>
-#include "../../../southbridge/amd/cs5536/cs5536.h"
+#include "southbridge/amd/cs5536/cs5536.h"
/* Platform IRQs */
#define PIRQA 11
extern unsigned char AmlCode[];
-#include "../../../southbridge/intel/i82801gx/i82801gx_nvs.h"
+#include "southbridge/intel/i82801gx/i82801gx_nvs.h"
static void acpi_create_gnvs(global_nvs_t *gnvs)
{
#include <arch/smp/mpspec.h>
#include <device/device.h>
#include <device/pci_ids.h>
-#include "../../../northbridge/amd/amdk8/amdk8_acpi.h"
+#include "northbridge/amd/amdk8/amdk8_acpi.h"
#include <cpu/amd/model_fxx_powernow.h>
#include <device/pci.h>
#include <cpu/amd/amdk8_sysconf.h>
#include <arch/acpi.h>
#include <arch/io.h>
#include <device/device.h>
-#include "../../../southbridge/amd/sb700/sb700.h"
+#include "southbridge/amd/sb700/sb700.h"
/*extern*/ u16 pm_base = 0x800;
/* pm_base should be set in sb acpi */
#include <arch/acpi.h>
#include <arch/io.h>
#include <device/device.h>
-#include "../../../southbridge/amd/sb700/sb700.h"
+#include "southbridge/amd/sb700/sb700.h"
/*extern*/ u16 pm_base = 0x800;
/* pm_base should be set in sb acpi */
unsigned long acpi_create_slic(unsigned long current);
#endif
-#include "../../../southbridge/intel/i82801gx/i82801gx_nvs.h"
+#include "southbridge/intel/i82801gx/i82801gx_nvs.h"
static void acpi_create_gnvs(global_nvs_t *gnvs)
{
memset((void *)gnvs, 0, sizeof(*gnvs));
#include <arch/romcc_io.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
-#include "../../../southbridge/intel/i82801gx/i82801gx_nvs.h"
+#include "southbridge/intel/i82801gx/i82801gx_nvs.h"
/* The southbridge SMI handler checks whether gnvs has a
* valid pointer before calling the trap handler
#include <arch/acpi.h>
#include <arch/io.h>
#include <device/device.h>
-#include "../../../southbridge/amd/sb700/sb700.h"
+#include "southbridge/amd/sb700/sb700.h"
/*extern*/ u16 pm_base = 0x800;
/* pm_base should be set in sb acpi */
} __attribute__((packed)) acpi_oemb_t;
#endif
-#include "../../../southbridge/intel/i82801gx/i82801gx_nvs.h"
+#include "southbridge/intel/i82801gx/i82801gx_nvs.h"
#if OLD_ACPI
static void acpi_create_oemb(acpi_oemb_t *oemb)
#include <arch/romcc_io.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
-#include "../../../southbridge/intel/i82801gx/i82801gx_nvs.h"
+#include "southbridge/intel/i82801gx/i82801gx_nvs.h"
/* The southbridge SMI handler checks whether gnvs has a
* valid pointer before calling the trap handler
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
#include <cpu/amd/amdk8_sysconf.h>
-#include "../../../northbridge/amd/amdk8/amdk8_acpi.h"
+#include "northbridge/amd/amdk8/amdk8_acpi.h"
#include "mb_sysconf.h"
#include <arch/acpi.h>
#include <arch/io.h>
#include <device/device.h>
-#include "../../../southbridge/amd/sb700/sb700.h"
+#include "southbridge/amd/sb700/sb700.h"
/*extern*/ u16 pm_base = 0x800;
/* pm_base should be set in sb acpi */
unsigned long acpi_create_slic(unsigned long current);
#endif
-#include "../../../southbridge/intel/i82801gx/i82801gx_nvs.h"
+#include "southbridge/intel/i82801gx/i82801gx_nvs.h"
static void acpi_create_gnvs(global_nvs_t *gnvs)
{
memset((void *)gnvs, 0, sizeof(*gnvs));
#include <arch/romcc_io.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
-#include "../../../southbridge/intel/i82801gx/i82801gx_nvs.h"
+#include "southbridge/intel/i82801gx/i82801gx_nvs.h"
/* The southbridge SMI handler checks whether gnvs has a
* valid pointer before calling the trap handler
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
#include <cpu/amd/amdk8_sysconf.h>
-#include "../../../northbridge/amd/amdk8/amdk8_acpi.h"
+#include "northbridge/amd/amdk8/amdk8_acpi.h"
#include <arch/cpu.h>
#include <cpu/amd/model_fxx_powernow.h>
#include <arch/acpi.h>
#include <arch/io.h>
#include <device/device.h>
-#include "../../../southbridge/amd/sb600/sb600.h"
+#include "southbridge/amd/sb600/sb600.h"
/*extern*/ u16 pm_base = 0x800;
/* pm_base should be set in sb acpi */
#include <console/console.h>
#include <arch/io.h>
#include <arch/pirq_routing.h>
-#include "../../../southbridge/amd/cs5536/cs5536.h"
+#include "southbridge/amd/cs5536/cs5536.h"
/* Platform IRQs */
#define PIRQA 10
#include <console/console.h>
#include <arch/io.h>
#include <arch/pirq_routing.h>
-#include "../../../southbridge/amd/cs5536/cs5536.h"
+#include "southbridge/amd/cs5536/cs5536.h"
/* Platform IRQs */
#define PIRQA 10
#include <console/console.h>
#include <arch/io.h>
#include <arch/pirq_routing.h>
-#include "../../../southbridge/amd/cs5536/cs5536.h"
+#include "southbridge/amd/cs5536/cs5536.h"
/* Platform IRQs */
#define PIRQA 10
#include <console/console.h>
#include <arch/io.h>
#include <arch/pirq_routing.h>
-#include "../../../southbridge/amd/cs5536/cs5536.h"
+#include "southbridge/amd/cs5536/cs5536.h"
/* Platform IRQs */
#define PIRQA 10
#include <arch/smp/mpspec.h>
#include <device/device.h>
#include <device/pci_ids.h>
-//#include "../../../northbridge/amd/amdfam10/amdfam10_acpi.h"
+//#include "northbridge/amd/amdfam10/amdfam10_acpi.h"
#include <cpu/amd/model_fxx_powernow.h>
#include <device/pci.h>
#include <cpu/amd/amdfam10_sysconf.h>
#include <arch/io.h>
#include <pc80/mc146818rtc.h>
#include "chip.h"
-#include "../southbridge/amd/cs5536/cs5536_smbus2.h"
+#include "southbridge/amd/cs5536/cs5536_smbus2.h"
#include <cpu/amd/vr.h>
/* Borrowed from mc146818rtc.c */
#include <arch/io.h>
#include <pc80/mc146818rtc.h>
#include "chip.h"
-#include "../southbridge/amd/cs5536/cs5536_smbus2.h"
+#include "southbridge/amd/cs5536/cs5536_smbus2.h"
/* Borrowed from mc146818rtc.c */
#include <arch/pirq_routing.h>
#include <console/console.h>
#include <arch/io.h>
-#include "../../../southbridge/amd/cs5536/cs5536.h"
+#include "southbridge/amd/cs5536/cs5536.h"
/* Platform IRQs */
#define PIRQA 11
#include <arch/pirq_routing.h>
#include <console/console.h>
#include <arch/io.h>
-#include "../../../southbridge/amd/cs5536/cs5536.h"
+#include "southbridge/amd/cs5536/cs5536.h"
/* Platform IRQs */
#define PIRQA 11
}
#endif
-#include "../../../southbridge/intel/i82801gx/i82801gx_nvs.h"
+#include "southbridge/intel/i82801gx/i82801gx_nvs.h"
static void acpi_create_gnvs(global_nvs_t *gnvs)
{
memset((void *)gnvs, 0, sizeof(*gnvs));
#include <arch/romcc_io.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
-#include "../../../southbridge/intel/i82801gx/i82801gx_nvs.h"
+#include "southbridge/intel/i82801gx/i82801gx_nvs.h"
/* The southbridge SMI handler checks whether gnvs has a
* valid pointer before calling the trap handler
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
#include <cpu/amd/amdk8_sysconf.h>
-#include "../../../northbridge/amd/amdk8/amdk8_acpi.h"
+#include "northbridge/amd/amdk8/amdk8_acpi.h"
#include <arch/cpu.h>
#include <cpu/amd/model_fxx_powernow.h>
#include <arch/acpi.h>
#include <arch/io.h>
#include <device/device.h>
-#include "../../../southbridge/amd/sb600/sb600.h"
+#include "southbridge/amd/sb600/sb600.h"
/*extern*/ u16 pm_base = 0x800;
/* pm_base should be set in sb acpi */
#include <arch/io.h>
#include <device/pci.h>
#include <device/pci_ids.h>
-#include "../../../southbridge/amd/sb600/sb600.h"
+#include "southbridge/amd/sb600/sb600.h"
#include <delay.h>
#endif /* __PRE_RAM__ */
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
#include <cpu/amd/amdk8_sysconf.h>
-#include "../../../northbridge/amd/amdk8/amdk8_acpi.h"
+#include "northbridge/amd/amdk8/amdk8_acpi.h"
#include <arch/cpu.h>
#include <cpu/amd/model_fxx_powernow.h>
#include <arch/acpi.h>
#include <arch/io.h>
#include <device/device.h>
-#include "../../../southbridge/amd/sb600/sb600.h"
+#include "southbridge/amd/sb600/sb600.h"
/*extern*/ u16 pm_base = 0x800;
/* pm_base should be set in sb acpi */
#include <console/console.h>
#include <arch/io.h>
#include <arch/pirq_routing.h>
-#include "../../../southbridge/amd/cs5536/cs5536.h"
+#include "southbridge/amd/cs5536/cs5536.h"
/* Platform IRQs */
#define PIRQA 11
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
#include <cpu/amd/amdk8_sysconf.h>
-#include "../../../northbridge/amd/amdk8/amdk8_acpi.h"
+#include "northbridge/amd/amdk8/amdk8_acpi.h"
#include <cpu/amd/model_fxx_powernow.h>
extern const unsigned char AmlCode[];
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
#include <cpu/amd/amdk8_sysconf.h>
-#include "../../../northbridge/amd/amdk8/amdk8_acpi.h"
+#include "northbridge/amd/amdk8/amdk8_acpi.h"
#include <cpu/amd/model_fxx_powernow.h>
extern const unsigned char AmlCode[];
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
#include <cpu/amd/amdk8_sysconf.h>
-#include "../../../northbridge/amd/amdk8/amdk8_acpi.h"
+#include "northbridge/amd/amdk8/amdk8_acpi.h"
#include <cpu/amd/model_fxx_powernow.h>
extern const unsigned char AmlCode[];
#include <arch/acpi.h>
#include <device/device.h>
#include <device/pci_ids.h>
-#include "../../../northbridge/via/vx800/vx800.h"
+#include "northbridge/via/vx800/vx800.h"
extern const unsigned char AmlCode_dsdt[];
extern const unsigned char AmlCode_ssdt[];
#include <string.h>
#include <arch/acpi.h>
-#include "../../../northbridge/via/vx800/vx800.h"
+#include "northbridge/via/vx800/vx800.h"
void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)
{
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
-#include "../../../southbridge/via/vt8237r/vt8237r.h"
+#include "southbridge/via/vt8237r/vt8237r.h"
extern const unsigned char AmlCode[];
#include <string.h>
#include <arch/acpi.h>
-#include "../../../southbridge/via/vt8237r/vt8237r.h"
+#include "southbridge/via/vt8237r/vt8237r.h"
void acpi_create_fadt(acpi_fadt_t *fadt,acpi_facs_t *facs,void *dsdt){
acpi_header_t *header=&(fadt->header);
#include <device/pci.h>
#include <string.h>
#include <stdint.h>
-#include "../../../southbridge/via/vt8237r/vt8237r.h"
+#include "southbridge/via/vt8237r/vt8237r.h"
static void *smp_write_config_table(void *v)
{
#include <console/console.h>
#include <arch/io.h>
#include <arch/pirq_routing.h>
-#include "../../../southbridge/amd/cs5536/cs5536.h"
+#include "southbridge/amd/cs5536/cs5536.h"
/* Platform IRQs */
#define PIRQA 11