All these boards already had the CACHE_AS_RAM option in their individual

configs. I just moved it the the CPU that they all use.

Signed-off-by: Warren Turkal <wt@penguintechs.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5871 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

diff --git a/src/cpu/amd/model_lx/Kconfig b/src/cpu/amd/model_lx/Kconfig
index 07bbce4f0bdd38077306ee426ba2df2488014746..742ef6911a77744b0f95748c3e07d8c1d5cbb726 100644 (file)
--- a/src/cpu/amd/model_lx/Kconfig
+++ b/src/cpu/amd/model_lx/Kconfig
@@ -1,25 +1,27 @@
 config CPU_AMD_LX
        bool
 
+if CPU_AMD_LX
+
+config CPU_SPECIFIC_OPTIONS
+       def_bool y
+       select CACHE_AS_RAM
+
 config DCACHE_RAM_BASE
        hex
        default 0xc8000
-       depends on CPU_AMD_LX
 
 config DCACHE_RAM_SIZE
        hex
        default 0x8000
-       depends on CPU_AMD_LX
 
 config GEODE_VSA
        bool
        default y
-       depends on CPU_AMD_LX
        select PCI_OPTION_ROM_RUN_REALMODE
 
 config GEODE_VSA_FILE
        bool "Add a VSA image"
-       depends on CPU_AMD_LX
        help
          Select this option if you have an AMD Geode LX vsa that you would
          like to add to your ROM.
@@ -29,9 +31,9 @@ config GEODE_VSA_FILE
 
 config VSA_FILENAME
        string "AMD Geode LX VSA path and filename"
-       depends on GEODE_VSA_FILE && CPU_AMD_LX
+       depends on GEODE_VSA_FILE
        default "gpl_vsa_lx_102.bin"
        help
          The path and filename of the file to use as VSA.
 
-
+endif # CPU_AMD_LX

diff --git a/src/mainboard/amd/db800/Kconfig b/src/mainboard/amd/db800/Kconfig
index b973c9dad82ec2ac42b056340368099e713b68a9..e1b94e9011ab062f60dadf90710b72406e05bae5 100644 (file)
--- a/src/mainboard/amd/db800/Kconfig
+++ b/src/mainboard/amd/db800/Kconfig
@@ -10,7 +10,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select HAVE_PIRQ_TABLE
        select PIRQ_ROUTE
        select UDELAY_TSC
-       select CACHE_AS_RAM
        select BOARD_ROMSIZE_KB_256
 
 config MAINBOARD_DIR

diff --git a/src/mainboard/amd/norwich/Kconfig b/src/mainboard/amd/norwich/Kconfig
index 6c65f4de1a422e79ed81e7d98711c109aed4af3d..3dc214f00d63e355bfba669071e9ec6814cdf465 100644 (file)
--- a/src/mainboard/amd/norwich/Kconfig
+++ b/src/mainboard/amd/norwich/Kconfig
@@ -9,7 +9,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select HAVE_PIRQ_TABLE
        select PIRQ_ROUTE
        select UDELAY_TSC
-       select CACHE_AS_RAM
        select BOARD_ROMSIZE_KB_256
 
 config MAINBOARD_DIR

diff --git a/src/mainboard/artecgroup/dbe61/Kconfig b/src/mainboard/artecgroup/dbe61/Kconfig
index 9dfb0ca72a8da8d51d9375498a0f61a015da41b6..52669294f70e9796d22885752ca3a03744b264f5 100644 (file)
--- a/src/mainboard/artecgroup/dbe61/Kconfig
+++ b/src/mainboard/artecgroup/dbe61/Kconfig
@@ -9,7 +9,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select HAVE_PIRQ_TABLE
        select PIRQ_ROUTE
        select UDELAY_TSC
-       select CACHE_AS_RAM
        select BOARD_ROMSIZE_KB_256
 
 config MAINBOARD_DIR

diff --git a/src/mainboard/digitallogic/msm800sev/Kconfig b/src/mainboard/digitallogic/msm800sev/Kconfig
index f98101b03a830f2a84acb6439d190aae8597c932..a082b1fe01cd69f39b4e9766e94bef78f59d542b 100644 (file)
--- a/src/mainboard/digitallogic/msm800sev/Kconfig
+++ b/src/mainboard/digitallogic/msm800sev/Kconfig
@@ -10,7 +10,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select HAVE_PIRQ_TABLE
        select PIRQ_ROUTE
        select UDELAY_TSC
-       select CACHE_AS_RAM
        select BOARD_ROMSIZE_KB_256
 
 config MAINBOARD_DIR

diff --git a/src/mainboard/iei/pcisa-lx-800-r10/Kconfig b/src/mainboard/iei/pcisa-lx-800-r10/Kconfig
index 7bef792a0b29dbeb6517d87449fa820104c564d3..a6f512663391ad55d40e068e6ac2613925ae6af4 100644 (file)
--- a/src/mainboard/iei/pcisa-lx-800-r10/Kconfig
+++ b/src/mainboard/iei/pcisa-lx-800-r10/Kconfig
@@ -9,7 +9,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select SUPERIO_WINBOND_W83627HF
        select HAVE_PIRQ_TABLE
        select PIRQ_ROUTE
-       select CACHE_AS_RAM
        select BOARD_ROMSIZE_KB_256
 
 config MAINBOARD_DIR

diff --git a/src/mainboard/lippert/hurricane-lx/Kconfig b/src/mainboard/lippert/hurricane-lx/Kconfig
index b30b8bba45f150251944d3c782fe72e31fc4c0f6..027988f959658ecf1d1fd3ab7fda1b1868b684a1 100644 (file)
--- a/src/mainboard/lippert/hurricane-lx/Kconfig
+++ b/src/mainboard/lippert/hurricane-lx/Kconfig
@@ -10,7 +10,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select HAVE_PIRQ_TABLE
        select PIRQ_ROUTE
        select UDELAY_TSC
-       select CACHE_AS_RAM
        # Board is equipped with a 1 MB SPI flash, however, due to limitations
        # of the IT8712F Super I/O, only the top 512 KB are directly mapped.
        select BOARD_ROMSIZE_KB_512

diff --git a/src/mainboard/lippert/literunner-lx/Kconfig b/src/mainboard/lippert/literunner-lx/Kconfig
index 4f4b28902ca66c90e30e568c0e777dd841e36ed2..482f571e8da5bee735eb3148043295c74126a27e 100644 (file)
--- a/src/mainboard/lippert/literunner-lx/Kconfig
+++ b/src/mainboard/lippert/literunner-lx/Kconfig
@@ -11,7 +11,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select HAVE_PIRQ_TABLE
        select PIRQ_ROUTE
        select UDELAY_TSC
-       select CACHE_AS_RAM
        # Board is equipped with a 1 MB SPI flash, however, due to limitations
        # of the IT8712F Super I/O, only the top 512 KB are directly mapped.
        select BOARD_ROMSIZE_KB_512

diff --git a/src/mainboard/lippert/roadrunner-lx/Kconfig b/src/mainboard/lippert/roadrunner-lx/Kconfig
index ef6171fa50a8c5703d7ac4b900686eb77ca8b9d1..44326d193f1446bf7980bb102fe99c2c19db501e 100644 (file)
--- a/src/mainboard/lippert/roadrunner-lx/Kconfig
+++ b/src/mainboard/lippert/roadrunner-lx/Kconfig
@@ -10,7 +10,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select HAVE_PIRQ_TABLE
        select PIRQ_ROUTE
        select UDELAY_TSC
-       select CACHE_AS_RAM
        # Standard chip is a 512 KB FWH. Replacing it with a 1 MB
        # SST 49LF008A is possible.
        select BOARD_ROMSIZE_KB_512

diff --git a/src/mainboard/lippert/spacerunner-lx/Kconfig b/src/mainboard/lippert/spacerunner-lx/Kconfig
index 89a52ae1a6c4cbfdfeb084c0b6a7398a00f73b6e..7526d1ecb43763cdfa73d5cc8edaf509b1e241b9 100644 (file)
--- a/src/mainboard/lippert/spacerunner-lx/Kconfig
+++ b/src/mainboard/lippert/spacerunner-lx/Kconfig
@@ -11,7 +11,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select HAVE_PIRQ_TABLE
        select PIRQ_ROUTE
        select UDELAY_TSC
-       select CACHE_AS_RAM
        # Board is equipped with a 1 MB SPI flash, however, due to limitations
        # of the IT8712F Super I/O, only the top 512 KB are directly mapped.
        select BOARD_ROMSIZE_KB_512

diff --git a/src/mainboard/pcengines/alix1c/Kconfig b/src/mainboard/pcengines/alix1c/Kconfig
index 395df75eb21f66ccc94478a97232bda61bc1d061..b10095c902726aa335098fce0f1bd55499d9afcc 100644 (file)
--- a/src/mainboard/pcengines/alix1c/Kconfig
+++ b/src/mainboard/pcengines/alix1c/Kconfig
@@ -10,7 +10,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select HAVE_PIRQ_TABLE
        select PIRQ_ROUTE
        select UDELAY_TSC
-       select CACHE_AS_RAM
        select BOARD_ROMSIZE_KB_512
 
 config MAINBOARD_DIR

diff --git a/src/mainboard/pcengines/alix2d/Kconfig b/src/mainboard/pcengines/alix2d/Kconfig
index bd363f3407cb9185b9a264309f8b665f91545634..bb54d1cad118c4cf6d793b82bc47b3125755f2f7 100644 (file)
--- a/src/mainboard/pcengines/alix2d/Kconfig
+++ b/src/mainboard/pcengines/alix2d/Kconfig
@@ -9,7 +9,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select HAVE_PIRQ_TABLE
        select PIRQ_ROUTE
        select UDELAY_TSC
-       select CACHE_AS_RAM
        select BOARD_ROMSIZE_KB_512
 
 config MAINBOARD_DIR

diff --git a/src/mainboard/traverse/geos/Kconfig b/src/mainboard/traverse/geos/Kconfig
index c1d1af41a05d3db96c6ab1c8a707d77539d790ef..1c85149671d44a75653845c1f5ed31f0e836a955 100644 (file)
--- a/src/mainboard/traverse/geos/Kconfig
+++ b/src/mainboard/traverse/geos/Kconfig
@@ -9,7 +9,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select HAVE_PIRQ_TABLE
        select PIRQ_ROUTE
        select UDELAY_TSC
-       select CACHE_AS_RAM
        select BOARD_ROMSIZE_KB_1024
 
 config MAINBOARD_DIR

diff --git a/src/mainboard/winent/pl6064/Kconfig b/src/mainboard/winent/pl6064/Kconfig
index df6db01198f0a3396aa88e792e981c809b9daf03..1ec56929d50d64b9c6f8d403269d0c0e9d13e0fe 100644 (file)
--- a/src/mainboard/winent/pl6064/Kconfig
+++ b/src/mainboard/winent/pl6064/Kconfig
@@ -10,7 +10,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select HAVE_PIRQ_TABLE
        select PIRQ_ROUTE
        select UDELAY_TSC
-       select CACHE_AS_RAM
        select BOARD_ROMSIZE_KB_512
 
 config MAINBOARD_DIR