Clear bit 35 of msr c001_102a in Fam10 rev C cores.

Signed-off-by: Arne Georg Gleditsch <arne.gleditsch@numascale.com>
Acked-by: Scott Duplichan <scott@notabs.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5817 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

diff --git a/src/cpu/amd/model_10xxx/defaults.h b/src/cpu/amd/model_10xxx/defaults.h
index 2fbfbb26fc127ae9c05ebceac99b89e53f19fba2..9a0e349e0a563144242fe872e3149739d3b1fba2 100644 (file)
--- a/src/cpu/amd/model_10xxx/defaults.h
+++ b/src/cpu/amd/model_10xxx/defaults.h
@@ -91,7 +91,7 @@ static const struct {
 
         { BU_CFG2, AMD_DRBH_Cx , AMD_PTYPE_ALL,
          0x00000000, 1 << (35-32),
-         0x00000000, 1 << (35-32) },   /* Erratum 343 (set to 0 after CAR, in post_cache_as_ram() )  */  
+         0x00000000, 1 << (35-32) },   /* Erratum 343 (set to 0 after CAR, in post_cache_as_ram()/model_10xxx_init() )  */  
 };
 
 

diff --git a/src/cpu/amd/model_10xxx/model_10xxx_init.c b/src/cpu/amd/model_10xxx/model_10xxx_init.c
index 6f61fc37fd87100a9e60564e8b28e99af7b1d117..a0e1f6fdbec9c2ca3dca0c626d4d2ad2bbe08738 100644 (file)
--- a/src/cpu/amd/model_10xxx/model_10xxx_init.c
+++ b/src/cpu/amd/model_10xxx/model_10xxx_init.c
@@ -113,9 +113,11 @@ static void model_10xxx_init(device_t dev)
        msr.hi &= ~(1 << (46 - 32));
        wrmsr(NB_CFG_MSR, msr);
 
-       /* Clear ClLinesToNbDis */
        msr = rdmsr(BU_CFG2_MSR);
+       /* Clear ClLinesToNbDis */
        msr.lo &= ~(1 << 15);
+       /* Clear bit 35 as per Erratum 343 */
+       msr.hi &= ~(1 << (35-32));
        wrmsr(BU_CFG2_MSR, msr);
 
        /* Write protect SMM space with SMMLOCK. */