projects / coreboot.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 3f1d29c) | patch
This patch corrects a coding error in the original implementation
authorScott Duplichan <scott@notabs.org>
Tue, 14 Sep 2010 17:28:41 +0000 (17:28 +0000)
committerMarc Jones <marc.jones@amd.com>
Tue, 14 Sep 2010 17:28:41 +0000 (17:28 +0000)
commit9b0c690c09137d85d9c9280ce082094089ee9032
tree09fc1a7a992ffbc21dc28d4be59632449c6c07eetree | snapshot
parent3f1d29c408e35d379c85a6c2671401fcc4964e34commit | diff
This patch corrects a coding error in the original implementation
of 'Erratum 343 for AMD Fam10h CPUs' (rev 4345). The original code
sets msr c001_102a bit 3 when bit 35 was intended.

Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5814 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
src/cpu/amd/car/cache_as_ram.inc diff | blob | history
my coreboot WIP stuff (asus m5a99x-evo board)