Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5885
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
config CPU_AMD_SOCKET_S1G1
bool
+
+if CPU_AMD_SOCKET_S1G1
+
+config SOCKET_SPECIFIC_OPTIONS
+ def_bool y
select K8_REV_F_SUPPORT
select K8_HT_FREQ_1G_SUPPORT
select CPU_AMD_MODEL_FXX
config CPU_SOCKET_TYPE
hex
default 0x12
- depends on CPU_AMD_SOCKET_S1G1
#DDR2 and REG, S1G1
config DIMM_SUPPORT
hex
default 0x0204
- depends on CPU_AMD_SOCKET_S1G1
+config CPU_ADDR_BITS
+ int
+ default 40
+
+config DCACHE_RAM_BASE
+ hex
+ default 0xc8000
+
+config DCACHE_RAM_SIZE
+ hex
+ default 0x08000
+
+config DCACHE_RAM_GLOBAL_VAR_SIZE
+ hex
+ default 0x01000
+
+endif
string
default amd/dbm690t
-config DCACHE_RAM_BASE
- hex
- default 0xc8000
-
-config DCACHE_RAM_SIZE
- hex
- default 0x08000
-
-config DCACHE_RAM_GLOBAL_VAR_SIZE
- hex
- default 0x01000
-
config APIC_ID_OFFSET
hex
default 0x0
string
default technexion/tim5690
-config DCACHE_RAM_BASE
- hex
- default 0xc8000
-
-config DCACHE_RAM_SIZE
- hex
- default 0x08000
-
-config DCACHE_RAM_GLOBAL_VAR_SIZE
- hex
- default 0x01000
-
config APIC_ID_OFFSET
hex
default 0x0
string
default technexion/tim8690
-config DCACHE_RAM_BASE
- hex
- default 0xc8000
-
-config DCACHE_RAM_SIZE
- hex
- default 0x08000
-
-config DCACHE_RAM_GLOBAL_VAR_SIZE
- hex
- default 0x01000
-
config APIC_ID_OFFSET
hex
default 0x0