2010-11-16 |
Stefan Rebernig | 2nd forward unit - 58MHz with 31bit shift... |
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2010-11-16 |
Stefan Rebernig | nop insertion added |
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2010-11-15 |
Stefan Rebernig | pipeline erste version mit 31bit shifter (kostet 7MHz... |
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2010-11-15 |
Stefan Rebernig | test pipe 2 |
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2010-11-15 |
Stefan Rebernig | pipe v1 |
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2010-11-15 |
Markus Hofstätter | Fixed some bugs. |
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2010-11-15 |
Markus Hofstätter | gpm module and exec first buggy version. |
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2010-11-15 |
Stefan Rebernig | blub |
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2010-11-15 |
Stefan Rebernig | writeback stage |
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2010-11-15 |
Markus Hofstätter | Merge branch 'master' of wien.tomnetworks.com:calu |
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2010-11-15 |
Stefan | displacement |
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2010-11-15 |
Markus HOFSTAETTER | exec impl. |
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2010-11-15 |
Stefan | added pipe 2 reg, testbench, top_level_entity, ... |
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2010-11-15 |
Stefan | pipe2 |
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2010-11-14 |
Markus Hofstätter | Seperation to differen execute operations. |
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2010-11-14 |
Stefan | quartus tcl script für meinen cyclone II, top level... |
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2010-11-14 |
Stefan | gitignore für sim |
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2010-11-14 |
Stefan | do file for testbench - a few test instructions added... |
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2010-11-14 |
Stefan | fetch und decode kompilierbar, generelle tb, änderung... |
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2010-11-14 |
Markus Hofstätter | Added interface types |
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2010-11-14 |
Markus Hofstaetter | Added arithmetic and logical vhdl functions |
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2010-11-13 |
Martin Perner | sim: instrs can have different effect on perf count |
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2010-11-13 |
Stefan | decode stage die erste |
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2010-11-13 |
Stefan | aktualisierung block diagramm |
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2010-11-11 |
Martin Perner | bench: commenting |
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2010-11-11 |
Martin Perner | bench: wurm says 'commit!!!!!11elfeins' |
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2010-11-11 |
Martin Perner | bench: fibmmem ++ |
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2010-11-11 |
Martin Perner | block: stufen => stages, usw |
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2010-11-10 |
Stefan | Blockdiagrammbeschreibung |
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2010-11-10 |
Stefan | update blockdiagramm |
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2010-11-10 |
Stefan | Blockdiagramm: PC in PIPE1 verschoben |
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2010-11-10 |
Martin Perner | bench: fib mega mem style |
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2010-11-10 |
U-Thor\Schakal | added rw-r port ram |
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2010-11-10 |
Stefan | VHDL Grundkonstrukt |
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2010-11-10 |
Bernhard Urban | bench: fibmem.s @ 169 instructions |
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2010-11-10 |
Stefan | Block: First version |
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2010-11-09 |
Bernhard Urban | bench: fibmem.s @ 177 instructions |
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2010-11-09 |
Bernhard Urban | bench: fibmem.s @ 193 instructions |
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2010-11-09 |
Martin Perner | bench: added datadeps |
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2010-11-09 |
Martin Perner | bench: bugfixes |
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2010-11-09 |
Martin Perner | sim: removed old ram presets |
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2010-11-09 |
Bernhard Urban | bench: added max.s and sum.s |
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2010-11-09 |
Martin Perner | bench: added benchmarks, fib.s already done |
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2010-11-09 |
Martin Perner | sim: added performance counter |
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2010-11-09 |
Martin Perner | sim: bugfix in stackop |
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2010-11-09 |
Martin Perner | sim: bugfix for overflow and so ... |
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2010-11-04 |
Martin Perner | sim: removed ccache |
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2010-11-04 |
Martin Perner | isa: style file for stefan and others |
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2010-11-04 |
Martin Perner | sim: fix for mani's ubuntu gcc |
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2010-11-04 |
Martin PERNER | test: added -j to make |
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2010-11-03 |
Bernhard Urban | 3_test: two examples to show (sum and strncmp) |
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2010-11-03 |
Martin Perner | sim: call pushed current pc instead of next pc onto... |
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2010-11-03 |
Bernhard Urban | 3_test: prep for praes tomorrow |
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2010-11-03 |
Bernhard Urban | 3a_asm: print no debug msgs by default |
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2010-11-03 |
Martin Perner | sim: added [st|ld]x |
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2010-11-03 |
Martin Perner | asm/sim: testcases for special ops |
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2010-11-03 |
Martin Perner | sim: added special moves |
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2010-11-03 |
Martin Perner | sim: increased default return address |
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2010-11-03 |
Martin Perner | sim: stw added |
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2010-11-03 |
Martin Perner | asm/sim: tests for [ld|st][b|h] |
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2010-11-03 |
Martin Perner | sim: added sth/ldh |
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2010-11-03 |
Martin Perner | isa: st* rDestination => rSource |
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2010-11-03 |
Martin Perner | sim: added ldb, stb |
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2010-11-03 |
Martin Perner | tst: bugfix in umul from manfred |
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2010-11-02 |
Martin Perner | sim: easteregg for wurm |
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2010-11-02 |
Martin Perner | sim: setdata bug |
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2010-11-02 |
Martin Perner | sim: bugfix/feature @ help/status |
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2010-11-02 |
Martin Perner | sim: fixed for tilab |
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2010-11-01 |
Martin Perner | sim: added shift |
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2010-11-01 |
Martin Perner | sim: bugfix @ push |
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2010-11-01 |
Bernhard Urban | 3a_asm: wrong order in stack ops |
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2010-11-01 |
Martin Perner | sim: added branchreg and stackop |
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2010-11-01 |
Martin Perner | sim: set reg/ram |
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2010-11-01 |
Martin Perner | sim: added list breakpoints |
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2010-11-01 |
Martin Perner | sim: hex/dec inputs solved more userfriendly |
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2010-11-01 |
Bernhard Urban | 3a_asm: more .fill power and better 'make test' target |
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2010-11-01 |
Bernhard Urban | 2_isa: alias for brr and callr |
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2010-11-01 |
Martin Perner | sim: added cmp/i |
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2010-11-01 |
Bernhard Urban | 3a_asm: relative jumps |
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2010-10-31 |
Bernhard Urban | 3a_asm/2_isa: fixed our examples |
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2010-10-31 |
Bernhard Urban | 3a_asm: remaining instructions added |
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2010-10-31 |
Bernhard Urban | 3a_asm: introducing @hi and @lo for immediate |
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2010-10-31 |
Bernhard Urban | 3a_asm: using Expr in both stages |
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2010-10-31 |
Bernhard Urban | 3a_asm: modified expr stuff (inclusive reusing existing... |
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2010-10-31 |
Bernhard Urban | 3a_asm: expr eval init |
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2010-10-31 |
Bernhard Urban | 3a_asm: ghc flags |
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2010-10-31 |
Bernhard Urban | 3a_asm: .define support |
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2010-10-31 |
Bernhard Urban | 3a_asm: changed data structure again to calculate relat... |
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2010-10-31 |
Bernhard Urban | 3a_asm: 'sum.s' is parseable now :) |
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2010-10-31 |
Bernhard Urban | 3a_asm: add parsers for flags |
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2010-10-31 |
Bernhard Urban | 3a_asm: primitive version of parsing "add" |
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2010-10-31 |
Bernhard Urban | isa: alias for shift and mov special |
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2010-10-31 |
Martin Perner | isa: bug in shift => wasn't shown |
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2010-10-31 |
Martin Perner | sim: new instructions, bugfix in others |
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2010-10-31 |
Martin Perner | sim: arith. fixes, optimized mem access |
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2010-10-31 |
Martin Perner | disasm/sim: bugfix for ldi |
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2010-10-31 |
Bernhard Urban | isa: minor fixes |
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2010-10-31 |
Martin Perner | sim: added cmds |
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2010-10-31 |
Martin Perner | disasm/sim: changed interface, added readline to sim |
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2010-10-31 |
Martin Perner | disasm/sim: changed interface, branch => br, features++ |
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next |