Stefan Reinauer [Fri, 17 Dec 2010 00:03:18 +0000 (00:03 +0000)]
guard against the case that CONFIG_WAIT_BEFORE_CPUS_INIT is not defined at all.
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6190
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Stefan Reinauer [Thu, 16 Dec 2010 23:57:43 +0000 (23:57 +0000)]
drop unused code in div64.h
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6189
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Stefan Reinauer [Thu, 16 Dec 2010 23:57:00 +0000 (23:57 +0000)]
print what make is doing (CBFS call)
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6188
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Stefan Reinauer [Thu, 16 Dec 2010 23:52:04 +0000 (23:52 +0000)]
don't hardcode CONFIG_PC80_SYSTEM
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6187
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Stefan Reinauer [Thu, 16 Dec 2010 23:37:17 +0000 (23:37 +0000)]
- Fix shortcoming in Kconfig when handling multiple "choice"s
- move some variables where they belong
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6186
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Stefan Reinauer [Thu, 16 Dec 2010 23:24:27 +0000 (23:24 +0000)]
fix according to coding guidelines
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6185
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Uwe Hermann [Thu, 16 Dec 2010 19:57:54 +0000 (19:57 +0000)]
Add TINY_BOOTBLOCK support for the SiS966 southbridge.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6184
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Uwe Hermann [Thu, 16 Dec 2010 19:51:38 +0000 (19:51 +0000)]
Get mptable OEM/product ID from kconfig variables.
We currently use "COREBOOT" unconditionally as the "OEM ID" in our
mptable.c files, and hardcode the mainboard name in mptable.c like this:
mptable_init(mc, "DK8-HTX ", LAPIC_ADDR);
However, the spec says
"OEM ID: A string that identifies the manufacturer of the system hardware."
(Table 4-2, page 42)
so "COREBOOT" doesn't match the spec, we should use the hardware vendor name.
Thus, use CONFIG_MAINBOARD_VENDOR which we have already as the "OEM ID"
(truncate/fill it to 8 characters as per spec).
Also, use CONFIG_MAINBOARD_PART_NUMBER (the board name) as "product ID",
and truncate/fill it to 12 characters as per spec, if needed.
Abuild-tested.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6183
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Patrick Georgi [Thu, 16 Dec 2010 07:36:28 +0000 (07:36 +0000)]
Add support for cbfs-files-y to the build system.
That variable allows chipset components to add files to
the CBFS image, for details see
http://www.coreboot.org/pipermail/coreboot/2010-December/062483.html
Compared to the patch in that mail this commit improves dependency
tracking a bit.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Joseph Smith <joe@settoplinux.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6182
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Wed, 15 Dec 2010 11:32:11 +0000 (11:32 +0000)]
Build fix.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6181
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Uwe Hermann [Wed, 15 Dec 2010 08:56:19 +0000 (08:56 +0000)]
Cleanup up HD audio codec / hda_verb.h files.
Most of the current hda_verb.h files are identical (same MD5 sum) and are
intended for a specific MCP55 board with the Realtek ALC880 audio codec,
which has the vendor/device ID of 0x10ec0880. They were splitted out from the
MCP55 southbridge code and put into board dirs a long time ago (which is
correct, as those settings are indeed board-specific), but they were never
adapted to those boards.
Here's the table of which codec is soldered onto which board, based on
checking the vendor website board spec pages, and the board manuals:
- GIGABYTE GA-M57SLI-S4: Realtek ALC883
- MSI MS-7260: Realtek ALC883
- MSI MS-9652: Realtek ALC888
- MSI MS-9282: Server board, doesn't have audio at all
- Tyan S2912: Server board, doesn't have audio at all
- All Supermicro boards: Server boards, don't have audio at all
- NVIDIA l1_2pvv: No public info to be found, but I assume this was the
original MCP55 eval board for the port and it's probably has the Realtek
ALC880 codec used in the original hda_verb.h.
These are the codec vendor device/IDs involved:
Realtek ALC880: 0x10ec0880
Realtek ALC883: 0x10ec0883
Realtek ALC888: 0x10ec0888
The following files are marked as incorrect / TODO, as the ID of the codec
doesn't match and thus will never get actually used (you'll see
"HDA: no verb!" or similar in the coreboot logs). Even if the ID matched,
the rest of the table would be incorrect anyway because the values are
highly board-specific.
./src/mainboard/gigabyte/m57sli/hda_verb.h
./src/mainboard/msi/ms9652_fam10/hda_verb.h
./src/mainboard/msi/ms9282/hda_verb.h
The following files can be safely dropped as these are server boards and
don't have HD audio (or other audio) at all:
./src/mainboard/supermicro/h8dmr/hda_verb.h
./src/mainboard/supermicro/h8qme_fam10/hda_verb.h
./src/mainboard/supermicro/h8dme/hda_verb.h
./src/mainboard/supermicro/h8dmr_fam10/hda_verb.h
./src/mainboard/tyan/s2912/hda_verb.h
./src/mainboard/tyan/s2912_fam10/hda_verb.h
The following two are correct and can stay:
./src/mainboard/nvidia/l1_2pvv/hda_verb.h
./src/mainboard/getac/p470/hda_verb.h
Abuild-tested.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6180
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Zheng Bao [Tue, 14 Dec 2010 02:02:34 +0000 (02:02 +0000)]
Add dump support for the Winbond/Nuvoton W83527HG.
The datasheet is available on nuvoton's website.
http://www.nuvoton.com/NuvotonMOSS/Community/ProductInfo.aspx?
tp_GUID=
cf73485c-9e0a-4218-9bee-
89dfe9a7bb87
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6179
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Zheng Bao [Tue, 14 Dec 2010 01:47:18 +0000 (01:47 +0000)]
Set the ROMSIZE as 4MB.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6178
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Stefan Reinauer [Mon, 13 Dec 2010 22:16:45 +0000 (22:16 +0000)]
no leading zeroes.
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6177
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Rudolf Marek [Mon, 13 Dec 2010 20:43:33 +0000 (20:43 +0000)]
Attached patch implements the memory speed reductions (and 2T/1T clock logic) for DDR1 memory (939 sockets). The details can be found in BKDG chapter 4.1.3.3.
The patch looks at certain DDR configurations (dual rank/single rank) and lowers the clocks to 2T or frequency as guide suggest. It sets the DualDIMMen bit which I believe should be set for non-dual channel configs.
The patch does not implement support for three dimm configurations supported from revE.
On the other hand it should improve greatly memory stability across the 939 platform.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6176
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Rudolf Marek [Mon, 13 Dec 2010 20:04:25 +0000 (20:04 +0000)]
This patch just turns on the ACPI resume.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6175
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Rudolf Marek [Mon, 13 Dec 2010 20:02:23 +0000 (20:02 +0000)]
Compile cbmem.c instead of including it in romstage,
and do that only if resume is done.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6174
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Rudolf Marek [Mon, 13 Dec 2010 19:59:13 +0000 (19:59 +0000)]
Following patch adds support for suspend/resume functions. I had to change the get_cbmem_toc because macro magic did not work well.
The writes to NVRAM are not used in asrock board (k8 pre rev f) but they should work when used with am2 boards. In fact maybe the suspend will work on mahogany or others ;) - with some simple patch which follows for asrock.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6173
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Rudolf Marek [Mon, 13 Dec 2010 19:53:58 +0000 (19:53 +0000)]
Following patch adds support to bring out the memory out of self refresh when doing resume.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
The patch is based on my 2008 patch.
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6172
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Rudolf Marek [Mon, 13 Dec 2010 19:50:25 +0000 (19:50 +0000)]
We hardcode highmemory size in every northbridge! This is bad, and especially if suspend to ram is involved. Let the default be taken from cbmem.h which also handles the suspend logic.
Abuild tested. Please check all changes if I did not make any wrong while converting this to bytes.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6171
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Uwe Hermann [Mon, 13 Dec 2010 13:44:33 +0000 (13:44 +0000)]
Add support for the ASUS M2N-E board.
This is an AMD K8 + NVIDIA MCP55 + ITE IT8716F mainboard.
It has a working hda_verb.h file for HD audio, and a fanctl.c file is
used to enable the CPU fan (among others) so that we don't kill the
CPU due to excessive heat.
Even though some TODOs remain of course, it works good enough to
successfully boot Linux (e.g. via SeaBIOS).
The full status report is available at:
http://www.coreboot.org/ASUS_M2N-E
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6170
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Zheng Bao [Sun, 12 Dec 2010 14:40:29 +0000 (14:40 +0000)]
Add detection support for the Winbond W83527HG Super I/O.
Running result.
superiotool r6131
Found Winbond W83527HG (id=0xb0, rev=0x73) at 0x2e
The documentation is not available yet.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6169
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Stefan Reinauer [Sun, 12 Dec 2010 00:37:41 +0000 (00:37 +0000)]
fix model 106cx
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6168
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Rudolf Marek [Sat, 11 Dec 2010 23:28:17 +0000 (23:28 +0000)]
Fix the build failure. We have now common fadt.c.
[PATCH] SB700 common FADT was not applied to this board because it was in the meanwhile added.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Rudolf Marek <r.marek@assembler.cz>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6167
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Rudolf Marek [Sat, 11 Dec 2010 22:41:31 +0000 (22:41 +0000)]
I was bitten by the rename, this is part of r6165.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6166
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Rudolf Marek [Sat, 11 Dec 2010 22:26:10 +0000 (22:26 +0000)]
Following patch makes just one fadt.c file. For SB700.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6165
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Stefan Reinauer [Sat, 11 Dec 2010 22:14:44 +0000 (22:14 +0000)]
factor out cpu power management base into a separate file. And fix a bug in
model_1067x
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6164
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Stefan Reinauer [Sat, 11 Dec 2010 22:12:32 +0000 (22:12 +0000)]
catch some illegal configurations (trivial)
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6163
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Stefan Reinauer [Sat, 11 Dec 2010 22:07:07 +0000 (22:07 +0000)]
Don't skip already built targets anymore, because a recent change could have
broken them again. Instead rely on coreboot's dependencies to figure out
what to rebuild.
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6162
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Stefan Reinauer [Sat, 11 Dec 2010 20:33:41 +0000 (20:33 +0000)]
After this has been brought up many times before, rename src/arch/i386 to
src/arch/x86.
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6161
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Fri, 10 Dec 2010 12:52:50 +0000 (12:52 +0000)]
Two hda_verb.h files: Add more comments.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6160
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Fri, 10 Dec 2010 09:02:50 +0000 (09:02 +0000)]
Add TINY_BOOTBLOCK support for AMD SB700.
Factor out the ROM decode enable functionality into bootblock.c and
handle it via the usual TINY_BOOTBLOCK mechanism.
Use "select TINY_BOOTBLOCK" in the southbridge, not individual boards.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6159
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Uwe Hermann [Thu, 9 Dec 2010 18:09:14 +0000 (18:09 +0000)]
Merge enable_rom.c files into bootblock.c files.
All southbridges using TINY_BOOTBLOCK have a bootblock.c files which
simply includes an enable_rom.c files. As discussed on the mailing
list, drop the enable_rom.c file by merging it into bootblock.c.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6158
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Thu, 9 Dec 2010 13:10:57 +0000 (13:10 +0000)]
Build fix, forgot to run abuild on the latest tree.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6157
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Uwe Hermann [Thu, 9 Dec 2010 12:39:48 +0000 (12:39 +0000)]
Deduplicate various ACPI .asl files.
The files debug.asl, globutil.asl, and statdef.asl are duplicated in
many K8/Fam10h boards. However, they're neither board-specific nor
K8/Fam10h-specific nor AMD-specific, so move them to src/arch/i386/acpi.
debug.asl contains generic chunks for I/O port 0x80 handling, and debug
output over serial port (init COM port, send byte, send string, etc).
globutil.asl contains utility methods for string comparison, string length
and similar stuff.
statdef.asl contains generic ACPI bit definitions / status codes from
the ACPI spec (not board- or chipset-specific).
This patch was mostly generated by:
mkdir src/arch/i386/acpi
svn add src/arch/i386/acpi
svn cp src/mainboard/amd/dbm690t/acpi/debug.asl src/arch/i386/acpi/
svn cp src/mainboard/amd/dbm690t/acpi/globutil.asl src/arch/i386/acpi/
svn cp src/mainboard/amd/dbm690t/acpi/statdef.asl src/arch/i386/acpi/
cd src/mainboard
find . -name debug.asl -exec svn rm {} \;
find . -name globutil.asl -exec svn rm {} \;
find . -name statdef.asl -exec svn rm {} \;
Abuild-tested.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6156
2b7e53f0-3cfb-0310-b3e9-
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Zheng Bao [Thu, 9 Dec 2010 06:18:29 +0000 (06:18 +0000)]
Add missing instruction break.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Zheng Bao <zheng.bao@amd.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6155
2b7e53f0-3cfb-0310-b3e9-
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Tobias Diedrich [Wed, 8 Dec 2010 21:45:57 +0000 (21:45 +0000)]
These empty files sneaked in from another patch and shouldn't have been included in r6153, remove them.
Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6154
2b7e53f0-3cfb-0310-b3e9-
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Tobias Diedrich [Wed, 8 Dec 2010 21:40:12 +0000 (21:40 +0000)]
Tobias Diedrich wrote:
> Definitively a iasl problem, it can't even disassemble it's own
> output back to something equivalent to the input file.
> It seems to be generating Bytecode for the Add where it shouldn't.
Here is a solution using the SSDT.
Unfortunately iasl does not resolve simple arithmetic at compile
time, so we can not use Add(DEFAULT_PMBASE, PCNTRL) in the
Processor statement.
This patch instead dynamically generates the processor statement.
I can't use the speedstep generate_cpu_entries() directly since the
cpu doesn't support speedstep.
For now the code is in the southbridge directory, but maybe it
should go into cpu/intel/ somewhere.
IIRC notebook cpus of the era can already have speedstep, so it
would probably be possible to pair the i82371eb with a
speedstep-capable cpu...
Also, I don't know if multiprocessor boards (abit bp6?) would need
to be handled differently.
Abuild-tested.
Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6153
2b7e53f0-3cfb-0310-b3e9-
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Patrick Georgi [Wed, 8 Dec 2010 19:58:30 +0000 (19:58 +0000)]
Allow user to define location for Kconfig config via
DOTCONFIG make variable (defaults to .config).
Let abuild use that.
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6152
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Wed, 8 Dec 2010 08:22:04 +0000 (08:22 +0000)]
Move "select CACHE_AS_RAM" lines from boards into CPU socket.
All K8/Fam10h boards use CAR, so move the "select CACHE_AS_RAM"
into the socket directories, and remove it from the individual boards.
Do the same for Intel CPUs/sockets where all boards use CAR.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6151
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stepan [Wed, 8 Dec 2010 07:07:33 +0000 (07:07 +0000)]
second round name simplification. drop the <component>_ prefix.
the prefix was introduced in the early v2 tree many years ago
because our old build system "newconfig" could not handle two files with
the same name in different paths like /path/to/usb.c and
/another/path/to/usb.c correctly. Only one of the files would end up
being compiled into the final image.
Since Kconfig (actually since shortly before we switched to Kconfig) we
don't suffer from that problem anymore. So we could drop the sb700_
prefix from all those filenames (or, the <componentname>_ prefix in general)
- makes it easier to fork off a new chipset
- makes it easier to diff against other chipsets
- storing redundant information in filenames seems wrong
Signed-off-by: <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6150
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stepan [Wed, 8 Dec 2010 05:42:47 +0000 (05:42 +0000)]
first round name simplification. drop the <component>_ prefix.
the prefix was introduced in the early v2 tree many years ago
because our old build system "newconfig" could not handle two files with
the same name in different paths like /path/to/usb.c and
/another/path/to/usb.c correctly. Only one of the files would end up
being compiled into the final image.
Since Kconfig (actually since shortly before we switched to Kconfig) we
don't suffer from that problem anymore. So we could drop the sb700_
prefix from all those filenames (or, the <componentname>_ prefix in general)
- makes it easier to fork off a new chipset
- makes it easier to diff against other chipsets
- storing redundant information in filenames seems wrong
Signed-off-by: <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6149
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Myles Watson [Tue, 7 Dec 2010 19:34:01 +0000 (19:34 +0000)]
Move MMCONF resource into the domain for fam10 for the resource allocator.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Scott Duplichan <scott@notabs.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6148
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Uwe Hermann [Tue, 7 Dec 2010 19:16:07 +0000 (19:16 +0000)]
Get rid of some unneeded function prototypes in romstage.c files.
Abuild-tested.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6147
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Zheng Bao [Tue, 7 Dec 2010 06:27:44 +0000 (06:27 +0000)]
Trivial. Fix typo.
sh> find -name "acpi_tables.c" | xargs sed -i "s/FDAT/FADT/g"
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Zheng Bao <zheng.bao@amd.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6146
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Uwe Hermann [Mon, 6 Dec 2010 20:27:12 +0000 (20:27 +0000)]
Drop unused/obsolete CONFIG_COMPRESS from a few board Kconfigs.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6145
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Uwe Hermann [Mon, 6 Dec 2010 18:20:48 +0000 (18:20 +0000)]
Get rid of some useless/empty *_fixups.c files.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6144
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Uwe Hermann [Mon, 6 Dec 2010 18:17:01 +0000 (18:17 +0000)]
Winbond W83627HF: Use existing functions instead of open-coding.
Use w83627hf_set_clksel_48() where needed instead or open-coding the same
functionality, and also use w83627hf_enable_serial() instead of
w83627hf_enable_dev() (which does exactly the same, but isn't wrapped in the
enter/exit config mode functions).
Abuild-tested.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6143
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Zheng Bao [Mon, 6 Dec 2010 08:19:38 +0000 (08:19 +0000)]
Before lane reversal,
De-asserts STRAP_BIF_all_valid for
PCIE-GFX core.
After lane reversal,
Asserts STRAP_BIF_all_valid for
PCIE-GFX core.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: QingPei Wang <wangqingpei@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6142
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Juhana Helovuo [Mon, 6 Dec 2010 01:11:12 +0000 (01:11 +0000)]
Add initial support for the ASUS M4A78-EM.
Signed-off-by: Juhana Helovuo <juhe@iki.fi>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6141
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Uwe Hermann [Sun, 5 Dec 2010 22:36:14 +0000 (22:36 +0000)]
W83627DHG/W83627EHG fixups for virtual LDNs.
W83627DHG:
- Add proper "virtual LDN" handling for the LDNs that need it (i.e., those
that don't have their "enable" bit in bit 0 of the 0x30 register).
- Fix various I/O masks in the pnp_dev_info[] array as per
datasheet. Add missing PNP_IRQ0 to the W83627DHG_ACPI LDN.
W83627EHG:
- Similar to W83627DHG, improve the "virtual LDN" setup a bit (it was
mostly implemented already, though).
- Add missing PNP_IRQ0 to the W83627EHG_ACPI LDN.
Also: Fix up devicetree.cb of all boards using W83627DHG/W83627EHG to adapt
for the virtual LDNs.
include/device/pnp.h: Add comment that 'function' (which refers to the
LDN and should probably be renamed later) has to be at least 16 bits
wide. In theory LDNs could use u8, but due to the virtual LDN info being
encoded in the "high byte" of 'function' it must be at least u16.
asrock/939a785gmh/romstage.c: Drop unused GPIO6_DEV.
ibase/mb899/romstage.c: Use DUMMY_DEV instead of a specific LDN (serial
port 1 in this case) to avoid confusion. The global registers
manipulated there are accessible from any LDN.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Rudolf Marek <r.marek@assembler.cz>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6140
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Stefan Reinauer [Sat, 4 Dec 2010 20:50:39 +0000 (20:50 +0000)]
ACPI table dumping wrapper script
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6139
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Rudolf Marek [Sat, 4 Dec 2010 10:08:55 +0000 (10:08 +0000)]
Following patch removes the cut-and-paste stuff from Mahagony and fixes the _CRS object to make it work (same code as on M2V-MX SE)
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6138
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Marc Jones [Fri, 3 Dec 2010 00:45:56 +0000 (00:45 +0000)]
Update coreboot crossgcc toolchain, GCC 4.5.1, MPFR 3.0.0, GDB 7.2.
Add libelf_cv_elf_h_works=no to produce a libelf.h for Cygwin.
Add GDB patch to handle #pragma pack in the i386-elf gcc target.
Signed-off-by: Marc Jones <marcj303@gmail.com>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6137
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Zheng Bao [Thu, 2 Dec 2010 01:50:38 +0000 (01:50 +0000)]
More explicite and straight way to set seed.
The read-modify-write wasn't needed. This is easier to understand.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6136
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Rudolf Marek [Tue, 30 Nov 2010 21:21:33 +0000 (21:21 +0000)]
The patch just make the power LED on.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6135
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Rudolf Marek [Tue, 30 Nov 2010 20:18:53 +0000 (20:18 +0000)]
Fix the SPD to channel mapping. Please note that there is something wrong with UMA.
Single channel (in slot DDR1 and DDR3) produces strange artefacts on screen (and hang)
Dual Channel (in DDR1 and DDR2 aka blue slot) - works nice
All slots populated - same case as Single channel - must be something wrong with UMA.
Tested with 2x 512MB CAS 2.5 DDR400
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Rudolf Marek <r.marek@assembler.cz>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6134
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Zheng Bao [Tue, 30 Nov 2010 02:05:17 +0000 (02:05 +0000)]
Trivial. Reindent and dos2unix.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Zheng Bao <zheng.bao@amd.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6133
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Tobias Diedrich [Mon, 29 Nov 2010 20:40:33 +0000 (20:40 +0000)]
Tobias Diedrich wrote:
> Stefan Reinauer wrote:
> > The specified IO port is most likely wrong. As the comment mentions, the
> > SSDT is a good place for that. A preprocessor define used both in the
> > CPU init code and in the asl would solve the problem without an SSDT.
> > For some info on CPU SSDT creation on intel check out
> > src/cpu/intel/speedstep/acpi.c
>
> The IO port is ok (and I wrote the comment myself ;)):
> DEFAULT_PMBASE is 0xe400
> PCNTRL reg offset is 0x10
>
> Using the preprocessor will probably work too if iasl can do simple
> arithmetic (likely yes), I'll look into that.
BTW, my first idea was to use an acpi method that looks up pmbase in
the pci cfg space, but when I define a method like this:
Method(TEST, 2)
{
Return (Add(Arg0, Arg1))
}
I get:
|build/mainboard/asus/p2b/dsdt.ramstage.asl 9: Processor (CPU0,
|0x01, TEST(0xe400, 0x10), 0x06) {}
|Error 4096 - syntax error, unexpected PARSEOP_NAMESEG,
|expecting ')' ^
While using the builtin Add() directly works.
Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6132
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David Hendricks [Mon, 29 Nov 2010 11:56:39 +0000 (11:56 +0000)]
Add Fintek F71889 detection and dump support.
The patch was tested by a user on IRC who had the F71889FG. I
wrote it using documentation from Fintek's website available here:
http://www.fintek.com.tw/files/productfiles/F71889_V0.28P.pdf
This patch also seems to work for the
F71889ED, which uses 0x09 and 0x09 for
chip ID bytes 1 & 2. However, I have not been able to find documentation to
verify that the two chips are identical from superiotool's perspective.
Signed-off-by: David Hendricks <dhendrix@google.com>
Signed-off-by: Alec Ari <neotheuser@ymail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6131
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Stefan Reinauer [Mon, 29 Nov 2010 00:20:20 +0000 (00:20 +0000)]
fix typo
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6130
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Uwe Hermann [Sun, 28 Nov 2010 14:24:07 +0000 (14:24 +0000)]
devicetree.cb: Only add as many entries as there are DIMM slots.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6129
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Tobias Diedrich [Sat, 27 Nov 2010 14:44:19 +0000 (14:44 +0000)]
- Add support for Intel Pentium III MSRs
- pmbase is on southbridge function 3 on I82371XX
Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6128
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Tobias Diedrich [Sat, 27 Nov 2010 09:40:16 +0000 (09:40 +0000)]
After finding the missing bit poweroff works now.
I cleaned up the patch and moved most of the dsdt.dsl and
acpi_tables.c into the southbrige/northbridge directory.
Updated patch should fix abuild error and incorporates suggestions
on irc by uwe (thanks for the comments).
Thanks to Idwer Vollering <vidwer@gmail.com> for the original patch.
Tested:
Linux (poweroff, powerbutton event)
XP (poweroff, powerbutton event)
Abuild-tested
Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6127
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Uwe Hermann [Fri, 26 Nov 2010 22:42:41 +0000 (22:42 +0000)]
Broadcom BCM5785: Add TINY_BOOTBLOCK support.
In bcm5785_enable_rom(): Use PCI IDs from pci_ids.h instead of hardcoding,
and use 'dev' instead of 'addr' as device_t variable name.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6126
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Uwe Hermann [Fri, 26 Nov 2010 22:39:40 +0000 (22:39 +0000)]
AMD SB600: Add TINY_BOOTBLOCK support.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6125
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Uwe Hermann [Fri, 26 Nov 2010 22:35:11 +0000 (22:35 +0000)]
AMD-8111: Add TINY_BOOTBLOCK support.
Also, add missing license header to amd8111_enable_rom.c, add some more code
comments and use PCI IDs from pci_ids.h instead of hardcoding.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6124
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Uwe Hermann [Thu, 25 Nov 2010 09:03:55 +0000 (09:03 +0000)]
MCP55: Add TINY_BOOTBLOCK support.
Also, move CONFIG_HT_CHAIN_END_UNITID_BASE #ifdef block to mcp55.h to make
the build work (but this is a good idea anyway, as it's used in
multiple files).
Abuild-tested.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6123
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Tobias Diedrich [Wed, 24 Nov 2010 20:03:09 +0000 (20:03 +0000)]
S3 support for ASUS M2V
This adds the board-specific parts for S3 support on the M2V board.
Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6122
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Tobias Diedrich [Wed, 24 Nov 2010 19:57:08 +0000 (19:57 +0000)]
With low serial console loglevels a pcie graphics card is not
initialized properly because the pcie link takes some time to come
up.
I set the timeout rather arbitrary to 100ms, this is what a BIOS_ERR
and higher only boot looks like on my system (with pcie printks set
to BIOS_ERR so they show up):
|Device error
|Device error
|PCI: 00:02.0 PCIe link up after 35800 us
|PCI: 00:03.0 PCIe link up after 12900 us
|PCI: 00:03.1 PCIe link timeout
|PCI: 00:03.2 PCIe link up after 32000 us
|APIC: 00 missing read_resources
|I2C: 01:50 missing read_resources
|I2C: 01:51 missing read_resources
|I2C: 01:52 missing read_resources
|I2C: 01:53 missing read_resources
|Start bios (version pre-0.6.2-20101025_023503-nukunuku)
Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6121
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Scott Duplichan [Wed, 24 Nov 2010 00:39:44 +0000 (00:39 +0000)]
This patch solves crashes and BSODs that occur when booting Win7 with
AMD RS780 uma graphics. Tested with frame buffer sizes 64m through 1GB
by running dxdiag and Windows media player at 1600x1200 true color.
Additional changes needed to boot Win7 on Mahogany_fam10 will follow.
-- Enable and program the debug bar as required by the ATI graphics driver.
First, make the debug bar writable and allow resource allocation code
to program it. Once programmed, enable its operation.
-- Disable the family 10h processor mmconf while the RS780 mmconf is in use.
-- Make strap programming more closely follow the reference BIOS.
-- Disable PCIe bar 3 after using it.
-- UMA size is no longer hardcoded.
-- Disable write combining for all steppings to eliminate stability problem.
-- Correct task file data.
-- Improve the accuracy of the Atom table that passes information to the driver.
Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Rudolf Marek <r.marek@assembler.cz>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6120
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Patrick Georgi [Tue, 23 Nov 2010 07:30:50 +0000 (07:30 +0000)]
USBDEBUG by default in abuild was committed by mistake and
then left in because USBDEBUG was actively worked on.
This isn't true anymore, so drop it
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6119
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Patrick Georgi patrick [Tue, 23 Nov 2010 07:19:54 +0000 (07:19 +0000)]
Make smp_write_bus static (local scope), to prevent new boards from
using it directly again.
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6118
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Rudolf Marek [Mon, 22 Nov 2010 22:00:52 +0000 (22:00 +0000)]
1) wraps the s3 parts of chipset code/memory init code with if CONFIG_HAVE_ACPI_RESUME == 1 getting rid of ugly define in romstage.c
2) the patch implements get_cbmem_toc in chipset specific way if defined.
On Intel targets it should be unchanged. On K8T890 the the cbmem_toc is read from NVRAM. Why you ask? Because we cannot do it as on intel, because the framebuffer might be there making it hard to look for it in memory (and remember we need it so early that everying is uncached)
3) The patch removes hardcoded limits for suspend/resume save area (it was 1MB) on intel. Now it computes right numbers itself.
4) it impelements saving the memory during CAR to reserved range in sane way. First the sysinfo area (CAR data) is copied, then the rest after car is disabled (cached copy is used). I changed bit also the the copy of CAR area is now done uncached for target which I feel is more right.
I think I did not change the Intel suspend/resume behaviour but best would be if someone can test it. Please note this patch was unfinished on my drive since ages and it would be very nice to get it in to prevent bit rotten it again.
Now I feel it is done good way and should not break anything. I did a test with abuild and it seems fine.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6117
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Uwe Hermann [Mon, 22 Nov 2010 16:23:54 +0000 (16:23 +0000)]
Drop unused ACPI_WRITE_MADT_IOAPIC #define.
This should probably be C code in some .c file anyway.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6116
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Uwe Hermann [Mon, 22 Nov 2010 15:57:57 +0000 (15:57 +0000)]
Drop per-board ram_check() calls for now.
Every board had a slightly different invokation, very often commented out
anyway. We could either decide that this is only to be used by developers
during bringup (and thus added manually to romstage.c and removed before
the board gets committed). This method seems to be preferred from what I
have heard on IRC / mailing list in the past.
Or, we add the ram_check() somewhere globally and allow the user to enable
it via menuconfig (possibly only if EXPERT is selected).
Either way, the current method of spreading the calls all over the place is
not really the way to go.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6115
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Patrick Georgi [Mon, 22 Nov 2010 14:14:56 +0000 (14:14 +0000)]
Final set of smp_write_bus -> mptable_write_buses changes.
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6114
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Patrick Georgi [Mon, 22 Nov 2010 13:07:10 +0000 (13:07 +0000)]
Workaround to get die.c to work with romcc.
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6113
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Uwe Hermann [Mon, 22 Nov 2010 12:59:36 +0000 (12:59 +0000)]
i855: Remove useless memctrl indirection.
This needlessly complicates the code and increases register pressure on romcc
chipsets. We did the same conversion on i440BX, i830, and others.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6112
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Stefan Reinauer [Mon, 22 Nov 2010 08:09:50 +0000 (08:09 +0000)]
Printing coreboot debug messages on VGA console is pretty much useless, since
initializing VGA happens pretty much as the last thing before starting the
payload. Hence, drop VGA console support, as we did in coreboot v3.
- Drop VGA and BTEXT console support.
Console is meant to be debugging only, and by the time graphics comes up
99% of the risky stuff has already happened. Note: This patch does not remove
hardware init but only the actual output functionality.
The ragexl driver needs some extra love, but that's for another day
- factor out die() and post()
- drop some leftover RAMBASE < 0x100000 checks.
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: QingPei Wang<wangqingpei@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6111
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Uwe Hermann [Mon, 22 Nov 2010 00:42:42 +0000 (00:42 +0000)]
acpi.h: Small fixes and adding comments.
- Mention full name of all the tables (SSDT, FADT, etc).
- Drop obsolete / incorrect "LXBIOS" reference.
- Add missing ACPI address space type #defines specified in newer versions:
ACPI_ADDRESS_SPACE_EC, ACPI_ADDRESS_SPACE_SMBUS.
- Add missing "enum acpi_apic_types" entries: Localx2Apic, Localx2ApicNMI.
- Add ACPI_FACS_64BIT_WAKE_F #define.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6110
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Jonathan Kollasch [Sun, 21 Nov 2010 22:55:46 +0000 (22:55 +0000)]
Move CK804_PCI_E_X and CK804B_PCI_E_X defines (which have been 4 by
default on all boards) into Kconfig.
Signed-off-by: Jonathan Kollasch <jakllsch@kollasch.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6109
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Uwe Hermann [Sun, 21 Nov 2010 22:47:22 +0000 (22:47 +0000)]
Simplify a few code chunks, fix whitespace and indentation.
Also, remove some less useful comments, some dead code / unused functions.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6108
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Uwe Hermann [Sun, 21 Nov 2010 17:29:59 +0000 (17:29 +0000)]
Drop excessive whitespace randomly sprinkled in romstage.c files.
Also drop some dead or useless code snippets.
Abuild-tested.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6107
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Patrick Georgi [Sun, 21 Nov 2010 14:41:07 +0000 (14:41 +0000)]
Convert more boards to use mptable_write_buses.
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6106
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Patrick Georgi [Sun, 21 Nov 2010 14:40:09 +0000 (14:40 +0000)]
Convert boards to use mptable_write_buses.
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6105
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Patrick Georgi [Sun, 21 Nov 2010 14:38:24 +0000 (14:38 +0000)]
Move MCP55_PCI_E_X_* to Kconfig. Any useless values in romstage.cs were
not brought over to Kconfig (this applies to all #defines to 4, as
that's the default anyway)
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6104
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Uwe Hermann [Sun, 21 Nov 2010 11:36:03 +0000 (11:36 +0000)]
Use DIMM0 et al in lots more places instead of hardocding values.
The (0xa << 3) expression equals 0x50, i.e. DIMM0.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6103
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Uwe Hermann [Sun, 21 Nov 2010 10:26:04 +0000 (10:26 +0000)]
Build fix.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6102
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Uwe Hermann [Sat, 20 Nov 2010 20:36:40 +0000 (20:36 +0000)]
Merge all spd_addr.h into the resp. romstage.c files.
Except for one instance the spd_addr.h were now very tiny, there's not
much point in keeping that stuff in an extra file. The only user of those
files is the romstage.c file anyway.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6101
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Uwe Hermann [Sat, 20 Nov 2010 20:23:08 +0000 (20:23 +0000)]
Some more DIMM0 related cleanups and deduplication.
- VIA VT8235: Do the shift in smbus_read_byte() as all other chipsets do.
- spd.h: Move RC00-RC63 #defines here, they were duplicated in lots of
romstage.c files and lots of spd_addr.h files. Don't even bother for
those spd_addr.h which aren't even actually used, drop them right away.
- Replace various 0x50 hardcoded numbers with DIMM0, 0x51 with DIMM1,
and 0xa0 with (DIMM0 << 1) where appropriate.
- Various debug.c files: Replace SMBUS_MEM_DEVICE_START with DIMM0,
SMBUS_MEM_DEVICE_END with DIMM7, and drop useless SMBUS_MEM_DEVICE_INC.
- VIA VX800: Drop unused SMBUS_ADDR_CH* #defines.
- VIA VT8623: Do the shift in smbus_read_byte() as all other chipsets do.
Then, replace 0xa0 (which now becomes 0x50) with DIMM0.
- alix1c/romstage.c, alix2d/romstage.c: Adapt to recent bit shift changes.
- Various files: Drop DIMM_SPD_BASE and/or replace it with DIMM0.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6100
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Patrick Georgi [Sat, 20 Nov 2010 10:31:00 +0000 (10:31 +0000)]
Unify DIMM SPD addressing. For Geode, change the
addressing scheme to match the rest of the tree
(0x50 instead of 0xa0).
abuild tested.
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6099
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Uwe Hermann [Fri, 19 Nov 2010 15:14:42 +0000 (15:14 +0000)]
Cosmetic fixes and comment additions in acpi.c.
- Fix whitespace, coding style, and indentation in some places.
- Add comments for less obvious entries and hardcoded numbers (e.g. 'type').
- Add comments for all/most 'revision' fields, mention in which version
of the ACPI spec which revision number is to be used.
- Add URLs to a few external documents which describe tables that are
not mentioned in the ACPI spec (or where the external document may
provide further info), e.g. SRAT, SLIT, HPET, MCFG, etc.
- Use the ASLC #define instead of hardcoding "CORE" in one instance
(ASLC is already used everywhere else).
- Add some TODOs for additional stuff which is in the spec but not yet
handled by our code / #defines.
Abuild-tested.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6098
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Patrick Georgi [Fri, 19 Nov 2010 10:16:43 +0000 (10:16 +0000)]
Add test to check for up-to-date GPL license headers to lint.
"make lint" should not stop after first failed test.
Improve "make lint" output.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6097
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Stefan Reinauer [Fri, 19 Nov 2010 00:29:32 +0000 (00:29 +0000)]
drop temp file from coreboot tree
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6096
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Uwe Hermann [Thu, 18 Nov 2010 20:12:13 +0000 (20:12 +0000)]
Fix/drop some obsolete comments,
- s/Options.lb/devicetree.cb/
- s/Config.lb/devicetree.cb/
- s/cache_as_ram_auto.c/romstage.c/
- h8dmr_fam10/README: Drop obsolete comment, we have mc_patch_01000086.h in
the tree now.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6095
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Uwe Hermann [Thu, 18 Nov 2010 19:40:33 +0000 (19:40 +0000)]
Drop unused and incorrect RTC_DEV for Winbond W83627EHG.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6094
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Uwe Hermann [Thu, 18 Nov 2010 18:12:09 +0000 (18:12 +0000)]
Make lint script executable, otherwise invocation fails.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6093
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Patrick Georgi [Thu, 18 Nov 2010 15:07:06 +0000 (15:07 +0000)]
lint tests can now describe what they do (for the benefit of
make lint users)
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6092
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Patrick Georgi [Thu, 18 Nov 2010 15:05:06 +0000 (15:05 +0000)]
Add "make lint" target that calls all util/lint/lint-* scripts
and fails if any of these output text to stdout.
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6091
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