static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
- unsigned char bus_num;
- unsigned char bus_isa;
+ int bus_isa;
unsigned char bus_chain_0;
unsigned char bus_8131_1;
unsigned char bus_8131_2;
dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x03,0));
if (dev) {
bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:03.0, using defaults\n", bus_chain_0);
-
bus_8111_1 = 4;
- bus_isa = 5;
}
/* 8131-1 */
dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x01,0));
if (dev) {
bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:01.0, using defaults\n", bus_chain_0);
-
bus_8131_1 = 2;
}
/* 8131-2 */
dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x02,0));
if (dev) {
bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:02.0, using defaults\n", bus_chain_0);
-
bus_8131_2 = 3;
}
}
- /* define bus and isa numbers */
- for(bus_num = 0; bus_num < bus_isa; bus_num++) {
- smp_write_bus(mc, bus_num, "PCI ");
- }
- smp_write_bus(mc, bus_isa, "ISA ");
+ mptable_write_buses(mc, NULL, &bus_isa);
/* IOAPIC handling */
smp_write_ioapic(mc, apicid_8111, 0x11, IO_APIC_ADDR);
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
//busnum is default
-unsigned char bus_isa = 10;
unsigned char bus_bcm5780[7];
unsigned char bus_bcm5785_0 = 1;
unsigned char bus_bcm5785_1 = 8;
dev = dev_find_slot(bus_bcm5785_1, PCI_DEVFN(0x0d,0));
if(dev) {
bus_bcm5785_1_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-#if CONFIG_HT_CHAIN_END_UNITID_BASE >= CONFIG_HT_CHAIN_UNITID_BASE
- bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_isa++;
-// printk(BIOS_DEBUG, "bus_isa=%d\n",bus_isa);
-#endif
}
}
else {
dev = dev_find_slot(bus_bcm5780[0], PCI_DEVFN(sbdn2 + i - 1,0));
if(dev) {
bus_bcm5780[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
-#if CONFIG_HT_CHAIN_END_UNITID_BASE < CONFIG_HT_CHAIN_UNITID_BASE
- bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_isa++;
-// printk(BIOS_DEBUG, "bus_isa=%d\n",bus_isa);
-#endif
-
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:01.0, using defaults\n", bus_bcm5780[i]);
pirq_info->rfu = rfu;
}
-extern unsigned char bus_isa;
extern unsigned char bus_bcm5780[7];
extern unsigned char bus_bcm5785_0;
extern unsigned char bus_bcm5785_1;
#endif
#include <cpu/amd/amdk8_sysconf.h>
-extern unsigned char bus_isa;
extern unsigned char bus_bcm5780[7];
extern unsigned char bus_bcm5785_0;
extern unsigned char bus_bcm5785_1;
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
- unsigned char bus_num;
- int i;
+ int i, bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
get_bus_conf();
-/*Bus: Bus ID Type*/
- /* define bus and isa numbers */
- for(bus_num = 0; bus_num < bus_isa; bus_num++) {
- smp_write_bus(mc, bus_num, "PCI ");
- }
- smp_write_bus(mc, bus_isa, "ISA ");
+ mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
{
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
- unsigned char bus_num;
- unsigned char bus_isa;
+ int bus_isa;
unsigned char bus_pxhd_1;
unsigned char bus_pxhd_2;
unsigned char bus_pxhd_3;
dev = dev_find_slot(0, PCI_DEVFN(0x1e,0));
if (dev) {
bus_ich5r_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 0:1e.0, using defaults\n");
-
bus_ich5r_1 = 7;
- bus_isa = 8;
}
/* pxhd-1 */
dev = dev_find_slot(1, PCI_DEVFN(0x0,0));
if (dev) {
bus_pxhd_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:00.0, using defaults\n");
-
bus_pxhd_1 = 2;
}
/* pxhd-2 */
dev = dev_find_slot(1, PCI_DEVFN(0x00,2));
if (dev) {
bus_pxhd_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:00.2, using defaults\n");
-
bus_pxhd_2 = 3;
}
dev = dev_find_slot(0, PCI_DEVFN(0x4,0));
if (dev) {
bus_pxhd_3 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 0:04.0, using defaults\n");
-
bus_pxhd_3 = 5;
}
/* pxhd-4 */
dev = dev_find_slot(0, PCI_DEVFN(0x06,0));
if (dev) {
bus_pxhd_4 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 0:06.0, using defaults\n");
-
bus_pxhd_4 = 6;
}
}
- /* define bus and isa numbers */
- for(bus_num = 0; bus_num < bus_isa; bus_num++) {
- smp_write_bus(mc, bus_num, "PCI ");
- }
- smp_write_bus(mc, bus_isa, "ISA ");
+ mptable_write_buses(mc, NULL, &bus_isa);
/* IOAPIC handling */
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
- int i;
- int max_pci_bus, isa_bus;
+ int isa_bus;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
smp_write_processors(mc);
- max_pci_bus = 5; // XXX read me from bridges.
-
- /* ISA bus follows */
- isa_bus = max_pci_bus + 1;
-
- /* Bus: Bus ID Type */
- for (i=0; i <= max_pci_bus; i++)
- smp_write_bus(mc, i, "PCI ");
-
- smp_write_bus(mc, isa_bus, "ISA ");
+ mptable_write_buses(mc, NULL, &isa_bus);
/* I/O APICs: APIC ID Version State Address */
smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
//busnum is default
- unsigned char bus_isa;
unsigned char bus_sis966[8]; //1
unsigned apicid_sis966;
// 0x20202020,
// 0x20202020,
};
-unsigned bus_type[256];
-
-
static unsigned get_bus_conf_done = 0;
unsigned sbdn;
device_t dev;
- int i, j;
+ int i;
if(get_bus_conf_done==1) return; //do it only once
bus_sis966[i] = 0;
}
- for(i=0;i<256; i++) {
- bus_type[i] = 0;
- }
-
- bus_type[0] = 1; //pci
-
bus_sis966[0] = (sysconf.pci1234[0] >> 16) & 0xff;
- bus_type[bus_sis966[0]] = 1;
-
/* SIS966 */
dev = dev_find_slot(bus_sis966[0], PCI_DEVFN(sbdn + 0x06,0));
if (dev) {
bus_sis966[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_sis966[2] = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_sis966[2]++;
- for(j=bus_sis966[1];j<bus_sis966[2]; j++) bus_type[j] = 1;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn + 0x06);
dev = dev_find_slot(bus_sis966[0], PCI_DEVFN(sbdn + 0x0a + i - 2 , 0));
if (dev) {
bus_sis966[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_isa++;
- for(j=bus_sis966[i];j<bus_isa; j++) bus_type[j] = 1;
}
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", bus_sis966[0], sbdn + 0x0a + i - 2 );
- bus_isa = bus_sis966[i-1]+1;
- }
}
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
-extern unsigned char bus_isa;
extern unsigned char bus_sis966[8]; //1
-
-
unsigned long write_pirq_routing_table(unsigned long addr)
{
#include <stdint.h>
#include <cpu/amd/amdk8_sysconf.h>
-extern unsigned char bus_isa;
extern unsigned char bus_sis966[8]; //1
extern unsigned apicid_sis966;
-extern unsigned bus_type[256];
-
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
unsigned sbdn;
- int i,j;
+ int i, j, bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
get_bus_conf();
sbdn = sysconf.sbdn;
-/*Bus: Bus ID Type*/
- /* define bus and isa numbers */
- for(j= 0; j < 256 ; j++) {
- if(bus_type[j])
- smp_write_bus(mc, j, "PCI ");
- }
- smp_write_bus(mc, bus_isa, "ISA ");
+ mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
{
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
//busnum is default
- unsigned char bus_isa;
unsigned char bus_mcp55[8]; //1
unsigned apicid_mcp55;
// 0x20202020,
// 0x20202020,
};
-unsigned bus_type[256];
-
-
static unsigned get_bus_conf_done = 0;
unsigned sbdn;
device_t dev;
- int i, j;
+ int i;
if(get_bus_conf_done==1) return; //do it only once
bus_mcp55[i] = 0;
}
- for(i=0;i<256; i++) {
- bus_type[i] = 0;
- }
-
- bus_type[0] = 1; //pci
-
bus_mcp55[0] = (sysconf.pci1234[0] >> 16) & 0xff;
- bus_type[bus_mcp55[0]] = 1;
-
/* MCP55 */
dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn + 0x06,0));
if (dev) {
bus_mcp55[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_mcp55[2] = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_mcp55[2]++;
- for(j=bus_mcp55[1];j<bus_mcp55[2]; j++) bus_type[j] = 1;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn + 0x06);
dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn + 0x0a + i - 2 , 0));
if (dev) {
bus_mcp55[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_isa++;
- for(j=bus_mcp55[i];j<bus_isa; j++) bus_type[j] = 1;
}
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", bus_mcp55[0], sbdn + 0x0a + i - 2 );
- bus_isa = bus_mcp55[i-1]+1;
- }
}
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
-extern unsigned char bus_isa;
extern unsigned char bus_mcp55[8]; //1
#include <stdint.h>
#include <cpu/amd/amdk8_sysconf.h>
-extern unsigned char bus_isa;
extern unsigned char bus_mcp55[8]; //1
extern unsigned apicid_mcp55;
-extern unsigned bus_type[256];
-
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
unsigned sbdn;
- int i,j,k;
+ int i, j, k, bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
get_bus_conf();
sbdn = sysconf.sbdn;
-/*Bus: Bus ID Type*/
- /* define bus and isa numbers */
- for(j= 0; j < 256 ; j++) {
- if(bus_type[j])
- smp_write_bus(mc, j, "PCI ");
- }
- smp_write_bus(mc, bus_isa, "ISA ");
+ mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
{
}
/* On bus 1: the PCI bus slots...
- pyhsical PCI slots are j = 7,8
+ physical PCI slots are j = 7,8
FireWire is j = 10
*/
k=2;
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
//busnum is default
-unsigned char bus_isa = 5 ;
unsigned char bus_8131_0 = 1;
unsigned char bus_8131_1 = 2;
unsigned char bus_8131_2 = 3;
dev = dev_find_slot(bus_8111_0, PCI_DEVFN(sysconf.sbdn,0));
if (dev) {
bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-#if CONFIG_HT_CHAIN_END_UNITID_BASE >= CONFIG_HT_CHAIN_UNITID_BASE
- bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_isa++;
-// printk(BIOS_DEBUG, "bus_isa=%d\n",bus_isa);
-#endif
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:03.0, using defaults\n", bus_8111_0);
dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3+1,0));
if (dev) {
bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-#if CONFIG_HT_CHAIN_END_UNITID_BASE < CONFIG_HT_CHAIN_UNITID_BASE
- bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_isa++;
-// printk(BIOS_DEBUG, "bus_isa=%d\n",bus_isa);
-#endif
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:02.0, using defaults\n", bus_8131_0);
#include <stdint.h>
#include <cpu/amd/amdk8_sysconf.h>
-extern unsigned char bus_isa;
extern unsigned char bus_8131_0;
extern unsigned char bus_8131_1;
extern unsigned char bus_8131_2;
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
- unsigned char bus_num;
+ int bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
get_bus_conf();
-/*Bus: Bus ID Type*/
- /* define bus and isa numbers */
- for(bus_num = 0; bus_num < bus_isa; bus_num++) {
- smp_write_bus(mc, bus_num, "PCI ");
- }
- smp_write_bus(mc, bus_isa, "ISA ");
-
+ mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
smp_write_ioapic(mc, apicid_8111, 0x20, IO_APIC_ADDR);
printk(BIOS_DEBUG, "now found %s...\n",dev_path(dev));
if(dev) {
m->bus_bcm5785_1_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-#if CONFIG_HT_CHAIN_END_UNITID_BASE >= CONFIG_HT_CHAIN_UNITID_BASE
- m->bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- m->bus_isa++;
- printk(BIOS_DEBUG, "bus_isa 1=%d\n",m->bus_isa);
-#endif
}
}
else {
dev = dev_find_slot(m->bus_bcm5780[0], PCI_DEVFN(m->sbdn2 + i - 1,0));
if(dev) {
m->bus_bcm5780[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
-#if CONFIG_HT_CHAIN_END_UNITID_BASE < CONFIG_HT_CHAIN_UNITID_BASE
- m->bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- m->bus_isa++;
- printk(BIOS_DEBUG, "bus_isa 2=%d\n",m->bus_isa);
-#endif
-
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_bcm5780[0], m->sbdn2+i-1);
#define MB_SYSCONF_H
struct mb_sysconf_t {
- unsigned char bus_isa;
unsigned char bus_bcm5780[7];
unsigned char bus_bcm5785_0;
unsigned char bus_bcm5785_1;
{
struct mp_config_table *mc;
struct mb_sysconf_t *m;
+ int bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
get_bus_conf();
m = sysconf.mb;
- /*Bus: Bus ID Type*/
- /* define bus and isa numbers */
-#if 0
- unsigned char bus_num;
- for(bus_num = 0; bus_num < m->bus_isa; bus_num++) {
- smp_write_bus(mc, bus_num, "PCI ");
- printk(BIOS_DEBUG, "writing bus %d as PCI...\n",bus_num);
- }
-#endif
- smp_write_bus(mc, 0, "PCI ");
- smp_write_bus(mc, 1, "PCI ");
- smp_write_bus(mc, 7, "PCI ");
- smp_write_bus(mc, 8, "PCI ");
-
- smp_write_bus(mc,m->bus_isa, "ISA ");
- printk(BIOS_DEBUG, "writing %d as ISA...\n",m->bus_isa);
+ mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
{
}
}
- mptable_add_isa_interrupts(mc, m->bus_isa, m->apicid_bcm5785[0], 0);
+ mptable_add_isa_interrupts(mc, bus_isa, m->apicid_bcm5785[0], 0);
//SATA
/* printk(BIOS_DEBUG, "MPTABLE_SATA: bus_id:%d irq:%d apic_id:%d pin:%d\n",m->bus_bcm5785_1, (0x0e<<2)|0, m->apicid_bcm5785[0], 0x7); */
}
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
- printk(BIOS_DEBUG, "m->bus_isa is: %x\n",m->bus_isa);
- smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, MP_APIC_ALL, 0x0);
- smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa , 0x0, MP_APIC_ALL, 0x1);
+ printk(BIOS_DEBUG, "bus_isa is: %x\n", bus_isa);
+ smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
+ smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa , 0x0, MP_APIC_ALL, 0x1);
//extended table entries
smp_write_address_space(mc,0 , ADDRESS_TYPE_IO, 0x0, 0x0, 0x0, 0x0001);
printk(BIOS_DEBUG, "now found %s...\n",dev_path(dev));
if(dev) {
m->bus_bcm5785_1_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-#if CONFIG_HT_CHAIN_END_UNITID_BASE >= CONFIG_HT_CHAIN_UNITID_BASE
- m->bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- m->bus_isa++;
- printk(BIOS_DEBUG, "bus_isa 1=%d\n",m->bus_isa);
-#endif
}
}
else {
dev = dev_find_slot(m->bus_bcm5780[0], PCI_DEVFN(m->sbdn2 + i - 1,0));
if(dev) {
m->bus_bcm5780[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
-#if CONFIG_HT_CHAIN_END_UNITID_BASE < CONFIG_HT_CHAIN_UNITID_BASE
- m->bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- m->bus_isa++;
- printk(BIOS_DEBUG, "bus_isa 2=%d\n",m->bus_isa);
-#endif
}
else {
#define MB_SYSCONF_H
struct mb_sysconf_t {
- unsigned char bus_isa;
unsigned char bus_bcm5780[7];
unsigned char bus_bcm5785_0;
unsigned char bus_bcm5785_1;
unsigned apicid_bcm5785[3];
unsigned sbdn2;
- unsigned bus_type[256];
};
#endif
m = sysconf.mb;
mptable_write_buses(mc, NULL, &isa_bus);
- printk(BIOS_DEBUG, "writing %d as ISA to mptable (%d for real)...\n", isa_bus, m->bus_isa);
/*I/O APICs: APIC ID Version State Address*/
{
{
struct mp_config_table *mc;
struct device *riser = NULL, *firewire = NULL;
- int i;
- int max_pci_bus, firewire_bus = 0, riser_bus = 0, isa_bus;
+ int firewire_bus = 0, riser_bus = 0, isa_bus;
int ioapic_id;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
mptable_init(mc, "MB899 ", LAPIC_ADDR);
smp_write_processors(mc);
- max_pci_bus=0;
firewire = dev_find_device(0x104c, 0x8023, 0);
if (firewire) {
firewire_bus = firewire->bus->secondary;
printk(BIOS_SPEW, "Firewire device is on bus %x\n",
firewire_bus);
- max_pci_bus = firewire_bus;
}
// If a riser card is used, this riser is detected on bus 4, so its secondary bus is the
if (riser) {
riser_bus = riser->link_list->secondary;
printk(BIOS_SPEW, "Riser bus is %x\n", riser_bus);
- max_pci_bus = riser_bus;
}
- /* ISA bus follows */
- isa_bus = max_pci_bus + 1;
-
- /* Bus: Bus ID Type */
- for (i=0; i <= max_pci_bus; i++)
- smp_write_bus(mc, i, "PCI ");
-
- smp_write_bus(mc, isa_bus, "ISA ");
+ mptable_write_buses(mc, NULL, &isa_bus);
/* I/O APICs: APIC ID Version State Address */
ioapic_id = 2;
{
struct mp_config_table *mc;
- unsigned char bus_num;
- unsigned char bus_isa;
+ int bus_isa;
unsigned char bus_8111_0;
unsigned char bus_8111_1;
unsigned char bus_8131_1;
if (dev) {
bus_8111_0 = pci_read_config8(dev, PCI_PRIMARY_BUS);
bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_isa++;
} else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
bus_8111_0 = 1;
bus_8111_1 = 4;
- bus_isa = 5;
}
/* 8131-1 */
}
}
- /* define bus and isa numbers */
- for (bus_num = 0; bus_num < bus_isa; bus_num++) {
- smp_write_bus(mc, bus_num, "PCI ");
- }
- smp_write_bus(mc, bus_isa, "ISA ");
+ mptable_write_buses(mc, NULL, &bus_isa);
/* Legacy IOAPIC #2 */
smp_write_ioapic(mc, 2, 0x11, IO_APIC_ADDR);
{
struct mp_config_table *mc;
- unsigned char bus_num;
- unsigned char bus_isa;
+ int bus_isa;
unsigned char bus_8111_0;
unsigned char bus_8111_1;
unsigned char bus_8131_1;
if (dev) {
bus_8111_0 = pci_read_config8(dev, PCI_PRIMARY_BUS);
bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_isa++;
} else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
bus_8111_0 = 1;
bus_8111_1 = 4;
- bus_isa = 5;
}
/* 8131-1 */
}
}
- /* define bus and isa numbers */
- for (bus_num = 0; bus_num < bus_isa; bus_num++) {
- smp_write_bus(mc, bus_num, "PCI ");
- }
- smp_write_bus(mc, bus_isa, "ISA ");
+ mptable_write_buses(mc, NULL, &bus_isa);
/* Legacy IOAPIC #2 */
smp_write_ioapic(mc, 2, 0x11, IO_APIC_ADDR);
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
- int i;
- int max_pci_bus, isa_bus;
+ int isa_bus;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
smp_write_processors(mc);
- max_pci_bus = 5; // XXX read me from bridges.
-
- /* ISA bus follows */
- isa_bus = max_pci_bus + 1;
-
- /* Bus: Bus ID Type */
- for (i=0; i <= max_pci_bus; i++)
- smp_write_bus(mc, i, "PCI ");
-
- smp_write_bus(mc, isa_bus, "ISA ");
+ mptable_write_buses(mc, NULL, &isa_bus);
/* I/O APICs: APIC ID Version State Address */
smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
dev = dev_find_slot(m->bus_8111_0, PCI_DEVFN(sysconf.sbdn,0));
if (dev) {
m->bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-#if CONFIG_HT_CHAIN_END_UNITID_BASE >= CONFIG_HT_CHAIN_UNITID_BASE
- m->bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- m->bus_isa++;
-// printk(BIOS_DEBUG, "bus_isa=%d\n",bus_isa);
-#endif
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_8111_0, sysconf.sbdn);
dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN(m->sbdn3+1,0));
if (dev) {
m->bus_8132_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-#if CONFIG_HT_CHAIN_END_UNITID_BASE < CONFIG_HT_CHAIN_UNITID_BASE
- m->bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- m->bus_isa++;
-// printk(BIOS_DEBUG, "bus_isa=%d\n",bus_isa);
-#endif
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_8132_0, m->sbdn3+1);
dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j]+1,0));
if (dev) {
m->bus_8132a[j][2] = pci_read_config8(dev, PCI_SECONDARY_BUS);
- m->bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- m->bus_isa++;
- // printk(BIOS_DEBUG, "bus_isa=%d\n",bus_isa);
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_8132a[j][0], m->sbdn3a[j]+1);
if (dev) {
m->bus_8151[j][1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
- // printk(BIOS_DEBUG, "bus_8151_1=%d\n",bus_8151[j][1]);
- m->bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- m->bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_8151[j][0], m->sbdn5[j]+1);
#define MB_SYSCONF_H
struct mb_sysconf_t {
- unsigned char bus_isa;
unsigned char bus_8132_0;
unsigned char bus_8132_1;
unsigned char bus_8132_2;
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
- unsigned char bus_num;
- int i, j;
+ int i, j, bus_isa;
struct mb_sysconf_t *m;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
m = sysconf.mb;
-/*Bus: Bus ID Type*/
- /* define bus and isa numbers */
- for(bus_num = 0; bus_num < m->bus_isa; bus_num++) {
- smp_write_bus(mc, bus_num, "PCI ");
- }
- smp_write_bus(mc, m->bus_isa, "ISA ");
+ mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
smp_write_ioapic(mc, m->apicid_8111, 0x11, IO_APIC_ADDR); //8111
}
- mptable_add_isa_interrupts(mc, m->bus_isa, m->apicid_8111, 0);
+ mptable_add_isa_interrupts(mc, bus_isa, m->apicid_8111, 0);
//??? What
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8111_0, ((sysconf.sbdn+1)<<2)|3, m->apicid_8111, 0x13);
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
- smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, MP_APIC_ALL, 0x0);
- smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, MP_APIC_ALL, 0x1);
+ smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
+ smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
/* There is no extension information... */
/* Compute the checksums */
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
- unsigned char bus_num;
- unsigned char bus_isa;
+ int bus_isa;
unsigned char bus_8131_1;
unsigned char bus_8131_2;
unsigned char bus_8111_1;
dev = dev_find_slot(1, PCI_DEVFN(0x03,0));
if (dev) {
bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
-
bus_8111_1 = 4;
- bus_isa = 5;
}
/* 8131-1 */
dev = dev_find_slot(1, PCI_DEVFN(0x01,0));
if (dev) {
bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:01.0, using defaults\n");
-
bus_8131_1 = 2;
}
/* 8131-2 */
dev = dev_find_slot(1, PCI_DEVFN(0x02,0));
if (dev) {
bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:02.0, using defaults\n");
-
bus_8131_2 = 3;
}
}
- /* define bus and isa numbers */
- for(bus_num = 0; bus_num < bus_isa; bus_num++) {
- smp_write_bus(mc, bus_num, "PCI ");
- }
- smp_write_bus(mc, bus_isa, "ISA ");
+ mptable_write_buses(mc, NULL, &bus_isa);
/* IOAPIC handling */
smp_write_ioapic(mc, 2, 0x11, IO_APIC_ADDR);
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
- unsigned char bus_num;
- unsigned char bus_isa;
+ int bus_isa;
unsigned char bus_8131_1;
unsigned char bus_8131_2;
unsigned char bus_8111_1;
dev = dev_find_slot(1, PCI_DEVFN(0x03,0));
if (dev) {
bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
-
bus_8111_1 = 4;
- bus_isa = 5;
}
/* 8131-1 */
dev = dev_find_slot(1, PCI_DEVFN(0x01,0));
if (dev) {
bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:01.0, using defaults\n");
-
bus_8131_1 = 2;
}
/* 8131-2 */
dev = dev_find_slot(1, PCI_DEVFN(0x02,0));
if (dev) {
bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:02.0, using defaults\n");
-
bus_8131_2 = 3;
}
}
- /* define bus and isa numbers */
- for(bus_num = 0; bus_num < bus_isa; bus_num++) {
- smp_write_bus(mc, bus_num, "PCI ");
- }
- smp_write_bus(mc, bus_isa, "ISA ");
+ mptable_write_buses(mc, NULL, &bus_isa);
/* IOAPIC handling */
smp_write_ioapic(mc, 2, 0x11, IO_APIC_ADDR);
* mptable and acpi_tables.
*/
/* busnum is default */
-unsigned char bus_isa;
unsigned char bus_ck804[6];
unsigned apicid_ck804;
unsigned hcdnx[] = { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
0x20202020, //ms7135 has only one ht-chain
};
-unsigned bus_type[256];
-
-
static unsigned get_bus_conf_done = 0;
device_t dev;
unsigned sbdn;
- int i, j;
+ int i;
if (get_bus_conf_done == 1)
return; //do it only once
bus_ck804[i] = 0;
}
- for (i = 0; i < 256; i++) {
- bus_type[i] = 0;
- }
-
- bus_type[0] = 1; //pci
-
bus_ck804[0] = (sysconf.pci1234[0] >> 16) & 0xff;
- bus_type[bus_ck804[0]] = 1;
-
/* CK804 */
int dn = -1;
for (i = 1; i < 4; i++) {
dev = dev_find_slot(bus_ck804[0], PCI_DEVFN(sbdn + dn, 0));
if (dev) {
bus_ck804[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_isa++;
- for (j = bus_ck804[i]; j < bus_isa; j++)
- bus_type[j] = 1;
- } else {
- printk
- (BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
- bus_ck804[0], sbdn + dn);
- bus_isa = bus_ck804[i - 1] + 1;
}
}
#include <arch/pirq_routing.h>
#include <cpu/amd/amdk8_sysconf.h>
-extern unsigned char bus_isa;
extern unsigned char bus_ck804[6];
/* Global variables for MB layouts (shared by irqtable/mptable/acpi_table). */
// busnum is default.
-unsigned char bus_isa;
unsigned char bus_mcp55[8]; // 1
unsigned apicid_mcp55;
// 0x20202020,
};
-unsigned bus_type[256];
-
-
-
static unsigned get_bus_conf_done = 0;
void get_bus_conf(void)
{
unsigned int apicid_base, sbdn;
device_t dev;
- int i, j;
+ int i;
if (get_bus_conf_done == 1)
return; /* Do it only once. */
for (i = 0; i < 8; i++)
bus_mcp55[i] = 0;
- for (i = 0; i < 256; i++)
- bus_type[i] = 0;
-
- bus_type[0] = 1; /* PCI */
-
bus_mcp55[0] = (sysconf.pci1234[0] >> 16) & 0xff;
- bus_type[bus_mcp55[0]] = 1;
-
/* MCP55 */
dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn + 0x06, 0));
if (dev) {
bus_mcp55[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_mcp55[2] = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_mcp55[2]++;
- for (j = bus_mcp55[1]; j < bus_mcp55[2]; j++)
- bus_type[j] = 1;
} else {
printk
(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n",
PCI_DEVFN(sbdn + 0x0a + i - 2, 0));
if (dev) {
bus_mcp55[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_isa++;
- for (j = bus_mcp55[i]; j < bus_isa; j++)
- bus_type[j] = 1;
- } else {
- printk
- (BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
- bus_mcp55[0], sbdn + 0x0a + i - 2);
- bus_isa = bus_mcp55[i - 1] + 1;
}
}
pirq_info->rfu = rfu;
}
-extern unsigned char bus_isa;
extern unsigned char bus_mcp55[8]; // 1
-
-
unsigned long write_pirq_routing_table(unsigned long addr)
{
struct irq_routing_table *pirq;
#include <stdint.h>
#include <cpu/amd/amdk8_sysconf.h>
-extern unsigned char bus_isa;
extern unsigned char bus_mcp55[8]; // 1
extern unsigned apicid_mcp55;
-extern unsigned bus_type[256];
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
unsigned int sbdn;
- int i, j;
+ int i, j, bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
get_bus_conf();
sbdn = sysconf.sbdn;
- /* Bus: Bus ID Type */
- /* Define bus and ISA numbers. */
- for (j = 0; j < 256; j++) {
- if (bus_type[j])
- smp_write_bus(mc, j, "PCI ");
- }
- smp_write_bus(mc, bus_isa, "ISA ");
+ mptable_write_buses(mc, NULL, &bus_isa);
/* I/O APICs: APIC ID Version State Address */
{
dev = dev_find_slot(m->bus_bcm5785_1, PCI_DEVFN(0xd,0));
if(dev) {
m->bus_bcm5785_1_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-#if CONFIG_HT_CHAIN_END_UNITID_BASE >= CONFIG_HT_CHAIN_UNITID_BASE
- m->bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- m->bus_isa++;
- printk(BIOS_DEBUG, "bus_isa=%d\n",m->bus_isa);
-#endif
}
}
else {
dev = dev_find_slot(m->bus_bcm5780[0], PCI_DEVFN(m->sbdn2 + i - 1,0));
if(dev) {
m->bus_bcm5780[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
-#if CONFIG_HT_CHAIN_END_UNITID_BASE < CONFIG_HT_CHAIN_UNITID_BASE
- m->bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- m->bus_isa++;
- printk(BIOS_DEBUG, "bus_isa=%d\n",m->bus_isa);
-#endif
-
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_bcm5780[0], m->sbdn2+i-1);
#define MB_SYSCONF_H
struct mb_sysconf_t {
- unsigned char bus_isa;
unsigned char bus_bcm5780[7];
unsigned char bus_bcm5785_0;
unsigned char bus_bcm5785_1;
{
struct mp_config_table *mc;
- unsigned char bus_num;
- int i;
- struct mb_sysconf_t *m;
+ int i, bus_isa;
+ struct mb_sysconf_t *m;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
smp_write_processors(mc);
- get_bus_conf();
- m = sysconf.mb;
+ get_bus_conf();
+ m = sysconf.mb;
-/*Bus: Bus ID Type*/
- /* define bus and isa numbers */
- for(bus_num = 0; bus_num < m->bus_isa; bus_num++) {
- smp_write_bus(mc, bus_num, "PCI ");
- }
- smp_write_bus(mc, m->bus_isa, "ISA ");
+ mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
{
}
- mptable_add_isa_interrupts(mc, m->bus_isa, m->apicid_bcm5785[0], 0);
+ mptable_add_isa_interrupts(mc, bus_isa, m->apicid_bcm5785[0], 0);
//IDE
outb(0x02, 0xc00); outb(0x0e, 0xc01);
}
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
- smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, MP_APIC_ALL, 0x0);
- smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, MP_APIC_ALL, 0x1);
+ smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
+ smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
/* There is no extension information... */
/* Compute the checksums */
struct mb_sysconf_t *m;
device_t dev;
- int i, j;
+ int i;
if(get_bus_conf_done==1) return; //do it only once
sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain
- m->bus_type[0] = 1; //pci
-
m->bus_mcp55[0] = (sysconf.pci1234[0] >> 16) & 0xff;
/* MCP55 */
}
}
- for(i=0; i< sysconf.hc_possible_num; i++) {
- if(!(sysconf.pci1234[i] & 0x1) ) continue;
-
- unsigned busn = (sysconf.pci1234[i] >> 16) & 0xff;
- unsigned busn_max = (sysconf.pci1234[i] >> 24) & 0xff;
- for (j = busn; j <= busn_max; j++)
- m->bus_type[j] = 1;
- if(m->bus_isa <= busn_max)
- m->bus_isa = busn_max + 1;
- printk(BIOS_DEBUG, "i=%d bus range: [%x, %x] bus_isa=%x\n",i, busn, busn_max, m->bus_isa);
- }
-
-
-
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS==1
apicid_base = get_apicid_base(1);
#define MB_SYSCONF_H
struct mb_sysconf_t {
- unsigned char bus_isa;
unsigned char bus_mcp55[8]; //1
unsigned apicid_mcp55;
- unsigned bus_type[256];
-
};
#endif
struct mb_sysconf_t *m;
unsigned sbdn;
- int i,j;
+ int i, j, bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
smp_write_processors(mc);
- get_bus_conf();
- sbdn = sysconf.sbdn;
- m = sysconf.mb;
+ get_bus_conf();
+ sbdn = sysconf.sbdn;
+ m = sysconf.mb;
-/*Bus: Bus ID Type*/
- /* define bus and isa numbers */
- for(j= 0; j < 256 ; j++) {
- if(m->bus_type[j])
- smp_write_bus(mc, j, "PCI ");
- }
- smp_write_bus(mc, m->bus_isa, "ISA ");
+ mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
{
}
- mptable_add_isa_interrupts(mc, m->bus_isa, m->apicid_mcp55, 0);
+ mptable_add_isa_interrupts(mc, bus_isa, m->apicid_mcp55, 0);
//SMBUS
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+1)<<2)|1, m->apicid_mcp55, 0xa);
}
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
- smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, MP_APIC_ALL, 0x0);
- smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, MP_APIC_ALL, 0x1);
+ smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
+ smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
/* There is no extension information... */
/* Compute the checksums */
struct mb_sysconf_t *m;
device_t dev;
- int i, j;
+ int i;
printk(BIOS_SPEW, "get_bus_conf()\n");
get_pci1234();
- m->bus_type[0] = 1; //pci
sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain
m->bus_mcp55[0] = (sysconf.pci1234[0] >> 12) & 0xff;
}
}
- for(i=0; i< sysconf.hc_possible_num; i++) {
- if(!(sysconf.pci1234[i] & 0x1) ) continue;
-
- unsigned busn = (sysconf.pci1234[i] >> 12) & 0xff;
- unsigned busn_max = (sysconf.pci1234[i] >> 20) & 0xff;
- for (j = busn; j <= busn_max; j++)
- m->bus_type[j] = 1;
- if(m->bus_isa <= busn_max)
- m->bus_isa = busn_max + 1;
- printk(BIOS_DEBUG, "i=%d bus range: [%x, %x] bus_isa=%x\n",i, busn, busn_max, m->bus_isa);
- }
-
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS==1
apicid_base = get_apicid_base(1);
#define MB_SYSCONF_H
struct mb_sysconf_t {
- unsigned char bus_isa;
unsigned char bus_mcp55[8]; //1
unsigned apicid_mcp55;
- unsigned bus_type[256];
-
};
#endif
struct mb_sysconf_t *m;
unsigned sbdn;
- int i,j;
+ int i, j, bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
sbdn = sysconf.sbdn;
m = sysconf.mb;
-/*Bus: Bus ID Type*/
- /* define bus and isa numbers */
- for(j= 0; j < 256 ; j++) {
- if(m->bus_type[j])
- smp_write_bus(mc, j, "PCI ");
- }
- smp_write_bus(mc, m->bus_isa, "ISA ");
+ mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
{
}
- mptable_add_isa_interrupts(mc, m->bus_isa, m->apicid_mcp55, 0);
+ mptable_add_isa_interrupts(mc, bus_isa, m->apicid_mcp55, 0);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+1)<<2)|1, m->apicid_mcp55, 0xa);
}
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
- smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, MP_APIC_ALL, 0x0);
- smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, MP_APIC_ALL, 0x1);
+ smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
+ smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
/* There is no extension information... */
/* Compute the checksums */
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
- unsigned char bus_num;
- unsigned char bus_isa;
+ int bus_isa;
unsigned char bus_8131_1;
unsigned char bus_8131_2;
unsigned char bus_8111_1;
dev = dev_find_slot(1, PCI_DEVFN(0x03,0));
if (dev) {
bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
-
bus_8111_1 = 4;
- bus_isa = 5;
}
/* 8131-1 */
dev = dev_find_slot(1, PCI_DEVFN(0x01,0));
if (dev) {
bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:01.0, using defaults\n");
-
bus_8131_1 = 2;
}
/* 8131-2 */
dev = dev_find_slot(1, PCI_DEVFN(0x02,0));
if (dev) {
bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:02.0, using defaults\n");
-
bus_8131_2 = 3;
}
}
- /* define bus and isa numbers */
- for(bus_num = 0; bus_num < bus_isa; bus_num++) {
- smp_write_bus(mc, bus_num, "PCI ");
- }
- smp_write_bus(mc, bus_isa, "ISA ");
+ mptable_write_buses(mc, NULL, &bus_isa);
/* IOAPIC handling */
unsigned apicid_base;
struct mb_sysconf_t *m;
- int i, j;
+ int i;
if (get_bus_conf_done)
return; //do it only once
m->sbdnb = (sysconf.hcdn[1] & 0xff); // first byte of second chain
- m->bus_type[0] = 1; //pci
-
m->bus_mcp55 = (sysconf.pci1234[0] >> 16) & 0xff;
- for (i = 0; i < sysconf.hc_possible_num; i++) {
- unsigned busn_min, busn_max;
-
- if (!(sysconf.pci1234[i] & 0x1))
- continue;
-
- busn_min = (sysconf.pci1234[i] >> 16) & 0xff;
- busn_max = (sysconf.pci1234[i] >> 24) & 0xff;
- for (j = busn_min; j <= busn_max; j++)
- m->bus_type[j] = 1;
- if(m->bus_isa <= busn_max)
- m->bus_isa = busn_max + 1;
- printk(BIOS_DEBUG, "i=%d bus range: [%x, %x] bus_isa=%x\n",i, busn_min, busn_max, m->bus_isa);
- }
-
/* MCP55b */
for (i = 1; i < sysconf.hc_possible_num; i++) {
if (!(sysconf.pci1234[i] & 0x0f))
#define MB_SYSCONF_H
struct mb_sysconf_t {
- unsigned char bus_isa;
unsigned char bus_mcp55;
unsigned char bus_mcp55b;
unsigned apicid_mcp55;
unsigned apicid_mcp55b;
- unsigned bus_type[256];
-
unsigned sbdnb;
-
};
#endif
struct mp_config_table *mc;
struct mb_sysconf_t *m;
unsigned sbdn;
- int i,j;
+ int i, j, bus_isa;
unsigned char apicpin[4];
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
sbdn = sysconf.sbdn;
m = sysconf.mb;
-/*Bus: Bus ID Type*/
- /* define bus and isa numbers */
- for (j = 0; j < 256 ; j++) {
- if (m->bus_type[j])
- smp_write_bus(mc, j, "PCI ");
- }
- smp_write_bus(mc, m->bus_isa, "ISA ");
+ mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
{
}
- mptable_add_isa_interrupts(mc, m->bus_isa, m->apicid_mcp55, 0);
+ mptable_add_isa_interrupts(mc, bus_isa, m->apicid_mcp55, 0);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55, ((sbdn+1)<<2)|1, m->apicid_mcp55, 0xa); // 10
}
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
- smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, MP_APIC_ALL, 0x0);
- smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, MP_APIC_ALL, 0x1);
+ smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
+ smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
/* There is no extension information... */
/* Compute the checksums */
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
- int i;
- int max_pci_bus, isa_bus;
+ int isa_bus;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
smp_write_processors(mc);
- max_pci_bus = 5; // XXX read me from bridges.
-
- /* ISA bus follows */
- isa_bus = max_pci_bus + 1;
-
- /* Bus: Bus ID Type */
- for (i=0; i <= max_pci_bus; i++)
- smp_write_bus(mc, i, "PCI ");
-
- smp_write_bus(mc, isa_bus, "ISA ");
+ mptable_write_buses(mc, NULL, &isa_bus);
/* I/O APICs: APIC ID Version State Address */
smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
//busnum is default
- unsigned char bus_isa;
unsigned char bus_ck804_0; //1
unsigned char bus_ck804_1; //2
unsigned char bus_ck804_2; //3
dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3,0));
if (dev) {
bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:02.0, using defaults\n", bus_8131_0);
dev = dev_find_slot(bus_ck804b_0, PCI_DEVFN(sbdnb + 0x0e,0));
if (dev) {
bus_ck804b_5 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", bus_ck804b_0,sbdnb+0x0e);
bus_ck804b_5 = bus_ck804b_4+1;
#endif
- bus_isa = bus_ck804b_5+1;
}
}
#include <stdint.h>
#include <cpu/amd/amdk8_sysconf.h>
-extern unsigned char bus_isa;
extern unsigned char bus_ck804_0; //1
extern unsigned char bus_ck804_1; //2
extern unsigned char bus_ck804_2; //3
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
- unsigned char bus_num;
- int i;
+ int i, bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
get_bus_conf();
-/*Bus: Bus ID Type*/
- /* define bus and isa numbers */
- for(bus_num = 0; bus_num < bus_isa; bus_num++) {
- smp_write_bus(mc, bus_num, "PCI ");
- }
- smp_write_bus(mc, bus_isa, "ISA ");
+ mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
{
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
//busnum is default
-unsigned char bus_isa = 5 ;
unsigned char bus_8131_0 = 1;
unsigned char bus_8131_1 = 2;
unsigned char bus_8131_2 = 3;
dev = dev_find_slot(bus_8111_0, PCI_DEVFN(sysconf.sbdn,0));
if (dev) {
bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-#if CONFIG_HT_CHAIN_END_UNITID_BASE >= CONFIG_HT_CHAIN_UNITID_BASE
- bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_isa++;
-// printk(BIOS_DEBUG, "bus_isa=%d\n",bus_isa);
-#endif
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:03.0, using defaults\n", bus_8111_0);
dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3+1,0));
if (dev) {
bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-#if CONFIG_HT_CHAIN_END_UNITID_BASE < CONFIG_HT_CHAIN_UNITID_BASE
- bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_isa++;
-// printk(BIOS_DEBUG, "bus_isa=%d\n",bus_isa);
-#endif
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:02.0, using defaults\n", bus_8131_0);
#include <stdint.h>
#include <cpu/amd/amdk8_sysconf.h>
-extern unsigned char bus_isa;
extern unsigned char bus_8131_0;
extern unsigned char bus_8131_1;
extern unsigned char bus_8131_2;
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
- unsigned char bus_num;
- int i;
+ int i, bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
get_bus_conf();
-/*Bus: Bus ID Type*/
- /* define bus and isa numbers */
- for(bus_num = 0; bus_num < bus_isa; bus_num++) {
- smp_write_bus(mc, bus_num, "PCI ");
- }
- smp_write_bus(mc, bus_isa, "ISA ");
-
+ mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
smp_write_ioapic(mc, apicid_8111, 0x11, IO_APIC_ADDR);
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
- unsigned char bus_num;
- unsigned char bus_isa;
+ int bus_isa;
unsigned char bus_chain_0;
unsigned char bus_8131_1;
unsigned char bus_8131_2;
dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x03,0));
if (dev) {
bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
bus_8111_1 = 4;
- bus_isa = 5;
}
/* 8131-1 */
dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x01,0));
bus_8131_2 = 3;
}
}
-/*Bus: Bus ID Type*/
- /* define bus and isa numbers */
- for(bus_num = 0; bus_num < bus_isa; bus_num++) {
- smp_write_bus(mc, bus_num, "PCI ");
- }
- smp_write_bus(mc, bus_isa, "ISA ");
-
+ mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS==1
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
//busnum is default
-unsigned char bus_isa = 7 ;
unsigned char bus_8131_0 = 1;
unsigned char bus_8131_1 = 2;
unsigned char bus_8131_2 = 3;
dev = dev_find_slot(bus_8111_0, PCI_DEVFN(sysconf.sbdn,0));
if (dev) {
bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-#if CONFIG_HT_CHAIN_END_UNITID_BASE >= CONFIG_HT_CHAIN_UNITID_BASE
- bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_isa++;
-// printk(BIOS_DEBUG, "bus_isa=%d\n",bus_isa);
-#endif
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:03.0, using defaults\n", bus_8111_0);
dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3+1,0));
if (dev) {
bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-#if CONFIG_HT_CHAIN_END_UNITID_BASE < CONFIG_HT_CHAIN_UNITID_BASE
- bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_isa++;
-// printk(BIOS_DEBUG, "bus_isa=%d\n",bus_isa);
-#endif
-
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:02.0, using defaults\n", bus_8131_0);
if (dev) {
bus_8151_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
// printk(BIOS_DEBUG, "bus_8151_1=%d\n",bus_8151_1);
- bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_isa++;
}
/*I/O APICs: APIC ID Version State Address*/
#include <stdint.h>
#include <cpu/amd/amdk8_sysconf.h>
-extern unsigned char bus_isa;
extern unsigned char bus_8131_0;
extern unsigned char bus_8131_1;
extern unsigned char bus_8131_2;
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
- unsigned char bus_num;
- int i;
+ int i, bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
get_bus_conf();
-/*Bus: Bus ID Type*/
- /* define bus and isa numbers */
- for(bus_num = 0; bus_num < bus_isa; bus_num++) {
- smp_write_bus(mc, bus_num, "PCI ");
- }
- smp_write_bus(mc, bus_isa, "ISA ");
+ mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
smp_write_ioapic(mc, apicid_8111, 0x11, IO_APIC_ADDR); //8111
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
//busnum is default
- unsigned char bus_isa;
unsigned char bus_ck804_0; //1
unsigned char bus_ck804_1; //2
unsigned char bus_ck804_2; //3
dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn+ 0x0e,0));
if (dev) {
bus_ck804_5 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn+ 0x0e);
dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3+1,0));
if (dev) {
bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:02.0, using defaults\n", bus_8131_0);
bus_8131_2 = bus_8131_1+1;
- bus_isa = bus_8131_1+2;
}
if(sysconf.pci1234[2] & 1) {
pirq_info->rfu = rfu;
}
-extern unsigned char bus_isa;
extern unsigned char bus_ck804_0; //1
extern unsigned char bus_ck804_1; //2
extern unsigned char bus_ck804_2; //3
#include <stdint.h>
#include <cpu/amd/amdk8_sysconf.h>
-extern unsigned char bus_isa;
extern unsigned char bus_ck804_0; //1
extern unsigned char bus_ck804_1; //2
extern unsigned char bus_ck804_2; //3
{
struct mp_config_table *mc;
unsigned sbdn;
- unsigned char bus_num;
- int i;
+ int i, bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
get_bus_conf();
sbdn = sysconf.sbdn;
-/*Bus: Bus ID Type*/
- /* define bus and isa numbers */
- for(bus_num = 0; bus_num < bus_isa; bus_num++) {
- smp_write_bus(mc, bus_num, "PCI ");
- }
- smp_write_bus(mc, bus_isa, "ISA ");
+ mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
{
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
//busnum is default
- unsigned char bus_isa;
unsigned char bus_ck804_0; //1
unsigned char bus_ck804_1; //2
unsigned char bus_ck804_2; //3
dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn+ 0x0e,0));
if (dev) {
bus_ck804_5 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn+ 0x0e);
dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3+1,0));
if (dev) {
bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:02.0, using defaults\n", bus_8131_0);
bus_8131_2 = bus_8131_1+1;
- bus_isa = bus_8131_1+2;
}
pirq_info->rfu = rfu;
}
-extern unsigned char bus_isa;
extern unsigned char bus_ck804_0; //1
extern unsigned char bus_ck804_1; //2
extern unsigned char bus_ck804_2; //3
#include <stdint.h>
#include <cpu/amd/amdk8_sysconf.h>
-extern unsigned char bus_isa;
extern unsigned char bus_ck804_0; //1
extern unsigned char bus_ck804_1; //2
extern unsigned char bus_ck804_2; //3
{
struct mp_config_table *mc;
unsigned sbdn;
- unsigned char bus_num;
- int i;
+ int i, bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
get_bus_conf();
sbdn = sysconf.sbdn;
-/*Bus: Bus ID Type*/
- /* define bus and isa numbers */
- for(bus_num = 0; bus_num < bus_isa; bus_num++) {
- smp_write_bus(mc, bus_num, "PCI ");
- }
- smp_write_bus(mc, bus_isa, "ISA ");
+ mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
{
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
//busnum is default
- unsigned char bus_isa;
unsigned char bus_ck804_0; //1
unsigned char bus_ck804_1; //2
unsigned char bus_ck804_2; //3
dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3,0));
if (dev) {
bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:02.0, using defaults\n", bus_8131_0);
dev = dev_find_slot(bus_ck804b_0, PCI_DEVFN(sbdnb + 0x0e,0));
if (dev) {
bus_ck804b_5 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_isa++;
}
else {
printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", bus_ck804b_0,sbdnb+0x0e);
bus_ck804b_5 = bus_ck804b_4+1;
- bus_isa = bus_ck804b_5+1;
}
}
#include <stdint.h>
#include <cpu/amd/amdk8_sysconf.h>
-extern unsigned char bus_isa;
extern unsigned char bus_ck804_0; //1
extern unsigned char bus_ck804_1; //2
extern unsigned char bus_ck804_2; //3
{
struct mp_config_table *mc;
unsigned sbdn;
- unsigned char bus_num;
- int i;
+ int i, bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
get_bus_conf();
sbdn = sysconf.sbdn;
-/*Bus: Bus ID Type*/
- /* define bus and isa numbers */
- for(bus_num = 0; bus_num < bus_isa; bus_num++) {
- smp_write_bus(mc, bus_num, "PCI ");
- }
- smp_write_bus(mc, bus_isa, "ISA ");
+ mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
{
struct mb_sysconf_t *m;
device_t dev;
- int i, j;
+ int i;
if(get_bus_conf_done==1) return; //do it only once
sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain
- m->bus_type[0] = 1; //pci
-
m->bus_mcp55[0] = (sysconf.pci1234[0] >> 16) & 0xff;
/* MCP55 */
}
}
- for(i=0; i< sysconf.hc_possible_num; i++) {
- if(!(sysconf.pci1234[i] & 0x1) ) continue;
-
- unsigned busn = (sysconf.pci1234[i] >> 16) & 0xff;
- unsigned busn_max = (sysconf.pci1234[i] >> 24) & 0xff;
- for (j = busn; j <= busn_max; j++)
- m->bus_type[j] = 1;
- if(m->bus_isa <= busn_max)
- m->bus_isa = busn_max + 1;
- printk(BIOS_DEBUG, "i=%d bus range: [%x, %x] bus_isa=%x\n",i, busn, busn_max, m->bus_isa);
- }
-
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS==1
apicid_base = get_apicid_base(1);
#define MB_SYSCONF_H
struct mb_sysconf_t {
- unsigned char bus_isa;
unsigned char bus_mcp55[8]; //1
unsigned apicid_mcp55;
- unsigned bus_type[256];
-
};
#endif
struct mp_config_table *mc;
struct mb_sysconf_t *m;
unsigned sbdn;
- int i,j;
+ int i, j, bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
sbdn = sysconf.sbdn;
m = sysconf.mb;
-/*Bus: Bus ID Type*/
- /* define bus and isa numbers */
- for(j= 0; j < 256 ; j++) {
- if(m->bus_type[j])
- smp_write_bus(mc, j, "PCI ");
- }
- smp_write_bus(mc, m->bus_isa, "ISA ");
+ mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
{
}
- mptable_add_isa_interrupts(mc, m->bus_isa, m->apicid_mcp55, 0);
+ mptable_add_isa_interrupts(mc, bus_isa, m->apicid_mcp55, 0);
/*I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+1)<<2)|1, m->apicid_mcp55, 0xa);
}
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
- smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, MP_APIC_ALL, 0x0);
- smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, MP_APIC_ALL, 0x1);
+ smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
+ smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
/* There is no extension information... */
/* Compute the checksums */
struct mb_sysconf_t *m;
device_t dev;
- int i, j;
+ int i;
if(get_bus_conf_done==1) return; //do it only once
get_pci1234();
- m->bus_type[0] = 1; //pci
sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain
m->bus_mcp55[0] = (sysconf.pci1234[0] >> 12) & 0xff;
}
}
- for(i=0; i< sysconf.hc_possible_num; i++) {
- if(!(sysconf.pci1234[i] & 0x1) ) continue;
-
- unsigned busn = (sysconf.pci1234[i] >> 12) & 0xff;
- unsigned busn_max = (sysconf.pci1234[i] >> 20) & 0xff;
- for (j = busn; j <= busn_max; j++)
- m->bus_type[j] = 1;
- if(m->bus_isa <= busn_max)
- m->bus_isa = busn_max + 1;
- printk(BIOS_DEBUG, "i=%d bus range: [%x, %x] bus_isa=%x\n",i, busn, busn_max, m->bus_isa);
- }
-
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS==1
apicid_base = get_apicid_base(1);
#define MB_SYSCONF_H
struct mb_sysconf_t {
- unsigned char bus_isa;
unsigned char bus_mcp55[8]; //1
unsigned apicid_mcp55;
- unsigned bus_type[256];
-
};
#endif
struct mp_config_table *mc;
struct mb_sysconf_t *m;
unsigned sbdn;
- int i,j;
+ int i, j, bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
sbdn = sysconf.sbdn;
m = sysconf.mb;
-/*Bus: Bus ID Type*/
- /* define bus and isa numbers */
- for(j= 0; j < 256 ; j++) {
- if(m->bus_type[j])
- smp_write_bus(mc, j, "PCI ");
- }
- smp_write_bus(mc, m->bus_isa, "ISA ");
+ mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
{
}
- mptable_add_isa_interrupts(mc, m->bus_isa, m->apicid_mcp55, 0);
+ mptable_add_isa_interrupts(mc, bus_isa, m->apicid_mcp55, 0);
/*I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+1)<<2)|1, m->apicid_mcp55, 0xa);
}
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
- smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, MP_APIC_ALL, 0x0);
- smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, MP_APIC_ALL, 0x1);
+ smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
+ smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
/* There is no extension information... */
/* Compute the checksums */
projects / coreboot.git / commitdiff