Add constants for fast path resume copying
[coreboot.git] / src / include /
2012-04-05 Stefan ReinauerAdd constants for fast path resume copying master
2012-04-05 Stefan ReinauerFill out ChromeOS specific coreboot table extensions
2012-04-04 Stefan ReinauerAdd support to run SMM handler in TSEG instead of ASEG
2012-04-03 Stefan ReinauerAdd support for Intel Turbo Boost feature
2012-04-03 Stefan Reinauersmbios: add support for onboard devices extended inform...
2012-04-02 Stefan ReinauerAdd a helper function to determine the number of enable...
2012-04-02 Stefan ReinauerAlign: Make sure 1 is treated as unsigned long instead...
2012-03-30 Duncan LaurieMake MTRR min hole alignment 64MB
2012-03-30 Stefan ReinauerAdd more timestamps in coreboot.
2012-03-30 Duncan LaurieAdd timestamps for selfboot and acpi wake
2012-03-30 Stefan ReinauerAdd TPM support to coreboot
2012-03-29 Stefan ReinauerAdd an option to keep the ROM cached after romstage
2012-03-29 Gabe BlackAdd infrastructure for global data in the CAR phase...
2012-03-29 Gabe BlackDetect whether the OXPCIE card is really present while...
2012-03-29 Duncan LaurieAdd support for enabling PCIe Common Clock and ASPM
2012-03-29 Vadim BendeburyRefactor publishing CBMEM addresses through coreboot...
2012-03-29 Vadim BendeburyAdd timestamp table pointer to the coreboot table.
2012-03-29 Vadim BendeburyCBMEM CONSOLE: Add CBMEM type for console buffer.
2012-03-29 Vadim BendeburyCBMEM CONSOLE: Add CBMEM console driver implementation.
2012-03-29 Vadim BendeburyIncrease CBMEM to accommodate larger console.
2012-03-28 Duncan LaurieAdd cmos helper functions for reading/writing a dword
2012-03-28 Vadim BendeburyAdd timestamp collecting to coreboot.
2012-03-28 Vadim BendeburyInitialize CBMEM early.
2012-03-27 Rudolf MarekAdd RDC R8610 PCI IDs.
2012-03-16 Patrick Georgixchg is atomic with side-effects
2012-03-14 Gabe BlackSince cbfs_core.h provides a macro that uses ntohl...
2012-03-09 Stefan ReinauerIncrease size of the coreboot table area
2012-03-09 Duncan LaurieAdd helper function to find a Local APIC by ID in the...
2012-03-09 Stefan Reinauermove console includes to central console/console.h
2012-03-09 Gabe BlackAdd an implementation for the memchr library function
2012-03-08 Patrick GeorgiUnify Local APIC address definitions
2012-02-16 Kerry Shehpci_ids: Add AMD F15h model 00-0f and F10h cpu HT devic...
2012-02-16 Kerry ShehAGESA F15: AGESA family15 model 00-0fh cpu wrapper
2012-02-13 Kyösti MälkkiAMD Geode cpus: apply un-written naming rules
2012-02-06 Stefan ReinauerAdd OPROM mapping support to coreboot
2012-01-24 Kerry ShehRD890: pci_ids update
2012-01-23 Vikram Narayananpost code: Replaced hard-coded post code with macro
2012-01-12 Sven Schnellelib: add ram_check_nodie
2012-01-10 Sven SchnelleMTRR: get physical address size from CPUID
2011-12-13 Patrick GeorgiFix CMOS handling for non-USE_OPTION_TABLE configuration
2011-11-01 Stefan Reinauerremove trailing whitespace
2011-11-01 Patrick GeorgiRemove XIP_ROM_BASE
2011-10-31 Sven SchnelleFix usb debug dongle support
2011-10-28 Patrick GeorgiGet rid of AUTO_XIP_ROM_BASE
2011-10-21 Stefan ReinauerExtend coreboot table entry for serial ports
2011-10-21 Stefan ReinauerAdd macros for 64bit byte order swapping
2011-10-13 Stefan ReinauerEnable/fix compilation of i8254 code in ram stage.
2011-10-12 Kerry ShehSB800: Sata Enable bus master and enable ahci for AHCI...
2011-10-03 Kerry Shehpci_ids: Add sb800 SATA device raid mode device id
2011-09-15 efdesign98Build warning fix for AMD Family 12
2011-09-12 efdesign98Miscellaneous AMD F14 warning fixes
2011-09-06 Rudolf MarekAdd support for the tracing infastructure in coreboot.
2011-08-26 Sven SchnelleAdd automatic SMBIOS table generation
2011-08-18 Sven Schnelleexport get_cbfs_header()
2011-08-04 Patrick Georgisplit CBFS support into shared core and extended functions
2011-08-04 Keith Huicpu/intel/slot_1: Init L2 cache on SECC(2) CPUs.
2011-07-13 Rudolf MarekMake AMD SMM SMP aware
2011-07-12 Kevin O'ConnorDo full flush on uart8250 only at end of printk.
2011-06-28 efdesign98Addition of Family12/SB900 wrapper code
2011-06-28 Sven SchnelleSMM: add guard and include types.h in cpu/x86/smm.h
2011-06-15 Sven SchnelleSMM: don't overwrite SMM memory on resume
2011-06-15 Sven SchnelleCMOS: add set_option()
2011-06-07 Sven SchnelleSMM: add defines for APM_CNT register
2011-06-06 Sven SchnelleSMM: add mainboard_apm_cnt() callback
2011-06-03 Alexandru GagniucCorrect wrong PCI ID for VIA K8M890 Chrome.
2011-05-15 Scott DuplichanCosmetic cleanup.
2011-05-15 Scott DuplichanEnable AHCI mode and hide IDE controller to reduce...
2011-05-10 Patrick GeorgiChange read_option() to a macro that wraps some API...
2011-05-09 Ivaylo ValkovAdds RS740 HT and internal graphics PCI ids.
2011-04-26 Stefan ReinauerAdd support for memory mapped UARTs to coreboot and...
2011-04-22 Stefan ReinauerThe UART divider should be calculated based on the...
2011-04-21 Stefan Reinauermore ifdef -> if fixes
2011-04-21 Stefan Reinauersome ifdef --> if fixes
2011-04-20 Stefan ReinauerSimplify coreboot's console/console.h
2011-04-20 Sven Schnellepci1x2x: add PCI1510 device IDs
2011-04-20 Stefan Reinauerdrop dead uart init code.
2011-04-11 Alexandru GagniucUnify use of post_code
2011-04-10 Stefan ReinauerIn 2007 Adrian Reber suggested that we drop ASSEMBLY...
2011-03-27 Zheng BaoAdd AMD SR56x0 support.
2011-03-01 Sven SchnelleFix a simple whitespace error in src/include/device...
2011-03-01 Sven SchnelleAdd subsystemid option to sconfig
2011-02-16 Alexandru GagniucExtended K8T890 driver to include the K8T800 and K8M800...
2011-02-14 Frank VibransI missed a file that was part of the AMD AGESA CPU...
2011-02-03 Patrick GeorgiWrap CONFIG_MAINBOARD_PCI_SUBSYSTEM_{VENDOR,DEVICE...
2011-01-31 Alexandru GagniucAdd PCI ID's for VIA K8T800 and K8M800 northbridges.
2011-01-28 Stefan ReinauerThis patch gets usbdebug console working in romstage.
2011-01-19 Stefan ReinauerRevert r5902 to make code more readable again. At least...
2011-01-19 Kevin O'ConnorNow that the VIA code is run above 1Meg (like other...
2011-01-18 Patrick GeorgiMove option table (cmos.layout's binary representation)
2011-01-01 Kerry SheAdd AMD SB800 southbridge support via cimx_wrapper.
2010-12-31 Zheng BaoAdd RS785(RS880) support. Just few pci_ids.
2010-12-29 Nils Jacobs-Change the remaining GLIU1 port 5 register names from...
2010-12-26 Nils JacobsReplace Geode GX2 MSR addresses for GLCP on GLIU1 with...
2010-12-26 Nils JacobsClean up Geode GX2 comments, whitespace and coding...
2010-12-18 Stefan ReinauerSMM for AMD K8 Part 1/2
2010-12-17 Stefan Reinauerfix the tree again.
2010-12-17 Stefan Reinauerdrop one more version of doing serial uart output diffe...
2010-12-17 Stefan Reinauerguard against the case that CONFIG_WAIT_BEFORE_CPUS_INI...
2010-12-13 Rudolf MarekCompile cbmem.c instead of including it in romstage,
2010-12-13 Rudolf MarekWe hardcode highmemory size in every northbridge!...
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