Enable/fix compilation of i8254 code in ram stage.

Change-Id: I3bbe795d8e6e576be9e94d6cd888e78a116ddbbd
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/254
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>

diff --git a/src/include/pc80/i8254.h b/src/include/pc80/i8254.h
index 82f31e6ff3043d104287c4676b23f51133c431ee..4c5e7039ced86eca1dd5c871311c476c16218d50 100644 (file)
--- a/src/include/pc80/i8254.h
+++ b/src/include/pc80/i8254.h
@@ -20,8 +20,6 @@
 #ifndef PC80_I8254_H
 #define PC80_I8254_H
 
-void setup_i8254(void);
-
 /* Ports for the 8254 timer chip */
 #define TIMER0_PORT    0x40
 #define TIMER1_PORT    0x41
@@ -60,4 +58,7 @@ void setup_i8254(void);
 #define PPCB_SPKR       0x02    /* Bit 1 */
 #define PPCB_T2GATE     0x01    /* Bit 0 */
 
+#ifndef __ROMCC__
+void setup_i8254(void);
+#endif
 #endif

diff --git a/src/pc80/Makefile.inc b/src/pc80/Makefile.inc
index 4f126f681deb91b8a985f1ee9ed7d84704680187..2c8a80ee1515e2bba41e377a2405e306ba80f782 100644 (file)
--- a/src/pc80/Makefile.inc
+++ b/src/pc80/Makefile.inc
@@ -1,5 +1,6 @@
 ramstage-y += mc146818rtc.c
 ramstage-y += isa-dma.c
+ramstage-y += i8254.c
 ramstage-y += i8259.c
 ramstage-$(CONFIG_UDELAY_IO) += udelay_io.c
 ramstage-y += keyboard.c

diff --git a/src/pc80/i8254.c b/src/pc80/i8254.c
index ca993f494c5671dd9e5b457dc78dd6fef68a9725..f75216da47140ff8ec5e941dfc2dc5b11692e26f 100644 (file)
--- a/src/pc80/i8254.c
+++ b/src/pc80/i8254.c
@@ -35,7 +35,7 @@ void setup_i8254(void)
        outb(0x12, TIMER1_PORT);
 }
 
-#if CONFIG_UDELAY_TIMER2
+#if defined(CONFIG_UDELAY_TIMER2) &&  CONFIG_UDELAY_TIMER2
 static void load_timer2(unsigned int ticks)
 {
         /* Set up the timer gate, turn off the speaker */